dpdk/dpdk-16.07_patches/0005-NXP-DPAA2-Poll-Mode-Driver-Support-dpdk-16.07.patch

   1 From 5a2069b38e85771f3857af390e407360d66cd6ed Mon Sep 17 00:00:00 2001
   2 From: Sachin Saxena <sachin.saxena@nxp.com>
   3 Date: Fri, 5 Aug 2016 14:06:11 +0530
   4 Subject: [PATCH 5/5] NXP DPAA2 Poll Mode Driver Support (dpdk-16.07)
   5
   6  Upstreaming of DPAA2 driver changes is in progress.This patch will
   7  temporary add the support in VPP in-built DPDK.
   8
   9    Two types of changes:
  10      1. Driver specfic independent files. No impact on any other functionality.
  11      2. Changes in common EAL framework. These changes are done in compile time DPAA2
  12         specific flag, so no impact is expected on other existing features if not
  13         compiling for DPAA2.
  14
  15 Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
  16 ---
  17  config/defconfig_arm64-dpaa2-linuxapp-gcc          |   18 +-
  18  drivers/net/Makefile                               |    1 +
  19  drivers/net/dpaa2/Makefile                         |  102 +
  20  drivers/net/dpaa2/dpaa2_logs.h                     |   78 +
  21  drivers/net/dpaa2/mc/dpaiop.c                      |  457 ++++
  22  drivers/net/dpaa2/mc/dpbp.c                        |  432 ++++
  23  drivers/net/dpaa2/mc/dpci.c                        |  501 ++++
  24  drivers/net/dpaa2/mc/dpcon.c                       |  400 +++
  25  drivers/net/dpaa2/mc/dpdbg.c                       |  547 +++++
  26  drivers/net/dpaa2/mc/dpdcei.c                      |  449 ++++
  27  drivers/net/dpaa2/mc/dpdmai.c                      |  452 ++++
  28  drivers/net/dpaa2/mc/dpdmux.c                      |  567 +++++
  29  drivers/net/dpaa2/mc/dpio.c                        |  468 ++++
  30  drivers/net/dpaa2/mc/dpmac.c                       |  422 ++++
  31  drivers/net/dpaa2/mc/dpmcp.c                       |  312 +++
  32  drivers/net/dpaa2/mc/dpmng.c                       |   58 +
  33  drivers/net/dpaa2/mc/dpni.c                        | 1907 +++++++++++++++
  34  drivers/net/dpaa2/mc/dprc.c                        |  786 ++++++
  35  drivers/net/dpaa2/mc/dprtc.c                       |  509 ++++
  36  drivers/net/dpaa2/mc/dpseci.c                      |  502 ++++
  37  drivers/net/dpaa2/mc/dpsw.c                        | 1639 +++++++++++++
  38  drivers/net/dpaa2/mc/fsl_dpaiop.h                  |  494 ++++
  39  drivers/net/dpaa2/mc/fsl_dpaiop_cmd.h              |  190 ++
  40  drivers/net/dpaa2/mc/fsl_dpbp.h                    |  438 ++++
  41  drivers/net/dpaa2/mc/fsl_dpbp_cmd.h                |  172 ++
  42  drivers/net/dpaa2/mc/fsl_dpci.h                    |  594 +++++
  43  drivers/net/dpaa2/mc/fsl_dpci_cmd.h                |  200 ++
  44  drivers/net/dpaa2/mc/fsl_dpcon.h                   |  407 +++
  45  drivers/net/dpaa2/mc/fsl_dpcon_cmd.h               |  162 ++
  46  drivers/net/dpaa2/mc/fsl_dpdbg.h                   |  635 +++++
  47  drivers/net/dpaa2/mc/fsl_dpdbg_cmd.h               |  249 ++
  48  drivers/net/dpaa2/mc/fsl_dpdcei.h                  |  515 ++++
  49  drivers/net/dpaa2/mc/fsl_dpdcei_cmd.h              |  182 ++
  50  drivers/net/dpaa2/mc/fsl_dpdmai.h                  |  521 ++++
  51  drivers/net/dpaa2/mc/fsl_dpdmai_cmd.h              |  191 ++
  52  drivers/net/dpaa2/mc/fsl_dpdmux.h                  |  724 ++++++
  53  drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h              |  256 ++
  54  drivers/net/dpaa2/mc/fsl_dpio.h                    |  460 ++++
  55  drivers/net/dpaa2/mc/fsl_dpio_cmd.h                |  184 ++
  56  drivers/net/dpaa2/mc/fsl_dpkg.h                    |  174 ++
  57  drivers/net/dpaa2/mc/fsl_dpmac.h                   |  593 +++++
  58  drivers/net/dpaa2/mc/fsl_dpmac_cmd.h               |  195 ++
  59  drivers/net/dpaa2/mc/fsl_dpmcp.h                   |  332 +++
  60  drivers/net/dpaa2/mc/fsl_dpmcp_cmd.h               |  135 +
  61  drivers/net/dpaa2/mc/fsl_dpmng.h                   |   74 +
  62  drivers/net/dpaa2/mc/fsl_dpmng_cmd.h               |   46 +
  63  drivers/net/dpaa2/mc/fsl_dpni.h                    | 2581 ++++++++++++++++++++
  64  drivers/net/dpaa2/mc/fsl_dpni_cmd.h                | 1058 ++++++++
  65  drivers/net/dpaa2/mc/fsl_dprc.h                    | 1032 ++++++++
  66  drivers/net/dpaa2/mc/fsl_dprc_cmd.h                |  755 ++++++
  67  drivers/net/dpaa2/mc/fsl_dprtc.h                   |  434 ++++
  68  drivers/net/dpaa2/mc/fsl_dprtc_cmd.h               |  181 ++
  69  drivers/net/dpaa2/mc/fsl_dpseci.h                  |  647 +++++
  70  drivers/net/dpaa2/mc/fsl_dpseci_cmd.h              |  241 ++
  71  drivers/net/dpaa2/mc/fsl_dpsw.h                    | 2164 ++++++++++++++++
  72  drivers/net/dpaa2/mc/fsl_dpsw_cmd.h                |  916 +++++++
  73  drivers/net/dpaa2/mc/fsl_mc_cmd.h                  |  221 ++
  74  drivers/net/dpaa2/mc/fsl_mc_sys.h                  |   98 +
  75  drivers/net/dpaa2/mc/fsl_net.h                     |  480 ++++
  76  drivers/net/dpaa2/mc/mc_sys.c                      |  127 +
  77  drivers/net/dpaa2/qbman/driver/qbman_debug.c       |  929 +++++++
  78  drivers/net/dpaa2/qbman/driver/qbman_debug.h       |  140 ++
  79  drivers/net/dpaa2/qbman/driver/qbman_portal.c      | 1441 +++++++++++
  80  drivers/net/dpaa2/qbman/driver/qbman_portal.h      |  270 ++
  81  drivers/net/dpaa2/qbman/driver/qbman_private.h     |  168 ++
  82  drivers/net/dpaa2/qbman/driver/qbman_sys.h         |  373 +++
  83  drivers/net/dpaa2/qbman/driver/qbman_sys_decl.h    |   69 +
  84  drivers/net/dpaa2/qbman/include/compat.h           |  637 +++++
  85  .../dpaa2/qbman/include/drivers/fsl_qbman_base.h   |  151 ++
  86  .../dpaa2/qbman/include/drivers/fsl_qbman_portal.h | 1087 +++++++++
  87  drivers/net/dpaa2/rte_eth_dpaa2_pvt.h              |  330 +++
  88  drivers/net/dpaa2/rte_eth_dpbp.c                   |  377 +++
  89  drivers/net/dpaa2/rte_eth_dpio.c                   |  336 +++
  90  drivers/net/dpaa2/rte_eth_dpni.c                   | 2269 +++++++++++++++++
  91  drivers/net/dpaa2/rte_eth_dpni_annot.h             |  310 +++
  92  lib/librte_eal/common/eal_private.h                |    7 +
  93  lib/librte_eal/linuxapp/eal/Makefile               |    4 +
  94  lib/librte_eal/linuxapp/eal/eal.c                  |    5 +
  95  lib/librte_eal/linuxapp/eal/eal_soc.c              |   67 +
  96  lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.c      |  650 +++++
  97  lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.h      |   98 +
  98  lib/librte_mempool/rte_mempool.h                   |    8 +
  99  mk/rte.app.mk                                      |    1 +
 100  83 files changed, 39391 insertions(+), 1 deletion(-)
 101  create mode 100644 drivers/net/dpaa2/Makefile
 102  create mode 100644 drivers/net/dpaa2/dpaa2_logs.h
 103  create mode 100644 drivers/net/dpaa2/mc/dpaiop.c
 104  create mode 100644 drivers/net/dpaa2/mc/dpbp.c
 105  create mode 100644 drivers/net/dpaa2/mc/dpci.c
 106  create mode 100644 drivers/net/dpaa2/mc/dpcon.c
 107  create mode 100644 drivers/net/dpaa2/mc/dpdbg.c
 108  create mode 100644 drivers/net/dpaa2/mc/dpdcei.c
 109  create mode 100644 drivers/net/dpaa2/mc/dpdmai.c
 110  create mode 100644 drivers/net/dpaa2/mc/dpdmux.c
 111  create mode 100644 drivers/net/dpaa2/mc/dpio.c
 112  create mode 100644 drivers/net/dpaa2/mc/dpmac.c
 113  create mode 100644 drivers/net/dpaa2/mc/dpmcp.c
 114  create mode 100644 drivers/net/dpaa2/mc/dpmng.c
 115  create mode 100644 drivers/net/dpaa2/mc/dpni.c
 116  create mode 100644 drivers/net/dpaa2/mc/dprc.c
 117  create mode 100644 drivers/net/dpaa2/mc/dprtc.c
 118  create mode 100644 drivers/net/dpaa2/mc/dpseci.c
 119  create mode 100644 drivers/net/dpaa2/mc/dpsw.c
 120  create mode 100644 drivers/net/dpaa2/mc/fsl_dpaiop.h
 121  create mode 100644 drivers/net/dpaa2/mc/fsl_dpaiop_cmd.h
 122  create mode 100644 drivers/net/dpaa2/mc/fsl_dpbp.h
 123  create mode 100644 drivers/net/dpaa2/mc/fsl_dpbp_cmd.h
 124  create mode 100644 drivers/net/dpaa2/mc/fsl_dpci.h
 125  create mode 100644 drivers/net/dpaa2/mc/fsl_dpci_cmd.h
 126  create mode 100644 drivers/net/dpaa2/mc/fsl_dpcon.h
 127  create mode 100644 drivers/net/dpaa2/mc/fsl_dpcon_cmd.h
 128  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdbg.h
 129  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdbg_cmd.h
 130  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdcei.h
 131  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdcei_cmd.h
 132  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmai.h
 133  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmai_cmd.h
 134  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmux.h
 135  create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
 136  create mode 100644 drivers/net/dpaa2/mc/fsl_dpio.h
 137  create mode 100644 drivers/net/dpaa2/mc/fsl_dpio_cmd.h
 138  create mode 100644 drivers/net/dpaa2/mc/fsl_dpkg.h
 139  create mode 100644 drivers/net/dpaa2/mc/fsl_dpmac.h
 140  create mode 100644 drivers/net/dpaa2/mc/fsl_dpmac_cmd.h
 141  create mode 100644 drivers/net/dpaa2/mc/fsl_dpmcp.h
 142  create mode 100644 drivers/net/dpaa2/mc/fsl_dpmcp_cmd.h
 143  create mode 100644 drivers/net/dpaa2/mc/fsl_dpmng.h
 144  create mode 100644 drivers/net/dpaa2/mc/fsl_dpmng_cmd.h
 145  create mode 100644 drivers/net/dpaa2/mc/fsl_dpni.h
 146  create mode 100644 drivers/net/dpaa2/mc/fsl_dpni_cmd.h
 147  create mode 100644 drivers/net/dpaa2/mc/fsl_dprc.h
 148  create mode 100644 drivers/net/dpaa2/mc/fsl_dprc_cmd.h
 149  create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc.h
 150  create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
 151  create mode 100644 drivers/net/dpaa2/mc/fsl_dpseci.h
 152  create mode 100644 drivers/net/dpaa2/mc/fsl_dpseci_cmd.h
 153  create mode 100644 drivers/net/dpaa2/mc/fsl_dpsw.h
 154  create mode 100644 drivers/net/dpaa2/mc/fsl_dpsw_cmd.h
 155  create mode 100644 drivers/net/dpaa2/mc/fsl_mc_cmd.h
 156  create mode 100644 drivers/net/dpaa2/mc/fsl_mc_sys.h
 157  create mode 100644 drivers/net/dpaa2/mc/fsl_net.h
 158  create mode 100644 drivers/net/dpaa2/mc/mc_sys.c
 159  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_debug.c
 160  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_debug.h
 161  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_portal.c
 162  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_portal.h
 163  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_private.h
 164  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_sys.h
 165  create mode 100644 drivers/net/dpaa2/qbman/driver/qbman_sys_decl.h
 166  create mode 100644 drivers/net/dpaa2/qbman/include/compat.h
 167  create mode 100644 drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_base.h
 168  create mode 100644 drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_portal.h
 169  create mode 100644 drivers/net/dpaa2/rte_eth_dpaa2_pvt.h
 170  create mode 100644 drivers/net/dpaa2/rte_eth_dpbp.c
 171  create mode 100644 drivers/net/dpaa2/rte_eth_dpio.c
 172  create mode 100644 drivers/net/dpaa2/rte_eth_dpni.c
 173  create mode 100644 drivers/net/dpaa2/rte_eth_dpni_annot.h
 174  create mode 100644 lib/librte_eal/linuxapp/eal/eal_soc.c
 175  create mode 100644 lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.c
 176  create mode 100644 lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.h
 177
 178 diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
 179 index 66df54c..e42fa90 100644
 180 --- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
 181 +++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
 182 @@ -1,6 +1,6 @@
 183  #   BSD LICENSE
 184  #
 185 -#   Copyright(c) 2016 Freescale Semiconductor, Inc. All rights reserved.
 186 +#   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
 187  #
 188  #   Redistribution and use in source and binary forms, with or without
 189  #   modification, are permitted provided that the following conditions
 190 @@ -40,3 +40,19 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a57+fp+simd"
 191  #
 192  CONFIG_RTE_MAX_LCORE=8
 193  CONFIG_RTE_MAX_NUMA_NODES=1
 194 +
 195 +CONFIG_RTE_PKTMBUF_HEADROOM=256
 196 +#
 197 +#Kernel KNI component - disable by default to avoid kernel
 198 +#code dependency
 199 +#
 200 +CONFIG_RTE_KNI_KMOD=n
 201 +
 202 +# Compile software PMD backed by FSL DPAA2 files
 203 +#
 204 +CONFIG_RTE_LIBRTE_DPAA2_PMD=y
 205 +CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=n
 206 +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
 207 +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
 208 +CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
 209 +CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
 210 diff --git a/drivers/net/Makefile b/drivers/net/Makefile
 211 index bc93230..a71c14a 100644
 212 --- a/drivers/net/Makefile
 213 +++ b/drivers/net/Makefile
 214 @@ -55,6 +55,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD) += thunderx
 215  DIRS-$(CONFIG_RTE_LIBRTE_VIRTIO_PMD) += virtio
 216  DIRS-$(CONFIG_RTE_LIBRTE_VMXNET3_PMD) += vmxnet3
 217  DIRS-$(CONFIG_RTE_LIBRTE_PMD_XENVIRT) += xenvirt
 218 +DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2
 219
 220  ifeq ($(CONFIG_RTE_LIBRTE_VHOST),y)
 221  DIRS-$(CONFIG_RTE_LIBRTE_PMD_VHOST) += vhost
 222 diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
 223 new file mode 100644
 224 index 0000000..3cf1782
 225 --- /dev/null
 226 +++ b/drivers/net/dpaa2/Makefile
 227 @@ -0,0 +1,102 @@
 228 +#   BSD LICENSE
 229 +#
 230 +#   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
 231 +#
 232 +#   Redistribution and use in source and binary forms, with or without
 233 +#   modification, are permitted provided that the following conditions
 234 +#   are met:
 235 +#
 236 +#     * Redistributions of source code must retain the above copyright
 237 +#       notice, this list of conditions and the following disclaimer.
 238 +#     * Redistributions in binary form must reproduce the above copyright
 239 +#       notice, this list of conditions and the following disclaimer in
 240 +#       the documentation and/or other materials provided with the
 241 +#       distribution.
 242 +#     * Neither the name of Freescale Semiconductor nor the names of its
 243 +#       contributors may be used to endorse or promote products derived
 244 +#       from this software without specific prior written permission.
 245 +#
 246 +#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 247 +#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 248 +#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 249 +#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 250 +#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 251 +#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 252 +#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 253 +#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 254 +#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 255 +#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 256 +#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 257 +
 258 +include $(RTE_SDK)/mk/rte.vars.mk
 259 +
 260 +#
 261 +# library name
 262 +#
 263 +LIB = librte_pmd_dpaa2.a
 264 +
 265 +ifeq ($(CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT),y)
 266 +CFLAGS += -O0 -g
 267 +CFLAGS += "-Wno-error"
 268 +else
 269 +CFLAGS += -O3 -g
 270 +CFLAGS += $(WERROR_FLAGS)
 271 +endif
 272 +CFLAGS +=-Wno-strict-aliasing
 273 +CFLAGS +=-Wno-missing-prototypes
 274 +CFLAGS +=-Wno-missing-declarations
 275 +CFLAGS +=-Wno-unused-function
 276 +
 277 +CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc
 278 +CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/qbman/include
 279 +CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/qbman/include/drivers
 280 +CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/driver/
 281 +CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common/include
 282 +CFLAGS += -I$(RTE_SDK)/lib/librte_ether
 283 +CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
 284 +
 285 +EXPORT_MAP := rte_pmd_dpaa2_version.map
 286 +
 287 +LIBABIVER := 1
 288 +#
 289 +# all source are stored in SRCS-y
 290 +#
 291 +SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += \
 292 +       mc/dprc.c \
 293 +       mc/dprtc.o \
 294 +       mc/dpaiop.c \
 295 +       mc/dpdbg.o \
 296 +       mc/dpdcei.c \
 297 +       mc/dpdmai.c \
 298 +       mc/dpmac.c \
 299 +       mc/dpmcp.c \
 300 +       mc/dpbp.c \
 301 +       mc/dpio.c \
 302 +       mc/dpni.c \
 303 +       mc/dpsw.c \
 304 +       mc/dpci.c \
 305 +       mc/dpcon.c \
 306 +       mc/dpseci.c \
 307 +       mc/dpmng.c \
 308 +       mc/dpdmux.c \
 309 +       mc/mc_sys.c
 310 +
 311 +#
 312 +# all source are stored in SRCS-y
 313 +#
 314 +SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += \
 315 +       qbman/driver/qbman_portal.c \
 316 +       qbman/driver/qbman_debug.c
 317 +
 318 +SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += rte_eth_dpni.c
 319 +SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += rte_eth_dpio.c
 320 +SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += rte_eth_dpbp.c
 321 +
 322 +#
 323 +# Export include files
 324 +#
 325 +SYMLINK-y-include +=
 326 +
 327 +# this lib depends upon:
 328 +DEPDIRS-y += lib/librte_eal
 329 +include $(RTE_SDK)/mk/rte.lib.mk
 330 diff --git a/drivers/net/dpaa2/dpaa2_logs.h b/drivers/net/dpaa2/dpaa2_logs.h
 331 new file mode 100644
 332 index 0000000..534d4b5
 333 --- /dev/null
 334 +++ b/drivers/net/dpaa2/dpaa2_logs.h
 335 @@ -0,0 +1,78 @@
 336 +/*-
 337 + *   BSD LICENSE
 338 + *
 339 + *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
 340 + *
 341 + *   Redistribution and use in source and binary forms, with or without
 342 + *   modification, are permitted provided that the following conditions
 343 + *   are met:
 344 + *
 345 + *     * Redistributions of source code must retain the above copyright
 346 + *       notice, this list of conditions and the following disclaimer.
 347 + *     * Redistributions in binary form must reproduce the above copyright
 348 + *       notice, this list of conditions and the following disclaimer in
 349 + *       the documentation and/or other materials provided with the
 350 + *       distribution.
 351 + *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
 352 + *       contributors may be used to endorse or promote products derived
 353 + *       from this software without specific prior written permission.
 354 + *
 355 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 356 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 357 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 358 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 359 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 360 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 361 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 362 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 363 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 364 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 365 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 366 + */
 367 +
 368 +#ifndef _DPAA2_LOGS_H_
 369 +#define _DPAA2_LOGS_H_
 370 +
 371 +#define PMD_INIT_LOG(level, fmt, args...) \
 372 +       RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ##args)
 373 +
 374 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_INIT
 375 +#define PMD_INIT_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
 376 +#else
 377 +#define PMD_INIT_FUNC_TRACE() do { } while (0)
 378 +#endif
 379 +
 380 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_RX
 381 +#define PMD_RX_LOG(level, fmt, args...) \
 382 +       RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
 383 +#else
 384 +#define PMD_RX_LOG(level, fmt, args...) do { } while (0)
 385 +#endif
 386 +
 387 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_TX
 388 +#define PMD_TX_LOG(level, fmt, args...) \
 389 +       RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
 390 +#else
 391 +#define PMD_TX_LOG(level, fmt, args...) do { } while (0)
 392 +#endif
 393 +
 394 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_TX_FREE
 395 +#define PMD_TX_FREE_LOG(level, fmt, args...) \
 396 +       RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
 397 +#else
 398 +#define PMD_TX_FREE_LOG(level, fmt, args...) do { } while (0)
 399 +#endif
 400 +
 401 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
 402 +#define PMD_DRV_LOG_RAW(level, fmt, args...) \
 403 +       RTE_LOG(level, PMD, "%s(): " fmt, __func__, ## args)
 404 +#else
 405 +#define PMD_DRV_LOG_RAW(level, fmt, args...) do { } while (0)
 406 +#endif
 407 +
 408 +#define PMD_DRV_LOG2(level, fmt, args...) do { } while (0)
 409 +
 410 +#define PMD_DRV_LOG(level, fmt, args...) \
 411 +       PMD_DRV_LOG_RAW(level, fmt "\n", ## args)
 412 +
 413 +#endif /* _DPAA2_LOGS_H_ */
 414 diff --git a/drivers/net/dpaa2/mc/dpaiop.c b/drivers/net/dpaa2/mc/dpaiop.c
 415 new file mode 100644
 416 index 0000000..7c1ecff
 417 --- /dev/null
 418 +++ b/drivers/net/dpaa2/mc/dpaiop.c
 419 @@ -0,0 +1,457 @@
 420 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
 421 + *
 422 + * Redistribution and use in source and binary forms, with or without
 423 + * modification, are permitted provided that the following conditions are met:
 424 + * * Redistributions of source code must retain the above copyright
 425 + * notice, this list of conditions and the following disclaimer.
 426 + * * Redistributions in binary form must reproduce the above copyright
 427 + * notice, this list of conditions and the following disclaimer in the
 428 + * documentation and/or other materials provided with the distribution.
 429 + * * Neither the name of the above-listed copyright holders nor the
 430 + * names of any contributors may be used to endorse or promote products
 431 + * derived from this software without specific prior written permission.
 432 + *
 433 + *
 434 + * ALTERNATIVELY, this software may be distributed under the terms of the
 435 + * GNU General Public License ("GPL") as published by the Free Software
 436 + * Foundation, either version 2 of that License or (at your option) any
 437 + * later version.
 438 + *
 439 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 440 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 441 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 442 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
 443 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 444 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 445 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 446 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 447 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 448 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 449 + * POSSIBILITY OF SUCH DAMAGE.
 450 + */
 451 +#include <fsl_mc_sys.h>
 452 +#include <fsl_mc_cmd.h>
 453 +#include <fsl_dpaiop.h>
 454 +#include <fsl_dpaiop_cmd.h>
 455 +
 456 +int dpaiop_open(struct fsl_mc_io       *mc_io,
 457 +               uint32_t                cmd_flags,
 458 +               int                     dpaiop_id,
 459 +               uint16_t                *token)
 460 +{
 461 +       struct mc_command cmd = { 0 };
 462 +       int err;
 463 +
 464 +       /* prepare command */
 465 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_OPEN,
 466 +                                         cmd_flags,
 467 +                                         0);
 468 +       DPAIOP_CMD_OPEN(cmd, dpaiop_id);
 469 +
 470 +       /* send command to mc*/
 471 +       err = mc_send_command(mc_io, &cmd);
 472 +       if (err)
 473 +               return err;
 474 +
 475 +       /* retrieve response parameters */
 476 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
 477 +
 478 +       return err;
 479 +}
 480 +
 481 +int dpaiop_close(struct fsl_mc_io      *mc_io,
 482 +                uint32_t               cmd_flags,
 483 +                uint16_t               token)
 484 +{
 485 +       struct mc_command cmd = { 0 };
 486 +
 487 +       /* prepare command */
 488 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_CLOSE, cmd_flags,
 489 +                                         token);
 490 +
 491 +       /* send command to mc*/
 492 +       return mc_send_command(mc_io, &cmd);
 493 +}
 494 +
 495 +int dpaiop_create(struct fsl_mc_io             *mc_io,
 496 +                 uint32_t                      cmd_flags,
 497 +                 const struct dpaiop_cfg       *cfg,
 498 +                 uint16_t                      *token)
 499 +{
 500 +       struct mc_command cmd = { 0 };
 501 +       int err;
 502 +
 503 +       (void)(cfg); /* unused */
 504 +
 505 +       /* prepare command */
 506 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_CREATE,
 507 +                                         cmd_flags,
 508 +                                         0);
 509 +       DPAIOP_CMD_CREATE(cmd, cfg);
 510 +
 511 +       /* send command to mc*/
 512 +       err = mc_send_command(mc_io, &cmd);
 513 +       if (err)
 514 +               return err;
 515 +
 516 +       /* retrieve response parameters */
 517 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
 518 +
 519 +       return 0;
 520 +}
 521 +
 522 +int dpaiop_destroy(struct fsl_mc_io    *mc_io,
 523 +                  uint32_t             cmd_flags,
 524 +                  uint16_t             token)
 525 +{
 526 +       struct mc_command cmd = { 0 };
 527 +
 528 +       /* prepare command */
 529 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_DESTROY,
 530 +                                         cmd_flags,
 531 +                                         token);
 532 +
 533 +       /* send command to mc*/
 534 +       return mc_send_command(mc_io, &cmd);
 535 +}
 536 +
 537 +int dpaiop_reset(struct fsl_mc_io *mc_io,
 538 +                uint32_t cmd_flags,
 539 +                uint16_t token)
 540 +{
 541 +       struct mc_command cmd = { 0 };
 542 +
 543 +       /* prepare command */
 544 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_RESET,
 545 +                                         cmd_flags,
 546 +                                         token);
 547 +
 548 +       /* send command to mc*/
 549 +       return mc_send_command(mc_io, &cmd);
 550 +}
 551 +
 552 +int dpaiop_set_irq(struct fsl_mc_io            *mc_io,
 553 +                  uint32_t                     cmd_flags,
 554 +                  uint16_t                     token,
 555 +                  uint8_t                      irq_index,
 556 +                  struct dpaiop_irq_cfg        *irq_cfg)
 557 +{
 558 +       struct mc_command cmd = { 0 };
 559 +
 560 +       /* prepare command */
 561 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_SET_IRQ,
 562 +                                         cmd_flags,
 563 +                                         token);
 564 +
 565 +       DPAIOP_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
 566 +
 567 +       /* send command to mc*/
 568 +       return mc_send_command(mc_io, &cmd);
 569 +}
 570 +
 571 +int dpaiop_get_irq(struct fsl_mc_io            *mc_io,
 572 +                  uint32_t                     cmd_flags,
 573 +                  uint16_t                     token,
 574 +                  uint8_t                      irq_index,
 575 +                  int                          *type,
 576 +                  struct dpaiop_irq_cfg        *irq_cfg)
 577 +{
 578 +       struct mc_command cmd = { 0 };
 579 +       int err;
 580 +
 581 +       /* prepare command */
 582 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_IRQ,
 583 +                                         cmd_flags,
 584 +                                         token);
 585 +
 586 +       DPAIOP_CMD_GET_IRQ(cmd, irq_index);
 587 +
 588 +       /* send command to mc*/
 589 +       err = mc_send_command(mc_io, &cmd);
 590 +       if (err)
 591 +               return err;
 592 +
 593 +       /* retrieve response parameters */
 594 +       DPAIOP_RSP_GET_IRQ(cmd, *type, irq_cfg);
 595 +
 596 +       return 0;
 597 +}
 598 +
 599 +int dpaiop_set_irq_enable(struct fsl_mc_io *mc_io,
 600 +                         uint32_t cmd_flags,
 601 +                         uint16_t token,
 602 +                         uint8_t irq_index,
 603 +                         uint8_t en)
 604 +{
 605 +       struct mc_command cmd = { 0 };
 606 +
 607 +       /* prepare command */
 608 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_SET_IRQ_ENABLE,
 609 +                                         cmd_flags,
 610 +                                         token);
 611 +
 612 +       DPAIOP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
 613 +
 614 +       /* send command to mc*/
 615 +       return mc_send_command(mc_io, &cmd);
 616 +}
 617 +
 618 +int dpaiop_get_irq_enable(struct fsl_mc_io *mc_io,
 619 +                         uint32_t cmd_flags,
 620 +                         uint16_t token,
 621 +                         uint8_t irq_index,
 622 +                         uint8_t *en)
 623 +{
 624 +       struct mc_command cmd = { 0 };
 625 +       int err;
 626 +
 627 +       /* prepare command */
 628 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_IRQ_ENABLE,
 629 +                                         cmd_flags,
 630 +                                         token);
 631 +
 632 +       DPAIOP_CMD_GET_IRQ_ENABLE(cmd, irq_index);
 633 +
 634 +       /* send command to mc*/
 635 +       err = mc_send_command(mc_io, &cmd);
 636 +       if (err)
 637 +               return err;
 638 +
 639 +       /* retrieve response parameters */
 640 +       DPAIOP_RSP_GET_IRQ_ENABLE(cmd, *en);
 641 +
 642 +       return 0;
 643 +}
 644 +
 645 +int dpaiop_set_irq_mask(struct fsl_mc_io *mc_io,
 646 +                       uint32_t cmd_flags,
 647 +                       uint16_t token,
 648 +                       uint8_t irq_index,
 649 +                       uint32_t mask)
 650 +{
 651 +       struct mc_command cmd = { 0 };
 652 +
 653 +       /* prepare command */
 654 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_SET_IRQ_MASK,
 655 +                                         cmd_flags,
 656 +                                         token);
 657 +
 658 +       DPAIOP_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
 659 +
 660 +       /* send command to mc*/
 661 +       return mc_send_command(mc_io, &cmd);
 662 +}
 663 +
 664 +int dpaiop_get_irq_mask(struct fsl_mc_io *mc_io,
 665 +                       uint32_t cmd_flags,
 666 +                       uint16_t token,
 667 +                       uint8_t irq_index,
 668 +                       uint32_t *mask)
 669 +{
 670 +       struct mc_command cmd = { 0 };
 671 +       int err;
 672 +
 673 +       /* prepare command */
 674 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_IRQ_MASK,
 675 +                                         cmd_flags,
 676 +                                         token);
 677 +
 678 +       DPAIOP_CMD_GET_IRQ_MASK(cmd, irq_index);
 679 +
 680 +       /* send command to mc*/
 681 +       err = mc_send_command(mc_io, &cmd);
 682 +       if (err)
 683 +               return err;
 684 +
 685 +       /* retrieve response parameters */
 686 +       DPAIOP_RSP_GET_IRQ_MASK(cmd, *mask);
 687 +
 688 +       return 0;
 689 +}
 690 +
 691 +int dpaiop_get_irq_status(struct fsl_mc_io *mc_io,
 692 +                         uint32_t cmd_flags,
 693 +                         uint16_t token,
 694 +                         uint8_t irq_index,
 695 +                         uint32_t *status)
 696 +{
 697 +       struct mc_command cmd = { 0 };
 698 +       int err;
 699 +
 700 +       /* prepare command */
 701 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_IRQ_STATUS,
 702 +                                         cmd_flags,
 703 +                                         token);
 704 +       DPAIOP_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
 705 +
 706 +       /* send command to mc*/
 707 +       err = mc_send_command(mc_io, &cmd);
 708 +       if (err)
 709 +               return err;
 710 +
 711 +       /* retrieve response parameters */
 712 +       DPAIOP_RSP_GET_IRQ_STATUS(cmd, *status);
 713 +
 714 +       return 0;
 715 +}
 716 +
 717 +int dpaiop_clear_irq_status(struct fsl_mc_io *mc_io,
 718 +                           uint32_t cmd_flags,
 719 +                           uint16_t token,
 720 +                           uint8_t irq_index,
 721 +                           uint32_t status)
 722 +{
 723 +       struct mc_command cmd = { 0 };
 724 +
 725 +       /* prepare command */
 726 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_CLEAR_IRQ_STATUS,
 727 +                                         cmd_flags,
 728 +                                         token);
 729 +       DPAIOP_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
 730 +
 731 +       /* send command to mc*/
 732 +       return mc_send_command(mc_io, &cmd);
 733 +}
 734 +
 735 +int dpaiop_get_attributes(struct fsl_mc_io *mc_io,
 736 +                         uint32_t cmd_flags,
 737 +                         uint16_t token,
 738 +                         struct dpaiop_attr *attr)
 739 +{
 740 +       struct mc_command cmd = { 0 };
 741 +       int err;
 742 +
 743 +       /* prepare command */
 744 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_ATTR,
 745 +                                         cmd_flags,
 746 +                                         token);
 747 +
 748 +       /* send command to mc*/
 749 +       err = mc_send_command(mc_io, &cmd);
 750 +       if (err)
 751 +               return err;
 752 +
 753 +       /* retrieve response parameters */
 754 +       DPAIOP_RSP_GET_ATTRIBUTES(cmd, attr);
 755 +
 756 +       return 0;
 757 +}
 758 +
 759 +int dpaiop_load(struct fsl_mc_io *mc_io,
 760 +               uint32_t cmd_flags,
 761 +               uint16_t token,
 762 +               struct dpaiop_load_cfg *cfg)
 763 +{
 764 +       struct mc_command cmd = { 0 };
 765 +
 766 +       /* prepare command */
 767 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_LOAD,
 768 +                                         cmd_flags,
 769 +                                         token);
 770 +       DPAIOP_CMD_LOAD(cmd, cfg);
 771 +
 772 +       /* send command to mc*/
 773 +       return mc_send_command(mc_io, &cmd);
 774 +}
 775 +
 776 +int dpaiop_run(struct fsl_mc_io *mc_io,
 777 +              uint32_t cmd_flags,
 778 +              uint16_t token,
 779 +              const struct dpaiop_run_cfg *cfg)
 780 +{
 781 +       struct mc_command cmd = { 0 };
 782 +
 783 +       /* prepare command */
 784 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_RUN,
 785 +                                         cmd_flags,
 786 +                                         token);
 787 +       DPAIOP_CMD_RUN(cmd, cfg);
 788 +
 789 +       /* send command to mc*/
 790 +       return mc_send_command(mc_io, &cmd);
 791 +}
 792 +
 793 +int dpaiop_get_sl_version(struct fsl_mc_io             *mc_io,
 794 +                         uint32_t                      cmd_flags,
 795 +                         uint16_t                      token,
 796 +                         struct dpaiop_sl_version      *version)
 797 +{
 798 +       struct mc_command cmd = { 0 };
 799 +       int err;
 800 +
 801 +       /* prepare command */
 802 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_SL_VERSION,
 803 +                                         cmd_flags,
 804 +                                         token);
 805 +
 806 +       /* send command to mc*/
 807 +       err = mc_send_command(mc_io, &cmd);
 808 +       if (err)
 809 +               return err;
 810 +
 811 +       /* retrieve response parameters */
 812 +       DPAIOP_RSP_GET_SL_VERSION(cmd, version);
 813 +
 814 +       return 0;
 815 +}
 816 +
 817 +int dpaiop_get_state(struct fsl_mc_io  *mc_io,
 818 +                    uint32_t           cmd_flags,
 819 +                    uint16_t           token,
 820 +                    uint32_t           *state)
 821 +{
 822 +       struct mc_command cmd = { 0 };
 823 +       int err;
 824 +
 825 +       /* prepare command */
 826 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_STATE,
 827 +                                         cmd_flags,
 828 +                                         token);
 829 +
 830 +       /* send command to mc*/
 831 +       err = mc_send_command(mc_io, &cmd);
 832 +       if (err)
 833 +               return err;
 834 +
 835 +       /* retrieve response parameters */
 836 +       DPAIOP_RSP_GET_STATE(cmd, *state);
 837 +
 838 +       return 0;
 839 +}
 840 +
 841 +int dpaiop_set_time_of_day(struct fsl_mc_io *mc_io,
 842 +                          uint32_t cmd_flags,
 843 +                          uint16_t token,
 844 +                          uint64_t time_of_day)
 845 +{
 846 +       struct mc_command cmd = { 0 };
 847 +
 848 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_SET_TIME_OF_DAY,
 849 +                                       cmd_flags,
 850 +                                       token);
 851 +
 852 +       DPAIOP_CMD_SET_TIME_OF_DAY(cmd, time_of_day);
 853 +
 854 +       return mc_send_command(mc_io, &cmd);
 855 +}
 856 +
 857 +int dpaiop_get_time_of_day(struct fsl_mc_io *mc_io,
 858 +                          uint32_t cmd_flags,
 859 +                          uint16_t token,
 860 +                          uint64_t *time_of_day)
 861 +{
 862 +       struct mc_command cmd = { 0 };
 863 +       int err;
 864 +
 865 +       cmd.header = mc_encode_cmd_header(DPAIOP_CMDID_GET_TIME_OF_DAY,
 866 +                                       cmd_flags,
 867 +                                       token);
 868 +
 869 +       err = mc_send_command(mc_io, &cmd);
 870 +       if (err)
 871 +               return err;
 872 +
 873 +       DPAIOP_RSP_GET_TIME_OF_DAY(cmd, *time_of_day);
 874 +
 875 +       return 0;
 876 +}
 877 diff --git a/drivers/net/dpaa2/mc/dpbp.c b/drivers/net/dpaa2/mc/dpbp.c
 878 new file mode 100644
 879 index 0000000..87899b8
 880 --- /dev/null
 881 +++ b/drivers/net/dpaa2/mc/dpbp.c
 882 @@ -0,0 +1,432 @@
 883 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
 884 + *
 885 + * Redistribution and use in source and binary forms, with or without
 886 + * modification, are permitted provided that the following conditions are met:
 887 + * * Redistributions of source code must retain the above copyright
 888 + * notice, this list of conditions and the following disclaimer.
 889 + * * Redistributions in binary form must reproduce the above copyright
 890 + * notice, this list of conditions and the following disclaimer in the
 891 + * documentation and/or other materials provided with the distribution.
 892 + * * Neither the name of the above-listed copyright holders nor the
 893 + * names of any contributors may be used to endorse or promote products
 894 + * derived from this software without specific prior written permission.
 895 + *
 896 + *
 897 + * ALTERNATIVELY, this software may be distributed under the terms of the
 898 + * GNU General Public License ("GPL") as published by the Free Software
 899 + * Foundation, either version 2 of that License or (at your option) any
 900 + * later version.
 901 + *
 902 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 903 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 904 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 905 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
 906 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 907 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 908 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 909 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 910 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 911 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 912 + * POSSIBILITY OF SUCH DAMAGE.
 913 + */
 914 +#include <fsl_mc_sys.h>
 915 +#include <fsl_mc_cmd.h>
 916 +#include <fsl_dpbp.h>
 917 +#include <fsl_dpbp_cmd.h>
 918 +
 919 +int dpbp_open(struct fsl_mc_io *mc_io,
 920 +             uint32_t cmd_flags,
 921 +             int dpbp_id,
 922 +             uint16_t *token)
 923 +{
 924 +       struct mc_command cmd = { 0 };
 925 +       int err;
 926 +
 927 +       /* prepare command */
 928 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_OPEN,
 929 +                                         cmd_flags,
 930 +                                         0);
 931 +       DPBP_CMD_OPEN(cmd, dpbp_id);
 932 +
 933 +       /* send command to mc*/
 934 +       err = mc_send_command(mc_io, &cmd);
 935 +       if (err)
 936 +               return err;
 937 +
 938 +       /* retrieve response parameters */
 939 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
 940 +
 941 +       return err;
 942 +}
 943 +
 944 +int dpbp_close(struct fsl_mc_io *mc_io,
 945 +              uint32_t cmd_flags,
 946 +              uint16_t token)
 947 +{
 948 +       struct mc_command cmd = { 0 };
 949 +
 950 +       /* prepare command */
 951 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLOSE, cmd_flags,
 952 +                                         token);
 953 +
 954 +       /* send command to mc*/
 955 +       return mc_send_command(mc_io, &cmd);
 956 +}
 957 +
 958 +int dpbp_create(struct fsl_mc_io *mc_io,
 959 +               uint32_t cmd_flags,
 960 +               const struct dpbp_cfg *cfg,
 961 +               uint16_t *token)
 962 +{
 963 +       struct mc_command cmd = { 0 };
 964 +       int err;
 965 +
 966 +       (void)(cfg); /* unused */
 967 +
 968 +       /* prepare command */
 969 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_CREATE,
 970 +                                         cmd_flags,
 971 +                                         0);
 972 +
 973 +       /* send command to mc*/
 974 +       err = mc_send_command(mc_io, &cmd);
 975 +       if (err)
 976 +               return err;
 977 +
 978 +       /* retrieve response parameters */
 979 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
 980 +
 981 +       return 0;
 982 +}
 983 +
 984 +int dpbp_destroy(struct fsl_mc_io *mc_io,
 985 +                uint32_t cmd_flags,
 986 +                uint16_t token)
 987 +{
 988 +       struct mc_command cmd = { 0 };
 989 +
 990 +       /* prepare command */
 991 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_DESTROY,
 992 +                                         cmd_flags,
 993 +                                         token);
 994 +
 995 +       /* send command to mc*/
 996 +       return mc_send_command(mc_io, &cmd);
 997 +}
 998 +
 999 +int dpbp_enable(struct fsl_mc_io *mc_io,
1000 +               uint32_t cmd_flags,
1001 +               uint16_t token)
1002 +{
1003 +       struct mc_command cmd = { 0 };
1004 +
1005 +       /* prepare command */
1006 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_ENABLE, cmd_flags,
1007 +                                         token);
1008 +
1009 +       /* send command to mc*/
1010 +       return mc_send_command(mc_io, &cmd);
1011 +}
1012 +
1013 +int dpbp_disable(struct fsl_mc_io *mc_io,
1014 +                uint32_t cmd_flags,
1015 +                uint16_t token)
1016 +{
1017 +       struct mc_command cmd = { 0 };
1018 +
1019 +       /* prepare command */
1020 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_DISABLE,
1021 +                                         cmd_flags,
1022 +                                         token);
1023 +
1024 +       /* send command to mc*/
1025 +       return mc_send_command(mc_io, &cmd);
1026 +}
1027 +
1028 +int dpbp_is_enabled(struct fsl_mc_io *mc_io,
1029 +                   uint32_t cmd_flags,
1030 +                   uint16_t token,
1031 +                   int *en)
1032 +{
1033 +       struct mc_command cmd = { 0 };
1034 +       int err;
1035 +       /* prepare command */
1036 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_IS_ENABLED, cmd_flags,
1037 +                                         token);
1038 +
1039 +       /* send command to mc*/
1040 +       err = mc_send_command(mc_io, &cmd);
1041 +       if (err)
1042 +               return err;
1043 +
1044 +       /* retrieve response parameters */
1045 +       DPBP_RSP_IS_ENABLED(cmd, *en);
1046 +
1047 +       return 0;
1048 +}
1049 +
1050 +int dpbp_reset(struct fsl_mc_io *mc_io,
1051 +              uint32_t cmd_flags,
1052 +              uint16_t token)
1053 +{
1054 +       struct mc_command cmd = { 0 };
1055 +
1056 +       /* prepare command */
1057 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_RESET,
1058 +                                         cmd_flags,
1059 +                                         token);
1060 +
1061 +       /* send command to mc*/
1062 +       return mc_send_command(mc_io, &cmd);
1063 +}
1064 +
1065 +int dpbp_set_irq(struct fsl_mc_io      *mc_io,
1066 +                uint32_t               cmd_flags,
1067 +                uint16_t               token,
1068 +                uint8_t                irq_index,
1069 +                struct dpbp_irq_cfg    *irq_cfg)
1070 +{
1071 +       struct mc_command cmd = { 0 };
1072 +
1073 +       /* prepare command */
1074 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ,
1075 +                                         cmd_flags,
1076 +                                         token);
1077 +
1078 +       DPBP_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
1079 +
1080 +       /* send command to mc*/
1081 +       return mc_send_command(mc_io, &cmd);
1082 +}
1083 +
1084 +int dpbp_get_irq(struct fsl_mc_io      *mc_io,
1085 +                uint32_t               cmd_flags,
1086 +                uint16_t               token,
1087 +                uint8_t                irq_index,
1088 +                int                    *type,
1089 +                struct dpbp_irq_cfg    *irq_cfg)
1090 +{
1091 +       struct mc_command cmd = { 0 };
1092 +       int err;
1093 +
1094 +       /* prepare command */
1095 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ,
1096 +                                         cmd_flags,
1097 +                                         token);
1098 +
1099 +       DPBP_CMD_GET_IRQ(cmd, irq_index);
1100 +
1101 +       /* send command to mc*/
1102 +       err = mc_send_command(mc_io, &cmd);
1103 +       if (err)
1104 +               return err;
1105 +
1106 +       /* retrieve response parameters */
1107 +       DPBP_RSP_GET_IRQ(cmd, *type, irq_cfg);
1108 +
1109 +       return 0;
1110 +}
1111 +
1112 +int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
1113 +                       uint32_t cmd_flags,
1114 +                       uint16_t token,
1115 +                       uint8_t irq_index,
1116 +                       uint8_t en)
1117 +{
1118 +       struct mc_command cmd = { 0 };
1119 +
1120 +       /* prepare command */
1121 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_ENABLE,
1122 +                                         cmd_flags,
1123 +                                         token);
1124 +
1125 +       DPBP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
1126 +
1127 +       /* send command to mc*/
1128 +       return mc_send_command(mc_io, &cmd);
1129 +}
1130 +
1131 +int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
1132 +                       uint32_t cmd_flags,
1133 +                       uint16_t token,
1134 +                       uint8_t irq_index,
1135 +                       uint8_t *en)
1136 +{
1137 +       struct mc_command cmd = { 0 };
1138 +       int err;
1139 +
1140 +       /* prepare command */
1141 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_ENABLE,
1142 +                                         cmd_flags,
1143 +                                         token);
1144 +
1145 +       DPBP_CMD_GET_IRQ_ENABLE(cmd, irq_index);
1146 +
1147 +       /* send command to mc*/
1148 +       err = mc_send_command(mc_io, &cmd);
1149 +       if (err)
1150 +               return err;
1151 +
1152 +       /* retrieve response parameters */
1153 +       DPBP_RSP_GET_IRQ_ENABLE(cmd, *en);
1154 +
1155 +       return 0;
1156 +}
1157 +
1158 +int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
1159 +                     uint32_t cmd_flags,
1160 +                     uint16_t token,
1161 +                     uint8_t irq_index,
1162 +                     uint32_t mask)
1163 +{
1164 +       struct mc_command cmd = { 0 };
1165 +
1166 +       /* prepare command */
1167 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_MASK,
1168 +                                         cmd_flags,
1169 +                                         token);
1170 +
1171 +       DPBP_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
1172 +
1173 +       /* send command to mc*/
1174 +       return mc_send_command(mc_io, &cmd);
1175 +}
1176 +
1177 +int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
1178 +                     uint32_t cmd_flags,
1179 +                     uint16_t token,
1180 +                     uint8_t irq_index,
1181 +                     uint32_t *mask)
1182 +{
1183 +       struct mc_command cmd = { 0 };
1184 +       int err;
1185 +
1186 +       /* prepare command */
1187 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_MASK,
1188 +                                         cmd_flags,
1189 +                                         token);
1190 +
1191 +       DPBP_CMD_GET_IRQ_MASK(cmd, irq_index);
1192 +
1193 +       /* send command to mc*/
1194 +       err = mc_send_command(mc_io, &cmd);
1195 +       if (err)
1196 +               return err;
1197 +
1198 +       /* retrieve response parameters */
1199 +       DPBP_RSP_GET_IRQ_MASK(cmd, *mask);
1200 +
1201 +       return 0;
1202 +}
1203 +
1204 +int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
1205 +                       uint32_t cmd_flags,
1206 +                       uint16_t token,
1207 +                       uint8_t irq_index,
1208 +                       uint32_t *status)
1209 +{
1210 +       struct mc_command cmd = { 0 };
1211 +       int err;
1212 +
1213 +       /* prepare command */
1214 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_STATUS,
1215 +                                         cmd_flags,
1216 +                                         token);
1217 +
1218 +       DPBP_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
1219 +
1220 +       /* send command to mc*/
1221 +       err = mc_send_command(mc_io, &cmd);
1222 +       if (err)
1223 +               return err;
1224 +
1225 +       /* retrieve response parameters */
1226 +       DPBP_RSP_GET_IRQ_STATUS(cmd, *status);
1227 +
1228 +       return 0;
1229 +}
1230 +
1231 +int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
1232 +                         uint32_t cmd_flags,
1233 +                         uint16_t token,
1234 +                         uint8_t irq_index,
1235 +                         uint32_t status)
1236 +{
1237 +       struct mc_command cmd = { 0 };
1238 +
1239 +       /* prepare command */
1240 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLEAR_IRQ_STATUS,
1241 +                                         cmd_flags,
1242 +                                         token);
1243 +
1244 +       DPBP_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
1245 +
1246 +       /* send command to mc*/
1247 +       return mc_send_command(mc_io, &cmd);
1248 +}
1249 +
1250 +int dpbp_get_attributes(struct fsl_mc_io *mc_io,
1251 +                       uint32_t cmd_flags,
1252 +                       uint16_t token,
1253 +                       struct dpbp_attr *attr)
1254 +{
1255 +       struct mc_command cmd = { 0 };
1256 +       int err;
1257 +
1258 +       /* prepare command */
1259 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_ATTR,
1260 +                                         cmd_flags,
1261 +                                         token);
1262 +
1263 +       /* send command to mc*/
1264 +       err = mc_send_command(mc_io, &cmd);
1265 +       if (err)
1266 +               return err;
1267 +
1268 +       /* retrieve response parameters */
1269 +       DPBP_RSP_GET_ATTRIBUTES(cmd, attr);
1270 +
1271 +       return 0;
1272 +}
1273 +
1274 +int dpbp_set_notifications(struct fsl_mc_io    *mc_io,
1275 +                          uint32_t             cmd_flags,
1276 +                          uint16_t             token,
1277 +                          struct dpbp_notification_cfg *cfg)
1278 +{
1279 +       struct mc_command cmd = { 0 };
1280 +
1281 +       /* prepare command */
1282 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_NOTIFICATIONS,
1283 +                                         cmd_flags,
1284 +                                         token);
1285 +
1286 +       DPBP_CMD_SET_NOTIFICATIONS(cmd, cfg);
1287 +
1288 +       /* send command to mc*/
1289 +       return mc_send_command(mc_io, &cmd);
1290 +}
1291 +
1292 +int dpbp_get_notifications(struct fsl_mc_io    *mc_io,
1293 +                          uint32_t             cmd_flags,
1294 +                             uint16_t          token,
1295 +                             struct dpbp_notification_cfg      *cfg)
1296 +{
1297 +       struct mc_command cmd = { 0 };
1298 +       int err;
1299 +
1300 +       /* prepare command */
1301 +       cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_NOTIFICATIONS,
1302 +                                         cmd_flags,
1303 +                                         token);
1304 +
1305 +       /* send command to mc*/
1306 +       err = mc_send_command(mc_io, &cmd);
1307 +       if (err)
1308 +               return err;
1309 +
1310 +       /* retrieve response parameters */
1311 +       DPBP_CMD_GET_NOTIFICATIONS(cmd, cfg);
1312 +
1313 +       return 0;
1314 +}
1315 diff --git a/drivers/net/dpaa2/mc/dpci.c b/drivers/net/dpaa2/mc/dpci.c
1316 new file mode 100644
1317 index 0000000..2ec02a1
1318 --- /dev/null
1319 +++ b/drivers/net/dpaa2/mc/dpci.c
1320 @@ -0,0 +1,501 @@
1321 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
1322 + *
1323 + * Redistribution and use in source and binary forms, with or without
1324 + * modification, are permitted provided that the following conditions are met:
1325 + * * Redistributions of source code must retain the above copyright
1326 + * notice, this list of conditions and the following disclaimer.
1327 + * * Redistributions in binary form must reproduce the above copyright
1328 + * notice, this list of conditions and the following disclaimer in the
1329 + * documentation and/or other materials provided with the distribution.
1330 + * * Neither the name of the above-listed copyright holders nor the
1331 + * names of any contributors may be used to endorse or promote products
1332 + * derived from this software without specific prior written permission.
1333 + *
1334 + *
1335 + * ALTERNATIVELY, this software may be distributed under the terms of the
1336 + * GNU General Public License ("GPL") as published by the Free Software
1337 + * Foundation, either version 2 of that License or (at your option) any
1338 + * later version.
1339 + *
1340 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1341 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1342 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1343 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1344 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1345 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1346 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1347 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1348 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1349 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1350 + * POSSIBILITY OF SUCH DAMAGE.
1351 + */
1352 +#include <fsl_mc_sys.h>
1353 +#include <fsl_mc_cmd.h>
1354 +#include <fsl_dpci.h>
1355 +#include <fsl_dpci_cmd.h>
1356 +
1357 +int dpci_open(struct fsl_mc_io *mc_io,
1358 +             uint32_t cmd_flags,
1359 +             int dpci_id,
1360 +             uint16_t *token)
1361 +{
1362 +       struct mc_command cmd = { 0 };
1363 +       int err;
1364 +
1365 +       /* prepare command */
1366 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_OPEN,
1367 +                                         cmd_flags,
1368 +                                         0);
1369 +       DPCI_CMD_OPEN(cmd, dpci_id);
1370 +
1371 +       /* send command to mc*/
1372 +       err = mc_send_command(mc_io, &cmd);
1373 +       if (err)
1374 +               return err;
1375 +
1376 +       /* retrieve response parameters */
1377 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
1378 +
1379 +       return 0;
1380 +}
1381 +
1382 +int dpci_close(struct fsl_mc_io *mc_io,
1383 +              uint32_t cmd_flags,
1384 +              uint16_t token)
1385 +{
1386 +       struct mc_command cmd = { 0 };
1387 +
1388 +       /* prepare command */
1389 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_CLOSE,
1390 +                                         cmd_flags,
1391 +                                         token);
1392 +
1393 +       /* send command to mc*/
1394 +       return mc_send_command(mc_io, &cmd);
1395 +}
1396 +
1397 +int dpci_create(struct fsl_mc_io *mc_io,
1398 +               uint32_t cmd_flags,
1399 +               const struct dpci_cfg *cfg,
1400 +               uint16_t *token)
1401 +{
1402 +       struct mc_command cmd = { 0 };
1403 +       int err;
1404 +
1405 +       /* prepare command */
1406 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_CREATE,
1407 +                                         cmd_flags,
1408 +                                         0);
1409 +       DPCI_CMD_CREATE(cmd, cfg);
1410 +
1411 +       /* send command to mc*/
1412 +       err = mc_send_command(mc_io, &cmd);
1413 +       if (err)
1414 +               return err;
1415 +
1416 +       /* retrieve response parameters */
1417 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
1418 +
1419 +       return 0;
1420 +}
1421 +
1422 +int dpci_destroy(struct fsl_mc_io *mc_io,
1423 +                uint32_t cmd_flags,
1424 +                uint16_t token)
1425 +{
1426 +       struct mc_command cmd = { 0 };
1427 +
1428 +       /* prepare command */
1429 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_DESTROY,
1430 +                                         cmd_flags,
1431 +                                         token);
1432 +
1433 +       /* send command to mc*/
1434 +       return mc_send_command(mc_io, &cmd);
1435 +}
1436 +
1437 +int dpci_enable(struct fsl_mc_io *mc_io,
1438 +               uint32_t cmd_flags,
1439 +               uint16_t token)
1440 +{
1441 +       struct mc_command cmd = { 0 };
1442 +
1443 +       /* prepare command */
1444 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_ENABLE,
1445 +                                         cmd_flags,
1446 +                                         token);
1447 +
1448 +       /* send command to mc*/
1449 +       return mc_send_command(mc_io, &cmd);
1450 +}
1451 +
1452 +int dpci_disable(struct fsl_mc_io *mc_io,
1453 +                uint32_t cmd_flags,
1454 +                uint16_t token)
1455 +{
1456 +       struct mc_command cmd = { 0 };
1457 +
1458 +       /* prepare command */
1459 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_DISABLE,
1460 +                                         cmd_flags,
1461 +                                         token);
1462 +
1463 +       /* send command to mc*/
1464 +       return mc_send_command(mc_io, &cmd);
1465 +}
1466 +
1467 +int dpci_is_enabled(struct fsl_mc_io *mc_io,
1468 +                   uint32_t cmd_flags,
1469 +                   uint16_t token,
1470 +                   int *en)
1471 +{
1472 +       struct mc_command cmd = { 0 };
1473 +       int err;
1474 +       /* prepare command */
1475 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_IS_ENABLED, cmd_flags,
1476 +                                         token);
1477 +
1478 +       /* send command to mc*/
1479 +       err = mc_send_command(mc_io, &cmd);
1480 +       if (err)
1481 +               return err;
1482 +
1483 +       /* retrieve response parameters */
1484 +       DPCI_RSP_IS_ENABLED(cmd, *en);
1485 +
1486 +       return 0;
1487 +}
1488 +
1489 +int dpci_reset(struct fsl_mc_io *mc_io,
1490 +              uint32_t cmd_flags,
1491 +              uint16_t token)
1492 +{
1493 +       struct mc_command cmd = { 0 };
1494 +
1495 +       /* prepare command */
1496 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_RESET,
1497 +                                         cmd_flags,
1498 +                                         token);
1499 +
1500 +       /* send command to mc*/
1501 +       return mc_send_command(mc_io, &cmd);
1502 +}
1503 +
1504 +int dpci_set_irq(struct fsl_mc_io *mc_io,
1505 +                uint32_t cmd_flags,
1506 +                uint16_t               token,
1507 +                uint8_t                irq_index,
1508 +                struct dpci_irq_cfg    *irq_cfg)
1509 +{
1510 +       struct mc_command cmd = { 0 };
1511 +
1512 +       /* prepare command */
1513 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_SET_IRQ,
1514 +                                         cmd_flags,
1515 +                                         token);
1516 +       DPCI_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
1517 +
1518 +       /* send command to mc*/
1519 +       return mc_send_command(mc_io, &cmd);
1520 +}
1521 +
1522 +int dpci_get_irq(struct fsl_mc_io *mc_io,
1523 +                uint32_t cmd_flags,
1524 +                uint16_t               token,
1525 +                uint8_t                irq_index,
1526 +                int                    *type,
1527 +                struct dpci_irq_cfg    *irq_cfg)
1528 +{
1529 +       struct mc_command cmd = { 0 };
1530 +       int err;
1531 +
1532 +       /* prepare command */
1533 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_IRQ,
1534 +                                         cmd_flags,
1535 +                                         token);
1536 +       DPCI_CMD_GET_IRQ(cmd, irq_index);
1537 +
1538 +       /* send command to mc*/
1539 +       err = mc_send_command(mc_io, &cmd);
1540 +       if (err)
1541 +               return err;
1542 +
1543 +       /* retrieve response parameters */
1544 +       DPCI_RSP_GET_IRQ(cmd, *type, irq_cfg);
1545 +
1546 +       return 0;
1547 +}
1548 +
1549 +int dpci_set_irq_enable(struct fsl_mc_io *mc_io,
1550 +                       uint32_t cmd_flags,
1551 +                       uint16_t token,
1552 +                       uint8_t irq_index,
1553 +                       uint8_t en)
1554 +{
1555 +       struct mc_command cmd = { 0 };
1556 +
1557 +       /* prepare command */
1558 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_SET_IRQ_ENABLE,
1559 +                                         cmd_flags,
1560 +                                         token);
1561 +       DPCI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
1562 +
1563 +       /* send command to mc*/
1564 +       return mc_send_command(mc_io, &cmd);
1565 +}
1566 +
1567 +int dpci_get_irq_enable(struct fsl_mc_io *mc_io,
1568 +                       uint32_t cmd_flags,
1569 +                       uint16_t token,
1570 +                       uint8_t irq_index,
1571 +                       uint8_t *en)
1572 +{
1573 +       struct mc_command cmd = { 0 };
1574 +       int err;
1575 +
1576 +       /* prepare command */
1577 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_IRQ_ENABLE,
1578 +                                         cmd_flags,
1579 +                                         token);
1580 +       DPCI_CMD_GET_IRQ_ENABLE(cmd, irq_index);
1581 +
1582 +       /* send command to mc*/
1583 +       err = mc_send_command(mc_io, &cmd);
1584 +       if (err)
1585 +               return err;
1586 +
1587 +       /* retrieve response parameters */
1588 +       DPCI_RSP_GET_IRQ_ENABLE(cmd, *en);
1589 +
1590 +       return 0;
1591 +}
1592 +
1593 +int dpci_set_irq_mask(struct fsl_mc_io *mc_io,
1594 +                     uint32_t cmd_flags,
1595 +                     uint16_t token,
1596 +                     uint8_t irq_index,
1597 +                     uint32_t mask)
1598 +{
1599 +       struct mc_command cmd = { 0 };
1600 +
1601 +       /* prepare command */
1602 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_SET_IRQ_MASK,
1603 +                                         cmd_flags,
1604 +                                         token);
1605 +       DPCI_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
1606 +
1607 +       /* send command to mc*/
1608 +       return mc_send_command(mc_io, &cmd);
1609 +}
1610 +
1611 +int dpci_get_irq_mask(struct fsl_mc_io *mc_io,
1612 +                     uint32_t cmd_flags,
1613 +                     uint16_t token,
1614 +                     uint8_t irq_index,
1615 +                     uint32_t *mask)
1616 +{
1617 +       struct mc_command cmd = { 0 };
1618 +       int err;
1619 +
1620 +       /* prepare command */
1621 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_IRQ_MASK,
1622 +                                         cmd_flags,
1623 +                                         token);
1624 +       DPCI_CMD_GET_IRQ_MASK(cmd, irq_index);
1625 +
1626 +       /* send command to mc*/
1627 +       err = mc_send_command(mc_io, &cmd);
1628 +       if (err)
1629 +               return err;
1630 +
1631 +       /* retrieve response parameters */
1632 +       DPCI_RSP_GET_IRQ_MASK(cmd, *mask);
1633 +
1634 +       return 0;
1635 +}
1636 +
1637 +int dpci_get_irq_status(struct fsl_mc_io *mc_io,
1638 +                       uint32_t cmd_flags,
1639 +                       uint16_t token,
1640 +                       uint8_t irq_index,
1641 +                       uint32_t *status)
1642 +{
1643 +       struct mc_command cmd = { 0 };
1644 +       int err;
1645 +
1646 +       /* prepare command */
1647 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_IRQ_STATUS,
1648 +                                         cmd_flags,
1649 +                                         token);
1650 +       DPCI_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
1651 +
1652 +       /* send command to mc*/
1653 +       err = mc_send_command(mc_io, &cmd);
1654 +       if (err)
1655 +               return err;
1656 +
1657 +       /* retrieve response parameters */
1658 +       DPCI_RSP_GET_IRQ_STATUS(cmd, *status);
1659 +
1660 +       return 0;
1661 +}
1662 +
1663 +int dpci_clear_irq_status(struct fsl_mc_io *mc_io,
1664 +                         uint32_t cmd_flags,
1665 +                         uint16_t token,
1666 +                         uint8_t irq_index,
1667 +                         uint32_t status)
1668 +{
1669 +       struct mc_command cmd = { 0 };
1670 +
1671 +       /* prepare command */
1672 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_CLEAR_IRQ_STATUS,
1673 +                                         cmd_flags,
1674 +                                         token);
1675 +       DPCI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
1676 +
1677 +       /* send command to mc*/
1678 +       return mc_send_command(mc_io, &cmd);
1679 +}
1680 +
1681 +int dpci_get_attributes(struct fsl_mc_io *mc_io,
1682 +                       uint32_t cmd_flags,
1683 +                       uint16_t token,
1684 +                       struct dpci_attr *attr)
1685 +{
1686 +       struct mc_command cmd = { 0 };
1687 +       int err;
1688 +
1689 +       /* prepare command */
1690 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_ATTR,
1691 +                                         cmd_flags,
1692 +                                         token);
1693 +
1694 +       /* send command to mc*/
1695 +       err = mc_send_command(mc_io, &cmd);
1696 +       if (err)
1697 +               return err;
1698 +
1699 +       /* retrieve response parameters */
1700 +       DPCI_RSP_GET_ATTR(cmd, attr);
1701 +
1702 +       return 0;
1703 +}
1704 +
1705 +int dpci_get_peer_attributes(struct fsl_mc_io *mc_io,
1706 +                            uint32_t cmd_flags,
1707 +                            uint16_t token,
1708 +                            struct dpci_peer_attr *attr)
1709 +{
1710 +       struct mc_command cmd = { 0 };
1711 +       int err;
1712 +
1713 +       /* prepare command */
1714 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_PEER_ATTR,
1715 +                                         cmd_flags,
1716 +                                         token);
1717 +
1718 +       /* send command to mc*/
1719 +       err = mc_send_command(mc_io, &cmd);
1720 +       if (err)
1721 +               return err;
1722 +
1723 +       /* retrieve response parameters */
1724 +       DPCI_RSP_GET_PEER_ATTR(cmd, attr);
1725 +
1726 +       return 0;
1727 +}
1728 +
1729 +int dpci_get_link_state(struct fsl_mc_io *mc_io,
1730 +                       uint32_t cmd_flags,
1731 +                       uint16_t token,
1732 +                       int *up)
1733 +{
1734 +       struct mc_command cmd = { 0 };
1735 +       int err;
1736 +
1737 +       /* prepare command */
1738 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_LINK_STATE,
1739 +                                         cmd_flags,
1740 +                                         token);
1741 +
1742 +       /* send command to mc*/
1743 +       err = mc_send_command(mc_io, &cmd);
1744 +       if (err)
1745 +               return err;
1746 +
1747 +       /* retrieve response parameters */
1748 +       DPCI_RSP_GET_LINK_STATE(cmd, *up);
1749 +
1750 +       return 0;
1751 +}
1752 +
1753 +int dpci_set_rx_queue(struct fsl_mc_io *mc_io,
1754 +                     uint32_t cmd_flags,
1755 +                     uint16_t token,
1756 +                     uint8_t priority,
1757 +                     const struct dpci_rx_queue_cfg *cfg)
1758 +{
1759 +       struct mc_command cmd = { 0 };
1760 +
1761 +       /* prepare command */
1762 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_SET_RX_QUEUE,
1763 +                                         cmd_flags,
1764 +                                         token);
1765 +       DPCI_CMD_SET_RX_QUEUE(cmd, priority, cfg);
1766 +
1767 +       /* send command to mc*/
1768 +       return mc_send_command(mc_io, &cmd);
1769 +}
1770 +
1771 +int dpci_get_rx_queue(struct fsl_mc_io *mc_io,
1772 +                     uint32_t cmd_flags,
1773 +                     uint16_t token,
1774 +                     uint8_t priority,
1775 +                     struct dpci_rx_queue_attr *attr)
1776 +{
1777 +       struct mc_command cmd = { 0 };
1778 +       int err;
1779 +
1780 +       /* prepare command */
1781 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_RX_QUEUE,
1782 +                                         cmd_flags,
1783 +                                         token);
1784 +       DPCI_CMD_GET_RX_QUEUE(cmd, priority);
1785 +
1786 +       /* send command to mc*/
1787 +       err = mc_send_command(mc_io, &cmd);
1788 +       if (err)
1789 +               return err;
1790 +
1791 +       /* retrieve response parameters */
1792 +       DPCI_RSP_GET_RX_QUEUE(cmd, attr);
1793 +
1794 +       return 0;
1795 +}
1796 +
1797 +int dpci_get_tx_queue(struct fsl_mc_io *mc_io,
1798 +                     uint32_t cmd_flags,
1799 +                     uint16_t token,
1800 +                     uint8_t priority,
1801 +                     struct dpci_tx_queue_attr *attr)
1802 +{
1803 +       struct mc_command cmd = { 0 };
1804 +       int err;
1805 +
1806 +       /* prepare command */
1807 +       cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_TX_QUEUE,
1808 +                                         cmd_flags,
1809 +                                         token);
1810 +       DPCI_CMD_GET_TX_QUEUE(cmd, priority);
1811 +
1812 +       /* send command to mc*/
1813 +       err = mc_send_command(mc_io, &cmd);
1814 +       if (err)
1815 +               return err;
1816 +
1817 +       /* retrieve response parameters */
1818 +       DPCI_RSP_GET_TX_QUEUE(cmd, attr);
1819 +
1820 +       return 0;
1821 +}
1822 diff --git a/drivers/net/dpaa2/mc/dpcon.c b/drivers/net/dpaa2/mc/dpcon.c
1823 new file mode 100644
1824 index 0000000..56dbcf7
1825 --- /dev/null
1826 +++ b/drivers/net/dpaa2/mc/dpcon.c
1827 @@ -0,0 +1,400 @@
1828 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
1829 + *
1830 + * Redistribution and use in source and binary forms, with or without
1831 + * modification, are permitted provided that the following conditions are met:
1832 + * * Redistributions of source code must retain the above copyright
1833 + * notice, this list of conditions and the following disclaimer.
1834 + * * Redistributions in binary form must reproduce the above copyright
1835 + * notice, this list of conditions and the following disclaimer in the
1836 + * documentation and/or other materials provided with the distribution.
1837 + * * Neither the name of the above-listed copyright holders nor the
1838 + * names of any contributors may be used to endorse or promote products
1839 + * derived from this software without specific prior written permission.
1840 + *
1841 + *
1842 + * ALTERNATIVELY, this software may be distributed under the terms of the
1843 + * GNU General Public License ("GPL") as published by the Free Software
1844 + * Foundation, either version 2 of that License or (at your option) any
1845 + * later version.
1846 + *
1847 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1848 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1849 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1850 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1851 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1852 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1853 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1854 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1855 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1856 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1857 + * POSSIBILITY OF SUCH DAMAGE.
1858 + */
1859 +#include <fsl_mc_sys.h>
1860 +#include <fsl_mc_cmd.h>
1861 +#include <fsl_dpcon.h>
1862 +#include <fsl_dpcon_cmd.h>
1863 +
1864 +int dpcon_open(struct fsl_mc_io *mc_io,
1865 +              uint32_t cmd_flags,
1866 +              int dpcon_id,
1867 +              uint16_t *token)
1868 +{
1869 +       struct mc_command cmd = { 0 };
1870 +       int err;
1871 +
1872 +       /* prepare command */
1873 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_OPEN,
1874 +                                         cmd_flags,
1875 +                                         0);
1876 +       DPCON_CMD_OPEN(cmd, dpcon_id);
1877 +
1878 +       /* send command to mc*/
1879 +       err = mc_send_command(mc_io, &cmd);
1880 +       if (err)
1881 +               return err;
1882 +
1883 +       /* retrieve response parameters */
1884 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
1885 +
1886 +       return 0;
1887 +}
1888 +
1889 +int dpcon_close(struct fsl_mc_io *mc_io,
1890 +               uint32_t cmd_flags,
1891 +               uint16_t token)
1892 +{
1893 +       struct mc_command cmd = { 0 };
1894 +
1895 +       /* prepare command */
1896 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_CLOSE,
1897 +                                         cmd_flags,
1898 +                                         token);
1899 +
1900 +       /* send command to mc*/
1901 +       return mc_send_command(mc_io, &cmd);
1902 +}
1903 +
1904 +int dpcon_create(struct fsl_mc_io *mc_io,
1905 +                uint32_t cmd_flags,
1906 +                const struct dpcon_cfg *cfg,
1907 +                uint16_t *token)
1908 +{
1909 +       struct mc_command cmd = { 0 };
1910 +       int err;
1911 +
1912 +       /* prepare command */
1913 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_CREATE,
1914 +                                         cmd_flags,
1915 +                                         0);
1916 +       DPCON_CMD_CREATE(cmd, cfg);
1917 +
1918 +       /* send command to mc*/
1919 +       err = mc_send_command(mc_io, &cmd);
1920 +       if (err)
1921 +               return err;
1922 +
1923 +       /* retrieve response parameters */
1924 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
1925 +
1926 +       return 0;
1927 +}
1928 +
1929 +int dpcon_destroy(struct fsl_mc_io *mc_io,
1930 +                 uint32_t cmd_flags,
1931 +                 uint16_t token)
1932 +{
1933 +       struct mc_command cmd = { 0 };
1934 +
1935 +       /* prepare command */
1936 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_DESTROY,
1937 +                                         cmd_flags,
1938 +                                         token);
1939 +
1940 +       /* send command to mc*/
1941 +       return mc_send_command(mc_io, &cmd);
1942 +}
1943 +
1944 +int dpcon_enable(struct fsl_mc_io *mc_io,
1945 +                uint32_t cmd_flags,
1946 +                uint16_t token)
1947 +{
1948 +       struct mc_command cmd = { 0 };
1949 +
1950 +       /* prepare command */
1951 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_ENABLE,
1952 +                                         cmd_flags,
1953 +                                         token);
1954 +
1955 +       /* send command to mc*/
1956 +       return mc_send_command(mc_io, &cmd);
1957 +}
1958 +
1959 +int dpcon_disable(struct fsl_mc_io *mc_io,
1960 +                 uint32_t cmd_flags,
1961 +                 uint16_t token)
1962 +{
1963 +       struct mc_command cmd = { 0 };
1964 +
1965 +       /* prepare command */
1966 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_DISABLE,
1967 +                                         cmd_flags,
1968 +                                         token);
1969 +
1970 +       /* send command to mc*/
1971 +       return mc_send_command(mc_io, &cmd);
1972 +}
1973 +
1974 +int dpcon_is_enabled(struct fsl_mc_io *mc_io,
1975 +                    uint32_t cmd_flags,
1976 +                    uint16_t token,
1977 +                    int *en)
1978 +{
1979 +       struct mc_command cmd = { 0 };
1980 +       int err;
1981 +       /* prepare command */
1982 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_IS_ENABLED,
1983 +                                         cmd_flags,
1984 +                                         token);
1985 +
1986 +       /* send command to mc*/
1987 +       err = mc_send_command(mc_io, &cmd);
1988 +       if (err)
1989 +               return err;
1990 +
1991 +       /* retrieve response parameters */
1992 +       DPCON_RSP_IS_ENABLED(cmd, *en);
1993 +
1994 +       return 0;
1995 +}
1996 +
1997 +int dpcon_reset(struct fsl_mc_io *mc_io,
1998 +               uint32_t cmd_flags,
1999 +               uint16_t token)
2000 +{
2001 +       struct mc_command cmd = { 0 };
2002 +
2003 +       /* prepare command */
2004 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_RESET,
2005 +                                         cmd_flags, token);
2006 +
2007 +       /* send command to mc*/
2008 +       return mc_send_command(mc_io, &cmd);
2009 +}
2010 +
2011 +int dpcon_set_irq(struct fsl_mc_io     *mc_io,
2012 +                 uint32_t              cmd_flags,
2013 +                 uint16_t              token,
2014 +                 uint8_t               irq_index,
2015 +                 struct dpcon_irq_cfg  *irq_cfg)
2016 +{
2017 +       struct mc_command cmd = { 0 };
2018 +
2019 +       /* prepare command */
2020 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_SET_IRQ,
2021 +                                         cmd_flags,
2022 +                                         token);
2023 +       DPCON_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
2024 +
2025 +       /* send command to mc*/
2026 +       return mc_send_command(mc_io, &cmd);
2027 +}
2028 +
2029 +int dpcon_get_irq(struct fsl_mc_io     *mc_io,
2030 +                 uint32_t              cmd_flags,
2031 +                 uint16_t              token,
2032 +                 uint8_t               irq_index,
2033 +                 int                   *type,
2034 +                 struct dpcon_irq_cfg  *irq_cfg)
2035 +{
2036 +       struct mc_command cmd = { 0 };
2037 +       int err;
2038 +
2039 +       /* prepare command */
2040 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_IRQ,
2041 +                                         cmd_flags,
2042 +                                         token);
2043 +       DPCON_CMD_GET_IRQ(cmd, irq_index);
2044 +
2045 +       /* send command to mc*/
2046 +       err = mc_send_command(mc_io, &cmd);
2047 +       if (err)
2048 +               return err;
2049 +
2050 +       /* retrieve response parameters */
2051 +       DPCON_RSP_GET_IRQ(cmd, *type, irq_cfg);
2052 +
2053 +       return 0;
2054 +}
2055 +
2056 +int dpcon_set_irq_enable(struct fsl_mc_io *mc_io,
2057 +                        uint32_t cmd_flags,
2058 +                        uint16_t token,
2059 +                        uint8_t irq_index,
2060 +                        uint8_t en)
2061 +{
2062 +       struct mc_command cmd = { 0 };
2063 +
2064 +       /* prepare command */
2065 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_SET_IRQ_ENABLE,
2066 +                                         cmd_flags,
2067 +                                         token);
2068 +       DPCON_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
2069 +
2070 +       /* send command to mc*/
2071 +       return mc_send_command(mc_io, &cmd);
2072 +}
2073 +
2074 +int dpcon_get_irq_enable(struct fsl_mc_io *mc_io,
2075 +                        uint32_t cmd_flags,
2076 +                        uint16_t token,
2077 +                        uint8_t irq_index,
2078 +                        uint8_t *en)
2079 +{
2080 +       struct mc_command cmd = { 0 };
2081 +       int err;
2082 +
2083 +       /* prepare command */
2084 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_IRQ_ENABLE,
2085 +                                         cmd_flags,
2086 +                                         token);
2087 +       DPCON_CMD_GET_IRQ_ENABLE(cmd, irq_index);
2088 +
2089 +       /* send command to mc*/
2090 +       err = mc_send_command(mc_io, &cmd);
2091 +       if (err)
2092 +               return err;
2093 +
2094 +       /* retrieve response parameters */
2095 +       DPCON_RSP_GET_IRQ_ENABLE(cmd, *en);
2096 +
2097 +       return 0;
2098 +}
2099 +
2100 +int dpcon_set_irq_mask(struct fsl_mc_io *mc_io,
2101 +                      uint32_t cmd_flags,
2102 +                      uint16_t token,
2103 +                      uint8_t irq_index,
2104 +                      uint32_t mask)
2105 +{
2106 +       struct mc_command cmd = { 0 };
2107 +
2108 +       /* prepare command */
2109 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_SET_IRQ_MASK,
2110 +                                         cmd_flags,
2111 +                                         token);
2112 +       DPCON_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
2113 +
2114 +       /* send command to mc*/
2115 +       return mc_send_command(mc_io, &cmd);
2116 +}
2117 +
2118 +int dpcon_get_irq_mask(struct fsl_mc_io *mc_io,
2119 +                      uint32_t cmd_flags,
2120 +                      uint16_t token,
2121 +                      uint8_t irq_index,
2122 +                      uint32_t *mask)
2123 +{
2124 +       struct mc_command cmd = { 0 };
2125 +       int err;
2126 +
2127 +       /* prepare command */
2128 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_IRQ_MASK,
2129 +                                         cmd_flags,
2130 +                                         token);
2131 +       DPCON_CMD_GET_IRQ_MASK(cmd, irq_index);
2132 +
2133 +       /* send command to mc*/
2134 +       err = mc_send_command(mc_io, &cmd);
2135 +       if (err)
2136 +               return err;
2137 +
2138 +       /* retrieve response parameters */
2139 +       DPCON_RSP_GET_IRQ_MASK(cmd, *mask);
2140 +
2141 +       return 0;
2142 +}
2143 +
2144 +int dpcon_get_irq_status(struct fsl_mc_io *mc_io,
2145 +                        uint32_t cmd_flags,
2146 +                        uint16_t token,
2147 +                        uint8_t irq_index,
2148 +                        uint32_t *status)
2149 +{
2150 +       struct mc_command cmd = { 0 };
2151 +       int err;
2152 +
2153 +       /* prepare command */
2154 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_IRQ_STATUS,
2155 +                                         cmd_flags,
2156 +                                         token);
2157 +       DPCON_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
2158 +
2159 +       /* send command to mc*/
2160 +       err = mc_send_command(mc_io, &cmd);
2161 +       if (err)
2162 +               return err;
2163 +
2164 +       /* retrieve response parameters */
2165 +       DPCON_RSP_GET_IRQ_STATUS(cmd, *status);
2166 +
2167 +       return 0;
2168 +}
2169 +
2170 +int dpcon_clear_irq_status(struct fsl_mc_io *mc_io,
2171 +                          uint32_t cmd_flags,
2172 +                          uint16_t token,
2173 +                          uint8_t irq_index,
2174 +                          uint32_t status)
2175 +{
2176 +       struct mc_command cmd = { 0 };
2177 +
2178 +       /* prepare command */
2179 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_CLEAR_IRQ_STATUS,
2180 +                                         cmd_flags,
2181 +                                         token);
2182 +       DPCON_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
2183 +
2184 +       /* send command to mc*/
2185 +       return mc_send_command(mc_io, &cmd);
2186 +}
2187 +
2188 +int dpcon_get_attributes(struct fsl_mc_io *mc_io,
2189 +                        uint32_t cmd_flags,
2190 +                        uint16_t token,
2191 +                        struct dpcon_attr *attr)
2192 +{
2193 +       struct mc_command cmd = { 0 };
2194 +       int err;
2195 +
2196 +       /* prepare command */
2197 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_ATTR,
2198 +                                         cmd_flags,
2199 +                                         token);
2200 +
2201 +       /* send command to mc*/
2202 +       err = mc_send_command(mc_io, &cmd);
2203 +       if (err)
2204 +               return err;
2205 +
2206 +       /* retrieve response parameters */
2207 +       DPCON_RSP_GET_ATTR(cmd, attr);
2208 +
2209 +       return 0;
2210 +}
2211 +
2212 +int dpcon_set_notification(struct fsl_mc_io *mc_io,
2213 +                          uint32_t cmd_flags,
2214 +                          uint16_t token,
2215 +                          struct dpcon_notification_cfg *cfg)
2216 +{
2217 +       struct mc_command cmd = { 0 };
2218 +
2219 +       /* prepare command */
2220 +       cmd.header = mc_encode_cmd_header(DPCON_CMDID_SET_NOTIFICATION,
2221 +                                         cmd_flags,
2222 +                                         token);
2223 +       DPCON_CMD_SET_NOTIFICATION(cmd, cfg);
2224 +
2225 +       /* send command to mc*/
2226 +       return mc_send_command(mc_io, &cmd);
2227 +}
2228 diff --git a/drivers/net/dpaa2/mc/dpdbg.c b/drivers/net/dpaa2/mc/dpdbg.c
2229 new file mode 100644
2230 index 0000000..6f2a08d
2231 --- /dev/null
2232 +++ b/drivers/net/dpaa2/mc/dpdbg.c
2233 @@ -0,0 +1,547 @@
2234 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
2235 + *
2236 + * Redistribution and use in source and binary forms, with or without
2237 + * modification, are permitted provided that the following conditions are met:
2238 + * * Redistributions of source code must retain the above copyright
2239 + * notice, this list of conditions and the following disclaimer.
2240 + * * Redistributions in binary form must reproduce the above copyright
2241 + * notice, this list of conditions and the following disclaimer in the
2242 + * documentation and/or other materials provided with the distribution.
2243 + * * Neither the name of the above-listed copyright holders nor the
2244 + * names of any contributors may be used to endorse or promote products
2245 + * derived from this software without specific prior written permission.
2246 + *
2247 + *
2248 + * ALTERNATIVELY, this software may be distributed under the terms of the
2249 + * GNU General Public License ("GPL") as published by the Free Software
2250 + * Foundation, either version 2 of that License or (at your option) any
2251 + * later version.
2252 + *
2253 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2254 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2255 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2256 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2257 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2258 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2259 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2260 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2261 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2262 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2263 + * POSSIBILITY OF SUCH DAMAGE.
2264 + */
2265 +#include <fsl_mc_sys.h>
2266 +#include <fsl_mc_cmd.h>
2267 +#include <fsl_dpdbg.h>
2268 +#include <fsl_dpdbg_cmd.h>
2269 +
2270 +int dpdbg_open(struct fsl_mc_io *mc_io,
2271 +              uint32_t cmd_flags,
2272 +              int dpdbg_id,
2273 +              uint16_t *token)
2274 +{
2275 +       struct mc_command cmd = { 0 };
2276 +       int err;
2277 +
2278 +       /* prepare command */
2279 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_OPEN,
2280 +                                         cmd_flags,
2281 +                                         0);
2282 +       DPDBG_CMD_OPEN(cmd, dpdbg_id);
2283 +
2284 +       /* send command to mc*/
2285 +       err = mc_send_command(mc_io, &cmd);
2286 +       if (err)
2287 +               return err;
2288 +
2289 +       /* retrieve response parameters */
2290 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
2291 +
2292 +       return err;
2293 +}
2294 +
2295 +int dpdbg_close(struct fsl_mc_io *mc_io,
2296 +               uint32_t cmd_flags,
2297 +               uint16_t token)
2298 +{
2299 +       struct mc_command cmd = { 0 };
2300 +
2301 +       /* prepare command */
2302 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_CLOSE, cmd_flags,
2303 +                                         token);
2304 +
2305 +       /* send command to mc*/
2306 +       return mc_send_command(mc_io, &cmd);
2307 +}
2308 +
2309 +int dpdbg_get_attributes(struct fsl_mc_io *mc_io,
2310 +                        uint32_t cmd_flags,
2311 +                        uint16_t token,
2312 +                        struct dpdbg_attr *attr)
2313 +{
2314 +       struct mc_command cmd = { 0 };
2315 +       int err;
2316 +
2317 +       /* prepare command */
2318 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_ATTR,
2319 +                                         cmd_flags,
2320 +                                         token);
2321 +
2322 +       /* send command to mc*/
2323 +       err = mc_send_command(mc_io, &cmd);
2324 +       if (err)
2325 +               return err;
2326 +
2327 +       /* retrieve response parameters */
2328 +       DPDBG_RSP_GET_ATTRIBUTES(cmd, attr);
2329 +
2330 +       return 0;
2331 +}
2332 +
2333 +int dpdbg_get_dpni_info(struct fsl_mc_io               *mc_io,
2334 +                       uint32_t                        cmd_flags,
2335 +                       uint16_t                        token,
2336 +                       int                             dpni_id,
2337 +                       struct dpdbg_dpni_info          *info)
2338 +{
2339 +       struct mc_command cmd = { 0 };
2340 +       int err;
2341 +
2342 +       /* prepare command */
2343 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_DPNI_INFO,
2344 +                                         cmd_flags,
2345 +                                         token);
2346 +       DPDBG_CMD_GET_DPNI_INFO(cmd, dpni_id);
2347 +
2348 +       /* send command to mc*/
2349 +       err = mc_send_command(mc_io, &cmd);
2350 +       if (err)
2351 +               return err;
2352 +
2353 +       /* retrieve response parameters */
2354 +       DPDBG_RSP_GET_DPNI_INFO(cmd, info);
2355 +
2356 +       return 0;
2357 +}
2358 +
2359 +int dpdbg_get_dpni_priv_tx_conf_fqid(struct fsl_mc_io  *mc_io,
2360 +                                    uint32_t           cmd_flags,
2361 +                                    uint16_t           token,
2362 +                                    int                dpni_id,
2363 +                                    uint8_t            sender_id,
2364 +                                    uint32_t           *fqid)
2365 +{
2366 +       struct mc_command cmd = { 0 };
2367 +       int err;
2368 +
2369 +       /* prepare command */
2370 +       cmd.header = mc_encode_cmd_header(
2371 +                                       DPDBG_CMDID_GET_DPNI_PRIV_TX_CONF_FQID,
2372 +                                       cmd_flags,
2373 +                                       token);
2374 +       DPDBG_CMD_GET_DPNI_PRIV_TX_CONF_FQID(cmd, dpni_id, sender_id);
2375 +
2376 +       /* send command to mc*/
2377 +       err = mc_send_command(mc_io, &cmd);
2378 +       if (err)
2379 +               return err;
2380 +
2381 +       /* retrieve response parameters */
2382 +       DPDBG_RSP_GET_DPNI_PRIV_TX_CONF_FQID(cmd, *fqid);
2383 +
2384 +       return 0;
2385 +}
2386 +
2387 +int dpdbg_get_dpcon_info(struct fsl_mc_io              *mc_io,
2388 +                        uint32_t                       cmd_flags,
2389 +                        uint16_t                       token,
2390 +                        int                            dpcon_id,
2391 +                        struct dpdbg_dpcon_info        *info)
2392 +{
2393 +       struct mc_command cmd = { 0 };
2394 +       int err;
2395 +
2396 +       /* prepare command */
2397 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_DPCON_INFO,
2398 +                                         cmd_flags,
2399 +                                         token);
2400 +       DPDBG_CMD_GET_DPCON_INFO(cmd, dpcon_id);
2401 +
2402 +       /* send command to mc*/
2403 +       err = mc_send_command(mc_io, &cmd);
2404 +       if (err)
2405 +               return err;
2406 +
2407 +       /* retrieve response parameters */
2408 +       DPDBG_RSP_GET_DPCON_INFO(cmd, info);
2409 +
2410 +       return 0;
2411 +}
2412 +
2413 +int dpdbg_get_dpbp_info(struct fsl_mc_io               *mc_io,
2414 +                       uint32_t                        cmd_flags,
2415 +                       uint16_t                        token,
2416 +                       int                             dpbp_id,
2417 +                       struct dpdbg_dpbp_info          *info)
2418 +{
2419 +       struct mc_command cmd = { 0 };
2420 +       int err;
2421 +
2422 +       /* prepare command */
2423 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_DPBP_INFO,
2424 +                                         cmd_flags,
2425 +                                         token);
2426 +       DPDBG_CMD_GET_DPBP_INFO(cmd, dpbp_id);
2427 +
2428 +       /* send command to mc*/
2429 +       err = mc_send_command(mc_io, &cmd);
2430 +       if (err)
2431 +               return err;
2432 +
2433 +       /* retrieve response parameters */
2434 +       DPDBG_RSP_GET_DPBP_INFO(cmd, info);
2435 +
2436 +       return 0;
2437 +}
2438 +
2439 +int dpdbg_get_dpci_fqid(struct fsl_mc_io       *mc_io,
2440 +                       uint32_t                cmd_flags,
2441 +                       uint16_t                token,
2442 +                       int                     dpci_id,
2443 +                       uint8_t                 priority,
2444 +                       uint32_t                *fqid)
2445 +{
2446 +       struct mc_command cmd = { 0 };
2447 +       int err;
2448 +
2449 +       /* prepare command */
2450 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_DPBP_INFO,
2451 +                                         cmd_flags,
2452 +                                         token);
2453 +       DPDBG_CMD_GET_DPCI_FQID(cmd, dpci_id, priority);
2454 +
2455 +       /* send command to mc*/
2456 +       err = mc_send_command(mc_io, &cmd);
2457 +       if (err)
2458 +               return err;
2459 +
2460 +       /* retrieve response parameters */
2461 +       DPDBG_RSP_GET_DPCI_FQID(cmd, *fqid);
2462 +
2463 +       return 0;
2464 +}
2465 +
2466 +int dpdbg_prepare_ctlu_global_rule(struct dpkg_profile_cfg     *dpkg_rule,
2467 +                                  uint8_t                      *rule_buf)
2468 +{
2469 +       int i, j;
2470 +       int offset = 0;
2471 +       int param = 1;
2472 +       uint64_t *params = (uint64_t *)rule_buf;
2473 +
2474 +       if (!rule_buf || !dpkg_rule)
2475 +                       return -EINVAL;
2476 +
2477 +       params[0] |= mc_enc(0, 8, dpkg_rule->num_extracts);
2478 +       params[0] = cpu_to_le64(params[0]);
2479 +
2480 +       if (dpkg_rule->num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS)
2481 +               return -EINVAL;
2482 +
2483 +       for (i = 0; i < dpkg_rule->num_extracts; i++) {
2484 +               switch (dpkg_rule->extracts[i].type) {
2485 +               case DPKG_EXTRACT_FROM_HDR:
2486 +                       params[param] |= mc_enc(0, 8,
2487 +                               dpkg_rule->extracts[i].extract.from_hdr.prot);
2488 +                       params[param] |= mc_enc(8, 4,
2489 +                               dpkg_rule->extracts[i].extract.from_hdr.type);
2490 +                       params[param] |= mc_enc(16, 8,
2491 +                               dpkg_rule->extracts[i].extract.from_hdr.size);
2492 +                       params[param] |= mc_enc(24, 8,
2493 +                               dpkg_rule->extracts[i].extract.from_hdr.offset);
2494 +                       params[param] |= mc_enc(32, 32,
2495 +                               dpkg_rule->extracts[i].extract.from_hdr.field);
2496 +                       params[param] = cpu_to_le64(params[param]);
2497 +                       param++;
2498 +                       params[param] |= mc_enc(0, 8,
2499 +                               dpkg_rule->extracts[i].extract.
2500 +                               from_hdr.hdr_index);
2501 +                       break;
2502 +               case DPKG_EXTRACT_FROM_DATA:
2503 +                       params[param] |= mc_enc(16, 8,
2504 +                               dpkg_rule->extracts[i].extract.from_data.size);
2505 +                       params[param] |= mc_enc(24, 8,
2506 +                               dpkg_rule->extracts[i].extract.
2507 +                               from_data.offset);
2508 +                       params[param] = cpu_to_le64(params[param]);
2509 +                       param++;
2510 +                       break;
2511 +               case DPKG_EXTRACT_FROM_PARSE:
2512 +                       params[param] |= mc_enc(16, 8,
2513 +                               dpkg_rule->extracts[i].extract.from_parse.size);
2514 +                       params[param] |= mc_enc(24, 8,
2515 +                               dpkg_rule->extracts[i].extract.
2516 +                               from_parse.offset);
2517 +                       params[param] = cpu_to_le64(params[param]);
2518 +                       param++;
2519 +                       break;
2520 +               default:
2521 +                       return -EINVAL;
2522 +               }
2523 +               params[param] |= mc_enc(
2524 +                       24, 8, dpkg_rule->extracts[i].num_of_byte_masks);
2525 +               params[param] |= mc_enc(32, 4, dpkg_rule->extracts[i].type);
2526 +               params[param] = cpu_to_le64(params[param]);
2527 +               param++;
2528 +               for (offset = 0, j = 0;
2529 +                       j < DPKG_NUM_OF_MASKS;
2530 +                       offset += 16, j++) {
2531 +                       params[param] |= mc_enc(
2532 +                               (offset), 8,
2533 +                               dpkg_rule->extracts[i].masks[j].mask);
2534 +                       params[param] |= mc_enc(
2535 +                               (offset + 8), 8,
2536 +                               dpkg_rule->extracts[i].masks[j].offset);
2537 +               }
2538 +               params[param] = cpu_to_le64(params[param]);
2539 +               param++;
2540 +       }
2541 +       return 0;
2542 +}
2543 +
2544 +int dpdbg_set_ctlu_global_marking(struct fsl_mc_io             *mc_io,
2545 +                                 uint32_t                      cmd_flags,
2546 +                                 uint16_t                      token,
2547 +                                 uint8_t                       marking,
2548 +                                 struct dpdbg_rule_cfg         *cfg)
2549 +{
2550 +       struct mc_command cmd = { 0 };
2551 +
2552 +       /* prepare command */
2553 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_CTLU_GLOBAL_MARKING,
2554 +                                         cmd_flags,
2555 +                                         token);
2556 +       DPDBG_CMD_SET_CTLU_GLOBAL_MARKING(cmd, marking, cfg);
2557 +
2558 +       /* send command to mc*/
2559 +       return mc_send_command(mc_io, &cmd);
2560 +}
2561 +
2562 +int dpdbg_set_dpni_rx_marking(struct fsl_mc_io                 *mc_io,
2563 +                             uint32_t                          cmd_flags,
2564 +                             uint16_t                          token,
2565 +                             int                               dpni_id,
2566 +                             struct dpdbg_dpni_rx_marking_cfg  *cfg)
2567 +{
2568 +       struct mc_command cmd = { 0 };
2569 +
2570 +       /* prepare command */
2571 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPNI_RX_MARKING,
2572 +                                         cmd_flags,
2573 +                                         token);
2574 +       DPDBG_CMD_SET_DPNI_RX_MARKING(cmd, dpni_id, cfg);
2575 +
2576 +       /* send command to mc*/
2577 +       return mc_send_command(mc_io, &cmd);
2578 +}
2579 +
2580 +int dpdbg_set_dpni_tx_conf_marking(struct fsl_mc_io            *mc_io,
2581 +                                  uint32_t                     cmd_flags,
2582 +                                  uint16_t                     token,
2583 +                                  int                          dpni_id,
2584 +                                  uint16_t                     sender_id,
2585 +                                  uint8_t                      marking)
2586 +{
2587 +       struct mc_command cmd = { 0 };
2588 +
2589 +       /* prepare command */
2590 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPNI_TX_CONF_MARKING,
2591 +                                         cmd_flags,
2592 +                                         token);
2593 +       DPDBG_CMD_SET_DPNI_TX_CONF_MARKING(cmd, dpni_id, sender_id, marking);
2594 +
2595 +       /* send command to mc*/
2596 +       return mc_send_command(mc_io, &cmd);
2597 +}
2598 +
2599 +int dpdbg_set_dpio_marking(struct fsl_mc_io    *mc_io,
2600 +                          uint32_t             cmd_flags,
2601 +                          uint16_t              token,
2602 +                          int                   dpio_id,
2603 +                          uint8_t               marking)
2604 +{
2605 +       struct mc_command cmd = { 0 };
2606 +
2607 +       /* prepare command */
2608 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPIO_MARKING,
2609 +                                         cmd_flags,
2610 +                                         token);
2611 +       DPDBG_CMD_SET_DPIO_MARKING(cmd, dpio_id, marking);
2612 +
2613 +       /* send command to mc*/
2614 +       return mc_send_command(mc_io, &cmd);
2615 +}
2616 +
2617 +int dpdbg_set_ctlu_global_trace(struct fsl_mc_io       *mc_io,
2618 +                               uint32_t                cmd_flags,
2619 +                               uint16_t                token,
2620 +                               struct dpdbg_rule_cfg   *cfg)
2621 +{
2622 +       struct mc_command cmd = { 0 };
2623 +
2624 +       /* prepare command */
2625 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_CTLU_GLOBAL_TRACE,
2626 +                                         cmd_flags,
2627 +                                         token);
2628 +       DPDBG_CMD_SET_CTLU_GLOBAL_TRACE(cmd, cfg);
2629 +
2630 +       /* send command to mc*/
2631 +       return mc_send_command(mc_io, &cmd);
2632 +}
2633 +
2634 +int dpdbg_set_dpio_trace(struct fsl_mc_io      *mc_io,
2635 +                        uint32_t               cmd_flags,
2636 +                        uint16_t               token,
2637 +                        int                    dpio_id,
2638 +                        struct dpdbg_dpio_trace_cfg
2639 +                                trace_point[DPDBG_NUM_OF_DPIO_TRACE_POINTS])
2640 +{
2641 +       struct mc_command cmd = { 0 };
2642 +
2643 +       /* prepare command */
2644 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPIO_TRACE,
2645 +                                         cmd_flags,
2646 +                                         token);
2647 +       DPDBG_CMD_SET_DPIO_TRACE(cmd, dpio_id, trace_point);
2648 +
2649 +       /* send command to mc*/
2650 +       return mc_send_command(mc_io, &cmd);
2651 +}
2652 +
2653 +int dpdbg_set_dpni_rx_trace(struct fsl_mc_io           *mc_io,
2654 +                           uint32_t                    cmd_flags,
2655 +                           uint16_t                    token,
2656 +                           int                 dpni_id,
2657 +                           struct dpdbg_dpni_rx_trace_cfg *trace_cfg)
2658 +{
2659 +       struct mc_command cmd = { 0 };
2660 +
2661 +       /* prepare command */
2662 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPNI_RX_TRACE,
2663 +                                         cmd_flags,
2664 +                                         token);
2665 +       DPDBG_CMD_SET_DPNI_RX_TRACE(cmd, dpni_id, trace_cfg);
2666 +
2667 +       /* send command to mc*/
2668 +       return mc_send_command(mc_io, &cmd);
2669 +}
2670 +
2671 +int dpdbg_set_dpni_tx_trace(struct fsl_mc_io                   *mc_io,
2672 +                           uint32_t                            cmd_flags,
2673 +                           uint16_t                            token,
2674 +                           int                                 dpni_id,
2675 +                           uint16_t                            sender_id,
2676 +                           struct dpdbg_dpni_tx_trace_cfg      *trace_cfg)
2677 +{
2678 +       struct mc_command cmd = { 0 };
2679 +
2680 +       /* prepare command */
2681 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPNI_TX_TRACE,
2682 +                                         cmd_flags,
2683 +                                         token);
2684 +       DPDBG_CMD_SET_DPNI_TX_TRACE(cmd, dpni_id, sender_id, trace_cfg);
2685 +
2686 +       /* send command to mc*/
2687 +       return mc_send_command(mc_io, &cmd);
2688 +}
2689 +
2690 +int dpdbg_set_dpcon_trace(struct fsl_mc_io             *mc_io,
2691 +                         uint32_t                      cmd_flags,
2692 +                         uint16_t                      token,
2693 +                         int                           dpcon_id,
2694 +                         struct dpdbg_dpcon_trace_cfg
2695 +                                 trace_point[DPDBG_NUM_OF_DPCON_TRACE_POINTS])
2696 +{
2697 +       struct mc_command cmd = { 0 };
2698 +
2699 +       /* prepare command */
2700 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPCON_TRACE,
2701 +                                         cmd_flags,
2702 +                                         token);
2703 +       DPDBG_CMD_SET_DPCON_TRACE(cmd, dpcon_id, trace_point);
2704 +
2705 +       /* send command to mc*/
2706 +       return mc_send_command(mc_io, &cmd);
2707 +}
2708 +
2709 +int dpdbg_set_dpseci_trace(struct fsl_mc_io            *mc_io,
2710 +                          uint32_t                     cmd_flags,
2711 +                          uint16_t                     token,
2712 +                          int                          dpseci_id,
2713 +                          struct dpdbg_dpseci_trace_cfg
2714 +                                 trace_point[DPDBG_NUM_OF_DPSECI_TRACE_POINTS])
2715 +{
2716 +       struct mc_command cmd = { 0 };
2717 +
2718 +       /* prepare command */
2719 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_SET_DPSECI_TRACE,
2720 +                                         cmd_flags,
2721 +                                         token);
2722 +       DPDBG_CMD_SET_DPSECI_TRACE(cmd, dpseci_id, trace_point);
2723 +
2724 +       /* send command to mc*/
2725 +       return mc_send_command(mc_io, &cmd);
2726 +}
2727 +
2728 +int dpdbg_get_dpmac_counter(struct fsl_mc_io   *mc_io,
2729 +                           uint32_t            cmd_flags,
2730 +                           uint16_t             token,
2731 +                           int          dpmac_id,
2732 +                           enum dpmac_counter   counter_type,
2733 +                           uint64_t             *counter)
2734 +{
2735 +       struct mc_command cmd = { 0 };
2736 +       int err;
2737 +
2738 +       /* prepare command */
2739 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_DPMAC_COUNTER,
2740 +                                         cmd_flags,
2741 +                                         token);
2742 +       DPDBG_CMD_GET_DPMAC_COUNTER(cmd, dpmac_id, counter_type);
2743 +
2744 +       /* send command to mc*/
2745 +       err = mc_send_command(mc_io, &cmd);
2746 +       if (err)
2747 +               return err;
2748 +
2749 +       /* retrieve response parameters */
2750 +       DPDBG_RSP_GET_DPMAC_COUNTER(cmd, *counter);
2751 +
2752 +       return 0;
2753 +}
2754 +
2755 +int dpdbg_get_dpni_counter(struct fsl_mc_io    *mc_io,
2756 +                          uint32_t             cmd_flags,
2757 +                          uint16_t             token,
2758 +                          int                  dpni_id,
2759 +                          enum dpni_counter    counter_type,
2760 +                          uint64_t             *counter)
2761 +{
2762 +       struct mc_command cmd = { 0 };
2763 +       int err;
2764 +
2765 +       /* prepare command */
2766 +       cmd.header = mc_encode_cmd_header(DPDBG_CMDID_GET_DPNI_COUNTER,
2767 +                                         cmd_flags,
2768 +                                         token);
2769 +       DPDBG_CMD_GET_DPMAC_COUNTER(cmd, dpni_id, counter_type);
2770 +
2771 +       /* send command to mc*/
2772 +       err = mc_send_command(mc_io, &cmd);
2773 +       if (err)
2774 +               return err;
2775 +
2776 +       /* retrieve response parameters */
2777 +       DPDBG_RSP_GET_DPNI_COUNTER(cmd, *counter);
2778 +
2779 +       return 0;
2780 +}
2781 diff --git a/drivers/net/dpaa2/mc/dpdcei.c b/drivers/net/dpaa2/mc/dpdcei.c
2782 new file mode 100644
2783 index 0000000..a5c4c47
2784 --- /dev/null
2785 +++ b/drivers/net/dpaa2/mc/dpdcei.c
2786 @@ -0,0 +1,449 @@
2787 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
2788 + *
2789 + * Redistribution and use in source and binary forms, with or without
2790 + * modification, are permitted provided that the following conditions are met:
2791 + * * Redistributions of source code must retain the above copyright
2792 + * notice, this list of conditions and the following disclaimer.
2793 + * * Redistributions in binary form must reproduce the above copyright
2794 + * notice, this list of conditions and the following disclaimer in the
2795 + * documentation and/or other materials provided with the distribution.
2796 + * * Neither the name of the above-listed copyright holders nor the
2797 + * names of any contributors may be used to endorse or promote products
2798 + * derived from this software without specific prior written permission.
2799 + *
2800 + *
2801 + * ALTERNATIVELY, this software may be distributed under the terms of the
2802 + * GNU General Public License ("GPL") as published by the Free Software
2803 + * Foundation, either version 2 of that License or (at your option) any
2804 + * later version.
2805 + *
2806 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2807 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2808 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2809 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2810 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2811 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2812 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2813 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2814 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2815 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2816 + * POSSIBILITY OF SUCH DAMAGE.
2817 + */
2818 +#include <fsl_mc_sys.h>
2819 +#include <fsl_mc_cmd.h>
2820 +#include <fsl_dpdcei.h>
2821 +#include <fsl_dpdcei_cmd.h>
2822 +
2823 +int dpdcei_open(struct fsl_mc_io *mc_io,
2824 +               uint32_t cmd_flags,
2825 +               int dpdcei_id,
2826 +               uint16_t *token)
2827 +{
2828 +       struct mc_command cmd = { 0 };
2829 +       int err;
2830 +
2831 +       /* prepare command */
2832 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_OPEN,
2833 +                                         cmd_flags,
2834 +                                         0);
2835 +       DPDCEI_CMD_OPEN(cmd, dpdcei_id);
2836 +
2837 +       /* send command to mc*/
2838 +       err = mc_send_command(mc_io, &cmd);
2839 +       if (err)
2840 +               return err;
2841 +
2842 +       /* retrieve response parameters */
2843 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
2844 +
2845 +       return 0;
2846 +}
2847 +
2848 +int dpdcei_close(struct fsl_mc_io *mc_io,
2849 +                uint32_t cmd_flags,
2850 +                uint16_t token)
2851 +{
2852 +       struct mc_command cmd = { 0 };
2853 +
2854 +       /* prepare command */
2855 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_CLOSE,
2856 +                                         cmd_flags,
2857 +                                         token);
2858 +
2859 +       /* send command to mc*/
2860 +       return mc_send_command(mc_io, &cmd);
2861 +}
2862 +
2863 +int dpdcei_create(struct fsl_mc_io *mc_io,
2864 +                 uint32_t cmd_flags,
2865 +                 const struct dpdcei_cfg *cfg,
2866 +                 uint16_t *token)
2867 +{
2868 +       struct mc_command cmd = { 0 };
2869 +       int err;
2870 +
2871 +       /* prepare command */
2872 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_CREATE,
2873 +                                         cmd_flags,
2874 +                                         0);
2875 +       DPDCEI_CMD_CREATE(cmd, cfg);
2876 +
2877 +       /* send command to mc*/
2878 +       err = mc_send_command(mc_io, &cmd);
2879 +       if (err)
2880 +               return err;
2881 +
2882 +       /* retrieve response parameters */
2883 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
2884 +
2885 +       return 0;
2886 +}
2887 +
2888 +int dpdcei_destroy(struct fsl_mc_io *mc_io,
2889 +                  uint32_t cmd_flags,
2890 +                  uint16_t token)
2891 +{
2892 +       struct mc_command cmd = { 0 };
2893 +
2894 +       /* prepare command */
2895 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_DESTROY,
2896 +                                         cmd_flags,
2897 +                                         token);
2898 +
2899 +       /* send command to mc*/
2900 +       return mc_send_command(mc_io, &cmd);
2901 +}
2902 +
2903 +int dpdcei_enable(struct fsl_mc_io *mc_io,
2904 +                 uint32_t cmd_flags,
2905 +                 uint16_t token)
2906 +{
2907 +       struct mc_command cmd = { 0 };
2908 +
2909 +       /* prepare command */
2910 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_ENABLE,
2911 +                                         cmd_flags,
2912 +                                         token);
2913 +
2914 +       /* send command to mc*/
2915 +       return mc_send_command(mc_io, &cmd);
2916 +}
2917 +
2918 +int dpdcei_disable(struct fsl_mc_io *mc_io,
2919 +                  uint32_t cmd_flags,
2920 +                  uint16_t token)
2921 +{
2922 +       struct mc_command cmd = { 0 };
2923 +
2924 +       /* prepare command */
2925 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_DISABLE,
2926 +                                         cmd_flags,
2927 +                                         token);
2928 +
2929 +       /* send command to mc*/
2930 +       return mc_send_command(mc_io, &cmd);
2931 +}
2932 +
2933 +int dpdcei_is_enabled(struct fsl_mc_io *mc_io,
2934 +                     uint32_t cmd_flags,
2935 +                     uint16_t token,
2936 +                     int *en)
2937 +{
2938 +       struct mc_command cmd = { 0 };
2939 +       int err;
2940 +       /* prepare command */
2941 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_IS_ENABLED,
2942 +                                         cmd_flags,
2943 +                                         token);
2944 +
2945 +       /* send command to mc*/
2946 +       err = mc_send_command(mc_io, &cmd);
2947 +       if (err)
2948 +               return err;
2949 +
2950 +       /* retrieve response parameters */
2951 +       DPDCEI_RSP_IS_ENABLED(cmd, *en);
2952 +
2953 +       return 0;
2954 +}
2955 +
2956 +int dpdcei_reset(struct fsl_mc_io *mc_io,
2957 +                uint32_t cmd_flags,
2958 +                uint16_t token)
2959 +{
2960 +       struct mc_command cmd = { 0 };
2961 +
2962 +       /* prepare command */
2963 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_RESET,
2964 +                                         cmd_flags,
2965 +                                         token);
2966 +
2967 +       /* send command to mc*/
2968 +       return mc_send_command(mc_io, &cmd);
2969 +}
2970 +
2971 +int dpdcei_get_irq(struct fsl_mc_io *mc_io,
2972 +                  uint32_t cmd_flags,
2973 +                  uint16_t token,
2974 +                  uint8_t irq_index,
2975 +                  int  *type,
2976 +                  struct dpdcei_irq_cfg *irq_cfg)
2977 +{
2978 +       struct mc_command cmd = { 0 };
2979 +       int err;
2980 +
2981 +       /* prepare command */
2982 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_IRQ,
2983 +                                         cmd_flags,
2984 +                                         token);
2985 +       DPDCEI_CMD_GET_IRQ(cmd, irq_index);
2986 +
2987 +       /* send command to mc*/
2988 +       err = mc_send_command(mc_io, &cmd);
2989 +       if (err)
2990 +               return err;
2991 +
2992 +       /* retrieve response parameters */
2993 +       DPDCEI_RSP_GET_IRQ(cmd, *type, irq_cfg);
2994 +
2995 +       return 0;
2996 +}
2997 +
2998 +int dpdcei_set_irq(struct fsl_mc_io *mc_io,
2999 +                  uint32_t cmd_flags,
3000 +                  uint16_t token,
3001 +                  uint8_t irq_index,
3002 +                  struct dpdcei_irq_cfg *irq_cfg)
3003 +{
3004 +       struct mc_command cmd = { 0 };
3005 +
3006 +       /* prepare command */
3007 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_SET_IRQ,
3008 +                                         cmd_flags,
3009 +                                         token);
3010 +       DPDCEI_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
3011 +
3012 +       /* send command to mc*/
3013 +       return mc_send_command(mc_io, &cmd);
3014 +}
3015 +
3016 +int dpdcei_get_irq_enable(struct fsl_mc_io *mc_io,
3017 +                         uint32_t cmd_flags,
3018 +                         uint16_t token,
3019 +                         uint8_t irq_index,
3020 +                         uint8_t *en)
3021 +{
3022 +       struct mc_command cmd = { 0 };
3023 +       int err;
3024 +
3025 +       /* prepare command */
3026 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_IRQ_ENABLE,
3027 +                                         cmd_flags,
3028 +                                         token);
3029 +       DPDCEI_CMD_GET_IRQ_ENABLE(cmd, irq_index);
3030 +
3031 +       /* send command to mc*/
3032 +       err = mc_send_command(mc_io, &cmd);
3033 +       if (err)
3034 +               return err;
3035 +
3036 +       /* retrieve response parameters */
3037 +       DPDCEI_RSP_GET_IRQ_ENABLE(cmd, *en);
3038 +
3039 +       return 0;
3040 +}
3041 +
3042 +int dpdcei_set_irq_enable(struct fsl_mc_io *mc_io,
3043 +                         uint32_t cmd_flags,
3044 +                         uint16_t token,
3045 +                         uint8_t irq_index,
3046 +                         uint8_t en)
3047 +{
3048 +       struct mc_command cmd = { 0 };
3049 +
3050 +       /* prepare command */
3051 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_SET_IRQ_ENABLE,
3052 +                                         cmd_flags,
3053 +                                         token);
3054 +       DPDCEI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
3055 +
3056 +       /* send command to mc*/
3057 +       return mc_send_command(mc_io, &cmd);
3058 +}
3059 +
3060 +int dpdcei_get_irq_mask(struct fsl_mc_io *mc_io,
3061 +                       uint32_t cmd_flags,
3062 +                       uint16_t token,
3063 +                       uint8_t irq_index,
3064 +                       uint32_t *mask)
3065 +{
3066 +       struct mc_command cmd = { 0 };
3067 +       int err;
3068 +
3069 +       /* prepare command */
3070 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_IRQ_MASK,
3071 +                                         cmd_flags,
3072 +                                         token);
3073 +       DPDCEI_CMD_GET_IRQ_MASK(cmd, irq_index);
3074 +
3075 +       /* send command to mc*/
3076 +       err = mc_send_command(mc_io, &cmd);
3077 +       if (err)
3078 +               return err;
3079 +
3080 +       /* retrieve response parameters */
3081 +       DPDCEI_RSP_GET_IRQ_MASK(cmd, *mask);
3082 +
3083 +       return 0;
3084 +}
3085 +
3086 +int dpdcei_set_irq_mask(struct fsl_mc_io *mc_io,
3087 +                       uint32_t cmd_flags,
3088 +                       uint16_t token,
3089 +                       uint8_t irq_index,
3090 +                       uint32_t mask)
3091 +{
3092 +       struct mc_command cmd = { 0 };
3093 +
3094 +       /* prepare command */
3095 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_SET_IRQ_MASK,
3096 +                                         cmd_flags,
3097 +                                         token);
3098 +       DPDCEI_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
3099 +
3100 +       /* send command to mc*/
3101 +       return mc_send_command(mc_io, &cmd);
3102 +}
3103 +
3104 +int dpdcei_get_irq_status(struct fsl_mc_io *mc_io,
3105 +                         uint32_t cmd_flags,
3106 +                         uint16_t token,
3107 +                         uint8_t irq_index,
3108 +                         uint32_t *status)
3109 +{
3110 +       struct mc_command cmd = { 0 };
3111 +       int err;
3112 +
3113 +       /* prepare command */
3114 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_IRQ_STATUS,
3115 +                                         cmd_flags,
3116 +                                         token);
3117 +       DPDCEI_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
3118 +
3119 +       /* send command to mc*/
3120 +       err = mc_send_command(mc_io, &cmd);
3121 +       if (err)
3122 +               return err;
3123 +
3124 +       /* retrieve response parameters */
3125 +       DPDCEI_RSP_GET_IRQ_STATUS(cmd, *status);
3126 +
3127 +       return 0;
3128 +}
3129 +
3130 +int dpdcei_clear_irq_status(struct fsl_mc_io *mc_io,
3131 +                           uint32_t cmd_flags,
3132 +                           uint16_t token,
3133 +                           uint8_t irq_index,
3134 +                           uint32_t status)
3135 +{
3136 +       struct mc_command cmd = { 0 };
3137 +
3138 +       /* prepare command */
3139 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_CLEAR_IRQ_STATUS,
3140 +                                         cmd_flags,
3141 +                                         token);
3142 +       DPDCEI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
3143 +
3144 +       /* send command to mc*/
3145 +       return mc_send_command(mc_io, &cmd);
3146 +}
3147 +
3148 +int dpdcei_get_attributes(struct fsl_mc_io *mc_io,
3149 +                         uint32_t cmd_flags,
3150 +                         uint16_t token,
3151 +                         struct dpdcei_attr *attr)
3152 +{
3153 +       struct mc_command cmd = { 0 };
3154 +       int err;
3155 +
3156 +       /* prepare command */
3157 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_ATTR,
3158 +                                         cmd_flags,
3159 +                                         token);
3160 +
3161 +       /* send command to mc*/
3162 +       err = mc_send_command(mc_io, &cmd);
3163 +       if (err)
3164 +               return err;
3165 +
3166 +       /* retrieve response parameters */
3167 +       DPDCEI_RSP_GET_ATTR(cmd, attr);
3168 +
3169 +       return 0;
3170 +}
3171 +
3172 +int dpdcei_set_rx_queue(struct fsl_mc_io *mc_io,
3173 +                       uint32_t cmd_flags,
3174 +                       uint16_t token,
3175 +                       const struct dpdcei_rx_queue_cfg *cfg)
3176 +{
3177 +       struct mc_command cmd = { 0 };
3178 +
3179 +       /* prepare command */
3180 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_SET_RX_QUEUE,
3181 +                                         cmd_flags,
3182 +                                         token);
3183 +       DPDCEI_CMD_SET_RX_QUEUE(cmd, cfg);
3184 +
3185 +       /* send command to mc*/
3186 +       return mc_send_command(mc_io, &cmd);
3187 +}
3188 +
3189 +int dpdcei_get_rx_queue(struct fsl_mc_io *mc_io,
3190 +                       uint32_t cmd_flags,
3191 +                       uint16_t token,
3192 +                       struct dpdcei_rx_queue_attr *attr)
3193 +{
3194 +       struct mc_command cmd = { 0 };
3195 +       int err;
3196 +
3197 +       /* prepare command */
3198 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_RX_QUEUE,
3199 +                                         cmd_flags,
3200 +                                         token);
3201 +
3202 +       /* send command to mc*/
3203 +       err = mc_send_command(mc_io, &cmd);
3204 +       if (err)
3205 +               return err;
3206 +
3207 +       /* retrieve response parameters */
3208 +       DPDCEI_RSP_GET_RX_QUEUE(cmd, attr);
3209 +
3210 +       return 0;
3211 +}
3212 +
3213 +int dpdcei_get_tx_queue(struct fsl_mc_io *mc_io,
3214 +                       uint32_t cmd_flags,
3215 +                       uint16_t token,
3216 +                       struct dpdcei_tx_queue_attr *attr)
3217 +{
3218 +       struct mc_command cmd = { 0 };
3219 +       int err;
3220 +
3221 +       /* prepare command */
3222 +       cmd.header = mc_encode_cmd_header(DPDCEI_CMDID_GET_TX_QUEUE,
3223 +                                         cmd_flags,
3224 +                                         token);
3225 +
3226 +       /* send command to mc*/
3227 +       err = mc_send_command(mc_io, &cmd);
3228 +       if (err)
3229 +               return err;
3230 +
3231 +       /* retrieve response parameters */
3232 +       DPDCEI_RSP_GET_TX_QUEUE(cmd, attr);
3233 +
3234 +       return 0;
3235 +}
3236 diff --git a/drivers/net/dpaa2/mc/dpdmai.c b/drivers/net/dpaa2/mc/dpdmai.c
3237 new file mode 100644
3238 index 0000000..154d2c6
3239 --- /dev/null
3240 +++ b/drivers/net/dpaa2/mc/dpdmai.c
3241 @@ -0,0 +1,452 @@
3242 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
3243 + *
3244 + * Redistribution and use in source and binary forms, with or without
3245 + * modification, are permitted provided that the following conditions are met:
3246 + * * Redistributions of source code must retain the above copyright
3247 + * notice, this list of conditions and the following disclaimer.
3248 + * * Redistributions in binary form must reproduce the above copyright
3249 + * notice, this list of conditions and the following disclaimer in the
3250 + * documentation and/or other materials provided with the distribution.
3251 + * * Neither the name of the above-listed copyright holders nor the
3252 + * names of any contributors may be used to endorse or promote products
3253 + * derived from this software without specific prior written permission.
3254 + *
3255 + *
3256 + * ALTERNATIVELY, this software may be distributed under the terms of the
3257 + * GNU General Public License ("GPL") as published by the Free Software
3258 + * Foundation, either version 2 of that License or (at your option) any
3259 + * later version.
3260 + *
3261 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
3262 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
3263 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
3264 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
3265 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
3266 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
3267 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
3268 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
3269 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
3270 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3271 + * POSSIBILITY OF SUCH DAMAGE.
3272 + */
3273 +#include <fsl_mc_sys.h>
3274 +#include <fsl_mc_cmd.h>
3275 +#include <fsl_dpdmai.h>
3276 +#include <fsl_dpdmai_cmd.h>
3277 +
3278 +int dpdmai_open(struct fsl_mc_io *mc_io,
3279 +               uint32_t cmd_flags,
3280 +               int dpdmai_id,
3281 +               uint16_t *token)
3282 +{
3283 +       struct mc_command cmd = { 0 };
3284 +       int err;
3285 +
3286 +       /* prepare command */
3287 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_OPEN,
3288 +                                         cmd_flags,
3289 +                                         0);
3290 +       DPDMAI_CMD_OPEN(cmd, dpdmai_id);
3291 +
3292 +       /* send command to mc*/
3293 +       err = mc_send_command(mc_io, &cmd);
3294 +       if (err)
3295 +               return err;
3296 +
3297 +       /* retrieve response parameters */
3298 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
3299 +
3300 +       return 0;
3301 +}
3302 +
3303 +int dpdmai_close(struct fsl_mc_io *mc_io,
3304 +                uint32_t cmd_flags,
3305 +                uint16_t token)
3306 +{
3307 +       struct mc_command cmd = { 0 };
3308 +
3309 +       /* prepare command */
3310 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_CLOSE,
3311 +                                         cmd_flags, token);
3312 +
3313 +       /* send command to mc*/
3314 +       return mc_send_command(mc_io, &cmd);
3315 +}
3316 +
3317 +int dpdmai_create(struct fsl_mc_io *mc_io,
3318 +                 uint32_t cmd_flags,
3319 +                 const struct dpdmai_cfg *cfg,
3320 +                 uint16_t *token)
3321 +{
3322 +       struct mc_command cmd = { 0 };
3323 +       int err;
3324 +
3325 +       /* prepare command */
3326 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_CREATE,
3327 +                                         cmd_flags,
3328 +                                         0);
3329 +       DPDMAI_CMD_CREATE(cmd, cfg);
3330 +
3331 +       /* send command to mc*/
3332 +       err = mc_send_command(mc_io, &cmd);
3333 +       if (err)
3334 +               return err;
3335 +
3336 +       /* retrieve response parameters */
3337 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
3338 +
3339 +       return 0;
3340 +}
3341 +
3342 +int dpdmai_destroy(struct fsl_mc_io *mc_io,
3343 +                  uint32_t cmd_flags,
3344 +                  uint16_t token)
3345 +{
3346 +       struct mc_command cmd = { 0 };
3347 +
3348 +       /* prepare command */
3349 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_DESTROY,
3350 +                                         cmd_flags,
3351 +                                         token);
3352 +
3353 +       /* send command to mc*/
3354 +       return mc_send_command(mc_io, &cmd);
3355 +}
3356 +
3357 +int dpdmai_enable(struct fsl_mc_io *mc_io,
3358 +                 uint32_t cmd_flags,
3359 +                 uint16_t token)
3360 +{
3361 +       struct mc_command cmd = { 0 };
3362 +
3363 +       /* prepare command */
3364 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_ENABLE,
3365 +                                         cmd_flags,
3366 +                                         token);
3367 +
3368 +       /* send command to mc*/
3369 +       return mc_send_command(mc_io, &cmd);
3370 +}
3371 +
3372 +int dpdmai_disable(struct fsl_mc_io *mc_io,
3373 +                  uint32_t cmd_flags,
3374 +                  uint16_t token)
3375 +{
3376 +       struct mc_command cmd = { 0 };
3377 +
3378 +       /* prepare command */
3379 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_DISABLE,
3380 +                                         cmd_flags,
3381 +                                         token);
3382 +
3383 +       /* send command to mc*/
3384 +       return mc_send_command(mc_io, &cmd);
3385 +}
3386 +
3387 +int dpdmai_is_enabled(struct fsl_mc_io *mc_io,
3388 +                     uint32_t cmd_flags,
3389 +                     uint16_t token,
3390 +                     int *en)
3391 +{
3392 +       struct mc_command cmd = { 0 };
3393 +       int err;
3394 +       /* prepare command */
3395 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_IS_ENABLED,
3396 +                                         cmd_flags,
3397 +                                         token);
3398 +
3399 +       /* send command to mc*/
3400 +       err = mc_send_command(mc_io, &cmd);
3401 +       if (err)
3402 +               return err;
3403 +
3404 +       /* retrieve response parameters */
3405 +       DPDMAI_RSP_IS_ENABLED(cmd, *en);
3406 +
3407 +       return 0;
3408 +}
3409 +
3410 +int dpdmai_reset(struct fsl_mc_io *mc_io,
3411 +                uint32_t cmd_flags,
3412 +                uint16_t token)
3413 +{
3414 +       struct mc_command cmd = { 0 };
3415 +
3416 +       /* prepare command */
3417 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_RESET,
3418 +                                         cmd_flags,
3419 +                                         token);
3420 +
3421 +       /* send command to mc*/
3422 +       return mc_send_command(mc_io, &cmd);
3423 +}
3424 +
3425 +int dpdmai_get_irq(struct fsl_mc_io *mc_io,
3426 +                  uint32_t cmd_flags,
3427 +                  uint16_t token,
3428 +                  uint8_t irq_index,
3429 +                  int *type,
3430 +                  struct dpdmai_irq_cfg        *irq_cfg)
3431 +{
3432 +       struct mc_command cmd = { 0 };
3433 +       int err;
3434 +
3435 +       /* prepare command */
3436 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_IRQ,
3437 +                                         cmd_flags,
3438 +                                         token);
3439 +       DPDMAI_CMD_GET_IRQ(cmd, irq_index);
3440 +
3441 +       /* send command to mc*/
3442 +       err = mc_send_command(mc_io, &cmd);
3443 +       if (err)
3444 +               return err;
3445 +
3446 +       /* retrieve response parameters */
3447 +       DPDMAI_RSP_GET_IRQ(cmd, *type, irq_cfg);
3448 +
3449 +       return 0;
3450 +}
3451 +
3452 +int dpdmai_set_irq(struct fsl_mc_io *mc_io,
3453 +                  uint32_t cmd_flags,
3454 +                  uint16_t token,
3455 +                  uint8_t irq_index,
3456 +                  struct dpdmai_irq_cfg *irq_cfg)
3457 +{
3458 +       struct mc_command cmd = { 0 };
3459 +
3460 +       /* prepare command */
3461 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_SET_IRQ,
3462 +                                         cmd_flags,
3463 +                                         token);
3464 +       DPDMAI_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
3465 +
3466 +       /* send command to mc*/
3467 +       return mc_send_command(mc_io, &cmd);
3468 +}
3469 +
3470 +int dpdmai_get_irq_enable(struct fsl_mc_io *mc_io,
3471 +                         uint32_t cmd_flags,
3472 +                         uint16_t token,
3473 +                         uint8_t irq_index,
3474 +                         uint8_t *en)
3475 +{
3476 +       struct mc_command cmd = { 0 };
3477 +       int err;
3478 +
3479 +       /* prepare command */
3480 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_IRQ_ENABLE,
3481 +                                         cmd_flags,
3482 +                                         token);
3483 +       DPDMAI_CMD_GET_IRQ_ENABLE(cmd, irq_index);
3484 +
3485 +       /* send command to mc*/
3486 +       err = mc_send_command(mc_io, &cmd);
3487 +       if (err)
3488 +               return err;
3489 +
3490 +       /* retrieve response parameters */
3491 +       DPDMAI_RSP_GET_IRQ_ENABLE(cmd, *en);
3492 +
3493 +       return 0;
3494 +}
3495 +
3496 +int dpdmai_set_irq_enable(struct fsl_mc_io *mc_io,
3497 +                         uint32_t cmd_flags,
3498 +                         uint16_t token,
3499 +                         uint8_t irq_index,
3500 +                         uint8_t en)
3501 +{
3502 +       struct mc_command cmd = { 0 };
3503 +
3504 +       /* prepare command */
3505 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_SET_IRQ_ENABLE,
3506 +                                         cmd_flags,
3507 +                                         token);
3508 +       DPDMAI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
3509 +
3510 +       /* send command to mc*/
3511 +       return mc_send_command(mc_io, &cmd);
3512 +}
3513 +
3514 +int dpdmai_get_irq_mask(struct fsl_mc_io *mc_io,
3515 +                       uint32_t cmd_flags,
3516 +                       uint16_t token,
3517 +                       uint8_t irq_index,
3518 +                       uint32_t *mask)
3519 +{
3520 +       struct mc_command cmd = { 0 };
3521 +       int err;
3522 +
3523 +       /* prepare command */
3524 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_IRQ_MASK,
3525 +                                         cmd_flags,
3526 +                                         token);
3527 +       DPDMAI_CMD_GET_IRQ_MASK(cmd, irq_index);
3528 +
3529 +       /* send command to mc*/
3530 +       err = mc_send_command(mc_io, &cmd);
3531 +       if (err)
3532 +               return err;
3533 +
3534 +       /* retrieve response parameters */
3535 +       DPDMAI_RSP_GET_IRQ_MASK(cmd, *mask);
3536 +
3537 +       return 0;
3538 +}
3539 +
3540 +int dpdmai_set_irq_mask(struct fsl_mc_io *mc_io,
3541 +                       uint32_t cmd_flags,
3542 +                       uint16_t token,
3543 +                       uint8_t irq_index,
3544 +                       uint32_t mask)
3545 +{
3546 +       struct mc_command cmd = { 0 };
3547 +
3548 +       /* prepare command */
3549 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_SET_IRQ_MASK,
3550 +                                         cmd_flags,
3551 +                                         token);
3552 +       DPDMAI_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
3553 +
3554 +       /* send command to mc*/
3555 +       return mc_send_command(mc_io, &cmd);
3556 +}
3557 +
3558 +int dpdmai_get_irq_status(struct fsl_mc_io *mc_io,
3559 +                         uint32_t cmd_flags,
3560 +                         uint16_t token,
3561 +                         uint8_t irq_index,
3562 +                         uint32_t *status)
3563 +{
3564 +       struct mc_command cmd = { 0 };
3565 +       int err;
3566 +
3567 +       /* prepare command */
3568 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_IRQ_STATUS,
3569 +                                         cmd_flags,
3570 +                                         token);
3571 +       DPDMAI_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
3572 +
3573 +       /* send command to mc*/
3574 +       err = mc_send_command(mc_io, &cmd);
3575 +       if (err)
3576 +               return err;
3577 +
3578 +       /* retrieve response parameters */
3579 +       DPDMAI_RSP_GET_IRQ_STATUS(cmd, *status);
3580 +
3581 +       return 0;
3582 +}
3583 +
3584 +int dpdmai_clear_irq_status(struct fsl_mc_io *mc_io,
3585 +                           uint32_t cmd_flags,
3586 +                           uint16_t token,
3587 +                           uint8_t irq_index,
3588 +                           uint32_t status)
3589 +{
3590 +       struct mc_command cmd = { 0 };
3591 +
3592 +       /* prepare command */
3593 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_CLEAR_IRQ_STATUS,
3594 +                                         cmd_flags,
3595 +                                         token);
3596 +       DPDMAI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
3597 +
3598 +       /* send command to mc*/
3599 +       return mc_send_command(mc_io, &cmd);
3600 +}
3601 +
3602 +int dpdmai_get_attributes(struct fsl_mc_io *mc_io,
3603 +                         uint32_t cmd_flags,
3604 +                         uint16_t token,
3605 +                         struct dpdmai_attr *attr)
3606 +{
3607 +       struct mc_command cmd = { 0 };
3608 +       int err;
3609 +
3610 +       /* prepare command */
3611 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_ATTR,
3612 +                                         cmd_flags,
3613 +                                         token);
3614 +
3615 +       /* send command to mc*/
3616 +       err = mc_send_command(mc_io, &cmd);
3617 +       if (err)
3618 +               return err;
3619 +
3620 +       /* retrieve response parameters */
3621 +       DPDMAI_RSP_GET_ATTR(cmd, attr);
3622 +
3623 +       return 0;
3624 +}
3625 +
3626 +int dpdmai_set_rx_queue(struct fsl_mc_io *mc_io,
3627 +                       uint32_t cmd_flags,
3628 +                       uint16_t token,
3629 +                       uint8_t priority,
3630 +                       const struct dpdmai_rx_queue_cfg *cfg)
3631 +{
3632 +       struct mc_command cmd = { 0 };
3633 +
3634 +       /* prepare command */
3635 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_SET_RX_QUEUE,
3636 +                                         cmd_flags,
3637 +                                         token);
3638 +       DPDMAI_CMD_SET_RX_QUEUE(cmd, priority, cfg);
3639 +
3640 +       /* send command to mc*/
3641 +       return mc_send_command(mc_io, &cmd);
3642 +}
3643 +
3644 +int dpdmai_get_rx_queue(struct fsl_mc_io *mc_io,
3645 +                       uint32_t cmd_flags,
3646 +                       uint16_t token,
3647 +                       uint8_t priority, struct dpdmai_rx_queue_attr *attr)
3648 +{
3649 +       struct mc_command cmd = { 0 };
3650 +       int err;
3651 +
3652 +       /* prepare command */
3653 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_RX_QUEUE,
3654 +                                         cmd_flags,
3655 +                                         token);
3656 +       DPDMAI_CMD_GET_RX_QUEUE(cmd, priority);
3657 +
3658 +       /* send command to mc*/
3659 +       err = mc_send_command(mc_io, &cmd);
3660 +       if (err)
3661 +               return err;
3662 +
3663 +       /* retrieve response parameters */
3664 +       DPDMAI_RSP_GET_RX_QUEUE(cmd, attr);
3665 +
3666 +       return 0;
3667 +}
3668 +
3669 +int dpdmai_get_tx_queue(struct fsl_mc_io *mc_io,
3670 +                       uint32_t cmd_flags,
3671 +                       uint16_t token,
3672 +                       uint8_t priority,
3673 +                       struct dpdmai_tx_queue_attr *attr)
3674 +{
3675 +       struct mc_command cmd = { 0 };
3676 +       int err;
3677 +
3678 +       /* prepare command */
3679 +       cmd.header = mc_encode_cmd_header(DPDMAI_CMDID_GET_TX_QUEUE,
3680 +                                         cmd_flags,
3681 +                                         token);
3682 +       DPDMAI_CMD_GET_TX_QUEUE(cmd, priority);
3683 +
3684 +       /* send command to mc*/
3685 +       err = mc_send_command(mc_io, &cmd);
3686 +       if (err)
3687 +               return err;
3688 +
3689 +       /* retrieve response parameters */
3690 +       DPDMAI_RSP_GET_TX_QUEUE(cmd, attr);
3691 +
3692 +       return 0;
3693 +}
3694 diff --git a/drivers/net/dpaa2/mc/dpdmux.c b/drivers/net/dpaa2/mc/dpdmux.c
3695 new file mode 100644
3696 index 0000000..dc07608
3697 --- /dev/null
3698 +++ b/drivers/net/dpaa2/mc/dpdmux.c
3699 @@ -0,0 +1,567 @@
3700 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
3701 + *
3702 + * Redistribution and use in source and binary forms, with or without
3703 + * modification, are permitted provided that the following conditions are met:
3704 + * * Redistributions of source code must retain the above copyright
3705 + * notice, this list of conditions and the following disclaimer.
3706 + * * Redistributions in binary form must reproduce the above copyright
3707 + * notice, this list of conditions and the following disclaimer in the
3708 + * documentation and/or other materials provided with the distribution.
3709 + * * Neither the name of the above-listed copyright holders nor the
3710 + * names of any contributors may be used to endorse or promote products
3711 + * derived from this software without specific prior written permission.
3712 + *
3713 + *
3714 + * ALTERNATIVELY, this software may be distributed under the terms of the
3715 + * GNU General Public License ("GPL") as published by the Free Software
3716 + * Foundation, either version 2 of that License or (at your option) any
3717 + * later version.
3718 + *
3719 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
3720 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
3721 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
3722 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
3723 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
3724 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
3725 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
3726 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
3727 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
3728 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3729 + * POSSIBILITY OF SUCH DAMAGE.
3730 + */
3731 +#include <fsl_mc_sys.h>
3732 +#include <fsl_mc_cmd.h>
3733 +#include <fsl_dpdmux.h>
3734 +#include <fsl_dpdmux_cmd.h>
3735 +
3736 +int dpdmux_open(struct fsl_mc_io *mc_io,
3737 +               uint32_t cmd_flags,
3738 +               int dpdmux_id,
3739 +               uint16_t *token)
3740 +{
3741 +       struct mc_command cmd = { 0 };
3742 +       int err;
3743 +
3744 +       /* prepare command */
3745 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_OPEN,
3746 +                                         cmd_flags,
3747 +                                         0);
3748 +       DPDMUX_CMD_OPEN(cmd, dpdmux_id);
3749 +
3750 +       /* send command to mc*/
3751 +       err = mc_send_command(mc_io, &cmd);
3752 +       if (err)
3753 +               return err;
3754 +
3755 +       /* retrieve response parameters */
3756 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
3757 +
3758 +       return 0;
3759 +}
3760 +
3761 +int dpdmux_close(struct fsl_mc_io *mc_io,
3762 +                uint32_t cmd_flags,
3763 +                uint16_t token)
3764 +{
3765 +       struct mc_command cmd = { 0 };
3766 +
3767 +       /* prepare command */
3768 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CLOSE,
3769 +                                         cmd_flags,
3770 +                                         token);
3771 +
3772 +       /* send command to mc*/
3773 +       return mc_send_command(mc_io, &cmd);
3774 +}
3775 +
3776 +int dpdmux_create(struct fsl_mc_io *mc_io,
3777 +                 uint32_t cmd_flags,
3778 +                 const struct dpdmux_cfg *cfg,
3779 +                 uint16_t *token)
3780 +{
3781 +       struct mc_command cmd = { 0 };
3782 +       int err;
3783 +
3784 +       /* prepare command */
3785 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CREATE,
3786 +                                         cmd_flags,
3787 +                                         0);
3788 +       DPDMUX_CMD_CREATE(cmd, cfg);
3789 +
3790 +       /* send command to mc*/
3791 +       err = mc_send_command(mc_io, &cmd);
3792 +       if (err)
3793 +               return err;
3794 +
3795 +       /* retrieve response parameters */
3796 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
3797 +
3798 +       return 0;
3799 +}
3800 +
3801 +int dpdmux_destroy(struct fsl_mc_io *mc_io,
3802 +                  uint32_t cmd_flags,
3803 +                  uint16_t token)
3804 +{
3805 +       struct mc_command cmd = { 0 };
3806 +
3807 +       /* prepare command */
3808 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_DESTROY,
3809 +                                         cmd_flags,
3810 +                                         token);
3811 +
3812 +       /* send command to mc*/
3813 +       return mc_send_command(mc_io, &cmd);
3814 +}
3815 +
3816 +int dpdmux_enable(struct fsl_mc_io *mc_io,
3817 +                 uint32_t cmd_flags,
3818 +                 uint16_t token)
3819 +{
3820 +       struct mc_command cmd = { 0 };
3821 +
3822 +       /* prepare command */
3823 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_ENABLE,
3824 +                                         cmd_flags,
3825 +                                         token);
3826 +
3827 +       /* send command to mc*/
3828 +       return mc_send_command(mc_io, &cmd);
3829 +}
3830 +
3831 +int dpdmux_disable(struct fsl_mc_io *mc_io,
3832 +                  uint32_t cmd_flags,
3833 +                  uint16_t token)
3834 +{
3835 +       struct mc_command cmd = { 0 };
3836 +
3837 +       /* prepare command */
3838 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_DISABLE,
3839 +                                         cmd_flags,
3840 +                                         token);
3841 +
3842 +       /* send command to mc*/
3843 +       return mc_send_command(mc_io, &cmd);
3844 +}
3845 +
3846 +int dpdmux_is_enabled(struct fsl_mc_io *mc_io,
3847 +                     uint32_t cmd_flags,
3848 +                     uint16_t token,
3849 +                     int *en)
3850 +{
3851 +       struct mc_command cmd = { 0 };
3852 +       int err;
3853 +       /* prepare command */
3854 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IS_ENABLED,
3855 +                                         cmd_flags,
3856 +                                         token);
3857 +
3858 +       /* send command to mc*/
3859 +       err = mc_send_command(mc_io, &cmd);
3860 +       if (err)
3861 +               return err;
3862 +
3863 +       /* retrieve response parameters */
3864 +       DPDMUX_RSP_IS_ENABLED(cmd, *en);
3865 +
3866 +       return 0;
3867 +}
3868 +
3869 +int dpdmux_reset(struct fsl_mc_io *mc_io,
3870 +                uint32_t cmd_flags,
3871 +                uint16_t token)
3872 +{
3873 +       struct mc_command cmd = { 0 };
3874 +
3875 +       /* prepare command */
3876 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_RESET,
3877 +                                         cmd_flags,
3878 +                                         token);
3879 +
3880 +       /* send command to mc*/
3881 +       return mc_send_command(mc_io, &cmd);
3882 +}
3883 +
3884 +int dpdmux_set_irq(struct fsl_mc_io    *mc_io,
3885 +                  uint32_t             cmd_flags,
3886 +                  uint16_t             token,
3887 +                  uint8_t              irq_index,
3888 +                  struct dpdmux_irq_cfg *irq_cfg)
3889 +{
3890 +       struct mc_command cmd = { 0 };
3891 +
3892 +       /* prepare command */
3893 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_IRQ,
3894 +                                         cmd_flags,
3895 +                                         token);
3896 +       DPDMUX_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
3897 +
3898 +       /* send command to mc*/
3899 +       return mc_send_command(mc_io, &cmd);
3900 +}
3901 +
3902 +int dpdmux_get_irq(struct fsl_mc_io *mc_io,
3903 +                  uint32_t cmd_flags,
3904 +                  uint16_t             token,
3905 +                  uint8_t              irq_index,
3906 +                  int                  *type,
3907 +                  struct dpdmux_irq_cfg *irq_cfg)
3908 +{
3909 +       struct mc_command cmd = { 0 };
3910 +       int err;
3911 +
3912 +       /* prepare command */
3913 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ,
3914 +                                         cmd_flags,
3915 +                                         token);
3916 +       DPDMUX_CMD_GET_IRQ(cmd, irq_index);
3917 +
3918 +       /* send command to mc*/
3919 +       err = mc_send_command(mc_io, &cmd);
3920 +       if (err)
3921 +               return err;
3922 +
3923 +       /* retrieve response parameters */
3924 +       DPDMUX_RSP_GET_IRQ(cmd, *type, irq_cfg);
3925 +
3926 +       return 0;
3927 +}
3928 +
3929 +int dpdmux_set_irq_enable(struct fsl_mc_io *mc_io,
3930 +                         uint32_t cmd_flags,
3931 +                         uint16_t token,
3932 +                         uint8_t irq_index,
3933 +                         uint8_t en)
3934 +{
3935 +       struct mc_command cmd = { 0 };
3936 +
3937 +       /* prepare command */
3938 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_IRQ_ENABLE,
3939 +                                         cmd_flags,
3940 +                                         token);
3941 +       DPDMUX_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
3942 +
3943 +       /* send command to mc*/
3944 +       return mc_send_command(mc_io, &cmd);
3945 +}
3946 +
3947 +int dpdmux_get_irq_enable(struct fsl_mc_io *mc_io,
3948 +                         uint32_t cmd_flags,
3949 +                         uint16_t token,
3950 +                         uint8_t irq_index,
3951 +                         uint8_t *en)
3952 +{
3953 +       struct mc_command cmd = { 0 };
3954 +       int err;
3955 +
3956 +       /* prepare command */
3957 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ_ENABLE,
3958 +                                         cmd_flags,
3959 +                                         token);
3960 +       DPDMUX_CMD_GET_IRQ_ENABLE(cmd, irq_index);
3961 +
3962 +       /* send command to mc*/
3963 +       err = mc_send_command(mc_io, &cmd);
3964 +       if (err)
3965 +               return err;
3966 +
3967 +       /* retrieve response parameters */
3968 +       DPDMUX_RSP_GET_IRQ_ENABLE(cmd, *en);
3969 +
3970 +       return 0;
3971 +}
3972 +
3973 +int dpdmux_set_irq_mask(struct fsl_mc_io *mc_io,
3974 +                       uint32_t cmd_flags,
3975 +                       uint16_t token,
3976 +                       uint8_t irq_index,
3977 +                       uint32_t mask)
3978 +{
3979 +       struct mc_command cmd = { 0 };
3980 +
3981 +       /* prepare command */
3982 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_IRQ_MASK,
3983 +                                         cmd_flags,
3984 +                                         token);
3985 +       DPDMUX_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
3986 +
3987 +       /* send command to mc*/
3988 +       return mc_send_command(mc_io, &cmd);
3989 +}
3990 +
3991 +int dpdmux_get_irq_mask(struct fsl_mc_io *mc_io,
3992 +                       uint32_t cmd_flags,
3993 +                       uint16_t token,
3994 +                       uint8_t irq_index,
3995 +                       uint32_t *mask)
3996 +{
3997 +       struct mc_command cmd = { 0 };
3998 +       int err;
3999 +
4000 +       /* prepare command */
4001 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ_MASK,
4002 +                                         cmd_flags,
4003 +                                         token);
4004 +       DPDMUX_CMD_GET_IRQ_MASK(cmd, irq_index);
4005 +
4006 +       /* send command to mc*/
4007 +       err = mc_send_command(mc_io, &cmd);
4008 +       if (err)
4009 +               return err;
4010 +
4011 +       /* retrieve response parameters */
4012 +       DPDMUX_RSP_GET_IRQ_MASK(cmd, *mask);
4013 +
4014 +       return 0;
4015 +}
4016 +
4017 +int dpdmux_get_irq_status(struct fsl_mc_io *mc_io,
4018 +                         uint32_t cmd_flags,
4019 +                         uint16_t token,
4020 +                         uint8_t irq_index,
4021 +                         uint32_t *status)
4022 +{
4023 +       struct mc_command cmd = { 0 };
4024 +       int err;
4025 +
4026 +       /* prepare command */
4027 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ_STATUS,
4028 +                                         cmd_flags,
4029 +                                         token);
4030 +       DPDMUX_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
4031 +
4032 +       /* send command to mc*/
4033 +       err = mc_send_command(mc_io, &cmd);
4034 +       if (err)
4035 +               return err;
4036 +
4037 +       /* retrieve response parameters */
4038 +       DPDMUX_RSP_GET_IRQ_STATUS(cmd, *status);
4039 +
4040 +       return 0;
4041 +}
4042 +
4043 +int dpdmux_clear_irq_status(struct fsl_mc_io *mc_io,
4044 +                           uint32_t cmd_flags,
4045 +                           uint16_t token,
4046 +                           uint8_t irq_index,
4047 +                           uint32_t status)
4048 +{
4049 +       struct mc_command cmd = { 0 };
4050 +
4051 +       /* prepare command */
4052 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CLEAR_IRQ_STATUS,
4053 +                                         cmd_flags,
4054 +                                         token);
4055 +       DPDMUX_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
4056 +
4057 +       /* send command to mc*/
4058 +       return mc_send_command(mc_io, &cmd);
4059 +}
4060 +
4061 +int dpdmux_get_attributes(struct fsl_mc_io *mc_io,
4062 +                         uint32_t cmd_flags,
4063 +                         uint16_t token,
4064 +                         struct dpdmux_attr *attr)
4065 +{
4066 +       struct mc_command cmd = { 0 };
4067 +       int err;
4068 +
4069 +       /* prepare command */
4070 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_ATTR,
4071 +                                         cmd_flags,
4072 +                                         token);
4073 +
4074 +       /* send command to mc*/
4075 +       err = mc_send_command(mc_io, &cmd);
4076 +       if (err)
4077 +               return err;
4078 +
4079 +       /* retrieve response parameters */
4080 +       DPDMUX_RSP_GET_ATTR(cmd, attr);
4081 +
4082 +       return 0;
4083 +}
4084 +
4085 +int dpdmux_ul_set_max_frame_length(struct fsl_mc_io *mc_io,
4086 +                                  uint32_t cmd_flags,
4087 +                                  uint16_t token,
4088 +                                  uint16_t max_frame_length)
4089 +{
4090 +       struct mc_command cmd = { 0 };
4091 +
4092 +       /* prepare command */
4093 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_UL_SET_MAX_FRAME_LENGTH,
4094 +                                         cmd_flags,
4095 +                                         token);
4096 +       DPDMUX_CMD_UL_SET_MAX_FRAME_LENGTH(cmd, max_frame_length);
4097 +
4098 +       /* send command to mc*/
4099 +       return mc_send_command(mc_io, &cmd);
4100 +}
4101 +
4102 +int dpdmux_ul_reset_counters(struct fsl_mc_io *mc_io,
4103 +                            uint32_t cmd_flags,
4104 +                            uint16_t token)
4105 +{
4106 +       struct mc_command cmd = { 0 };
4107 +
4108 +       /* prepare command */
4109 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_UL_RESET_COUNTERS,
4110 +                                         cmd_flags,
4111 +                                         token);
4112 +
4113 +       /* send command to mc*/
4114 +       return mc_send_command(mc_io, &cmd);
4115 +}
4116 +
4117 +int dpdmux_if_set_accepted_frames(struct fsl_mc_io *mc_io,
4118 +                                 uint32_t cmd_flags,
4119 +                                 uint16_t token,
4120 +                                 uint16_t if_id,
4121 +                                 const struct dpdmux_accepted_frames *cfg)
4122 +{
4123 +       struct mc_command cmd = { 0 };
4124 +
4125 +       /* prepare command */
4126 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_SET_ACCEPTED_FRAMES,
4127 +                                         cmd_flags,
4128 +                                         token);
4129 +       DPDMUX_CMD_IF_SET_ACCEPTED_FRAMES(cmd, if_id, cfg);
4130 +
4131 +       /* send command to mc*/
4132 +       return mc_send_command(mc_io, &cmd);
4133 +}
4134 +
4135 +int dpdmux_if_get_attributes(struct fsl_mc_io *mc_io,
4136 +                            uint32_t cmd_flags,
4137 +                            uint16_t token,
4138 +                            uint16_t if_id,
4139 +                            struct dpdmux_if_attr *attr)
4140 +{
4141 +       struct mc_command cmd = { 0 };
4142 +       int err;
4143 +
4144 +       /* prepare command */
4145 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_ATTR,
4146 +                                         cmd_flags,
4147 +                                         token);
4148 +       DPDMUX_CMD_IF_GET_ATTR(cmd, if_id);
4149 +
4150 +       /* send command to mc*/
4151 +       err = mc_send_command(mc_io, &cmd);
4152 +       if (err)
4153 +               return err;
4154 +
4155 +       /* retrieve response parameters */
4156 +       DPDMUX_RSP_IF_GET_ATTR(cmd, attr);
4157 +
4158 +       return 0;
4159 +}
4160 +
4161 +int dpdmux_if_remove_l2_rule(struct fsl_mc_io *mc_io,
4162 +                            uint32_t cmd_flags,
4163 +                            uint16_t token,
4164 +                            uint16_t if_id,
4165 +                            const struct dpdmux_l2_rule *rule)
4166 +{
4167 +       struct mc_command cmd = { 0 };
4168 +
4169 +       /* prepare command */
4170 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_REMOVE_L2_RULE,
4171 +                                         cmd_flags,
4172 +                                         token);
4173 +       DPDMUX_CMD_IF_REMOVE_L2_RULE(cmd, if_id, rule);
4174 +
4175 +       /* send command to mc*/
4176 +       return mc_send_command(mc_io, &cmd);
4177 +}
4178 +
4179 +int dpdmux_if_add_l2_rule(struct fsl_mc_io *mc_io,
4180 +                         uint32_t cmd_flags,
4181 +                         uint16_t token,
4182 +                         uint16_t if_id,
4183 +                         const struct dpdmux_l2_rule *rule)
4184 +{
4185 +       struct mc_command cmd = { 0 };
4186 +
4187 +       /* prepare command */
4188 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_ADD_L2_RULE,
4189 +                                         cmd_flags,
4190 +                                         token);
4191 +       DPDMUX_CMD_IF_ADD_L2_RULE(cmd, if_id, rule);
4192 +
4193 +       /* send command to mc*/
4194 +       return mc_send_command(mc_io, &cmd);
4195 +}
4196 +
4197 +int dpdmux_if_get_counter(struct fsl_mc_io             *mc_io,
4198 +                         uint32_t                      cmd_flags,
4199 +                         uint16_t                      token,
4200 +                         uint16_t                      if_id,
4201 +                         enum dpdmux_counter_type      counter_type,
4202 +                         uint64_t                      *counter)
4203 +{
4204 +       struct mc_command cmd = { 0 };
4205 +       int err;
4206 +
4207 +       /* prepare command */
4208 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_COUNTER,
4209 +                                         cmd_flags,
4210 +                                         token);
4211 +       DPDMUX_CMD_IF_GET_COUNTER(cmd, if_id, counter_type);
4212 +
4213 +       /* send command to mc*/
4214 +       err = mc_send_command(mc_io, &cmd);
4215 +       if (err)
4216 +               return err;
4217 +
4218 +       /* retrieve response parameters */
4219 +       DPDMUX_RSP_IF_GET_COUNTER(cmd, *counter);
4220 +
4221 +       return 0;
4222 +}
4223 +
4224 +int dpdmux_if_set_link_cfg(struct fsl_mc_io *mc_io,
4225 +                          uint32_t cmd_flags,
4226 +                          uint16_t token,
4227 +                          uint16_t if_id,
4228 +                          struct dpdmux_link_cfg *cfg)
4229 +{
4230 +       struct mc_command cmd = { 0 };
4231 +
4232 +       /* prepare command */
4233 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_SET_LINK_CFG,
4234 +                                         cmd_flags,
4235 +                                         token);
4236 +       DPDMUX_CMD_IF_SET_LINK_CFG(cmd, if_id, cfg);
4237 +
4238 +       /* send command to mc*/
4239 +       return mc_send_command(mc_io, &cmd);
4240 +}
4241 +
4242 +int dpdmux_if_get_link_state(struct fsl_mc_io *mc_io,
4243 +                            uint32_t cmd_flags,
4244 +                            uint16_t token,
4245 +                            uint16_t if_id,
4246 +                            struct dpdmux_link_state *state)
4247 +{
4248 +       struct mc_command cmd = { 0 };
4249 +       int err;
4250 +
4251 +       /* prepare command */
4252 +       cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_LINK_STATE,
4253 +                                         cmd_flags,
4254 +                                         token);
4255 +       DPDMUX_CMD_IF_GET_LINK_STATE(cmd, if_id);
4256 +
4257 +       /* send command to mc*/
4258 +       err = mc_send_command(mc_io, &cmd);
4259 +       if (err)
4260 +               return err;
4261 +
4262 +       /* retrieve response parameters */
4263 +       DPDMUX_RSP_IF_GET_LINK_STATE(cmd, state);
4264 +
4265 +       return 0;
4266 +}
4267 diff --git a/drivers/net/dpaa2/mc/dpio.c b/drivers/net/dpaa2/mc/dpio.c
4268 new file mode 100644
4269 index 0000000..f511e29
4270 --- /dev/null
4271 +++ b/drivers/net/dpaa2/mc/dpio.c
4272 @@ -0,0 +1,468 @@
4273 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
4274 + *
4275 + * Redistribution and use in source and binary forms, with or without
4276 + * modification, are permitted provided that the following conditions are met:
4277 + * * Redistributions of source code must retain the above copyright
4278 + * notice, this list of conditions and the following disclaimer.
4279 + * * Redistributions in binary form must reproduce the above copyright
4280 + * notice, this list of conditions and the following disclaimer in the
4281 + * documentation and/or other materials provided with the distribution.
4282 + * * Neither the name of the above-listed copyright holders nor the
4283 + * names of any contributors may be used to endorse or promote products
4284 + * derived from this software without specific prior written permission.
4285 + *
4286 + *
4287 + * ALTERNATIVELY, this software may be distributed under the terms of the
4288 + * GNU General Public License ("GPL") as published by the Free Software
4289 + * Foundation, either version 2 of that License or (at your option) any
4290 + * later version.
4291 + *
4292 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
4293 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
4294 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
4295 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
4296 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
4297 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
4298 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
4299 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
4300 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
4301 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
4302 + * POSSIBILITY OF SUCH DAMAGE.
4303 + */
4304 +#include <fsl_mc_sys.h>
4305 +#include <fsl_mc_cmd.h>
4306 +#include <fsl_dpio.h>
4307 +#include <fsl_dpio_cmd.h>
4308 +
4309 +int dpio_open(struct fsl_mc_io *mc_io,
4310 +             uint32_t cmd_flags,
4311 +             int dpio_id,
4312 +             uint16_t *token)
4313 +{
4314 +       struct mc_command cmd = { 0 };
4315 +       int err;
4316 +
4317 +       /* prepare command */
4318 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_OPEN,
4319 +                                         cmd_flags,
4320 +                                         0);
4321 +       DPIO_CMD_OPEN(cmd, dpio_id);
4322 +
4323 +       /* send command to mc*/
4324 +       err = mc_send_command(mc_io, &cmd);
4325 +       if (err)
4326 +               return err;
4327 +
4328 +       /* retrieve response parameters */
4329 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
4330 +
4331 +       return 0;
4332 +}
4333 +
4334 +int dpio_close(struct fsl_mc_io *mc_io,
4335 +              uint32_t cmd_flags,
4336 +              uint16_t token)
4337 +{
4338 +       struct mc_command cmd = { 0 };
4339 +
4340 +       /* prepare command */
4341 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_CLOSE,
4342 +                                         cmd_flags,
4343 +                                         token);
4344 +
4345 +       /* send command to mc*/
4346 +       return mc_send_command(mc_io, &cmd);
4347 +}
4348 +
4349 +int dpio_create(struct fsl_mc_io *mc_io,
4350 +               uint32_t cmd_flags,
4351 +               const struct dpio_cfg *cfg,
4352 +               uint16_t *token)
4353 +{
4354 +       struct mc_command cmd = { 0 };
4355 +       int err;
4356 +
4357 +       /* prepare command */
4358 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_CREATE,
4359 +                                         cmd_flags,
4360 +                                         0);
4361 +       DPIO_CMD_CREATE(cmd, cfg);
4362 +
4363 +       /* send command to mc*/
4364 +       err = mc_send_command(mc_io, &cmd);
4365 +       if (err)
4366 +               return err;
4367 +
4368 +       /* retrieve response parameters */
4369 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
4370 +
4371 +       return 0;
4372 +}
4373 +
4374 +int dpio_destroy(struct fsl_mc_io *mc_io,
4375 +                uint32_t cmd_flags,
4376 +                uint16_t token)
4377 +{
4378 +       struct mc_command cmd = { 0 };
4379 +
4380 +       /* prepare command */
4381 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_DESTROY,
4382 +                                         cmd_flags,
4383 +                                         token);
4384 +
4385 +       /* send command to mc*/
4386 +       return mc_send_command(mc_io, &cmd);
4387 +}
4388 +
4389 +int dpio_enable(struct fsl_mc_io *mc_io,
4390 +               uint32_t cmd_flags,
4391 +               uint16_t token)
4392 +{
4393 +       struct mc_command cmd = { 0 };
4394 +
4395 +       /* prepare command */
4396 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_ENABLE,
4397 +                                         cmd_flags,
4398 +                                         token);
4399 +
4400 +       /* send command to mc*/
4401 +       return mc_send_command(mc_io, &cmd);
4402 +}
4403 +
4404 +int dpio_disable(struct fsl_mc_io *mc_io,
4405 +                uint32_t cmd_flags,
4406 +                uint16_t token)
4407 +{
4408 +       struct mc_command cmd = { 0 };
4409 +
4410 +       /* prepare command */
4411 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_DISABLE,
4412 +                                         cmd_flags,
4413 +                                         token);
4414 +
4415 +       /* send command to mc*/
4416 +       return mc_send_command(mc_io, &cmd);
4417 +}
4418 +
4419 +int dpio_is_enabled(struct fsl_mc_io *mc_io,
4420 +                   uint32_t cmd_flags,
4421 +                   uint16_t token,
4422 +                   int *en)
4423 +{
4424 +       struct mc_command cmd = { 0 };
4425 +       int err;
4426 +       /* prepare command */
4427 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_IS_ENABLED, cmd_flags,
4428 +                                         token);
4429 +
4430 +       /* send command to mc*/
4431 +       err = mc_send_command(mc_io, &cmd);
4432 +       if (err)
4433 +               return err;
4434 +
4435 +       /* retrieve response parameters */
4436 +       DPIO_RSP_IS_ENABLED(cmd, *en);
4437 +
4438 +       return 0;
4439 +}
4440 +
4441 +int dpio_reset(struct fsl_mc_io *mc_io,
4442 +              uint32_t cmd_flags,
4443 +              uint16_t token)
4444 +{
4445 +       struct mc_command cmd = { 0 };
4446 +
4447 +       /* prepare command */
4448 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_RESET,
4449 +                                         cmd_flags,
4450 +                                         token);
4451 +
4452 +       /* send command to mc*/
4453 +       return mc_send_command(mc_io, &cmd);
4454 +}
4455 +
4456 +int dpio_set_irq(struct fsl_mc_io      *mc_io,
4457 +                uint32_t               cmd_flags,
4458 +                uint16_t               token,
4459 +                uint8_t                irq_index,
4460 +                struct dpio_irq_cfg    *irq_cfg)
4461 +{
4462 +       struct mc_command cmd = { 0 };
4463 +
4464 +       /* prepare command */
4465 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_IRQ,
4466 +                                         cmd_flags,
4467 +                                         token);
4468 +       DPIO_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
4469 +
4470 +       /* send command to mc*/
4471 +       return mc_send_command(mc_io, &cmd);
4472 +}
4473 +
4474 +int dpio_get_irq(struct fsl_mc_io      *mc_io,
4475 +                uint32_t               cmd_flags,
4476 +                uint16_t               token,
4477 +                uint8_t                irq_index,
4478 +                int                    *type,
4479 +                struct dpio_irq_cfg    *irq_cfg)
4480 +{
4481 +       struct mc_command cmd = { 0 };
4482 +       int err;
4483 +
4484 +       /* prepare command */
4485 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_IRQ,
4486 +                                         cmd_flags,
4487 +                                         token);
4488 +       DPIO_CMD_GET_IRQ(cmd, irq_index);
4489 +
4490 +       /* send command to mc*/
4491 +       err = mc_send_command(mc_io, &cmd);
4492 +       if (err)
4493 +               return err;
4494 +
4495 +       /* retrieve response parameters */
4496 +       DPIO_RSP_GET_IRQ(cmd, *type, irq_cfg);
4497 +
4498 +       return 0;
4499 +}
4500 +
4501 +int dpio_set_irq_enable(struct fsl_mc_io *mc_io,
4502 +                       uint32_t cmd_flags,
4503 +                       uint16_t token,
4504 +                       uint8_t irq_index,
4505 +                       uint8_t en)
4506 +{
4507 +       struct mc_command cmd = { 0 };
4508 +
4509 +       /* prepare command */
4510 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_IRQ_ENABLE,
4511 +                                         cmd_flags,
4512 +                                         token);
4513 +       DPIO_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
4514 +
4515 +       /* send command to mc*/
4516 +       return mc_send_command(mc_io, &cmd);
4517 +}
4518 +
4519 +int dpio_get_irq_enable(struct fsl_mc_io *mc_io,
4520 +                       uint32_t cmd_flags,
4521 +                       uint16_t token,
4522 +                       uint8_t irq_index,
4523 +                       uint8_t *en)
4524 +{
4525 +       struct mc_command cmd = { 0 };
4526 +       int err;
4527 +
4528 +       /* prepare command */
4529 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_IRQ_ENABLE,
4530 +                                         cmd_flags,
4531 +                                         token);
4532 +       DPIO_CMD_GET_IRQ_ENABLE(cmd, irq_index);
4533 +
4534 +       /* send command to mc*/
4535 +       err = mc_send_command(mc_io, &cmd);
4536 +       if (err)
4537 +               return err;
4538 +
4539 +       /* retrieve response parameters */
4540 +       DPIO_RSP_GET_IRQ_ENABLE(cmd, *en);
4541 +
4542 +       return 0;
4543 +}
4544 +
4545 +int dpio_set_irq_mask(struct fsl_mc_io *mc_io,
4546 +                     uint32_t cmd_flags,
4547 +                     uint16_t token,
4548 +                     uint8_t irq_index,
4549 +                     uint32_t mask)
4550 +{
4551 +       struct mc_command cmd = { 0 };
4552 +
4553 +       /* prepare command */
4554 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_IRQ_MASK,
4555 +                                         cmd_flags,
4556 +                                         token);
4557 +       DPIO_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
4558 +
4559 +       /* send command to mc*/
4560 +       return mc_send_command(mc_io, &cmd);
4561 +}
4562 +
4563 +int dpio_get_irq_mask(struct fsl_mc_io *mc_io,
4564 +                     uint32_t cmd_flags,
4565 +                     uint16_t token,
4566 +                     uint8_t irq_index,
4567 +                     uint32_t *mask)
4568 +{
4569 +       struct mc_command cmd = { 0 };
4570 +       int err;
4571 +
4572 +       /* prepare command */
4573 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_IRQ_MASK,
4574 +                                         cmd_flags,
4575 +                                         token);
4576 +       DPIO_CMD_GET_IRQ_MASK(cmd, irq_index);
4577 +
4578 +       /* send command to mc*/
4579 +       err = mc_send_command(mc_io, &cmd);
4580 +       if (err)
4581 +               return err;
4582 +
4583 +       /* retrieve response parameters */
4584 +       DPIO_RSP_GET_IRQ_MASK(cmd, *mask);
4585 +
4586 +       return 0;
4587 +}
4588 +
4589 +int dpio_get_irq_status(struct fsl_mc_io *mc_io,
4590 +                       uint32_t cmd_flags,
4591 +                       uint16_t token,
4592 +                       uint8_t irq_index,
4593 +                       uint32_t *status)
4594 +{
4595 +       struct mc_command cmd = { 0 };
4596 +       int err;
4597 +
4598 +       /* prepare command */
4599 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_IRQ_STATUS,
4600 +                                         cmd_flags,
4601 +                                         token);
4602 +       DPIO_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
4603 +
4604 +       /* send command to mc*/
4605 +       err = mc_send_command(mc_io, &cmd);
4606 +       if (err)
4607 +               return err;
4608 +
4609 +       /* retrieve response parameters */
4610 +       DPIO_RSP_GET_IRQ_STATUS(cmd, *status);
4611 +
4612 +       return 0;
4613 +}
4614 +
4615 +int dpio_clear_irq_status(struct fsl_mc_io *mc_io,
4616 +                         uint32_t cmd_flags,
4617 +                         uint16_t token,
4618 +                         uint8_t irq_index,
4619 +                         uint32_t status)
4620 +{
4621 +       struct mc_command cmd = { 0 };
4622 +
4623 +       /* prepare command */
4624 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_CLEAR_IRQ_STATUS,
4625 +                                         cmd_flags,
4626 +                                         token);
4627 +       DPIO_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
4628 +
4629 +       /* send command to mc*/
4630 +       return mc_send_command(mc_io, &cmd);
4631 +}
4632 +
4633 +int dpio_get_attributes(struct fsl_mc_io *mc_io,
4634 +                       uint32_t cmd_flags,
4635 +                       uint16_t token,
4636 +                       struct dpio_attr *attr)
4637 +{
4638 +       struct mc_command cmd = { 0 };
4639 +       int err;
4640 +
4641 +       /* prepare command */
4642 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_ATTR,
4643 +                                         cmd_flags,
4644 +                                         token);
4645 +
4646 +       /* send command to mc*/
4647 +       err = mc_send_command(mc_io, &cmd);
4648 +       if (err)
4649 +               return err;
4650 +
4651 +       /* retrieve response parameters */
4652 +       DPIO_RSP_GET_ATTR(cmd, attr);
4653 +
4654 +       return 0;
4655 +}
4656 +
4657 +int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
4658 +                                 uint32_t cmd_flags,
4659 +                                 uint16_t token,
4660 +                                 uint8_t sdest)
4661 +{
4662 +       struct mc_command cmd = { 0 };
4663 +
4664 +       /* prepare command */
4665 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_STASHING_DEST,
4666 +                                         cmd_flags,
4667 +                                         token);
4668 +       DPIO_CMD_SET_STASHING_DEST(cmd, sdest);
4669 +
4670 +       /* send command to mc*/
4671 +       return mc_send_command(mc_io, &cmd);
4672 +}
4673 +
4674 +int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
4675 +                                 uint32_t cmd_flags,
4676 +                                 uint16_t token,
4677 +                                 uint8_t *sdest)
4678 +{
4679 +       struct mc_command cmd = { 0 };
4680 +       int err;
4681 +
4682 +       /* prepare command */
4683 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_STASHING_DEST,
4684 +                                         cmd_flags,
4685 +                                         token);
4686 +
4687 +       /* send command to mc*/
4688 +       err = mc_send_command(mc_io, &cmd);
4689 +       if (err)
4690 +               return err;
4691 +
4692 +       /* retrieve response parameters */
4693 +       DPIO_RSP_GET_STASHING_DEST(cmd, *sdest);
4694 +
4695 +       return 0;
4696 +}
4697 +
4698 +int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
4699 +                                   uint32_t cmd_flags,
4700 +                                   uint16_t token,
4701 +                                   int dpcon_id,
4702 +                                   uint8_t *channel_index)
4703 +{
4704 +       struct mc_command cmd = { 0 };
4705 +       int err;
4706 +
4707 +       /* prepare command */
4708 +       cmd.header = mc_encode_cmd_header(DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL,
4709 +                                         cmd_flags,
4710 +                                         token);
4711 +       DPIO_CMD_ADD_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id);
4712 +
4713 +       /* send command to mc*/
4714 +       err = mc_send_command(mc_io, &cmd);
4715 +       if (err)
4716 +               return err;
4717 +
4718 +       /* retrieve response parameters */
4719 +       DPIO_RSP_ADD_STATIC_DEQUEUE_CHANNEL(cmd, *channel_index);
4720 +
4721 +       return 0;
4722 +}
4723 +
4724 +int dpio_remove_static_dequeue_channel(struct fsl_mc_io *mc_io,
4725 +                                      uint32_t cmd_flags,
4726 +                                      uint16_t token,
4727 +                                      int dpcon_id)
4728 +{
4729 +       struct mc_command cmd = { 0 };
4730 +
4731 +       /* prepare command */
4732 +       cmd.header = mc_encode_cmd_header(
4733 +                               DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL,
4734 +                               cmd_flags,
4735 +                               token);
4736 +       DPIO_CMD_REMOVE_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id);
4737 +
4738 +       /* send command to mc*/
4739 +       return mc_send_command(mc_io, &cmd);
4740 +}
4741 diff --git a/drivers/net/dpaa2/mc/dpmac.c b/drivers/net/dpaa2/mc/dpmac.c
4742 new file mode 100644
4743 index 0000000..f31d949
4744 --- /dev/null
4745 +++ b/drivers/net/dpaa2/mc/dpmac.c
4746 @@ -0,0 +1,422 @@
4747 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
4748 + *
4749 + * Redistribution and use in source and binary forms, with or without
4750 + * modification, are permitted provided that the following conditions are met:
4751 + * * Redistributions of source code must retain the above copyright
4752 + * notice, this list of conditions and the following disclaimer.
4753 + * * Redistributions in binary form must reproduce the above copyright
4754 + * notice, this list of conditions and the following disclaimer in the
4755 + * documentation and/or other materials provided with the distribution.
4756 + * * Neither the name of the above-listed copyright holders nor the
4757 + * names of any contributors may be used to endorse or promote products
4758 + * derived from this software without specific prior written permission.
4759 + *
4760 + *
4761 + * ALTERNATIVELY, this software may be distributed under the terms of the
4762 + * GNU General Public License ("GPL") as published by the Free Software
4763 + * Foundation, either version 2 of that License or (at your option) any
4764 + * later version.
4765 + *
4766 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
4767 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
4768 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
4769 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
4770 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
4771 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
4772 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
4773 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
4774 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
4775 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
4776 + * POSSIBILITY OF SUCH DAMAGE.
4777 + */
4778 +#include <fsl_mc_sys.h>
4779 +#include <fsl_mc_cmd.h>
4780 +#include <fsl_dpmac.h>
4781 +#include <fsl_dpmac_cmd.h>
4782 +
4783 +int dpmac_open(struct fsl_mc_io *mc_io,
4784 +              uint32_t cmd_flags,
4785 +              int dpmac_id,
4786 +              uint16_t *token)
4787 +{
4788 +       struct mc_command cmd = { 0 };
4789 +       int err;
4790 +
4791 +       /* prepare command */
4792 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_OPEN,
4793 +                                         cmd_flags,
4794 +                                         0);
4795 +       DPMAC_CMD_OPEN(cmd, dpmac_id);
4796 +
4797 +       /* send command to mc*/
4798 +       err = mc_send_command(mc_io, &cmd);
4799 +       if (err)
4800 +               return err;
4801 +
4802 +       /* retrieve response parameters */
4803 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
4804 +
4805 +       return err;
4806 +}
4807 +
4808 +int dpmac_close(struct fsl_mc_io *mc_io,
4809 +               uint32_t cmd_flags,
4810 +               uint16_t token)
4811 +{
4812 +       struct mc_command cmd = { 0 };
4813 +
4814 +       /* prepare command */
4815 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CLOSE, cmd_flags,
4816 +                                         token);
4817 +
4818 +       /* send command to mc*/
4819 +       return mc_send_command(mc_io, &cmd);
4820 +}
4821 +
4822 +int dpmac_create(struct fsl_mc_io *mc_io,
4823 +                uint32_t cmd_flags,
4824 +                const struct dpmac_cfg *cfg,
4825 +                uint16_t *token)
4826 +{
4827 +       struct mc_command cmd = { 0 };
4828 +       int err;
4829 +
4830 +       /* prepare command */
4831 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CREATE,
4832 +                                         cmd_flags,
4833 +                                         0);
4834 +       DPMAC_CMD_CREATE(cmd, cfg);
4835 +
4836 +       /* send command to mc*/
4837 +       err = mc_send_command(mc_io, &cmd);
4838 +       if (err)
4839 +               return err;
4840 +
4841 +       /* retrieve response parameters */
4842 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
4843 +
4844 +       return 0;
4845 +}
4846 +
4847 +int dpmac_destroy(struct fsl_mc_io *mc_io,
4848 +                 uint32_t cmd_flags,
4849 +                 uint16_t token)
4850 +{
4851 +       struct mc_command cmd = { 0 };
4852 +
4853 +       /* prepare command */
4854 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_DESTROY,
4855 +                                         cmd_flags,
4856 +                                         token);
4857 +
4858 +       /* send command to mc*/
4859 +       return mc_send_command(mc_io, &cmd);
4860 +}
4861 +
4862 +int dpmac_set_irq(struct fsl_mc_io     *mc_io,
4863 +                 uint32_t              cmd_flags,
4864 +                 uint16_t              token,
4865 +                 uint8_t               irq_index,
4866 +                 struct dpmac_irq_cfg  *irq_cfg)
4867 +{
4868 +       struct mc_command cmd = { 0 };
4869 +
4870 +       /* prepare command */
4871 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_IRQ,
4872 +                                         cmd_flags,
4873 +                                         token);
4874 +       DPMAC_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
4875 +
4876 +       /* send command to mc*/
4877 +       return mc_send_command(mc_io, &cmd);
4878 +}
4879 +
4880 +int dpmac_get_irq(struct fsl_mc_io     *mc_io,
4881 +                 uint32_t              cmd_flags,
4882 +                 uint16_t              token,
4883 +                 uint8_t               irq_index,
4884 +                 int                   *type,
4885 +                 struct dpmac_irq_cfg  *irq_cfg)
4886 +{
4887 +       struct mc_command cmd = { 0 };
4888 +       int err;
4889 +
4890 +       /* prepare command */
4891 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ,
4892 +                                         cmd_flags,
4893 +                                         token);
4894 +       DPMAC_CMD_GET_IRQ(cmd, irq_index);
4895 +
4896 +       /* send command to mc*/
4897 +       err = mc_send_command(mc_io, &cmd);
4898 +       if (err)
4899 +               return err;
4900 +
4901 +       /* retrieve response parameters */
4902 +       DPMAC_RSP_GET_IRQ(cmd, *type, irq_cfg);
4903 +
4904 +       return 0;
4905 +}
4906 +
4907 +int dpmac_set_irq_enable(struct fsl_mc_io *mc_io,
4908 +                        uint32_t cmd_flags,
4909 +                        uint16_t token,
4910 +                        uint8_t irq_index,
4911 +                        uint8_t en)
4912 +{
4913 +       struct mc_command cmd = { 0 };
4914 +
4915 +       /* prepare command */
4916 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_IRQ_ENABLE,
4917 +                                         cmd_flags,
4918 +                                         token);
4919 +       DPMAC_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
4920 +
4921 +       /* send command to mc*/
4922 +       return mc_send_command(mc_io, &cmd);
4923 +}
4924 +
4925 +int dpmac_get_irq_enable(struct fsl_mc_io *mc_io,
4926 +                        uint32_t cmd_flags,
4927 +                        uint16_t token,
4928 +                        uint8_t irq_index,
4929 +                        uint8_t *en)
4930 +{
4931 +       struct mc_command cmd = { 0 };
4932 +       int err;
4933 +
4934 +       /* prepare command */
4935 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ_ENABLE,
4936 +                                         cmd_flags,
4937 +                                         token);
4938 +       DPMAC_CMD_GET_IRQ_ENABLE(cmd, irq_index);
4939 +
4940 +       /* send command to mc*/
4941 +       err = mc_send_command(mc_io, &cmd);
4942 +       if (err)
4943 +               return err;
4944 +
4945 +       /* retrieve response parameters */
4946 +       DPMAC_RSP_GET_IRQ_ENABLE(cmd, *en);
4947 +
4948 +       return 0;
4949 +}
4950 +
4951 +int dpmac_set_irq_mask(struct fsl_mc_io *mc_io,
4952 +                      uint32_t cmd_flags,
4953 +                      uint16_t token,
4954 +                      uint8_t irq_index,
4955 +                      uint32_t mask)
4956 +{
4957 +       struct mc_command cmd = { 0 };
4958 +
4959 +       /* prepare command */
4960 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_IRQ_MASK,
4961 +                                         cmd_flags,
4962 +                                         token);
4963 +       DPMAC_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
4964 +
4965 +       /* send command to mc*/
4966 +       return mc_send_command(mc_io, &cmd);
4967 +}
4968 +
4969 +int dpmac_get_irq_mask(struct fsl_mc_io *mc_io,
4970 +                      uint32_t cmd_flags,
4971 +                      uint16_t token,
4972 +                      uint8_t irq_index,
4973 +                      uint32_t *mask)
4974 +{
4975 +       struct mc_command cmd = { 0 };
4976 +       int err;
4977 +
4978 +       /* prepare command */
4979 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ_MASK,
4980 +                                         cmd_flags,
4981 +                                         token);
4982 +       DPMAC_CMD_GET_IRQ_MASK(cmd, irq_index);
4983 +
4984 +       /* send command to mc*/
4985 +       err = mc_send_command(mc_io, &cmd);
4986 +       if (err)
4987 +               return err;
4988 +
4989 +       /* retrieve response parameters */
4990 +       DPMAC_RSP_GET_IRQ_MASK(cmd, *mask);
4991 +
4992 +       return 0;
4993 +}
4994 +
4995 +int dpmac_get_irq_status(struct fsl_mc_io *mc_io,
4996 +                        uint32_t cmd_flags,
4997 +                        uint16_t token,
4998 +                        uint8_t irq_index,
4999 +                        uint32_t *status)
5000 +{
5001 +       struct mc_command cmd = { 0 };
5002 +       int err;
5003 +
5004 +       /* prepare command */
5005 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ_STATUS,
5006 +                                         cmd_flags,
5007 +                                         token);
5008 +       DPMAC_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
5009 +
5010 +       /* send command to mc*/
5011 +       err = mc_send_command(mc_io, &cmd);
5012 +       if (err)
5013 +               return err;
5014 +
5015 +       /* retrieve response parameters */
5016 +       DPMAC_RSP_GET_IRQ_STATUS(cmd, *status);
5017 +
5018 +       return 0;
5019 +}
5020 +
5021 +int dpmac_clear_irq_status(struct fsl_mc_io *mc_io,
5022 +                          uint32_t cmd_flags,
5023 +                          uint16_t token,
5024 +                          uint8_t irq_index,
5025 +                          uint32_t status)
5026 +{
5027 +       struct mc_command cmd = { 0 };
5028 +
5029 +       /* prepare command */
5030 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CLEAR_IRQ_STATUS,
5031 +                                         cmd_flags,
5032 +                                         token);
5033 +       DPMAC_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
5034 +
5035 +       /* send command to mc*/
5036 +       return mc_send_command(mc_io, &cmd);
5037 +}
5038 +
5039 +int dpmac_get_attributes(struct fsl_mc_io *mc_io,
5040 +                        uint32_t cmd_flags,
5041 +                        uint16_t token,
5042 +                        struct dpmac_attr *attr)
5043 +{
5044 +       struct mc_command cmd = { 0 };
5045 +       int err;
5046 +
5047 +       /* prepare command */
5048 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_ATTR,
5049 +                                         cmd_flags,
5050 +                                         token);
5051 +
5052 +       /* send command to mc*/
5053 +       err = mc_send_command(mc_io, &cmd);
5054 +       if (err)
5055 +               return err;
5056 +
5057 +       /* retrieve response parameters */
5058 +       DPMAC_RSP_GET_ATTRIBUTES(cmd, attr);
5059 +
5060 +       return 0;
5061 +}
5062 +
5063 +int dpmac_mdio_read(struct fsl_mc_io *mc_io,
5064 +                   uint32_t cmd_flags,
5065 +                   uint16_t token,
5066 +                   struct dpmac_mdio_cfg *cfg)
5067 +{
5068 +       struct mc_command cmd = { 0 };
5069 +       int err;
5070 +
5071 +       /* prepare command */
5072 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_MDIO_READ,
5073 +                                         cmd_flags,
5074 +                                         token);
5075 +       DPMAC_CMD_MDIO_READ(cmd, cfg);
5076 +
5077 +       /* send command to mc*/
5078 +       err = mc_send_command(mc_io, &cmd);
5079 +       if (err)
5080 +               return err;
5081 +
5082 +       /* retrieve response parameters */
5083 +       DPMAC_RSP_MDIO_READ(cmd, cfg->data);
5084 +
5085 +       return 0;
5086 +}
5087 +
5088 +int dpmac_mdio_write(struct fsl_mc_io *mc_io,
5089 +                    uint32_t cmd_flags,
5090 +                    uint16_t token,
5091 +                    struct dpmac_mdio_cfg *cfg)
5092 +{
5093 +       struct mc_command cmd = { 0 };
5094 +
5095 +       /* prepare command */
5096 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_MDIO_WRITE,
5097 +                                         cmd_flags,
5098 +                                         token);
5099 +       DPMAC_CMD_MDIO_WRITE(cmd, cfg);
5100 +
5101 +       /* send command to mc*/
5102 +       return mc_send_command(mc_io, &cmd);
5103 +}
5104 +
5105 +int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,
5106 +                      uint32_t cmd_flags,
5107 +                      uint16_t token,
5108 +                      struct dpmac_link_cfg *cfg)
5109 +{
5110 +       struct mc_command cmd = { 0 };
5111 +       int err = 0;
5112 +
5113 +       /* prepare command */
5114 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_LINK_CFG,
5115 +                                         cmd_flags,
5116 +                                         token);
5117 +
5118 +       /* send command to mc*/
5119 +       err = mc_send_command(mc_io, &cmd);
5120 +       if (err)
5121 +               return err;
5122 +
5123 +       DPMAC_RSP_GET_LINK_CFG(cmd, cfg);
5124 +
5125 +       return 0;
5126 +}
5127 +
5128 +int dpmac_set_link_state(struct fsl_mc_io *mc_io,
5129 +                        uint32_t cmd_flags,
5130 +                        uint16_t token,
5131 +                        struct dpmac_link_state *link_state)
5132 +{
5133 +       struct mc_command cmd = { 0 };
5134 +
5135 +       /* prepare command */
5136 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_LINK_STATE,
5137 +                                         cmd_flags,
5138 +                                         token);
5139 +       DPMAC_CMD_SET_LINK_STATE(cmd, link_state);
5140 +
5141 +       /* send command to mc*/
5142 +       return mc_send_command(mc_io, &cmd);
5143 +}
5144 +
5145 +int dpmac_get_counter(struct fsl_mc_io *mc_io,
5146 +                     uint32_t cmd_flags,
5147 +                     uint16_t token,
5148 +                     enum dpmac_counter type,
5149 +                     uint64_t *counter)
5150 +{
5151 +       struct mc_command cmd = { 0 };
5152 +       int err = 0;
5153 +
5154 +       /* prepare command */
5155 +       cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_COUNTER,
5156 +                                         cmd_flags,
5157 +                                         token);
5158 +       DPMAC_CMD_GET_COUNTER(cmd, type);
5159 +
5160 +       /* send command to mc*/
5161 +       err = mc_send_command(mc_io, &cmd);
5162 +       if (err)
5163 +               return err;
5164 +
5165 +       DPMAC_RSP_GET_COUNTER(cmd, *counter);
5166 +
5167 +       return 0;
5168 +}
5169 diff --git a/drivers/net/dpaa2/mc/dpmcp.c b/drivers/net/dpaa2/mc/dpmcp.c
5170 new file mode 100644
5171 index 0000000..dfd84b8
5172 --- /dev/null
5173 +++ b/drivers/net/dpaa2/mc/dpmcp.c
5174 @@ -0,0 +1,312 @@
5175 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
5176 + *
5177 + * Redistribution and use in source and binary forms, with or without
5178 + * modification, are permitted provided that the following conditions are met:
5179 + * * Redistributions of source code must retain the above copyright
5180 + * notice, this list of conditions and the following disclaimer.
5181 + * * Redistributions in binary form must reproduce the above copyright
5182 + * notice, this list of conditions and the following disclaimer in the
5183 + * documentation and/or other materials provided with the distribution.
5184 + * * Neither the name of the above-listed copyright holders nor the
5185 + * names of any contributors may be used to endorse or promote products
5186 + * derived from this software without specific prior written permission.
5187 + *
5188 + *
5189 + * ALTERNATIVELY, this software may be distributed under the terms of the
5190 + * GNU General Public License ("GPL") as published by the Free Software
5191 + * Foundation, either version 2 of that License or (at your option) any
5192 + * later version.
5193 + *
5194 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
5195 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
5196 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
5197 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
5198 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
5199 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
5200 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
5201 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
5202 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
5203 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
5204 + * POSSIBILITY OF SUCH DAMAGE.
5205 + */
5206 +#include <fsl_mc_sys.h>
5207 +#include <fsl_mc_cmd.h>
5208 +#include <fsl_dpmcp.h>
5209 +#include <fsl_dpmcp_cmd.h>
5210 +
5211 +int dpmcp_open(struct fsl_mc_io *mc_io,
5212 +              uint32_t cmd_flags,
5213 +       int dpmcp_id,
5214 +       uint16_t *token)
5215 +{
5216 +       struct mc_command cmd = { 0 };
5217 +       int err;
5218 +
5219 +       /* prepare command */
5220 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_OPEN,
5221 +                                         cmd_flags,
5222 +                                         0);
5223 +       DPMCP_CMD_OPEN(cmd, dpmcp_id);
5224 +
5225 +       /* send command to mc*/
5226 +       err = mc_send_command(mc_io, &cmd);
5227 +       if (err)
5228 +               return err;
5229 +
5230 +       /* retrieve response parameters */
5231 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
5232 +
5233 +       return err;
5234 +}
5235 +
5236 +int dpmcp_close(struct fsl_mc_io *mc_io,
5237 +               uint32_t cmd_flags,
5238 +               uint16_t token)
5239 +{
5240 +       struct mc_command cmd = { 0 };
5241 +
5242 +       /* prepare command */
5243 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CLOSE, cmd_flags,
5244 +                                         token);
5245 +
5246 +       /* send command to mc*/
5247 +       return mc_send_command(mc_io, &cmd);
5248 +}
5249 +
5250 +int dpmcp_create(struct fsl_mc_io *mc_io,
5251 +                uint32_t cmd_flags,
5252 +                const struct dpmcp_cfg *cfg,
5253 +                uint16_t *token)
5254 +{
5255 +       struct mc_command cmd = { 0 };
5256 +       int err;
5257 +
5258 +       /* prepare command */
5259 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CREATE,
5260 +                                         cmd_flags,
5261 +                                         0);
5262 +       DPMCP_CMD_CREATE(cmd, cfg);
5263 +
5264 +       /* send command to mc*/
5265 +       err = mc_send_command(mc_io, &cmd);
5266 +       if (err)
5267 +               return err;
5268 +
5269 +       /* retrieve response parameters */
5270 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
5271 +
5272 +       return 0;
5273 +}
5274 +
5275 +int dpmcp_destroy(struct fsl_mc_io *mc_io,
5276 +                 uint32_t cmd_flags,
5277 +                 uint16_t token)
5278 +{
5279 +       struct mc_command cmd = { 0 };
5280 +
5281 +       /* prepare command */
5282 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_DESTROY,
5283 +                                         cmd_flags,
5284 +                                         token);
5285 +
5286 +       /* send command to mc*/
5287 +       return mc_send_command(mc_io, &cmd);
5288 +}
5289 +
5290 +int dpmcp_reset(struct fsl_mc_io *mc_io,
5291 +               uint32_t cmd_flags,
5292 +               uint16_t token)
5293 +{
5294 +       struct mc_command cmd = { 0 };
5295 +
5296 +       /* prepare command */
5297 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_RESET,
5298 +                                         cmd_flags,
5299 +                                         token);
5300 +
5301 +       /* send command to mc*/
5302 +       return mc_send_command(mc_io, &cmd);
5303 +}
5304 +
5305 +int dpmcp_set_irq(struct fsl_mc_io     *mc_io,
5306 +                 uint32_t              cmd_flags,
5307 +                 uint16_t              token,
5308 +                 uint8_t               irq_index,
5309 +                 struct dpmcp_irq_cfg  *irq_cfg)
5310 +{
5311 +       struct mc_command cmd = { 0 };
5312 +
5313 +       /* prepare command */
5314 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ,
5315 +                                         cmd_flags,
5316 +                                         token);
5317 +       DPMCP_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
5318 +
5319 +       /* send command to mc*/
5320 +       return mc_send_command(mc_io, &cmd);
5321 +}
5322 +
5323 +int dpmcp_get_irq(struct fsl_mc_io     *mc_io,
5324 +                 uint32_t              cmd_flags,
5325 +                 uint16_t              token,
5326 +                 uint8_t               irq_index,
5327 +                 int                   *type,
5328 +                 struct dpmcp_irq_cfg  *irq_cfg)
5329 +{
5330 +       struct mc_command cmd = { 0 };
5331 +       int err;
5332 +
5333 +       /* prepare command */
5334 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ,
5335 +                                         cmd_flags,
5336 +                                         token);
5337 +       DPMCP_CMD_GET_IRQ(cmd, irq_index);
5338 +
5339 +       /* send command to mc*/
5340 +       err = mc_send_command(mc_io, &cmd);
5341 +       if (err)
5342 +               return err;
5343 +
5344 +       /* retrieve response parameters */
5345 +       DPMCP_RSP_GET_IRQ(cmd, *type, irq_cfg);
5346 +
5347 +       return 0;
5348 +}
5349 +
5350 +int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
5351 +                        uint32_t cmd_flags,
5352 +                        uint16_t token,
5353 +                        uint8_t irq_index,
5354 +                        uint8_t en)
5355 +{
5356 +       struct mc_command cmd = { 0 };
5357 +
5358 +       /* prepare command */
5359 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_ENABLE,
5360 +                                         cmd_flags,
5361 +                                         token);
5362 +       DPMCP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
5363 +
5364 +       /* send command to mc*/
5365 +       return mc_send_command(mc_io, &cmd);
5366 +}
5367 +
5368 +int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
5369 +                        uint32_t cmd_flags,
5370 +                        uint16_t token,
5371 +                        uint8_t irq_index,
5372 +                        uint8_t *en)
5373 +{
5374 +       struct mc_command cmd = { 0 };
5375 +       int err;
5376 +
5377 +       /* prepare command */
5378 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_ENABLE,
5379 +                                         cmd_flags,
5380 +                                         token);
5381 +       DPMCP_CMD_GET_IRQ_ENABLE(cmd, irq_index);
5382 +
5383 +       /* send command to mc*/
5384 +       err = mc_send_command(mc_io, &cmd);
5385 +       if (err)
5386 +               return err;
5387 +
5388 +       /* retrieve response parameters */
5389 +       DPMCP_RSP_GET_IRQ_ENABLE(cmd, *en);
5390 +
5391 +       return 0;
5392 +}
5393 +
5394 +int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
5395 +                      uint32_t cmd_flags,
5396 +                      uint16_t token,
5397 +                      uint8_t irq_index,
5398 +                      uint32_t mask)
5399 +{
5400 +       struct mc_command cmd = { 0 };
5401 +
5402 +       /* prepare command */
5403 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_MASK,
5404 +                                         cmd_flags,
5405 +                                         token);
5406 +       DPMCP_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
5407 +
5408 +       /* send command to mc*/
5409 +       return mc_send_command(mc_io, &cmd);
5410 +}
5411 +
5412 +int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
5413 +                      uint32_t cmd_flags,
5414 +                      uint16_t token,
5415 +                      uint8_t irq_index,
5416 +                      uint32_t *mask)
5417 +{
5418 +       struct mc_command cmd = { 0 };
5419 +       int err;
5420 +
5421 +       /* prepare command */
5422 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_MASK,
5423 +                                         cmd_flags,
5424 +                                         token);
5425 +       DPMCP_CMD_GET_IRQ_MASK(cmd, irq_index);
5426 +
5427 +       /* send command to mc*/
5428 +       err = mc_send_command(mc_io, &cmd);
5429 +       if (err)
5430 +               return err;
5431 +
5432 +       /* retrieve response parameters */
5433 +       DPMCP_RSP_GET_IRQ_MASK(cmd, *mask);
5434 +
5435 +       return 0;
5436 +}
5437 +
5438 +int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
5439 +                        uint32_t cmd_flags,
5440 +                        uint16_t token,
5441 +                        uint8_t irq_index,
5442 +                        uint32_t *status)
5443 +{
5444 +       struct mc_command cmd = { 0 };
5445 +       int err;
5446 +
5447 +       /* prepare command */
5448 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_STATUS,
5449 +                                         cmd_flags,
5450 +                                         token);
5451 +       DPMCP_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
5452 +
5453 +       /* send command to mc*/
5454 +       err = mc_send_command(mc_io, &cmd);
5455 +       if (err)
5456 +               return err;
5457 +
5458 +       /* retrieve response parameters */
5459 +       DPMCP_RSP_GET_IRQ_STATUS(cmd, *status);
5460 +
5461 +       return 0;
5462 +}
5463 +
5464 +int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
5465 +                        uint32_t cmd_flags,
5466 +                        uint16_t token,
5467 +                        struct dpmcp_attr *attr)
5468 +{
5469 +       struct mc_command cmd = { 0 };
5470 +       int err;
5471 +
5472 +       /* prepare command */
5473 +       cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_ATTR,
5474 +                                         cmd_flags,
5475 +                                         token);
5476 +
5477 +       /* send command to mc*/
5478 +       err = mc_send_command(mc_io, &cmd);
5479 +       if (err)
5480 +               return err;
5481 +
5482 +       /* retrieve response parameters */
5483 +       DPMCP_RSP_GET_ATTRIBUTES(cmd, attr);
5484 +
5485 +       return 0;
5486 +}
5487 diff --git a/drivers/net/dpaa2/mc/dpmng.c b/drivers/net/dpaa2/mc/dpmng.c
5488 new file mode 100644
5489 index 0000000..cac5ba5
5490 --- /dev/null
5491 +++ b/drivers/net/dpaa2/mc/dpmng.c
5492 @@ -0,0 +1,58 @@
5493 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
5494 + *
5495 + * Redistribution and use in source and binary forms, with or without
5496 + * modification, are permitted provided that the following conditions are met:
5497 + * * Redistributions of source code must retain the above copyright
5498 + * notice, this list of conditions and the following disclaimer.
5499 + * * Redistributions in binary form must reproduce the above copyright
5500 + * notice, this list of conditions and the following disclaimer in the
5501 + * documentation and/or other materials provided with the distribution.
5502 + * * Neither the name of the above-listed copyright holders nor the
5503 + * names of any contributors may be used to endorse or promote products
5504 + * derived from this software without specific prior written permission.
5505 + *
5506 + *
5507 + * ALTERNATIVELY, this software may be distributed under the terms of the
5508 + * GNU General Public License ("GPL") as published by the Free Software
5509 + * Foundation, either version 2 of that License or (at your option) any
5510 + * later version.
5511 + *
5512 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
5513 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
5514 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
5515 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
5516 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
5517 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
5518 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
5519 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
5520 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
5521 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
5522 + * POSSIBILITY OF SUCH DAMAGE.
5523 + */
5524 +#include <fsl_mc_sys.h>
5525 +#include <fsl_mc_cmd.h>
5526 +#include <fsl_dpmng.h>
5527 +#include <fsl_dpmng_cmd.h>
5528 +
5529 +int mc_get_version(struct fsl_mc_io *mc_io,
5530 +                  uint32_t cmd_flags,
5531 +                  struct mc_version *mc_ver_info)
5532 +{
5533 +       struct mc_command cmd = { 0 };
5534 +       int err;
5535 +
5536 +       /* prepare command */
5537 +       cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION,
5538 +                                         cmd_flags,
5539 +                                         0);
5540 +
5541 +       /* send command to mc*/
5542 +       err = mc_send_command(mc_io, &cmd);
5543 +       if (err)
5544 +               return err;
5545 +
5546 +       /* retrieve response parameters */
5547 +       DPMNG_RSP_GET_VERSION(cmd, mc_ver_info);
5548 +
5549 +       return 0;
5550 +}
5551 diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
5552 new file mode 100644
5553 index 0000000..cdd2f37
5554 --- /dev/null
5555 +++ b/drivers/net/dpaa2/mc/dpni.c
5556 @@ -0,0 +1,1907 @@
5557 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
5558 + *
5559 + * Redistribution and use in source and binary forms, with or without
5560 + * modification, are permitted provided that the following conditions are met:
5561 + * * Redistributions of source code must retain the above copyright
5562 + * notice, this list of conditions and the following disclaimer.
5563 + * * Redistributions in binary form must reproduce the above copyright
5564 + * notice, this list of conditions and the following disclaimer in the
5565 + * documentation and/or other materials provided with the distribution.
5566 + * * Neither the name of the above-listed copyright holders nor the
5567 + * names of any contributors may be used to endorse or promote products
5568 + * derived from this software without specific prior written permission.
5569 + *
5570 + *
5571 + * ALTERNATIVELY, this software may be distributed under the terms of the
5572 + * GNU General Public License ("GPL") as published by the Free Software
5573 + * Foundation, either version 2 of that License or (at your option) any
5574 + * later version.
5575 + *
5576 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
5577 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
5578 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
5579 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
5580 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
5581 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
5582 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
5583 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
5584 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
5585 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
5586 + * POSSIBILITY OF SUCH DAMAGE.
5587 + */
5588 +#include <fsl_mc_sys.h>
5589 +#include <fsl_mc_cmd.h>
5590 +#include <fsl_dpni.h>
5591 +#include <fsl_dpni_cmd.h>
5592 +
5593 +int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
5594 +                        uint8_t *key_cfg_buf)
5595 +{
5596 +       int i, j;
5597 +       int offset = 0;
5598 +       int param = 1;
5599 +       uint64_t *params = (uint64_t *)key_cfg_buf;
5600 +
5601 +       if (!key_cfg_buf || !cfg)
5602 +                       return -EINVAL;
5603 +
5604 +       params[0] |= mc_enc(0, 8, cfg->num_extracts);
5605 +       params[0] = cpu_to_le64(params[0]);
5606 +
5607 +       if (cfg->num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS)
5608 +               return -EINVAL;
5609 +
5610 +       for (i = 0; i < cfg->num_extracts; i++) {
5611 +               switch (cfg->extracts[i].type) {
5612 +               case DPKG_EXTRACT_FROM_HDR:
5613 +                       params[param] |= mc_enc(0, 8,
5614 +                                       cfg->extracts[i].extract.from_hdr.prot);
5615 +                       params[param] |= mc_enc(8, 4,
5616 +                                       cfg->extracts[i].extract.from_hdr.type);
5617 +                       params[param] |= mc_enc(16, 8,
5618 +                                       cfg->extracts[i].extract.from_hdr.size);
5619 +                       params[param] |= mc_enc(24, 8,
5620 +                                       cfg->extracts[i].extract.
5621 +                                       from_hdr.offset);
5622 +                       params[param] |= mc_enc(32, 32,
5623 +                                       cfg->extracts[i].extract.
5624 +                                       from_hdr.field);
5625 +                       params[param] = cpu_to_le64(params[param]);
5626 +                       param++;
5627 +                       params[param] |= mc_enc(0, 8,
5628 +                                       cfg->extracts[i].extract.
5629 +                                       from_hdr.hdr_index);
5630 +                       break;
5631 +               case DPKG_EXTRACT_FROM_DATA:
5632 +                       params[param] |= mc_enc(16, 8,
5633 +                                       cfg->extracts[i].extract.
5634 +                                       from_data.size);
5635 +                       params[param] |= mc_enc(24, 8,
5636 +                                       cfg->extracts[i].extract.
5637 +                                       from_data.offset);
5638 +                       params[param] = cpu_to_le64(params[param]);
5639 +                       param++;
5640 +                       break;
5641 +               case DPKG_EXTRACT_FROM_PARSE:
5642 +                       params[param] |= mc_enc(16, 8,
5643 +                                       cfg->extracts[i].extract.
5644 +                                       from_parse.size);
5645 +                       params[param] |= mc_enc(24, 8,
5646 +                                       cfg->extracts[i].extract.
5647 +                                       from_parse.offset);
5648 +                       params[param] = cpu_to_le64(params[param]);
5649 +                       param++;
5650 +                       break;
5651 +               default:
5652 +                       return -EINVAL;
5653 +               }
5654 +               params[param] |= mc_enc(
5655 +                       24, 8, cfg->extracts[i].num_of_byte_masks);
5656 +               params[param] |= mc_enc(32, 4, cfg->extracts[i].type);
5657 +               params[param] = cpu_to_le64(params[param]);
5658 +               param++;
5659 +               for (offset = 0, j = 0;
5660 +                       j < DPKG_NUM_OF_MASKS;
5661 +                       offset += 16, j++) {
5662 +                       params[param] |= mc_enc(
5663 +                               (offset), 8, cfg->extracts[i].masks[j].mask);
5664 +                       params[param] |= mc_enc(
5665 +                               (offset + 8), 8,
5666 +                               cfg->extracts[i].masks[j].offset);
5667 +               }
5668 +               params[param] = cpu_to_le64(params[param]);
5669 +               param++;
5670 +       }
5671 +       return 0;
5672 +}
5673 +
5674 +int dpni_prepare_extended_cfg(const struct dpni_extended_cfg   *cfg,
5675 +                             uint8_t                   *ext_cfg_buf)
5676 +{
5677 +       uint64_t *ext_params = (uint64_t *)ext_cfg_buf;
5678 +
5679 +       DPNI_PREP_EXTENDED_CFG(ext_params, cfg);
5680 +
5681 +       return 0;
5682 +}
5683 +
5684 +int dpni_extract_extended_cfg(struct dpni_extended_cfg *cfg,
5685 +                             const uint8_t             *ext_cfg_buf)
5686 +{
5687 +       const uint64_t *ext_params = (const uint64_t *)ext_cfg_buf;
5688 +
5689 +       DPNI_EXT_EXTENDED_CFG(ext_params, cfg);
5690 +
5691 +       return 0;
5692 +}
5693 +
5694 +int dpni_open(struct fsl_mc_io *mc_io,
5695 +             uint32_t cmd_flags,
5696 +             int dpni_id,
5697 +             uint16_t *token)
5698 +{
5699 +       struct mc_command cmd = { 0 };
5700 +       int err;
5701 +
5702 +       /* prepare command */
5703 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_OPEN,
5704 +                                         cmd_flags,
5705 +                                         0);
5706 +       DPNI_CMD_OPEN(cmd, dpni_id);
5707 +
5708 +       /* send command to mc*/
5709 +       err = mc_send_command(mc_io, &cmd);
5710 +       if (err)
5711 +               return err;
5712 +
5713 +       /* retrieve response parameters */
5714 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
5715 +
5716 +       return 0;
5717 +}
5718 +
5719 +int dpni_close(struct fsl_mc_io *mc_io,
5720 +              uint32_t cmd_flags,
5721 +              uint16_t token)
5722 +{
5723 +       struct mc_command cmd = { 0 };
5724 +
5725 +       /* prepare command */
5726 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLOSE,
5727 +                                         cmd_flags,
5728 +                                         token);
5729 +
5730 +       /* send command to mc*/
5731 +       return mc_send_command(mc_io, &cmd);
5732 +}
5733 +
5734 +int dpni_create(struct fsl_mc_io *mc_io,
5735 +               uint32_t cmd_flags,
5736 +               const struct dpni_cfg *cfg,
5737 +               uint16_t *token)
5738 +{
5739 +       struct mc_command cmd = { 0 };
5740 +       int err;
5741 +
5742 +       /* prepare command */
5743 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CREATE,
5744 +                                         cmd_flags,
5745 +                                         0);
5746 +       DPNI_CMD_CREATE(cmd, cfg);
5747 +
5748 +       /* send command to mc*/
5749 +       err = mc_send_command(mc_io, &cmd);
5750 +       if (err)
5751 +               return err;
5752 +
5753 +       /* retrieve response parameters */
5754 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
5755 +
5756 +       return 0;
5757 +}
5758 +
5759 +int dpni_destroy(struct fsl_mc_io *mc_io,
5760 +                uint32_t cmd_flags,
5761 +                uint16_t token)
5762 +{
5763 +       struct mc_command cmd = { 0 };
5764 +
5765 +       /* prepare command */
5766 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_DESTROY,
5767 +                                         cmd_flags,
5768 +                                         token);
5769 +
5770 +       /* send command to mc*/
5771 +       return mc_send_command(mc_io, &cmd);
5772 +}
5773 +
5774 +int dpni_set_pools(struct fsl_mc_io *mc_io,
5775 +                  uint32_t cmd_flags,
5776 +                  uint16_t token,
5777 +                  const struct dpni_pools_cfg *cfg)
5778 +{
5779 +       struct mc_command cmd = { 0 };
5780 +
5781 +       /* prepare command */
5782 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_POOLS,
5783 +                                         cmd_flags,
5784 +                                         token);
5785 +       DPNI_CMD_SET_POOLS(cmd, cfg);
5786 +
5787 +       /* send command to mc*/
5788 +       return mc_send_command(mc_io, &cmd);
5789 +}
5790 +
5791 +int dpni_enable(struct fsl_mc_io *mc_io,
5792 +               uint32_t cmd_flags,
5793 +               uint16_t token)
5794 +{
5795 +       struct mc_command cmd = { 0 };
5796 +
5797 +       /* prepare command */
5798 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_ENABLE,
5799 +                                         cmd_flags,
5800 +                                         token);
5801 +
5802 +       /* send command to mc*/
5803 +       return mc_send_command(mc_io, &cmd);
5804 +}
5805 +
5806 +int dpni_disable(struct fsl_mc_io *mc_io,
5807 +                uint32_t cmd_flags,
5808 +                uint16_t token)
5809 +{
5810 +       struct mc_command cmd = { 0 };
5811 +
5812 +       /* prepare command */
5813 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_DISABLE,
5814 +                                         cmd_flags,
5815 +                                         token);
5816 +
5817 +       /* send command to mc*/
5818 +       return mc_send_command(mc_io, &cmd);
5819 +}
5820 +
5821 +int dpni_is_enabled(struct fsl_mc_io *mc_io,
5822 +                   uint32_t cmd_flags,
5823 +                   uint16_t token,
5824 +                   int *en)
5825 +{
5826 +       struct mc_command cmd = { 0 };
5827 +       int err;
5828 +       /* prepare command */
5829 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_IS_ENABLED, cmd_flags,
5830 +                                         token);
5831 +
5832 +       /* send command to mc*/
5833 +       err = mc_send_command(mc_io, &cmd);
5834 +       if (err)
5835 +               return err;
5836 +
5837 +       /* retrieve response parameters */
5838 +       DPNI_RSP_IS_ENABLED(cmd, *en);
5839 +
5840 +       return 0;
5841 +}
5842 +
5843 +int dpni_reset(struct fsl_mc_io *mc_io,
5844 +              uint32_t cmd_flags,
5845 +              uint16_t token)
5846 +{
5847 +       struct mc_command cmd = { 0 };
5848 +
5849 +       /* prepare command */
5850 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_RESET,
5851 +                                         cmd_flags,
5852 +                                         token);
5853 +
5854 +       /* send command to mc*/
5855 +       return mc_send_command(mc_io, &cmd);
5856 +}
5857 +
5858 +int dpni_set_irq(struct fsl_mc_io      *mc_io,
5859 +                uint32_t               cmd_flags,
5860 +                uint16_t               token,
5861 +                uint8_t                irq_index,
5862 +                struct dpni_irq_cfg    *irq_cfg)
5863 +{
5864 +       struct mc_command cmd = { 0 };
5865 +
5866 +       /* prepare command */
5867 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ,
5868 +                                         cmd_flags,
5869 +                                         token);
5870 +       DPNI_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
5871 +
5872 +       /* send command to mc*/
5873 +       return mc_send_command(mc_io, &cmd);
5874 +}
5875 +
5876 +int dpni_get_irq(struct fsl_mc_io      *mc_io,
5877 +                uint32_t               cmd_flags,
5878 +                uint16_t               token,
5879 +                uint8_t                irq_index,
5880 +                int                    *type,
5881 +                struct dpni_irq_cfg    *irq_cfg)
5882 +{
5883 +       struct mc_command cmd = { 0 };
5884 +       int err;
5885 +
5886 +       /* prepare command */
5887 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ,
5888 +                                         cmd_flags,
5889 +                                         token);
5890 +       DPNI_CMD_GET_IRQ(cmd, irq_index);
5891 +
5892 +       /* send command to mc*/
5893 +       err = mc_send_command(mc_io, &cmd);
5894 +       if (err)
5895 +               return err;
5896 +
5897 +       /* retrieve response parameters */
5898 +       DPNI_RSP_GET_IRQ(cmd, *type, irq_cfg);
5899 +
5900 +       return 0;
5901 +}
5902 +
5903 +int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
5904 +                       uint32_t cmd_flags,
5905 +                       uint16_t token,
5906 +                       uint8_t irq_index,
5907 +                       uint8_t en)
5908 +{
5909 +       struct mc_command cmd = { 0 };
5910 +
5911 +       /* prepare command */
5912 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_ENABLE,
5913 +                                         cmd_flags,
5914 +                                         token);
5915 +       DPNI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
5916 +
5917 +       /* send command to mc*/
5918 +       return mc_send_command(mc_io, &cmd);
5919 +}
5920 +
5921 +int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
5922 +                       uint32_t cmd_flags,
5923 +                       uint16_t token,
5924 +                       uint8_t irq_index,
5925 +                       uint8_t *en)
5926 +{
5927 +       struct mc_command cmd = { 0 };
5928 +       int err;
5929 +
5930 +       /* prepare command */
5931 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_ENABLE,
5932 +                                         cmd_flags,
5933 +                                         token);
5934 +       DPNI_CMD_GET_IRQ_ENABLE(cmd, irq_index);
5935 +
5936 +       /* send command to mc*/
5937 +       err = mc_send_command(mc_io, &cmd);
5938 +       if (err)
5939 +               return err;
5940 +
5941 +       /* retrieve response parameters */
5942 +       DPNI_RSP_GET_IRQ_ENABLE(cmd, *en);
5943 +
5944 +       return 0;
5945 +}
5946 +
5947 +int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
5948 +                     uint32_t cmd_flags,
5949 +                     uint16_t token,
5950 +                     uint8_t irq_index,
5951 +                     uint32_t mask)
5952 +{
5953 +       struct mc_command cmd = { 0 };
5954 +
5955 +       /* prepare command */
5956 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_MASK,
5957 +                                         cmd_flags,
5958 +                                         token);
5959 +       DPNI_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
5960 +
5961 +       /* send command to mc*/
5962 +       return mc_send_command(mc_io, &cmd);
5963 +}
5964 +
5965 +int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
5966 +                     uint32_t cmd_flags,
5967 +                     uint16_t token,
5968 +                     uint8_t irq_index,
5969 +                     uint32_t *mask)
5970 +{
5971 +       struct mc_command cmd = { 0 };
5972 +       int err;
5973 +
5974 +       /* prepare command */
5975 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_MASK,
5976 +                                         cmd_flags,
5977 +                                         token);
5978 +       DPNI_CMD_GET_IRQ_MASK(cmd, irq_index);
5979 +
5980 +       /* send command to mc*/
5981 +       err = mc_send_command(mc_io, &cmd);
5982 +       if (err)
5983 +               return err;
5984 +
5985 +       /* retrieve response parameters */
5986 +       DPNI_RSP_GET_IRQ_MASK(cmd, *mask);
5987 +
5988 +       return 0;
5989 +}
5990 +
5991 +int dpni_get_irq_status(struct fsl_mc_io *mc_io,
5992 +                       uint32_t cmd_flags,
5993 +                       uint16_t token,
5994 +                       uint8_t irq_index,
5995 +                       uint32_t *status)
5996 +{
5997 +       struct mc_command cmd = { 0 };
5998 +       int err;
5999 +
6000 +       /* prepare command */
6001 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_STATUS,
6002 +                                         cmd_flags,
6003 +                                         token);
6004 +       DPNI_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
6005 +
6006 +       /* send command to mc*/
6007 +       err = mc_send_command(mc_io, &cmd);
6008 +       if (err)
6009 +               return err;
6010 +
6011 +       /* retrieve response parameters */
6012 +       DPNI_RSP_GET_IRQ_STATUS(cmd, *status);
6013 +
6014 +       return 0;
6015 +}
6016 +
6017 +int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
6018 +                         uint32_t cmd_flags,
6019 +                         uint16_t token,
6020 +                         uint8_t irq_index,
6021 +                         uint32_t status)
6022 +{
6023 +       struct mc_command cmd = { 0 };
6024 +
6025 +       /* prepare command */
6026 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLEAR_IRQ_STATUS,
6027 +                                         cmd_flags,
6028 +                                         token);
6029 +       DPNI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
6030 +
6031 +       /* send command to mc*/
6032 +       return mc_send_command(mc_io, &cmd);
6033 +}
6034 +
6035 +int dpni_get_attributes(struct fsl_mc_io *mc_io,
6036 +                       uint32_t cmd_flags,
6037 +                       uint16_t token,
6038 +                       struct dpni_attr *attr)
6039 +{
6040 +       struct mc_command cmd = { 0 };
6041 +       int err;
6042 +
6043 +       /* prepare command */
6044 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_ATTR,
6045 +                                         cmd_flags,
6046 +                                         token);
6047 +       DPNI_CMD_GET_ATTR(cmd, attr);
6048 +
6049 +       /* send command to mc*/
6050 +       err = mc_send_command(mc_io, &cmd);
6051 +       if (err)
6052 +               return err;
6053 +
6054 +       /* retrieve response parameters */
6055 +       DPNI_RSP_GET_ATTR(cmd, attr);
6056 +
6057 +       return 0;
6058 +}
6059 +
6060 +int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
6061 +                            uint32_t cmd_flags,
6062 +                            uint16_t token,
6063 +                             struct dpni_error_cfg *cfg)
6064 +{
6065 +       struct mc_command cmd = { 0 };
6066 +
6067 +       /* prepare command */
6068 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_ERRORS_BEHAVIOR,
6069 +                                         cmd_flags,
6070 +                                         token);
6071 +       DPNI_CMD_SET_ERRORS_BEHAVIOR(cmd, cfg);
6072 +
6073 +       /* send command to mc*/
6074 +       return mc_send_command(mc_io, &cmd);
6075 +}
6076 +
6077 +int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io,
6078 +                             uint32_t cmd_flags,
6079 +                             uint16_t token,
6080 +                             struct dpni_buffer_layout *layout)
6081 +{
6082 +       struct mc_command cmd = { 0 };
6083 +       int err;
6084 +
6085 +       /* prepare command */
6086 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_BUFFER_LAYOUT,
6087 +                                         cmd_flags,
6088 +                                         token);
6089 +
6090 +       /* send command to mc*/
6091 +       err = mc_send_command(mc_io, &cmd);
6092 +       if (err)
6093 +               return err;
6094 +
6095 +       /* retrieve response parameters */
6096 +       DPNI_RSP_GET_RX_BUFFER_LAYOUT(cmd, layout);
6097 +
6098 +       return 0;
6099 +}
6100 +
6101 +int dpni_set_rx_buffer_layout(struct fsl_mc_io *mc_io,
6102 +                             uint32_t cmd_flags,
6103 +                             uint16_t token,
6104 +                             const struct dpni_buffer_layout *layout)
6105 +{
6106 +       struct mc_command cmd = { 0 };
6107 +
6108 +       /* prepare command */
6109 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_BUFFER_LAYOUT,
6110 +                                         cmd_flags,
6111 +                                         token);
6112 +       DPNI_CMD_SET_RX_BUFFER_LAYOUT(cmd, layout);
6113 +
6114 +       /* send command to mc*/
6115 +       return mc_send_command(mc_io, &cmd);
6116 +}
6117 +
6118 +int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io,
6119 +                             uint32_t cmd_flags,
6120 +                             uint16_t token,
6121 +                             struct dpni_buffer_layout *layout)
6122 +{
6123 +       struct mc_command cmd = { 0 };
6124 +       int err;
6125 +
6126 +       /* prepare command */
6127 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_BUFFER_LAYOUT,
6128 +                                         cmd_flags,
6129 +                                         token);
6130 +
6131 +       /* send command to mc*/
6132 +       err = mc_send_command(mc_io, &cmd);
6133 +       if (err)
6134 +               return err;
6135 +
6136 +       /* retrieve response parameters */
6137 +       DPNI_RSP_GET_TX_BUFFER_LAYOUT(cmd, layout);
6138 +
6139 +       return 0;
6140 +}
6141 +
6142 +int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io,
6143 +                             uint32_t cmd_flags,
6144 +                             uint16_t token,
6145 +                             const struct dpni_buffer_layout *layout)
6146 +{
6147 +       struct mc_command cmd = { 0 };
6148 +
6149 +       /* prepare command */
6150 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_BUFFER_LAYOUT,
6151 +                                         cmd_flags,
6152 +                                         token);
6153 +       DPNI_CMD_SET_TX_BUFFER_LAYOUT(cmd, layout);
6154 +
6155 +       /* send command to mc*/
6156 +       return mc_send_command(mc_io, &cmd);
6157 +}
6158 +
6159 +int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,
6160 +                                  uint32_t cmd_flags,
6161 +                                  uint16_t token,
6162 +                                  struct dpni_buffer_layout *layout)
6163 +{
6164 +       struct mc_command cmd = { 0 };
6165 +       int err;
6166 +
6167 +       /* prepare command */
6168 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_CONF_BUFFER_LAYOUT,
6169 +                                         cmd_flags,
6170 +                                         token);
6171 +
6172 +       /* send command to mc*/
6173 +       err = mc_send_command(mc_io, &cmd);
6174 +       if (err)
6175 +               return err;
6176 +
6177 +       /* retrieve response parameters */
6178 +       DPNI_RSP_GET_TX_CONF_BUFFER_LAYOUT(cmd, layout);
6179 +
6180 +       return 0;
6181 +}
6182 +
6183 +int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,
6184 +                                  uint32_t cmd_flags,
6185 +                                  uint16_t token,
6186 +                                  const struct dpni_buffer_layout *layout)
6187 +{
6188 +       struct mc_command cmd = { 0 };
6189 +
6190 +       /* prepare command */
6191 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_CONF_BUFFER_LAYOUT,
6192 +                                         cmd_flags,
6193 +                                         token);
6194 +       DPNI_CMD_SET_TX_CONF_BUFFER_LAYOUT(cmd, layout);
6195 +
6196 +       /* send command to mc*/
6197 +       return mc_send_command(mc_io, &cmd);
6198 +}
6199 +
6200 +int dpni_get_l3_chksum_validation(struct fsl_mc_io *mc_io,
6201 +                                 uint32_t cmd_flags,
6202 +                                 uint16_t token,
6203 +                                 int *en)
6204 +{
6205 +       struct mc_command cmd = { 0 };
6206 +       int err;
6207 +
6208 +       /* prepare command */
6209 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_L3_CHKSUM_VALIDATION,
6210 +                                         cmd_flags,
6211 +                                         token);
6212 +
6213 +       /* send command to mc*/
6214 +       err = mc_send_command(mc_io, &cmd);
6215 +       if (err)
6216 +               return err;
6217 +
6218 +       /* retrieve response parameters */
6219 +       DPNI_RSP_GET_L3_CHKSUM_VALIDATION(cmd, *en);
6220 +
6221 +       return 0;
6222 +}
6223 +
6224 +int dpni_set_l3_chksum_validation(struct fsl_mc_io *mc_io,
6225 +                                 uint32_t cmd_flags,
6226 +                                 uint16_t token,
6227 +                                 int en)
6228 +{
6229 +       struct mc_command cmd = { 0 };
6230 +
6231 +       /* prepare command */
6232 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_L3_CHKSUM_VALIDATION,
6233 +                                         cmd_flags,
6234 +                                         token);
6235 +       DPNI_CMD_SET_L3_CHKSUM_VALIDATION(cmd, en);
6236 +
6237 +       /* send command to mc*/
6238 +       return mc_send_command(mc_io, &cmd);
6239 +}
6240 +
6241 +int dpni_get_l4_chksum_validation(struct fsl_mc_io *mc_io,
6242 +                                 uint32_t cmd_flags,
6243 +                                 uint16_t token,
6244 +                                 int *en)
6245 +{
6246 +       struct mc_command cmd = { 0 };
6247 +       int err;
6248 +
6249 +       /* prepare command */
6250 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_L4_CHKSUM_VALIDATION,
6251 +                                         cmd_flags,
6252 +                                         token);
6253 +
6254 +       /* send command to mc*/
6255 +       err = mc_send_command(mc_io, &cmd);
6256 +       if (err)
6257 +               return err;
6258 +
6259 +       /* retrieve response parameters */
6260 +       DPNI_RSP_GET_L4_CHKSUM_VALIDATION(cmd, *en);
6261 +
6262 +       return 0;
6263 +}
6264 +
6265 +int dpni_set_l4_chksum_validation(struct fsl_mc_io *mc_io,
6266 +                                 uint32_t cmd_flags,
6267 +                                 uint16_t token,
6268 +                                 int en)
6269 +{
6270 +       struct mc_command cmd = { 0 };
6271 +
6272 +       /* prepare command */
6273 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_L4_CHKSUM_VALIDATION,
6274 +                                         cmd_flags,
6275 +                                         token);
6276 +       DPNI_CMD_SET_L4_CHKSUM_VALIDATION(cmd, en);
6277 +
6278 +       /* send command to mc*/
6279 +       return mc_send_command(mc_io, &cmd);
6280 +}
6281 +
6282 +int dpni_get_qdid(struct fsl_mc_io *mc_io,
6283 +                 uint32_t cmd_flags,
6284 +                 uint16_t token,
6285 +                 uint16_t *qdid)
6286 +{
6287 +       struct mc_command cmd = { 0 };
6288 +       int err;
6289 +
6290 +       /* prepare command */
6291 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QDID,
6292 +                                         cmd_flags,
6293 +                                         token);
6294 +
6295 +       /* send command to mc*/
6296 +       err = mc_send_command(mc_io, &cmd);
6297 +       if (err)
6298 +               return err;
6299 +
6300 +       /* retrieve response parameters */
6301 +       DPNI_RSP_GET_QDID(cmd, *qdid);
6302 +
6303 +       return 0;
6304 +}
6305 +
6306 +int dpni_get_sp_info(struct fsl_mc_io *mc_io,
6307 +                    uint32_t cmd_flags,
6308 +                    uint16_t token,
6309 +                    struct dpni_sp_info *sp_info)
6310 +{
6311 +       struct mc_command cmd = { 0 };
6312 +       int err;
6313 +
6314 +       /* prepare command */
6315 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_SP_INFO,
6316 +                                         cmd_flags,
6317 +                                         token);
6318 +
6319 +       /* send command to mc*/
6320 +       err = mc_send_command(mc_io, &cmd);
6321 +       if (err)
6322 +               return err;
6323 +
6324 +       /* retrieve response parameters */
6325 +       DPNI_RSP_GET_SP_INFO(cmd, sp_info);
6326 +
6327 +       return 0;
6328 +}
6329 +
6330 +int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,
6331 +                           uint32_t cmd_flags,
6332 +                           uint16_t token,
6333 +                           uint16_t *data_offset)
6334 +{
6335 +       struct mc_command cmd = { 0 };
6336 +       int err;
6337 +
6338 +       /* prepare command */
6339 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_DATA_OFFSET,
6340 +                                         cmd_flags,
6341 +                                         token);
6342 +
6343 +       /* send command to mc*/
6344 +       err = mc_send_command(mc_io, &cmd);
6345 +       if (err)
6346 +               return err;
6347 +
6348 +       /* retrieve response parameters */
6349 +       DPNI_RSP_GET_TX_DATA_OFFSET(cmd, *data_offset);
6350 +
6351 +       return 0;
6352 +}
6353 +
6354 +int dpni_get_counter(struct fsl_mc_io *mc_io,
6355 +                    uint32_t cmd_flags,
6356 +                    uint16_t token,
6357 +                    enum dpni_counter counter,
6358 +                    uint64_t *value)
6359 +{
6360 +       struct mc_command cmd = { 0 };
6361 +       int err;
6362 +
6363 +       /* prepare command */
6364 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_COUNTER,
6365 +                                         cmd_flags,
6366 +                                         token);
6367 +       DPNI_CMD_GET_COUNTER(cmd, counter);
6368 +
6369 +       /* send command to mc*/
6370 +       err = mc_send_command(mc_io, &cmd);
6371 +       if (err)
6372 +               return err;
6373 +
6374 +       /* retrieve response parameters */
6375 +       DPNI_RSP_GET_COUNTER(cmd, *value);
6376 +
6377 +       return 0;
6378 +}
6379 +
6380 +int dpni_set_counter(struct fsl_mc_io *mc_io,
6381 +                    uint32_t cmd_flags,
6382 +                    uint16_t token,
6383 +                    enum dpni_counter counter,
6384 +                    uint64_t value)
6385 +{
6386 +       struct mc_command cmd = { 0 };
6387 +
6388 +       /* prepare command */
6389 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_COUNTER,
6390 +                                         cmd_flags,
6391 +                                         token);
6392 +       DPNI_CMD_SET_COUNTER(cmd, counter, value);
6393 +
6394 +       /* send command to mc*/
6395 +       return mc_send_command(mc_io, &cmd);
6396 +}
6397 +
6398 +int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
6399 +                     uint32_t cmd_flags,
6400 +                     uint16_t token,
6401 +                     const struct dpni_link_cfg *cfg)
6402 +{
6403 +       struct mc_command cmd = { 0 };
6404 +
6405 +       /* prepare command */
6406 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_LINK_CFG,
6407 +                                         cmd_flags,
6408 +                                         token);
6409 +       DPNI_CMD_SET_LINK_CFG(cmd, cfg);
6410 +
6411 +       /* send command to mc*/
6412 +       return mc_send_command(mc_io, &cmd);
6413 +}
6414 +
6415 +int dpni_get_link_state(struct fsl_mc_io *mc_io,
6416 +                       uint32_t cmd_flags,
6417 +                       uint16_t token,
6418 +                       struct dpni_link_state *state)
6419 +{
6420 +       struct mc_command cmd = { 0 };
6421 +       int err;
6422 +
6423 +       /* prepare command */
6424 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_LINK_STATE,
6425 +                                         cmd_flags,
6426 +                                         token);
6427 +
6428 +       /* send command to mc*/
6429 +       err = mc_send_command(mc_io, &cmd);
6430 +       if (err)
6431 +               return err;
6432 +
6433 +       /* retrieve response parameters */
6434 +       DPNI_RSP_GET_LINK_STATE(cmd, state);
6435 +
6436 +       return 0;
6437 +}
6438 +
6439 +int dpni_set_tx_shaping(struct fsl_mc_io *mc_io,
6440 +                       uint32_t cmd_flags,
6441 +                       uint16_t token,
6442 +                       const struct dpni_tx_shaping_cfg *tx_shaper)
6443 +{
6444 +       struct mc_command cmd = { 0 };
6445 +
6446 +       /* prepare command */
6447 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_SHAPING,
6448 +                                         cmd_flags,
6449 +                                         token);
6450 +       DPNI_CMD_SET_TX_SHAPING(cmd, tx_shaper);
6451 +
6452 +       /* send command to mc*/
6453 +       return mc_send_command(mc_io, &cmd);
6454 +}
6455 +
6456 +int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
6457 +                             uint32_t cmd_flags,
6458 +                             uint16_t token,
6459 +                             uint16_t max_frame_length)
6460 +{
6461 +       struct mc_command cmd = { 0 };
6462 +
6463 +       /* prepare command */
6464 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MAX_FRAME_LENGTH,
6465 +                                         cmd_flags,
6466 +                                         token);
6467 +       DPNI_CMD_SET_MAX_FRAME_LENGTH(cmd, max_frame_length);
6468 +
6469 +       /* send command to mc*/
6470 +       return mc_send_command(mc_io, &cmd);
6471 +}
6472 +
6473 +int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
6474 +                             uint32_t cmd_flags,
6475 +                             uint16_t token,
6476 +                             uint16_t *max_frame_length)
6477 +{
6478 +       struct mc_command cmd = { 0 };
6479 +       int err;
6480 +
6481 +       /* prepare command */
6482 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAX_FRAME_LENGTH,
6483 +                                         cmd_flags,
6484 +                                         token);
6485 +
6486 +       /* send command to mc*/
6487 +       err = mc_send_command(mc_io, &cmd);
6488 +       if (err)
6489 +               return err;
6490 +
6491 +       /* retrieve response parameters */
6492 +       DPNI_RSP_GET_MAX_FRAME_LENGTH(cmd, *max_frame_length);
6493 +
6494 +       return 0;
6495 +}
6496 +
6497 +int dpni_set_mtu(struct fsl_mc_io *mc_io,
6498 +                uint32_t cmd_flags,
6499 +                uint16_t token,
6500 +                uint16_t mtu)
6501 +{
6502 +       struct mc_command cmd = { 0 };
6503 +
6504 +       /* prepare command */
6505 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MTU,
6506 +                                         cmd_flags,
6507 +                                         token);
6508 +       DPNI_CMD_SET_MTU(cmd, mtu);
6509 +
6510 +       /* send command to mc*/
6511 +       return mc_send_command(mc_io, &cmd);
6512 +}
6513 +
6514 +int dpni_get_mtu(struct fsl_mc_io *mc_io,
6515 +                uint32_t cmd_flags,
6516 +                uint16_t token,
6517 +                uint16_t *mtu)
6518 +{
6519 +       struct mc_command cmd = { 0 };
6520 +       int err;
6521 +
6522 +       /* prepare command */
6523 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MTU,
6524 +                                         cmd_flags,
6525 +                                         token);
6526 +
6527 +       /* send command to mc*/
6528 +       err = mc_send_command(mc_io, &cmd);
6529 +       if (err)
6530 +               return err;
6531 +
6532 +       /* retrieve response parameters */
6533 +       DPNI_RSP_GET_MTU(cmd, *mtu);
6534 +
6535 +       return 0;
6536 +}
6537 +
6538 +int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
6539 +                              uint32_t cmd_flags,
6540 +                              uint16_t token,
6541 +                              int en)
6542 +{
6543 +       struct mc_command cmd = { 0 };
6544 +
6545 +       /* prepare command */
6546 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MCAST_PROMISC,
6547 +                                         cmd_flags,
6548 +                                         token);
6549 +       DPNI_CMD_SET_MULTICAST_PROMISC(cmd, en);
6550 +
6551 +       /* send command to mc*/
6552 +       return mc_send_command(mc_io, &cmd);
6553 +}
6554 +
6555 +int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
6556 +                              uint32_t cmd_flags,
6557 +                              uint16_t token,
6558 +                              int *en)
6559 +{
6560 +       struct mc_command cmd = { 0 };
6561 +       int err;
6562 +
6563 +       /* prepare command */
6564 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MCAST_PROMISC,
6565 +                                         cmd_flags,
6566 +                                         token);
6567 +
6568 +       /* send command to mc*/
6569 +       err = mc_send_command(mc_io, &cmd);
6570 +       if (err)
6571 +               return err;
6572 +
6573 +       /* retrieve response parameters */
6574 +       DPNI_RSP_GET_MULTICAST_PROMISC(cmd, *en);
6575 +
6576 +       return 0;
6577 +}
6578 +
6579 +int dpni_set_unicast_promisc(struct fsl_mc_io *mc_io,
6580 +                            uint32_t cmd_flags,
6581 +                            uint16_t token,
6582 +                            int en)
6583 +{
6584 +       struct mc_command cmd = { 0 };
6585 +
6586 +       /* prepare command */
6587 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_UNICAST_PROMISC,
6588 +                                         cmd_flags,
6589 +                                         token);
6590 +       DPNI_CMD_SET_UNICAST_PROMISC(cmd, en);
6591 +
6592 +       /* send command to mc*/
6593 +       return mc_send_command(mc_io, &cmd);
6594 +}
6595 +
6596 +int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
6597 +                            uint32_t cmd_flags,
6598 +                            uint16_t token,
6599 +                            int *en)
6600 +{
6601 +       struct mc_command cmd = { 0 };
6602 +       int err;
6603 +
6604 +       /* prepare command */
6605 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_UNICAST_PROMISC,
6606 +                                         cmd_flags,
6607 +                                         token);
6608 +
6609 +       /* send command to mc*/
6610 +       err = mc_send_command(mc_io, &cmd);
6611 +       if (err)
6612 +               return err;
6613 +
6614 +       /* retrieve response parameters */
6615 +       DPNI_RSP_GET_UNICAST_PROMISC(cmd, *en);
6616 +
6617 +       return 0;
6618 +}
6619 +
6620 +int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
6621 +                             uint32_t cmd_flags,
6622 +                             uint16_t token,
6623 +                             const uint8_t mac_addr[6])
6624 +{
6625 +       struct mc_command cmd = { 0 };
6626 +
6627 +       /* prepare command */
6628 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_PRIM_MAC,
6629 +                                         cmd_flags,
6630 +                                         token);
6631 +       DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr);
6632 +
6633 +       /* send command to mc*/
6634 +       return mc_send_command(mc_io, &cmd);
6635 +}
6636 +
6637 +int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
6638 +                             uint32_t cmd_flags,
6639 +                             uint16_t token,
6640 +                             uint8_t mac_addr[6])
6641 +{
6642 +       struct mc_command cmd = { 0 };
6643 +       int err;
6644 +
6645 +       /* prepare command */
6646 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PRIM_MAC,
6647 +                                         cmd_flags,
6648 +                                         token);
6649 +
6650 +       /* send command to mc*/
6651 +       err = mc_send_command(mc_io, &cmd);
6652 +       if (err)
6653 +               return err;
6654 +
6655 +       /* retrieve response parameters */
6656 +       DPNI_RSP_GET_PRIMARY_MAC_ADDR(cmd, mac_addr);
6657 +
6658 +       return 0;
6659 +}
6660 +
6661 +int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
6662 +                     uint32_t cmd_flags,
6663 +                     uint16_t token,
6664 +                     const uint8_t mac_addr[6])
6665 +{
6666 +       struct mc_command cmd = { 0 };
6667 +
6668 +       /* prepare command */
6669 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_MAC_ADDR,
6670 +                                         cmd_flags,
6671 +                                         token);
6672 +       DPNI_CMD_ADD_MAC_ADDR(cmd, mac_addr);
6673 +
6674 +       /* send command to mc*/
6675 +       return mc_send_command(mc_io, &cmd);
6676 +}
6677 +
6678 +int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
6679 +                        uint32_t cmd_flags,
6680 +                        uint16_t token,
6681 +                        const uint8_t mac_addr[6])
6682 +{
6683 +       struct mc_command cmd = { 0 };
6684 +
6685 +       /* prepare command */
6686 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_MAC_ADDR,
6687 +                                         cmd_flags,
6688 +                                         token);
6689 +       DPNI_CMD_REMOVE_MAC_ADDR(cmd, mac_addr);
6690 +
6691 +       /* send command to mc*/
6692 +       return mc_send_command(mc_io, &cmd);
6693 +}
6694 +
6695 +int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
6696 +                          uint32_t cmd_flags,
6697 +                          uint16_t token,
6698 +                          int unicast,
6699 +                          int multicast)
6700 +{
6701 +       struct mc_command cmd = { 0 };
6702 +
6703 +       /* prepare command */
6704 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLR_MAC_FILTERS,
6705 +                                         cmd_flags,
6706 +                                         token);
6707 +       DPNI_CMD_CLEAR_MAC_FILTERS(cmd, unicast, multicast);
6708 +
6709 +       /* send command to mc*/
6710 +       return mc_send_command(mc_io, &cmd);
6711 +}
6712 +
6713 +int dpni_set_vlan_filters(struct fsl_mc_io *mc_io,
6714 +                         uint32_t cmd_flags,
6715 +                         uint16_t token,
6716 +                         int en)
6717 +{
6718 +       struct mc_command cmd = { 0 };
6719 +
6720 +       /* prepare command */
6721 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_VLAN_FILTERS,
6722 +                                         cmd_flags,
6723 +                                         token);
6724 +       DPNI_CMD_SET_VLAN_FILTERS(cmd, en);
6725 +
6726 +       /* send command to mc*/
6727 +       return mc_send_command(mc_io, &cmd);
6728 +}
6729 +
6730 +int dpni_add_vlan_id(struct fsl_mc_io *mc_io,
6731 +                    uint32_t cmd_flags,
6732 +                    uint16_t token,
6733 +                    uint16_t vlan_id)
6734 +{
6735 +       struct mc_command cmd = { 0 };
6736 +
6737 +       /* prepare command */
6738 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_VLAN_ID,
6739 +                                         cmd_flags,
6740 +                                         token);
6741 +       DPNI_CMD_ADD_VLAN_ID(cmd, vlan_id);
6742 +
6743 +       /* send command to mc*/
6744 +       return mc_send_command(mc_io, &cmd);
6745 +}
6746 +
6747 +int dpni_remove_vlan_id(struct fsl_mc_io *mc_io,
6748 +                       uint32_t cmd_flags,
6749 +                       uint16_t token,
6750 +                       uint16_t vlan_id)
6751 +{
6752 +       struct mc_command cmd = { 0 };
6753 +
6754 +       /* prepare command */
6755 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_VLAN_ID,
6756 +                                         cmd_flags,
6757 +                                         token);
6758 +       DPNI_CMD_REMOVE_VLAN_ID(cmd, vlan_id);
6759 +
6760 +       /* send command to mc*/
6761 +       return mc_send_command(mc_io, &cmd);
6762 +}
6763 +
6764 +int dpni_clear_vlan_filters(struct fsl_mc_io *mc_io,
6765 +                           uint32_t cmd_flags,
6766 +                           uint16_t token)
6767 +{
6768 +       struct mc_command cmd = { 0 };
6769 +
6770 +       /* prepare command */
6771 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLR_VLAN_FILTERS,
6772 +                                         cmd_flags,
6773 +                                         token);
6774 +
6775 +       /* send command to mc*/
6776 +       return mc_send_command(mc_io, &cmd);
6777 +}
6778 +
6779 +int dpni_set_tx_selection(struct fsl_mc_io                     *mc_io,
6780 +                         uint32_t                              cmd_flags,
6781 +                         uint16_t                              token,
6782 +                         const struct dpni_tx_selection_cfg    *cfg)
6783 +{
6784 +       struct mc_command cmd = { 0 };
6785 +
6786 +       /* prepare command */
6787 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_SELECTION,
6788 +                                         cmd_flags,
6789 +                                         token);
6790 +       DPNI_CMD_SET_TX_SELECTION(cmd, cfg);
6791 +
6792 +       /* send command to mc*/
6793 +       return mc_send_command(mc_io, &cmd);
6794 +}
6795 +
6796 +int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
6797 +                       uint32_t cmd_flags,
6798 +                       uint16_t token,
6799 +                       uint8_t tc_id,
6800 +                       const struct dpni_rx_tc_dist_cfg *cfg)
6801 +{
6802 +       struct mc_command cmd = { 0 };
6803 +
6804 +       /* prepare command */
6805 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_TC_DIST,
6806 +                                         cmd_flags,
6807 +                                         token);
6808 +       DPNI_CMD_SET_RX_TC_DIST(cmd, tc_id, cfg);
6809 +
6810 +       /* send command to mc*/
6811 +       return mc_send_command(mc_io, &cmd);
6812 +}
6813 +
6814 +int dpni_set_tx_flow(struct fsl_mc_io *mc_io,
6815 +                    uint32_t cmd_flags,
6816 +                    uint16_t token,
6817 +                    uint16_t *flow_id,
6818 +                    const struct dpni_tx_flow_cfg *cfg)
6819 +{
6820 +       struct mc_command cmd = { 0 };
6821 +       int err;
6822 +
6823 +       /* prepare command */
6824 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_FLOW,
6825 +                                         cmd_flags,
6826 +                                         token);
6827 +       DPNI_CMD_SET_TX_FLOW(cmd, *flow_id, cfg);
6828 +
6829 +       /* send command to mc*/
6830 +       err = mc_send_command(mc_io, &cmd);
6831 +       if (err)
6832 +               return err;
6833 +
6834 +       /* retrieve response parameters */
6835 +       DPNI_RSP_SET_TX_FLOW(cmd, *flow_id);
6836 +
6837 +       return 0;
6838 +}
6839 +
6840 +int dpni_get_tx_flow(struct fsl_mc_io *mc_io,
6841 +                    uint32_t cmd_flags,
6842 +                    uint16_t token,
6843 +                    uint16_t flow_id,
6844 +                    struct dpni_tx_flow_attr *attr)
6845 +{
6846 +       struct mc_command cmd = { 0 };
6847 +       int err;
6848 +
6849 +       /* prepare command */
6850 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_FLOW,
6851 +                                         cmd_flags,
6852 +                                         token);
6853 +       DPNI_CMD_GET_TX_FLOW(cmd, flow_id);
6854 +
6855 +       /* send command to mc*/
6856 +       err = mc_send_command(mc_io, &cmd);
6857 +       if (err)
6858 +               return err;
6859 +
6860 +       /* retrieve response parameters */
6861 +       DPNI_RSP_GET_TX_FLOW(cmd, attr);
6862 +
6863 +       return 0;
6864 +}
6865 +
6866 +int dpni_set_rx_flow(struct fsl_mc_io *mc_io,
6867 +                    uint32_t cmd_flags,
6868 +                    uint16_t token,
6869 +                    uint8_t tc_id,
6870 +                    uint16_t flow_id,
6871 +                    const struct dpni_queue_cfg *cfg)
6872 +{
6873 +       struct mc_command cmd = { 0 };
6874 +
6875 +       /* prepare command */
6876 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_FLOW,
6877 +                                         cmd_flags,
6878 +                                         token);
6879 +       DPNI_CMD_SET_RX_FLOW(cmd, tc_id, flow_id, cfg);
6880 +
6881 +       /* send command to mc*/
6882 +       return mc_send_command(mc_io, &cmd);
6883 +}
6884 +
6885 +int dpni_get_rx_flow(struct fsl_mc_io *mc_io,
6886 +                    uint32_t cmd_flags,
6887 +                    uint16_t token,
6888 +                    uint8_t tc_id,
6889 +                    uint16_t flow_id,
6890 +                    struct dpni_queue_attr *attr)
6891 +{
6892 +       struct mc_command cmd = { 0 };
6893 +       int err;
6894 +       /* prepare command */
6895 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_FLOW,
6896 +                                         cmd_flags,
6897 +                                         token);
6898 +       DPNI_CMD_GET_RX_FLOW(cmd, tc_id, flow_id);
6899 +
6900 +       /* send command to mc*/
6901 +       err = mc_send_command(mc_io, &cmd);
6902 +       if (err)
6903 +               return err;
6904 +
6905 +       /* retrieve response parameters */
6906 +       DPNI_RSP_GET_RX_FLOW(cmd, attr);
6907 +
6908 +       return 0;
6909 +}
6910 +
6911 +int dpni_set_rx_err_queue(struct fsl_mc_io *mc_io,
6912 +                         uint32_t cmd_flags,
6913 +                         uint16_t token,
6914 +                         const struct dpni_queue_cfg *cfg)
6915 +{
6916 +       struct mc_command cmd = { 0 };
6917 +
6918 +       /* prepare command */
6919 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_ERR_QUEUE,
6920 +                                         cmd_flags,
6921 +                                         token);
6922 +       DPNI_CMD_SET_RX_ERR_QUEUE(cmd, cfg);
6923 +
6924 +       /* send command to mc*/
6925 +       return mc_send_command(mc_io, &cmd);
6926 +}
6927 +
6928 +int dpni_get_rx_err_queue(struct fsl_mc_io *mc_io,
6929 +                         uint32_t cmd_flags,
6930 +                         uint16_t token,
6931 +                         struct dpni_queue_attr *attr)
6932 +{
6933 +       struct mc_command cmd = { 0 };
6934 +       int err;
6935 +
6936 +       /* prepare command */
6937 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_ERR_QUEUE,
6938 +                                         cmd_flags,
6939 +                                         token);
6940 +
6941 +       /* send command to mc*/
6942 +       err = mc_send_command(mc_io, &cmd);
6943 +       if (err)
6944 +               return err;
6945 +
6946 +       /* retrieve response parameters */
6947 +       DPNI_RSP_GET_RX_ERR_QUEUE(cmd, attr);
6948 +
6949 +       return 0;
6950 +}
6951 +
6952 +int dpni_set_tx_conf_revoke(struct fsl_mc_io   *mc_io,
6953 +                           uint32_t            cmd_flags,
6954 +                           uint16_t            token,
6955 +                           int         revoke)
6956 +{
6957 +       struct mc_command cmd = { 0 };
6958 +
6959 +       /* prepare command */
6960 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_CONF_REVOKE,
6961 +                                         cmd_flags,
6962 +                                         token);
6963 +       DPNI_CMD_SET_TX_CONF_REVOKE(cmd, revoke);
6964 +
6965 +       /* send command to mc*/
6966 +       return mc_send_command(mc_io, &cmd);
6967 +}
6968 +
6969 +int dpni_set_qos_table(struct fsl_mc_io *mc_io,
6970 +                      uint32_t cmd_flags,
6971 +                      uint16_t token,
6972 +                      const struct dpni_qos_tbl_cfg *cfg)
6973 +{
6974 +       struct mc_command cmd = { 0 };
6975 +
6976 +       /* prepare command */
6977 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_QOS_TBL,
6978 +                                         cmd_flags,
6979 +                                         token);
6980 +       DPNI_CMD_SET_QOS_TABLE(cmd, cfg);
6981 +
6982 +       /* send command to mc*/
6983 +       return mc_send_command(mc_io, &cmd);
6984 +}
6985 +
6986 +int dpni_add_qos_entry(struct fsl_mc_io *mc_io,
6987 +                      uint32_t cmd_flags,
6988 +                      uint16_t token,
6989 +                      const struct dpni_rule_cfg *cfg,
6990 +                      uint8_t tc_id)
6991 +{
6992 +       struct mc_command cmd = { 0 };
6993 +
6994 +       /* prepare command */
6995 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_QOS_ENT,
6996 +                                         cmd_flags,
6997 +                                         token);
6998 +       DPNI_CMD_ADD_QOS_ENTRY(cmd, cfg, tc_id);
6999 +
7000 +       /* send command to mc*/
7001 +       return mc_send_command(mc_io, &cmd);
7002 +}
7003 +
7004 +int dpni_remove_qos_entry(struct fsl_mc_io *mc_io,
7005 +                         uint32_t cmd_flags,
7006 +                         uint16_t token,
7007 +                         const struct dpni_rule_cfg *cfg)
7008 +{
7009 +       struct mc_command cmd = { 0 };
7010 +
7011 +       /* prepare command */
7012 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_QOS_ENT,
7013 +                                         cmd_flags,
7014 +                                         token);
7015 +       DPNI_CMD_REMOVE_QOS_ENTRY(cmd, cfg);
7016 +
7017 +       /* send command to mc*/
7018 +       return mc_send_command(mc_io, &cmd);
7019 +}
7020 +
7021 +int dpni_clear_qos_table(struct fsl_mc_io *mc_io,
7022 +                        uint32_t cmd_flags,
7023 +                        uint16_t token)
7024 +{
7025 +       struct mc_command cmd = { 0 };
7026 +
7027 +       /* prepare command */
7028 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLR_QOS_TBL,
7029 +                                         cmd_flags,
7030 +                                         token);
7031 +
7032 +       /* send command to mc*/
7033 +       return mc_send_command(mc_io, &cmd);
7034 +}
7035 +
7036 +int dpni_add_fs_entry(struct fsl_mc_io *mc_io,
7037 +                     uint32_t cmd_flags,
7038 +                     uint16_t token,
7039 +                     uint8_t tc_id,
7040 +                     const struct dpni_rule_cfg *cfg,
7041 +                     uint16_t flow_id)
7042 +{
7043 +       struct mc_command cmd = { 0 };
7044 +
7045 +       /* prepare command */
7046 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_FS_ENT,
7047 +                                         cmd_flags,
7048 +                                         token);
7049 +       DPNI_CMD_ADD_FS_ENTRY(cmd, tc_id, cfg, flow_id);
7050 +
7051 +       /* send command to mc*/
7052 +       return mc_send_command(mc_io, &cmd);
7053 +}
7054 +
7055 +int dpni_remove_fs_entry(struct fsl_mc_io *mc_io,
7056 +                        uint32_t cmd_flags,
7057 +                        uint16_t token,
7058 +                        uint8_t tc_id,
7059 +                        const struct dpni_rule_cfg *cfg)
7060 +{
7061 +       struct mc_command cmd = { 0 };
7062 +
7063 +       /* prepare command */
7064 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_FS_ENT,
7065 +                                         cmd_flags,
7066 +                                         token);
7067 +       DPNI_CMD_REMOVE_FS_ENTRY(cmd, tc_id, cfg);
7068 +
7069 +       /* send command to mc*/
7070 +       return mc_send_command(mc_io, &cmd);
7071 +}
7072 +
7073 +int dpni_clear_fs_entries(struct fsl_mc_io *mc_io,
7074 +                         uint32_t cmd_flags,
7075 +                         uint16_t token,
7076 +                         uint8_t tc_id)
7077 +{
7078 +       struct mc_command cmd = { 0 };
7079 +
7080 +       /* prepare command */
7081 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLR_FS_ENT,
7082 +                                         cmd_flags,
7083 +                                         token);
7084 +       DPNI_CMD_CLEAR_FS_ENTRIES(cmd, tc_id);
7085 +
7086 +       /* send command to mc*/
7087 +       return mc_send_command(mc_io, &cmd);
7088 +}
7089 +
7090 +int dpni_set_vlan_insertion(struct fsl_mc_io *mc_io,
7091 +                           uint32_t cmd_flags,
7092 +                           uint16_t token,
7093 +                           int en)
7094 +{
7095 +       struct mc_command cmd = { 0 };
7096 +
7097 +       /* prepare command */
7098 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_VLAN_INSERTION,
7099 +                                         cmd_flags, token);
7100 +       DPNI_CMD_SET_VLAN_INSERTION(cmd, en);
7101 +
7102 +       /* send command to mc*/
7103 +       return mc_send_command(mc_io, &cmd);
7104 +}
7105 +
7106 +int dpni_set_vlan_removal(struct fsl_mc_io *mc_io,
7107 +                         uint32_t cmd_flags,
7108 +                         uint16_t token,
7109 +                         int en)
7110 +{
7111 +       struct mc_command cmd = { 0 };
7112 +
7113 +       /* prepare command */
7114 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_VLAN_REMOVAL,
7115 +                                         cmd_flags, token);
7116 +       DPNI_CMD_SET_VLAN_REMOVAL(cmd, en);
7117 +
7118 +       /* send command to mc*/
7119 +       return mc_send_command(mc_io, &cmd);
7120 +}
7121 +
7122 +int dpni_set_ipr(struct fsl_mc_io *mc_io,
7123 +                uint32_t cmd_flags,
7124 +                uint16_t token,
7125 +                int en)
7126 +{
7127 +       struct mc_command cmd = { 0 };
7128 +
7129 +       /* prepare command */
7130 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IPR,
7131 +                                         cmd_flags,
7132 +                                         token);
7133 +       DPNI_CMD_SET_IPR(cmd, en);
7134 +
7135 +       /* send command to mc*/
7136 +       return mc_send_command(mc_io, &cmd);
7137 +}
7138 +
7139 +int dpni_set_ipf(struct fsl_mc_io *mc_io,
7140 +                uint32_t cmd_flags,
7141 +                uint16_t token,
7142 +                int en)
7143 +{
7144 +       struct mc_command cmd = { 0 };
7145 +
7146 +       /* prepare command */
7147 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IPF,
7148 +                                         cmd_flags,
7149 +                                         token);
7150 +       DPNI_CMD_SET_IPF(cmd, en);
7151 +
7152 +       /* send command to mc*/
7153 +       return mc_send_command(mc_io, &cmd);
7154 +}
7155 +
7156 +int dpni_set_rx_tc_policing(struct fsl_mc_io   *mc_io,
7157 +                           uint32_t            cmd_flags,
7158 +                           uint16_t            token,
7159 +                           uint8_t             tc_id,
7160 +                           const struct dpni_rx_tc_policing_cfg *cfg)
7161 +{
7162 +       struct mc_command cmd = { 0 };
7163 +
7164 +       /* prepare command */
7165 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_TC_POLICING,
7166 +                                         cmd_flags,
7167 +                                         token);
7168 +       DPNI_CMD_SET_RX_TC_POLICING(cmd, tc_id, cfg);
7169 +
7170 +       /* send command to mc*/
7171 +       return mc_send_command(mc_io, &cmd);
7172 +}
7173 +
7174 +int dpni_get_rx_tc_policing(struct fsl_mc_io                   *mc_io,
7175 +                           uint32_t                            cmd_flags,
7176 +                           uint16_t                            token,
7177 +                           uint8_t                             tc_id,
7178 +                           struct dpni_rx_tc_policing_cfg      *cfg)
7179 +{
7180 +       struct mc_command cmd = { 0 };
7181 +       int err;
7182 +
7183 +       /* prepare command */
7184 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_TC_POLICING,
7185 +                                         cmd_flags,
7186 +                                         token);
7187 +       DPNI_CMD_GET_RX_TC_POLICING(cmd, tc_id);
7188 +
7189 +       /* send command to mc*/
7190 +       err =  mc_send_command(mc_io, &cmd);
7191 +       if (err)
7192 +               return err;
7193 +
7194 +       DPNI_RSP_GET_RX_TC_POLICING(cmd, cfg);
7195 +
7196 +       return 0;
7197 +}
7198 +
7199 +void dpni_prepare_early_drop(const struct dpni_early_drop_cfg *cfg,
7200 +                            uint8_t *early_drop_buf)
7201 +{
7202 +       uint64_t *ext_params = (uint64_t *)early_drop_buf;
7203 +
7204 +       DPNI_PREP_EARLY_DROP(ext_params, cfg);
7205 +}
7206 +
7207 +void dpni_extract_early_drop(struct dpni_early_drop_cfg *cfg,
7208 +                            const uint8_t *early_drop_buf)
7209 +{
7210 +       const uint64_t *ext_params = (const uint64_t *)early_drop_buf;
7211 +
7212 +       DPNI_EXT_EARLY_DROP(ext_params, cfg);
7213 +}
7214 +
7215 +int dpni_set_rx_tc_early_drop(struct fsl_mc_io *mc_io,
7216 +                             uint32_t          cmd_flags,
7217 +                             uint16_t          token,
7218 +                             uint8_t           tc_id,
7219 +                             uint64_t          early_drop_iova)
7220 +{
7221 +       struct mc_command cmd = { 0 };
7222 +
7223 +       /* prepare command */
7224 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_TC_EARLY_DROP,
7225 +                                         cmd_flags,
7226 +                                         token);
7227 +       DPNI_CMD_SET_RX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova);
7228 +
7229 +       /* send command to mc*/
7230 +       return mc_send_command(mc_io, &cmd);
7231 +}
7232 +
7233 +int dpni_get_rx_tc_early_drop(struct fsl_mc_io *mc_io,
7234 +                             uint32_t          cmd_flags,
7235 +                             uint16_t          token,
7236 +                             uint8_t           tc_id,
7237 +                             uint64_t          early_drop_iova)
7238 +{
7239 +       struct mc_command cmd = { 0 };
7240 +
7241 +       /* prepare command */
7242 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_TC_EARLY_DROP,
7243 +                                         cmd_flags,
7244 +                                         token);
7245 +       DPNI_CMD_GET_RX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova);
7246 +
7247 +       /* send command to mc*/
7248 +       return mc_send_command(mc_io, &cmd);
7249 +}
7250 +
7251 +int dpni_set_tx_tc_early_drop(struct fsl_mc_io *mc_io,
7252 +                             uint32_t          cmd_flags,
7253 +                             uint16_t          token,
7254 +                             uint8_t           tc_id,
7255 +                             uint64_t          early_drop_iova)
7256 +{
7257 +       struct mc_command cmd = { 0 };
7258 +
7259 +       /* prepare command */
7260 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_TC_EARLY_DROP,
7261 +                                         cmd_flags,
7262 +                                         token);
7263 +       DPNI_CMD_SET_TX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova);
7264 +
7265 +       /* send command to mc*/
7266 +       return mc_send_command(mc_io, &cmd);
7267 +}
7268 +
7269 +int dpni_get_tx_tc_early_drop(struct fsl_mc_io *mc_io,
7270 +                             uint32_t          cmd_flags,
7271 +                             uint16_t          token,
7272 +                             uint8_t           tc_id,
7273 +                             uint64_t          early_drop_iova)
7274 +{
7275 +       struct mc_command cmd = { 0 };
7276 +
7277 +       /* prepare command */
7278 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_TC_EARLY_DROP,
7279 +                                         cmd_flags,
7280 +                                         token);
7281 +       DPNI_CMD_GET_TX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova);
7282 +
7283 +       /* send command to mc*/
7284 +       return mc_send_command(mc_io, &cmd);
7285 +}
7286 +
7287 +int dpni_set_rx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
7288 +                                          uint32_t             cmd_flags,
7289 +                                          uint16_t             token,
7290 +                                          uint8_t              tc_id,
7291 +                       const struct dpni_congestion_notification_cfg *cfg)
7292 +{
7293 +       struct mc_command cmd = { 0 };
7294 +
7295 +       /* prepare command */
7296 +       cmd.header = mc_encode_cmd_header(
7297 +                       DPNI_CMDID_SET_RX_TC_CONGESTION_NOTIFICATION,
7298 +                       cmd_flags,
7299 +                       token);
7300 +       DPNI_CMD_SET_RX_TC_CONGESTION_NOTIFICATION(cmd, tc_id, cfg);
7301 +
7302 +       /* send command to mc*/
7303 +       return mc_send_command(mc_io, &cmd);
7304 +}
7305 +
7306 +int dpni_get_rx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
7307 +                                          uint32_t             cmd_flags,
7308 +                                          uint16_t             token,
7309 +                                          uint8_t              tc_id,
7310 +                               struct dpni_congestion_notification_cfg *cfg)
7311 +{
7312 +       struct mc_command cmd = { 0 };
7313 +       int err;
7314 +
7315 +       /* prepare command */
7316 +       cmd.header = mc_encode_cmd_header(
7317 +                       DPNI_CMDID_GET_RX_TC_CONGESTION_NOTIFICATION,
7318 +                       cmd_flags,
7319 +                       token);
7320 +       DPNI_CMD_GET_RX_TC_CONGESTION_NOTIFICATION(cmd, tc_id);
7321 +
7322 +       /* send command to mc*/
7323 +       err = mc_send_command(mc_io, &cmd);
7324 +       if (err)
7325 +               return err;
7326 +
7327 +       DPNI_RSP_GET_RX_TC_CONGESTION_NOTIFICATION(cmd, cfg);
7328 +
7329 +       return 0;
7330 +}
7331 +
7332 +int dpni_set_tx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
7333 +                                          uint32_t             cmd_flags,
7334 +                                          uint16_t             token,
7335 +                                          uint8_t              tc_id,
7336 +                       const struct dpni_congestion_notification_cfg *cfg)
7337 +{
7338 +       struct mc_command cmd = { 0 };
7339 +
7340 +       /* prepare command */
7341 +       cmd.header = mc_encode_cmd_header(
7342 +                       DPNI_CMDID_SET_TX_TC_CONGESTION_NOTIFICATION,
7343 +                       cmd_flags,
7344 +                       token);
7345 +       DPNI_CMD_SET_TX_TC_CONGESTION_NOTIFICATION(cmd, tc_id, cfg);
7346 +
7347 +       /* send command to mc*/
7348 +       return mc_send_command(mc_io, &cmd);
7349 +}
7350 +
7351 +int dpni_get_tx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
7352 +                                          uint32_t             cmd_flags,
7353 +                                          uint16_t             token,
7354 +                                          uint8_t              tc_id,
7355 +                               struct dpni_congestion_notification_cfg *cfg)
7356 +{
7357 +       struct mc_command cmd = { 0 };
7358 +       int err;
7359 +
7360 +       /* prepare command */
7361 +       cmd.header = mc_encode_cmd_header(
7362 +                       DPNI_CMDID_GET_TX_TC_CONGESTION_NOTIFICATION,
7363 +                       cmd_flags,
7364 +                       token);
7365 +       DPNI_CMD_GET_TX_TC_CONGESTION_NOTIFICATION(cmd, tc_id);
7366 +
7367 +       /* send command to mc*/
7368 +       err = mc_send_command(mc_io, &cmd);
7369 +       if (err)
7370 +               return err;
7371 +
7372 +       DPNI_RSP_GET_TX_TC_CONGESTION_NOTIFICATION(cmd, cfg);
7373 +
7374 +       return 0;
7375 +}
7376 +
7377 +int dpni_set_tx_conf(struct fsl_mc_io  *mc_io,
7378 +                    uint32_t           cmd_flags,
7379 +                    uint16_t           token,
7380 +                    uint16_t           flow_id,
7381 +                    const struct dpni_tx_conf_cfg      *cfg)
7382 +{
7383 +       struct mc_command cmd = { 0 };
7384 +
7385 +       /* prepare command */
7386 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_CONF,
7387 +                                         cmd_flags,
7388 +                                         token);
7389 +       DPNI_CMD_SET_TX_CONF(cmd, flow_id, cfg);
7390 +
7391 +       /* send command to mc*/
7392 +       return mc_send_command(mc_io, &cmd);
7393 +}
7394 +
7395 +int dpni_get_tx_conf(struct fsl_mc_io          *mc_io,
7396 +                    uint32_t                   cmd_flags,
7397 +                    uint16_t                   token,
7398 +                    uint16_t                   flow_id,
7399 +                    struct dpni_tx_conf_attr   *attr)
7400 +{
7401 +       struct mc_command cmd = { 0 };
7402 +       int err;
7403 +
7404 +       /* prepare command */
7405 +       cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_CONF,
7406 +                                         cmd_flags,
7407 +                                         token);
7408 +       DPNI_CMD_GET_TX_CONF(cmd, flow_id);
7409 +
7410 +       /* send command to mc*/
7411 +       err = mc_send_command(mc_io, &cmd);
7412 +       if (err)
7413 +               return err;
7414 +
7415 +       DPNI_RSP_GET_TX_CONF(cmd, attr);
7416 +
7417 +       return 0;
7418 +}
7419 +
7420 +int dpni_set_tx_conf_congestion_notification(struct fsl_mc_io  *mc_io,
7421 +                                            uint32_t           cmd_flags,
7422 +                                            uint16_t           token,
7423 +                                            uint16_t           flow_id,
7424 +                        const struct dpni_congestion_notification_cfg *cfg)
7425 +{
7426 +       struct mc_command cmd = { 0 };
7427 +
7428 +       /* prepare command */
7429 +       cmd.header = mc_encode_cmd_header(
7430 +                       DPNI_CMDID_SET_TX_CONF_CONGESTION_NOTIFICATION,
7431 +                       cmd_flags,
7432 +                       token);
7433 +       DPNI_CMD_SET_TX_CONF_CONGESTION_NOTIFICATION(cmd, flow_id, cfg);
7434 +
7435 +       /* send command to mc*/
7436 +       return mc_send_command(mc_io, &cmd);
7437 +}
7438 +
7439 +int dpni_get_tx_conf_congestion_notification(struct fsl_mc_io  *mc_io,
7440 +                                            uint32_t           cmd_flags,
7441 +                                            uint16_t           token,
7442 +                                            uint16_t           flow_id,
7443 +                                struct dpni_congestion_notification_cfg *cfg)
7444 +{
7445 +       struct mc_command cmd = { 0 };
7446 +       int err;
7447 +
7448 +       /* prepare command */
7449 +       cmd.header = mc_encode_cmd_header(
7450 +                               DPNI_CMDID_GET_TX_CONF_CONGESTION_NOTIFICATION,
7451 +                               cmd_flags,
7452 +                               token);
7453 +       DPNI_CMD_GET_TX_CONF_CONGESTION_NOTIFICATION(cmd, flow_id);
7454 +
7455 +       /* send command to mc*/
7456 +       err = mc_send_command(mc_io, &cmd);
7457 +       if (err)
7458 +               return err;
7459 +
7460 +       DPNI_RSP_GET_TX_CONF_CONGESTION_NOTIFICATION(cmd, cfg);
7461 +
7462 +       return 0;
7463 +}
7464 diff --git a/drivers/net/dpaa2/mc/dprc.c b/drivers/net/dpaa2/mc/dprc.c
7465 new file mode 100644
7466 index 0000000..75c6a68
7467 --- /dev/null
7468 +++ b/drivers/net/dpaa2/mc/dprc.c
7469 @@ -0,0 +1,786 @@
7470 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
7471 + *
7472 + * Redistribution and use in source and binary forms, with or without
7473 + * modification, are permitted provided that the following conditions are met:
7474 + * * Redistributions of source code must retain the above copyright
7475 + * notice, this list of conditions and the following disclaimer.
7476 + * * Redistributions in binary form must reproduce the above copyright
7477 + * notice, this list of conditions and the following disclaimer in the
7478 + * documentation and/or other materials provided with the distribution.
7479 + * * Neither the name of the above-listed copyright holders nor the
7480 + * names of any contributors may be used to endorse or promote products
7481 + * derived from this software without specific prior written permission.
7482 + *
7483 + *
7484 + * ALTERNATIVELY, this software may be distributed under the terms of the
7485 + * GNU General Public License ("GPL") as published by the Free Software
7486 + * Foundation, either version 2 of that License or (at your option) any
7487 + * later version.
7488 + *
7489 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
7490 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
7491 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
7492 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
7493 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
7494 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
7495 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
7496 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
7497 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
7498 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
7499 + * POSSIBILITY OF SUCH DAMAGE.
7500 + */
7501 +#include <fsl_mc_sys.h>
7502 +#include <fsl_mc_cmd.h>
7503 +#include <fsl_dprc.h>
7504 +#include <fsl_dprc_cmd.h>
7505 +
7506 +int dprc_get_container_id(struct fsl_mc_io *mc_io,
7507 +                         uint32_t cmd_flags,
7508 +                         int *container_id)
7509 +{
7510 +       struct mc_command cmd = { 0 };
7511 +       int err;
7512 +
7513 +       /* prepare command */
7514 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONT_ID,
7515 +                                         cmd_flags,
7516 +                                         0);
7517 +
7518 +       /* send command to mc*/
7519 +       err = mc_send_command(mc_io, &cmd);
7520 +       if (err)
7521 +               return err;
7522 +
7523 +       /* retrieve response parameters */
7524 +       DPRC_RSP_GET_CONTAINER_ID(cmd, *container_id);
7525 +
7526 +       return 0;
7527 +}
7528 +
7529 +int dprc_open(struct fsl_mc_io *mc_io,
7530 +             uint32_t cmd_flags,
7531 +             int container_id,
7532 +             uint16_t *token)
7533 +{
7534 +       struct mc_command cmd = { 0 };
7535 +       int err;
7536 +
7537 +       /* prepare command */
7538 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, cmd_flags,
7539 +                                         0);
7540 +       DPRC_CMD_OPEN(cmd, container_id);
7541 +
7542 +       /* send command to mc*/
7543 +       err = mc_send_command(mc_io, &cmd);
7544 +       if (err)
7545 +               return err;
7546 +
7547 +       /* retrieve response parameters */
7548 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
7549 +
7550 +       return 0;
7551 +}
7552 +
7553 +int dprc_close(struct fsl_mc_io *mc_io,
7554 +              uint32_t cmd_flags,
7555 +              uint16_t token)
7556 +{
7557 +       struct mc_command cmd = { 0 };
7558 +
7559 +       /* prepare command */
7560 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLOSE, cmd_flags,
7561 +                                         token);
7562 +
7563 +       /* send command to mc*/
7564 +       return mc_send_command(mc_io, &cmd);
7565 +}
7566 +
7567 +int dprc_create_container(struct fsl_mc_io *mc_io,
7568 +                         uint32_t cmd_flags,
7569 +                         uint16_t token,
7570 +                         struct dprc_cfg *cfg,
7571 +                         int *child_container_id,
7572 +                         uint64_t *child_portal_paddr)
7573 +{
7574 +       struct mc_command cmd = { 0 };
7575 +       int err;
7576 +
7577 +       /* prepare command */
7578 +       DPRC_CMD_CREATE_CONTAINER(cmd, cfg);
7579 +
7580 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_CREATE_CONT,
7581 +                                         cmd_flags,
7582 +                                         token);
7583 +
7584 +       /* send command to mc*/
7585 +       err = mc_send_command(mc_io, &cmd);
7586 +       if (err)
7587 +               return err;
7588 +
7589 +       /* retrieve response parameters */
7590 +       DPRC_RSP_CREATE_CONTAINER(cmd, *child_container_id,
7591 +                                 *child_portal_paddr);
7592 +
7593 +       return 0;
7594 +}
7595 +
7596 +int dprc_destroy_container(struct fsl_mc_io *mc_io,
7597 +                          uint32_t cmd_flags,
7598 +                          uint16_t token,
7599 +                          int child_container_id)
7600 +{
7601 +       struct mc_command cmd = { 0 };
7602 +
7603 +       /* prepare command */
7604 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_DESTROY_CONT,
7605 +                                         cmd_flags,
7606 +                                         token);
7607 +       DPRC_CMD_DESTROY_CONTAINER(cmd, child_container_id);
7608 +
7609 +       /* send command to mc*/
7610 +       return mc_send_command(mc_io, &cmd);
7611 +}
7612 +
7613 +int dprc_reset_container(struct fsl_mc_io *mc_io,
7614 +                        uint32_t cmd_flags,
7615 +                        uint16_t token,
7616 +                        int child_container_id)
7617 +{
7618 +       struct mc_command cmd = { 0 };
7619 +
7620 +       /* prepare command */
7621 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_RESET_CONT,
7622 +                                         cmd_flags,
7623 +                                         token);
7624 +       DPRC_CMD_RESET_CONTAINER(cmd, child_container_id);
7625 +
7626 +       /* send command to mc*/
7627 +       return mc_send_command(mc_io, &cmd);
7628 +}
7629 +
7630 +int dprc_get_irq(struct fsl_mc_io *mc_io,
7631 +                uint32_t cmd_flags,
7632 +                uint16_t token,
7633 +                uint8_t irq_index,
7634 +                int *type,
7635 +                struct dprc_irq_cfg *irq_cfg)
7636 +{
7637 +       struct mc_command cmd = { 0 };
7638 +       int err;
7639 +
7640 +       /* prepare command */
7641 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ,
7642 +                                         cmd_flags,
7643 +                                         token);
7644 +       DPRC_CMD_GET_IRQ(cmd, irq_index);
7645 +
7646 +       /* send command to mc*/
7647 +       err = mc_send_command(mc_io, &cmd);
7648 +       if (err)
7649 +               return err;
7650 +
7651 +       /* retrieve response parameters */
7652 +       DPRC_RSP_GET_IRQ(cmd, *type, irq_cfg);
7653 +
7654 +       return 0;
7655 +}
7656 +
7657 +int dprc_set_irq(struct fsl_mc_io *mc_io,
7658 +                uint32_t cmd_flags,
7659 +                uint16_t token,
7660 +                uint8_t irq_index,
7661 +                struct dprc_irq_cfg *irq_cfg)
7662 +{
7663 +       struct mc_command cmd = { 0 };
7664 +
7665 +       /* prepare command */
7666 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ,
7667 +                                         cmd_flags,
7668 +                                         token);
7669 +       DPRC_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
7670 +
7671 +       /* send command to mc*/
7672 +       return mc_send_command(mc_io, &cmd);
7673 +}
7674 +
7675 +int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
7676 +                       uint32_t cmd_flags,
7677 +                       uint16_t token,
7678 +                       uint8_t irq_index,
7679 +                       uint8_t *en)
7680 +{
7681 +       struct mc_command cmd = { 0 };
7682 +       int err;
7683 +
7684 +       /* prepare command */
7685 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_ENABLE,
7686 +                                         cmd_flags,
7687 +                                         token);
7688 +       DPRC_CMD_GET_IRQ_ENABLE(cmd, irq_index);
7689 +
7690 +       /* send command to mc*/
7691 +       err = mc_send_command(mc_io, &cmd);
7692 +       if (err)
7693 +               return err;
7694 +
7695 +       /* retrieve response parameters */
7696 +       DPRC_RSP_GET_IRQ_ENABLE(cmd, *en);
7697 +
7698 +       return 0;
7699 +}
7700 +
7701 +int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
7702 +                       uint32_t cmd_flags,
7703 +                       uint16_t token,
7704 +                       uint8_t irq_index,
7705 +                       uint8_t en)
7706 +{
7707 +       struct mc_command cmd = { 0 };
7708 +
7709 +       /* prepare command */
7710 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_ENABLE,
7711 +                                         cmd_flags,
7712 +                                         token);
7713 +       DPRC_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
7714 +
7715 +       /* send command to mc*/
7716 +       return mc_send_command(mc_io, &cmd);
7717 +}
7718 +
7719 +int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
7720 +                     uint32_t cmd_flags,
7721 +                     uint16_t token,
7722 +                     uint8_t irq_index,
7723 +                     uint32_t *mask)
7724 +{
7725 +       struct mc_command cmd = { 0 };
7726 +       int err;
7727 +
7728 +       /* prepare command */
7729 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_MASK,
7730 +                                         cmd_flags,
7731 +                                         token);
7732 +       DPRC_CMD_GET_IRQ_MASK(cmd, irq_index);
7733 +
7734 +       /* send command to mc*/
7735 +       err = mc_send_command(mc_io, &cmd);
7736 +       if (err)
7737 +               return err;
7738 +
7739 +       /* retrieve response parameters */
7740 +       DPRC_RSP_GET_IRQ_MASK(cmd, *mask);
7741 +
7742 +       return 0;
7743 +}
7744 +
7745 +int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
7746 +                     uint32_t cmd_flags,
7747 +                     uint16_t token,
7748 +                     uint8_t irq_index,
7749 +                     uint32_t mask)
7750 +{
7751 +       struct mc_command cmd = { 0 };
7752 +
7753 +       /* prepare command */
7754 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_MASK,
7755 +                                         cmd_flags,
7756 +                                         token);
7757 +       DPRC_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
7758 +
7759 +       /* send command to mc*/
7760 +       return mc_send_command(mc_io, &cmd);
7761 +}
7762 +
7763 +int dprc_get_irq_status(struct fsl_mc_io *mc_io,
7764 +                       uint32_t cmd_flags,
7765 +                       uint16_t token,
7766 +                       uint8_t irq_index,
7767 +                       uint32_t *status)
7768 +{
7769 +       struct mc_command cmd = { 0 };
7770 +       int err;
7771 +
7772 +       /* prepare command */
7773 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_STATUS,
7774 +                                         cmd_flags,
7775 +                                         token);
7776 +       DPRC_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
7777 +
7778 +       /* send command to mc*/
7779 +       err = mc_send_command(mc_io, &cmd);
7780 +       if (err)
7781 +               return err;
7782 +
7783 +       /* retrieve response parameters */
7784 +       DPRC_RSP_GET_IRQ_STATUS(cmd, *status);
7785 +
7786 +       return 0;
7787 +}
7788 +
7789 +int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
7790 +                         uint32_t cmd_flags,
7791 +                         uint16_t token,
7792 +                         uint8_t irq_index,
7793 +                         uint32_t status)
7794 +{
7795 +       struct mc_command cmd = { 0 };
7796 +
7797 +       /* prepare command */
7798 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLEAR_IRQ_STATUS,
7799 +                                         cmd_flags,
7800 +                                         token);
7801 +       DPRC_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
7802 +
7803 +       /* send command to mc*/
7804 +       return mc_send_command(mc_io, &cmd);
7805 +}
7806 +
7807 +int dprc_get_attributes(struct fsl_mc_io *mc_io,
7808 +                       uint32_t cmd_flags,
7809 +                       uint16_t token,
7810 +                       struct dprc_attributes *attr)
7811 +{
7812 +       struct mc_command cmd = { 0 };
7813 +       int err;
7814 +
7815 +       /* prepare command */
7816 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_ATTR,
7817 +                                         cmd_flags,
7818 +                                         token);
7819 +
7820 +       /* send command to mc*/
7821 +       err = mc_send_command(mc_io, &cmd);
7822 +       if (err)
7823 +               return err;
7824 +
7825 +       /* retrieve response parameters */
7826 +       DPRC_RSP_GET_ATTRIBUTES(cmd, attr);
7827 +
7828 +       return 0;
7829 +}
7830 +
7831 +int dprc_set_res_quota(struct fsl_mc_io *mc_io,
7832 +                      uint32_t cmd_flags,
7833 +                      uint16_t token,
7834 +                      int child_container_id,
7835 +                      char *type,
7836 +                      uint16_t quota)
7837 +{
7838 +       struct mc_command cmd = { 0 };
7839 +
7840 +       /* prepare command */
7841 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_RES_QUOTA,
7842 +                                         cmd_flags,
7843 +                                         token);
7844 +       DPRC_CMD_SET_RES_QUOTA(cmd, child_container_id, type, quota);
7845 +
7846 +       /* send command to mc*/
7847 +       return mc_send_command(mc_io, &cmd);
7848 +}
7849 +
7850 +int dprc_get_res_quota(struct fsl_mc_io *mc_io,
7851 +                      uint32_t cmd_flags,
7852 +                      uint16_t token,
7853 +                      int child_container_id,
7854 +                      char *type,
7855 +                      uint16_t *quota)
7856 +{
7857 +       struct mc_command cmd = { 0 };
7858 +       int err;
7859 +
7860 +       /* prepare command */
7861 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_QUOTA,
7862 +                                         cmd_flags,
7863 +                                         token);
7864 +       DPRC_CMD_GET_RES_QUOTA(cmd, child_container_id, type);
7865 +
7866 +       /* send command to mc*/
7867 +       err = mc_send_command(mc_io, &cmd);
7868 +       if (err)
7869 +               return err;
7870 +
7871 +       /* retrieve response parameters */
7872 +       DPRC_RSP_GET_RES_QUOTA(cmd, *quota);
7873 +
7874 +       return 0;
7875 +}
7876 +
7877 +int dprc_assign(struct fsl_mc_io *mc_io,
7878 +               uint32_t cmd_flags,
7879 +               uint16_t token,
7880 +               int container_id,
7881 +               struct dprc_res_req *res_req)
7882 +{
7883 +       struct mc_command cmd = { 0 };
7884 +
7885 +       /* prepare command */
7886 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_ASSIGN,
7887 +                                         cmd_flags,
7888 +                                         token);
7889 +       DPRC_CMD_ASSIGN(cmd, container_id, res_req);
7890 +
7891 +       /* send command to mc*/
7892 +       return mc_send_command(mc_io, &cmd);
7893 +}
7894 +
7895 +int dprc_unassign(struct fsl_mc_io *mc_io,
7896 +                 uint32_t cmd_flags,
7897 +                 uint16_t token,
7898 +                 int child_container_id,
7899 +                 struct dprc_res_req *res_req)
7900 +{
7901 +       struct mc_command cmd = { 0 };
7902 +
7903 +       /* prepare command */
7904 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_UNASSIGN,
7905 +                                         cmd_flags,
7906 +                                         token);
7907 +       DPRC_CMD_UNASSIGN(cmd, child_container_id, res_req);
7908 +
7909 +       /* send command to mc*/
7910 +       return mc_send_command(mc_io, &cmd);
7911 +}
7912 +
7913 +int dprc_get_pool_count(struct fsl_mc_io *mc_io,
7914 +                       uint32_t cmd_flags,
7915 +                       uint16_t token,
7916 +                       int *pool_count)
7917 +{
7918 +       struct mc_command cmd = { 0 };
7919 +       int err;
7920 +
7921 +       /* prepare command */
7922 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL_COUNT,
7923 +                                         cmd_flags,
7924 +                                         token);
7925 +
7926 +       /* send command to mc*/
7927 +       err = mc_send_command(mc_io, &cmd);
7928 +       if (err)
7929 +               return err;
7930 +
7931 +       /* retrieve response parameters */
7932 +       DPRC_RSP_GET_POOL_COUNT(cmd, *pool_count);
7933 +
7934 +       return 0;
7935 +}
7936 +
7937 +int dprc_get_pool(struct fsl_mc_io *mc_io,
7938 +                 uint32_t cmd_flags,
7939 +                 uint16_t token,
7940 +                 int pool_index,
7941 +                 char *type)
7942 +{
7943 +       struct mc_command cmd = { 0 };
7944 +       int err;
7945 +
7946 +       /* prepare command */
7947 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL,
7948 +                                         cmd_flags,
7949 +                                         token);
7950 +       DPRC_CMD_GET_POOL(cmd, pool_index);
7951 +
7952 +       /* send command to mc*/
7953 +       err = mc_send_command(mc_io, &cmd);
7954 +       if (err)
7955 +               return err;
7956 +
7957 +       /* retrieve response parameters */
7958 +       DPRC_RSP_GET_POOL(cmd, type);
7959 +
7960 +       return 0;
7961 +}
7962 +
7963 +int dprc_get_obj_count(struct fsl_mc_io *mc_io,
7964 +                      uint32_t cmd_flags,
7965 +                      uint16_t token,
7966 +                      int *obj_count)
7967 +{
7968 +       struct mc_command cmd = { 0 };
7969 +       int err;
7970 +
7971 +       /* prepare command */
7972 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_COUNT,
7973 +                                         cmd_flags,
7974 +                                         token);
7975 +
7976 +       /* send command to mc*/
7977 +       err = mc_send_command(mc_io, &cmd);
7978 +       if (err)
7979 +               return err;
7980 +
7981 +       /* retrieve response parameters */
7982 +       DPRC_RSP_GET_OBJ_COUNT(cmd, *obj_count);
7983 +
7984 +       return 0;
7985 +}
7986 +
7987 +int dprc_get_obj(struct fsl_mc_io *mc_io,
7988 +                uint32_t cmd_flags,
7989 +                uint16_t token,
7990 +                int obj_index,
7991 +                struct dprc_obj_desc *obj_desc)
7992 +{
7993 +       struct mc_command cmd = { 0 };
7994 +       int err;
7995 +
7996 +       /* prepare command */
7997 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ,
7998 +                                         cmd_flags,
7999 +                                         token);
8000 +       DPRC_CMD_GET_OBJ(cmd, obj_index);
8001 +
8002 +       /* send command to mc*/
8003 +       err = mc_send_command(mc_io, &cmd);
8004 +       if (err)
8005 +               return err;
8006 +
8007 +       /* retrieve response parameters */
8008 +       DPRC_RSP_GET_OBJ(cmd, obj_desc);
8009 +
8010 +       return 0;
8011 +}
8012 +
8013 +int dprc_get_obj_desc(struct fsl_mc_io *mc_io,
8014 +                     uint32_t cmd_flags,
8015 +                     uint16_t token,
8016 +                     char *obj_type,
8017 +                     int obj_id,
8018 +                     struct dprc_obj_desc *obj_desc)
8019 +{
8020 +       struct mc_command cmd = { 0 };
8021 +       int err;
8022 +
8023 +       /* prepare command */
8024 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_DESC,
8025 +                                         cmd_flags,
8026 +                                         token);
8027 +       DPRC_CMD_GET_OBJ_DESC(cmd, obj_type, obj_id);
8028 +
8029 +       /* send command to mc*/
8030 +       err = mc_send_command(mc_io, &cmd);
8031 +       if (err)
8032 +               return err;
8033 +
8034 +       /* retrieve response parameters */
8035 +       DPRC_RSP_GET_OBJ_DESC(cmd, obj_desc);
8036 +
8037 +       return 0;
8038 +}
8039 +
8040 +int dprc_set_obj_irq(struct fsl_mc_io *mc_io,
8041 +                    uint32_t cmd_flags,
8042 +                    uint16_t token,
8043 +                    char *obj_type,
8044 +                    int obj_id,
8045 +                    uint8_t irq_index,
8046 +                    struct dprc_irq_cfg *irq_cfg)
8047 +{
8048 +       struct mc_command cmd = { 0 };
8049 +
8050 +       /* prepare command */
8051 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_OBJ_IRQ,
8052 +                                         cmd_flags,
8053 +                                         token);
8054 +       DPRC_CMD_SET_OBJ_IRQ(cmd,
8055 +                            obj_type,
8056 +                            obj_id,
8057 +                            irq_index,
8058 +                            irq_cfg);
8059 +
8060 +       /* send command to mc*/
8061 +       return mc_send_command(mc_io, &cmd);
8062 +}
8063 +
8064 +int dprc_get_obj_irq(struct fsl_mc_io  *mc_io,
8065 +                    uint32_t           cmd_flags,
8066 +                    uint16_t           token,
8067 +                    char               *obj_type,
8068 +                    int                obj_id,
8069 +                    uint8_t            irq_index,
8070 +                    int                *type,
8071 +                    struct dprc_irq_cfg *irq_cfg)
8072 +{
8073 +       struct mc_command cmd = { 0 };
8074 +       int err;
8075 +
8076 +       /* prepare command */
8077 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_IRQ,
8078 +                                         cmd_flags,
8079 +                                         token);
8080 +       DPRC_CMD_GET_OBJ_IRQ(cmd, obj_type, obj_id, irq_index);
8081 +
8082 +       /* send command to mc*/
8083 +       err = mc_send_command(mc_io, &cmd);
8084 +       if (err)
8085 +               return err;
8086 +
8087 +       /* retrieve response parameters */
8088 +       DPRC_RSP_GET_OBJ_IRQ(cmd, *type, irq_cfg);
8089 +
8090 +       return 0;
8091 +}
8092 +
8093 +int dprc_get_res_count(struct fsl_mc_io *mc_io,
8094 +                      uint32_t cmd_flags,
8095 +                      uint16_t token,
8096 +                      char *type,
8097 +                      int *res_count)
8098 +{
8099 +       struct mc_command cmd = { 0 };
8100 +       int err;
8101 +
8102 +       *res_count = 0;
8103 +
8104 +       /* prepare command */
8105 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_COUNT,
8106 +                                         cmd_flags,
8107 +                                         token);
8108 +       DPRC_CMD_GET_RES_COUNT(cmd, type);
8109 +
8110 +       /* send command to mc*/
8111 +       err = mc_send_command(mc_io, &cmd);
8112 +       if (err)
8113 +               return err;
8114 +
8115 +       /* retrieve response parameters */
8116 +       DPRC_RSP_GET_RES_COUNT(cmd, *res_count);
8117 +
8118 +       return 0;
8119 +}
8120 +
8121 +int dprc_get_res_ids(struct fsl_mc_io *mc_io,
8122 +                    uint32_t cmd_flags,
8123 +                    uint16_t token,
8124 +                    char *type,
8125 +                    struct dprc_res_ids_range_desc *range_desc)
8126 +{
8127 +       struct mc_command cmd = { 0 };
8128 +       int err;
8129 +
8130 +       /* prepare command */
8131 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_IDS,
8132 +                                         cmd_flags,
8133 +                                         token);
8134 +       DPRC_CMD_GET_RES_IDS(cmd, range_desc, type);
8135 +
8136 +       /* send command to mc*/
8137 +       err = mc_send_command(mc_io, &cmd);
8138 +       if (err)
8139 +               return err;
8140 +
8141 +       /* retrieve response parameters */
8142 +       DPRC_RSP_GET_RES_IDS(cmd, range_desc);
8143 +
8144 +       return 0;
8145 +}
8146 +
8147 +int dprc_get_obj_region(struct fsl_mc_io *mc_io,
8148 +                       uint32_t cmd_flags,
8149 +                       uint16_t token,
8150 +                       char *obj_type,
8151 +                       int obj_id,
8152 +                       uint8_t region_index,
8153 +                       struct dprc_region_desc *region_desc)
8154 +{
8155 +       struct mc_command cmd = { 0 };
8156 +       int err;
8157 +
8158 +       /* prepare command */
8159 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,
8160 +                                         cmd_flags,
8161 +                                         token);
8162 +       DPRC_CMD_GET_OBJ_REGION(cmd, obj_type, obj_id, region_index);
8163 +
8164 +       /* send command to mc*/
8165 +       err = mc_send_command(mc_io, &cmd);
8166 +       if (err)
8167 +               return err;
8168 +
8169 +       /* retrieve response parameters */
8170 +       DPRC_RSP_GET_OBJ_REGION(cmd, region_desc);
8171 +
8172 +       return 0;
8173 +}
8174 +
8175 +int dprc_set_obj_label(struct fsl_mc_io *mc_io,
8176 +                      uint32_t cmd_flags,
8177 +                      uint16_t  token,
8178 +                      char *obj_type,
8179 +                      int  obj_id,
8180 +                      char *label)
8181 +{
8182 +       struct mc_command cmd = { 0 };
8183 +
8184 +       /* prepare command */
8185 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_OBJ_LABEL,
8186 +                                         cmd_flags,
8187 +                                         token);
8188 +       DPRC_CMD_SET_OBJ_LABEL(cmd, obj_type, obj_id, label);
8189 +
8190 +       /* send command to mc*/
8191 +       return mc_send_command(mc_io, &cmd);
8192 +}
8193 +
8194 +int dprc_connect(struct fsl_mc_io *mc_io,
8195 +                uint32_t cmd_flags,
8196 +                uint16_t token,
8197 +                const struct dprc_endpoint *endpoint1,
8198 +                const struct dprc_endpoint *endpoint2,
8199 +                const struct dprc_connection_cfg *cfg)
8200 +{
8201 +       struct mc_command cmd = { 0 };
8202 +
8203 +       /* prepare command */
8204 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_CONNECT,
8205 +                                         cmd_flags,
8206 +                                         token);
8207 +       DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2, cfg);
8208 +
8209 +       /* send command to mc*/
8210 +       return mc_send_command(mc_io, &cmd);
8211 +}
8212 +
8213 +int dprc_disconnect(struct fsl_mc_io *mc_io,
8214 +                   uint32_t cmd_flags,
8215 +                   uint16_t token,
8216 +                   const struct dprc_endpoint *endpoint)
8217 +{
8218 +       struct mc_command cmd = { 0 };
8219 +
8220 +       /* prepare command */
8221 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_DISCONNECT,
8222 +                                         cmd_flags,
8223 +                                         token);
8224 +       DPRC_CMD_DISCONNECT(cmd, endpoint);
8225 +
8226 +       /* send command to mc*/
8227 +       return mc_send_command(mc_io, &cmd);
8228 +}
8229 +
8230 +int dprc_get_connection(struct fsl_mc_io *mc_io,
8231 +                       uint32_t cmd_flags,
8232 +                       uint16_t token,
8233 +                       const struct dprc_endpoint *endpoint1,
8234 +                       struct dprc_endpoint *endpoint2,
8235 +                       int *state)
8236 +{
8237 +       struct mc_command cmd = { 0 };
8238 +       int err;
8239 +
8240 +       /* prepare command */
8241 +       cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONNECTION,
8242 +                                         cmd_flags,
8243 +                                         token);
8244 +       DPRC_CMD_GET_CONNECTION(cmd, endpoint1);
8245 +
8246 +       /* send command to mc*/
8247 +       err = mc_send_command(mc_io, &cmd);
8248 +       if (err)
8249 +               return err;
8250 +
8251 +       /* retrieve response parameters */
8252 +       DPRC_RSP_GET_CONNECTION(cmd, endpoint2, *state);
8253 +
8254 +       return 0;
8255 +}
8256 diff --git a/drivers/net/dpaa2/mc/dprtc.c b/drivers/net/dpaa2/mc/dprtc.c
8257 new file mode 100644
8258 index 0000000..73667af
8259 --- /dev/null
8260 +++ b/drivers/net/dpaa2/mc/dprtc.c
8261 @@ -0,0 +1,509 @@
8262 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
8263 + *
8264 + * Redistribution and use in source and binary forms, with or without
8265 + * modification, are permitted provided that the following conditions are met:
8266 + * * Redistributions of source code must retain the above copyright
8267 + * notice, this list of conditions and the following disclaimer.
8268 + * * Redistributions in binary form must reproduce the above copyright
8269 + * notice, this list of conditions and the following disclaimer in the
8270 + * documentation and/or other materials provided with the distribution.
8271 + * * Neither the name of the above-listed copyright holders nor the
8272 + * names of any contributors may be used to endorse or promote products
8273 + * derived from this software without specific prior written permission.
8274 + *
8275 + *
8276 + * ALTERNATIVELY, this software may be distributed under the terms of the
8277 + * GNU General Public License ("GPL") as published by the Free Software
8278 + * Foundation, either version 2 of that License or (at your option) any
8279 + * later version.
8280 + *
8281 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
8282 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
8283 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
8284 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
8285 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
8286 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
8287 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
8288 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
8289 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
8290 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
8291 + * POSSIBILITY OF SUCH DAMAGE.
8292 + */
8293 +#include <fsl_mc_sys.h>
8294 +#include <fsl_mc_cmd.h>
8295 +#include <fsl_dprtc.h>
8296 +#include <fsl_dprtc_cmd.h>
8297 +
8298 +int dprtc_open(struct fsl_mc_io *mc_io,
8299 +              uint32_t cmd_flags,
8300 +             int dprtc_id,
8301 +             uint16_t *token)
8302 +{
8303 +       struct mc_command cmd = { 0 };
8304 +       int err;
8305 +
8306 +       /* prepare command */
8307 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
8308 +                                         cmd_flags,
8309 +                                         0);
8310 +       DPRTC_CMD_OPEN(cmd, dprtc_id);
8311 +
8312 +       /* send command to mc*/
8313 +       err = mc_send_command(mc_io, &cmd);
8314 +       if (err)
8315 +               return err;
8316 +
8317 +       /* retrieve response parameters */
8318 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
8319 +
8320 +       return err;
8321 +}
8322 +
8323 +int dprtc_close(struct fsl_mc_io *mc_io,
8324 +               uint32_t cmd_flags,
8325 +              uint16_t token)
8326 +{
8327 +       struct mc_command cmd = { 0 };
8328 +
8329 +       /* prepare command */
8330 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
8331 +                                         token);
8332 +
8333 +       /* send command to mc*/
8334 +       return mc_send_command(mc_io, &cmd);
8335 +}
8336 +
8337 +int dprtc_create(struct fsl_mc_io *mc_io,
8338 +                uint32_t cmd_flags,
8339 +               const struct dprtc_cfg *cfg,
8340 +               uint16_t *token)
8341 +{
8342 +       struct mc_command cmd = { 0 };
8343 +       int err;
8344 +
8345 +       (void)(cfg); /* unused */
8346 +
8347 +       /* prepare command */
8348 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
8349 +                                         cmd_flags,
8350 +                                         0);
8351 +
8352 +       /* send command to mc*/
8353 +       err = mc_send_command(mc_io, &cmd);
8354 +       if (err)
8355 +               return err;
8356 +
8357 +       /* retrieve response parameters */
8358 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
8359 +
8360 +       return 0;
8361 +}
8362 +
8363 +int dprtc_destroy(struct fsl_mc_io *mc_io,
8364 +                 uint32_t cmd_flags,
8365 +                uint16_t token)
8366 +{
8367 +       struct mc_command cmd = { 0 };
8368 +
8369 +       /* prepare command */
8370 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
8371 +                                         cmd_flags,
8372 +                                         token);
8373 +
8374 +       /* send command to mc*/
8375 +       return mc_send_command(mc_io, &cmd);
8376 +}
8377 +
8378 +int dprtc_enable(struct fsl_mc_io *mc_io,
8379 +                uint32_t cmd_flags,
8380 +               uint16_t token)
8381 +{
8382 +       struct mc_command cmd = { 0 };
8383 +
8384 +       /* prepare command */
8385 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
8386 +                                         token);
8387 +
8388 +       /* send command to mc*/
8389 +       return mc_send_command(mc_io, &cmd);
8390 +}
8391 +
8392 +int dprtc_disable(struct fsl_mc_io *mc_io,
8393 +                 uint32_t cmd_flags,
8394 +                uint16_t token)
8395 +{
8396 +       struct mc_command cmd = { 0 };
8397 +
8398 +       /* prepare command */
8399 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
8400 +                                         cmd_flags,
8401 +                                         token);
8402 +
8403 +       /* send command to mc*/
8404 +       return mc_send_command(mc_io, &cmd);
8405 +}
8406 +
8407 +int dprtc_is_enabled(struct fsl_mc_io *mc_io,
8408 +                    uint32_t cmd_flags,
8409 +                   uint16_t token,
8410 +                   int *en)
8411 +{
8412 +       struct mc_command cmd = { 0 };
8413 +       int err;
8414 +       /* prepare command */
8415 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
8416 +                                         token);
8417 +
8418 +       /* send command to mc*/
8419 +       err = mc_send_command(mc_io, &cmd);
8420 +       if (err)
8421 +               return err;
8422 +
8423 +       /* retrieve response parameters */
8424 +       DPRTC_RSP_IS_ENABLED(cmd, *en);
8425 +
8426 +       return 0;
8427 +}
8428 +
8429 +int dprtc_reset(struct fsl_mc_io *mc_io,
8430 +               uint32_t cmd_flags,
8431 +              uint16_t token)
8432 +{
8433 +       struct mc_command cmd = { 0 };
8434 +
8435 +       /* prepare command */
8436 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
8437 +                                         cmd_flags,
8438 +                                         token);
8439 +
8440 +       /* send command to mc*/
8441 +       return mc_send_command(mc_io, &cmd);
8442 +}
8443 +
8444 +int dprtc_set_irq(struct fsl_mc_io     *mc_io,
8445 +                 uint32_t              cmd_flags,
8446 +                uint16_t               token,
8447 +                uint8_t                irq_index,
8448 +                struct dprtc_irq_cfg   *irq_cfg)
8449 +{
8450 +       struct mc_command cmd = { 0 };
8451 +
8452 +       /* prepare command */
8453 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ,
8454 +                                         cmd_flags,
8455 +                                         token);
8456 +
8457 +       DPRTC_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
8458 +
8459 +       /* send command to mc*/
8460 +       return mc_send_command(mc_io, &cmd);
8461 +}
8462 +
8463 +int dprtc_get_irq(struct fsl_mc_io     *mc_io,
8464 +                 uint32_t              cmd_flags,
8465 +                uint16_t               token,
8466 +                uint8_t                irq_index,
8467 +                int                    *type,
8468 +                struct dprtc_irq_cfg   *irq_cfg)
8469 +{
8470 +       struct mc_command cmd = { 0 };
8471 +       int err;
8472 +
8473 +       /* prepare command */
8474 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ,
8475 +                                         cmd_flags,
8476 +                                         token);
8477 +
8478 +       DPRTC_CMD_GET_IRQ(cmd, irq_index);
8479 +
8480 +       /* send command to mc*/
8481 +       err = mc_send_command(mc_io, &cmd);
8482 +       if (err)
8483 +               return err;
8484 +
8485 +       /* retrieve response parameters */
8486 +       DPRTC_RSP_GET_IRQ(cmd, *type, irq_cfg);
8487 +
8488 +       return 0;
8489 +}
8490 +
8491 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
8492 +                        uint32_t cmd_flags,
8493 +                       uint16_t token,
8494 +                       uint8_t irq_index,
8495 +                       uint8_t en)
8496 +{
8497 +       struct mc_command cmd = { 0 };
8498 +
8499 +       /* prepare command */
8500 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
8501 +                                         cmd_flags,
8502 +                                         token);
8503 +
8504 +       DPRTC_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
8505 +
8506 +       /* send command to mc*/
8507 +       return mc_send_command(mc_io, &cmd);
8508 +}
8509 +
8510 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
8511 +                        uint32_t cmd_flags,
8512 +                       uint16_t token,
8513 +                       uint8_t irq_index,
8514 +                       uint8_t *en)
8515 +{
8516 +       struct mc_command cmd = { 0 };
8517 +       int err;
8518 +
8519 +       /* prepare command */
8520 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
8521 +                                         cmd_flags,
8522 +                                         token);
8523 +
8524 +       DPRTC_CMD_GET_IRQ_ENABLE(cmd, irq_index);
8525 +
8526 +       /* send command to mc*/
8527 +       err = mc_send_command(mc_io, &cmd);
8528 +       if (err)
8529 +               return err;
8530 +
8531 +       /* retrieve response parameters */
8532 +       DPRTC_RSP_GET_IRQ_ENABLE(cmd, *en);
8533 +
8534 +       return 0;
8535 +}
8536 +
8537 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
8538 +                      uint32_t cmd_flags,
8539 +                     uint16_t token,
8540 +                     uint8_t irq_index,
8541 +                     uint32_t mask)
8542 +{
8543 +       struct mc_command cmd = { 0 };
8544 +
8545 +       /* prepare command */
8546 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
8547 +                                         cmd_flags,
8548 +                                         token);
8549 +
8550 +       DPRTC_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
8551 +
8552 +       /* send command to mc*/
8553 +       return mc_send_command(mc_io, &cmd);
8554 +}
8555 +
8556 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
8557 +                      uint32_t cmd_flags,
8558 +                     uint16_t token,
8559 +                     uint8_t irq_index,
8560 +                     uint32_t *mask)
8561 +{
8562 +       struct mc_command cmd = { 0 };
8563 +       int err;
8564 +
8565 +       /* prepare command */
8566 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
8567 +                                         cmd_flags,
8568 +                                         token);
8569 +
8570 +       DPRTC_CMD_GET_IRQ_MASK(cmd, irq_index);
8571 +
8572 +       /* send command to mc*/
8573 +       err = mc_send_command(mc_io, &cmd);
8574 +       if (err)
8575 +               return err;
8576 +
8577 +       /* retrieve response parameters */
8578 +       DPRTC_RSP_GET_IRQ_MASK(cmd, *mask);
8579 +
8580 +       return 0;
8581 +}
8582 +
8583 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
8584 +                        uint32_t cmd_flags,
8585 +                       uint16_t token,
8586 +                       uint8_t irq_index,
8587 +                       uint32_t *status)
8588 +{
8589 +       struct mc_command cmd = { 0 };
8590 +       int err;
8591 +
8592 +       /* prepare command */
8593 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
8594 +                                         cmd_flags,
8595 +                                         token);
8596 +
8597 +       DPRTC_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
8598 +
8599 +       /* send command to mc*/
8600 +       err = mc_send_command(mc_io, &cmd);
8601 +       if (err)
8602 +               return err;
8603 +
8604 +       /* retrieve response parameters */
8605 +       DPRTC_RSP_GET_IRQ_STATUS(cmd, *status);
8606 +
8607 +       return 0;
8608 +}
8609 +
8610 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
8611 +                          uint32_t cmd_flags,
8612 +                         uint16_t token,
8613 +                         uint8_t irq_index,
8614 +                         uint32_t status)
8615 +{
8616 +       struct mc_command cmd = { 0 };
8617 +
8618 +       /* prepare command */
8619 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
8620 +                                         cmd_flags,
8621 +                                         token);
8622 +
8623 +       DPRTC_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
8624 +
8625 +       /* send command to mc*/
8626 +       return mc_send_command(mc_io, &cmd);
8627 +}
8628 +
8629 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
8630 +                        uint32_t cmd_flags,
8631 +                       uint16_t token,
8632 +                       struct dprtc_attr *attr)
8633 +{
8634 +       struct mc_command cmd = { 0 };
8635 +       int err;
8636 +
8637 +       /* prepare command */
8638 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
8639 +                                         cmd_flags,
8640 +                                         token);
8641 +
8642 +       /* send command to mc*/
8643 +       err = mc_send_command(mc_io, &cmd);
8644 +       if (err)
8645 +               return err;
8646 +
8647 +       /* retrieve response parameters */
8648 +       DPRTC_RSP_GET_ATTRIBUTES(cmd, attr);
8649 +
8650 +       return 0;
8651 +}
8652 +
8653 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
8654 +                          uint32_t cmd_flags,
8655 +                 uint16_t token,
8656 +                 int64_t offset)
8657 +{
8658 +       struct mc_command cmd = { 0 };
8659 +
8660 +       /* prepare command */
8661 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
8662 +                                         cmd_flags,
8663 +                                         token);
8664 +
8665 +       DPRTC_CMD_SET_CLOCK_OFFSET(cmd, offset);
8666 +
8667 +       /* send command to mc*/
8668 +       return mc_send_command(mc_io, &cmd);
8669 +}
8670 +
8671 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
8672 +                               uint32_t cmd_flags,
8673 +                 uint16_t token,
8674 +                 uint32_t freq_compensation)
8675 +{
8676 +       struct mc_command cmd = { 0 };
8677 +
8678 +       /* prepare command */
8679 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
8680 +                                         cmd_flags,
8681 +                                         token);
8682 +
8683 +       DPRTC_CMD_SET_FREQ_COMPENSATION(cmd, freq_compensation);
8684 +
8685 +       /* send command to mc*/
8686 +       return mc_send_command(mc_io, &cmd);
8687 +}
8688 +
8689 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
8690 +                               uint32_t cmd_flags,
8691 +                 uint16_t token,
8692 +                 uint32_t *freq_compensation)
8693 +{
8694 +       struct mc_command cmd = { 0 };
8695 +       int err;
8696 +
8697 +       /* prepare command */
8698 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
8699 +                                         cmd_flags,
8700 +                                         token);
8701 +
8702 +       /* send command to mc*/
8703 +       err = mc_send_command(mc_io, &cmd);
8704 +       if (err)
8705 +               return err;
8706 +
8707 +       /* retrieve response parameters */
8708 +       DPRTC_RSP_GET_FREQ_COMPENSATION(cmd, *freq_compensation);
8709 +
8710 +       return 0;
8711 +}
8712 +
8713 +int dprtc_get_time(struct fsl_mc_io *mc_io,
8714 +                  uint32_t cmd_flags,
8715 +                 uint16_t token,
8716 +                 uint64_t *time)
8717 +{
8718 +       struct mc_command cmd = { 0 };
8719 +       int err;
8720 +
8721 +       /* prepare command */
8722 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
8723 +                                         cmd_flags,
8724 +                                         token);
8725 +
8726 +       /* send command to mc*/
8727 +       err = mc_send_command(mc_io, &cmd);
8728 +       if (err)
8729 +               return err;
8730 +
8731 +       /* retrieve response parameters */
8732 +       DPRTC_RSP_GET_TIME(cmd, *time);
8733 +
8734 +       return 0;
8735 +}
8736 +
8737 +int dprtc_set_time(struct fsl_mc_io *mc_io,
8738 +                  uint32_t cmd_flags,
8739 +                 uint16_t token,
8740 +                 uint64_t time)
8741 +{
8742 +       struct mc_command cmd = { 0 };
8743 +
8744 +       /* prepare command */
8745 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
8746 +                                         cmd_flags,
8747 +                                         token);
8748 +
8749 +       DPRTC_CMD_SET_TIME(cmd, time);
8750 +
8751 +       /* send command to mc*/
8752 +       return mc_send_command(mc_io, &cmd);
8753 +}
8754 +
8755 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
8756 +                   uint32_t cmd_flags,
8757 +                 uint16_t token, uint64_t time)
8758 +{
8759 +       struct mc_command cmd = { 0 };
8760 +
8761 +       /* prepare command */
8762 +       cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
8763 +                                         cmd_flags,
8764 +                                         token);
8765 +
8766 +       DPRTC_CMD_SET_ALARM(cmd, time);
8767 +
8768 +       /* send command to mc*/
8769 +       return mc_send_command(mc_io, &cmd);
8770 +}
8771 diff --git a/drivers/net/dpaa2/mc/dpseci.c b/drivers/net/dpaa2/mc/dpseci.c
8772 new file mode 100644
8773 index 0000000..a4b932a
8774 --- /dev/null
8775 +++ b/drivers/net/dpaa2/mc/dpseci.c
8776 @@ -0,0 +1,502 @@
8777 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
8778 + *
8779 + * Redistribution and use in source and binary forms, with or without
8780 + * modification, are permitted provided that the following conditions are met:
8781 + * * Redistributions of source code must retain the above copyright
8782 + * notice, this list of conditions and the following disclaimer.
8783 + * * Redistributions in binary form must reproduce the above copyright
8784 + * notice, this list of conditions and the following disclaimer in the
8785 + * documentation and/or other materials provided with the distribution.
8786 + * * Neither the name of the above-listed copyright holders nor the
8787 + * names of any contributors may be used to endorse or promote products
8788 + * derived from this software without specific prior written permission.
8789 + *
8790 + *
8791 + * ALTERNATIVELY, this software may be distributed under the terms of the
8792 + * GNU General Public License ("GPL") as published by the Free Software
8793 + * Foundation, either version 2 of that License or (at your option) any
8794 + * later version.
8795 + *
8796 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
8797 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
8798 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
8799 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
8800 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
8801 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
8802 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
8803 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
8804 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
8805 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
8806 + * POSSIBILITY OF SUCH DAMAGE.
8807 + */
8808 +#include <fsl_mc_sys.h>
8809 +#include <fsl_mc_cmd.h>
8810 +#include <fsl_dpseci.h>
8811 +#include <fsl_dpseci_cmd.h>
8812 +
8813 +int dpseci_open(struct fsl_mc_io *mc_io,
8814 +               uint32_t cmd_flags,
8815 +               int dpseci_id,
8816 +               uint16_t *token)
8817 +{
8818 +       struct mc_command cmd = { 0 };
8819 +       int err;
8820 +
8821 +       /* prepare command */
8822 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_OPEN,
8823 +                                         cmd_flags,
8824 +                                         0);
8825 +       DPSECI_CMD_OPEN(cmd, dpseci_id);
8826 +
8827 +       /* send command to mc*/
8828 +       err = mc_send_command(mc_io, &cmd);
8829 +       if (err)
8830 +               return err;
8831 +
8832 +       /* retrieve response parameters */
8833 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
8834 +
8835 +       return 0;
8836 +}
8837 +
8838 +int dpseci_close(struct fsl_mc_io *mc_io,
8839 +                uint32_t cmd_flags,
8840 +                uint16_t token)
8841 +{
8842 +       struct mc_command cmd = { 0 };
8843 +
8844 +       /* prepare command */
8845 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CLOSE,
8846 +                                         cmd_flags,
8847 +                                         token);
8848 +
8849 +       /* send command to mc*/
8850 +       return mc_send_command(mc_io, &cmd);
8851 +}
8852 +
8853 +int dpseci_create(struct fsl_mc_io *mc_io,
8854 +                 uint32_t cmd_flags,
8855 +                 const struct dpseci_cfg *cfg,
8856 +                 uint16_t *token)
8857 +{
8858 +       struct mc_command cmd = { 0 };
8859 +       int err;
8860 +
8861 +       /* prepare command */
8862 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CREATE,
8863 +                                         cmd_flags,
8864 +                                         0);
8865 +       DPSECI_CMD_CREATE(cmd, cfg);
8866 +
8867 +       /* send command to mc*/
8868 +       err = mc_send_command(mc_io, &cmd);
8869 +       if (err)
8870 +               return err;
8871 +
8872 +       /* retrieve response parameters */
8873 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
8874 +
8875 +       return 0;
8876 +}
8877 +
8878 +int dpseci_destroy(struct fsl_mc_io *mc_io,
8879 +                  uint32_t cmd_flags,
8880 +                  uint16_t token)
8881 +{
8882 +       struct mc_command cmd = { 0 };
8883 +
8884 +       /* prepare command */
8885 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DESTROY,
8886 +                                         cmd_flags,
8887 +                                         token);
8888 +
8889 +       /* send command to mc*/
8890 +       return mc_send_command(mc_io, &cmd);
8891 +}
8892 +
8893 +int dpseci_enable(struct fsl_mc_io *mc_io,
8894 +                 uint32_t cmd_flags,
8895 +                 uint16_t token)
8896 +{
8897 +       struct mc_command cmd = { 0 };
8898 +
8899 +       /* prepare command */
8900 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_ENABLE,
8901 +                                         cmd_flags,
8902 +                                         token);
8903 +
8904 +       /* send command to mc*/
8905 +       return mc_send_command(mc_io, &cmd);
8906 +}
8907 +
8908 +int dpseci_disable(struct fsl_mc_io *mc_io,
8909 +                  uint32_t cmd_flags,
8910 +                  uint16_t token)
8911 +{
8912 +       struct mc_command cmd = { 0 };
8913 +
8914 +       /* prepare command */
8915 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DISABLE,
8916 +                                         cmd_flags,
8917 +                                         token);
8918 +
8919 +       /* send command to mc*/
8920 +       return mc_send_command(mc_io, &cmd);
8921 +}
8922 +
8923 +int dpseci_is_enabled(struct fsl_mc_io *mc_io,
8924 +                     uint32_t cmd_flags,
8925 +                     uint16_t token,
8926 +                     int *en)
8927 +{
8928 +       struct mc_command cmd = { 0 };
8929 +       int err;
8930 +       /* prepare command */
8931 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_IS_ENABLED,
8932 +                                         cmd_flags,
8933 +                                         token);
8934 +
8935 +       /* send command to mc*/
8936 +       err = mc_send_command(mc_io, &cmd);
8937 +       if (err)
8938 +               return err;
8939 +
8940 +       /* retrieve response parameters */
8941 +       DPSECI_RSP_IS_ENABLED(cmd, *en);
8942 +
8943 +       return 0;
8944 +}
8945 +
8946 +int dpseci_reset(struct fsl_mc_io *mc_io,
8947 +                uint32_t cmd_flags,
8948 +                uint16_t token)
8949 +{
8950 +       struct mc_command cmd = { 0 };
8951 +
8952 +       /* prepare command */
8953 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_RESET,
8954 +                                         cmd_flags,
8955 +                                         token);
8956 +
8957 +       /* send command to mc*/
8958 +       return mc_send_command(mc_io, &cmd);
8959 +}
8960 +
8961 +int dpseci_get_irq(struct fsl_mc_io *mc_io,
8962 +                  uint32_t cmd_flags,
8963 +                  uint16_t token,
8964 +                  uint8_t irq_index,
8965 +                  int *type,
8966 +                  struct dpseci_irq_cfg *irq_cfg)
8967 +{
8968 +       struct mc_command cmd = { 0 };
8969 +       int err;
8970 +
8971 +       /* prepare command */
8972 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ,
8973 +                                         cmd_flags,
8974 +                                         token);
8975 +       DPSECI_CMD_GET_IRQ(cmd, irq_index);
8976 +
8977 +       /* send command to mc*/
8978 +       err = mc_send_command(mc_io, &cmd);
8979 +       if (err)
8980 +               return err;
8981 +
8982 +       /* retrieve response parameters */
8983 +       DPSECI_RSP_GET_IRQ(cmd, *type, irq_cfg);
8984 +
8985 +       return 0;
8986 +}
8987 +
8988 +int dpseci_set_irq(struct fsl_mc_io *mc_io,
8989 +                  uint32_t cmd_flags,
8990 +                  uint16_t token,
8991 +                  uint8_t irq_index,
8992 +                  struct dpseci_irq_cfg *irq_cfg)
8993 +{
8994 +       struct mc_command cmd = { 0 };
8995 +
8996 +       /* prepare command */
8997 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ,
8998 +                                         cmd_flags,
8999 +                                         token);
9000 +       DPSECI_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
9001 +
9002 +       /* send command to mc*/
9003 +       return mc_send_command(mc_io, &cmd);
9004 +}
9005 +
9006 +int dpseci_get_irq_enable(struct fsl_mc_io *mc_io,
9007 +                         uint32_t cmd_flags,
9008 +                         uint16_t token,
9009 +                         uint8_t irq_index,
9010 +                         uint8_t *en)
9011 +{
9012 +       struct mc_command cmd = { 0 };
9013 +       int err;
9014 +
9015 +       /* prepare command */
9016 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_ENABLE,
9017 +                                         cmd_flags,
9018 +                                         token);
9019 +       DPSECI_CMD_GET_IRQ_ENABLE(cmd, irq_index);
9020 +
9021 +       /* send command to mc*/
9022 +       err = mc_send_command(mc_io, &cmd);
9023 +       if (err)
9024 +               return err;
9025 +
9026 +       /* retrieve response parameters */
9027 +       DPSECI_RSP_GET_IRQ_ENABLE(cmd, *en);
9028 +
9029 +       return 0;
9030 +}
9031 +
9032 +int dpseci_set_irq_enable(struct fsl_mc_io *mc_io,
9033 +                         uint32_t cmd_flags,
9034 +                         uint16_t token,
9035 +                         uint8_t irq_index,
9036 +                         uint8_t en)
9037 +{
9038 +       struct mc_command cmd = { 0 };
9039 +
9040 +       /* prepare command */
9041 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_ENABLE,
9042 +                                         cmd_flags,
9043 +                                         token);
9044 +       DPSECI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
9045 +
9046 +       /* send command to mc*/
9047 +       return mc_send_command(mc_io, &cmd);
9048 +}
9049 +
9050 +int dpseci_get_irq_mask(struct fsl_mc_io *mc_io,
9051 +                       uint32_t cmd_flags,
9052 +                       uint16_t token,
9053 +                       uint8_t irq_index,
9054 +                       uint32_t *mask)
9055 +{
9056 +       struct mc_command cmd = { 0 };
9057 +       int err;
9058 +
9059 +       /* prepare command */
9060 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_MASK,
9061 +                                         cmd_flags,
9062 +                                         token);
9063 +       DPSECI_CMD_GET_IRQ_MASK(cmd, irq_index);
9064 +
9065 +       /* send command to mc*/
9066 +       err = mc_send_command(mc_io, &cmd);
9067 +       if (err)
9068 +               return err;
9069 +
9070 +       /* retrieve response parameters */
9071 +       DPSECI_RSP_GET_IRQ_MASK(cmd, *mask);
9072 +
9073 +       return 0;
9074 +}
9075 +
9076 +int dpseci_set_irq_mask(struct fsl_mc_io *mc_io,
9077 +                       uint32_t cmd_flags,
9078 +                       uint16_t token,
9079 +                       uint8_t irq_index,
9080 +                       uint32_t mask)
9081 +{
9082 +       struct mc_command cmd = { 0 };
9083 +
9084 +       /* prepare command */
9085 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_MASK,
9086 +                                         cmd_flags,
9087 +                                         token);
9088 +       DPSECI_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
9089 +
9090 +       /* send command to mc*/
9091 +       return mc_send_command(mc_io, &cmd);
9092 +}
9093 +
9094 +int dpseci_get_irq_status(struct fsl_mc_io *mc_io,
9095 +                         uint32_t cmd_flags,
9096 +                         uint16_t token,
9097 +                         uint8_t irq_index,
9098 +                         uint32_t *status)
9099 +{
9100 +       struct mc_command cmd = { 0 };
9101 +       int err;
9102 +
9103 +       /* prepare command */
9104 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_STATUS,
9105 +                                         cmd_flags,
9106 +                                         token);
9107 +       DPSECI_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
9108 +
9109 +       /* send command to mc*/
9110 +       err = mc_send_command(mc_io, &cmd);
9111 +       if (err)
9112 +               return err;
9113 +
9114 +       /* retrieve response parameters */
9115 +       DPSECI_RSP_GET_IRQ_STATUS(cmd, *status);
9116 +
9117 +       return 0;
9118 +}
9119 +
9120 +int dpseci_clear_irq_status(struct fsl_mc_io *mc_io,
9121 +                           uint32_t cmd_flags,
9122 +                           uint16_t token,
9123 +                           uint8_t irq_index,
9124 +                           uint32_t status)
9125 +{
9126 +       struct mc_command cmd = { 0 };
9127 +
9128 +       /* prepare command */
9129 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CLEAR_IRQ_STATUS,
9130 +                                         cmd_flags,
9131 +                                         token);
9132 +       DPSECI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
9133 +
9134 +       /* send command to mc*/
9135 +       return mc_send_command(mc_io, &cmd);
9136 +}
9137 +
9138 +int dpseci_get_attributes(struct fsl_mc_io *mc_io,
9139 +                         uint32_t cmd_flags,
9140 +                         uint16_t token,
9141 +                         struct dpseci_attr *attr)
9142 +{
9143 +       struct mc_command cmd = { 0 };
9144 +       int err;
9145 +
9146 +       /* prepare command */
9147 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_ATTR,
9148 +                                         cmd_flags,
9149 +                                         token);
9150 +
9151 +       /* send command to mc*/
9152 +       err = mc_send_command(mc_io, &cmd);
9153 +       if (err)
9154 +               return err;
9155 +
9156 +       /* retrieve response parameters */
9157 +       DPSECI_RSP_GET_ATTR(cmd, attr);
9158 +
9159 +       return 0;
9160 +}
9161 +
9162 +int dpseci_set_rx_queue(struct fsl_mc_io *mc_io,
9163 +                       uint32_t cmd_flags,
9164 +                       uint16_t token,
9165 +                       uint8_t queue,
9166 +                       const struct dpseci_rx_queue_cfg *cfg)
9167 +{
9168 +       struct mc_command cmd = { 0 };
9169 +
9170 +       /* prepare command */
9171 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_RX_QUEUE,
9172 +                                         cmd_flags,
9173 +                                         token);
9174 +       DPSECI_CMD_SET_RX_QUEUE(cmd, queue, cfg);
9175 +
9176 +       /* send command to mc*/
9177 +       return mc_send_command(mc_io, &cmd);
9178 +}
9179 +
9180 +int dpseci_get_rx_queue(struct fsl_mc_io *mc_io,
9181 +                       uint32_t cmd_flags,
9182 +                       uint16_t token,
9183 +                       uint8_t queue,
9184 +                       struct dpseci_rx_queue_attr *attr)
9185 +{
9186 +       struct mc_command cmd = { 0 };
9187 +       int err;
9188 +
9189 +       /* prepare command */
9190 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_RX_QUEUE,
9191 +                                         cmd_flags,
9192 +                                         token);
9193 +       DPSECI_CMD_GET_RX_QUEUE(cmd, queue);
9194 +
9195 +       /* send command to mc*/
9196 +       err = mc_send_command(mc_io, &cmd);
9197 +       if (err)
9198 +               return err;
9199 +
9200 +       /* retrieve response parameters */
9201 +       DPSECI_RSP_GET_RX_QUEUE(cmd, attr);
9202 +
9203 +       return 0;
9204 +}
9205 +
9206 +int dpseci_get_tx_queue(struct fsl_mc_io *mc_io,
9207 +                       uint32_t cmd_flags,
9208 +                       uint16_t token,
9209 +                       uint8_t queue,
9210 +                       struct dpseci_tx_queue_attr *attr)
9211 +{
9212 +       struct mc_command cmd = { 0 };
9213 +       int err;
9214 +
9215 +       /* prepare command */
9216 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_TX_QUEUE,
9217 +                                         cmd_flags,
9218 +                                         token);
9219 +       DPSECI_CMD_GET_TX_QUEUE(cmd, queue);
9220 +
9221 +       /* send command to mc*/
9222 +       err = mc_send_command(mc_io, &cmd);
9223 +       if (err)
9224 +               return err;
9225 +
9226 +       /* retrieve response parameters */
9227 +       DPSECI_RSP_GET_TX_QUEUE(cmd, attr);
9228 +
9229 +       return 0;
9230 +}
9231 +
9232 +int dpseci_get_sec_attr(struct fsl_mc_io               *mc_io,
9233 +                       uint32_t                        cmd_flags,
9234 +                       uint16_t                        token,
9235 +                       struct dpseci_sec_attr *attr)
9236 +{
9237 +       struct mc_command cmd = { 0 };
9238 +       int err;
9239 +
9240 +       /* prepare command */
9241 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_ATTR,
9242 +                                         cmd_flags,
9243 +                                         token);
9244 +
9245 +       /* send command to mc*/
9246 +       err = mc_send_command(mc_io, &cmd);
9247 +       if (err)
9248 +               return err;
9249 +
9250 +       /* retrieve response parameters */
9251 +       DPSECI_RSP_GET_SEC_ATTR(cmd, attr);
9252 +
9253 +       return 0;
9254 +}
9255 +
9256 +int dpseci_get_sec_counters(struct fsl_mc_io           *mc_io,
9257 +                           uint32_t                    cmd_flags,
9258 +               uint16_t                        token,
9259 +               struct dpseci_sec_counters *counters)
9260 +{
9261 +       struct mc_command cmd = { 0 };
9262 +       int err;
9263 +
9264 +       /* prepare command */
9265 +       cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_COUNTERS,
9266 +                                         cmd_flags,
9267 +                                         token);
9268 +
9269 +       /* send command to mc*/
9270 +       err = mc_send_command(mc_io, &cmd);
9271 +       if (err)
9272 +               return err;
9273 +
9274 +       /* retrieve response parameters */
9275 +       DPSECI_RSP_GET_SEC_COUNTERS(cmd, counters);
9276 +
9277 +       return 0;
9278 +}
9279 diff --git a/drivers/net/dpaa2/mc/dpsw.c b/drivers/net/dpaa2/mc/dpsw.c
9280 new file mode 100644
9281 index 0000000..2034b55
9282 --- /dev/null
9283 +++ b/drivers/net/dpaa2/mc/dpsw.c
9284 @@ -0,0 +1,1639 @@
9285 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
9286 + *
9287 + * Redistribution and use in source and binary forms, with or without
9288 + * modification, are permitted provided that the following conditions are met:
9289 + * * Redistributions of source code must retain the above copyright
9290 + * notice, this list of conditions and the following disclaimer.
9291 + * * Redistributions in binary form must reproduce the above copyright
9292 + * notice, this list of conditions and the following disclaimer in the
9293 + * documentation and/or other materials provided with the distribution.
9294 + * * Neither the name of the above-listed copyright holders nor the
9295 + * names of any contributors may be used to endorse or promote products
9296 + * derived from this software without specific prior written permission.
9297 + *
9298 + *
9299 + * ALTERNATIVELY, this software may be distributed under the terms of the
9300 + * GNU General Public License ("GPL") as published by the Free Software
9301 + * Foundation, either version 2 of that License or (at your option) any
9302 + * later version.
9303 + *
9304 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
9305 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
9306 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
9307 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
9308 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
9309 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
9310 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
9311 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
9312 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
9313 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
9314 + * POSSIBILITY OF SUCH DAMAGE.
9315 + */
9316 +#include <fsl_mc_sys.h>
9317 +#include <fsl_mc_cmd.h>
9318 +#include <fsl_dpsw.h>
9319 +#include <fsl_dpsw_cmd.h>
9320 +
9321 +/* internal functions */
9322 +static void build_if_id_bitmap(const uint16_t *if_id,
9323 +                              const uint16_t num_ifs,
9324 +                              struct mc_command *cmd,
9325 +                              int start_param)
9326 +{
9327 +       int i;
9328 +
9329 +       for (i = 0; (i < num_ifs) && (i < DPSW_MAX_IF); i++)
9330 +               cmd->params[start_param + (if_id[i] / 64)] |= mc_enc(
9331 +                       (if_id[i] % 64), 1, 1);
9332 +}
9333 +
9334 +static int read_if_id_bitmap(uint16_t *if_id,
9335 +                            uint16_t *num_ifs,
9336 +                            struct mc_command *cmd,
9337 +                            int start_param)
9338 +{
9339 +       int bitmap[DPSW_MAX_IF] = { 0 };
9340 +       int i, j = 0;
9341 +       int count = 0;
9342 +
9343 +       for (i = 0; i < DPSW_MAX_IF; i++) {
9344 +               bitmap[i] = (int)mc_dec(cmd->params[start_param + i / 64],
9345 +                                        i % 64, 1);
9346 +               count += bitmap[i];
9347 +       }
9348 +
9349 +       *num_ifs = (uint16_t)count;
9350 +
9351 +       for (i = 0; (i < DPSW_MAX_IF) && (j < count); i++) {
9352 +               if (bitmap[i]) {
9353 +                       if_id[j] = (uint16_t)i;
9354 +                       j++;
9355 +               }
9356 +       }
9357 +
9358 +       return 0;
9359 +}
9360 +
9361 +/* DPSW APIs */
9362 +int dpsw_open(struct fsl_mc_io *mc_io,
9363 +             uint32_t cmd_flags,
9364 +             int dpsw_id,
9365 +             uint16_t *token)
9366 +{
9367 +       struct mc_command cmd = { 0 };
9368 +       int err;
9369 +
9370 +       /* prepare command */
9371 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_OPEN,
9372 +                                         cmd_flags,
9373 +                                         0);
9374 +       DPSW_CMD_OPEN(cmd, dpsw_id);
9375 +
9376 +       /* send command to mc*/
9377 +       err = mc_send_command(mc_io, &cmd);
9378 +       if (err)
9379 +               return err;
9380 +
9381 +       /* retrieve response parameters */
9382 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
9383 +
9384 +       return 0;
9385 +}
9386 +
9387 +int dpsw_close(struct fsl_mc_io *mc_io,
9388 +              uint32_t cmd_flags,
9389 +       uint16_t token)
9390 +{
9391 +       struct mc_command cmd = { 0 };
9392 +
9393 +       /* prepare command */
9394 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CLOSE,
9395 +                                         cmd_flags,
9396 +                                         token);
9397 +
9398 +       /* send command to mc*/
9399 +       return mc_send_command(mc_io, &cmd);
9400 +}
9401 +
9402 +int dpsw_create(struct fsl_mc_io *mc_io,
9403 +               uint32_t cmd_flags,
9404 +               const struct dpsw_cfg *cfg,
9405 +               uint16_t *token)
9406 +{
9407 +       struct mc_command cmd = { 0 };
9408 +       int err;
9409 +
9410 +       /* prepare command */
9411 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CREATE,
9412 +                                         cmd_flags,
9413 +                                         0);
9414 +       DPSW_CMD_CREATE(cmd, cfg);
9415 +
9416 +       /* send command to mc*/
9417 +       err = mc_send_command(mc_io, &cmd);
9418 +       if (err)
9419 +               return err;
9420 +
9421 +       /* retrieve response parameters */
9422 +       *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
9423 +
9424 +       return 0;
9425 +}
9426 +
9427 +int dpsw_destroy(struct fsl_mc_io *mc_io,
9428 +                uint32_t cmd_flags,
9429 +                uint16_t token)
9430 +{
9431 +       struct mc_command cmd = { 0 };
9432 +
9433 +       /* prepare command */
9434 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_DESTROY,
9435 +                                         cmd_flags,
9436 +                                         token);
9437 +
9438 +       /* send command to mc*/
9439 +       return mc_send_command(mc_io, &cmd);
9440 +}
9441 +
9442 +int dpsw_enable(struct fsl_mc_io *mc_io,
9443 +               uint32_t cmd_flags,
9444 +               uint16_t token)
9445 +{
9446 +       struct mc_command cmd = { 0 };
9447 +
9448 +       /* prepare command */
9449 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ENABLE,
9450 +                                         cmd_flags,
9451 +                                         token);
9452 +
9453 +       /* send command to mc*/
9454 +       return mc_send_command(mc_io, &cmd);
9455 +}
9456 +
9457 +int dpsw_disable(struct fsl_mc_io *mc_io,
9458 +                uint32_t cmd_flags,
9459 +                uint16_t token)
9460 +{
9461 +       struct mc_command cmd = { 0 };
9462 +
9463 +       /* prepare command */
9464 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_DISABLE,
9465 +                                         cmd_flags,
9466 +                                         token);
9467 +
9468 +       /* send command to mc*/
9469 +       return mc_send_command(mc_io, &cmd);
9470 +}
9471 +
9472 +int dpsw_is_enabled(struct fsl_mc_io *mc_io,
9473 +                   uint32_t cmd_flags,
9474 +                   uint16_t token,
9475 +                   int *en)
9476 +{
9477 +       struct mc_command cmd = { 0 };
9478 +       int err;
9479 +
9480 +       /* prepare command */
9481 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IS_ENABLED, cmd_flags,
9482 +                                         token);
9483 +
9484 +       /* send command to mc*/
9485 +       err = mc_send_command(mc_io, &cmd);
9486 +       if (err)
9487 +               return err;
9488 +
9489 +       /* retrieve response parameters */
9490 +       DPSW_RSP_IS_ENABLED(cmd, *en);
9491 +
9492 +       return 0;
9493 +}
9494 +
9495 +int dpsw_reset(struct fsl_mc_io *mc_io,
9496 +              uint32_t cmd_flags,
9497 +              uint16_t token)
9498 +{
9499 +       struct mc_command cmd = { 0 };
9500 +
9501 +       /* prepare command */
9502 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_RESET,
9503 +                                         cmd_flags,
9504 +                                         token);
9505 +
9506 +       /* send command to mc*/
9507 +       return mc_send_command(mc_io, &cmd);
9508 +}
9509 +
9510 +int dpsw_set_irq(struct fsl_mc_io *mc_io,
9511 +                uint32_t cmd_flags,
9512 +                uint16_t token,
9513 +                uint8_t irq_index,
9514 +                struct dpsw_irq_cfg *irq_cfg)
9515 +{
9516 +       struct mc_command cmd = { 0 };
9517 +
9518 +       /* prepare command */
9519 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IRQ,
9520 +                                         cmd_flags,
9521 +                                         token);
9522 +       DPSW_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
9523 +
9524 +       /* send command to mc*/
9525 +       return mc_send_command(mc_io, &cmd);
9526 +}
9527 +
9528 +int dpsw_get_irq(struct fsl_mc_io *mc_io,
9529 +                uint32_t cmd_flags,
9530 +                uint16_t token,
9531 +                uint8_t irq_index,
9532 +                int *type,
9533 +                struct dpsw_irq_cfg *irq_cfg)
9534 +{
9535 +       struct mc_command cmd = { 0 };
9536 +       int err;
9537 +
9538 +       /* prepare command */
9539 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_IRQ,
9540 +                                         cmd_flags,
9541 +                                         token);
9542 +       DPSW_CMD_GET_IRQ(cmd, irq_index);
9543 +
9544 +       /* send command to mc*/
9545 +       err = mc_send_command(mc_io, &cmd);
9546 +       if (err)
9547 +               return err;
9548 +
9549 +       /* retrieve response parameters */
9550 +       DPSW_RSP_GET_IRQ(cmd, *type, irq_cfg);
9551 +
9552 +       return 0;
9553 +}
9554 +
9555 +int dpsw_set_irq_enable(struct fsl_mc_io *mc_io,
9556 +                       uint32_t cmd_flags,
9557 +                       uint16_t token,
9558 +                       uint8_t irq_index,
9559 +                       uint8_t en)
9560 +{
9561 +       struct mc_command cmd = { 0 };
9562 +
9563 +       /* prepare command */
9564 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IRQ_ENABLE,
9565 +                                         cmd_flags,
9566 +                                         token);
9567 +       DPSW_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
9568 +
9569 +       /* send command to mc*/
9570 +       return mc_send_command(mc_io, &cmd);
9571 +}
9572 +
9573 +int dpsw_get_irq_enable(struct fsl_mc_io *mc_io,
9574 +                       uint32_t cmd_flags,
9575 +                       uint16_t token,
9576 +                       uint8_t irq_index,
9577 +                       uint8_t *en)
9578 +{
9579 +       struct mc_command cmd = { 0 };
9580 +       int err;
9581 +
9582 +       /* prepare command */
9583 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_IRQ_ENABLE,
9584 +                                         cmd_flags,
9585 +                                         token);
9586 +       DPSW_CMD_GET_IRQ_ENABLE(cmd, irq_index);
9587 +
9588 +       /* send command to mc*/
9589 +       err = mc_send_command(mc_io, &cmd);
9590 +       if (err)
9591 +               return err;
9592 +
9593 +       /* retrieve response parameters */
9594 +       DPSW_RSP_GET_IRQ_ENABLE(cmd, *en);
9595 +
9596 +       return 0;
9597 +}
9598 +
9599 +int dpsw_set_irq_mask(struct fsl_mc_io *mc_io,
9600 +                     uint32_t cmd_flags,
9601 +                     uint16_t token,
9602 +                     uint8_t irq_index,
9603 +                     uint32_t mask)
9604 +{
9605 +       struct mc_command cmd = { 0 };
9606 +
9607 +       /* prepare command */
9608 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IRQ_MASK,
9609 +                                         cmd_flags,
9610 +                                         token);
9611 +       DPSW_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
9612 +
9613 +       /* send command to mc*/
9614 +       return mc_send_command(mc_io, &cmd);
9615 +}
9616 +
9617 +int dpsw_get_irq_mask(struct fsl_mc_io *mc_io,
9618 +                     uint32_t cmd_flags,
9619 +                     uint16_t token,
9620 +                     uint8_t irq_index,
9621 +                     uint32_t *mask)
9622 +{
9623 +       struct mc_command cmd = { 0 };
9624 +       int err;
9625 +
9626 +       /* prepare command */
9627 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_IRQ_MASK,
9628 +                                         cmd_flags,
9629 +                                         token);
9630 +       DPSW_CMD_GET_IRQ_MASK(cmd, irq_index);
9631 +
9632 +       /* send command to mc*/
9633 +       err = mc_send_command(mc_io, &cmd);
9634 +       if (err)
9635 +               return err;
9636 +
9637 +       /* retrieve response parameters */
9638 +       DPSW_RSP_GET_IRQ_MASK(cmd, *mask);
9639 +
9640 +       return 0;
9641 +}
9642 +
9643 +int dpsw_get_irq_status(struct fsl_mc_io *mc_io,
9644 +                       uint32_t cmd_flags,
9645 +                       uint16_t token,
9646 +                       uint8_t irq_index,
9647 +                       uint32_t *status)
9648 +{
9649 +       struct mc_command cmd = { 0 };
9650 +       int err;
9651 +
9652 +       /* prepare command */
9653 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_IRQ_STATUS,
9654 +                                         cmd_flags,
9655 +                                         token);
9656 +       DPSW_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
9657 +
9658 +       /* send command to mc*/
9659 +       err = mc_send_command(mc_io, &cmd);
9660 +       if (err)
9661 +               return err;
9662 +
9663 +       /* retrieve response parameters */
9664 +       DPSW_RSP_GET_IRQ_STATUS(cmd, *status);
9665 +
9666 +       return 0;
9667 +}
9668 +
9669 +int dpsw_clear_irq_status(struct fsl_mc_io *mc_io,
9670 +                         uint32_t cmd_flags,
9671 +                         uint16_t token,
9672 +                         uint8_t irq_index,
9673 +                         uint32_t status)
9674 +{
9675 +       struct mc_command cmd = { 0 };
9676 +
9677 +       /* prepare command */
9678 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CLEAR_IRQ_STATUS,
9679 +                                         cmd_flags,
9680 +                                         token);
9681 +       DPSW_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
9682 +
9683 +       /* send command to mc*/
9684 +       return mc_send_command(mc_io, &cmd);
9685 +}
9686 +
9687 +int dpsw_get_attributes(struct fsl_mc_io *mc_io,
9688 +                       uint32_t cmd_flags,
9689 +                       uint16_t token,
9690 +                       struct dpsw_attr *attr)
9691 +{
9692 +       struct mc_command cmd = { 0 };
9693 +       int err;
9694 +
9695 +       /* prepare command */
9696 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_ATTR,
9697 +                                         cmd_flags,
9698 +                                         token);
9699 +
9700 +       /* send command to mc*/
9701 +       err = mc_send_command(mc_io, &cmd);
9702 +       if (err)
9703 +               return err;
9704 +
9705 +       /* retrieve response parameters */
9706 +       DPSW_RSP_GET_ATTR(cmd, attr);
9707 +
9708 +       return 0;
9709 +}
9710 +
9711 +int dpsw_set_reflection_if(struct fsl_mc_io *mc_io,
9712 +                          uint32_t cmd_flags,
9713 +                          uint16_t token,
9714 +                          uint16_t if_id)
9715 +{
9716 +       struct mc_command cmd = { 0 };
9717 +
9718 +       /* prepare command */
9719 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_REFLECTION_IF,
9720 +                                         cmd_flags,
9721 +                                         token);
9722 +       DPSW_CMD_SET_REFLECTION_IF(cmd, if_id);
9723 +
9724 +       /* send command to mc*/
9725 +       return mc_send_command(mc_io, &cmd);
9726 +}
9727 +
9728 +int dpsw_if_set_link_cfg(struct fsl_mc_io *mc_io,
9729 +                        uint32_t cmd_flags,
9730 +                        uint16_t token,
9731 +                        uint16_t if_id,
9732 +                        struct dpsw_link_cfg *cfg)
9733 +{
9734 +       struct mc_command cmd = { 0 };
9735 +
9736 +       /* prepare command */
9737 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_LINK_CFG,
9738 +                                         cmd_flags,
9739 +                                         token);
9740 +       DPSW_CMD_IF_SET_LINK_CFG(cmd, if_id, cfg);
9741 +
9742 +       /* send command to mc*/
9743 +       return mc_send_command(mc_io, &cmd);
9744 +}
9745 +
9746 +int dpsw_if_get_link_state(struct fsl_mc_io *mc_io,
9747 +                          uint32_t cmd_flags,
9748 +                          uint16_t token,
9749 +                          uint16_t if_id,
9750 +                          struct dpsw_link_state *state)
9751 +{
9752 +       struct mc_command cmd = { 0 };
9753 +       int err;
9754 +
9755 +       /* prepare command */
9756 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_LINK_STATE,
9757 +                                         cmd_flags,
9758 +                                         token);
9759 +       DPSW_CMD_IF_GET_LINK_STATE(cmd, if_id);
9760 +
9761 +       /* send command to mc*/
9762 +       err = mc_send_command(mc_io, &cmd);
9763 +       if (err)
9764 +               return err;
9765 +
9766 +       /* retrieve response parameters */
9767 +       DPSW_RSP_IF_GET_LINK_STATE(cmd, state);
9768 +
9769 +       return 0;
9770 +}
9771 +
9772 +int dpsw_if_set_flooding(struct fsl_mc_io *mc_io,
9773 +                        uint32_t cmd_flags,
9774 +                        uint16_t token,
9775 +                        uint16_t if_id,
9776 +                        int en)
9777 +{
9778 +       struct mc_command cmd = { 0 };
9779 +
9780 +       /* prepare command */
9781 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_FLOODING,
9782 +                                         cmd_flags,
9783 +                                         token);
9784 +       DPSW_CMD_IF_SET_FLOODING(cmd, if_id, en);
9785 +
9786 +       /* send command to mc*/
9787 +       return mc_send_command(mc_io, &cmd);
9788 +}
9789 +
9790 +int dpsw_if_set_broadcast(struct fsl_mc_io *mc_io,
9791 +                         uint32_t cmd_flags,
9792 +                         uint16_t token,
9793 +                         uint16_t if_id,
9794 +                         int en)
9795 +{
9796 +       struct mc_command cmd = { 0 };
9797 +
9798 +       /* prepare command */
9799 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_BROADCAST,
9800 +                                         cmd_flags,
9801 +                                         token);
9802 +       DPSW_CMD_IF_SET_FLOODING(cmd, if_id, en);
9803 +
9804 +       /* send command to mc*/
9805 +       return mc_send_command(mc_io, &cmd);
9806 +}
9807 +
9808 +int dpsw_if_set_multicast(struct fsl_mc_io *mc_io,
9809 +                         uint32_t cmd_flags,
9810 +                         uint16_t token,
9811 +                         uint16_t if_id,
9812 +                         int en)
9813 +{
9814 +       struct mc_command cmd = { 0 };
9815 +
9816 +       /* prepare command */
9817 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_MULTICAST,
9818 +                                         cmd_flags,
9819 +                                         token);
9820 +       DPSW_CMD_IF_SET_FLOODING(cmd, if_id, en);
9821 +
9822 +       /* send command to mc*/
9823 +       return mc_send_command(mc_io, &cmd);
9824 +}
9825 +
9826 +int dpsw_if_set_tci(struct fsl_mc_io *mc_io,
9827 +                   uint32_t cmd_flags,
9828 +                   uint16_t token,
9829 +                   uint16_t if_id,
9830 +                   const struct dpsw_tci_cfg *cfg)
9831 +{
9832 +       struct mc_command cmd = { 0 };
9833 +
9834 +       /* prepare command */
9835 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_TCI,
9836 +                                         cmd_flags,
9837 +                                         token);
9838 +       DPSW_CMD_IF_SET_TCI(cmd, if_id, cfg);
9839 +
9840 +       /* send command to mc*/
9841 +       return mc_send_command(mc_io, &cmd);
9842 +}
9843 +
9844 +int dpsw_if_get_tci(struct fsl_mc_io *mc_io,
9845 +                   uint32_t cmd_flags,
9846 +                   uint16_t token,
9847 +                   uint16_t if_id,
9848 +                   struct dpsw_tci_cfg *cfg)
9849 +{
9850 +       struct mc_command cmd = { 0 };
9851 +       int err = 0;
9852 +
9853 +       /* prepare command */
9854 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_TCI,
9855 +                                         cmd_flags,
9856 +                                         token);
9857 +       DPSW_CMD_IF_GET_TCI(cmd, if_id);
9858 +
9859 +       /* send command to mc*/
9860 +       err = mc_send_command(mc_io, &cmd);
9861 +       if (err)
9862 +               return err;
9863 +
9864 +       /* retrieve response parameters */
9865 +       DPSW_RSP_IF_GET_TCI(cmd, cfg);
9866 +
9867 +       return 0;
9868 +}
9869 +
9870 +int dpsw_if_set_stp(struct fsl_mc_io *mc_io,
9871 +                   uint32_t cmd_flags,
9872 +                   uint16_t token,
9873 +                   uint16_t if_id,
9874 +                   const struct dpsw_stp_cfg *cfg)
9875 +{
9876 +       struct mc_command cmd = { 0 };
9877 +
9878 +       /* prepare command */
9879 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_STP,
9880 +                                         cmd_flags,
9881 +                                         token);
9882 +       DPSW_CMD_IF_SET_STP(cmd, if_id, cfg);
9883 +
9884 +       /* send command to mc*/
9885 +       return mc_send_command(mc_io, &cmd);
9886 +}
9887 +
9888 +int dpsw_if_set_accepted_frames(struct fsl_mc_io *mc_io,
9889 +                               uint32_t cmd_flags,
9890 +                               uint16_t token,
9891 +                               uint16_t if_id,
9892 +                               const struct dpsw_accepted_frames_cfg *cfg)
9893 +{
9894 +       struct mc_command cmd = { 0 };
9895 +
9896 +       /* prepare command */
9897 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_ACCEPTED_FRAMES,
9898 +                                         cmd_flags,
9899 +                                         token);
9900 +       DPSW_CMD_IF_SET_ACCEPTED_FRAMES(cmd, if_id, cfg);
9901 +
9902 +       /* send command to mc*/
9903 +       return mc_send_command(mc_io, &cmd);
9904 +}
9905 +
9906 +int dpsw_if_set_accept_all_vlan(struct fsl_mc_io *mc_io,
9907 +                               uint32_t cmd_flags,
9908 +                               uint16_t token,
9909 +                               uint16_t if_id,
9910 +                               int accept_all)
9911 +{
9912 +       struct mc_command cmd = { 0 };
9913 +
9914 +       /* prepare command */
9915 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IF_ACCEPT_ALL_VLAN,
9916 +                                         cmd_flags,
9917 +                                         token);
9918 +       DPSW_CMD_IF_SET_ACCEPT_ALL_VLAN(cmd, if_id, accept_all);
9919 +
9920 +       /* send command to mc*/
9921 +       return mc_send_command(mc_io, &cmd);
9922 +}
9923 +
9924 +int dpsw_if_get_counter(struct fsl_mc_io *mc_io,
9925 +                       uint32_t cmd_flags,
9926 +                       uint16_t token,
9927 +                       uint16_t if_id,
9928 +                       enum dpsw_counter type,
9929 +                       uint64_t *counter)
9930 +{
9931 +       struct mc_command cmd = { 0 };
9932 +       int err;
9933 +
9934 +       /* prepare command */
9935 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_COUNTER,
9936 +                                         cmd_flags,
9937 +                                         token);
9938 +       DPSW_CMD_IF_GET_COUNTER(cmd, if_id, type);
9939 +
9940 +       /* send command to mc*/
9941 +       err = mc_send_command(mc_io, &cmd);
9942 +       if (err)
9943 +               return err;
9944 +
9945 +       /* retrieve response parameters */
9946 +       DPSW_RSP_IF_GET_COUNTER(cmd, *counter);
9947 +
9948 +       return 0;
9949 +}
9950 +
9951 +int dpsw_if_set_counter(struct fsl_mc_io *mc_io,
9952 +                       uint32_t cmd_flags,
9953 +                       uint16_t token,
9954 +                       uint16_t if_id,
9955 +                       enum dpsw_counter type,
9956 +                       uint64_t counter)
9957 +{
9958 +       struct mc_command cmd = { 0 };
9959 +
9960 +       /* prepare command */
9961 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_COUNTER,
9962 +                                         cmd_flags,
9963 +                                         token);
9964 +       DPSW_CMD_IF_SET_COUNTER(cmd, if_id, type, counter);
9965 +
9966 +       /* send command to mc*/
9967 +       return mc_send_command(mc_io, &cmd);
9968 +}
9969 +
9970 +int dpsw_if_set_tx_selection(struct fsl_mc_io *mc_io,
9971 +                            uint32_t cmd_flags,
9972 +                            uint16_t token,
9973 +                            uint16_t if_id,
9974 +                            const struct dpsw_tx_selection_cfg *cfg)
9975 +{
9976 +       struct mc_command cmd = { 0 };
9977 +
9978 +       /* prepare command */
9979 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_TX_SELECTION,
9980 +                                         cmd_flags,
9981 +                                         token);
9982 +       DPSW_CMD_IF_SET_TX_SELECTION(cmd, if_id, cfg);
9983 +
9984 +       /* send command to mc*/
9985 +       return mc_send_command(mc_io, &cmd);
9986 +}
9987 +
9988 +int dpsw_if_add_reflection(struct fsl_mc_io *mc_io,
9989 +                          uint32_t cmd_flags,
9990 +                          uint16_t token,
9991 +                          uint16_t if_id,
9992 +                          const struct dpsw_reflection_cfg *cfg)
9993 +{
9994 +       struct mc_command cmd = { 0 };
9995 +
9996 +       /* prepare command */
9997 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_ADD_REFLECTION,
9998 +                                         cmd_flags,
9999 +                                         token);
10000 +       DPSW_CMD_IF_ADD_REFLECTION(cmd, if_id, cfg);
10001 +
10002 +       /* send command to mc*/
10003 +       return mc_send_command(mc_io, &cmd);
10004 +}
10005 +
10006 +int dpsw_if_remove_reflection(struct fsl_mc_io *mc_io,
10007 +                             uint32_t cmd_flags,
10008 +                             uint16_t token,
10009 +                             uint16_t if_id,
10010 +                             const struct dpsw_reflection_cfg *cfg)
10011 +{
10012 +       struct mc_command cmd = { 0 };
10013 +
10014 +       /* prepare command */
10015 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_REMOVE_REFLECTION,
10016 +                                         cmd_flags,
10017 +                                         token);
10018 +       DPSW_CMD_IF_REMOVE_REFLECTION(cmd, if_id, cfg);
10019 +
10020 +       /* send command to mc*/
10021 +       return mc_send_command(mc_io, &cmd);
10022 +}
10023 +
10024 +int dpsw_if_set_flooding_metering(struct fsl_mc_io *mc_io,
10025 +                                 uint32_t cmd_flags,
10026 +                                 uint16_t token,
10027 +                                 uint16_t if_id,
10028 +                                 const struct dpsw_metering_cfg *cfg)
10029 +{
10030 +       struct mc_command cmd = { 0 };
10031 +
10032 +       /* prepare command */
10033 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_FLOODING_METERING,
10034 +                                         cmd_flags,
10035 +                                         token);
10036 +       DPSW_CMD_IF_SET_FLOODING_METERING(cmd, if_id, cfg);
10037 +
10038 +       /* send command to mc*/
10039 +       return mc_send_command(mc_io, &cmd);
10040 +}
10041 +
10042 +int dpsw_if_set_metering(struct fsl_mc_io *mc_io,
10043 +                        uint32_t cmd_flags,
10044 +                        uint16_t token,
10045 +                        uint16_t if_id,
10046 +                        uint8_t tc_id,
10047 +                        const struct dpsw_metering_cfg *cfg)
10048 +{
10049 +       struct mc_command cmd = { 0 };
10050 +
10051 +       /* prepare command */
10052 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_METERING,
10053 +                                         cmd_flags,
10054 +                                         token);
10055 +       DPSW_CMD_IF_SET_METERING(cmd, if_id, tc_id, cfg);
10056 +
10057 +       /* send command to mc*/
10058 +       return mc_send_command(mc_io, &cmd);
10059 +}
10060 +
10061 +void dpsw_prepare_early_drop(const struct dpsw_early_drop_cfg *cfg,
10062 +                            uint8_t *early_drop_buf)
10063 +{
10064 +       uint64_t *ext_params = (uint64_t *)early_drop_buf;
10065 +
10066 +       DPSW_PREP_EARLY_DROP(ext_params, cfg);
10067 +}
10068 +
10069 +int dpsw_if_set_early_drop(struct fsl_mc_io    *mc_io,
10070 +                          uint32_t             cmd_flags,
10071 +                          uint16_t             token,
10072 +                          uint16_t             if_id,
10073 +                          uint8_t              tc_id,
10074 +                          uint64_t             early_drop_iova)
10075 +{
10076 +       struct mc_command cmd = { 0 };
10077 +
10078 +       /* prepare command */
10079 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_EARLY_DROP,
10080 +                                         cmd_flags,
10081 +                                         token);
10082 +       DPSW_CMD_IF_SET_EARLY_DROP(cmd, if_id, tc_id, early_drop_iova);
10083 +
10084 +       /* send command to mc*/
10085 +       return mc_send_command(mc_io, &cmd);
10086 +}
10087 +
10088 +int dpsw_add_custom_tpid(struct fsl_mc_io *mc_io,
10089 +                        uint32_t cmd_flags,
10090 +                        uint16_t token,
10091 +                        const struct dpsw_custom_tpid_cfg *cfg)
10092 +{
10093 +       struct mc_command cmd = { 0 };
10094 +
10095 +       /* prepare command */
10096 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ADD_CUSTOM_TPID,
10097 +                                         cmd_flags,
10098 +                                         token);
10099 +       DPSW_CMD_ADD_CUSTOM_TPID(cmd, cfg);
10100 +
10101 +       /* send command to mc*/
10102 +       return mc_send_command(mc_io, &cmd);
10103 +}
10104 +
10105 +int dpsw_remove_custom_tpid(struct fsl_mc_io *mc_io,
10106 +                           uint32_t cmd_flags,
10107 +                           uint16_t token,
10108 +                           const struct dpsw_custom_tpid_cfg *cfg)
10109 +{
10110 +       struct mc_command cmd = { 0 };
10111 +
10112 +       /* prepare command */
10113 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_REMOVE_CUSTOM_TPID,
10114 +                                         cmd_flags,
10115 +                                         token);
10116 +       DPSW_CMD_REMOVE_CUSTOM_TPID(cmd, cfg);
10117 +
10118 +       /* send command to mc*/
10119 +       return mc_send_command(mc_io, &cmd);
10120 +}
10121 +
10122 +int dpsw_if_enable(struct fsl_mc_io *mc_io,
10123 +                  uint32_t cmd_flags,
10124 +                  uint16_t token,
10125 +                  uint16_t if_id)
10126 +{
10127 +       struct mc_command cmd = { 0 };
10128 +
10129 +       /* prepare command */
10130 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_ENABLE,
10131 +                                         cmd_flags,
10132 +                                         token);
10133 +       DPSW_CMD_IF_ENABLE(cmd, if_id);
10134 +
10135 +       /* send command to mc*/
10136 +       return mc_send_command(mc_io, &cmd);
10137 +}
10138 +
10139 +int dpsw_if_disable(struct fsl_mc_io *mc_io,
10140 +                   uint32_t cmd_flags,
10141 +                   uint16_t token,
10142 +                   uint16_t if_id)
10143 +{
10144 +       struct mc_command cmd = { 0 };
10145 +
10146 +       /* prepare command */
10147 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_DISABLE,
10148 +                                         cmd_flags,
10149 +                                         token);
10150 +       DPSW_CMD_IF_DISABLE(cmd, if_id);
10151 +
10152 +       /* send command to mc*/
10153 +       return mc_send_command(mc_io, &cmd);
10154 +}
10155 +
10156 +int dpsw_if_get_attributes(struct fsl_mc_io *mc_io,
10157 +                          uint32_t cmd_flags,
10158 +                          uint16_t token,
10159 +                          uint16_t if_id,
10160 +                          struct dpsw_if_attr *attr)
10161 +{
10162 +       struct mc_command cmd = { 0 };
10163 +       int err;
10164 +
10165 +       /* prepare command */
10166 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_ATTR,
10167 +                                         cmd_flags,
10168 +                                         token);
10169 +       DPSW_CMD_IF_GET_ATTR(cmd, if_id);
10170 +
10171 +       /* send command to mc*/
10172 +       err = mc_send_command(mc_io, &cmd);
10173 +       if (err)
10174 +               return err;
10175 +
10176 +       /* retrieve response parameters */
10177 +       DPSW_RSP_IF_GET_ATTR(cmd, attr);
10178 +
10179 +       return 0;
10180 +}
10181 +
10182 +int dpsw_if_set_max_frame_length(struct fsl_mc_io *mc_io,
10183 +                                uint32_t cmd_flags,
10184 +                                uint16_t token,
10185 +                                uint16_t if_id,
10186 +                                uint16_t frame_length)
10187 +{
10188 +       struct mc_command cmd = { 0 };
10189 +
10190 +       /* prepare command */
10191 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH,
10192 +                                         cmd_flags,
10193 +                                         token);
10194 +       DPSW_CMD_IF_SET_MAX_FRAME_LENGTH(cmd, if_id, frame_length);
10195 +
10196 +       /* send command to mc*/
10197 +       return mc_send_command(mc_io, &cmd);
10198 +}
10199 +
10200 +int dpsw_if_get_max_frame_length(struct fsl_mc_io *mc_io,
10201 +                                uint32_t cmd_flags,
10202 +                                uint16_t token,
10203 +                                uint16_t if_id,
10204 +                                uint16_t *frame_length)
10205 +{
10206 +       struct mc_command cmd = { 0 };
10207 +       int err;
10208 +
10209 +       /* prepare command */
10210 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_MAX_FRAME_LENGTH,
10211 +                                         cmd_flags,
10212 +                                         token);
10213 +       DPSW_CMD_IF_GET_MAX_FRAME_LENGTH(cmd, if_id);
10214 +
10215 +       /* send command to mc*/
10216 +       err = mc_send_command(mc_io, &cmd);
10217 +       if (err)
10218 +               return err;
10219 +
10220 +       DPSW_RSP_IF_GET_MAX_FRAME_LENGTH(cmd, *frame_length);
10221 +
10222 +       return 0;
10223 +}
10224 +
10225 +int dpsw_vlan_add(struct fsl_mc_io *mc_io,
10226 +                 uint32_t cmd_flags,
10227 +                 uint16_t token,
10228 +                 uint16_t vlan_id,
10229 +                 const struct dpsw_vlan_cfg *cfg)
10230 +{
10231 +       struct mc_command cmd = { 0 };
10232 +
10233 +       /* prepare command */
10234 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD,
10235 +                                         cmd_flags,
10236 +                                         token);
10237 +       DPSW_CMD_VLAN_ADD(cmd, vlan_id, cfg);
10238 +
10239 +       /* send command to mc*/
10240 +       return mc_send_command(mc_io, &cmd);
10241 +}
10242 +
10243 +int dpsw_vlan_add_if(struct fsl_mc_io *mc_io,
10244 +                    uint32_t cmd_flags,
10245 +                    uint16_t token,
10246 +                    uint16_t vlan_id,
10247 +                    const struct dpsw_vlan_if_cfg *cfg)
10248 +{
10249 +       struct mc_command cmd = { 0 };
10250 +
10251 +       /* prepare command */
10252 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10253 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD_IF,
10254 +                                         cmd_flags,
10255 +                                         token);
10256 +       DPSW_CMD_VLAN_ADD_IF(cmd, vlan_id);
10257 +
10258 +       /* send command to mc*/
10259 +       return mc_send_command(mc_io, &cmd);
10260 +}
10261 +
10262 +int dpsw_vlan_add_if_untagged(struct fsl_mc_io *mc_io,
10263 +                             uint32_t cmd_flags,
10264 +                             uint16_t token,
10265 +                             uint16_t vlan_id,
10266 +                             const struct dpsw_vlan_if_cfg *cfg)
10267 +{
10268 +       struct mc_command cmd = { 0 };
10269 +
10270 +       /* prepare command */
10271 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10272 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD_IF_UNTAGGED,
10273 +                                         cmd_flags,
10274 +                                         token);
10275 +       DPSW_CMD_VLAN_ADD_IF_UNTAGGED(cmd, vlan_id);
10276 +
10277 +       /* send command to mc*/
10278 +       return mc_send_command(mc_io, &cmd);
10279 +}
10280 +
10281 +int dpsw_vlan_add_if_flooding(struct fsl_mc_io *mc_io,
10282 +                             uint32_t cmd_flags,
10283 +                             uint16_t token,
10284 +                             uint16_t vlan_id,
10285 +                             const struct dpsw_vlan_if_cfg *cfg)
10286 +{
10287 +       struct mc_command cmd = { 0 };
10288 +
10289 +       /* prepare command */
10290 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10291 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD_IF_FLOODING,
10292 +                                         cmd_flags,
10293 +                                         token);
10294 +       DPSW_CMD_VLAN_ADD_IF_FLOODING(cmd, vlan_id);
10295 +
10296 +       /* send command to mc*/
10297 +       return mc_send_command(mc_io, &cmd);
10298 +}
10299 +
10300 +int dpsw_vlan_remove_if(struct fsl_mc_io *mc_io,
10301 +                       uint32_t cmd_flags,
10302 +                       uint16_t token,
10303 +                       uint16_t vlan_id,
10304 +                       const struct dpsw_vlan_if_cfg *cfg)
10305 +{
10306 +       struct mc_command cmd = { 0 };
10307 +
10308 +       /* prepare command */
10309 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10310 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE_IF,
10311 +                                         cmd_flags,
10312 +                                         token);
10313 +       DPSW_CMD_VLAN_REMOVE_IF(cmd, vlan_id);
10314 +
10315 +       /* send command to mc*/
10316 +       return mc_send_command(mc_io, &cmd);
10317 +}
10318 +
10319 +int dpsw_vlan_remove_if_untagged(struct fsl_mc_io *mc_io,
10320 +                                uint32_t cmd_flags,
10321 +                                uint16_t token,
10322 +                                uint16_t vlan_id,
10323 +                                const struct dpsw_vlan_if_cfg *cfg)
10324 +{
10325 +       struct mc_command cmd = { 0 };
10326 +
10327 +       /* prepare command */
10328 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10329 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED,
10330 +                                         cmd_flags,
10331 +                                         token);
10332 +       DPSW_CMD_VLAN_REMOVE_IF_UNTAGGED(cmd, vlan_id);
10333 +
10334 +       /* send command to mc*/
10335 +       return mc_send_command(mc_io, &cmd);
10336 +}
10337 +
10338 +int dpsw_vlan_remove_if_flooding(struct fsl_mc_io *mc_io,
10339 +                                uint32_t cmd_flags,
10340 +                                uint16_t token,
10341 +                                uint16_t vlan_id,
10342 +                                const struct dpsw_vlan_if_cfg *cfg)
10343 +{
10344 +       struct mc_command cmd = { 0 };
10345 +
10346 +       /* prepare command */
10347 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10348 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE_IF_FLOODING,
10349 +                                         cmd_flags,
10350 +                                         token);
10351 +       DPSW_CMD_VLAN_REMOVE_IF_FLOODING(cmd, vlan_id);
10352 +
10353 +       /* send command to mc*/
10354 +       return mc_send_command(mc_io, &cmd);
10355 +}
10356 +
10357 +int dpsw_vlan_remove(struct fsl_mc_io *mc_io,
10358 +                    uint32_t cmd_flags,
10359 +                    uint16_t token,
10360 +                    uint16_t vlan_id)
10361 +{
10362 +       struct mc_command cmd = { 0 };
10363 +
10364 +       /* prepare command */
10365 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE,
10366 +                                         cmd_flags,
10367 +                                         token);
10368 +       DPSW_CMD_VLAN_REMOVE(cmd, vlan_id);
10369 +
10370 +       /* send command to mc*/
10371 +       return mc_send_command(mc_io, &cmd);
10372 +}
10373 +
10374 +int dpsw_vlan_get_attributes(struct fsl_mc_io *mc_io,
10375 +                            uint32_t cmd_flags,
10376 +                            uint16_t token,
10377 +                            uint16_t vlan_id,
10378 +                            struct dpsw_vlan_attr *attr)
10379 +{
10380 +       struct mc_command cmd = { 0 };
10381 +       int err;
10382 +
10383 +       /* prepare command */
10384 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_ATTRIBUTES,
10385 +                                         cmd_flags,
10386 +                                         token);
10387 +       DPSW_CMD_VLAN_GET_ATTR(cmd, vlan_id);
10388 +
10389 +       /* send command to mc*/
10390 +       err = mc_send_command(mc_io, &cmd);
10391 +       if (err)
10392 +               return err;
10393 +
10394 +       /* retrieve response parameters */
10395 +       DPSW_RSP_VLAN_GET_ATTR(cmd, attr);
10396 +
10397 +       return 0;
10398 +}
10399 +
10400 +int dpsw_vlan_get_if(struct fsl_mc_io *mc_io,
10401 +                    uint32_t cmd_flags,
10402 +                    uint16_t token,
10403 +                    uint16_t vlan_id,
10404 +                    struct dpsw_vlan_if_cfg *cfg)
10405 +{
10406 +       struct mc_command cmd = { 0 };
10407 +       int err;
10408 +
10409 +       /* prepare command */
10410 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_IF,
10411 +                                         cmd_flags,
10412 +                                         token);
10413 +       DPSW_CMD_VLAN_GET_IF(cmd, vlan_id);
10414 +
10415 +       /* send command to mc*/
10416 +       err = mc_send_command(mc_io, &cmd);
10417 +       if (err)
10418 +               return err;
10419 +
10420 +       /* retrieve response parameters */
10421 +       DPSW_RSP_VLAN_GET_IF(cmd, cfg);
10422 +       read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, &cmd, 1);
10423 +
10424 +       return 0;
10425 +}
10426 +
10427 +int dpsw_vlan_get_if_flooding(struct fsl_mc_io *mc_io,
10428 +                             uint32_t cmd_flags,
10429 +                             uint16_t token,
10430 +                             uint16_t vlan_id,
10431 +                             struct dpsw_vlan_if_cfg *cfg)
10432 +{
10433 +       struct mc_command cmd = { 0 };
10434 +       int err;
10435 +
10436 +       /* prepare command */
10437 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_IF_FLOODING,
10438 +                                         cmd_flags,
10439 +                                         token);
10440 +       DPSW_CMD_VLAN_GET_IF_FLOODING(cmd, vlan_id);
10441 +
10442 +       /* send command to mc*/
10443 +       err = mc_send_command(mc_io, &cmd);
10444 +       if (err)
10445 +               return err;
10446 +
10447 +       /* retrieve response parameters */
10448 +       DPSW_RSP_VLAN_GET_IF_FLOODING(cmd, cfg);
10449 +       read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, &cmd, 1);
10450 +
10451 +       return 0;
10452 +}
10453 +
10454 +int dpsw_vlan_get_if_untagged(struct fsl_mc_io *mc_io,
10455 +                             uint32_t cmd_flags,
10456 +                             uint16_t token,
10457 +                             uint16_t vlan_id,
10458 +                             struct dpsw_vlan_if_cfg *cfg)
10459 +{
10460 +       struct mc_command cmd = { 0 };
10461 +       int err;
10462 +
10463 +       /* prepare command */
10464 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_IF_UNTAGGED,
10465 +                                         cmd_flags,
10466 +                                         token);
10467 +       DPSW_CMD_VLAN_GET_IF_UNTAGGED(cmd, vlan_id);
10468 +
10469 +       /* send command to mc*/
10470 +       err = mc_send_command(mc_io, &cmd);
10471 +       if (err)
10472 +               return err;
10473 +
10474 +       /* retrieve response parameters */
10475 +       DPSW_RSP_VLAN_GET_IF(cmd, cfg);
10476 +       read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, &cmd, 1);
10477 +
10478 +       return 0;
10479 +}
10480 +
10481 +int dpsw_fdb_add(struct fsl_mc_io *mc_io,
10482 +                uint32_t cmd_flags,
10483 +                uint16_t token,
10484 +                uint16_t *fdb_id,
10485 +                const struct dpsw_fdb_cfg *cfg)
10486 +{
10487 +       struct mc_command cmd = { 0 };
10488 +       int err;
10489 +
10490 +       /* prepare command */
10491 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_ADD,
10492 +                                         cmd_flags,
10493 +                                         token);
10494 +       DPSW_CMD_FDB_ADD(cmd, cfg);
10495 +
10496 +       /* send command to mc*/
10497 +       err = mc_send_command(mc_io, &cmd);
10498 +       if (err)
10499 +               return err;
10500 +
10501 +       /* retrieve response parameters */
10502 +       DPSW_RSP_FDB_ADD(cmd, *fdb_id);
10503 +
10504 +       return 0;
10505 +}
10506 +
10507 +int dpsw_fdb_remove(struct fsl_mc_io *mc_io,
10508 +                   uint32_t cmd_flags,
10509 +                   uint16_t token,
10510 +                   uint16_t fdb_id)
10511 +{
10512 +       struct mc_command cmd = { 0 };
10513 +
10514 +       /* prepare command */
10515 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_REMOVE,
10516 +                                         cmd_flags,
10517 +                                         token);
10518 +       DPSW_CMD_FDB_REMOVE(cmd, fdb_id);
10519 +
10520 +       /* send command to mc*/
10521 +       return mc_send_command(mc_io, &cmd);
10522 +}
10523 +
10524 +int dpsw_fdb_add_unicast(struct fsl_mc_io *mc_io,
10525 +                        uint32_t cmd_flags,
10526 +                        uint16_t token,
10527 +                        uint16_t fdb_id,
10528 +                        const struct dpsw_fdb_unicast_cfg *cfg)
10529 +{
10530 +       struct mc_command cmd = { 0 };
10531 +
10532 +       /* prepare command */
10533 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_ADD_UNICAST,
10534 +                                         cmd_flags,
10535 +                                         token);
10536 +       DPSW_CMD_FDB_ADD_UNICAST(cmd, fdb_id, cfg);
10537 +
10538 +       /* send command to mc*/
10539 +       return mc_send_command(mc_io, &cmd);
10540 +}
10541 +
10542 +int dpsw_fdb_get_unicast(struct fsl_mc_io *mc_io,
10543 +                        uint32_t cmd_flags,
10544 +                        uint16_t token,
10545 +                        uint16_t fdb_id,
10546 +                        struct dpsw_fdb_unicast_cfg *cfg)
10547 +{
10548 +       struct mc_command cmd = { 0 };
10549 +       int err;
10550 +
10551 +       /* prepare command */
10552 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_GET_UNICAST,
10553 +                                         cmd_flags,
10554 +                                         token);
10555 +       DPSW_CMD_FDB_GET_UNICAST(cmd, fdb_id);
10556 +
10557 +       /* send command to mc*/
10558 +       err = mc_send_command(mc_io, &cmd);
10559 +       if (err)
10560 +               return err;
10561 +
10562 +       /* retrieve response parameters */
10563 +       DPSW_RSP_FDB_GET_UNICAST(cmd, cfg);
10564 +
10565 +       return 0;
10566 +}
10567 +
10568 +int dpsw_fdb_remove_unicast(struct fsl_mc_io *mc_io,
10569 +                           uint32_t cmd_flags,
10570 +                           uint16_t token,
10571 +                           uint16_t fdb_id,
10572 +                           const struct dpsw_fdb_unicast_cfg *cfg)
10573 +{
10574 +       struct mc_command cmd = { 0 };
10575 +
10576 +       /* prepare command */
10577 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_REMOVE_UNICAST,
10578 +                                         cmd_flags,
10579 +                                         token);
10580 +       DPSW_CMD_FDB_REMOVE_UNICAST(cmd, fdb_id, cfg);
10581 +
10582 +       /* send command to mc*/
10583 +       return mc_send_command(mc_io, &cmd);
10584 +}
10585 +
10586 +int dpsw_fdb_add_multicast(struct fsl_mc_io *mc_io,
10587 +                          uint32_t cmd_flags,
10588 +                          uint16_t token,
10589 +                          uint16_t fdb_id,
10590 +                          const struct dpsw_fdb_multicast_cfg *cfg)
10591 +{
10592 +       struct mc_command cmd = { 0 };
10593 +
10594 +       /* prepare command */
10595 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 2);
10596 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_ADD_MULTICAST,
10597 +                                         cmd_flags,
10598 +                                         token);
10599 +       DPSW_CMD_FDB_ADD_MULTICAST(cmd, fdb_id, cfg);
10600 +
10601 +       /* send command to mc*/
10602 +       return mc_send_command(mc_io, &cmd);
10603 +}
10604 +
10605 +int dpsw_fdb_get_multicast(struct fsl_mc_io *mc_io,
10606 +                          uint32_t cmd_flags,
10607 +                          uint16_t token,
10608 +                          uint16_t fdb_id,
10609 +                          struct dpsw_fdb_multicast_cfg *cfg)
10610 +{
10611 +       struct mc_command cmd = { 0 };
10612 +       int err;
10613 +
10614 +       /* prepare command */
10615 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_GET_MULTICAST,
10616 +                                         cmd_flags,
10617 +                                         token);
10618 +       DPSW_CMD_FDB_GET_MULTICAST(cmd, fdb_id);
10619 +
10620 +       /* send command to mc*/
10621 +       err = mc_send_command(mc_io, &cmd);
10622 +       if (err)
10623 +               return err;
10624 +
10625 +       /* retrieve response parameters */
10626 +       DPSW_RSP_FDB_GET_MULTICAST(cmd, cfg);
10627 +       read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, &cmd, 2);
10628 +
10629 +       return 0;
10630 +}
10631 +
10632 +int dpsw_fdb_remove_multicast(struct fsl_mc_io *mc_io,
10633 +                             uint32_t cmd_flags,
10634 +                             uint16_t token,
10635 +                             uint16_t fdb_id,
10636 +                             const struct dpsw_fdb_multicast_cfg *cfg)
10637 +{
10638 +       struct mc_command cmd = { 0 };
10639 +
10640 +       /* prepare command */
10641 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 2);
10642 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_REMOVE_MULTICAST,
10643 +                                         cmd_flags,
10644 +                                         token);
10645 +       DPSW_CMD_FDB_REMOVE_MULTICAST(cmd, fdb_id, cfg);
10646 +
10647 +       /* send command to mc*/
10648 +       return mc_send_command(mc_io, &cmd);
10649 +}
10650 +
10651 +int dpsw_fdb_set_learning_mode(struct fsl_mc_io *mc_io,
10652 +                              uint32_t cmd_flags,
10653 +                              uint16_t token,
10654 +                              uint16_t fdb_id,
10655 +                              enum dpsw_fdb_learning_mode mode)
10656 +{
10657 +       struct mc_command cmd = { 0 };
10658 +
10659 +       /* prepare command */
10660 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_SET_LEARNING_MODE,
10661 +                                         cmd_flags,
10662 +                                         token);
10663 +       DPSW_CMD_FDB_SET_LEARNING_MODE(cmd, fdb_id, mode);
10664 +
10665 +       /* send command to mc*/
10666 +       return mc_send_command(mc_io, &cmd);
10667 +}
10668 +
10669 +int dpsw_fdb_get_attributes(struct fsl_mc_io *mc_io,
10670 +                           uint32_t cmd_flags,
10671 +                           uint16_t token,
10672 +                           uint16_t fdb_id,
10673 +                           struct dpsw_fdb_attr *attr)
10674 +{
10675 +       struct mc_command cmd = { 0 };
10676 +       int err;
10677 +
10678 +       /* prepare command */
10679 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_GET_ATTR,
10680 +                                         cmd_flags,
10681 +                                         token);
10682 +       DPSW_CMD_FDB_GET_ATTR(cmd, fdb_id);
10683 +
10684 +       /* send command to mc*/
10685 +       err = mc_send_command(mc_io, &cmd);
10686 +       if (err)
10687 +               return err;
10688 +
10689 +       /* retrieve response parameters */
10690 +       DPSW_RSP_FDB_GET_ATTR(cmd, attr);
10691 +
10692 +       return 0;
10693 +}
10694 +
10695 +int dpsw_acl_add(struct fsl_mc_io *mc_io,
10696 +                uint32_t cmd_flags,
10697 +                uint16_t token,
10698 +                uint16_t *acl_id,
10699 +                const struct dpsw_acl_cfg  *cfg)
10700 +{
10701 +       struct mc_command cmd = { 0 };
10702 +       int err;
10703 +
10704 +       /* prepare command */
10705 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_ADD,
10706 +                                         cmd_flags,
10707 +                                         token);
10708 +       DPSW_CMD_ACL_ADD(cmd, cfg);
10709 +
10710 +       /* send command to mc*/
10711 +       err = mc_send_command(mc_io, &cmd);
10712 +       if (err)
10713 +               return err;
10714 +
10715 +       /* retrieve response parameters */
10716 +       DPSW_RSP_ACL_ADD(cmd, *acl_id);
10717 +
10718 +       return 0;
10719 +}
10720 +
10721 +int dpsw_acl_remove(struct fsl_mc_io *mc_io,
10722 +                   uint32_t cmd_flags,
10723 +                   uint16_t token,
10724 +                   uint16_t acl_id)
10725 +{
10726 +       struct mc_command cmd = { 0 };
10727 +
10728 +       /* prepare command */
10729 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_REMOVE,
10730 +                                         cmd_flags,
10731 +                                         token);
10732 +       DPSW_CMD_ACL_REMOVE(cmd, acl_id);
10733 +
10734 +       /* send command to mc*/
10735 +       return mc_send_command(mc_io, &cmd);
10736 +}
10737 +
10738 +void dpsw_acl_prepare_entry_cfg(const struct dpsw_acl_key *key,
10739 +                               uint8_t *entry_cfg_buf)
10740 +{
10741 +       uint64_t *ext_params = (uint64_t *)entry_cfg_buf;
10742 +
10743 +       DPSW_PREP_ACL_ENTRY(ext_params, key);
10744 +}
10745 +
10746 +int dpsw_acl_add_entry(struct fsl_mc_io *mc_io,
10747 +                      uint32_t cmd_flags,
10748 +                      uint16_t token,
10749 +                      uint16_t acl_id,
10750 +                      const struct dpsw_acl_entry_cfg *cfg)
10751 +{
10752 +       struct mc_command cmd = { 0 };
10753 +
10754 +       /* prepare command */
10755 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_ADD_ENTRY,
10756 +                                         cmd_flags,
10757 +                                         token);
10758 +       DPSW_CMD_ACL_ADD_ENTRY(cmd, acl_id, cfg);
10759 +
10760 +       /* send command to mc*/
10761 +       return mc_send_command(mc_io, &cmd);
10762 +}
10763 +
10764 +int dpsw_acl_remove_entry(struct fsl_mc_io *mc_io,
10765 +                         uint32_t cmd_flags,
10766 +                         uint16_t token,
10767 +                         uint16_t acl_id,
10768 +                         const struct dpsw_acl_entry_cfg *cfg)
10769 +{
10770 +       struct mc_command cmd = { 0 };
10771 +
10772 +       /* prepare command */
10773 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_REMOVE_ENTRY,
10774 +                                         cmd_flags,
10775 +                                         token);
10776 +       DPSW_CMD_ACL_REMOVE_ENTRY(cmd, acl_id, cfg);
10777 +
10778 +       /* send command to mc*/
10779 +       return mc_send_command(mc_io, &cmd);
10780 +}
10781 +
10782 +int dpsw_acl_add_if(struct fsl_mc_io *mc_io,
10783 +                   uint32_t cmd_flags,
10784 +                   uint16_t token,
10785 +                   uint16_t acl_id,
10786 +                   const struct dpsw_acl_if_cfg *cfg)
10787 +{
10788 +       struct mc_command cmd = { 0 };
10789 +
10790 +       /* prepare command */
10791 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10792 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_ADD_IF,
10793 +                                         cmd_flags,
10794 +                                         token);
10795 +       DPSW_CMD_ACL_ADD_IF(cmd, acl_id, cfg);
10796 +
10797 +       /* send command to mc*/
10798 +       return mc_send_command(mc_io, &cmd);
10799 +}
10800 +
10801 +int dpsw_acl_remove_if(struct fsl_mc_io *mc_io,
10802 +                      uint32_t cmd_flags,
10803 +                      uint16_t token,
10804 +                      uint16_t acl_id,
10805 +                      const struct dpsw_acl_if_cfg *cfg)
10806 +{
10807 +       struct mc_command cmd = { 0 };
10808 +
10809 +       /* prepare command */
10810 +       build_if_id_bitmap(cfg->if_id, cfg->num_ifs, &cmd, 1);
10811 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_REMOVE_IF,
10812 +                                         cmd_flags,
10813 +                                         token);
10814 +       DPSW_CMD_ACL_REMOVE_IF(cmd, acl_id, cfg);
10815 +
10816 +       /* send command to mc*/
10817 +       return mc_send_command(mc_io, &cmd);
10818 +}
10819 +
10820 +int dpsw_acl_get_attributes(struct fsl_mc_io           *mc_io,
10821 +                           uint32_t                    cmd_flags,
10822 +                           uint16_t                    token,
10823 +                           uint16_t                    acl_id,
10824 +                           struct dpsw_acl_attr        *attr)
10825 +{
10826 +       struct mc_command cmd = { 0 };
10827 +       int err;
10828 +
10829 +       /* prepare command */
10830 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_GET_ATTR,
10831 +                                         cmd_flags,
10832 +                                         token);
10833 +       DPSW_CMD_ACL_GET_ATTR(cmd, acl_id);
10834 +
10835 +       /* send command to mc*/
10836 +       err = mc_send_command(mc_io, &cmd);
10837 +       if (err)
10838 +               return err;
10839 +
10840 +       /* retrieve response parameters */
10841 +       DPSW_RSP_ACL_GET_ATTR(cmd, attr);
10842 +
10843 +       return 0;
10844 +}
10845 +
10846 +int dpsw_ctrl_if_get_attributes(struct fsl_mc_io               *mc_io,
10847 +                               uint32_t                        cmd_flags,
10848 +                               uint16_t                        token,
10849 +                               struct dpsw_ctrl_if_attr        *attr)
10850 +{
10851 +       struct mc_command cmd = { 0 };
10852 +       int err;
10853 +
10854 +       /* prepare command */
10855 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_GET_ATTR,
10856 +                                         cmd_flags,
10857 +                                         token);
10858 +
10859 +       /* send command to mc*/
10860 +       err = mc_send_command(mc_io, &cmd);
10861 +       if (err)
10862 +               return err;
10863 +
10864 +       /* retrieve response parameters */
10865 +       DPSW_RSP_CTRL_IF_GET_ATTR(cmd, attr);
10866 +
10867 +       return 0;
10868 +}
10869 +
10870 +int dpsw_ctrl_if_set_pools(struct fsl_mc_io                    *mc_io,
10871 +                          uint32_t                             cmd_flags,
10872 +                          uint16_t                             token,
10873 +                          const struct dpsw_ctrl_if_pools_cfg *pools)
10874 +{
10875 +       struct mc_command cmd = { 0 };
10876 +
10877 +       /* prepare command */
10878 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_SET_POOLS,
10879 +                                         cmd_flags,
10880 +                                         token);
10881 +       DPSW_CMD_CTRL_IF_SET_POOLS(cmd, pools);
10882 +
10883 +       /* send command to mc*/
10884 +       return mc_send_command(mc_io, &cmd);
10885 +}
10886 +
10887 +int dpsw_ctrl_if_enable(struct fsl_mc_io       *mc_io,
10888 +                       uint32_t                cmd_flags,
10889 +                       uint16_t                token)
10890 +{
10891 +       struct mc_command cmd = { 0 };
10892 +
10893 +       /* prepare command */
10894 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_ENABLE,
10895 +                                         cmd_flags,
10896 +                                         token);
10897 +
10898 +       /* send command to mc*/
10899 +       return mc_send_command(mc_io, &cmd);
10900 +}
10901 +
10902 +/**
10903 +* @brief    Function disables control interface
10904 +* @mc_io:      Pointer to MC portal's I/O object
10905 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
10906 +* @token:      Token of DPSW object
10907 +*
10908 +* Return:      '0' on Success; Error code otherwise.
10909 +*/
10910 +int dpsw_ctrl_if_disable(struct fsl_mc_io      *mc_io,
10911 +                        uint32_t               cmd_flags,
10912 +                        uint16_t               token)
10913 +{
10914 +       struct mc_command cmd = { 0 };
10915 +
10916 +       /* prepare command */
10917 +       cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_DISABLE,
10918 +                                         cmd_flags,
10919 +                                         token);
10920 +
10921 +       /* send command to mc*/
10922 +       return mc_send_command(mc_io, &cmd);
10923 +}
10924 diff --git a/drivers/net/dpaa2/mc/fsl_dpaiop.h b/drivers/net/dpaa2/mc/fsl_dpaiop.h
10925 new file mode 100644
10926 index 0000000..b039b2a
10927 --- /dev/null
10928 +++ b/drivers/net/dpaa2/mc/fsl_dpaiop.h
10929 @@ -0,0 +1,494 @@
10930 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
10931 + *
10932 + * Redistribution and use in source and binary forms, with or without
10933 + * modification, are permitted provided that the following conditions are met:
10934 + * * Redistributions of source code must retain the above copyright
10935 + * notice, this list of conditions and the following disclaimer.
10936 + * * Redistributions in binary form must reproduce the above copyright
10937 + * notice, this list of conditions and the following disclaimer in the
10938 + * documentation and/or other materials provided with the distribution.
10939 + * * Neither the name of the above-listed copyright holders nor the
10940 + * names of any contributors may be used to endorse or promote products
10941 + * derived from this software without specific prior written permission.
10942 + *
10943 + *
10944 + * ALTERNATIVELY, this software may be distributed under the terms of the
10945 + * GNU General Public License ("GPL") as published by the Free Software
10946 + * Foundation, either version 2 of that License or (at your option) any
10947 + * later version.
10948 + *
10949 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10950 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
10951 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
10952 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
10953 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
10954 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
10955 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
10956 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
10957 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
10958 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
10959 + * POSSIBILITY OF SUCH DAMAGE.
10960 + */
10961 +#ifndef __FSL_DPAIOP_H
10962 +#define __FSL_DPAIOP_H
10963 +
10964 +struct fsl_mc_io;
10965 +
10966 +/* Data Path AIOP API
10967 + * Contains initialization APIs and runtime control APIs for DPAIOP
10968 + */
10969 +
10970 +/**
10971 + * dpaiop_open() - Open a control session for the specified object.
10972 + * @mc_io:     Pointer to MC portal's I/O object
10973 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10974 + * @dpaiop_id: DPAIOP unique ID
10975 + * @token:     Returned token; use in subsequent API calls
10976 + *
10977 + * This function can be used to open a control session for an
10978 + * already created object; an object may have been declared in
10979 + * the DPL or by calling the dpaiop_create function.
10980 + * This function returns a unique authentication token,
10981 + * associated with the specific object ID and the specific MC
10982 + * portal; this token must be used in all subsequent commands for
10983 + * this specific object
10984 + *
10985 + * Return:     '0' on Success; Error code otherwise.
10986 + */
10987 +int dpaiop_open(struct fsl_mc_io *mc_io,
10988 +               uint32_t cmd_flags,
10989 +               int dpaiop_id,
10990 +               uint16_t *token);
10991 +
10992 +/**
10993 + * dpaiop_close() - Close the control session of the object
10994 + * @mc_io:     Pointer to MC portal's I/O object
10995 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10996 + * @token:     Token of DPAIOP object
10997 + *
10998 + * After this function is called, no further operations are
10999 + * allowed on the object without opening a new control session.
11000 + *
11001 + * Return:     '0' on Success; Error code otherwise.
11002 + */
11003 +int dpaiop_close(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token);
11004 +
11005 +/**
11006 + * struct dpaiop_cfg - Structure representing DPAIOP configuration
11007 + * @aiop_id:           AIOP ID
11008 + * @aiop_container_id: AIOP container ID
11009 + */
11010 +struct dpaiop_cfg {
11011 +       int aiop_id;
11012 +       int aiop_container_id;
11013 +};
11014 +
11015 +/**
11016 + * dpaiop_create() - Create the DPAIOP object.
11017 + * @mc_io:     Pointer to MC portal's I/O object
11018 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11019 + * @cfg:       Configuration structure
11020 + * @token:     Returned token; use in subsequent API calls
11021 + *
11022 + * Create the DPAIOP object, allocate required resources and
11023 + * perform required initialization.
11024 + *
11025 + * The object can be created either by declaring it in the
11026 + * DPL file, or by calling this function.
11027 + * This function returns a unique authentication token,
11028 + * associated with the specific object ID and the specific MC
11029 + * portal; this token must be used in all subsequent calls to
11030 + * this specific object. For objects that are created using the
11031 + * DPL file, call dpaiop_open function to get an authentication
11032 + * token first.
11033 + *
11034 + * Return:     '0' on Success; Error code otherwise.
11035 + */
11036 +int dpaiop_create(struct fsl_mc_io     *mc_io,
11037 +                 uint32_t              cmd_flags,
11038 +                 const struct dpaiop_cfg       *cfg,
11039 +               uint16_t                *token);
11040 +
11041 +/**
11042 + * dpaiop_destroy() - Destroy the DPAIOP object and release all its resources.
11043 + * @mc_io:     Pointer to MC portal's I/O object
11044 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11045 + * @token:     Token of DPAIOP object
11046 + *
11047 + * Return:     '0' on Success; error code otherwise.
11048 + */
11049 +int dpaiop_destroy(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token);
11050 +
11051 +/**
11052 + * dpaiop_reset() - Reset the DPAIOP, returns the object to initial state.
11053 + * @mc_io:     Pointer to MC portal's I/O object
11054 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11055 + * @token:     Token of DPAIOP object
11056 + *
11057 + * Return:     '0' on Success; Error code otherwise.
11058 + */
11059 +int dpaiop_reset(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token);
11060 +
11061 +/**
11062 + * struct dpaiop_irq_cfg - IRQ configuration
11063 + * @addr:      Address that must be written to signal a message-based interrupt
11064 + * @val:       Value to write into irq_addr address
11065 + * @irq_num: A user defined number associated with this IRQ
11066 + */
11067 +struct dpaiop_irq_cfg {
11068 +            uint64_t           addr;
11069 +            uint32_t           val;
11070 +            int                irq_num;
11071 +};
11072 +
11073 +/**
11074 + * dpaiop_set_irq() - Set IRQ information for the DPAIOP to trigger an interrupt.
11075 + * @mc_io:     Pointer to MC portal's I/O object
11076 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11077 + * @token:     Token of DPAIOP object
11078 + * @irq_index: Identifies the interrupt index to configure
11079 + * @irq_cfg:   IRQ configuration
11080 + *
11081 + * Return:     '0' on Success; Error code otherwise.
11082 + */
11083 +int dpaiop_set_irq(struct fsl_mc_io            *mc_io,
11084 +                  uint32_t                     cmd_flags,
11085 +                  uint16_t                     token,
11086 +                  uint8_t                      irq_index,
11087 +                  struct dpaiop_irq_cfg        *irq_cfg);
11088 +
11089 +/**
11090 + * dpaiop_get_irq() - Get IRQ information from the DPAIOP.
11091 + * @mc_io:     Pointer to MC portal's I/O object
11092 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11093 + * @token:     Token of DPAIOP object
11094 + * @irq_index: The interrupt index to configure
11095 + * @type:      Interrupt type: 0 represents message interrupt
11096 + *             type (both irq_addr and irq_val are valid)
11097 + * @irq_cfg:   IRQ attributes
11098 + *
11099 + * Return:     '0' on Success; Error code otherwise.
11100 + */
11101 +int dpaiop_get_irq(struct fsl_mc_io            *mc_io,
11102 +                  uint32_t                     cmd_flags,
11103 +                  uint16_t                     token,
11104 +                  uint8_t                      irq_index,
11105 +                  int                          *type,
11106 +                  struct dpaiop_irq_cfg        *irq_cfg);
11107 +
11108 +/**
11109 + * dpaiop_set_irq_enable() - Set overall interrupt state.
11110 + * @mc_io:     Pointer to MC portal's I/O object
11111 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11112 + * @token:     Token of DPAIOP object
11113 + * @irq_index: The interrupt index to configure
11114 + * @en:        Interrupt state - enable = 1, disable = 0
11115 + *
11116 + * Allows GPP software to control when interrupts are generated.
11117 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
11118 + * overall interrupt state. if the interrupt is disabled no causes will cause
11119 + * an interrupt.
11120 + *
11121 + * Return:     '0' on Success; Error code otherwise.
11122 + */
11123 +int dpaiop_set_irq_enable(struct fsl_mc_io     *mc_io,
11124 +                         uint32_t              cmd_flags,
11125 +                         uint16_t              token,
11126 +                         uint8_t               irq_index,
11127 +                         uint8_t               en);
11128 +
11129 +/**
11130 + * dpaiop_get_irq_enable() - Get overall interrupt state
11131 + * @mc_io:     Pointer to MC portal's I/O object
11132 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11133 + * @token:     Token of DPAIOP object
11134 + * @irq_index: The interrupt index to configure
11135 + * @en:                Returned interrupt state - enable = 1, disable = 0
11136 + *
11137 + * Return:     '0' on Success; Error code otherwise.
11138 + */
11139 +int dpaiop_get_irq_enable(struct fsl_mc_io     *mc_io,
11140 +                         uint32_t              cmd_flags,
11141 +                         uint16_t              token,
11142 +                         uint8_t               irq_index,
11143 +                         uint8_t               *en);
11144 +
11145 +/**
11146 + * dpaiop_set_irq_mask() - Set interrupt mask.
11147 + * @mc_io:     Pointer to MC portal's I/O object
11148 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11149 + * @token:     Token of DPAIOP object
11150 + * @irq_index: The interrupt index to configure
11151 + * @mask:      Event mask to trigger interrupt;
11152 + *                     each bit:
11153 + *                             0 = ignore event
11154 + *                             1 = consider event for asserting IRQ
11155 + *
11156 + * Every interrupt can have up to 32 causes and the interrupt model supports
11157 + * masking/unmasking each cause independently
11158 + *
11159 + * Return:     '0' on Success; Error code otherwise.
11160 + */
11161 +int dpaiop_set_irq_mask(struct fsl_mc_io       *mc_io,
11162 +                       uint32_t                cmd_flags,
11163 +                       uint16_t                token,
11164 +                       uint8_t                 irq_index,
11165 +                       uint32_t                mask);
11166 +
11167 +/**
11168 + * dpaiop_get_irq_mask() - Get interrupt mask.
11169 + * @mc_io:     Pointer to MC portal's I/O object
11170 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11171 + * @token:     Token of DPAIOP object
11172 + * @irq_index: The interrupt index to configure
11173 + * @mask:      Returned event mask to trigger interrupt
11174 + *
11175 + * Every interrupt can have up to 32 causes and the interrupt model supports
11176 + * masking/unmasking each cause independently
11177 + *
11178 + * Return:     '0' on Success; Error code otherwise.
11179 + */
11180 +int dpaiop_get_irq_mask(struct fsl_mc_io       *mc_io,
11181 +                       uint32_t                cmd_flags,
11182 +                       uint16_t                token,
11183 +                       uint8_t                 irq_index,
11184 +                       uint32_t                *mask);
11185 +
11186 +/**
11187 + * dpaiop_get_irq_status() - Get the current status of any pending interrupts.
11188 + *
11189 + * @mc_io:     Pointer to MC portal's I/O object
11190 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11191 + * @token:     Token of DPAIOP object
11192 + * @irq_index: The interrupt index to configure
11193 + * @status:    Returned interrupts status - one bit per cause:
11194 + *                     0 = no interrupt pending
11195 + *                     1 = interrupt pending
11196 + *
11197 + * Return:     '0' on Success; Error code otherwise.
11198 + */
11199 +int dpaiop_get_irq_status(struct fsl_mc_io     *mc_io,
11200 +                         uint32_t              cmd_flags,
11201 +                         uint16_t              token,
11202 +                         uint8_t               irq_index,
11203 +                         uint32_t              *status);
11204 +
11205 +/**
11206 + * dpaiop_clear_irq_status() - Clear a pending interrupt's status
11207 + *
11208 + * @mc_io:     Pointer to MC portal's I/O object
11209 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11210 + * @token:     Token of DPAIOP object
11211 + * @irq_index: The interrupt index to configure
11212 + * @status:    Bits to clear (W1C) - one bit per cause:
11213 + *                                     0 = don't change
11214 + *                                     1 = clear status bit
11215 + *
11216 + * Return:     '0' on Success; Error code otherwise.
11217 + */
11218 +int dpaiop_clear_irq_status(struct fsl_mc_io   *mc_io,
11219 +                           uint32_t            cmd_flags,
11220 +                           uint16_t            token,
11221 +                           uint8_t             irq_index,
11222 +                           uint32_t            status);
11223 +
11224 +/**
11225 + * struct dpaiop_attr - Structure representing DPAIOP attributes
11226 + * @id:        AIOP ID
11227 + * @version:   DPAIOP version
11228 + */
11229 +struct dpaiop_attr {
11230 +       int id;
11231 +       /**
11232 +        * struct version - Structure representing DPAIOP version
11233 +        * @major:      DPAIOP major version
11234 +        * @minor:      DPAIOP minor version
11235 +        */
11236 +       struct {
11237 +               uint16_t major;
11238 +               uint16_t minor;
11239 +       } version;
11240 +};
11241 +
11242 +/**
11243 + * dpaiop_get_attributes - Retrieve DPAIOP attributes.
11244 + *
11245 + * @mc_io:     Pointer to MC portal's I/O object
11246 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11247 + * @token:     Token of DPAIOP object
11248 + * @attr:      Returned object's attributes
11249 + *
11250 + * Return:     '0' on Success; Error code otherwise.
11251 + */
11252 +int dpaiop_get_attributes(struct fsl_mc_io     *mc_io,
11253 +                         uint32_t              cmd_flags,
11254 +                         uint16_t              token,
11255 +                         struct dpaiop_attr    *attr);
11256 +
11257 +/**
11258 + * struct dpaiop_load_cfg - AIOP load configuration
11259 + * @options: AIOP load options
11260 + * @img_iova:  I/O virtual address of AIOP ELF image
11261 + * @img_size:  Size of AIOP ELF image in memory (in bytes)
11262 + */
11263 +struct dpaiop_load_cfg {
11264 +       uint64_t options;
11265 +       uint64_t img_iova;
11266 +       uint32_t img_size;
11267 +};
11268 +
11269 +/**
11270 + * dpaiop_load_aiop() - Loads an image to AIOP
11271 + * @mc_io:     Pointer to MC portal's I/O object
11272 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11273 + * @token:     Token of DPAIOP object
11274 + * @cfg:       AIOP load configurations
11275 + *
11276 + * Return:     '0' on Success; Error code otherwise.
11277 + */
11278 +int dpaiop_load(struct fsl_mc_io *mc_io,
11279 +               uint32_t cmd_flags,
11280 +               uint16_t token,
11281 +               struct dpaiop_load_cfg *cfg);
11282 +
11283 +#define DPAIOP_RUN_OPT_DEBUG                    0x0000000000000001ULL
11284 +
11285 +/**
11286 + * struct dpaiop_run_cfg - AIOP run configuration
11287 + * @cores_mask: Mask of AIOP cores to run (core 0 in most significant bit)
11288 + * @options: Execution options (currently none defined)
11289 + * @args_iova: I/O virtual address of AIOP arguments
11290 + * @args_size: Size of AIOP arguments in memory (in bytes)
11291 + */
11292 +struct dpaiop_run_cfg {
11293 +       uint64_t cores_mask;
11294 +       uint64_t options;
11295 +       uint64_t args_iova;
11296 +       uint32_t args_size;
11297 +};
11298 +
11299 +/**
11300 + * dpaiop_run_aiop() - Starts AIOP execution
11301 + * @mc_io:     Pointer to MC portal's I/O object
11302 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11303 + * @token:     Token of DPAIOP object
11304 + * @cfg:       AIOP run configuration
11305 + *
11306 + * Return:     '0' on Success; Error code otherwise.
11307 + */
11308 +int dpaiop_run(struct fsl_mc_io                        *mc_io,
11309 +              uint32_t                         cmd_flags,
11310 +              uint16_t                         token,
11311 +              const struct dpaiop_run_cfg      *cfg);
11312 +
11313 +/**
11314 + * struct dpaiop_sl_version - AIOP SL (Service Layer) version
11315 + * @major: AIOP SL major version number
11316 + * @minor: AIOP SL minor version number
11317 + * @revision: AIOP SL revision number
11318 + */
11319 +struct dpaiop_sl_version {
11320 +       uint32_t major;
11321 +       uint32_t minor;
11322 +       uint32_t revision;
11323 +};
11324 +
11325 +/**
11326 + * dpaiop_get_sl_version() - Get AIOP SL (Service Layer) version
11327 + * @mc_io:     Pointer to MC portal's I/O object
11328 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11329 + * @token:     Token of DPAIOP object
11330 + * @version:   AIOP SL version number
11331 + *
11332 + * Return:     '0' on Success; Error code otherwise.
11333 + */
11334 +int dpaiop_get_sl_version(struct fsl_mc_io             *mc_io,
11335 +                         uint32_t                      cmd_flags,
11336 +                         uint16_t                      token,
11337 +                         struct dpaiop_sl_version      *version);
11338 +
11339 +/**
11340 + * AIOP states
11341 + *
11342 + * AIOP internal states, can be retrieved by calling dpaiop_get_state() routine
11343 + */
11344 +
11345 +/**
11346 + * AIOP reset successfully completed.
11347 + */
11348 +#define DPAIOP_STATE_RESET_DONE      0x00000000
11349 +/**
11350 + * AIOP reset is ongoing.
11351 + */
11352 +#define DPAIOP_STATE_RESET_ONGOING   0x00000001
11353 +
11354 +/**
11355 + * AIOP image loading successfully completed.
11356 + */
11357 +#define DPAIOP_STATE_LOAD_DONE       0x00000002
11358 +/**
11359 + * AIOP image loading is ongoing.
11360 + */
11361 +#define DPAIOP_STATE_LOAD_ONGIONG    0x00000004
11362 +/**
11363 + * AIOP image loading completed with error.
11364 + */
11365 +#define DPAIOP_STATE_LOAD_ERROR      0x00000008
11366 +
11367 +/**
11368 + * Boot process of AIOP cores is ongoing.
11369 + */
11370 +#define DPAIOP_STATE_BOOT_ONGOING    0x00000010
11371 +/**
11372 + * Boot process of AIOP cores completed with an error.
11373 + */
11374 +#define DPAIOP_STATE_BOOT_ERROR      0x00000020
11375 +/**
11376 + * AIOP cores are functional and running
11377 + */
11378 +#define DPAIOP_STATE_RUNNING         0x00000040
11379 +/** @} */
11380 +
11381 +/**
11382 + * dpaiop_get_state() - Get AIOP state
11383 + * @mc_io:     Pointer to MC portal's I/O object
11384 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11385 + * @token:     Token of DPAIOP object
11386 + * @state:     AIOP state
11387 + *
11388 + * Return:     '0' on Success; Error code otherwise.
11389 + */
11390 +int dpaiop_get_state(struct fsl_mc_io  *mc_io,
11391 +                    uint32_t           cmd_flags,
11392 +                    uint16_t           token,
11393 +                    uint32_t           *state);
11394 +
11395 +/**
11396 + * dpaiop_set_time_of_day() - Set AIOP internal time-of-day
11397 + * @mc_io:     Pointer to MC portal's I/O object
11398 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11399 + * @token:  Token of DPAIOP object
11400 + * @time_of_day:  Current number of milliseconds since the Epoch
11401 + *
11402 + * Return:  '0' on Success; Error code otherwise.
11403 + */
11404 +int dpaiop_set_time_of_day(struct fsl_mc_io *mc_io,
11405 +                          uint32_t cmd_flags,
11406 +                          uint16_t token,
11407 +                          uint64_t time_of_day);
11408 +
11409 +/**
11410 + * dpaiop_get_time_of_day() - Get AIOP internal time-of-day
11411 + * @mc_io:  Pointer to MC portal's I/O object
11412 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11413 + * @token:  Token of DPAIOP object
11414 + * @time_of_day:  Current number of milliseconds since the Epoch
11415 + *
11416 + * Return:  '0' on Success; Error code otherwise.
11417 + */
11418 +int dpaiop_get_time_of_day(struct fsl_mc_io *mc_io,
11419 +                          uint32_t cmd_flags,
11420 +                          uint16_t token,
11421 +                          uint64_t *time_of_day);
11422 +
11423 +#endif /* __FSL_DPAIOP_H */
11424 diff --git a/drivers/net/dpaa2/mc/fsl_dpaiop_cmd.h b/drivers/net/dpaa2/mc/fsl_dpaiop_cmd.h
11425 new file mode 100644
11426 index 0000000..5b77bb8
11427 --- /dev/null
11428 +++ b/drivers/net/dpaa2/mc/fsl_dpaiop_cmd.h
11429 @@ -0,0 +1,190 @@
11430 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
11431 + *
11432 + * Redistribution and use in source and binary forms, with or without
11433 + * modification, are permitted provided that the following conditions are met:
11434 + * * Redistributions of source code must retain the above copyright
11435 + * notice, this list of conditions and the following disclaimer.
11436 + * * Redistributions in binary form must reproduce the above copyright
11437 + * notice, this list of conditions and the following disclaimer in the
11438 + * documentation and/or other materials provided with the distribution.
11439 + * * Neither the name of the above-listed copyright holders nor the
11440 + * names of any contributors may be used to endorse or promote products
11441 + * derived from this software without specific prior written permission.
11442 + *
11443 + *
11444 + * ALTERNATIVELY, this software may be distributed under the terms of the
11445 + * GNU General Public License ("GPL") as published by the Free Software
11446 + * Foundation, either version 2 of that License or (at your option) any
11447 + * later version.
11448 + *
11449 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
11450 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
11451 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
11452 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
11453 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
11454 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
11455 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
11456 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
11457 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
11458 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
11459 + * POSSIBILITY OF SUCH DAMAGE.
11460 + */
11461 +#ifndef _FSL_DPAIOP_CMD_H
11462 +#define _FSL_DPAIOP_CMD_H
11463 +
11464 +/* DPAIOP Version */
11465 +#define DPAIOP_VER_MAJOR                               1
11466 +#define DPAIOP_VER_MINOR                               2
11467 +
11468 +/* Command IDs */
11469 +#define DPAIOP_CMDID_CLOSE                             0x800
11470 +#define DPAIOP_CMDID_OPEN                              0x80a
11471 +#define DPAIOP_CMDID_CREATE                            0x90a
11472 +#define DPAIOP_CMDID_DESTROY                           0x900
11473 +
11474 +#define DPAIOP_CMDID_GET_ATTR                          0x004
11475 +#define DPAIOP_CMDID_RESET                             0x005
11476 +
11477 +#define DPAIOP_CMDID_SET_IRQ                           0x010
11478 +#define DPAIOP_CMDID_GET_IRQ                           0x011
11479 +#define DPAIOP_CMDID_SET_IRQ_ENABLE                    0x012
11480 +#define DPAIOP_CMDID_GET_IRQ_ENABLE                    0x013
11481 +#define DPAIOP_CMDID_SET_IRQ_MASK                      0x014
11482 +#define DPAIOP_CMDID_GET_IRQ_MASK                      0x015
11483 +#define DPAIOP_CMDID_GET_IRQ_STATUS                    0x016
11484 +#define DPAIOP_CMDID_CLEAR_IRQ_STATUS          0x017
11485 +
11486 +#define DPAIOP_CMDID_LOAD                                      0x280
11487 +#define DPAIOP_CMDID_RUN                                       0x281
11488 +#define DPAIOP_CMDID_GET_SL_VERSION                    0x282
11489 +#define DPAIOP_CMDID_GET_STATE                         0x283
11490 +#define DPAIOP_CMDID_SET_TIME_OF_DAY           0x284
11491 +#define DPAIOP_CMDID_GET_TIME_OF_DAY           0x285
11492 +
11493 +/*                cmd, param, offset, width, type, arg_name */
11494 +#define DPAIOP_CMD_OPEN(cmd, dpaiop_id) \
11495 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpaiop_id)
11496 +
11497 +/*                cmd, param, offset, width, type, arg_name */
11498 +#define DPAIOP_CMD_CREATE(cmd, cfg) \
11499 +do { \
11500 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->aiop_id);\
11501 +       MC_CMD_OP(cmd, 0, 32, 32, int,      cfg->aiop_container_id);\
11502 +} while (0)
11503 +
11504 +/*                cmd, param, offset, width, type, arg_name */
11505 +#define DPAIOP_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
11506 +do { \
11507 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
11508 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
11509 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
11510 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
11511 +} while (0)
11512 +
11513 +/*                cmd, param, offset, width, type, arg_name */
11514 +#define DPAIOP_CMD_GET_IRQ(cmd, irq_index) \
11515 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
11516 +
11517 +/*                cmd, param, offset, width, type, arg_name */
11518 +#define DPAIOP_RSP_GET_IRQ(cmd, type, irq_cfg) \
11519 +do { \
11520 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
11521 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
11522 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
11523 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
11524 +} while (0)
11525 +
11526 +/*                cmd, param, offset, width, type, arg_name */
11527 +#define DPAIOP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
11528 +do { \
11529 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
11530 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
11531 +} while (0)
11532 +
11533 +/*                cmd, param, offset, width, type, arg_name */
11534 +#define DPAIOP_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
11535 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
11536 +
11537 +/*                cmd, param, offset, width, type, arg_name */
11538 +#define DPAIOP_RSP_GET_IRQ_ENABLE(cmd, en) \
11539 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
11540 +
11541 +/*                cmd, param, offset, width, type, arg_name */
11542 +#define DPAIOP_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
11543 +do { \
11544 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask);\
11545 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
11546 +} while (0)
11547 +
11548 +/*                cmd, param, offset, width, type, arg_name */
11549 +#define DPAIOP_CMD_GET_IRQ_MASK(cmd, irq_index) \
11550 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
11551 +
11552 +/*                cmd, param, offset, width, type, arg_name */
11553 +#define DPAIOP_RSP_GET_IRQ_MASK(cmd, mask) \
11554 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
11555 +
11556 +/*                cmd, param, offset, width, type, arg_name */
11557 +#define DPAIOP_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
11558 +do { \
11559 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
11560 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
11561 +} while (0)
11562 +
11563 +/*                cmd, param, offset, width, type, arg_name */
11564 +#define DPAIOP_RSP_GET_IRQ_STATUS(cmd, status) \
11565 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
11566 +
11567 +/*                cmd, param, offset, width, type, arg_name */
11568 +#define DPAIOP_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
11569 +do { \
11570 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
11571 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
11572 +} while (0)
11573 +
11574 +/*                cmd, param, offset, width, type,     arg_name */
11575 +#define DPAIOP_RSP_GET_ATTRIBUTES(cmd, attr) \
11576 +do { \
11577 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id);\
11578 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
11579 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
11580 +} while (0)
11581 +
11582 +/*                cmd, param, offset, width, type, arg_name */
11583 +#define DPAIOP_CMD_LOAD(cmd, cfg) \
11584 +do { \
11585 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, cfg->img_size); \
11586 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->img_iova); \
11587 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->options); \
11588 +} while (0)
11589 +
11590 +/*                cmd, param, offset, width, type, arg_name */
11591 +#define DPAIOP_CMD_RUN(cmd, cfg) \
11592 +do { \
11593 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, cfg->args_size); \
11594 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->cores_mask); \
11595 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->options); \
11596 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->args_iova); \
11597 +} while (0)
11598 +
11599 +/*                cmd, param, offset, width, type,     arg_name */
11600 +#define DPAIOP_RSP_GET_SL_VERSION(cmd, version) \
11601 +do { \
11602 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, version->major);\
11603 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t, version->minor);\
11604 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, version->revision);\
11605 +} while (0)
11606 +
11607 +/*                cmd, param, offset, width, type,     arg_name */
11608 +#define DPAIOP_RSP_GET_STATE(cmd, state) \
11609 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, state)
11610 +
11611 +/*                cmd, param, offset, width, type,     arg_name */
11612 +#define DPAIOP_CMD_SET_TIME_OF_DAY(cmd, time_of_day) \
11613 +       MC_CMD_OP(cmd, 0, 0,  64, uint64_t, time_of_day)
11614 +
11615 +/*                cmd, param, offset, width, type,     arg_name */
11616 +#define DPAIOP_RSP_GET_TIME_OF_DAY(cmd, time_of_day) \
11617 +       MC_RSP_OP(cmd, 0, 0,  64, uint64_t, time_of_day)
11618 +
11619 +#endif /* _FSL_DPAIOP_CMD_H */
11620 diff --git a/drivers/net/dpaa2/mc/fsl_dpbp.h b/drivers/net/dpaa2/mc/fsl_dpbp.h
11621 new file mode 100644
11622 index 0000000..9856bb8
11623 --- /dev/null
11624 +++ b/drivers/net/dpaa2/mc/fsl_dpbp.h
11625 @@ -0,0 +1,438 @@
11626 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
11627 + *
11628 + * Redistribution and use in source and binary forms, with or without
11629 + * modification, are permitted provided that the following conditions are met:
11630 + * * Redistributions of source code must retain the above copyright
11631 + * notice, this list of conditions and the following disclaimer.
11632 + * * Redistributions in binary form must reproduce the above copyright
11633 + * notice, this list of conditions and the following disclaimer in the
11634 + * documentation and/or other materials provided with the distribution.
11635 + * * Neither the name of the above-listed copyright holders nor the
11636 + * names of any contributors may be used to endorse or promote products
11637 + * derived from this software without specific prior written permission.
11638 + *
11639 + *
11640 + * ALTERNATIVELY, this software may be distributed under the terms of the
11641 + * GNU General Public License ("GPL") as published by the Free Software
11642 + * Foundation, either version 2 of that License or (at your option) any
11643 + * later version.
11644 + *
11645 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
11646 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
11647 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
11648 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
11649 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
11650 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
11651 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
11652 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
11653 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
11654 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
11655 + * POSSIBILITY OF SUCH DAMAGE.
11656 + */
11657 +#ifndef __FSL_DPBP_H
11658 +#define __FSL_DPBP_H
11659 +
11660 +/* Data Path Buffer Pool API
11661 + * Contains initialization APIs and runtime control APIs for DPBP
11662 + */
11663 +
11664 +struct fsl_mc_io;
11665 +
11666 +/**
11667 + * dpbp_open() - Open a control session for the specified object.
11668 + * @mc_io:     Pointer to MC portal's I/O object
11669 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11670 + * @dpbp_id:   DPBP unique ID
11671 + * @token:     Returned token; use in subsequent API calls
11672 + *
11673 + * This function can be used to open a control session for an
11674 + * already created object; an object may have been declared in
11675 + * the DPL or by calling the dpbp_create function.
11676 + * This function returns a unique authentication token,
11677 + * associated with the specific object ID and the specific MC
11678 + * portal; this token must be used in all subsequent commands for
11679 + * this specific object
11680 + *
11681 + * Return:     '0' on Success; Error code otherwise.
11682 + */
11683 +int dpbp_open(struct fsl_mc_io *mc_io,
11684 +             uint32_t          cmd_flags,
11685 +             int               dpbp_id,
11686 +             uint16_t          *token);
11687 +
11688 +/**
11689 + * dpbp_close() - Close the control session of the object
11690 + * @mc_io:     Pointer to MC portal's I/O object
11691 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11692 + * @token:     Token of DPBP object
11693 + *
11694 + * After this function is called, no further operations are
11695 + * allowed on the object without opening a new control session.
11696 + *
11697 + * Return:     '0' on Success; Error code otherwise.
11698 + */
11699 +int dpbp_close(struct fsl_mc_io        *mc_io,
11700 +              uint32_t         cmd_flags,
11701 +              uint16_t token);
11702 +
11703 +/**
11704 + * struct dpbp_cfg - Structure representing DPBP configuration
11705 + * @options:   place holder
11706 + */
11707 +struct dpbp_cfg {
11708 +       uint32_t options;
11709 +};
11710 +
11711 +/**
11712 + * dpbp_create() - Create the DPBP object.
11713 + * @mc_io:     Pointer to MC portal's I/O object
11714 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11715 + * @cfg:       Configuration structure
11716 + * @token:     Returned token; use in subsequent API calls
11717 + *
11718 + * Create the DPBP object, allocate required resources and
11719 + * perform required initialization.
11720 + *
11721 + * The object can be created either by declaring it in the
11722 + * DPL file, or by calling this function.
11723 + * This function returns a unique authentication token,
11724 + * associated with the specific object ID and the specific MC
11725 + * portal; this token must be used in all subsequent calls to
11726 + * this specific object. For objects that are created using the
11727 + * DPL file, call dpbp_open function to get an authentication
11728 + * token first.
11729 + *
11730 + * Return:     '0' on Success; Error code otherwise.
11731 + */
11732 +int dpbp_create(struct fsl_mc_io       *mc_io,
11733 +               uint32_t                cmd_flags,
11734 +               const struct dpbp_cfg   *cfg,
11735 +               uint16_t                *token);
11736 +
11737 +/**
11738 + * dpbp_destroy() - Destroy the DPBP object and release all its resources.
11739 + * @mc_io:     Pointer to MC portal's I/O object
11740 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11741 + * @token:     Token of DPBP object
11742 + *
11743 + * Return:     '0' on Success; error code otherwise.
11744 + */
11745 +int dpbp_destroy(struct fsl_mc_io      *mc_io,
11746 +                uint32_t               cmd_flags,
11747 +                uint16_t               token);
11748 +
11749 +/**
11750 + * dpbp_enable() - Enable the DPBP.
11751 + * @mc_io:     Pointer to MC portal's I/O object
11752 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11753 + * @token:     Token of DPBP object
11754 + *
11755 + * Return:     '0' on Success; Error code otherwise.
11756 + */
11757 +int dpbp_enable(struct fsl_mc_io       *mc_io,
11758 +               uint32_t                cmd_flags,
11759 +               uint16_t                token);
11760 +
11761 +/**
11762 + * dpbp_disable() - Disable the DPBP.
11763 + * @mc_io:     Pointer to MC portal's I/O object
11764 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11765 + * @token:     Token of DPBP object
11766 + *
11767 + * Return:     '0' on Success; Error code otherwise.
11768 + */
11769 +int dpbp_disable(struct fsl_mc_io      *mc_io,
11770 +                uint32_t               cmd_flags,
11771 +                uint16_t               token);
11772 +
11773 +/**
11774 + * dpbp_is_enabled() - Check if the DPBP is enabled.
11775 + * @mc_io:     Pointer to MC portal's I/O object
11776 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11777 + * @token:     Token of DPBP object
11778 + * @en:                Returns '1' if object is enabled; '0' otherwise
11779 + *
11780 + * Return:     '0' on Success; Error code otherwise.
11781 + */
11782 +int dpbp_is_enabled(struct fsl_mc_io   *mc_io,
11783 +                   uint32_t            cmd_flags,
11784 +                   uint16_t            token,
11785 +                   int         *en);
11786 +
11787 +/**
11788 + * dpbp_reset() - Reset the DPBP, returns the object to initial state.
11789 + * @mc_io:     Pointer to MC portal's I/O object
11790 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11791 + * @token:     Token of DPBP object
11792 + *
11793 + * Return:     '0' on Success; Error code otherwise.
11794 + */
11795 +int dpbp_reset(struct fsl_mc_io        *mc_io,
11796 +              uint32_t         cmd_flags,
11797 +              uint16_t token);
11798 +
11799 +/**
11800 + * struct dpbp_irq_cfg - IRQ configuration
11801 + * @addr:      Address that must be written to signal a message-based interrupt
11802 + * @val:       Value to write into irq_addr address
11803 + * @irq_num: A user defined number associated with this IRQ
11804 + */
11805 +struct dpbp_irq_cfg {
11806 +            uint64_t           addr;
11807 +            uint32_t           val;
11808 +            int                irq_num;
11809 +};
11810 +
11811 +/**
11812 + * dpbp_set_irq() - Set IRQ information for the DPBP to trigger an interrupt.
11813 + * @mc_io:     Pointer to MC portal's I/O object
11814 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11815 + * @token:     Token of DPBP object
11816 + * @irq_index: Identifies the interrupt index to configure
11817 + * @irq_cfg:   IRQ configuration
11818 + *
11819 + * Return:     '0' on Success; Error code otherwise.
11820 + */
11821 +int dpbp_set_irq(struct fsl_mc_io      *mc_io,
11822 +                uint32_t               cmd_flags,
11823 +                uint16_t               token,
11824 +                uint8_t                irq_index,
11825 +                struct dpbp_irq_cfg    *irq_cfg);
11826 +
11827 +/**
11828 + * dpbp_get_irq() - Get IRQ information from the DPBP.
11829 + * @mc_io:     Pointer to MC portal's I/O object
11830 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11831 + * @token:     Token of DPBP object
11832 + * @irq_index: The interrupt index to configure
11833 + * @type:      Interrupt type: 0 represents message interrupt
11834 + *             type (both irq_addr and irq_val are valid)
11835 + * @irq_cfg:   IRQ attributes
11836 + *
11837 + * Return:     '0' on Success; Error code otherwise.
11838 + */
11839 +int dpbp_get_irq(struct fsl_mc_io      *mc_io,
11840 +                uint32_t               cmd_flags,
11841 +                uint16_t               token,
11842 +                uint8_t                irq_index,
11843 +                int                    *type,
11844 +                struct dpbp_irq_cfg    *irq_cfg);
11845 +
11846 +/**
11847 + * dpbp_set_irq_enable() - Set overall interrupt state.
11848 + * @mc_io:     Pointer to MC portal's I/O object
11849 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11850 + * @token:     Token of DPBP object
11851 + * @irq_index: The interrupt index to configure
11852 + * @en:        Interrupt state - enable = 1, disable = 0
11853 + *
11854 + * Allows GPP software to control when interrupts are generated.
11855 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
11856 + * overall interrupt state. if the interrupt is disabled no causes will cause
11857 + * an interrupt.
11858 + *
11859 + * Return:     '0' on Success; Error code otherwise.
11860 + */
11861 +int dpbp_set_irq_enable(struct fsl_mc_io       *mc_io,
11862 +                       uint32_t                cmd_flags,
11863 +                       uint16_t                token,
11864 +                       uint8_t                 irq_index,
11865 +                       uint8_t                 en);
11866 +
11867 +/**
11868 + * dpbp_get_irq_enable() - Get overall interrupt state
11869 + * @mc_io:     Pointer to MC portal's I/O object
11870 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11871 + * @token:     Token of DPBP object
11872 + * @irq_index: The interrupt index to configure
11873 + * @en:                Returned interrupt state - enable = 1, disable = 0
11874 + *
11875 + * Return:     '0' on Success; Error code otherwise.
11876 + */
11877 +int dpbp_get_irq_enable(struct fsl_mc_io       *mc_io,
11878 +                       uint32_t                cmd_flags,
11879 +                       uint16_t                token,
11880 +                       uint8_t                 irq_index,
11881 +                       uint8_t                 *en);
11882 +
11883 +/**
11884 + * dpbp_set_irq_mask() - Set interrupt mask.
11885 + * @mc_io:     Pointer to MC portal's I/O object
11886 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11887 + * @token:     Token of DPBP object
11888 + * @irq_index: The interrupt index to configure
11889 + * @mask:      Event mask to trigger interrupt;
11890 + *                     each bit:
11891 + *                             0 = ignore event
11892 + *                             1 = consider event for asserting IRQ
11893 + *
11894 + * Every interrupt can have up to 32 causes and the interrupt model supports
11895 + * masking/unmasking each cause independently
11896 + *
11897 + * Return:     '0' on Success; Error code otherwise.
11898 + */
11899 +int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
11900 +                     uint32_t          cmd_flags,
11901 +                     uint16_t          token,
11902 +                     uint8_t           irq_index,
11903 +                     uint32_t          mask);
11904 +
11905 +/**
11906 + * dpbp_get_irq_mask() - Get interrupt mask.
11907 + * @mc_io:     Pointer to MC portal's I/O object
11908 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11909 + * @token:     Token of DPBP object
11910 + * @irq_index: The interrupt index to configure
11911 + * @mask:      Returned event mask to trigger interrupt
11912 + *
11913 + * Every interrupt can have up to 32 causes and the interrupt model supports
11914 + * masking/unmasking each cause independently
11915 + *
11916 + * Return:     '0' on Success; Error code otherwise.
11917 + */
11918 +int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
11919 +                     uint32_t          cmd_flags,
11920 +                     uint16_t          token,
11921 +                     uint8_t           irq_index,
11922 +                     uint32_t          *mask);
11923 +
11924 +/**
11925 + * dpbp_get_irq_status() - Get the current status of any pending interrupts.
11926 + *
11927 + * @mc_io:     Pointer to MC portal's I/O object
11928 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11929 + * @token:     Token of DPBP object
11930 + * @irq_index: The interrupt index to configure
11931 + * @status:    Returned interrupts status - one bit per cause:
11932 + *                     0 = no interrupt pending
11933 + *                     1 = interrupt pending
11934 + *
11935 + * Return:     '0' on Success; Error code otherwise.
11936 + */
11937 +int dpbp_get_irq_status(struct fsl_mc_io       *mc_io,
11938 +                       uint32_t                cmd_flags,
11939 +                       uint16_t                token,
11940 +                       uint8_t                 irq_index,
11941 +                       uint32_t                *status);
11942 +
11943 +/**
11944 + * dpbp_clear_irq_status() - Clear a pending interrupt's status
11945 + *
11946 + * @mc_io:     Pointer to MC portal's I/O object
11947 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11948 + * @token:     Token of DPBP object
11949 + * @irq_index: The interrupt index to configure
11950 + * @status:    Bits to clear (W1C) - one bit per cause:
11951 + *                                     0 = don't change
11952 + *                                     1 = clear status bit
11953 + *
11954 + * Return:     '0' on Success; Error code otherwise.
11955 + */
11956 +int dpbp_clear_irq_status(struct fsl_mc_io     *mc_io,
11957 +                         uint32_t              cmd_flags,
11958 +                         uint16_t              token,
11959 +                         uint8_t               irq_index,
11960 +                         uint32_t              status);
11961 +
11962 +/**
11963 + * struct dpbp_attr - Structure representing DPBP attributes
11964 + * @id:                DPBP object ID
11965 + * @version:   DPBP version
11966 + * @bpid:      Hardware buffer pool ID; should be used as an argument in
11967 + *             acquire/release operations on buffers
11968 + */
11969 +struct dpbp_attr {
11970 +       int id;
11971 +       /**
11972 +        * struct version - Structure representing DPBP version
11973 +        * @major:      DPBP major version
11974 +        * @minor:      DPBP minor version
11975 +        */
11976 +       struct {
11977 +               uint16_t major;
11978 +               uint16_t minor;
11979 +       } version;
11980 +       uint16_t bpid;
11981 +};
11982 +
11983 +/**
11984 + * dpbp_get_attributes - Retrieve DPBP attributes.
11985 + *
11986 + * @mc_io:     Pointer to MC portal's I/O object
11987 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11988 + * @token:     Token of DPBP object
11989 + * @attr:      Returned object's attributes
11990 + *
11991 + * Return:     '0' on Success; Error code otherwise.
11992 + */
11993 +int dpbp_get_attributes(struct fsl_mc_io       *mc_io,
11994 +                       uint32_t        cmd_flags,
11995 +                       uint16_t                token,
11996 +                       struct dpbp_attr        *attr);
11997 +
11998 +/**
11999 + *  DPBP notifications options
12000 + */
12001 +
12002 +/**
12003 + * BPSCN write will attempt to allocate into a cache (coherent write)
12004 + */
12005 +#define DPBP_NOTIF_OPT_COHERENT_WRITE  0x00000001
12006 +
12007 +/**
12008 + * struct dpbp_notification_cfg - Structure representing DPBP notifications
12009 + *     towards software
12010 + * @depletion_entry: below this threshold the pool is "depleted";
12011 + *     set it to '0' to disable it
12012 + * @depletion_exit: greater than or equal to this threshold the pool exit its
12013 + *     "depleted" state
12014 + * @surplus_entry: above this threshold the pool is in "surplus" state;
12015 + *     set it to '0' to disable it
12016 + * @surplus_exit: less than or equal to this threshold the pool exit its
12017 + *     "surplus" state
12018 + * @message_iova: MUST be given if either 'depletion_entry' or 'surplus_entry'
12019 + *     is not '0' (enable); I/O virtual address (must be in DMA-able memory),
12020 + *     must be 16B aligned.
12021 + * @message_ctx: The context that will be part of the BPSCN message and will
12022 + *     be written to 'message_iova'
12023 + * @options: Mask of available options; use 'DPBP_NOTIF_OPT_<X>' values
12024 + */
12025 +struct dpbp_notification_cfg {
12026 +       uint32_t        depletion_entry;
12027 +       uint32_t        depletion_exit;
12028 +       uint32_t        surplus_entry;
12029 +       uint32_t        surplus_exit;
12030 +       uint64_t        message_iova;
12031 +       uint64_t        message_ctx;
12032 +       uint16_t        options;
12033 +};
12034 +
12035 +/**
12036 + * dpbp_set_notifications() - Set notifications towards software
12037 + * @mc_io:     Pointer to MC portal's I/O object
12038 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12039 + * @token:     Token of DPBP object
12040 + * @cfg:       notifications configuration
12041 + *
12042 + * Return:     '0' on Success; Error code otherwise.
12043 + */
12044 +int dpbp_set_notifications(struct fsl_mc_io    *mc_io,
12045 +                          uint32_t             cmd_flags,
12046 +                          uint16_t             token,
12047 +                          struct dpbp_notification_cfg *cfg);
12048 +
12049 +/**
12050 + * dpbp_get_notifications() - Get the notifications configuration
12051 + * @mc_io:     Pointer to MC portal's I/O object
12052 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12053 + * @token:     Token of DPBP object
12054 + * @cfg:       notifications configuration
12055 + *
12056 + * Return:     '0' on Success; Error code otherwise.
12057 + */
12058 +int dpbp_get_notifications(struct fsl_mc_io    *mc_io,
12059 +                          uint32_t             cmd_flags,
12060 +                             uint16_t          token,
12061 +                             struct dpbp_notification_cfg      *cfg);
12062 +
12063 +#endif /* __FSL_DPBP_H */
12064 diff --git a/drivers/net/dpaa2/mc/fsl_dpbp_cmd.h b/drivers/net/dpaa2/mc/fsl_dpbp_cmd.h
12065 new file mode 100644
12066 index 0000000..71ad96a
12067 --- /dev/null
12068 +++ b/drivers/net/dpaa2/mc/fsl_dpbp_cmd.h
12069 @@ -0,0 +1,172 @@
12070 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
12071 + *
12072 + * Redistribution and use in source and binary forms, with or without
12073 + * modification, are permitted provided that the following conditions are met:
12074 + * * Redistributions of source code must retain the above copyright
12075 + * notice, this list of conditions and the following disclaimer.
12076 + * * Redistributions in binary form must reproduce the above copyright
12077 + * notice, this list of conditions and the following disclaimer in the
12078 + * documentation and/or other materials provided with the distribution.
12079 + * * Neither the name of the above-listed copyright holders nor the
12080 + * names of any contributors may be used to endorse or promote products
12081 + * derived from this software without specific prior written permission.
12082 + *
12083 + *
12084 + * ALTERNATIVELY, this software may be distributed under the terms of the
12085 + * GNU General Public License ("GPL") as published by the Free Software
12086 + * Foundation, either version 2 of that License or (at your option) any
12087 + * later version.
12088 + *
12089 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
12090 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12091 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
12092 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
12093 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
12094 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
12095 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
12096 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
12097 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
12098 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
12099 + * POSSIBILITY OF SUCH DAMAGE.
12100 + */
12101 +#ifndef _FSL_DPBP_CMD_H
12102 +#define _FSL_DPBP_CMD_H
12103 +
12104 +/* DPBP Version */
12105 +#define DPBP_VER_MAJOR                         2
12106 +#define DPBP_VER_MINOR                         2
12107 +
12108 +/* Command IDs */
12109 +#define DPBP_CMDID_CLOSE                               0x800
12110 +#define DPBP_CMDID_OPEN                                        0x804
12111 +#define DPBP_CMDID_CREATE                              0x904
12112 +#define DPBP_CMDID_DESTROY                             0x900
12113 +
12114 +#define DPBP_CMDID_ENABLE                              0x002
12115 +#define DPBP_CMDID_DISABLE                             0x003
12116 +#define DPBP_CMDID_GET_ATTR                            0x004
12117 +#define DPBP_CMDID_RESET                               0x005
12118 +#define DPBP_CMDID_IS_ENABLED                          0x006
12119 +
12120 +#define DPBP_CMDID_SET_IRQ                             0x010
12121 +#define DPBP_CMDID_GET_IRQ                             0x011
12122 +#define DPBP_CMDID_SET_IRQ_ENABLE                      0x012
12123 +#define DPBP_CMDID_GET_IRQ_ENABLE                      0x013
12124 +#define DPBP_CMDID_SET_IRQ_MASK                                0x014
12125 +#define DPBP_CMDID_GET_IRQ_MASK                                0x015
12126 +#define DPBP_CMDID_GET_IRQ_STATUS                      0x016
12127 +#define DPBP_CMDID_CLEAR_IRQ_STATUS                    0x017
12128 +
12129 +#define DPBP_CMDID_SET_NOTIFICATIONS           0x01b0
12130 +#define DPBP_CMDID_GET_NOTIFICATIONS           0x01b1
12131 +
12132 +/*                cmd, param, offset, width, type, arg_name */
12133 +#define DPBP_CMD_OPEN(cmd, dpbp_id) \
12134 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpbp_id)
12135 +
12136 +/*                cmd, param, offset, width, type, arg_name */
12137 +#define DPBP_RSP_IS_ENABLED(cmd, en) \
12138 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
12139 +
12140 +/*                cmd, param, offset, width, type, arg_name */
12141 +#define DPBP_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
12142 +do { \
12143 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
12144 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
12145 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
12146 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
12147 +} while (0)
12148 +
12149 +/*                cmd, param, offset, width, type, arg_name */
12150 +#define DPBP_CMD_GET_IRQ(cmd, irq_index) \
12151 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
12152 +
12153 +/*                cmd, param, offset, width, type, arg_name */
12154 +#define DPBP_RSP_GET_IRQ(cmd, type, irq_cfg) \
12155 +do { \
12156 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
12157 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
12158 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
12159 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
12160 +} while (0)
12161 +
12162 +/*                cmd, param, offset, width, type, arg_name */
12163 +#define DPBP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
12164 +do { \
12165 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
12166 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12167 +} while (0)
12168 +
12169 +/*                cmd, param, offset, width, type, arg_name */
12170 +#define DPBP_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
12171 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
12172 +
12173 +/*                cmd, param, offset, width, type, arg_name */
12174 +#define DPBP_RSP_GET_IRQ_ENABLE(cmd, en) \
12175 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
12176 +
12177 +/*                cmd, param, offset, width, type, arg_name */
12178 +#define DPBP_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
12179 +do { \
12180 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask);\
12181 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12182 +} while (0)
12183 +
12184 +/*                cmd, param, offset, width, type, arg_name */
12185 +#define DPBP_CMD_GET_IRQ_MASK(cmd, irq_index) \
12186 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
12187 +
12188 +/*                cmd, param, offset, width, type, arg_name */
12189 +#define DPBP_RSP_GET_IRQ_MASK(cmd, mask) \
12190 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
12191 +
12192 +/*                cmd, param, offset, width, type, arg_name */
12193 +#define DPBP_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
12194 +do { \
12195 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
12196 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12197 +} while (0)
12198 +/*                cmd, param, offset, width, type, arg_name */
12199 +#define DPBP_RSP_GET_IRQ_STATUS(cmd, status) \
12200 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
12201 +
12202 +/*                cmd, param, offset, width, type, arg_name */
12203 +#define DPBP_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
12204 +do { \
12205 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
12206 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12207 +} while (0)
12208 +
12209 +/*                cmd, param, offset, width, type,     arg_name */
12210 +#define DPBP_RSP_GET_ATTRIBUTES(cmd, attr) \
12211 +do { \
12212 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, attr->bpid); \
12213 +       MC_RSP_OP(cmd, 0, 32, 32, int,      attr->id);\
12214 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
12215 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
12216 +} while (0)
12217 +
12218 +/*                cmd, param, offset, width, type, arg_name */
12219 +#define DPBP_CMD_SET_NOTIFICATIONS(cmd, cfg) \
12220 +do { \
12221 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, cfg->depletion_entry); \
12222 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, cfg->depletion_exit);\
12223 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->surplus_entry);\
12224 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->surplus_exit);\
12225 +       MC_CMD_OP(cmd, 2, 0,  16, uint16_t, cfg->options);\
12226 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx);\
12227 +       MC_CMD_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova);\
12228 +} while (0)
12229 +
12230 +/*                cmd, param, offset, width, type, arg_name */
12231 +#define DPBP_CMD_GET_NOTIFICATIONS(cmd, cfg) \
12232 +do { \
12233 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, cfg->depletion_entry); \
12234 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t, cfg->depletion_exit);\
12235 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, cfg->surplus_entry);\
12236 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, cfg->surplus_exit);\
12237 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, cfg->options);\
12238 +       MC_RSP_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx);\
12239 +       MC_RSP_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova);\
12240 +} while (0)
12241 +#endif /* _FSL_DPBP_CMD_H */
12242 diff --git a/drivers/net/dpaa2/mc/fsl_dpci.h b/drivers/net/dpaa2/mc/fsl_dpci.h
12243 new file mode 100644
12244 index 0000000..d885935
12245 --- /dev/null
12246 +++ b/drivers/net/dpaa2/mc/fsl_dpci.h
12247 @@ -0,0 +1,594 @@
12248 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
12249 + *
12250 + * Redistribution and use in source and binary forms, with or without
12251 + * modification, are permitted provided that the following conditions are met:
12252 + * * Redistributions of source code must retain the above copyright
12253 + * notice, this list of conditions and the following disclaimer.
12254 + * * Redistributions in binary form must reproduce the above copyright
12255 + * notice, this list of conditions and the following disclaimer in the
12256 + * documentation and/or other materials provided with the distribution.
12257 + * * Neither the name of the above-listed copyright holders nor the
12258 + * names of any contributors may be used to endorse or promote products
12259 + * derived from this software without specific prior written permission.
12260 + *
12261 + *
12262 + * ALTERNATIVELY, this software may be distributed under the terms of the
12263 + * GNU General Public License ("GPL") as published by the Free Software
12264 + * Foundation, either version 2 of that License or (at your option) any
12265 + * later version.
12266 + *
12267 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
12268 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12269 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
12270 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
12271 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
12272 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
12273 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
12274 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
12275 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
12276 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
12277 + * POSSIBILITY OF SUCH DAMAGE.
12278 + */
12279 +#ifndef __FSL_DPCI_H
12280 +#define __FSL_DPCI_H
12281 +
12282 +/* Data Path Communication Interface API
12283 + * Contains initialization APIs and runtime control APIs for DPCI
12284 + */
12285 +
12286 +struct fsl_mc_io;
12287 +
12288 +/** General DPCI macros */
12289 +
12290 +/**
12291 + * Maximum number of Tx/Rx priorities per DPCI object
12292 + */
12293 +#define DPCI_PRIO_NUM          2
12294 +
12295 +/**
12296 + * Indicates an invalid frame queue
12297 + */
12298 +#define DPCI_FQID_NOT_VALID    (uint32_t)(-1)
12299 +
12300 +/**
12301 + * All queues considered; see dpci_set_rx_queue()
12302 + */
12303 +#define DPCI_ALL_QUEUES                (uint8_t)(-1)
12304 +
12305 +/**
12306 + * dpci_open() - Open a control session for the specified object
12307 + * @mc_io:     Pointer to MC portal's I/O object
12308 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12309 + * @dpci_id:   DPCI unique ID
12310 + * @token:     Returned token; use in subsequent API calls
12311 + *
12312 + * This function can be used to open a control session for an
12313 + * already created object; an object may have been declared in
12314 + * the DPL or by calling the dpci_create() function.
12315 + * This function returns a unique authentication token,
12316 + * associated with the specific object ID and the specific MC
12317 + * portal; this token must be used in all subsequent commands for
12318 + * this specific object.
12319 + *
12320 + * Return:     '0' on Success; Error code otherwise.
12321 + */
12322 +int dpci_open(struct fsl_mc_io *mc_io,
12323 +             uint32_t          cmd_flags,
12324 +             int               dpci_id,
12325 +             uint16_t          *token);
12326 +
12327 +/**
12328 + * dpci_close() - Close the control session of the object
12329 + * @mc_io:     Pointer to MC portal's I/O object
12330 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12331 + * @token:     Token of DPCI object
12332 + *
12333 + * After this function is called, no further operations are
12334 + * allowed on the object without opening a new control session.
12335 + *
12336 + * Return:     '0' on Success; Error code otherwise.
12337 + */
12338 +int dpci_close(struct fsl_mc_io *mc_io,
12339 +              uint32_t cmd_flags,
12340 +              uint16_t token);
12341 +
12342 +/**
12343 + * struct dpci_cfg - Structure representing DPCI configuration
12344 + * @num_of_priorities: Number of receive priorities (queues) for the DPCI;
12345 + *                     note, that the number of transmit priorities (queues)
12346 + *                     is determined by the number of receive priorities of
12347 + *                     the peer DPCI object
12348 + */
12349 +struct dpci_cfg {
12350 +       uint8_t num_of_priorities;
12351 +};
12352 +
12353 +/**
12354 + * dpci_create() - Create the DPCI object.
12355 + * @mc_io:     Pointer to MC portal's I/O object
12356 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12357 + * @cfg:       Configuration structure
12358 + * @token:     Returned token; use in subsequent API calls
12359 + *
12360 + * Create the DPCI object, allocate required resources and perform required
12361 + * initialization.
12362 + *
12363 + * The object can be created either by declaring it in the
12364 + * DPL file, or by calling this function.
12365 + *
12366 + * This function returns a unique authentication token,
12367 + * associated with the specific object ID and the specific MC
12368 + * portal; this token must be used in all subsequent calls to
12369 + * this specific object. For objects that are created using the
12370 + * DPL file, call dpci_open() function to get an authentication
12371 + * token first.
12372 + *
12373 + * Return:     '0' on Success; Error code otherwise.
12374 + */
12375 +int dpci_create(struct fsl_mc_io       *mc_io,
12376 +               uint32_t                cmd_flags,
12377 +               const struct dpci_cfg   *cfg,
12378 +               uint16_t                *token);
12379 +
12380 +/**
12381 + * dpci_destroy() - Destroy the DPCI object and release all its resources.
12382 + * @mc_io:     Pointer to MC portal's I/O object
12383 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12384 + * @token:     Token of DPCI object
12385 + *
12386 + * Return:     '0' on Success; error code otherwise.
12387 + */
12388 +int dpci_destroy(struct fsl_mc_io      *mc_io,
12389 +                uint32_t               cmd_flags,
12390 +                uint16_t               token);
12391 +
12392 +/**
12393 + * dpci_enable() - Enable the DPCI, allow sending and receiving frames.
12394 + * @mc_io:     Pointer to MC portal's I/O object
12395 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12396 + * @token:     Token of DPCI object
12397 + *
12398 + * Return:     '0' on Success; Error code otherwise.
12399 + */
12400 +int dpci_enable(struct fsl_mc_io *mc_io,
12401 +               uint32_t        cmd_flags,
12402 +               uint16_t        token);
12403 +
12404 +/**
12405 + * dpci_disable() - Disable the DPCI, stop sending and receiving frames.
12406 + * @mc_io:     Pointer to MC portal's I/O object
12407 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12408 + * @token:     Token of DPCI object
12409 + *
12410 + * Return:     '0' on Success; Error code otherwise.
12411 + */
12412 +int dpci_disable(struct fsl_mc_io *mc_io,
12413 +                uint32_t       cmd_flags,
12414 +                uint16_t       token);
12415 +
12416 +/**
12417 + * dpci_is_enabled() - Check if the DPCI is enabled.
12418 + * @mc_io:     Pointer to MC portal's I/O object
12419 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12420 + * @token:     Token of DPCI object
12421 + * @en:                Returns '1' if object is enabled; '0' otherwise
12422 + *
12423 + * Return:     '0' on Success; Error code otherwise.
12424 + */
12425 +int dpci_is_enabled(struct fsl_mc_io   *mc_io,
12426 +                   uint32_t            cmd_flags,
12427 +                   uint16_t            token,
12428 +                   int         *en);
12429 +
12430 +/**
12431 + * dpci_reset() - Reset the DPCI, returns the object to initial state.
12432 + * @mc_io:     Pointer to MC portal's I/O object
12433 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12434 + * @token:     Token of DPCI object
12435 + *
12436 + * Return:     '0' on Success; Error code otherwise.
12437 + */
12438 +int dpci_reset(struct fsl_mc_io *mc_io,
12439 +              uint32_t cmd_flags,
12440 +              uint16_t token);
12441 +
12442 +/** DPCI IRQ Index and Events */
12443 +
12444 +/**
12445 + * IRQ index
12446 + */
12447 +#define DPCI_IRQ_INDEX                         0
12448 +
12449 +/**
12450 + * IRQ event - indicates a change in link state
12451 + */
12452 +#define DPCI_IRQ_EVENT_LINK_CHANGED            0x00000001
12453 +/**
12454 + * IRQ event - indicates a connection event
12455 + */
12456 +#define DPCI_IRQ_EVENT_CONNECTED                0x00000002
12457 +/**
12458 + * IRQ event - indicates a disconnection event
12459 + */
12460 +#define DPCI_IRQ_EVENT_DISCONNECTED             0x00000004
12461 +
12462 +/**
12463 + * struct dpci_irq_cfg - IRQ configuration
12464 + * @addr:      Address that must be written to signal a message-based interrupt
12465 + * @val:       Value to write into irq_addr address
12466 + * @irq_num: A user defined number associated with this IRQ
12467 + */
12468 +struct dpci_irq_cfg {
12469 +            uint64_t           addr;
12470 +            uint32_t           val;
12471 +            int                irq_num;
12472 +};
12473 +
12474 +/**
12475 + * dpci_set_irq() - Set IRQ information for the DPCI to trigger an interrupt.
12476 + * @mc_io:     Pointer to MC portal's I/O object
12477 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12478 + * @token:     Token of DPCI object
12479 + * @irq_index: Identifies the interrupt index to configure
12480 + * @irq_cfg:   IRQ configuration
12481 + *
12482 + * Return:     '0' on Success; Error code otherwise.
12483 + */
12484 +int dpci_set_irq(struct fsl_mc_io      *mc_io,
12485 +                uint32_t               cmd_flags,
12486 +                uint16_t               token,
12487 +                uint8_t                irq_index,
12488 +                struct dpci_irq_cfg    *irq_cfg);
12489 +
12490 +/**
12491 + * dpci_get_irq() - Get IRQ information from the DPCI.
12492 + * @mc_io:     Pointer to MC portal's I/O object
12493 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12494 + * @token:     Token of DPCI object
12495 + * @irq_index: The interrupt index to configure
12496 + * @type:      Interrupt type: 0 represents message interrupt
12497 + *             type (both irq_addr and irq_val are valid)
12498 + * @irq_cfg:   IRQ attributes
12499 + *
12500 + * Return:     '0' on Success; Error code otherwise.
12501 + */
12502 +int dpci_get_irq(struct fsl_mc_io      *mc_io,
12503 +                uint32_t               cmd_flags,
12504 +                uint16_t               token,
12505 +                uint8_t                irq_index,
12506 +                int                    *type,
12507 +                struct dpci_irq_cfg    *irq_cfg);
12508 +
12509 +/**
12510 + * dpci_set_irq_enable() - Set overall interrupt state.
12511 + * @mc_io:     Pointer to MC portal's I/O object
12512 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12513 + * @token:     Token of DPCI object
12514 + * @irq_index: The interrupt index to configure
12515 + * @en:                Interrupt state - enable = 1, disable = 0
12516 + *
12517 + * Allows GPP software to control when interrupts are generated.
12518 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
12519 + * overall interrupt state. if the interrupt is disabled no causes will cause
12520 + * an interrupt.
12521 + *
12522 + * Return:     '0' on Success; Error code otherwise.
12523 + */
12524 +int dpci_set_irq_enable(struct fsl_mc_io       *mc_io,
12525 +                       uint32_t                cmd_flags,
12526 +                       uint16_t                token,
12527 +                       uint8_t                 irq_index,
12528 +                       uint8_t                 en);
12529 +
12530 +/**
12531 + * dpci_get_irq_enable() - Get overall interrupt state.
12532 + * @mc_io:     Pointer to MC portal's I/O object
12533 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12534 + * @token:     Token of DPCI object
12535 + * @irq_index: The interrupt index to configure
12536 + * @en:                Returned interrupt state - enable = 1, disable = 0
12537 + *
12538 + * Return:     '0' on Success; Error code otherwise.
12539 + */
12540 +int dpci_get_irq_enable(struct fsl_mc_io       *mc_io,
12541 +                       uint32_t                cmd_flags,
12542 +                       uint16_t                token,
12543 +                       uint8_t                 irq_index,
12544 +                       uint8_t                 *en);
12545 +
12546 +/**
12547 + * dpci_set_irq_mask() - Set interrupt mask.
12548 + * @mc_io:     Pointer to MC portal's I/O object
12549 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12550 + * @token:     Token of DPCI object
12551 + * @irq_index: The interrupt index to configure
12552 + * @mask:      event mask to trigger interrupt;
12553 + *                     each bit:
12554 + *                             0 = ignore event
12555 + *                             1 = consider event for asserting IRQ
12556 + *
12557 + * Every interrupt can have up to 32 causes and the interrupt model supports
12558 + * masking/unmasking each cause independently
12559 + *
12560 + * Return:     '0' on Success; Error code otherwise.
12561 + */
12562 +int dpci_set_irq_mask(struct fsl_mc_io *mc_io,
12563 +                     uint32_t          cmd_flags,
12564 +                     uint16_t          token,
12565 +                     uint8_t           irq_index,
12566 +                     uint32_t          mask);
12567 +
12568 +/**
12569 + * dpci_get_irq_mask() - Get interrupt mask.
12570 + * @mc_io:     Pointer to MC portal's I/O object
12571 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12572 + * @token:     Token of DPCI object
12573 + * @irq_index: The interrupt index to configure
12574 + * @mask:      Returned event mask to trigger interrupt
12575 + *
12576 + * Every interrupt can have up to 32 causes and the interrupt model supports
12577 + * masking/unmasking each cause independently
12578 + *
12579 + * Return:     '0' on Success; Error code otherwise.
12580 + */
12581 +int dpci_get_irq_mask(struct fsl_mc_io *mc_io,
12582 +                     uint32_t          cmd_flags,
12583 +                     uint16_t          token,
12584 +                     uint8_t           irq_index,
12585 +                     uint32_t          *mask);
12586 +
12587 +/**
12588 + * dpci_get_irq_status() - Get the current status of any pending interrupts.
12589 + * @mc_io:     Pointer to MC portal's I/O object
12590 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12591 + * @token:     Token of DPCI object
12592 + * @irq_index: The interrupt index to configure
12593 + * @status:    Returned interrupts status - one bit per cause:
12594 + *                                     0 = no interrupt pending
12595 + *                                     1 = interrupt pending
12596 + *
12597 + * Return:     '0' on Success; Error code otherwise.
12598 + */
12599 +int dpci_get_irq_status(struct fsl_mc_io       *mc_io,
12600 +                       uint32_t                cmd_flags,
12601 +                       uint16_t                token,
12602 +                       uint8_t                 irq_index,
12603 +                       uint32_t                *status);
12604 +
12605 +/**
12606 + * dpci_clear_irq_status() - Clear a pending interrupt's status
12607 + * @mc_io:     Pointer to MC portal's I/O object
12608 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12609 + * @token:     Token of DPCI object
12610 + * @irq_index: The interrupt index to configure
12611 + * @status:    bits to clear (W1C) - one bit per cause:
12612 + *                     0 = don't change
12613 + *                     1 = clear status bit
12614 + *
12615 + * Return:     '0' on Success; Error code otherwise.
12616 + */
12617 +int dpci_clear_irq_status(struct fsl_mc_io     *mc_io,
12618 +                         uint32_t              cmd_flags,
12619 +                         uint16_t              token,
12620 +                         uint8_t               irq_index,
12621 +                         uint32_t              status);
12622 +
12623 +/**
12624 + * struct dpci_attr - Structure representing DPCI attributes
12625 + * @id:                DPCI object ID
12626 + * @version:   DPCI version
12627 + * @num_of_priorities: Number of receive priorities
12628 + */
12629 +struct dpci_attr {
12630 +       int id;
12631 +       /**
12632 +        * struct version - Structure representing DPCI attributes
12633 +        * @major:      DPCI major version
12634 +        * @minor:      DPCI minor version
12635 +        */
12636 +       struct {
12637 +               uint16_t major;
12638 +               uint16_t minor;
12639 +       } version;
12640 +       uint8_t num_of_priorities;
12641 +};
12642 +
12643 +/**
12644 + * dpci_get_attributes() - Retrieve DPCI attributes.
12645 + * @mc_io:     Pointer to MC portal's I/O object
12646 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12647 + * @token:     Token of DPCI object
12648 + * @attr:      Returned object's attributes
12649 + *
12650 + * Return:     '0' on Success; Error code otherwise.
12651 + */
12652 +int dpci_get_attributes(struct fsl_mc_io       *mc_io,
12653 +                       uint32_t                cmd_flags,
12654 +                       uint16_t                token,
12655 +                       struct dpci_attr        *attr);
12656 +
12657 +/**
12658 + * struct dpci_peer_attr - Structure representing the peer DPCI attributes
12659 + * @peer_id:   DPCI peer id; if no peer is connected returns (-1)
12660 + * @num_of_priorities: The pper's number of receive priorities; determines the
12661 + *                     number of transmit priorities for the local DPCI object
12662 + */
12663 +struct dpci_peer_attr {
12664 +       int peer_id;
12665 +       uint8_t num_of_priorities;
12666 +};
12667 +
12668 +/**
12669 + * dpci_get_peer_attributes() - Retrieve peer DPCI attributes.
12670 + * @mc_io:     Pointer to MC portal's I/O object
12671 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12672 + * @token:     Token of DPCI object
12673 + * @attr:      Returned peer attributes
12674 + *
12675 + * Return:     '0' on Success; Error code otherwise.
12676 + */
12677 +int dpci_get_peer_attributes(struct fsl_mc_io          *mc_io,
12678 +                            uint32_t                   cmd_flags,
12679 +                            uint16_t                   token,
12680 +                            struct dpci_peer_attr      *attr);
12681 +
12682 +/**
12683 + * dpci_get_link_state() - Retrieve the DPCI link state.
12684 + * @mc_io:     Pointer to MC portal's I/O object
12685 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12686 + * @token:     Token of DPCI object
12687 + * @up:                Returned link state; returns '1' if link is up, '0' otherwise
12688 + *
12689 + * DPCI can be connected to another DPCI, together they
12690 + * create a 'link'. In order to use the DPCI Tx and Rx queues,
12691 + * both objects must be enabled.
12692 + *
12693 + * Return:     '0' on Success; Error code otherwise.
12694 + */
12695 +int dpci_get_link_state(struct fsl_mc_io *mc_io,
12696 +                       uint32_t        cmd_flags,
12697 +                       uint16_t        token,
12698 +                       int             *up);
12699 +
12700 +/**
12701 + * enum dpci_dest - DPCI destination types
12702 + * @DPCI_DEST_NONE:    Unassigned destination; The queue is set in parked mode
12703 + *                     and does not generate FQDAN notifications; user is
12704 + *                     expected to dequeue from the queue based on polling or
12705 + *                     other user-defined method
12706 + * @DPCI_DEST_DPIO:    The queue is set in schedule mode and generates FQDAN
12707 + *                     notifications to the specified DPIO; user is expected
12708 + *                     to dequeue from the queue only after notification is
12709 + *                     received
12710 + * @DPCI_DEST_DPCON:   The queue is set in schedule mode and does not generate
12711 + *                     FQDAN notifications, but is connected to the specified
12712 + *                     DPCON object;
12713 + *                     user is expected to dequeue from the DPCON channel
12714 + */
12715 +enum dpci_dest {
12716 +       DPCI_DEST_NONE = 0,
12717 +       DPCI_DEST_DPIO = 1,
12718 +       DPCI_DEST_DPCON = 2
12719 +};
12720 +
12721 +/**
12722 + * struct dpci_dest_cfg - Structure representing DPCI destination configuration
12723 + * @dest_type: Destination type
12724 + * @dest_id:   Either DPIO ID or DPCON ID, depending on the destination type
12725 + * @priority:  Priority selection within the DPIO or DPCON channel; valid
12726 + *             values are 0-1 or 0-7, depending on the number of priorities
12727 + *             in that channel; not relevant for 'DPCI_DEST_NONE' option
12728 + */
12729 +struct dpci_dest_cfg {
12730 +       enum dpci_dest dest_type;
12731 +       int dest_id;
12732 +       uint8_t priority;
12733 +};
12734 +
12735 +/** DPCI queue modification options */
12736 +
12737 +/**
12738 + * Select to modify the user's context associated with the queue
12739 + */
12740 +#define DPCI_QUEUE_OPT_USER_CTX                0x00000001
12741 +
12742 +/**
12743 + * Select to modify the queue's destination
12744 + */
12745 +#define DPCI_QUEUE_OPT_DEST            0x00000002
12746 +
12747 +/**
12748 + * struct dpci_rx_queue_cfg - Structure representing RX queue configuration
12749 + * @options:   Flags representing the suggested modifications to the queue;
12750 + *             Use any combination of 'DPCI_QUEUE_OPT_<X>' flags
12751 + * @user_ctx:  User context value provided in the frame descriptor of each
12752 + *             dequeued frame;
12753 + *             valid only if 'DPCI_QUEUE_OPT_USER_CTX' is contained in
12754 + *             'options'
12755 + * @dest_cfg:  Queue destination parameters;
12756 + *             valid only if 'DPCI_QUEUE_OPT_DEST' is contained in 'options'
12757 + */
12758 +struct dpci_rx_queue_cfg {
12759 +       uint32_t options;
12760 +       uint64_t user_ctx;
12761 +       struct dpci_dest_cfg dest_cfg;
12762 +};
12763 +
12764 +/**
12765 + * dpci_set_rx_queue() - Set Rx queue configuration
12766 + * @mc_io:     Pointer to MC portal's I/O object
12767 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12768 + * @token:     Token of DPCI object
12769 + * @priority:  Select the queue relative to number of
12770 + *                     priorities configured at DPCI creation; use
12771 + *                     DPCI_ALL_QUEUES to configure all Rx queues
12772 + *                     identically.
12773 + * @cfg:       Rx queue configuration
12774 + *
12775 + * Return:     '0' on Success; Error code otherwise.
12776 + */
12777 +int dpci_set_rx_queue(struct fsl_mc_io                 *mc_io,
12778 +                     uint32_t                          cmd_flags,
12779 +                     uint16_t                          token,
12780 +                     uint8_t                           priority,
12781 +                     const struct dpci_rx_queue_cfg    *cfg);
12782 +
12783 +/**
12784 + * struct dpci_rx_queue_attr - Structure representing Rx queue attributes
12785 + * @user_ctx:  User context value provided in the frame descriptor of each
12786 + *             dequeued frame
12787 + * @dest_cfg:  Queue destination configuration
12788 + * @fqid:      Virtual FQID value to be used for dequeue operations
12789 + */
12790 +struct dpci_rx_queue_attr {
12791 +       uint64_t                user_ctx;
12792 +       struct dpci_dest_cfg    dest_cfg;
12793 +       uint32_t                fqid;
12794 +};
12795 +
12796 +/**
12797 + * dpci_get_rx_queue() - Retrieve Rx queue attributes.
12798 + * @mc_io:     Pointer to MC portal's I/O object
12799 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12800 + * @token:             Token of DPCI object
12801 + * @priority:          Select the queue relative to number of
12802 + *                     priorities configured at DPCI creation
12803 + * @attr:              Returned Rx queue attributes
12804 + *
12805 + * Return:     '0' on Success; Error code otherwise.
12806 + */
12807 +int dpci_get_rx_queue(struct fsl_mc_io         *mc_io,
12808 +                     uint32_t                  cmd_flags,
12809 +                     uint16_t                  token,
12810 +                     uint8_t                   priority,
12811 +                     struct dpci_rx_queue_attr *attr);
12812 +
12813 +/**
12814 + * struct dpci_tx_queue_attr - Structure representing attributes of Tx queues
12815 + * @fqid:      Virtual FQID to be used for sending frames to peer DPCI;
12816 + *             returns 'DPCI_FQID_NOT_VALID' if a no peer is connected or if
12817 + *             the selected priority exceeds the number of priorities of the
12818 + *             peer DPCI object
12819 + */
12820 +struct dpci_tx_queue_attr {
12821 +       uint32_t fqid;
12822 +};
12823 +
12824 +/**
12825 + * dpci_get_tx_queue() - Retrieve Tx queue attributes.
12826 + * @mc_io:     Pointer to MC portal's I/O object
12827 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12828 + * @token:     Token of DPCI object
12829 + * @priority:  Select the queue relative to number of
12830 + *                             priorities of the peer DPCI object
12831 + * @attr:              Returned Tx queue attributes
12832 + *
12833 + * Return:     '0' on Success; Error code otherwise.
12834 + */
12835 +int dpci_get_tx_queue(struct fsl_mc_io         *mc_io,
12836 +                     uint32_t                  cmd_flags,
12837 +                     uint16_t                  token,
12838 +                     uint8_t                   priority,
12839 +                     struct dpci_tx_queue_attr *attr);
12840 +
12841 +#endif /* __FSL_DPCI_H */
12842 diff --git a/drivers/net/dpaa2/mc/fsl_dpci_cmd.h b/drivers/net/dpaa2/mc/fsl_dpci_cmd.h
12843 new file mode 100644
12844 index 0000000..f45e435
12845 --- /dev/null
12846 +++ b/drivers/net/dpaa2/mc/fsl_dpci_cmd.h
12847 @@ -0,0 +1,200 @@
12848 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
12849 + *
12850 + * Redistribution and use in source and binary forms, with or without
12851 + * modification, are permitted provided that the following conditions are met:
12852 + * * Redistributions of source code must retain the above copyright
12853 + * notice, this list of conditions and the following disclaimer.
12854 + * * Redistributions in binary form must reproduce the above copyright
12855 + * notice, this list of conditions and the following disclaimer in the
12856 + * documentation and/or other materials provided with the distribution.
12857 + * * Neither the name of the above-listed copyright holders nor the
12858 + * names of any contributors may be used to endorse or promote products
12859 + * derived from this software without specific prior written permission.
12860 + *
12861 + *
12862 + * ALTERNATIVELY, this software may be distributed under the terms of the
12863 + * GNU General Public License ("GPL") as published by the Free Software
12864 + * Foundation, either version 2 of that License or (at your option) any
12865 + * later version.
12866 + *
12867 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
12868 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12869 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
12870 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
12871 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
12872 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
12873 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
12874 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
12875 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
12876 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
12877 + * POSSIBILITY OF SUCH DAMAGE.
12878 + */
12879 +#ifndef _FSL_DPCI_CMD_H
12880 +#define _FSL_DPCI_CMD_H
12881 +
12882 +/* DPCI Version */
12883 +#define DPCI_VER_MAJOR                         2
12884 +#define DPCI_VER_MINOR                         2
12885 +
12886 +/* Command IDs */
12887 +#define DPCI_CMDID_CLOSE                               0x800
12888 +#define DPCI_CMDID_OPEN                                        0x807
12889 +#define DPCI_CMDID_CREATE                              0x907
12890 +#define DPCI_CMDID_DESTROY                             0x900
12891 +
12892 +#define DPCI_CMDID_ENABLE                              0x002
12893 +#define DPCI_CMDID_DISABLE                             0x003
12894 +#define DPCI_CMDID_GET_ATTR                            0x004
12895 +#define DPCI_CMDID_RESET                               0x005
12896 +#define DPCI_CMDID_IS_ENABLED                          0x006
12897 +
12898 +#define DPCI_CMDID_SET_IRQ                             0x010
12899 +#define DPCI_CMDID_GET_IRQ                             0x011
12900 +#define DPCI_CMDID_SET_IRQ_ENABLE                      0x012
12901 +#define DPCI_CMDID_GET_IRQ_ENABLE                      0x013
12902 +#define DPCI_CMDID_SET_IRQ_MASK                                0x014
12903 +#define DPCI_CMDID_GET_IRQ_MASK                                0x015
12904 +#define DPCI_CMDID_GET_IRQ_STATUS                      0x016
12905 +#define DPCI_CMDID_CLEAR_IRQ_STATUS                    0x017
12906 +
12907 +#define DPCI_CMDID_SET_RX_QUEUE                                0x0e0
12908 +#define DPCI_CMDID_GET_LINK_STATE                      0x0e1
12909 +#define DPCI_CMDID_GET_PEER_ATTR                       0x0e2
12910 +#define DPCI_CMDID_GET_RX_QUEUE                                0x0e3
12911 +#define DPCI_CMDID_GET_TX_QUEUE                                0x0e4
12912 +
12913 +/*                cmd, param, offset, width, type, arg_name */
12914 +#define DPCI_CMD_OPEN(cmd, dpci_id) \
12915 +       MC_CMD_OP(cmd, 0, 0, 32, int,       dpci_id)
12916 +
12917 +/*                cmd, param, offset, width, type, arg_name */
12918 +#define DPCI_CMD_CREATE(cmd, cfg) \
12919 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->num_of_priorities)
12920 +
12921 +/*                cmd, param, offset, width, type, arg_name */
12922 +#define DPCI_RSP_IS_ENABLED(cmd, en) \
12923 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
12924 +
12925 +/*                cmd, param, offset, width, type, arg_name */
12926 +#define DPCI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
12927 +do { \
12928 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
12929 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
12930 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
12931 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
12932 +} while (0)
12933 +
12934 +/*                cmd, param, offset, width, type, arg_name */
12935 +#define DPCI_CMD_GET_IRQ(cmd, irq_index) \
12936 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
12937 +
12938 +/*                cmd, param, offset, width, type, arg_name */
12939 +#define DPCI_RSP_GET_IRQ(cmd, type, irq_cfg) \
12940 +do { \
12941 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
12942 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
12943 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
12944 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
12945 +} while (0)
12946 +
12947 +/*                cmd, param, offset, width, type, arg_name */
12948 +#define DPCI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
12949 +do { \
12950 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
12951 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12952 +} while (0)
12953 +
12954 +/*                cmd, param, offset, width, type, arg_name */
12955 +#define DPCI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
12956 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
12957 +
12958 +/*                cmd, param, offset, width, type, arg_name */
12959 +#define DPCI_RSP_GET_IRQ_ENABLE(cmd, en) \
12960 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
12961 +
12962 +/*                cmd, param, offset, width, type, arg_name */
12963 +#define DPCI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
12964 +do { \
12965 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
12966 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12967 +} while (0)
12968 +
12969 +/*                cmd, param, offset, width, type, arg_name */
12970 +#define DPCI_CMD_GET_IRQ_MASK(cmd, irq_index) \
12971 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
12972 +
12973 +/*                cmd, param, offset, width, type, arg_name */
12974 +#define DPCI_RSP_GET_IRQ_MASK(cmd, mask) \
12975 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
12976 +
12977 +/*                cmd, param, offset, width, type, arg_name */
12978 +#define DPCI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
12979 +do { \
12980 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
12981 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12982 +} while (0)
12983 +/*                cmd, param, offset, width, type, arg_name */
12984 +#define DPCI_RSP_GET_IRQ_STATUS(cmd, status) \
12985 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
12986 +
12987 +/*                cmd, param, offset, width, type, arg_name */
12988 +#define DPCI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
12989 +do { \
12990 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
12991 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
12992 +} while (0)
12993 +
12994 +/*                cmd, param, offset, width, type, arg_name */
12995 +#define DPCI_RSP_GET_ATTR(cmd, attr) \
12996 +do { \
12997 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id);\
12998 +       MC_RSP_OP(cmd, 0, 48, 8,  uint8_t,  attr->num_of_priorities);\
12999 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
13000 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
13001 +} while (0)
13002 +
13003 +/*                cmd, param, offset, width, type, arg_name */
13004 +#define DPCI_RSP_GET_PEER_ATTR(cmd, attr) \
13005 +do { \
13006 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->peer_id);\
13007 +       MC_RSP_OP(cmd, 1, 0,  8,  uint8_t,  attr->num_of_priorities);\
13008 +} while (0)
13009 +
13010 +/*                cmd, param, offset, width, type, arg_name */
13011 +#define DPCI_RSP_GET_LINK_STATE(cmd, up) \
13012 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      up)
13013 +
13014 +/*                cmd, param, offset, width, type, arg_name */
13015 +#define DPCI_CMD_SET_RX_QUEUE(cmd, priority, cfg) \
13016 +do { \
13017 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dest_cfg.dest_id);\
13018 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dest_cfg.priority);\
13019 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  priority);\
13020 +       MC_CMD_OP(cmd, 0, 48, 4,  enum dpci_dest, cfg->dest_cfg.dest_type);\
13021 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx);\
13022 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->options);\
13023 +} while (0)
13024 +
13025 +/*                cmd, param, offset, width, type, arg_name */
13026 +#define DPCI_CMD_GET_RX_QUEUE(cmd, priority) \
13027 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  priority)
13028 +
13029 +/*                cmd, param, offset, width, type, arg_name */
13030 +#define DPCI_RSP_GET_RX_QUEUE(cmd, attr) \
13031 +do { \
13032 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->dest_cfg.dest_id);\
13033 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->dest_cfg.priority);\
13034 +       MC_RSP_OP(cmd, 0, 48, 4,  enum dpci_dest, attr->dest_cfg.dest_type);\
13035 +       MC_RSP_OP(cmd, 1, 0,  8,  uint64_t,  attr->user_ctx);\
13036 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t,  attr->fqid);\
13037 +} while (0)
13038 +
13039 +/*                cmd, param, offset, width, type, arg_name */
13040 +#define DPCI_CMD_GET_TX_QUEUE(cmd, priority) \
13041 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  priority)
13042 +
13043 +/*                cmd, param, offset, width, type, arg_name */
13044 +#define DPCI_RSP_GET_TX_QUEUE(cmd, attr) \
13045 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t,  attr->fqid)
13046 +
13047 +#endif /* _FSL_DPCI_CMD_H */
13048 diff --git a/drivers/net/dpaa2/mc/fsl_dpcon.h b/drivers/net/dpaa2/mc/fsl_dpcon.h
13049 new file mode 100644
13050 index 0000000..2555be5
13051 --- /dev/null
13052 +++ b/drivers/net/dpaa2/mc/fsl_dpcon.h
13053 @@ -0,0 +1,407 @@
13054 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
13055 + *
13056 + * Redistribution and use in source and binary forms, with or without
13057 + * modification, are permitted provided that the following conditions are met:
13058 + * * Redistributions of source code must retain the above copyright
13059 + * notice, this list of conditions and the following disclaimer.
13060 + * * Redistributions in binary form must reproduce the above copyright
13061 + * notice, this list of conditions and the following disclaimer in the
13062 + * documentation and/or other materials provided with the distribution.
13063 + * * Neither the name of the above-listed copyright holders nor the
13064 + * names of any contributors may be used to endorse or promote products
13065 + * derived from this software without specific prior written permission.
13066 + *
13067 + *
13068 + * ALTERNATIVELY, this software may be distributed under the terms of the
13069 + * GNU General Public License ("GPL") as published by the Free Software
13070 + * Foundation, either version 2 of that License or (at your option) any
13071 + * later version.
13072 + *
13073 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
13074 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
13075 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13076 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
13077 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
13078 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
13079 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
13080 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
13081 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
13082 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
13083 + * POSSIBILITY OF SUCH DAMAGE.
13084 + */
13085 +#ifndef __FSL_DPCON_H
13086 +#define __FSL_DPCON_H
13087 +
13088 +/* Data Path Concentrator API
13089 + * Contains initialization APIs and runtime control APIs for DPCON
13090 + */
13091 +
13092 +struct fsl_mc_io;
13093 +
13094 +/** General DPCON macros */
13095 +
13096 +/**
13097 + * Use it to disable notifications; see dpcon_set_notification()
13098 + */
13099 +#define DPCON_INVALID_DPIO_ID          (int)(-1)
13100 +
13101 +/**
13102 + * dpcon_open() - Open a control session for the specified object
13103 + * @mc_io:     Pointer to MC portal's I/O object
13104 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13105 + * @dpcon_id:  DPCON unique ID
13106 + * @token:     Returned token; use in subsequent API calls
13107 + *
13108 + * This function can be used to open a control session for an
13109 + * already created object; an object may have been declared in
13110 + * the DPL or by calling the dpcon_create() function.
13111 + * This function returns a unique authentication token,
13112 + * associated with the specific object ID and the specific MC
13113 + * portal; this token must be used in all subsequent commands for
13114 + * this specific object.
13115 + *
13116 + * Return:     '0' on Success; Error code otherwise.
13117 + */
13118 +int dpcon_open(struct fsl_mc_io *mc_io,
13119 +              uint32_t cmd_flags,
13120 +              int              dpcon_id,
13121 +              uint16_t *token);
13122 +
13123 +/**
13124 + * dpcon_close() - Close the control session of the object
13125 + * @mc_io:     Pointer to MC portal's I/O object
13126 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13127 + * @token:     Token of DPCON object
13128 + *
13129 + * After this function is called, no further operations are
13130 + * allowed on the object without opening a new control session.
13131 + *
13132 + * Return:     '0' on Success; Error code otherwise.
13133 + */
13134 +int dpcon_close(struct fsl_mc_io *mc_io,
13135 +               uint32_t        cmd_flags,
13136 +               uint16_t        token);
13137 +
13138 +/**
13139 + * struct dpcon_cfg - Structure representing DPCON configuration
13140 + * @num_priorities: Number of priorities for the DPCON channel (1-8)
13141 + */
13142 +struct dpcon_cfg {
13143 +       uint8_t num_priorities;
13144 +};
13145 +
13146 +/**
13147 + * dpcon_create() - Create the DPCON object.
13148 + * @mc_io:     Pointer to MC portal's I/O object
13149 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13150 + * @cfg:       Configuration structure
13151 + * @token:     Returned token; use in subsequent API calls
13152 + *
13153 + * Create the DPCON object, allocate required resources and
13154 + * perform required initialization.
13155 + *
13156 + * The object can be created either by declaring it in the
13157 + * DPL file, or by calling this function.
13158 + *
13159 + * This function returns a unique authentication token,
13160 + * associated with the specific object ID and the specific MC
13161 + * portal; this token must be used in all subsequent calls to
13162 + * this specific object. For objects that are created using the
13163 + * DPL file, call dpcon_open() function to get an authentication
13164 + * token first.
13165 + *
13166 + * Return:     '0' on Success; Error code otherwise.
13167 + */
13168 +int dpcon_create(struct fsl_mc_io      *mc_io,
13169 +                uint32_t               cmd_flags,
13170 +                const struct dpcon_cfg *cfg,
13171 +                uint16_t               *token);
13172 +
13173 +/**
13174 + * dpcon_destroy() - Destroy the DPCON object and release all its resources.
13175 + * @mc_io:     Pointer to MC portal's I/O object
13176 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13177 + * @token:     Token of DPCON object
13178 + *
13179 + * Return:     '0' on Success; error code otherwise.
13180 + */
13181 +int dpcon_destroy(struct fsl_mc_io     *mc_io,
13182 +                 uint32_t              cmd_flags,
13183 +                 uint16_t              token);
13184 +
13185 +/**
13186 + * dpcon_enable() - Enable the DPCON
13187 + * @mc_io:     Pointer to MC portal's I/O object
13188 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13189 + * @token:     Token of DPCON object
13190 + *
13191 + * Return:     '0' on Success; Error code otherwise
13192 + */
13193 +int dpcon_enable(struct fsl_mc_io      *mc_io,
13194 +                uint32_t               cmd_flags,
13195 +                uint16_t               token);
13196 +
13197 +/**
13198 + * dpcon_disable() - Disable the DPCON
13199 + * @mc_io:     Pointer to MC portal's I/O object
13200 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13201 + * @token:     Token of DPCON object
13202 + *
13203 + * Return:     '0' on Success; Error code otherwise
13204 + */
13205 +int dpcon_disable(struct fsl_mc_io     *mc_io,
13206 +                 uint32_t              cmd_flags,
13207 +                 uint16_t              token);
13208 +
13209 +/**
13210 + * dpcon_is_enabled() -        Check if the DPCON is enabled.
13211 + * @mc_io:     Pointer to MC portal's I/O object
13212 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13213 + * @token:     Token of DPCON object
13214 + * @en:                Returns '1' if object is enabled; '0' otherwise
13215 + *
13216 + * Return:     '0' on Success; Error code otherwise.
13217 + */
13218 +int dpcon_is_enabled(struct fsl_mc_io  *mc_io,
13219 +                    uint32_t           cmd_flags,
13220 +                    uint16_t           token,
13221 +                    int                *en);
13222 +
13223 +/**
13224 + * dpcon_reset() - Reset the DPCON, returns the object to initial state.
13225 + * @mc_io:     Pointer to MC portal's I/O object
13226 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13227 + * @token:     Token of DPCON object
13228 + *
13229 + * Return:     '0' on Success; Error code otherwise.
13230 + */
13231 +int dpcon_reset(struct fsl_mc_io       *mc_io,
13232 +               uint32_t                cmd_flags,
13233 +               uint16_t                token);
13234 +
13235 +/**
13236 + * struct dpcon_irq_cfg - IRQ configuration
13237 + * @addr:      Address that must be written to signal a message-based interrupt
13238 + * @val:       Value to write into irq_addr address
13239 + * @irq_num: A user defined number associated with this IRQ
13240 + */
13241 +struct dpcon_irq_cfg {
13242 +            uint64_t           addr;
13243 +            uint32_t           val;
13244 +            int                irq_num;
13245 +};
13246 +
13247 +/**
13248 + * dpcon_set_irq() - Set IRQ information for the DPCON to trigger an interrupt.
13249 + * @mc_io:     Pointer to MC portal's I/O object
13250 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13251 + * @token:     Token of DPCON object
13252 + * @irq_index: Identifies the interrupt index to configure
13253 + * @irq_cfg:   IRQ configuration
13254 + * Return:     '0' on Success; Error code otherwise.
13255 + */
13256 +int dpcon_set_irq(struct fsl_mc_io     *mc_io,
13257 +                 uint32_t              cmd_flags,
13258 +                 uint16_t              token,
13259 +                 uint8_t               irq_index,
13260 +                 struct dpcon_irq_cfg  *irq_cfg);
13261 +
13262 +/**
13263 + * dpcon_get_irq() - Get IRQ information from the DPCON.
13264 + *
13265 + * @mc_io:     Pointer to MC portal's I/O object
13266 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13267 + * @token:     Token of DPCON object
13268 + * @irq_index: The interrupt index to configure
13269 + * @type:      Interrupt type: 0 represents message interrupt
13270 + *             type (both irq_addr and irq_val are valid)
13271 + * @irq_cfg:   IRQ attributes
13272 + *
13273 + * Return:     '0' on Success; Error code otherwise.
13274 + */
13275 +int dpcon_get_irq(struct fsl_mc_io     *mc_io,
13276 +                 uint32_t              cmd_flags,
13277 +                 uint16_t              token,
13278 +                 uint8_t               irq_index,
13279 +                 int                   *type,
13280 +                 struct dpcon_irq_cfg  *irq_cfg);
13281 +
13282 +/**
13283 + * dpcon_set_irq_enable() - Set overall interrupt state.
13284 + * @mc_io:     Pointer to MC portal's I/O object
13285 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13286 + * @token:     Token of DPCON object
13287 + * @irq_index: The interrupt index to configure
13288 + * @en:                Interrupt state - enable = 1, disable = 0
13289 + *
13290 + * Allows GPP software to control when interrupts are generated.
13291 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
13292 + * overall interrupt state. if the interrupt is disabled no causes will cause
13293 + * an interrupt.
13294 + *
13295 + * Return:     '0' on Success; Error code otherwise.
13296 + */
13297 +int dpcon_set_irq_enable(struct fsl_mc_io      *mc_io,
13298 +                        uint32_t               cmd_flags,
13299 +                        uint16_t               token,
13300 +                        uint8_t                irq_index,
13301 +                        uint8_t                en);
13302 +
13303 +/**
13304 + * dpcon_get_irq_enable() - Get overall interrupt state.
13305 + * @mc_io:     Pointer to MC portal's I/O object
13306 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13307 + * @token:     Token of DPCON object
13308 + * @irq_index: The interrupt index to configure
13309 + * @en:                Returned interrupt state - enable = 1, disable = 0
13310 + *
13311 + * Return:     '0' on Success; Error code otherwise.
13312 + */
13313 +int dpcon_get_irq_enable(struct fsl_mc_io      *mc_io,
13314 +                        uint32_t               cmd_flags,
13315 +                        uint16_t               token,
13316 +                        uint8_t                irq_index,
13317 +                        uint8_t                *en);
13318 +
13319 +/**
13320 + * dpcon_set_irq_mask() - Set interrupt mask.
13321 + * @mc_io:     Pointer to MC portal's I/O object
13322 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13323 + * @token:     Token of DPCON object
13324 + * @irq_index: The interrupt index to configure
13325 + * @mask:      Event mask to trigger interrupt;
13326 + *                             each bit:
13327 + *                                     0 = ignore event
13328 + *                                     1 = consider event for asserting IRQ
13329 + *
13330 + * Every interrupt can have up to 32 causes and the interrupt model supports
13331 + * masking/unmasking each cause independently
13332 + *
13333 + * Return:     '0' on Success; Error code otherwise.
13334 + */
13335 +int dpcon_set_irq_mask(struct fsl_mc_io *mc_io,
13336 +                      uint32_t cmd_flags,
13337 +                      uint16_t         token,
13338 +                      uint8_t          irq_index,
13339 +                      uint32_t         mask);
13340 +
13341 +/**
13342 + * dpcon_get_irq_mask() - Get interrupt mask.
13343 + * @mc_io:     Pointer to MC portal's I/O object
13344 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13345 + * @token:     Token of DPCON object
13346 + * @irq_index: The interrupt index to configure
13347 + * @mask:      Returned event mask to trigger interrupt
13348 + *
13349 + * Every interrupt can have up to 32 causes and the interrupt model supports
13350 + * masking/unmasking each cause independently
13351 + *
13352 + * Return:     '0' on Success; Error code otherwise.
13353 + */
13354 +int dpcon_get_irq_mask(struct fsl_mc_io *mc_io,
13355 +                      uint32_t cmd_flags,
13356 +                      uint16_t         token,
13357 +                      uint8_t          irq_index,
13358 +                      uint32_t         *mask);
13359 +
13360 +/**
13361 + * dpcon_get_irq_status() - Get the current status of any pending interrupts.
13362 + * @mc_io:     Pointer to MC portal's I/O object
13363 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13364 + * @token:     Token of DPCON object
13365 + * @irq_index: The interrupt index to configure
13366 + * @status:    interrupts status - one bit per cause:
13367 + *                     0 = no interrupt pending
13368 + *                     1 = interrupt pending
13369 + *
13370 + * Return:     '0' on Success; Error code otherwise.
13371 + */
13372 +int dpcon_get_irq_status(struct fsl_mc_io      *mc_io,
13373 +                        uint32_t               cmd_flags,
13374 +                        uint16_t               token,
13375 +                        uint8_t                irq_index,
13376 +                        uint32_t               *status);
13377 +
13378 +/**
13379 + * dpcon_clear_irq_status() - Clear a pending interrupt's status
13380 + * @mc_io:     Pointer to MC portal's I/O object
13381 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13382 + * @token:     Token of DPCON object
13383 + * @irq_index: The interrupt index to configure
13384 + * @status:    bits to clear (W1C) - one bit per cause:
13385 + *                     0 = don't change
13386 + *                     1 = clear status bit
13387 + *
13388 + * Return:     '0' on Success; Error code otherwise.
13389 + */
13390 +int dpcon_clear_irq_status(struct fsl_mc_io    *mc_io,
13391 +                          uint32_t             cmd_flags,
13392 +                          uint16_t             token,
13393 +                          uint8_t              irq_index,
13394 +                          uint32_t             status);
13395 +
13396 +/**
13397 + * struct dpcon_attr - Structure representing DPCON attributes
13398 + * @id: DPCON object ID
13399 + * @version: DPCON version
13400 + * @qbman_ch_id: Channel ID to be used by dequeue operation
13401 + * @num_priorities: Number of priorities for the DPCON channel (1-8)
13402 + */
13403 +struct dpcon_attr {
13404 +       int id;
13405 +       /**
13406 +        * struct version - DPCON version
13407 +        * @major: DPCON major version
13408 +        * @minor: DPCON minor version
13409 +        */
13410 +       struct {
13411 +               uint16_t major;
13412 +               uint16_t minor;
13413 +       } version;
13414 +       uint16_t qbman_ch_id;
13415 +       uint8_t num_priorities;
13416 +};
13417 +
13418 +/**
13419 + * dpcon_get_attributes() - Retrieve DPCON attributes.
13420 + * @mc_io:     Pointer to MC portal's I/O object
13421 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13422 + * @token:     Token of DPCON object
13423 + * @attr:      Object's attributes
13424 + *
13425 + * Return:     '0' on Success; Error code otherwise.
13426 + */
13427 +int dpcon_get_attributes(struct fsl_mc_io      *mc_io,
13428 +                        uint32_t               cmd_flags,
13429 +                        uint16_t               token,
13430 +                        struct dpcon_attr      *attr);
13431 +
13432 +/**
13433 + * struct dpcon_notification_cfg - Structure representing notification parameters
13434 + * @dpio_id:   DPIO object ID; must be configured with a notification channel;
13435 + *     to disable notifications set it to 'DPCON_INVALID_DPIO_ID';
13436 + * @priority:  Priority selection within the DPIO channel; valid values
13437 + *             are 0-7, depending on the number of priorities in that channel
13438 + * @user_ctx:  User context value provided with each CDAN message
13439 + */
13440 +struct dpcon_notification_cfg {
13441 +       int             dpio_id;
13442 +       uint8_t priority;
13443 +       uint64_t        user_ctx;
13444 +};
13445 +
13446 +/**
13447 + * dpcon_set_notification() - Set DPCON notification destination
13448 + * @mc_io:     Pointer to MC portal's I/O object
13449 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13450 + * @token:     Token of DPCON object
13451 + * @cfg:       Notification parameters
13452 + *
13453 + * Return:     '0' on Success; Error code otherwise
13454 + */
13455 +int dpcon_set_notification(struct fsl_mc_io                    *mc_io,
13456 +                          uint32_t                             cmd_flags,
13457 +                          uint16_t                             token,
13458 +                          struct dpcon_notification_cfg        *cfg);
13459 +
13460 +#endif /* __FSL_DPCON_H */
13461 diff --git a/drivers/net/dpaa2/mc/fsl_dpcon_cmd.h b/drivers/net/dpaa2/mc/fsl_dpcon_cmd.h
13462 new file mode 100644
13463 index 0000000..ecb40d0
13464 --- /dev/null
13465 +++ b/drivers/net/dpaa2/mc/fsl_dpcon_cmd.h
13466 @@ -0,0 +1,162 @@
13467 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
13468 + *
13469 + * Redistribution and use in source and binary forms, with or without
13470 + * modification, are permitted provided that the following conditions are met:
13471 + * * Redistributions of source code must retain the above copyright
13472 + * notice, this list of conditions and the following disclaimer.
13473 + * * Redistributions in binary form must reproduce the above copyright
13474 + * notice, this list of conditions and the following disclaimer in the
13475 + * documentation and/or other materials provided with the distribution.
13476 + * * Neither the name of the above-listed copyright holders nor the
13477 + * names of any contributors may be used to endorse or promote products
13478 + * derived from this software without specific prior written permission.
13479 + *
13480 + *
13481 + * ALTERNATIVELY, this software may be distributed under the terms of the
13482 + * GNU General Public License ("GPL") as published by the Free Software
13483 + * Foundation, either version 2 of that License or (at your option) any
13484 + * later version.
13485 + *
13486 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
13487 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
13488 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13489 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
13490 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
13491 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
13492 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
13493 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
13494 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
13495 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
13496 + * POSSIBILITY OF SUCH DAMAGE.
13497 + */
13498 +#ifndef _FSL_DPCON_CMD_H
13499 +#define _FSL_DPCON_CMD_H
13500 +
13501 +/* DPCON Version */
13502 +#define DPCON_VER_MAJOR                                2
13503 +#define DPCON_VER_MINOR                                2
13504 +
13505 +/* Command IDs */
13506 +#define DPCON_CMDID_CLOSE                              0x800
13507 +#define DPCON_CMDID_OPEN                               0x808
13508 +#define DPCON_CMDID_CREATE                             0x908
13509 +#define DPCON_CMDID_DESTROY                            0x900
13510 +
13511 +#define DPCON_CMDID_ENABLE                             0x002
13512 +#define DPCON_CMDID_DISABLE                            0x003
13513 +#define DPCON_CMDID_GET_ATTR                           0x004
13514 +#define DPCON_CMDID_RESET                              0x005
13515 +#define DPCON_CMDID_IS_ENABLED                         0x006
13516 +
13517 +#define DPCON_CMDID_SET_IRQ                            0x010
13518 +#define DPCON_CMDID_GET_IRQ                            0x011
13519 +#define DPCON_CMDID_SET_IRQ_ENABLE                     0x012
13520 +#define DPCON_CMDID_GET_IRQ_ENABLE                     0x013
13521 +#define DPCON_CMDID_SET_IRQ_MASK                       0x014
13522 +#define DPCON_CMDID_GET_IRQ_MASK                       0x015
13523 +#define DPCON_CMDID_GET_IRQ_STATUS                     0x016
13524 +#define DPCON_CMDID_CLEAR_IRQ_STATUS                   0x017
13525 +
13526 +#define DPCON_CMDID_SET_NOTIFICATION                   0x100
13527 +
13528 +/*                cmd, param, offset, width, type, arg_name */
13529 +#define DPCON_CMD_OPEN(cmd, dpcon_id) \
13530 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpcon_id)
13531 +
13532 +/*                cmd, param, offset, width, type, arg_name */
13533 +#define DPCON_CMD_CREATE(cmd, cfg) \
13534 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->num_priorities)
13535 +
13536 +/*                cmd, param, offset, width, type, arg_name */
13537 +#define DPCON_RSP_IS_ENABLED(cmd, en) \
13538 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
13539 +
13540 +/*                cmd, param, offset, width, type, arg_name */
13541 +#define DPCON_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
13542 +do { \
13543 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
13544 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
13545 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
13546 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
13547 +} while (0)
13548 +
13549 +/*                cmd, param, offset, width, type, arg_name */
13550 +#define DPCON_CMD_GET_IRQ(cmd, irq_index) \
13551 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
13552 +
13553 +/*                cmd, param, offset, width, type, arg_name */
13554 +#define DPCON_RSP_GET_IRQ(cmd, type, irq_cfg) \
13555 +do { \
13556 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val);\
13557 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
13558 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
13559 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type);\
13560 +} while (0)
13561 +
13562 +/*                cmd, param, offset, width, type, arg_name */
13563 +#define DPCON_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
13564 +do { \
13565 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
13566 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
13567 +} while (0)
13568 +
13569 +/*                cmd, param, offset, width, type, arg_name */
13570 +#define DPCON_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
13571 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
13572 +
13573 +/*                cmd, param, offset, width, type, arg_name */
13574 +#define DPCON_RSP_GET_IRQ_ENABLE(cmd, en) \
13575 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
13576 +
13577 +/*                cmd, param, offset, width, type, arg_name */
13578 +#define DPCON_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
13579 +do { \
13580 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
13581 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
13582 +} while (0)
13583 +
13584 +/*                cmd, param, offset, width, type, arg_name */
13585 +#define DPCON_CMD_GET_IRQ_MASK(cmd, irq_index) \
13586 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
13587 +
13588 +/*                cmd, param, offset, width, type, arg_name */
13589 +#define DPCON_RSP_GET_IRQ_MASK(cmd, mask) \
13590 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
13591 +
13592 +/*                cmd, param, offset, width, type, arg_name */
13593 +#define DPCON_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
13594 +do { \
13595 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
13596 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
13597 +} while (0)
13598 +
13599 +/*                cmd, param, offset, width, type, arg_name */
13600 +#define DPCON_RSP_GET_IRQ_STATUS(cmd, status) \
13601 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
13602 +
13603 +/*                cmd, param, offset, width, type, arg_name */
13604 +#define DPCON_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
13605 +do { \
13606 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
13607 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
13608 +} while (0)
13609 +
13610 +/*                cmd, param, offset, width, type, arg_name */
13611 +#define DPCON_RSP_GET_ATTR(cmd, attr) \
13612 +do { \
13613 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id);\
13614 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->qbman_ch_id);\
13615 +       MC_RSP_OP(cmd, 0, 48, 8,  uint8_t,  attr->num_priorities);\
13616 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
13617 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
13618 +} while (0)
13619 +
13620 +/*                cmd, param, offset, width, type, arg_name */
13621 +#define DPCON_CMD_SET_NOTIFICATION(cmd, cfg) \
13622 +do { \
13623 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dpio_id);\
13624 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->priority);\
13625 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx);\
13626 +} while (0)
13627 +
13628 +#endif /* _FSL_DPCON_CMD_H */
13629 diff --git a/drivers/net/dpaa2/mc/fsl_dpdbg.h b/drivers/net/dpaa2/mc/fsl_dpdbg.h
13630 new file mode 100644
13631 index 0000000..ead22e8
13632 --- /dev/null
13633 +++ b/drivers/net/dpaa2/mc/fsl_dpdbg.h
13634 @@ -0,0 +1,635 @@
13635 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
13636 + *
13637 + * Redistribution and use in source and binary forms, with or without
13638 + * modification, are permitted provided that the following conditions are met:
13639 + * * Redistributions of source code must retain the above copyright
13640 + * notice, this list of conditions and the following disclaimer.
13641 + * * Redistributions in binary form must reproduce the above copyright
13642 + * notice, this list of conditions and the following disclaimer in the
13643 + * documentation and/or other materials provided with the distribution.
13644 + * * Neither the name of the above-listed copyright holders nor the
13645 + * names of any contributors may be used to endorse or promote products
13646 + * derived from this software without specific prior written permission.
13647 + *
13648 + *
13649 + * ALTERNATIVELY, this software may be distributed under the terms of the
13650 + * GNU General Public License ("GPL") as published by the Free Software
13651 + * Foundation, either version 2 of that License or (at your option) any
13652 + * later version.
13653 + *
13654 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
13655 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
13656 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13657 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
13658 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
13659 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
13660 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
13661 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
13662 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
13663 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
13664 + * POSSIBILITY OF SUCH DAMAGE.
13665 + */
13666 +#ifndef __FSL_DPDBG_H
13667 +#define __FSL_DPDBG_H
13668 +
13669 +#include <fsl_dpkg.h>
13670 +#include <fsl_dpmac.h>
13671 +#include <fsl_dpni.h>
13672 +
13673 +/* Data Path Debug API
13674 + * Contains initialization APIs and runtime control APIs for DPDBG
13675 + */
13676 +
13677 +struct fsl_mc_io;
13678 +
13679 +/**
13680 + * dpdbg_open() - Open a control session for the specified object.
13681 + * @mc_io:     Pointer to MC portal's I/O object
13682 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13683 + * @dpdbg_id:  DPDBG unique ID
13684 + * @token:     Returned token; use in subsequent API calls
13685 + *
13686 + * This function can be used to open a control session for an
13687 + * already created object;
13688 + * This function returns a unique authentication token,
13689 + * associated with the specific object ID and the specific MC
13690 + * portal; this token must be used in all subsequent commands for
13691 + * this specific object
13692 + *
13693 + * Return:     '0' on Success; Error code otherwise.
13694 + */
13695 +int dpdbg_open(struct fsl_mc_io *mc_io,
13696 +              uint32_t cmd_flags,
13697 +              int              dpdbg_id,
13698 +              uint16_t *token);
13699 +
13700 +/**
13701 + * dpdbg_close() - Close the control session of the object
13702 + * @mc_io:     Pointer to MC portal's I/O object
13703 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13704 + * @token:     Token of DPDBG object
13705 + *
13706 + * After this function is called, no further operations are
13707 + * allowed on the object without opening a new control session.
13708 + *
13709 + * Return:     '0' on Success; Error code otherwise.
13710 + */
13711 +int dpdbg_close(struct fsl_mc_io       *mc_io,
13712 +               uint32_t                cmd_flags,
13713 +               uint16_t                token);
13714 +
13715 +/**
13716 + * struct dpdbg_attr - Structure representing DPDBG attributes
13717 + * @id:                DPDBG object ID
13718 + * @version:   DPDBG version
13719 + */
13720 +struct dpdbg_attr {
13721 +       int id;
13722 +       /**
13723 +        * struct version - Structure representing DPDBG version
13724 +        * @major:      DPDBG major version
13725 +        * @minor:      DPDBG minor version
13726 +        */
13727 +       struct {
13728 +               uint16_t major;
13729 +               uint16_t minor;
13730 +       } version;
13731 +};
13732 +
13733 +/**
13734 + * dpdbg_get_attributes - Retrieve DPDBG attributes.
13735 + * @mc_io:     Pointer to MC portal's I/O object
13736 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13737 + * @token:     Token of DPDBG object
13738 + * @attr:      Returned object's attributes
13739 + *
13740 + * Return:     '0' on Success; Error code otherwise.
13741 + */
13742 +int dpdbg_get_attributes(struct fsl_mc_io      *mc_io,
13743 +                        uint32_t               cmd_flags,
13744 +                        uint16_t               token,
13745 +                        struct dpdbg_attr      *attr);
13746 +
13747 +/**
13748 + * struct dpdbg_dpni_info - Info of DPNI
13749 + * @max_senders: Maximum number of different senders; used as the number
13750 + *             of dedicated Tx flows; Non-power-of-2 values are rounded
13751 + *             up to the next power-of-2 value as hardware demands it;
13752 + *             '0' will be treated as '1'
13753 + * @qdid: Virtual QDID.
13754 + * @err_fqid: Virtual FQID for error queues
13755 + * @tx_conf_fqid: Virtual FQID for global TX confirmation queue
13756 + */
13757 +struct dpdbg_dpni_info {
13758 +       uint8_t max_senders;
13759 +       uint32_t        qdid;
13760 +       uint32_t        err_fqid;
13761 +       uint32_t        tx_conf_fqid;
13762 +};
13763 +
13764 +/**
13765 + * dpdbg_get_dpni_info() - Retrieve info for a specific DPNI
13766 + * @mc_io:     Pointer to MC portal's I/O object
13767 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13768 + * @token:     Token of DPDBG object
13769 + * @dpni_id:   The requested DPNI ID
13770 + * @info:      The returned info
13771 + *
13772 + * Return:     '0' on Success; Error code otherwise.
13773 + */
13774 +int dpdbg_get_dpni_info(struct fsl_mc_io       *mc_io,
13775 +                       uint32_t                cmd_flags,
13776 +                       uint16_t                token,
13777 +                       int                     dpni_id,
13778 +                       struct dpdbg_dpni_info  *info);
13779 +
13780 +/**
13781 + * dpdbg_get_dpni_private_fqid() - Retrieve the virtual TX confirmation queue
13782 + *                                     FQID of the required DPNI
13783 + * @mc_io:     Pointer to MC portal's I/O object
13784 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13785 + * @token:     Token of DPDBG object
13786 + * @dpni_id:   The requested DPNI ID
13787 + * @sender_id: The requested sender ID
13788 + * @fqid:      The returned virtual private TX confirmation FQID.
13789 + *
13790 + * Return:     '0' on Success; Error code otherwise.
13791 + */
13792 +int dpdbg_get_dpni_priv_tx_conf_fqid(struct fsl_mc_io  *mc_io,
13793 +                                    uint32_t           cmd_flags,
13794 +                                    uint16_t           token,
13795 +                                    int                dpni_id,
13796 +                                    uint8_t            sender_id,
13797 +                                    uint32_t           *fqid);
13798 +
13799 +/**
13800 + * struct dpdbg_dpcon_info - Info of DPCON
13801 + * @ch_id:     Channel ID
13802 + */
13803 +struct dpdbg_dpcon_info {
13804 +       uint32_t        ch_id;
13805 +};
13806 +
13807 +/**
13808 + * dpdbg_get_dpcon_info() - Retrieve info of DPCON
13809 + * @mc_io:     Pointer to MC portal's I/O object
13810 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13811 + * @token:     Token of DPDBG object
13812 + * @dpcon_id:  The requested DPCON ID
13813 + * @info:      The returned info.
13814 + *
13815 + * Return:     '0' on Success; Error code otherwise.
13816 + */
13817 +int dpdbg_get_dpcon_info(struct fsl_mc_io              *mc_io,
13818 +                        uint32_t               cmd_flags,
13819 +                        uint16_t                       token,
13820 +                        int                            dpcon_id,
13821 +                        struct dpdbg_dpcon_info        *info);
13822 +
13823 +/**
13824 + * struct dpdbg_dpbp_info - Info of DPBP
13825 + * @bpid: Virtual buffer pool ID
13826 + */
13827 +struct dpdbg_dpbp_info {
13828 +       uint32_t        bpid;
13829 +};
13830 +
13831 +/**
13832 + * dpdbg_get_dpbp_info() - Retrieve info of DPBP
13833 + * @mc_io:     Pointer to MC portal's I/O object
13834 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13835 + * @token:     Token of DPDBG object
13836 + * @dpbp_id:   The requested DPBP ID
13837 + * @info:      The returned info.
13838 + *
13839 + * Return:     '0' on Success; Error code otherwise.
13840 + */
13841 +int dpdbg_get_dpbp_info(struct fsl_mc_io               *mc_io,
13842 +                       uint32_t                        cmd_flags,
13843 +                       uint16_t                        token,
13844 +                       int                             dpbp_id,
13845 +                       struct dpdbg_dpbp_info          *info);
13846 +
13847 +/**
13848 + * dpdbg_get_dpci_fqid() - Retrieve the virtual FQID of the required DPCI
13849 + * @mc_io:     Pointer to MC portal's I/O object
13850 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13851 + * @token:     Token of DPDBG object
13852 + * @dpci_id:   The requested DPCI ID
13853 + * @priority:  Select the queue relative to number of priorities configured at
13854 + *             DPCI creation
13855 + * @fqid:      The returned virtual FQID.
13856 + *
13857 + * Return:     '0' on Success; Error code otherwise.
13858 + */
13859 +int dpdbg_get_dpci_fqid(struct fsl_mc_io               *mc_io,
13860 +                       uint32_t                        cmd_flags,
13861 +                       uint16_t                        token,
13862 +                       int                             dpci_id,
13863 +                       uint8_t                         priority,
13864 +                       uint32_t                        *fqid);
13865 +
13866 +/**
13867 + * Maximum size for rule match (in bytes)
13868 + */
13869 +#define DPDBG_MAX_RULE_SIZE            56
13870 +/**
13871 + * Disable marking
13872 + */
13873 +#define DPDBG_DISABLE_MARKING          0xFF
13874 +
13875 +/**
13876 + * dpdbg_prepare_ctlu_global_rule() - function prepare extract parameters
13877 + * @dpkg_rule: defining a full Key Generation profile (rule)
13878 + * @rule_buf: Zeroed 256 bytes of memory before mapping it to DMA
13879 + *
13880 + * This function has to be called before dpdbg_set_global_marking()
13881 + */
13882 +int dpdbg_prepare_ctlu_global_rule(struct dpkg_profile_cfg     *dpkg_rule,
13883 +                                  uint8_t                      *rule_buf);
13884 +
13885 +/**
13886 + * struct dpdbg_rule_cfg - Rule configuration for table lookup
13887 + * @key_iova: I/O virtual address of the key (must be in DMA-able memory)
13888 + * @rule_iova: I/O virtual address of the rule (must be in DMA-able memory)
13889 + * @mask_iova: I/O virtual address of the mask (must be in DMA-able memory)
13890 + * @key_size: key and mask size (in bytes)
13891 + */
13892 +struct dpdbg_rule_cfg {
13893 +       uint64_t        key_iova;
13894 +       uint64_t        mask_iova;
13895 +       uint64_t        rule_iova;
13896 +       uint8_t         key_size;
13897 +};
13898 +
13899 +/**
13900 + * dpdbg_set_ctlu_global_marking() - Set marking for all match rule frames
13901 + * @mc_io:     Pointer to MC portal's I/O object
13902 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13903 + * @token:     Token of DPDBG object
13904 + * @marking:   The requested Debug marking
13905 + * @cfg:       Marking rule to add
13906 + *
13907 + * Warning: must be called after dpdbg_prepare_global_rule()
13908 + *
13909 + * Return:     '0' on Success; Error code otherwise.
13910 + */
13911 +int dpdbg_set_ctlu_global_marking(struct fsl_mc_io     *mc_io,
13912 +                                 uint32_t              cmd_flags,
13913 +                                 uint16_t              token,
13914 +                                 uint8_t               marking,
13915 +                                 struct dpdbg_rule_cfg *cfg);
13916 +
13917 +/**
13918 + * All traffic classes considered
13919 + */
13920 +#define DPDBG_DPNI_ALL_TCS     (uint8_t)(-1)
13921 +/**
13922 + * All flows within traffic class considered
13923 + */
13924 +#define DPDBG_DPNI_ALL_TC_FLOWS        (uint8_t)(-1)
13925 +/**
13926 + * All buffer pools considered
13927 + */
13928 +#define DPDBG_DPNI_ALL_DPBP    (uint8_t)(-1)
13929 +
13930 +/**
13931 + * struct dpdbg_dpni_rx_marking_cfg - Ingress frame configuration
13932 + * @tc_id: Traffic class ID (0-7); DPDBG_DPNI_ALL_TCS for all traffic classes.
13933 + * @flow_id: Rx flow id within the traffic class; use
13934 + *      'DPDBG_DPNI_ALL_TC_FLOWS' to set all flows within this tc_id;
13935 + *      ignored if tc_id is set to 'DPDBG_DPNI_ALL_TCS';
13936 + * @dpbp_id: buffer pool ID; 'DPDBG_DPNI_ALL_DPBP' to set all DPBP
13937 + * @marking: Marking for match frames;
13938 + *             'DPDBG_DISABLE_MARKING' for disable marking
13939 + */
13940 +struct dpdbg_dpni_rx_marking_cfg {
13941 +       uint8_t         tc_id;
13942 +       uint16_t        flow_id;
13943 +       uint16_t        dpbp_id;
13944 +       uint8_t         marking;
13945 +};
13946 +
13947 +/**
13948 + * dpdbg_set_dpni_rx_marking() - Set Rx frame marking for DPNI
13949 + * @mc_io:     Pointer to MC portal's I/O object
13950 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13951 + * @token:     Token of DPDBG object
13952 + * @dpni_id:   The requested DPNI ID
13953 + * @cfg:       RX frame marking configuration
13954 + *
13955 + * Return:     '0' on Success; Error code otherwise.
13956 + */
13957 +int dpdbg_set_dpni_rx_marking(struct fsl_mc_io                 *mc_io,
13958 +                             uint32_t                          cmd_flags,
13959 +                             uint16_t                          token,
13960 +                             int                               dpni_id,
13961 +                             struct dpdbg_dpni_rx_marking_cfg  *cfg);
13962 +
13963 +/* selects global confirmation queues */
13964 +#define DPDBG_DPNI_GLOBAL_TX_CONF_QUEUE                (uint16_t)(-1)
13965 +
13966 +/**
13967 + * dpdbg_set_dpni_tx_conf_marking() - Set Tx frame marking for DPNI
13968 + *
13969 + * @mc_io:     Pointer to MC portal's I/O object
13970 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13971 + * @token:     Token of DPDBG object
13972 + * @dpni_id:   The requested DPNI ID
13973 + * @sender_id: Sender Id for the confirmation queue;
13974 + *             'DPDBG_DPNI_GLOBAL_TX_CONF_QUEUE' for global confirmation queue
13975 + * @marking:   The requested marking;
13976 + *             'DPDBG_DISABLE_MARKING' for disable marking
13977 + *
13978 + * Return:     '0' on Success; Error code otherwise.
13979 + */
13980 +int dpdbg_set_dpni_tx_conf_marking(struct fsl_mc_io    *mc_io,
13981 +                                  uint32_t             cmd_flags,
13982 +                                  uint16_t             token,
13983 +                                  int                  dpni_id,
13984 +                                  uint16_t             sender_id,
13985 +                                  uint8_t              marking);
13986 +
13987 +/**
13988 + * dpdbg_set_dpio_marking() - Set debug frame marking on enqueue
13989 + * @mc_io:     Pointer to MC portal's I/O object
13990 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13991 + * @token:     Token of DPDBG object
13992 + * @dpio_id:   The requested DPIO ID
13993 + * @marking:   The requested marking;
13994 + *             'DPDBG_DISABLE_MARKING' for disable marking
13995 + * Return:     '0' on Success; Error code otherwise.
13996 + */
13997 +int dpdbg_set_dpio_marking(struct fsl_mc_io    *mc_io,
13998 +                          uint32_t              cmd_flags,
13999 +                          uint16_t              token,
14000 +                          int                   dpio_id,
14001 +                          uint8_t               marking);
14002 +
14003 +/**
14004 + * enum dpdbg_verbosity_level - Trace verbosity level
14005 + * @DPDBG_VERBOSITY_LEVEL_DISABLE: Trace disabled
14006 + * @DPDBG_VERBOSITY_LEVEL_TERSE: Terse trace
14007 + * @DPDBG_VERBOSITY_LEVEL_VERBOSE: Verbose trace
14008 + */
14009 +enum dpdbg_verbosity_level {
14010 +       DPDBG_VERBOSITY_LEVEL_DISABLE = 0,
14011 +       DPDBG_VERBOSITY_LEVEL_TERSE,
14012 +       DPDBG_VERBOSITY_LEVEL_VERBOSE
14013 +};
14014 +
14015 +/**
14016 + * dpdbg_set_ctlu_global_trace() - Set global trace configuration for CTLU trace
14017 + *
14018 + * @mc_io:     Pointer to MC portal's I/O object
14019 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14020 + * @token:     Token of DPDBG object
14021 + * @cfg:       trace rule to add
14022 + *
14023 + * Warning: must be called after dpdbg_prepare_global_rule()
14024 + *
14025 + * Return:     '0' on Success; Error code otherwise.
14026 + */
14027 +int dpdbg_set_ctlu_global_trace(struct fsl_mc_io       *mc_io,
14028 +                               uint32_t                cmd_flags,
14029 +                               uint16_t                token,
14030 +                               struct dpdbg_rule_cfg   *cfg);
14031 +
14032 +/**
14033 + * Number of DPIO trace points
14034 + */
14035 +#define DPDBG_NUM_OF_DPIO_TRACE_POINTS 2
14036 +
14037 +/**
14038 + * enum dpdbg_dpio_trace_type - Define Trace point type
14039 + * @DPDBG_DPIO_TRACE_TYPE_ENQUEUE: This trace point triggers when an enqueue
14040 + *                             command, received via this portal,
14041 + *                             and containing a marked frame, is executed
14042 + * @DPDBG_DPIO_TRACE_TYPE_DEFERRED: This trace point triggers when the deferred
14043 + *                             enqueue of a marked frame received via this
14044 + *                             portal completes
14045 + */
14046 +enum dpdbg_dpio_trace_type {
14047 +       DPDBG_DPIO_TRACE_TYPE_ENQUEUE = 0,
14048 +       DPDBG_DPIO_TRACE_TYPE_DEFERRED = 1
14049 +};
14050 +
14051 +/**
14052 + * struct dpdbg_dpio_trace_cfg - Configure the behavior of a trace point
14053 + *                     when a frame marked with the specified DD code point is
14054 + *                     encountered
14055 + * @marking:     this field will be written into the DD field of every FD
14056 + *               enqueued in this DPIO.
14057 + *               'DPDBG_DISABLE_MARKING' for disable marking
14058 + * @verbosity:   Verbosity level
14059 + * @enqueue_type: Enqueue trace point type defining a full Key Generation
14060 + *               profile (rule)
14061 + */
14062 +struct dpdbg_dpio_trace_cfg {
14063 +               uint8_t                                         marking;
14064 +               enum dpdbg_verbosity_level      verbosity;
14065 +               enum dpdbg_dpio_trace_type      enqueue_type;
14066 +};
14067 +
14068 +/**
14069 + * dpdbg_set_dpio_trace() - Set trace for DPIO for every enqueued frame to
14070 + *                                                     the portal
14071 + *
14072 + * @mc_io:     Pointer to MC portal's I/O object
14073 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14074 + * @token:     Token of DPDBG object
14075 + * @dpio_id:   The requested DPIO ID
14076 + * @trace_point: Trace points configuration
14077 + *
14078 + * Return:     '0' on Success; Error code otherwise.
14079 + */
14080 +int dpdbg_set_dpio_trace(struct fsl_mc_io      *mc_io,
14081 +                        uint32_t               cmd_flags,
14082 +                        uint16_t               token,
14083 +                        int                    dpio_id,
14084 +                        struct dpdbg_dpio_trace_cfg
14085 +                                trace_point[DPDBG_NUM_OF_DPIO_TRACE_POINTS]);
14086 +
14087 +/**
14088 + * struct dpdbg_dpni_trace_cfg - Configure the behavior of a trace point when a
14089 + * @tc_id: Traffic class ID (0-7); DPDBG_DPNI_ALL_TCS for all traffic classes.
14090 + * @flow_id: Rx flow id within the traffic class; use
14091 + *      'DPDBG_DPNI_ALL_TC_FLOWS' to set all flows within this tc_id;
14092 + *      ignored if tc_id is set to 'DPDBG_DPNI_ALL_TCS';
14093 + * @dpbp_id: buffer pool ID; 'DPDBG_DPNI_ALL_DPBP' to set all DPBP
14094 + * @marking: Marking for match frames;
14095 + *             'DPDBG_DISABLE_MARKING' for disable marking
14096 + */
14097 +struct dpdbg_dpni_rx_trace_cfg {
14098 +       uint8_t         tc_id;
14099 +       uint16_t        flow_id;
14100 +       uint16_t        dpbp_id;
14101 +       uint8_t         marking;
14102 +};
14103 +
14104 +/**
14105 + * dpdbg_set_dpni_rx_trace() - Set trace for DPNI ingress (WRIOP ingress).
14106 + *             in case of multiple requests for different DPNIs - the trace
14107 + *             will be for the latest DPNI requested.
14108 + *
14109 + * @mc_io:     Pointer to MC portal's I/O object
14110 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14111 + * @token:     Token of DPDBG object
14112 + * @dpni_id:   The requested DPNI ID
14113 + * @trace_cfg:  Trace configuration
14114 + *
14115 + * Return:     '0' on Success; Error code otherwise.
14116 + */
14117 +int dpdbg_set_dpni_rx_trace(struct fsl_mc_io                   *mc_io,
14118 +                           uint32_t                            cmd_flags,
14119 +                           uint16_t                            token,
14120 +                           int                                 dpni_id,
14121 +                           struct dpdbg_dpni_rx_trace_cfg      *trace_cfg);
14122 +
14123 +/**
14124 + * All DPNI senders
14125 + */
14126 +#define DPDBG_DPNI_ALL_SENDERS (uint16_t)(-1)
14127 +
14128 +/**
14129 + * struct dpdbg_dpni_trace_cfg - Configure the behavior of a trace point when a
14130 + *             frame marked with the specified DD code point is encountered
14131 + * @marking: The requested debug marking;
14132 + *             'DPDBG_DISABLE_MARKING' for disable marking
14133 + */
14134 +struct dpdbg_dpni_tx_trace_cfg {
14135 +               uint8_t marking;
14136 +};
14137 +
14138 +/**
14139 + * dpdbg_set_dpni_tx_trace() - Set trace for DPNI dequeued frames
14140 + *
14141 + * @mc_io:     Pointer to MC portal's I/O object
14142 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14143 + * @token:     Token of DPDBG object
14144 + * @dpni_id:   The requested DPNI ID
14145 + * @sender_id: Sender ID; 'DPDBG_DPNI_ALL_SENDERS' for all senders
14146 + * @trace_cfg: Trace configuration
14147 + *
14148 + * Return:     '0' on Success; Error code otherwise.
14149 + */
14150 +int dpdbg_set_dpni_tx_trace(struct fsl_mc_io                   *mc_io,
14151 +                           uint32_t                            cmd_flags,
14152 +                           uint16_t                            token,
14153 +                           int                                 dpni_id,
14154 +                           uint16_t                            sender_id,
14155 +                           struct dpdbg_dpni_tx_trace_cfg      *trace_cfg);
14156 +
14157 +/**
14158 + * Number of DPCON trace points
14159 + */
14160 +#define DPDBG_NUM_OF_DPCON_TRACE_POINTS        2
14161 +
14162 +/**
14163 + * struct dpdbg_dpcon_trace_cfg - Configure the behavior of a trace point when a
14164 + *             frame marked with the specified DD code point is encountered
14165 + * @marking: The requested debug marking;
14166 + *             'DPDBG_DISABLE_MARKING' for disable marking
14167 + * @verbosity: Verbosity level
14168 + */
14169 +struct dpdbg_dpcon_trace_cfg {
14170 +               uint8_t                 marking;
14171 +               enum dpdbg_verbosity_level      verbosity;
14172 +};
14173 +
14174 +/**
14175 + * dpdbg_set_dpcon_trace() - Set trace for DPCON when a frame marked with a
14176 + *                             specified marking is dequeued from a WQ in the
14177 + *                             channel selected
14178 + *
14179 + * @mc_io:     Pointer to MC portal's I/O object
14180 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14181 + * @token:     Token of DPDBG object
14182 + * @dpcon_id:  The requested DPCON ID
14183 + * @trace_point: Trace points configuration
14184 + *
14185 + * Return:     '0' on Success; Error code otherwise.
14186 + */
14187 +int dpdbg_set_dpcon_trace(struct fsl_mc_io             *mc_io,
14188 +                         uint32_t                      cmd_flags,
14189 +                         uint16_t                      token,
14190 +                         int                           dpcon_id,
14191 +                         struct dpdbg_dpcon_trace_cfg
14192 +                                 trace_point[DPDBG_NUM_OF_DPCON_TRACE_POINTS]);
14193 +
14194 +/**
14195 + * Number of DPSECI trace points
14196 + */
14197 +#define DPDBG_NUM_OF_DPSECI_TRACE_POINTS       2
14198 +
14199 +/**
14200 + * struct dpdbg_dpseci_trace_cfg - Configure the behavior of a trace point when
14201 + *                      a frame marked with the specified DD code point is
14202 + *                      encountered
14203 + * @marking: The requested debug marking;
14204 + *             'DPDBG_DISABLE_MARKING' for disable marking
14205 + * @verbosity: Verbosity level
14206 + */
14207 +struct dpdbg_dpseci_trace_cfg {
14208 +               uint8_t                 marking;
14209 +               enum dpdbg_verbosity_level      verbosity;
14210 +};
14211 +
14212 +/**
14213 + * dpdbg_set_dpseci_trace() - Set trace for DPSECI when a frame marked with the
14214 + *                             specific marking is enqueued via this portal.
14215 + *
14216 + * @mc_io:     Pointer to MC portal's I/O object
14217 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14218 + * @token:     Token of DPDBG object
14219 + * @dpseci_id: The requested DPSECI ID
14220 + * @trace_point: Trace points configuration
14221 + *
14222 + * Return:     '0' on Success; Error code otherwise.
14223 + */
14224 +int dpdbg_set_dpseci_trace(struct fsl_mc_io    *mc_io,
14225 +                          uint32_t             cmd_flags,
14226 +                          uint16_t             token,
14227 +                          int                  dpseci_id,
14228 +                          struct dpdbg_dpseci_trace_cfg
14229 +                               trace_point[DPDBG_NUM_OF_DPSECI_TRACE_POINTS]);
14230 +
14231 +/**
14232 + * dpdbg_get_dpmac_counter() - DPMAC packet throughput
14233 + *
14234 + * @mc_io:     Pointer to MC portal's I/O object
14235 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14236 + * @token:     Token of DPDBG object
14237 + * @dpmac_id:  The requested DPMAC ID
14238 + * @counter_type:   The requested DPMAC counter
14239 + * @counter:   Returned counter value
14240 + *
14241 + * Return:     '0' on Success; Error code otherwise.
14242 + */
14243 +int dpdbg_get_dpmac_counter(struct fsl_mc_io           *mc_io,
14244 +                           uint32_t                    cmd_flags,
14245 +                           uint16_t                    token,
14246 +                           int                 dpmac_id,
14247 +                           enum dpmac_counter          counter_type,
14248 +                           uint64_t                    *counter);
14249 +
14250 +/**
14251 + * dpdbg_get_dpni_counter() - DPNI packet throughput
14252 + *
14253 + * @mc_io:     Pointer to MC portal's I/O object
14254 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14255 + * @token:     Token of DPDBG object
14256 + * @dpni_id:   The requested DPNI ID
14257 + * @counter_type:   The requested DPNI counter
14258 + * @counter:   Returned counter value
14259 + *
14260 + * Return:     '0' on Success; Error code otherwise.
14261 + */
14262 +int dpdbg_get_dpni_counter(struct fsl_mc_io    *mc_io,
14263 +                          uint32_t             cmd_flags,
14264 +                          uint16_t             token,
14265 +                          int                  dpni_id,
14266 +                          enum dpni_counter    counter_type,
14267 +                          uint64_t             *counter);
14268 +
14269 +#endif /* __FSL_DPDBG_H */
14270 diff --git a/drivers/net/dpaa2/mc/fsl_dpdbg_cmd.h b/drivers/net/dpaa2/mc/fsl_dpdbg_cmd.h
14271 new file mode 100644
14272 index 0000000..b672788
14273 --- /dev/null
14274 +++ b/drivers/net/dpaa2/mc/fsl_dpdbg_cmd.h
14275 @@ -0,0 +1,249 @@
14276 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
14277 + *
14278 + * Redistribution and use in source and binary forms, with or without
14279 + * modification, are permitted provided that the following conditions are met:
14280 + *     * Redistributions of source code must retain the above copyright
14281 + *       notice, this list of conditions and the following disclaimer.
14282 + *     * Redistributions in binary form must reproduce the above copyright
14283 + *       notice, this list of conditions and the following disclaimer in the
14284 + *       documentation and/or other materials provided with the distribution.
14285 + * * Neither the name of the above-listed copyright holders nor the
14286 + * names of any contributors may be used to endorse or promote products
14287 + *       derived from this software without specific prior written permission.
14288 + *
14289 + *
14290 + * ALTERNATIVELY, this software may be distributed under the terms of the
14291 + * GNU General Public License ("GPL") as published by the Free Software
14292 + * Foundation, either version 2 of that License or (at your option) any
14293 + * later version.
14294 + *
14295 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
14296 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14297 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
14298 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
14299 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
14300 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
14301 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
14302 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
14303 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
14304 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
14305 + * POSSIBILITY OF SUCH DAMAGE.
14306 + */
14307 +#ifndef _FSL_DPDBG_CMD_H
14308 +#define _FSL_DPDBG_CMD_H
14309 +
14310 +/* DPDBG Version */
14311 +#define DPDBG_VER_MAJOR                                1
14312 +#define DPDBG_VER_MINOR                                0
14313 +
14314 +/* Command IDs */
14315 +#define DPDBG_CMDID_CLOSE                              0x800
14316 +#define DPDBG_CMDID_OPEN                               0x80F
14317 +
14318 +#define DPDBG_CMDID_GET_ATTR                           0x004
14319 +
14320 +#define DPDBG_CMDID_GET_DPNI_INFO                      0x130
14321 +#define DPDBG_CMDID_GET_DPNI_PRIV_TX_CONF_FQID         0x131
14322 +#define DPDBG_CMDID_GET_DPCON_INFO                     0x132
14323 +#define DPDBG_CMDID_GET_DPBP_INFO                      0x133
14324 +#define DPDBG_CMDID_GET_DPCI_FQID                      0x134
14325 +
14326 +#define DPDBG_CMDID_SET_CTLU_GLOBAL_MARKING            0x135
14327 +#define DPDBG_CMDID_SET_DPNI_RX_MARKING                        0x136
14328 +#define DPDBG_CMDID_SET_DPNI_TX_CONF_MARKING           0x137
14329 +#define DPDBG_CMDID_SET_DPIO_MARKING                   0x138
14330 +
14331 +#define DPDBG_CMDID_SET_CTLU_GLOBAL_TRACE              0x140
14332 +#define DPDBG_CMDID_SET_DPIO_TRACE                     0x141
14333 +#define DPDBG_CMDID_SET_DPNI_RX_TRACE                  0x142
14334 +#define DPDBG_CMDID_SET_DPNI_TX_TRACE                  0x143
14335 +#define DPDBG_CMDID_SET_DPCON_TRACE                    0x145
14336 +#define DPDBG_CMDID_SET_DPSECI_TRACE                   0x146
14337 +
14338 +#define DPDBG_CMDID_GET_DPMAC_COUNTER                  0x150
14339 +#define DPDBG_CMDID_GET_DPNI_COUNTER                   0x151
14340 +
14341 +/*                cmd, param, offset, width, type, arg_name */
14342 +#define DPDBG_CMD_OPEN(cmd, dpdbg_id) \
14343 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpdbg_id)
14344 +
14345 +/*                cmd, param, offset, width, type,     arg_name */
14346 +#define DPDBG_RSP_GET_ATTRIBUTES(cmd, attr) \
14347 +do { \
14348 +       MC_RSP_OP(cmd, 0, 32, 32, int,      attr->id);\
14349 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
14350 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
14351 +} while (0)
14352 +
14353 +/*                cmd, param, offset, width, type,     arg_name */
14354 +#define        DPDBG_CMD_GET_DPNI_INFO(cmd, dpni_id) \
14355 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id)
14356 +
14357 +/*                cmd, param, offset, width, type,     arg_name */
14358 +#define        DPDBG_RSP_GET_DPNI_INFO(cmd, info) \
14359 +do { \
14360 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, info->qdid);\
14361 +       MC_RSP_OP(cmd, 1, 32, 8,  uint8_t,  info->max_senders);\
14362 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, info->err_fqid);\
14363 +       MC_RSP_OP(cmd, 2, 32, 32, uint32_t, info->tx_conf_fqid);\
14364 +} while (0)
14365 +
14366 +/*                cmd, param, offset, width, type,     arg_name */
14367 +#define        DPDBG_CMD_GET_DPNI_PRIV_TX_CONF_FQID(cmd, dpni_id, sender_id) \
14368 +do { \
14369 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id);\
14370 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  sender_id);\
14371 +} while (0)
14372 +
14373 +/*                cmd, param, offset, width, type,     arg_name */
14374 +#define        DPDBG_RSP_GET_DPNI_PRIV_TX_CONF_FQID(cmd, fqid) \
14375 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, fqid)
14376 +
14377 +/*                cmd, param, offset, width, type,     arg_name */
14378 +#define        DPDBG_CMD_GET_DPCON_INFO(cmd, dpcon_id) \
14379 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpcon_id)
14380 +
14381 +/*                cmd, param, offset, width, type,     arg_name */
14382 +#define        DPDBG_RSP_GET_DPCON_INFO(cmd, info) \
14383 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t,  info->ch_id)
14384 +
14385 +/*                cmd, param, offset, width, type,     arg_name */
14386 +#define        DPDBG_CMD_GET_DPBP_INFO(cmd, dpbp_id) \
14387 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpbp_id)
14388 +
14389 +/*                cmd, param, offset, width, type,     arg_name */
14390 +#define        DPDBG_RSP_GET_DPBP_INFO(cmd, info) \
14391 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t,  info->bpid)
14392 +
14393 +/*                cmd, param, offset, width, type,     arg_name */
14394 +#define        DPDBG_CMD_GET_DPCI_FQID(cmd, dpci_id, priority) \
14395 +do { \
14396 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpci_id);\
14397 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  priority);\
14398 +} while (0)
14399 +/*                cmd, param, offset, width, type,     arg_name */
14400 +#define        DPDBG_RSP_GET_DPCI_FQID(cmd, fqid) \
14401 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t,  fqid)
14402 +
14403 +/*                cmd, param, offset, width, type,     arg_name */
14404 +#define DPDBG_CMD_SET_CTLU_GLOBAL_MARKING(cmd, marking, cfg) \
14405 +do { \
14406 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  marking);\
14407 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  cfg->key_size); \
14408 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->key_iova); \
14409 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->mask_iova); \
14410 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->rule_iova); \
14411 +} while (0)
14412 +
14413 +#define DPDBG_CMD_SET_DPNI_RX_MARKING(cmd, dpni_id, cfg) \
14414 +do { \
14415 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id);\
14416 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->tc_id);\
14417 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, cfg->flow_id);\
14418 +       MC_CMD_OP(cmd, 1, 0,  16, uint16_t, cfg->dpbp_id);\
14419 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  cfg->marking);\
14420 +} while (0)
14421 +
14422 +#define DPDBG_CMD_SET_DPNI_TX_CONF_MARKING(cmd, dpni_id, sender_id, marking) \
14423 +do { \
14424 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id);\
14425 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, sender_id);\
14426 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  marking);\
14427 +} while (0)
14428 +
14429 +#define DPDBG_CMD_SET_DPIO_MARKING(cmd, dpio_id, marking) \
14430 +do { \
14431 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpio_id);\
14432 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  marking);\
14433 +} while (0)
14434 +
14435 +/*                cmd, param, offset, width, type,     arg_name */
14436 +#define DPDBG_CMD_SET_CTLU_GLOBAL_TRACE(cmd, cfg) \
14437 +do { \
14438 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  cfg->key_size); \
14439 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->key_iova); \
14440 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->mask_iova); \
14441 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->rule_iova); \
14442 +} while (0)
14443 +
14444 +/*                cmd, param, offset, width, type,     arg_name */
14445 +#define DPDBG_CMD_SET_DPIO_TRACE(cmd, dpio_id, trace_point) \
14446 +do { \
14447 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpio_id);\
14448 +       MC_CMD_OP(cmd, 1, 0,  4,  enum dpdbg_verbosity_level,  \
14449 +                                         trace_point[0].verbosity); \
14450 +       MC_CMD_OP(cmd, 1, 4,  4,  enum dpdbg_dpio_trace_type, \
14451 +                                         trace_point[0].enqueue_type); \
14452 +       MC_CMD_OP(cmd, 1, 8,  8, uint8_t, trace_point[0].marking); \
14453 +       MC_CMD_OP(cmd, 1, 32, 4,  enum dpdbg_verbosity_level,  \
14454 +                                         trace_point[1].verbosity); \
14455 +       MC_CMD_OP(cmd, 1, 36, 4,  enum dpdbg_dpio_trace_type, \
14456 +                                         trace_point[1].enqueue_type); \
14457 +       MC_CMD_OP(cmd, 1, 40,  8, uint8_t, trace_point[1].marking); \
14458 +} while (0)
14459 +
14460 +/*                cmd, param, offset, width, type,     arg_name */
14461 +#define DPDBG_CMD_SET_DPNI_RX_TRACE(cmd, dpni_id, trace_cfg) \
14462 +do { \
14463 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id);\
14464 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  trace_cfg->tc_id);\
14465 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, trace_cfg->flow_id);\
14466 +       MC_CMD_OP(cmd, 1, 0,  16, uint16_t, trace_cfg->dpbp_id);\
14467 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  trace_cfg->marking);\
14468 +} while (0)
14469 +
14470 +/*                cmd, param, offset, width, type,     arg_name */
14471 +#define DPDBG_CMD_SET_DPNI_TX_TRACE(cmd, dpni_id, sender_id, trace_cfg) \
14472 +do { \
14473 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id);\
14474 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, sender_id);\
14475 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  trace_cfg->marking);\
14476 +} while (0)
14477 +
14478 +/*                cmd, param, offset, width, type,     arg_name */
14479 +#define DPDBG_CMD_SET_DPCON_TRACE(cmd, dpcon_id, trace_point) \
14480 +do { \
14481 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpcon_id);\
14482 +       MC_CMD_OP(cmd, 1, 0,  4,  enum dpdbg_verbosity_level,  \
14483 +                                         trace_point[0].verbosity); \
14484 +       MC_CMD_OP(cmd, 1, 8,  8, uint8_t, trace_point[0].marking); \
14485 +       MC_CMD_OP(cmd, 1, 32, 4,  enum dpdbg_verbosity_level,  \
14486 +                                         trace_point[1].verbosity); \
14487 +       MC_CMD_OP(cmd, 1, 40,  8, uint8_t, trace_point[1].marking); \
14488 +} while (0)
14489 +
14490 +/*                cmd, param, offset, width, type,     arg_name */
14491 +#define DPDBG_CMD_SET_DPSECI_TRACE(cmd, dpseci_id, trace_point) \
14492 +do { \
14493 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpseci_id);\
14494 +       MC_CMD_OP(cmd, 1, 0,  4,  enum dpdbg_verbosity_level,  \
14495 +                                         trace_point[0].verbosity); \
14496 +       MC_CMD_OP(cmd, 1, 8,  8, uint8_t, trace_point[0].marking); \
14497 +       MC_CMD_OP(cmd, 1, 32, 4,  enum dpdbg_verbosity_level,  \
14498 +                                         trace_point[1].verbosity); \
14499 +       MC_CMD_OP(cmd, 1, 40,  8, uint8_t, trace_point[1].marking); \
14500 +} while (0)
14501 +
14502 +/*                cmd, param, offset, width, type,     arg_name */
14503 +#define DPDBG_CMD_GET_DPMAC_COUNTER(cmd, dpmac_id, counter_type) \
14504 +do { \
14505 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpmac_id);\
14506 +       MC_CMD_OP(cmd, 0, 32, 16, enum dpmac_counter, counter_type);\
14507 +} while (0)
14508 +
14509 +/*                cmd, param, offset, width, type,     arg_name */
14510 +#define DPDBG_RSP_GET_DPMAC_COUNTER(cmd, counter) \
14511 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t,  counter)
14512 +
14513 +/*                cmd, param, offset, width, type,     arg_name */
14514 +#define DPDBG_CMD_GET_DPNI_COUNTER(cmd, dpni_id, counter_type) \
14515 +do { \
14516 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpni_id);\
14517 +       MC_CMD_OP(cmd, 0, 32, 16, enum dpni_counter, counter_type);\
14518 +} while (0)
14519 +
14520 +/*                cmd, param, offset, width, type,     arg_name */
14521 +#define DPDBG_RSP_GET_DPNI_COUNTER(cmd, counter) \
14522 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t,  counter)
14523 +
14524 +#endif /* _FSL_DPDBG_CMD_H */
14525 diff --git a/drivers/net/dpaa2/mc/fsl_dpdcei.h b/drivers/net/dpaa2/mc/fsl_dpdcei.h
14526 new file mode 100644
14527 index 0000000..319795c
14528 --- /dev/null
14529 +++ b/drivers/net/dpaa2/mc/fsl_dpdcei.h
14530 @@ -0,0 +1,515 @@
14531 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
14532 + *
14533 + * Redistribution and use in source and binary forms, with or without
14534 + * modification, are permitted provided that the following conditions are met:
14535 + * * Redistributions of source code must retain the above copyright
14536 + * notice, this list of conditions and the following disclaimer.
14537 + * * Redistributions in binary form must reproduce the above copyright
14538 + * notice, this list of conditions and the following disclaimer in the
14539 + * documentation and/or other materials provided with the distribution.
14540 + * * Neither the name of the above-listed copyright holders nor the
14541 + * names of any contributors may be used to endorse or promote products
14542 + * derived from this software without specific prior written permission.
14543 + *
14544 + *
14545 + * ALTERNATIVELY, this software may be distributed under the terms of the
14546 + * GNU General Public License ("GPL") as published by the Free Software
14547 + * Foundation, either version 2 of that License or (at your option) any
14548 + * later version.
14549 + *
14550 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
14551 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14552 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
14553 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
14554 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
14555 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
14556 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
14557 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
14558 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
14559 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
14560 + * POSSIBILITY OF SUCH DAMAGE.
14561 + */
14562 +#ifndef __FSL_DPDCEI_H
14563 +#define __FSL_DPDCEI_H
14564 +
14565 +/* Data Path DCE Interface API
14566 + * Contains initialization APIs and runtime control APIs for DPDCEI
14567 + */
14568 +
14569 +struct fsl_mc_io;
14570 +
14571 +/** General DPDCEI macros */
14572 +
14573 +/**
14574 + * Indicates an invalid frame queue
14575 + */
14576 +#define DPDCEI_FQID_NOT_VALID  (uint32_t)(-1)
14577 +
14578 +/**
14579 + * enum dpdcei_engine - DCE engine block
14580 + * @DPDCEI_ENGINE_COMPRESSION: Engine compression
14581 + * @DPDCEI_ENGINE_DECOMPRESSION: Engine decompression
14582 + */
14583 +enum dpdcei_engine {
14584 +       DPDCEI_ENGINE_COMPRESSION,
14585 +       DPDCEI_ENGINE_DECOMPRESSION
14586 +};
14587 +
14588 +/**
14589 + * dpdcei_open() - Open a control session for the specified object
14590 + * @mc_io: Pointer to MC portal's I/O object
14591 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14592 + * @token:     Token of DPDCEI object
14593 + * @dpdcei_id: DPDCEI unique ID
14594 + *
14595 + * This function can be used to open a control session for an
14596 + * already created object; an object may have been declared in
14597 + * the DPL or by calling the dpdcei_create() function.
14598 + * This function returns a unique authentication token,
14599 + * associated with the specific object ID and the specific MC
14600 + * portal; this token must be used in all subsequent commands for
14601 + * this specific object.
14602 + *
14603 + * Return:     '0' on Success; Error code otherwise.
14604 + */
14605 +int dpdcei_open(struct fsl_mc_io       *mc_io,
14606 +               uint32_t                cmd_flags,
14607 +               int                     dpdcei_id,
14608 +               uint16_t                *token);
14609 +
14610 +/**
14611 + * dpdcei_close() - Close the control session of the object
14612 + * @mc_io: Pointer to MC portal's I/O object
14613 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14614 + * @token:     Token of DPDCEI object
14615 + *
14616 + * After this function is called, no further operations are
14617 + * allowed on the object without opening a new control session.
14618 + *
14619 + * Return:     '0' on Success; Error code otherwise.
14620 + */
14621 +int dpdcei_close(struct fsl_mc_io      *mc_io,
14622 +                uint32_t               cmd_flags,
14623 +                uint16_t               token);
14624 +
14625 +/**
14626 + * struct dpdcei_cfg - Structure representing DPDCEI configuration
14627 + * @engine: compression or decompression engine to be selected
14628 + * @priority: Priority for the DCE hardware processing (valid values 1-8).
14629 + */
14630 +struct dpdcei_cfg {
14631 +       enum dpdcei_engine      engine;
14632 +       uint8_t         priority;
14633 +};
14634 +
14635 +/**
14636 + * dpdcei_create() - Create the DPDCEI object
14637 + * @mc_io: Pointer to MC portal's I/O object
14638 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14639 + * @token:     Token of DPDCEI object
14640 + * @cfg: configuration parameters
14641 + *
14642 + * Create the DPDCEI object, allocate required resources and
14643 + * perform required initialization.
14644 + *
14645 + * The object can be created either by declaring it in the
14646 + * DPL file, or by calling this function.
14647 + *
14648 + * This function returns a unique authentication token,
14649 + * associated with the specific object ID and the specific MC
14650 + * portal; this token must be used in all subsequent calls to
14651 + * this specific object. For objects that are created using the
14652 + * DPL file, call dpdcei_open() function to get an authentication
14653 + * token first.
14654 + *
14655 + * Return:     '0' on Success; Error code otherwise.
14656 + */
14657 +int dpdcei_create(struct fsl_mc_io             *mc_io,
14658 +                 uint32_t                      cmd_flags,
14659 +                 const struct dpdcei_cfg       *cfg,
14660 +                 uint16_t                      *token);
14661 +
14662 +/**
14663 + * dpdcei_destroy() - Destroy the DPDCEI object and release all its resources.
14664 + * @mc_io: Pointer to MC portal's I/O object
14665 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14666 + * @token:     Token of DPDCEI object
14667 + *
14668 + * Return:     '0' on Success; error code otherwise.
14669 + */
14670 +int dpdcei_destroy(struct fsl_mc_io    *mc_io,
14671 +                  uint32_t             cmd_flags,
14672 +                  uint16_t             token);
14673 +
14674 +/**
14675 + * dpdcei_enable() - Enable the DPDCEI, allow sending and receiving frames.
14676 + * @mc_io: Pointer to MC portal's I/O object
14677 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14678 + * @token: Token of DPDCEI object
14679 + *
14680 + * Return:     '0' on Success; Error code otherwise.
14681 + */
14682 +int dpdcei_enable(struct fsl_mc_io     *mc_io,
14683 +                 uint32_t              cmd_flags,
14684 +                 uint16_t              token);
14685 +
14686 +/**
14687 + * dpdcei_disable() - Disable the DPDCEI, stop sending and receiving frames.
14688 + * @mc_io: Pointer to MC portal's I/O object
14689 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14690 + * @token: Token of DPDCEI object
14691 + *
14692 + * Return:     '0' on Success; Error code otherwise.
14693 + */
14694 +int dpdcei_disable(struct fsl_mc_io    *mc_io,
14695 +                  uint32_t             cmd_flags,
14696 +                  uint16_t             token);
14697 +
14698 +/**
14699 + * dpdcei_is_enabled() - Check if the DPDCEI is enabled.
14700 + * @mc_io: Pointer to MC portal's I/O object
14701 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14702 + * @token: Token of DPDCEI object
14703 + * @en:        Return '1' for object enabled/'0' otherwise
14704 + *
14705 + * Return:     '0' on Success; Error code otherwise.
14706 + */
14707 +int dpdcei_is_enabled(struct fsl_mc_io *mc_io,
14708 +                     uint32_t          cmd_flags,
14709 +                     uint16_t          token,
14710 +                     int               *en);
14711 +
14712 +/**
14713 + * dpdcei_reset() - Reset the DPDCEI, returns the object to initial state.
14714 + * @mc_io: Pointer to MC portal's I/O object
14715 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14716 + * @token: Token of DPDCEI object
14717 + *
14718 + * Return:     '0' on Success; Error code otherwise.
14719 + */
14720 +int dpdcei_reset(struct fsl_mc_io      *mc_io,
14721 +                uint32_t               cmd_flags,
14722 +                uint16_t               token);
14723 +
14724 +/**
14725 + * struct dpdcei_irq_cfg - IRQ configuration
14726 + * @addr:      Address that must be written to signal a message-based interrupt
14727 + * @val:       Value to write into irq_addr address
14728 + * @irq_num: A user defined number associated with this IRQ
14729 + */
14730 +struct dpdcei_irq_cfg {
14731 +            uint64_t           addr;
14732 +            uint32_t           val;
14733 +            int                irq_num;
14734 +};
14735 +
14736 +/**
14737 + * dpdcei_set_irq() - Set IRQ information for the DPDCEI to trigger an interrupt
14738 + * @mc_io: Pointer to MC portal's I/O object
14739 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14740 + * @token:     Token of DPDCEI object
14741 + * @irq_index: Identifies the interrupt index to configure
14742 + * @irq_cfg:   IRQ configuration
14743 + *
14744 + * Return:     '0' on Success; Error code otherwise.
14745 + */
14746 +int dpdcei_set_irq(struct fsl_mc_io            *mc_io,
14747 +                  uint32_t                     cmd_flags,
14748 +                  uint16_t                     token,
14749 +                  uint8_t                      irq_index,
14750 +                  struct dpdcei_irq_cfg        *irq_cfg);
14751 +
14752 +/**
14753 + * dpdcei_get_irq() - Get IRQ information from the DPDCEI
14754 + *
14755 + * @mc_io: Pointer to MC portal's I/O object
14756 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14757 + * @token:     Token of DPDCEI object
14758 + * @irq_index: The interrupt index to configure
14759 + * @type:      Interrupt type: 0 represents message interrupt
14760 + *             type (both irq_addr and irq_val are valid)
14761 + * @irq_cfg:   IRQ attributes
14762 + *
14763 + * Return:     '0' on Success; Error code otherwise.
14764 + */
14765 +int dpdcei_get_irq(struct fsl_mc_io            *mc_io,
14766 +                  uint32_t                     cmd_flags,
14767 +                  uint16_t                     token,
14768 +                  uint8_t                      irq_index,
14769 +                  int                          *type,
14770 +                  struct dpdcei_irq_cfg        *irq_cfg);
14771 +
14772 +/**
14773 + * dpdcei_set_irq_enable() - Set overall interrupt state.
14774 + * @mc_io: Pointer to MC portal's I/O object
14775 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14776 + * @token:             Token of DPCI object
14777 + * @irq_index: The interrupt index to configure
14778 + * @en:                        Interrupt state - enable = 1, disable = 0
14779 + *
14780 + * Allows GPP software to control when interrupts are generated.
14781 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
14782 + * overall interrupt state. if the interrupt is disabled no causes will cause
14783 + * an interrupt
14784 + *
14785 + * Return:     '0' on Success; Error code otherwise.
14786 + */
14787 +int dpdcei_set_irq_enable(struct fsl_mc_io     *mc_io,
14788 +                         uint32_t              cmd_flags,
14789 +                         uint16_t              token,
14790 +                         uint8_t               irq_index,
14791 +                         uint8_t               en);
14792 +
14793 +/**
14794 + * dpdcei_get_irq_enable() - Get overall interrupt state
14795 + * @mc_io: Pointer to MC portal's I/O object
14796 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14797 + * @token:             Token of DPDCEI object
14798 + * @irq_index: The interrupt index to configure
14799 + * @en:                        Returned Interrupt state - enable = 1, disable = 0
14800 + *
14801 + * Return:     '0' on Success; Error code otherwise.
14802 + */
14803 +int dpdcei_get_irq_enable(struct fsl_mc_io     *mc_io,
14804 +                         uint32_t              cmd_flags,
14805 +                         uint16_t              token,
14806 +                         uint8_t               irq_index,
14807 +                         uint8_t               *en);
14808 +
14809 +/**
14810 + * dpdcei_set_irq_mask() - Set interrupt mask.
14811 + * @mc_io: Pointer to MC portal's I/O object
14812 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14813 + * @token:             Token of DPCI object
14814 + * @irq_index: The interrupt index to configure
14815 + * @mask:              event mask to trigger interrupt;
14816 + *                             each bit:
14817 + *                                     0 = ignore event
14818 + *                                     1 = consider event for asserting IRQ
14819 + *
14820 + * Every interrupt can have up to 32 causes and the interrupt model supports
14821 + * masking/unmasking each cause independently
14822 + *
14823 + * Return:     '0' on Success; Error code otherwise.
14824 + */
14825 +int dpdcei_set_irq_mask(struct fsl_mc_io       *mc_io,
14826 +                       uint32_t                cmd_flags,
14827 +                       uint16_t                token,
14828 +                       uint8_t         irq_index,
14829 +                       uint32_t                mask);
14830 +
14831 +/**
14832 + * dpdcei_get_irq_mask() - Get interrupt mask.
14833 + * @mc_io: Pointer to MC portal's I/O object
14834 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14835 + * @token:             Token of DPDCEI object
14836 + * @irq_index: The interrupt index to configure
14837 + * @mask:              Returned event mask to trigger interrupt
14838 + *
14839 + * Every interrupt can have up to 32 causes and the interrupt model supports
14840 + * masking/unmasking each cause independently
14841 + *
14842 + * Return:     '0' on Success; Error code otherwise.
14843 + */
14844 +int dpdcei_get_irq_mask(struct fsl_mc_io       *mc_io,
14845 +                       uint32_t                cmd_flags,
14846 +                       uint16_t                token,
14847 +                       uint8_t         irq_index,
14848 +                       uint32_t                *mask);
14849 +
14850 +/**
14851 + * dpdcei_get_irq_status() - Get the current status of any pending interrupts
14852 + * @mc_io: Pointer to MC portal's I/O object
14853 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14854 + * @token:             Token of DPDCEI object
14855 + * @irq_index: The interrupt index to configure
14856 + * @status:            Returned interrupts status - one bit per cause:
14857 + *                                     0 = no interrupt pending
14858 + *                                     1 = interrupt pending
14859 + *
14860 + * Return:     '0' on Success; Error code otherwise.
14861 + */
14862 +int dpdcei_get_irq_status(struct fsl_mc_io     *mc_io,
14863 +                         uint32_t              cmd_flags,
14864 +                         uint16_t              token,
14865 +                         uint8_t               irq_index,
14866 +                         uint32_t              *status);
14867 +
14868 +/**
14869 + * dpdcei_clear_irq_status() - Clear a pending interrupt's status
14870 + * @mc_io: Pointer to MC portal's I/O object
14871 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14872 + * @token:             Token of DPDCEI object
14873 + * @irq_index: The interrupt index to configure
14874 + * @status:            bits to clear (W1C) - one bit per cause:
14875 + *                                     0 = don't change
14876 + *                                     1 = clear status bit
14877 + *
14878 + * Return:     '0' on Success; Error code otherwise.
14879 + */
14880 +int dpdcei_clear_irq_status(struct fsl_mc_io   *mc_io,
14881 +                           uint32_t            cmd_flags,
14882 +                           uint16_t            token,
14883 +                           uint8_t             irq_index,
14884 +                           uint32_t            status);
14885 +/**
14886 + * struct dpdcei_attr - Structure representing DPDCEI attributes
14887 + * @id: DPDCEI object ID
14888 + * @engine: DCE engine block
14889 + * @version: DPDCEI version
14890 + */
14891 +struct dpdcei_attr {
14892 +       int id;
14893 +       enum dpdcei_engine engine;
14894 +       /**
14895 +        * struct version - DPDCEI version
14896 +        * @major: DPDCEI major version
14897 +        * @minor: DPDCEI minor version
14898 +        */
14899 +       struct {
14900 +               uint16_t major;
14901 +               uint16_t minor;
14902 +       } version;
14903 +};
14904 +
14905 +/**
14906 + * dpdcei_get_attributes() - Retrieve DPDCEI attributes.
14907 + * @mc_io: Pointer to MC portal's I/O object
14908 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14909 + * @token:     Token of DPDCEI object
14910 + * @attr: Returned  object's attributes
14911 + *
14912 + * Return:     '0' on Success; Error code otherwise.
14913 + */
14914 +int dpdcei_get_attributes(struct fsl_mc_io     *mc_io,
14915 +                         uint32_t              cmd_flags,
14916 +                         uint16_t              token,
14917 +                         struct dpdcei_attr    *attr);
14918 +
14919 +/**
14920 + * enum dpdcei_dest - DPDCEI destination types
14921 + * @DPDCEI_DEST_NONE:  Unassigned destination; The queue is set in parked mode
14922 + *                     and does not generate FQDAN notifications;
14923 + *                     user is expected to dequeue from the queue based on
14924 + *                     polling or other user-defined method
14925 + * @DPDCEI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN
14926 + *                     notifications to the specified DPIO; user is expected to
14927 + *                     dequeue from the queue only after notification is
14928 + *                     received
14929 + * @DPDCEI_DEST_DPCON: The queue is set in schedule mode and does not generate
14930 + *                     FQDAN notifications, but is connected to the specified
14931 + *                     DPCON object;
14932 + *                     user is expected to dequeue from the DPCON channel
14933 + */
14934 +enum dpdcei_dest {
14935 +       DPDCEI_DEST_NONE = 0,
14936 +       DPDCEI_DEST_DPIO = 1,
14937 +       DPDCEI_DEST_DPCON = 2
14938 +};
14939 +
14940 +/**
14941 + * struct dpdcei_dest_cfg - Structure representing DPDCEI destination parameters
14942 + * @dest_type: Destination type
14943 + * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
14944 + * @priority: Priority selection within the DPIO or DPCON channel; valid values
14945 + *             are 0-1 or 0-7, depending on the number of priorities in that
14946 + *             channel; not relevant for 'DPDCEI_DEST_NONE' option
14947 + */
14948 +struct dpdcei_dest_cfg {
14949 +       enum dpdcei_dest        dest_type;
14950 +       int                     dest_id;
14951 +       uint8_t         priority;
14952 +};
14953 +
14954 +/** DPDCEI queue modification options */
14955 +
14956 +/**
14957 + * Select to modify the user's context associated with the queue
14958 + */
14959 +#define DPDCEI_QUEUE_OPT_USER_CTX      0x00000001
14960 +
14961 +/**
14962 + * Select to modify the queue's destination
14963 + */
14964 +#define DPDCEI_QUEUE_OPT_DEST          0x00000002
14965 +
14966 +/**
14967 + * struct dpdcei_rx_queue_cfg - RX queue configuration
14968 + * @options: Flags representing the suggested modifications to the queue;
14969 + *     Use any combination of 'DPDCEI_QUEUE_OPT_<X>' flags
14970 + * @user_ctx: User context value provided in the frame descriptor of each
14971 + *     dequeued frame;
14972 + *     valid only if 'DPDCEI_QUEUE_OPT_USER_CTX' is contained in 'options'
14973 + * @dest_cfg: Queue destination parameters;
14974 + *     valid only if 'DPDCEI_QUEUE_OPT_DEST' is contained in 'options'
14975 + */
14976 +struct dpdcei_rx_queue_cfg {
14977 +       uint32_t                options;
14978 +       uint64_t                user_ctx;
14979 +       struct dpdcei_dest_cfg  dest_cfg;
14980 +};
14981 +
14982 +/**
14983 + * dpdcei_set_rx_queue() - Set Rx queue configuration
14984 + * @mc_io: Pointer to MC portal's I/O object
14985 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
14986 + * @token:     Token of DPDCEI object
14987 + * @cfg: Rx queue configuration
14988 + *
14989 + * Return:     '0' on Success; Error code otherwise.
14990 + */
14991 +int dpdcei_set_rx_queue(struct fsl_mc_io                       *mc_io,
14992 +                       uint32_t                                cmd_flags,
14993 +                       uint16_t                                token,
14994 +                       const struct dpdcei_rx_queue_cfg        *cfg);
14995 +
14996 +/**
14997 + * struct dpdcei_rx_queue_attr - Structure representing attributes of Rx queues
14998 + * @user_ctx: User context value provided in the frame descriptor of each
14999 + *              dequeued frame
15000 + * @dest_cfg: Queue destination configuration
15001 + * @fqid: Virtual FQID value to be used for dequeue operations
15002 + */
15003 +struct dpdcei_rx_queue_attr {
15004 +       uint64_t                user_ctx;
15005 +       struct dpdcei_dest_cfg  dest_cfg;
15006 +       uint32_t                fqid;
15007 +};
15008 +
15009 +/**
15010 + * dpdcei_get_rx_queue() - Retrieve Rx queue attributes.
15011 + * @mc_io: Pointer to MC portal's I/O object
15012 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15013 + * @token:     Token of DPDCEI object
15014 + * @attr:      Returned Rx queue attributes
15015 + *
15016 + * Return:     '0' on Success; Error code otherwise.
15017 + */
15018 +int dpdcei_get_rx_queue(struct fsl_mc_io               *mc_io,
15019 +                       uint32_t                        cmd_flags,
15020 +                       uint16_t                        token,
15021 +                       struct dpdcei_rx_queue_attr     *attr);
15022 +
15023 +/**
15024 + * struct dpdcei_tx_queue_attr - Structure representing attributes of Tx queues
15025 + * @fqid: Virtual FQID to be used for sending frames to DCE hardware
15026 + */
15027 +struct dpdcei_tx_queue_attr {
15028 +       uint32_t fqid;
15029 +};
15030 +
15031 +/**
15032 + * dpdcei_get_tx_queue() - Retrieve Tx queue attributes.
15033 + * @mc_io: Pointer to MC portal's I/O object
15034 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15035 + * @token: Token of DPDCEI object
15036 + * @attr: Returned Tx queue attributes
15037 + *
15038 + * Return:     '0' on Success; Error code otherwise.
15039 + */
15040 +int dpdcei_get_tx_queue(struct fsl_mc_io               *mc_io,
15041 +                       uint32_t                        cmd_flags,
15042 +                       uint16_t                        token,
15043 +                       struct dpdcei_tx_queue_attr     *attr);
15044 +
15045 +#endif /* __FSL_DPDCEI_H */
15046 diff --git a/drivers/net/dpaa2/mc/fsl_dpdcei_cmd.h b/drivers/net/dpaa2/mc/fsl_dpdcei_cmd.h
15047 new file mode 100644
15048 index 0000000..8452d88
15049 --- /dev/null
15050 +++ b/drivers/net/dpaa2/mc/fsl_dpdcei_cmd.h
15051 @@ -0,0 +1,182 @@
15052 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
15053 + *
15054 + * Redistribution and use in source and binary forms, with or without
15055 + * modification, are permitted provided that the following conditions are met:
15056 + * * Redistributions of source code must retain the above copyright
15057 + * notice, this list of conditions and the following disclaimer.
15058 + * * Redistributions in binary form must reproduce the above copyright
15059 + * notice, this list of conditions and the following disclaimer in the
15060 + * documentation and/or other materials provided with the distribution.
15061 + * * Neither the name of the above-listed copyright holders nor the
15062 + * names of any contributors may be used to endorse or promote products
15063 + * derived from this software without specific prior written permission.
15064 + *
15065 + *
15066 + * ALTERNATIVELY, this software may be distributed under the terms of the
15067 + * GNU General Public License ("GPL") as published by the Free Software
15068 + * Foundation, either version 2 of that License or (at your option) any
15069 + * later version.
15070 + *
15071 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15072 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15073 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15074 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
15075 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
15076 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
15077 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
15078 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
15079 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
15080 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
15081 + * POSSIBILITY OF SUCH DAMAGE.
15082 + */
15083 +#ifndef _FSL_DPDCEI_CMD_H
15084 +#define _FSL_DPDCEI_CMD_H
15085 +
15086 +/* DPDCEI Version */
15087 +#define DPDCEI_VER_MAJOR                               1
15088 +#define DPDCEI_VER_MINOR                               2
15089 +
15090 +/* Command IDs */
15091 +#define DPDCEI_CMDID_CLOSE                             0x800
15092 +#define DPDCEI_CMDID_OPEN                              0x80D
15093 +#define DPDCEI_CMDID_CREATE                            0x90D
15094 +#define DPDCEI_CMDID_DESTROY                           0x900
15095 +
15096 +#define DPDCEI_CMDID_ENABLE                            0x002
15097 +#define DPDCEI_CMDID_DISABLE                           0x003
15098 +#define DPDCEI_CMDID_GET_ATTR                          0x004
15099 +#define DPDCEI_CMDID_RESET                             0x005
15100 +#define DPDCEI_CMDID_IS_ENABLED                                0x006
15101 +
15102 +#define DPDCEI_CMDID_SET_IRQ                           0x010
15103 +#define DPDCEI_CMDID_GET_IRQ                           0x011
15104 +#define DPDCEI_CMDID_SET_IRQ_ENABLE                    0x012
15105 +#define DPDCEI_CMDID_GET_IRQ_ENABLE                    0x013
15106 +#define DPDCEI_CMDID_SET_IRQ_MASK                      0x014
15107 +#define DPDCEI_CMDID_GET_IRQ_MASK                      0x015
15108 +#define DPDCEI_CMDID_GET_IRQ_STATUS                    0x016
15109 +#define DPDCEI_CMDID_CLEAR_IRQ_STATUS                  0x017
15110 +
15111 +#define DPDCEI_CMDID_SET_RX_QUEUE                      0x1B0
15112 +#define DPDCEI_CMDID_GET_RX_QUEUE                      0x1B1
15113 +#define DPDCEI_CMDID_GET_TX_QUEUE                      0x1B2
15114 +
15115 +/*                cmd, param, offset, width, type, arg_name */
15116 +#define DPDCEI_CMD_OPEN(cmd, dpdcei_id) \
15117 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpdcei_id)
15118 +
15119 +/*                cmd, param, offset, width, type, arg_name */
15120 +#define DPDCEI_CMD_CREATE(cmd, cfg) \
15121 +do { \
15122 +       MC_CMD_OP(cmd, 0, 8,  8,  enum dpdcei_engine,  cfg->engine);\
15123 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->priority);\
15124 +} while (0)
15125 +
15126 +/*                cmd, param, offset, width, type, arg_name */
15127 +#define DPDCEI_RSP_IS_ENABLED(cmd, en) \
15128 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
15129 +
15130 +/*                cmd, param, offset, width, type, arg_name */
15131 +#define DPDCEI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
15132 +do { \
15133 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
15134 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
15135 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
15136 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
15137 +} while (0)
15138 +
15139 +/*                cmd, param, offset, width, type, arg_name */
15140 +#define DPDCEI_CMD_GET_IRQ(cmd, irq_index) \
15141 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
15142 +
15143 +/*                cmd, param, offset, width, type, arg_name */
15144 +#define DPDCEI_RSP_GET_IRQ(cmd, type, irq_cfg) \
15145 +do { \
15146 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
15147 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
15148 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
15149 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
15150 +} while (0)
15151 +
15152 +/*                cmd, param, offset, width, type, arg_name */
15153 +#define DPDCEI_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
15154 +do { \
15155 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  enable_state); \
15156 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
15157 +} while (0)
15158 +
15159 +/*                cmd, param, offset, width, type, arg_name */
15160 +#define DPDCEI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
15161 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
15162 +
15163 +/*                cmd, param, offset, width, type, arg_name */
15164 +#define DPDCEI_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
15165 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  enable_state)
15166 +
15167 +/*                cmd, param, offset, width, type, arg_name */
15168 +#define DPDCEI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
15169 +do { \
15170 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
15171 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
15172 +} while (0)
15173 +
15174 +/*                cmd, param, offset, width, type, arg_name */
15175 +#define DPDCEI_CMD_GET_IRQ_MASK(cmd, irq_index) \
15176 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
15177 +
15178 +/*                cmd, param, offset, width, type, arg_name */
15179 +#define DPDCEI_RSP_GET_IRQ_MASK(cmd, mask) \
15180 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
15181 +
15182 +/*                cmd, param, offset, width, type, arg_name */
15183 +#define DPDCEI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
15184 +do { \
15185 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
15186 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
15187 +} while (0)
15188 +
15189 +/*                cmd, param, offset, width, type, arg_name */
15190 +#define DPDCEI_RSP_GET_IRQ_STATUS(cmd, status) \
15191 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t,  status)
15192 +
15193 +/*                cmd, param, offset, width, type, arg_name */
15194 +#define DPDCEI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
15195 +do { \
15196 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
15197 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
15198 +} while (0)
15199 +
15200 +/*                cmd, param, offset, width, type, arg_name */
15201 +#define DPDCEI_RSP_GET_ATTR(cmd, attr) \
15202 +do { \
15203 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id); \
15204 +       MC_RSP_OP(cmd, 0, 32,  8,  enum dpdcei_engine,  attr->engine); \
15205 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
15206 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
15207 +} while (0)
15208 +
15209 +/*                cmd, param, offset, width, type, arg_name */
15210 +#define DPDCEI_CMD_SET_RX_QUEUE(cmd, cfg) \
15211 +do { \
15212 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dest_cfg.dest_id); \
15213 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dest_cfg.priority); \
15214 +       MC_CMD_OP(cmd, 0, 48, 4,  enum dpdcei_dest, cfg->dest_cfg.dest_type); \
15215 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx); \
15216 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->options);\
15217 +} while (0)
15218 +
15219 +/*                cmd, param, offset, width, type, arg_name */
15220 +#define DPDCEI_RSP_GET_RX_QUEUE(cmd, attr) \
15221 +do { \
15222 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->dest_cfg.dest_id);\
15223 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->dest_cfg.priority);\
15224 +       MC_RSP_OP(cmd, 0, 48, 4,  enum dpdcei_dest, attr->dest_cfg.dest_type);\
15225 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t,  attr->user_ctx);\
15226 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t,  attr->fqid);\
15227 +} while (0)
15228 +
15229 +/*                cmd, param, offset, width, type, arg_name */
15230 +#define DPDCEI_RSP_GET_TX_QUEUE(cmd, attr) \
15231 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t,  attr->fqid)
15232 +
15233 +#endif /* _FSL_DPDCEI_CMD_H */
15234 diff --git a/drivers/net/dpaa2/mc/fsl_dpdmai.h b/drivers/net/dpaa2/mc/fsl_dpdmai.h
15235 new file mode 100644
15236 index 0000000..e931ce1
15237 --- /dev/null
15238 +++ b/drivers/net/dpaa2/mc/fsl_dpdmai.h
15239 @@ -0,0 +1,521 @@
15240 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
15241 + *
15242 + * Redistribution and use in source and binary forms, with or without
15243 + * modification, are permitted provided that the following conditions are met:
15244 + * * Redistributions of source code must retain the above copyright
15245 + * notice, this list of conditions and the following disclaimer.
15246 + * * Redistributions in binary form must reproduce the above copyright
15247 + * notice, this list of conditions and the following disclaimer in the
15248 + * documentation and/or other materials provided with the distribution.
15249 + * * Neither the name of the above-listed copyright holders nor the
15250 + * names of any contributors may be used to endorse or promote products
15251 + * derived from this software without specific prior written permission.
15252 + *
15253 + *
15254 + * ALTERNATIVELY, this software may be distributed under the terms of the
15255 + * GNU General Public License ("GPL") as published by the Free Software
15256 + * Foundation, either version 2 of that License or (at your option) any
15257 + * later version.
15258 + *
15259 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15260 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15261 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15262 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
15263 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
15264 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
15265 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
15266 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
15267 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
15268 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
15269 + * POSSIBILITY OF SUCH DAMAGE.
15270 + */
15271 +#ifndef __FSL_DPDMAI_H
15272 +#define __FSL_DPDMAI_H
15273 +
15274 +struct fsl_mc_io;
15275 +
15276 +/* Data Path DMA Interface API
15277 + * Contains initialization APIs and runtime control APIs for DPDMAI
15278 + */
15279 +
15280 +/* General DPDMAI macros */
15281 +
15282 +/**
15283 + * Maximum number of Tx/Rx priorities per DPDMAI object
15284 + */
15285 +#define DPDMAI_PRIO_NUM                2
15286 +
15287 +/**
15288 + * All queues considered; see dpdmai_set_rx_queue()
15289 + */
15290 +#define DPDMAI_ALL_QUEUES      (uint8_t)(-1)
15291 +
15292 +/**
15293 + * dpdmai_open() - Open a control session for the specified object
15294 + * @mc_io:     Pointer to MC portal's I/O object
15295 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15296 + * @dpdmai_id: DPDMAI unique ID
15297 + * @token:     Returned token; use in subsequent API calls
15298 + *
15299 + * This function can be used to open a control session for an
15300 + * already created object; an object may have been declared in
15301 + * the DPL or by calling the dpdmai_create() function.
15302 + * This function returns a unique authentication token,
15303 + * associated with the specific object ID and the specific MC
15304 + * portal; this token must be used in all subsequent commands for
15305 + * this specific object.
15306 + *
15307 + * Return:     '0' on Success; Error code otherwise.
15308 + */
15309 +int dpdmai_open(struct fsl_mc_io       *mc_io,
15310 +               uint32_t                cmd_flags,
15311 +               int                     dpdmai_id,
15312 +               uint16_t                *token);
15313 +
15314 +/**
15315 + * dpdmai_close() - Close the control session of the object
15316 + * @mc_io:     Pointer to MC portal's I/O object
15317 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15318 + * @token:     Token of DPDMAI object
15319 + *
15320 + * After this function is called, no further operations are
15321 + * allowed on the object without opening a new control session.
15322 + *
15323 + * Return:     '0' on Success; Error code otherwise.
15324 + */
15325 +int dpdmai_close(struct fsl_mc_io      *mc_io,
15326 +                uint32_t               cmd_flags,
15327 +                uint16_t               token);
15328 +
15329 +/**
15330 + * struct dpdmai_cfg - Structure representing DPDMAI configuration
15331 + * @priorities: Priorities for the DMA hardware processing; valid priorities are
15332 + *     configured with values 1-8; the entry following last valid entry
15333 + *     should be configured with 0
15334 + */
15335 +struct dpdmai_cfg {
15336 +       uint8_t priorities[DPDMAI_PRIO_NUM];
15337 +};
15338 +
15339 +/**
15340 + * dpdmai_create() - Create the DPDMAI object
15341 + * @mc_io:     Pointer to MC portal's I/O object
15342 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15343 + * @cfg:       Configuration structure
15344 + * @token:     Returned token; use in subsequent API calls
15345 + *
15346 + * Create the DPDMAI object, allocate required resources and
15347 + * perform required initialization.
15348 + *
15349 + * The object can be created either by declaring it in the
15350 + * DPL file, or by calling this function.
15351 + *
15352 + * This function returns a unique authentication token,
15353 + * associated with the specific object ID and the specific MC
15354 + * portal; this token must be used in all subsequent calls to
15355 + * this specific object. For objects that are created using the
15356 + * DPL file, call dpdmai_open() function to get an authentication
15357 + * token first.
15358 + *
15359 + * Return:     '0' on Success; Error code otherwise.
15360 + */
15361 +int dpdmai_create(struct fsl_mc_io             *mc_io,
15362 +                 uint32_t                      cmd_flags,
15363 +                 const struct dpdmai_cfg       *cfg,
15364 +                 uint16_t                      *token);
15365 +
15366 +/**
15367 + * dpdmai_destroy() - Destroy the DPDMAI object and release all its resources.
15368 + * @mc_io:     Pointer to MC portal's I/O object
15369 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15370 + * @token:     Token of DPDMAI object
15371 + *
15372 + * Return:     '0' on Success; error code otherwise.
15373 + */
15374 +int dpdmai_destroy(struct fsl_mc_io    *mc_io,
15375 +                  uint32_t             cmd_flags,
15376 +                  uint16_t             token);
15377 +
15378 +/**
15379 + * dpdmai_enable() - Enable the DPDMAI, allow sending and receiving frames.
15380 + * @mc_io:     Pointer to MC portal's I/O object
15381 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15382 + * @token:     Token of DPDMAI object
15383 + *
15384 + * Return:     '0' on Success; Error code otherwise.
15385 + */
15386 +int dpdmai_enable(struct fsl_mc_io     *mc_io,
15387 +                 uint32_t              cmd_flags,
15388 +                 uint16_t              token);
15389 +
15390 +/**
15391 + * dpdmai_disable() - Disable the DPDMAI, stop sending and receiving frames.
15392 + * @mc_io:     Pointer to MC portal's I/O object
15393 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15394 + * @token:     Token of DPDMAI object
15395 + *
15396 + * Return:     '0' on Success; Error code otherwise.
15397 + */
15398 +int dpdmai_disable(struct fsl_mc_io    *mc_io,
15399 +                  uint32_t             cmd_flags,
15400 +                  uint16_t             token);
15401 +
15402 +/**
15403 + * dpdmai_is_enabled() - Check if the DPDMAI is enabled.
15404 + * @mc_io:     Pointer to MC portal's I/O object
15405 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15406 + * @token:     Token of DPDMAI object
15407 + * @en:                Returns '1' if object is enabled; '0' otherwise
15408 + *
15409 + * Return:     '0' on Success; Error code otherwise.
15410 + */
15411 +int dpdmai_is_enabled(struct fsl_mc_io *mc_io,
15412 +                     uint32_t          cmd_flags,
15413 +                     uint16_t          token,
15414 +                     int               *en);
15415 +
15416 +/**
15417 + * dpdmai_reset() - Reset the DPDMAI, returns the object to initial state.
15418 + * @mc_io:     Pointer to MC portal's I/O object
15419 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15420 + * @token:     Token of DPDMAI object
15421 + *
15422 + * Return:     '0' on Success; Error code otherwise.
15423 + */
15424 +int dpdmai_reset(struct fsl_mc_io      *mc_io,
15425 +                uint32_t               cmd_flags,
15426 +                uint16_t               token);
15427 +
15428 +/**
15429 + * struct dpdmai_irq_cfg - IRQ configuration
15430 + * @addr:      Address that must be written to signal a message-based interrupt
15431 + * @val:       Value to write into irq_addr address
15432 + * @irq_num: A user defined number associated with this IRQ
15433 + */
15434 +struct dpdmai_irq_cfg {
15435 +            uint64_t           addr;
15436 +            uint32_t           val;
15437 +            int                irq_num;
15438 +};
15439 +
15440 +/**
15441 + * dpdmai_set_irq() - Set IRQ information for the DPDMAI to trigger an interrupt.
15442 + * @mc_io:     Pointer to MC portal's I/O object
15443 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15444 + * @token:     Token of DPDMAI object
15445 + * @irq_index: Identifies the interrupt index to configure
15446 + * @irq_cfg:   IRQ configuration
15447 + *
15448 + * Return:     '0' on Success; Error code otherwise.
15449 + */
15450 +int dpdmai_set_irq(struct fsl_mc_io            *mc_io,
15451 +                  uint32_t                     cmd_flags,
15452 +                  uint16_t                     token,
15453 +                  uint8_t                      irq_index,
15454 +                  struct dpdmai_irq_cfg        *irq_cfg);
15455 +
15456 +/**
15457 + * dpdmai_get_irq() - Get IRQ information from the DPDMAI
15458 + *
15459 + * @mc_io:     Pointer to MC portal's I/O object
15460 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15461 + * @token:     Token of DPDMAI object
15462 + * @irq_index: The interrupt index to configure
15463 + * @type:      Interrupt type: 0 represents message interrupt
15464 + *             type (both irq_addr and irq_val are valid)
15465 + * @irq_cfg:   IRQ attributes
15466 + *
15467 + * Return:     '0' on Success; Error code otherwise.
15468 + */
15469 +int dpdmai_get_irq(struct fsl_mc_io            *mc_io,
15470 +                  uint32_t                     cmd_flags,
15471 +                  uint16_t                     token,
15472 +                  uint8_t                      irq_index,
15473 +                  int                          *type,
15474 +                  struct dpdmai_irq_cfg        *irq_cfg);
15475 +
15476 +/**
15477 + * dpdmai_set_irq_enable() - Set overall interrupt state.
15478 + * @mc_io:     Pointer to MC portal's I/O object
15479 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15480 + * @token:             Token of DPDMAI object
15481 + * @irq_index: The interrupt index to configure
15482 + * @en:                        Interrupt state - enable = 1, disable = 0
15483 + *
15484 + * Allows GPP software to control when interrupts are generated.
15485 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
15486 + * overall interrupt state. if the interrupt is disabled no causes will cause
15487 + * an interrupt
15488 + *
15489 + * Return:     '0' on Success; Error code otherwise.
15490 + */
15491 +int dpdmai_set_irq_enable(struct fsl_mc_io     *mc_io,
15492 +                         uint32_t              cmd_flags,
15493 +                         uint16_t              token,
15494 +                         uint8_t               irq_index,
15495 +                         uint8_t               en);
15496 +
15497 +/**
15498 + * dpdmai_get_irq_enable() - Get overall interrupt state
15499 + * @mc_io:     Pointer to MC portal's I/O object
15500 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15501 + * @token:             Token of DPDMAI object
15502 + * @irq_index: The interrupt index to configure
15503 + * @en:                        Returned Interrupt state - enable = 1, disable = 0
15504 + *
15505 + * Return:     '0' on Success; Error code otherwise.
15506 + */
15507 +int dpdmai_get_irq_enable(struct fsl_mc_io     *mc_io,
15508 +                         uint32_t              cmd_flags,
15509 +                         uint16_t              token,
15510 +                         uint8_t               irq_index,
15511 +                         uint8_t               *en);
15512 +
15513 +/**
15514 + * dpdmai_set_irq_mask() - Set interrupt mask.
15515 + * @mc_io:     Pointer to MC portal's I/O object
15516 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15517 + * @token:             Token of DPDMAI object
15518 + * @irq_index: The interrupt index to configure
15519 + * @mask:              event mask to trigger interrupt;
15520 + *                             each bit:
15521 + *                                     0 = ignore event
15522 + *                                     1 = consider event for asserting IRQ
15523 + *
15524 + * Every interrupt can have up to 32 causes and the interrupt model supports
15525 + * masking/unmasking each cause independently
15526 + *
15527 + * Return:     '0' on Success; Error code otherwise.
15528 + */
15529 +int dpdmai_set_irq_mask(struct fsl_mc_io       *mc_io,
15530 +                       uint32_t                cmd_flags,
15531 +                       uint16_t                token,
15532 +                       uint8_t         irq_index,
15533 +                       uint32_t                mask);
15534 +
15535 +/**
15536 + * dpdmai_get_irq_mask() - Get interrupt mask.
15537 + * @mc_io:     Pointer to MC portal's I/O object
15538 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15539 + * @token:             Token of DPDMAI object
15540 + * @irq_index: The interrupt index to configure
15541 + * @mask:              Returned event mask to trigger interrupt
15542 + *
15543 + * Every interrupt can have up to 32 causes and the interrupt model supports
15544 + * masking/unmasking each cause independently
15545 + *
15546 + * Return:     '0' on Success; Error code otherwise.
15547 + */
15548 +int dpdmai_get_irq_mask(struct fsl_mc_io       *mc_io,
15549 +                       uint32_t                cmd_flags,
15550 +                       uint16_t                token,
15551 +                       uint8_t         irq_index,
15552 +                       uint32_t                *mask);
15553 +
15554 +/**
15555 + * dpdmai_get_irq_status() - Get the current status of any pending interrupts
15556 + * @mc_io:     Pointer to MC portal's I/O object
15557 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15558 + * @token:             Token of DPDMAI object
15559 + * @irq_index: The interrupt index to configure
15560 + * @status:            Returned interrupts status - one bit per cause:
15561 + *                                     0 = no interrupt pending
15562 + *                                     1 = interrupt pending
15563 + *
15564 + * Return:     '0' on Success; Error code otherwise.
15565 + */
15566 +int dpdmai_get_irq_status(struct fsl_mc_io     *mc_io,
15567 +                         uint32_t              cmd_flags,
15568 +                         uint16_t              token,
15569 +                         uint8_t               irq_index,
15570 +                         uint32_t              *status);
15571 +
15572 +/**
15573 + * dpdmai_clear_irq_status() - Clear a pending interrupt's status
15574 + * @mc_io:     Pointer to MC portal's I/O object
15575 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15576 + * @token:     Token of DPDMAI object
15577 + * @irq_index: The interrupt index to configure
15578 + * @status:    bits to clear (W1C) - one bit per cause:
15579 + *                     0 = don't change
15580 + *                     1 = clear status bit
15581 + *
15582 + * Return:     '0' on Success; Error code otherwise.
15583 + */
15584 +int dpdmai_clear_irq_status(struct fsl_mc_io   *mc_io,
15585 +                           uint32_t            cmd_flags,
15586 +                           uint16_t            token,
15587 +                           uint8_t             irq_index,
15588 +                           uint32_t            status);
15589 +
15590 +/**
15591 + * struct dpdmai_attr - Structure representing DPDMAI attributes
15592 + * @id: DPDMAI object ID
15593 + * @version: DPDMAI version
15594 + * @num_of_priorities: number of priorities
15595 + */
15596 +struct dpdmai_attr {
15597 +       int     id;
15598 +       /**
15599 +        * struct version - DPDMAI version
15600 +        * @major: DPDMAI major version
15601 +        * @minor: DPDMAI minor version
15602 +        */
15603 +       struct {
15604 +               uint16_t major;
15605 +               uint16_t minor;
15606 +       } version;
15607 +       uint8_t num_of_priorities;
15608 +};
15609 +
15610 +/**
15611 + * dpdmai_get_attributes() - Retrieve DPDMAI attributes.
15612 + * @mc_io:     Pointer to MC portal's I/O object
15613 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15614 + * @token:     Token of DPDMAI object
15615 + * @attr:      Returned object's attributes
15616 + *
15617 + * Return:     '0' on Success; Error code otherwise.
15618 + */
15619 +int dpdmai_get_attributes(struct fsl_mc_io     *mc_io,
15620 +                         uint32_t              cmd_flags,
15621 +                         uint16_t              token,
15622 +                         struct dpdmai_attr    *attr);
15623 +
15624 +/**
15625 + * enum dpdmai_dest - DPDMAI destination types
15626 + * @DPDMAI_DEST_NONE: Unassigned destination; The queue is set in parked mode
15627 + *     and does not generate FQDAN notifications; user is expected to dequeue
15628 + *     from the queue based on polling or other user-defined method
15629 + * @DPDMAI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN
15630 + *     notifications to the specified DPIO; user is expected to dequeue
15631 + *     from the queue only after notification is received
15632 + * @DPDMAI_DEST_DPCON: The queue is set in schedule mode and does not generate
15633 + *     FQDAN notifications, but is connected to the specified DPCON object;
15634 + *     user is expected to dequeue from the DPCON channel
15635 + */
15636 +enum dpdmai_dest {
15637 +       DPDMAI_DEST_NONE = 0,
15638 +       DPDMAI_DEST_DPIO = 1,
15639 +       DPDMAI_DEST_DPCON = 2
15640 +};
15641 +
15642 +/**
15643 + * struct dpdmai_dest_cfg - Structure representing DPDMAI destination parameters
15644 + * @dest_type: Destination type
15645 + * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
15646 + * @priority: Priority selection within the DPIO or DPCON channel; valid values
15647 + *     are 0-1 or 0-7, depending on the number of priorities in that
15648 + *     channel; not relevant for 'DPDMAI_DEST_NONE' option
15649 + */
15650 +struct dpdmai_dest_cfg {
15651 +       enum dpdmai_dest        dest_type;
15652 +       int                     dest_id;
15653 +       uint8_t         priority;
15654 +};
15655 +
15656 +/* DPDMAI queue modification options */
15657 +
15658 +/**
15659 + * Select to modify the user's context associated with the queue
15660 + */
15661 +#define DPDMAI_QUEUE_OPT_USER_CTX      0x00000001
15662 +
15663 +/**
15664 + * Select to modify the queue's destination
15665 + */
15666 +#define DPDMAI_QUEUE_OPT_DEST          0x00000002
15667 +
15668 +/**
15669 + * struct dpdmai_rx_queue_cfg - DPDMAI RX queue configuration
15670 + * @options: Flags representing the suggested modifications to the queue;
15671 + *     Use any combination of 'DPDMAI_QUEUE_OPT_<X>' flags
15672 + * @user_ctx: User context value provided in the frame descriptor of each
15673 + *     dequeued frame;
15674 + *     valid only if 'DPDMAI_QUEUE_OPT_USER_CTX' is contained in 'options'
15675 + * @dest_cfg: Queue destination parameters;
15676 + *     valid only if 'DPDMAI_QUEUE_OPT_DEST' is contained in 'options'
15677 + */
15678 +struct dpdmai_rx_queue_cfg {
15679 +       uint32_t                options;
15680 +       uint64_t                user_ctx;
15681 +       struct dpdmai_dest_cfg  dest_cfg;
15682 +
15683 +};
15684 +
15685 +/**
15686 + * dpdmai_set_rx_queue() - Set Rx queue configuration
15687 + * @mc_io:     Pointer to MC portal's I/O object
15688 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15689 + * @token:     Token of DPDMAI object
15690 + * @priority:  Select the queue relative to number of
15691 + *                     priorities configured at DPDMAI creation; use
15692 + *                     DPDMAI_ALL_QUEUES to configure all Rx queues
15693 + *                     identically.
15694 + * @cfg:       Rx queue configuration
15695 + *
15696 + * Return:     '0' on Success; Error code otherwise.
15697 + */
15698 +int dpdmai_set_rx_queue(struct fsl_mc_io                       *mc_io,
15699 +                       uint32_t                                cmd_flags,
15700 +                       uint16_t                                token,
15701 +                       uint8_t                                 priority,
15702 +                       const struct dpdmai_rx_queue_cfg        *cfg);
15703 +
15704 +/**
15705 + * struct dpdmai_rx_queue_attr - Structure representing attributes of Rx queues
15706 + * @user_ctx:  User context value provided in the frame descriptor of each
15707 + *      dequeued frame
15708 + * @dest_cfg: Queue destination configuration
15709 + * @fqid: Virtual FQID value to be used for dequeue operations
15710 + */
15711 +struct dpdmai_rx_queue_attr {
15712 +       uint64_t                user_ctx;
15713 +       struct dpdmai_dest_cfg  dest_cfg;
15714 +       uint32_t                fqid;
15715 +};
15716 +
15717 +/**
15718 + * dpdmai_get_rx_queue() - Retrieve Rx queue attributes.
15719 + * @mc_io:     Pointer to MC portal's I/O object
15720 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15721 + * @token:     Token of DPDMAI object
15722 + * @priority:  Select the queue relative to number of
15723 + *                             priorities configured at DPDMAI creation
15724 + * @attr:      Returned Rx queue attributes
15725 + *
15726 + * Return:     '0' on Success; Error code otherwise.
15727 + */
15728 +int dpdmai_get_rx_queue(struct fsl_mc_io               *mc_io,
15729 +                       uint32_t                        cmd_flags,
15730 +                       uint16_t                        token,
15731 +                       uint8_t                         priority,
15732 +                       struct dpdmai_rx_queue_attr     *attr);
15733 +
15734 +/**
15735 + * struct dpdmai_tx_queue_attr - Structure representing attributes of Tx queues
15736 + * @fqid: Virtual FQID to be used for sending frames to DMA hardware
15737 + */
15738 +
15739 +struct dpdmai_tx_queue_attr {
15740 +       uint32_t fqid;
15741 +};
15742 +
15743 +/**
15744 + * dpdmai_get_tx_queue() - Retrieve Tx queue attributes.
15745 + * @mc_io:     Pointer to MC portal's I/O object
15746 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
15747 + * @token:     Token of DPDMAI object
15748 + * @priority:  Select the queue relative to number of
15749 + *                     priorities configured at DPDMAI creation
15750 + * @attr:      Returned Tx queue attributes
15751 + *
15752 + * Return:     '0' on Success; Error code otherwise.
15753 + */
15754 +int dpdmai_get_tx_queue(struct fsl_mc_io               *mc_io,
15755 +                       uint32_t                        cmd_flags,
15756 +                       uint16_t                        token,
15757 +                       uint8_t                         priority,
15758 +                       struct dpdmai_tx_queue_attr     *attr);
15759 +
15760 +#endif /* __FSL_DPDMAI_H */
15761 diff --git a/drivers/net/dpaa2/mc/fsl_dpdmai_cmd.h b/drivers/net/dpaa2/mc/fsl_dpdmai_cmd.h
15762 new file mode 100644
15763 index 0000000..7c4a31a
15764 --- /dev/null
15765 +++ b/drivers/net/dpaa2/mc/fsl_dpdmai_cmd.h
15766 @@ -0,0 +1,191 @@
15767 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
15768 + *
15769 + * Redistribution and use in source and binary forms, with or without
15770 + * modification, are permitted provided that the following conditions are met:
15771 + * * Redistributions of source code must retain the above copyright
15772 + * notice, this list of conditions and the following disclaimer.
15773 + * * Redistributions in binary form must reproduce the above copyright
15774 + * notice, this list of conditions and the following disclaimer in the
15775 + * documentation and/or other materials provided with the distribution.
15776 + * * Neither the name of the above-listed copyright holders nor the
15777 + * names of any contributors may be used to endorse or promote products
15778 + * derived from this software without specific prior written permission.
15779 + *
15780 + *
15781 + * ALTERNATIVELY, this software may be distributed under the terms of the
15782 + * GNU General Public License ("GPL") as published by the Free Software
15783 + * Foundation, either version 2 of that License or (at your option) any
15784 + * later version.
15785 + *
15786 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15787 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15788 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15789 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
15790 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
15791 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
15792 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
15793 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
15794 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
15795 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
15796 + * POSSIBILITY OF SUCH DAMAGE.
15797 + */
15798 +#ifndef _FSL_DPDMAI_CMD_H
15799 +#define _FSL_DPDMAI_CMD_H
15800 +
15801 +/* DPDMAI Version */
15802 +#define DPDMAI_VER_MAJOR                               2
15803 +#define DPDMAI_VER_MINOR                               2
15804 +
15805 +/* Command IDs */
15806 +#define DPDMAI_CMDID_CLOSE                             0x800
15807 +#define DPDMAI_CMDID_OPEN                              0x80E
15808 +#define DPDMAI_CMDID_CREATE                            0x90E
15809 +#define DPDMAI_CMDID_DESTROY                           0x900
15810 +
15811 +#define DPDMAI_CMDID_ENABLE                            0x002
15812 +#define DPDMAI_CMDID_DISABLE                           0x003
15813 +#define DPDMAI_CMDID_GET_ATTR                          0x004
15814 +#define DPDMAI_CMDID_RESET                             0x005
15815 +#define DPDMAI_CMDID_IS_ENABLED                                0x006
15816 +
15817 +#define DPDMAI_CMDID_SET_IRQ                           0x010
15818 +#define DPDMAI_CMDID_GET_IRQ                           0x011
15819 +#define DPDMAI_CMDID_SET_IRQ_ENABLE                    0x012
15820 +#define DPDMAI_CMDID_GET_IRQ_ENABLE                    0x013
15821 +#define DPDMAI_CMDID_SET_IRQ_MASK                      0x014
15822 +#define DPDMAI_CMDID_GET_IRQ_MASK                      0x015
15823 +#define DPDMAI_CMDID_GET_IRQ_STATUS                    0x016
15824 +#define DPDMAI_CMDID_CLEAR_IRQ_STATUS                  0x017
15825 +
15826 +#define DPDMAI_CMDID_SET_RX_QUEUE                      0x1A0
15827 +#define DPDMAI_CMDID_GET_RX_QUEUE                      0x1A1
15828 +#define DPDMAI_CMDID_GET_TX_QUEUE                      0x1A2
15829 +
15830 +/*                cmd, param, offset, width, type, arg_name */
15831 +#define DPDMAI_CMD_OPEN(cmd, dpdmai_id) \
15832 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpdmai_id)
15833 +
15834 +/*                cmd, param, offset, width, type, arg_name */
15835 +#define DPDMAI_CMD_CREATE(cmd, cfg) \
15836 +do { \
15837 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  cfg->priorities[0]);\
15838 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->priorities[1]);\
15839 +} while (0)
15840 +
15841 +/*                cmd, param, offset, width, type, arg_name */
15842 +#define DPDMAI_RSP_IS_ENABLED(cmd, en) \
15843 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
15844 +
15845 +/*                cmd, param, offset, width, type, arg_name */
15846 +#define DPDMAI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
15847 +do { \
15848 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
15849 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
15850 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
15851 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
15852 +} while (0)
15853 +
15854 +/*                cmd, param, offset, width, type, arg_name */
15855 +#define DPDMAI_CMD_GET_IRQ(cmd, irq_index) \
15856 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
15857 +
15858 +/*                cmd, param, offset, width, type, arg_name */
15859 +#define DPDMAI_RSP_GET_IRQ(cmd, type, irq_cfg) \
15860 +do { \
15861 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
15862 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
15863 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
15864 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
15865 +} while (0)
15866 +
15867 +/*                cmd, param, offset, width, type, arg_name */
15868 +#define DPDMAI_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
15869 +do { \
15870 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  enable_state); \
15871 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
15872 +} while (0)
15873 +
15874 +/*                cmd, param, offset, width, type, arg_name */
15875 +#define DPDMAI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
15876 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
15877 +
15878 +/*                cmd, param, offset, width, type, arg_name */
15879 +#define DPDMAI_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
15880 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  enable_state)
15881 +
15882 +/*                cmd, param, offset, width, type, arg_name */
15883 +#define DPDMAI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
15884 +do { \
15885 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
15886 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
15887 +} while (0)
15888 +
15889 +/*                cmd, param, offset, width, type, arg_name */
15890 +#define DPDMAI_CMD_GET_IRQ_MASK(cmd, irq_index) \
15891 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
15892 +
15893 +/*                cmd, param, offset, width, type, arg_name */
15894 +#define DPDMAI_RSP_GET_IRQ_MASK(cmd, mask) \
15895 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
15896 +
15897 +/*                cmd, param, offset, width, type, arg_name */
15898 +#define DPDMAI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
15899 +do { \
15900 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
15901 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
15902 +} while (0)
15903 +
15904 +/*                cmd, param, offset, width, type, arg_name */
15905 +#define DPDMAI_RSP_GET_IRQ_STATUS(cmd, status) \
15906 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t,  status)
15907 +
15908 +/*                cmd, param, offset, width, type, arg_name */
15909 +#define DPDMAI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
15910 +do { \
15911 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
15912 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
15913 +} while (0)
15914 +
15915 +/*                cmd, param, offset, width, type, arg_name */
15916 +#define DPDMAI_RSP_GET_ATTR(cmd, attr) \
15917 +do { \
15918 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id); \
15919 +       MC_RSP_OP(cmd, 0, 32,  8,  uint8_t,  attr->num_of_priorities); \
15920 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
15921 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
15922 +} while (0)
15923 +
15924 +/*                cmd, param, offset, width, type, arg_name */
15925 +#define DPDMAI_CMD_SET_RX_QUEUE(cmd, priority, cfg) \
15926 +do { \
15927 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dest_cfg.dest_id); \
15928 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dest_cfg.priority); \
15929 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  priority); \
15930 +       MC_CMD_OP(cmd, 0, 48, 4,  enum dpdmai_dest, cfg->dest_cfg.dest_type); \
15931 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx); \
15932 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->options);\
15933 +} while (0)
15934 +
15935 +/*                cmd, param, offset, width, type, arg_name */
15936 +#define DPDMAI_CMD_GET_RX_QUEUE(cmd, priority) \
15937 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  priority)
15938 +
15939 +/*                cmd, param, offset, width, type, arg_name */
15940 +#define DPDMAI_RSP_GET_RX_QUEUE(cmd, attr) \
15941 +do { \
15942 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->dest_cfg.dest_id);\
15943 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->dest_cfg.priority);\
15944 +       MC_RSP_OP(cmd, 0, 48, 4,  enum dpdmai_dest, attr->dest_cfg.dest_type);\
15945 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t,  attr->user_ctx);\
15946 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t,  attr->fqid);\
15947 +} while (0)
15948 +
15949 +/*                cmd, param, offset, width, type, arg_name */
15950 +#define DPDMAI_CMD_GET_TX_QUEUE(cmd, priority) \
15951 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  priority)
15952 +
15953 +/*                cmd, param, offset, width, type, arg_name */
15954 +#define DPDMAI_RSP_GET_TX_QUEUE(cmd, attr) \
15955 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t,  attr->fqid)
15956 +
15957 +#endif /* _FSL_DPDMAI_CMD_H */
15958 diff --git a/drivers/net/dpaa2/mc/fsl_dpdmux.h b/drivers/net/dpaa2/mc/fsl_dpdmux.h
15959 new file mode 100644
15960 index 0000000..455a042
15961 --- /dev/null
15962 +++ b/drivers/net/dpaa2/mc/fsl_dpdmux.h
15963 @@ -0,0 +1,724 @@
15964 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
15965 + *
15966 + * Redistribution and use in source and binary forms, with or without
15967 + * modification, are permitted provided that the following conditions are met:
15968 + * * Redistributions of source code must retain the above copyright
15969 + * notice, this list of conditions and the following disclaimer.
15970 + * * Redistributions in binary form must reproduce the above copyright
15971 + * notice, this list of conditions and the following disclaimer in the
15972 + * documentation and/or other materials provided with the distribution.
15973 + * * Neither the name of the above-listed copyright holders nor the
15974 + * names of any contributors may be used to endorse or promote products
15975 + * derived from this software without specific prior written permission.
15976 + *
15977 + *
15978 + * ALTERNATIVELY, this software may be distributed under the terms of the
15979 + * GNU General Public License ("GPL") as published by the Free Software
15980 + * Foundation, either version 2 of that License or (at your option) any
15981 + * later version.
15982 + *
15983 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15984 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15985 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15986 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
15987 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
15988 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
15989 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
15990 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
15991 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
15992 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
15993 + * POSSIBILITY OF SUCH DAMAGE.
15994 + */
15995 +#ifndef __FSL_DPDMUX_H
15996 +#define __FSL_DPDMUX_H
15997 +
15998 +#include <fsl_net.h>
15999 +
16000 +struct fsl_mc_io;
16001 +
16002 +/* Data Path Demux API
16003 + * Contains API for handling DPDMUX topology and functionality
16004 + */
16005 +
16006 +/**
16007 + * dpdmux_open() - Open a control session for the specified object
16008 + * @mc_io:     Pointer to MC portal's I/O object
16009 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16010 + * @dpdmux_id:         DPDMUX unique ID
16011 + * @token:             Returned token; use in subsequent API calls
16012 + *
16013 + * This function can be used to open a control session for an
16014 + * already created object; an object may have been declared in
16015 + * the DPL or by calling the dpdmux_create() function.
16016 + * This function returns a unique authentication token,
16017 + * associated with the specific object ID and the specific MC
16018 + * portal; this token must be used in all subsequent commands for
16019 + * this specific object.
16020 + *
16021 + * Return:     '0' on Success; Error code otherwise.
16022 + */
16023 +int dpdmux_open(struct fsl_mc_io        *mc_io,
16024 +               uint32_t                 cmd_flags,
16025 +               int                      dpdmux_id,
16026 +               uint16_t                 *token);
16027 +
16028 +/**
16029 + * dpdmux_close() - Close the control session of the object
16030 + * @mc_io:     Pointer to MC portal's I/O object
16031 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16032 + * @token:             Token of DPDMUX object
16033 + *
16034 + * After this function is called, no further operations are
16035 + * allowed on the object without opening a new control session.
16036 + *
16037 + * Return:     '0' on Success; Error code otherwise.
16038 + */
16039 +int dpdmux_close(struct fsl_mc_io      *mc_io,
16040 +                uint32_t               cmd_flags,
16041 +                uint16_t               token);
16042 +
16043 +/**
16044 + * DPDMUX general options
16045 + */
16046 +
16047 +/**
16048 + * Enable bridging between internal interfaces
16049 + */
16050 +#define DPDMUX_OPT_BRIDGE_EN           0x0000000000000002ULL
16051 +
16052 +#define DPDMUX_IRQ_INDEX_IF                    0x0000
16053 +#define DPDMUX_IRQ_INDEX               0x0001
16054 +
16055 +/**
16056 + * IRQ event - Indicates that the link state changed
16057 + */
16058 +#define DPDMUX_IRQ_EVENT_LINK_CHANGED  0x0001
16059 +
16060 +/**
16061 + * enum dpdmux_manip - DPDMUX manipulation operations
16062 + * @DPDMUX_MANIP_NONE: No manipulation on frames
16063 + * @DPDMUX_MANIP_ADD_REMOVE_S_VLAN: Add S-VLAN on egress, remove it on ingress
16064 + */
16065 +enum dpdmux_manip {
16066 +       DPDMUX_MANIP_NONE = 0x0,
16067 +       DPDMUX_MANIP_ADD_REMOVE_S_VLAN = 0x1
16068 +};
16069 +
16070 +/**
16071 + * enum dpdmux_method - DPDMUX method options
16072 + * @DPDMUX_METHOD_NONE: no DPDMUX method
16073 + * @DPDMUX_METHOD_C_VLAN_MAC: DPDMUX based on C-VLAN and MAC address
16074 + * @DPDMUX_METHOD_MAC: DPDMUX based on MAC address
16075 + * @DPDMUX_METHOD_C_VLAN: DPDMUX based on C-VLAN
16076 + * @DPDMUX_METHOD_S_VLAN: DPDMUX based on S-VLAN
16077 + */
16078 +enum dpdmux_method {
16079 +       DPDMUX_METHOD_NONE = 0x0,
16080 +       DPDMUX_METHOD_C_VLAN_MAC = 0x1,
16081 +       DPDMUX_METHOD_MAC = 0x2,
16082 +       DPDMUX_METHOD_C_VLAN = 0x3,
16083 +       DPDMUX_METHOD_S_VLAN = 0x4
16084 +};
16085 +
16086 +/**
16087 + * struct dpdmux_cfg - DPDMUX configuration parameters
16088 + * @method: Defines the operation method for the DPDMUX address table
16089 + * @manip: Required manipulation operation
16090 + * @num_ifs: Number of interfaces (excluding the uplink interface)
16091 + * @adv: Advanced parameters; default is all zeros;
16092 + *      use this structure to change default settings
16093 + */
16094 +struct dpdmux_cfg {
16095 +       enum dpdmux_method      method;
16096 +       enum dpdmux_manip       manip;
16097 +       uint16_t                num_ifs;
16098 +       /**
16099 +        * struct adv - Advanced parameters
16100 +        * @options: DPDMUX options - combination of 'DPDMUX_OPT_<X>' flags
16101 +        * @max_dmat_entries: Maximum entries in DPDMUX address table
16102 +        *              0 - indicates default: 64 entries per interface.
16103 +        * @max_mc_groups: Number of multicast groups in DPDMUX table
16104 +        *              0 - indicates default: 32 multicast groups
16105 +        * @max_vlan_ids: max vlan ids allowed in the system -
16106 +        *              relevant only case of working in mac+vlan method.
16107 +        *              0 - indicates default 16 vlan ids.
16108 +        */
16109 +       struct {
16110 +               uint64_t options;
16111 +               uint16_t max_dmat_entries;
16112 +               uint16_t max_mc_groups;
16113 +               uint16_t max_vlan_ids;
16114 +       } adv;
16115 +};
16116 +
16117 +/**
16118 + * dpdmux_create() - Create the DPDMUX object
16119 + * @mc_io:     Pointer to MC portal's I/O object
16120 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16121 + * @cfg:       Configuration structure
16122 + * @token:     Returned token; use in subsequent API calls
16123 + *
16124 + * Create the DPDMUX object, allocate required resources and
16125 + * perform required initialization.
16126 + *
16127 + * The object can be created either by declaring it in the
16128 + * DPL file, or by calling this function.
16129 + *
16130 + * This function returns a unique authentication token,
16131 + * associated with the specific object ID and the specific MC
16132 + * portal; this token must be used in all subsequent calls to
16133 + * this specific object. For objects that are created using the
16134 + * DPL file, call dpdmux_open() function to get an authentication
16135 + * token first.
16136 + *
16137 + * Return:     '0' on Success; Error code otherwise.
16138 + */
16139 +int dpdmux_create(struct fsl_mc_io             *mc_io,
16140 +                 uint32_t                      cmd_flags,
16141 +                 const struct dpdmux_cfg       *cfg,
16142 +                 uint16_t                      *token);
16143 +
16144 +/**
16145 + * dpdmux_destroy() - Destroy the DPDMUX object and release all its resources.
16146 + * @mc_io:     Pointer to MC portal's I/O object
16147 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16148 + * @token:     Token of DPDMUX object
16149 + *
16150 + * Return:     '0' on Success; error code otherwise.
16151 + */
16152 +int dpdmux_destroy(struct fsl_mc_io    *mc_io,
16153 +                  uint32_t             cmd_flags,
16154 +                  uint16_t             token);
16155 +
16156 +/**
16157 + * dpdmux_enable() - Enable DPDMUX functionality
16158 + * @mc_io:     Pointer to MC portal's I/O object
16159 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16160 + * @token:     Token of DPDMUX object
16161 + *
16162 + * Return:     '0' on Success; Error code otherwise.
16163 + */
16164 +int dpdmux_enable(struct fsl_mc_io     *mc_io,
16165 +                 uint32_t              cmd_flags,
16166 +                 uint16_t              token);
16167 +
16168 +/**
16169 + * dpdmux_disable() - Disable DPDMUX functionality
16170 + * @mc_io:     Pointer to MC portal's I/O object
16171 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16172 + * @token:     Token of DPDMUX object
16173 + *
16174 + * Return:     '0' on Success; Error code otherwise.
16175 + */
16176 +int dpdmux_disable(struct fsl_mc_io    *mc_io,
16177 +                  uint32_t             cmd_flags,
16178 +                  uint16_t             token);
16179 +
16180 +/**
16181 + * dpdmux_is_enabled() - Check if the DPDMUX is enabled.
16182 + * @mc_io:     Pointer to MC portal's I/O object
16183 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16184 + * @token:     Token of DPDMUX object
16185 + * @en:                Returns '1' if object is enabled; '0' otherwise
16186 + *
16187 + * Return:     '0' on Success; Error code otherwise.
16188 + */
16189 +int dpdmux_is_enabled(struct fsl_mc_io *mc_io,
16190 +                     uint32_t          cmd_flags,
16191 +                     uint16_t          token,
16192 +                     int               *en);
16193 +
16194 +/**
16195 + * dpdmux_reset() - Reset the DPDMUX, returns the object to initial state.
16196 + * @mc_io:     Pointer to MC portal's I/O object
16197 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16198 + * @token:     Token of DPDMUX object
16199 + *
16200 + * Return:     '0' on Success; Error code otherwise.
16201 + */
16202 +int dpdmux_reset(struct fsl_mc_io      *mc_io,
16203 +                uint32_t               cmd_flags,
16204 +                uint16_t               token);
16205 +
16206 +/**
16207 + * struct dpdmux_irq_cfg - IRQ configuration
16208 + * @addr:      Address that must be written to signal a message-based interrupt
16209 + * @val:       Value to write into irq_addr address
16210 + * @irq_num: A user defined number associated with this IRQ
16211 + */
16212 +struct dpdmux_irq_cfg {
16213 +            uint64_t           addr;
16214 +            uint32_t           val;
16215 +            int                irq_num;
16216 +};
16217 +
16218 +/**
16219 + * dpdmux_set_irq() - Set IRQ information for the DPDMUX to trigger an interrupt.
16220 + * @mc_io:     Pointer to MC portal's I/O object
16221 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16222 + * @token:     Token of DPDMUX object
16223 + * @irq_index: Identifies the interrupt index to configure
16224 + * @irq_cfg:   IRQ configuration
16225 + *
16226 + * Return:     '0' on Success; Error code otherwise.
16227 + */
16228 +int dpdmux_set_irq(struct fsl_mc_io            *mc_io,
16229 +                  uint32_t                     cmd_flags,
16230 +                  uint16_t                     token,
16231 +                  uint8_t                      irq_index,
16232 +                  struct dpdmux_irq_cfg        *irq_cfg);
16233 +
16234 +/**
16235 + * dpdmux_get_irq() - Get IRQ information from the DPDMUX.
16236 + * @mc_io:     Pointer to MC portal's I/O object
16237 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16238 + * @token:     Token of DPDMUX object
16239 + * @irq_index: The interrupt index to configure
16240 + * @type:      Interrupt type: 0 represents message interrupt
16241 + *             type (both irq_addr and irq_val are valid)
16242 + * @irq_cfg:   IRQ attributes
16243 + *
16244 + * Return:     '0' on Success; Error code otherwise.
16245 + */
16246 +int dpdmux_get_irq(struct fsl_mc_io            *mc_io,
16247 +                  uint32_t                     cmd_flags,
16248 +                  uint16_t                     token,
16249 +                  uint8_t                      irq_index,
16250 +                  int                          *type,
16251 +                  struct dpdmux_irq_cfg        *irq_cfg);
16252 +
16253 +/**
16254 + * dpdmux_set_irq_enable() - Set overall interrupt state.
16255 + * @mc_io:     Pointer to MC portal's I/O object
16256 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16257 + * @token:     Token of DPDMUX object
16258 + * @irq_index: The interrupt index to configure
16259 + * @en:                Interrupt state - enable = 1, disable = 0
16260 + *
16261 + * Allows GPP software to control when interrupts are generated.
16262 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
16263 + * overall interrupt state. if the interrupt is disabled no causes will cause
16264 + * an interrupt.
16265 + *
16266 + * Return:     '0' on Success; Error code otherwise.
16267 + */
16268 +int dpdmux_set_irq_enable(struct fsl_mc_io     *mc_io,
16269 +                         uint32_t              cmd_flags,
16270 +                         uint16_t              token,
16271 +                         uint8_t               irq_index,
16272 +                         uint8_t               en);
16273 +
16274 +/**
16275 + * dpdmux_get_irq_enable() - Get overall interrupt state.
16276 + * @mc_io:     Pointer to MC portal's I/O object
16277 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16278 + * @token:     Token of DPDMUX object
16279 + * @irq_index: The interrupt index to configure
16280 + * @en:                Returned interrupt state - enable = 1, disable = 0
16281 + *
16282 + * Return:     '0' on Success; Error code otherwise.
16283 + */
16284 +int dpdmux_get_irq_enable(struct fsl_mc_io     *mc_io,
16285 +                         uint32_t              cmd_flags,
16286 +                         uint16_t              token,
16287 +                         uint8_t               irq_index,
16288 +                         uint8_t               *en);
16289 +
16290 +/**
16291 + * dpdmux_set_irq_mask() - Set interrupt mask.
16292 + * @mc_io:     Pointer to MC portal's I/O object
16293 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16294 + * @token:     Token of DPDMUX object
16295 + * @irq_index: The interrupt index to configure
16296 + * @mask:      event mask to trigger interrupt;
16297 + *             each bit:
16298 + *                     0 = ignore event
16299 + *                     1 = consider event for asserting IRQ
16300 + *
16301 + * Every interrupt can have up to 32 causes and the interrupt model supports
16302 + * masking/unmasking each cause independently
16303 + *
16304 + * Return:     '0' on Success; Error code otherwise.
16305 + */
16306 +int dpdmux_set_irq_mask(struct fsl_mc_io       *mc_io,
16307 +                       uint32_t                cmd_flags,
16308 +                       uint16_t                token,
16309 +                       uint8_t                 irq_index,
16310 +                       uint32_t                mask);
16311 +
16312 +/**
16313 + * dpdmux_get_irq_mask() - Get interrupt mask.
16314 + * @mc_io:     Pointer to MC portal's I/O object
16315 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16316 + * @token:     Token of DPDMUX object
16317 + * @irq_index: The interrupt index to configure
16318 + * @mask:      Returned event mask to trigger interrupt
16319 + *
16320 + * Every interrupt can have up to 32 causes and the interrupt model supports
16321 + * masking/unmasking each cause independently
16322 + *
16323 + * Return:     '0' on Success; Error code otherwise.
16324 + */
16325 +int dpdmux_get_irq_mask(struct fsl_mc_io       *mc_io,
16326 +                       uint32_t                cmd_flags,
16327 +                       uint16_t                token,
16328 +                       uint8_t                 irq_index,
16329 +                       uint32_t                *mask);
16330 +
16331 +/**
16332 + * dpdmux_get_irq_status() - Get the current status of any pending interrupts.
16333 + * @mc_io:     Pointer to MC portal's I/O object
16334 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16335 + * @token:     Token of DPDMUX object
16336 + * @irq_index: The interrupt index to configure
16337 + * @status:    Returned interrupts status - one bit per cause:
16338 + *                     0 = no interrupt pending
16339 + *                     1 = interrupt pending
16340 + *
16341 + * Return:     '0' on Success; Error code otherwise.
16342 + */
16343 +int dpdmux_get_irq_status(struct fsl_mc_io     *mc_io,
16344 +                         uint32_t              cmd_flags,
16345 +                         uint16_t              token,
16346 +                         uint8_t               irq_index,
16347 +                         uint32_t              *status);
16348 +
16349 +/**
16350 + * dpdmux_clear_irq_status() - Clear a pending interrupt's status
16351 + * @mc_io:     Pointer to MC portal's I/O object
16352 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16353 + * @token:     Token of DPDMUX object
16354 + * @irq_index: The interrupt index to configure
16355 + * @status:    bits to clear (W1C) - one bit per cause:
16356 + *                     0 = don't change
16357 + *                     1 = clear status bit
16358 + *
16359 + * Return:     '0' on Success; Error code otherwise.
16360 + */
16361 +int dpdmux_clear_irq_status(struct fsl_mc_io   *mc_io,
16362 +                           uint32_t            cmd_flags,
16363 +                           uint16_t            token,
16364 +                           uint8_t             irq_index,
16365 +                           uint32_t            status);
16366 +
16367 +/**
16368 + * struct dpdmux_attr - Structure representing DPDMUX attributes
16369 + * @id: DPDMUX object ID
16370 + * @version: DPDMUX version
16371 + * @options: Configuration options (bitmap)
16372 + * @method: DPDMUX address table method
16373 + * @manip: DPDMUX manipulation type
16374 + * @num_ifs: Number of interfaces (excluding the uplink interface)
16375 + * @mem_size: DPDMUX frame storage memory size
16376 + */
16377 +struct dpdmux_attr {
16378 +       int                     id;
16379 +       /**
16380 +        * struct version - DPDMUX version
16381 +        * @major: DPDMUX major version
16382 +        * @minor: DPDMUX minor version
16383 +        */
16384 +       struct {
16385 +               uint16_t        major;
16386 +               uint16_t        minor;
16387 +       } version;
16388 +       uint64_t                options;
16389 +       enum dpdmux_method      method;
16390 +       enum dpdmux_manip       manip;
16391 +       uint16_t                num_ifs;
16392 +       uint16_t                mem_size;
16393 +};
16394 +
16395 +/**
16396 + * dpdmux_get_attributes() - Retrieve DPDMUX attributes
16397 + * @mc_io:     Pointer to MC portal's I/O object
16398 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16399 + * @token:     Token of DPDMUX object
16400 + * @attr:      Returned object's attributes
16401 + *
16402 + * Return:     '0' on Success; Error code otherwise.
16403 + */
16404 +int dpdmux_get_attributes(struct fsl_mc_io     *mc_io,
16405 +                         uint32_t              cmd_flags,
16406 +                         uint16_t              token,
16407 +                         struct dpdmux_attr    *attr);
16408 +
16409 +/**
16410 + * dpdmux_ul_set_max_frame_length() - Set the maximum frame length in DPDMUX
16411 + * @mc_io:     Pointer to MC portal's I/O object
16412 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16413 + * @token:             Token of DPDMUX object
16414 + * @max_frame_length:  The required maximum frame length
16415 + *
16416 + * Return:     '0' on Success; Error code otherwise.
16417 + */
16418 +int dpdmux_ul_set_max_frame_length(struct fsl_mc_io    *mc_io,
16419 +                                  uint32_t             cmd_flags,
16420 +                                  uint16_t             token,
16421 +                                  uint16_t             max_frame_length);
16422 +
16423 +/**
16424 + * enum dpdmux_counter_type - Counter types
16425 + * @DPDMUX_CNT_ING_FRAME: Counts ingress frames
16426 + * @DPDMUX_CNT_ING_BYTE: Counts ingress bytes
16427 + * @DPDMUX_CNT_ING_FLTR_FRAME: Counts filtered ingress frames
16428 + * @DPDMUX_CNT_ING_FRAME_DISCARD: Counts discarded ingress frames
16429 + * @DPDMUX_CNT_ING_MCAST_FRAME: Counts ingress multicast frames
16430 + * @DPDMUX_CNT_ING_MCAST_BYTE: Counts ingress multicast bytes
16431 + * @DPDMUX_CNT_ING_BCAST_FRAME: Counts ingress broadcast frames
16432 + * @DPDMUX_CNT_ING_BCAST_BYTES: Counts ingress broadcast bytes
16433 + * @DPDMUX_CNT_EGR_FRAME: Counts egress frames
16434 + * @DPDMUX_CNT_EGR_BYTE: Counts egress bytes
16435 + * @DPDMUX_CNT_EGR_FRAME_DISCARD: Counts discarded egress frames
16436 + */
16437 +enum dpdmux_counter_type {
16438 +       DPDMUX_CNT_ING_FRAME = 0x0,
16439 +       DPDMUX_CNT_ING_BYTE = 0x1,
16440 +       DPDMUX_CNT_ING_FLTR_FRAME = 0x2,
16441 +       DPDMUX_CNT_ING_FRAME_DISCARD = 0x3,
16442 +       DPDMUX_CNT_ING_MCAST_FRAME = 0x4,
16443 +       DPDMUX_CNT_ING_MCAST_BYTE = 0x5,
16444 +       DPDMUX_CNT_ING_BCAST_FRAME = 0x6,
16445 +       DPDMUX_CNT_ING_BCAST_BYTES = 0x7,
16446 +       DPDMUX_CNT_EGR_FRAME = 0x8,
16447 +       DPDMUX_CNT_EGR_BYTE = 0x9,
16448 +       DPDMUX_CNT_EGR_FRAME_DISCARD = 0xa
16449 +};
16450 +
16451 +/**
16452 + * enum dpdmux_accepted_frames_type - DPDMUX frame types
16453 + * @DPDMUX_ADMIT_ALL: The device accepts VLAN tagged, untagged and
16454 + *                     priority-tagged frames
16455 + * @DPDMUX_ADMIT_ONLY_VLAN_TAGGED: The device discards untagged frames or
16456 + *                             priority-tagged frames that are received on this
16457 + *                             interface
16458 + * @DPDMUX_ADMIT_ONLY_UNTAGGED: Untagged frames or priority-tagged frames
16459 + *                             received on this interface are accepted
16460 + */
16461 +enum dpdmux_accepted_frames_type {
16462 +       DPDMUX_ADMIT_ALL = 0,
16463 +       DPDMUX_ADMIT_ONLY_VLAN_TAGGED = 1,
16464 +       DPDMUX_ADMIT_ONLY_UNTAGGED = 2
16465 +};
16466 +
16467 +/**
16468 + * enum dpdmux_action - DPDMUX action for un-accepted frames
16469 + * @DPDMUX_ACTION_DROP: Drop un-accepted frames
16470 + * @DPDMUX_ACTION_REDIRECT_TO_CTRL: Redirect un-accepted frames to the
16471 + *                                     control interface
16472 + */
16473 +enum dpdmux_action {
16474 +       DPDMUX_ACTION_DROP = 0,
16475 +       DPDMUX_ACTION_REDIRECT_TO_CTRL = 1
16476 +};
16477 +
16478 +/**
16479 + * struct dpdmux_accepted_frames - Frame types configuration
16480 + * @type: Defines ingress accepted frames
16481 + * @unaccept_act: Defines action on frames not accepted
16482 + */
16483 +struct dpdmux_accepted_frames {
16484 +       enum dpdmux_accepted_frames_type        type;
16485 +       enum dpdmux_action                      unaccept_act;
16486 +};
16487 +
16488 +/**
16489 + * dpdmux_if_set_accepted_frames() - Set the accepted frame types
16490 + * @mc_io:     Pointer to MC portal's I/O object
16491 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16492 + * @token:     Token of DPDMUX object
16493 + * @if_id:     Interface ID (0 for uplink, or 1-num_ifs);
16494 + * @cfg:       Frame types configuration
16495 + *
16496 + * if 'DPDMUX_ADMIT_ONLY_VLAN_TAGGED' is set - untagged frames or
16497 + * priority-tagged frames are discarded.
16498 + * if 'DPDMUX_ADMIT_ONLY_UNTAGGED' is set - untagged frames or
16499 + * priority-tagged frames are accepted.
16500 + * if 'DPDMUX_ADMIT_ALL' is set (default mode) - all VLAN tagged,
16501 + * untagged and priority-tagged frame are accepted;
16502 + *
16503 + * Return:     '0' on Success; Error code otherwise.
16504 + */
16505 +int dpdmux_if_set_accepted_frames(struct fsl_mc_io                   *mc_io,
16506 +                                 uint32_t                            cmd_flags,
16507 +                                 uint16_t                            token,
16508 +                                 uint16_t                            if_id,
16509 +                                 const struct dpdmux_accepted_frames *cfg);
16510 +
16511 +/**
16512 + * struct dpdmux_if_attr - Structure representing frame types configuration
16513 + * @rate: Configured interface rate (in bits per second)
16514 + * @enabled: Indicates if interface is enabled
16515 + * @accept_frame_type: Indicates type of accepted frames for the interface
16516 + */
16517 +struct dpdmux_if_attr {
16518 +       uint32_t                                rate;
16519 +       int                                     enabled;
16520 +       enum dpdmux_accepted_frames_type        accept_frame_type;
16521 +};
16522 +
16523 +/**
16524 + * dpdmux_if_get_attributes() - Obtain DPDMUX interface attributes
16525 + * @mc_io:     Pointer to MC portal's I/O object
16526 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16527 + * @token:     Token of DPDMUX object
16528 + * @if_id:     Interface ID (0 for uplink, or 1-num_ifs);
16529 + * @attr:      Interface attributes
16530 + *
16531 + * Return:     '0' on Success; Error code otherwise.
16532 + */
16533 +int dpdmux_if_get_attributes(struct fsl_mc_io          *mc_io,
16534 +                            uint32_t                   cmd_flags,
16535 +                            uint16_t                   token,
16536 +                            uint16_t                   if_id,
16537 +                            struct dpdmux_if_attr      *attr);
16538 +
16539 +/**
16540 + * struct dpdmux_l2_rule - Structure representing L2 rule
16541 + * @mac_addr: MAC address
16542 + * @vlan_id: VLAN ID
16543 + */
16544 +struct dpdmux_l2_rule {
16545 +       uint8_t mac_addr[6];
16546 +       uint16_t        vlan_id;
16547 +};
16548 +
16549 +/**
16550 + * dpdmux_if_remove_l2_rule() - Remove L2 rule from DPDMUX table
16551 + * @mc_io:     Pointer to MC portal's I/O object
16552 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16553 + * @token:     Token of DPDMUX object
16554 + * @if_id:     Destination interface ID
16555 + * @rule:      L2 rule
16556 + *
16557 + * Function removes a L2 rule from DPDMUX table
16558 + * or adds an interface to an existing multicast address
16559 + *
16560 + * Return:     '0' on Success; Error code otherwise.
16561 + */
16562 +int dpdmux_if_remove_l2_rule(struct fsl_mc_io                  *mc_io,
16563 +                            uint32_t                           cmd_flags,
16564 +                            uint16_t                           token,
16565 +                            uint16_t                           if_id,
16566 +                            const struct dpdmux_l2_rule        *rule);
16567 +
16568 +/**
16569 + * dpdmux_if_add_l2_rule() - Add L2 rule into DPDMUX table
16570 + * @mc_io:     Pointer to MC portal's I/O object
16571 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16572 + * @token:     Token of DPDMUX object
16573 + * @if_id:     Destination interface ID
16574 + * @rule:      L2 rule
16575 + *
16576 + * Function adds a L2 rule into DPDMUX table
16577 + * or adds an interface to an existing multicast address
16578 + *
16579 + * Return:     '0' on Success; Error code otherwise.
16580 + */
16581 +int dpdmux_if_add_l2_rule(struct fsl_mc_io             *mc_io,
16582 +                         uint32_t                      cmd_flags,
16583 +                         uint16_t                      token,
16584 +                         uint16_t                      if_id,
16585 +                         const struct dpdmux_l2_rule   *rule);
16586 +
16587 +/**
16588 +* dpdmux_if_get_counter() - Functions obtains specific counter of an interface
16589 +* @mc_io: Pointer to MC portal's I/O object
16590 +* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16591 +* @token: Token of DPDMUX object
16592 +* @if_id:  Interface Id
16593 +* @counter_type: counter type
16594 +* @counter: Returned specific counter information
16595 +*
16596 +* Return:      '0' on Success; Error code otherwise.
16597 +*/
16598 +int dpdmux_if_get_counter(struct fsl_mc_io             *mc_io,
16599 +                         uint32_t                      cmd_flags,
16600 +                         uint16_t                      token,
16601 +                         uint16_t                      if_id,
16602 +                         enum dpdmux_counter_type      counter_type,
16603 +                         uint64_t                      *counter);
16604 +
16605 +/**
16606 +* dpdmux_ul_reset_counters() - Function resets the uplink counter
16607 +* @mc_io:      Pointer to MC portal's I/O object
16608 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
16609 +* @token:      Token of DPDMUX object
16610 +*
16611 +* Return:      '0' on Success; Error code otherwise.
16612 +*/
16613 +int dpdmux_ul_reset_counters(struct fsl_mc_io  *mc_io,
16614 +                            uint32_t           cmd_flags,
16615 +                            uint16_t           token);
16616 +
16617 +/**
16618 + * Enable auto-negotiation
16619 + */
16620 +#define DPDMUX_LINK_OPT_AUTONEG                0x0000000000000001ULL
16621 +/**
16622 + * Enable half-duplex mode
16623 + */
16624 +#define DPDMUX_LINK_OPT_HALF_DUPLEX    0x0000000000000002ULL
16625 +/**
16626 + * Enable pause frames
16627 + */
16628 +#define DPDMUX_LINK_OPT_PAUSE          0x0000000000000004ULL
16629 +/**
16630 + * Enable a-symmetric pause frames
16631 + */
16632 +#define DPDMUX_LINK_OPT_ASYM_PAUSE     0x0000000000000008ULL
16633 +
16634 +/**
16635 + * struct dpdmux_link_cfg - Structure representing DPDMUX link configuration
16636 + * @rate: Rate
16637 + * @options: Mask of available options; use 'DPDMUX_LINK_OPT_<X>' values
16638 + */
16639 +struct dpdmux_link_cfg {
16640 +       uint32_t rate;
16641 +       uint64_t options;
16642 +};
16643 +
16644 +/**
16645 + * dpdmux_if_set_link_cfg() - set the link configuration.
16646 + * @mc_io:     Pointer to MC portal's I/O object
16647 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16648 + * @token: Token of DPSW object
16649 + * @if_id: interface id
16650 + * @cfg: Link configuration
16651 + *
16652 + * Return:     '0' on Success; Error code otherwise.
16653 + */
16654 +int dpdmux_if_set_link_cfg(struct fsl_mc_io            *mc_io,
16655 +                          uint32_t                     cmd_flags,
16656 +                          uint16_t                     token,
16657 +                          uint16_t                     if_id,
16658 +                          struct dpdmux_link_cfg       *cfg);
16659 +/**
16660 + * struct dpdmux_link_state - Structure representing DPDMUX link state
16661 + * @rate: Rate
16662 + * @options: Mask of available options; use 'DPDMUX_LINK_OPT_<X>' values
16663 + * @up: 0 - down, 1 - up
16664 + */
16665 +struct dpdmux_link_state {
16666 +       uint32_t rate;
16667 +       uint64_t options;
16668 +       int      up;
16669 +};
16670 +
16671 +/**
16672 + * dpdmux_if_get_link_state - Return the link state
16673 + * @mc_io:     Pointer to MC portal's I/O object
16674 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16675 + * @token: Token of DPSW object
16676 + * @if_id: interface id
16677 + * @state: link state
16678 + *
16679 + * @returns    '0' on Success; Error code otherwise.
16680 + */
16681 +int dpdmux_if_get_link_state(struct fsl_mc_io          *mc_io,
16682 +                            uint32_t                   cmd_flags,
16683 +                            uint16_t                   token,
16684 +                            uint16_t                   if_id,
16685 +                            struct dpdmux_link_state   *state);
16686 +
16687 +#endif /* __FSL_DPDMUX_H */
16688 diff --git a/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h b/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
16689 new file mode 100644
16690 index 0000000..0a5cf17
16691 --- /dev/null
16692 +++ b/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
16693 @@ -0,0 +1,256 @@
16694 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
16695 + *
16696 + * Redistribution and use in source and binary forms, with or without
16697 + * modification, are permitted provided that the following conditions are met:
16698 + * * Redistributions of source code must retain the above copyright
16699 + * notice, this list of conditions and the following disclaimer.
16700 + * * Redistributions in binary form must reproduce the above copyright
16701 + * notice, this list of conditions and the following disclaimer in the
16702 + * documentation and/or other materials provided with the distribution.
16703 + * * Neither the name of the above-listed copyright holders nor the
16704 + * names of any contributors may be used to endorse or promote products
16705 + * derived from this software without specific prior written permission.
16706 + *
16707 + *
16708 + * ALTERNATIVELY, this software may be distributed under the terms of the
16709 + * GNU General Public License ("GPL") as published by the Free Software
16710 + * Foundation, either version 2 of that License or (at your option) any
16711 + * later version.
16712 + *
16713 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16714 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16715 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16716 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
16717 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
16718 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
16719 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
16720 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
16721 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
16722 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
16723 + * POSSIBILITY OF SUCH DAMAGE.
16724 + */
16725 +#ifndef _FSL_DPDMUX_CMD_H
16726 +#define _FSL_DPDMUX_CMD_H
16727 +
16728 +/* DPDMUX Version */
16729 +#define DPDMUX_VER_MAJOR                               5
16730 +#define DPDMUX_VER_MINOR                               0
16731 +
16732 +/* Command IDs */
16733 +#define DPDMUX_CMDID_CLOSE                             0x800
16734 +#define DPDMUX_CMDID_OPEN                              0x806
16735 +#define DPDMUX_CMDID_CREATE                            0x906
16736 +#define DPDMUX_CMDID_DESTROY                           0x900
16737 +
16738 +#define DPDMUX_CMDID_ENABLE                            0x002
16739 +#define DPDMUX_CMDID_DISABLE                           0x003
16740 +#define DPDMUX_CMDID_GET_ATTR                          0x004
16741 +#define DPDMUX_CMDID_RESET                             0x005
16742 +#define DPDMUX_CMDID_IS_ENABLED                                0x006
16743 +
16744 +#define DPDMUX_CMDID_SET_IRQ                           0x010
16745 +#define DPDMUX_CMDID_GET_IRQ                           0x011
16746 +#define DPDMUX_CMDID_SET_IRQ_ENABLE                    0x012
16747 +#define DPDMUX_CMDID_GET_IRQ_ENABLE                    0x013
16748 +#define DPDMUX_CMDID_SET_IRQ_MASK                      0x014
16749 +#define DPDMUX_CMDID_GET_IRQ_MASK                      0x015
16750 +#define DPDMUX_CMDID_GET_IRQ_STATUS                    0x016
16751 +#define DPDMUX_CMDID_CLEAR_IRQ_STATUS                  0x017
16752 +
16753 +#define DPDMUX_CMDID_UL_SET_MAX_FRAME_LENGTH           0x0a1
16754 +
16755 +#define DPDMUX_CMDID_UL_RESET_COUNTERS                 0x0a3
16756 +
16757 +#define DPDMUX_CMDID_IF_SET_ACCEPTED_FRAMES            0x0a7
16758 +#define DPDMUX_CMDID_IF_GET_ATTR                       0x0a8
16759 +
16760 +#define DPDMUX_CMDID_IF_ADD_L2_RULE                    0x0b0
16761 +#define DPDMUX_CMDID_IF_REMOVE_L2_RULE                 0x0b1
16762 +#define DPDMUX_CMDID_IF_GET_COUNTER                    0x0b2
16763 +#define DPDMUX_CMDID_IF_SET_LINK_CFG           0x0b3
16764 +#define DPDMUX_CMDID_IF_GET_LINK_STATE         0x0b4
16765 +
16766 +/*                cmd, param, offset, width, type, arg_name */
16767 +#define DPDMUX_CMD_OPEN(cmd, dpdmux_id) \
16768 +       MC_CMD_OP(cmd, 0, 0,  32,  int, dpdmux_id)
16769 +
16770 +/*                cmd, param, offset, width, type, arg_name */
16771 +#define DPDMUX_CMD_CREATE(cmd, cfg) \
16772 +do { \
16773 +       MC_CMD_OP(cmd, 0, 0,  8,  enum dpdmux_method, cfg->method);\
16774 +       MC_CMD_OP(cmd, 0, 8,  8,  enum dpdmux_manip, cfg->manip);\
16775 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs);\
16776 +       MC_CMD_OP(cmd, 1, 0,  16, uint16_t, cfg->adv.max_dmat_entries);\
16777 +       MC_CMD_OP(cmd, 1, 16, 16, uint16_t, cfg->adv.max_mc_groups);\
16778 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, cfg->adv.max_vlan_ids);\
16779 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->adv.options);\
16780 +} while (0)
16781 +
16782 +/*                cmd, param, offset, width, type, arg_name */
16783 +#define DPDMUX_RSP_IS_ENABLED(cmd, en) \
16784 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
16785 +
16786 +/*                cmd, param, offset, width, type, arg_name */
16787 +#define DPDMUX_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
16788 +do { \
16789 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
16790 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
16791 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
16792 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
16793 +} while (0)
16794 +
16795 +/*                cmd, param, offset, width, type, arg_name */
16796 +#define DPDMUX_CMD_GET_IRQ(cmd, irq_index) \
16797 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
16798 +
16799 +/*                cmd, param, offset, width, type, arg_name */
16800 +#define DPDMUX_RSP_GET_IRQ(cmd, type, irq_cfg) \
16801 +do { \
16802 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
16803 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
16804 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
16805 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
16806 +} while (0)
16807 +
16808 +/*                cmd, param, offset, width, type, arg_name */
16809 +#define DPDMUX_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
16810 +do { \
16811 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en);\
16812 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
16813 +} while (0)
16814 +
16815 +/*                cmd, param, offset, width, type, arg_name */
16816 +#define DPDMUX_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
16817 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
16818 +
16819 +/*                cmd, param, offset, width, type, arg_name */
16820 +#define DPDMUX_RSP_GET_IRQ_ENABLE(cmd, en) \
16821 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
16822 +
16823 +/*                cmd, param, offset, width, type, arg_name */
16824 +#define DPDMUX_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
16825 +do { \
16826 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
16827 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
16828 +} while (0)
16829 +
16830 +/*                cmd, param, offset, width, type, arg_name */
16831 +#define DPDMUX_CMD_GET_IRQ_MASK(cmd, irq_index) \
16832 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
16833 +
16834 +/*                cmd, param, offset, width, type, arg_name */
16835 +#define DPDMUX_RSP_GET_IRQ_MASK(cmd, mask) \
16836 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
16837 +
16838 +/*                cmd, param, offset, width, type, arg_name */
16839 +#define DPDMUX_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
16840 +do { \
16841 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
16842 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
16843 +} while (0)
16844 +
16845 +/*                cmd, param, offset, width, type, arg_name */
16846 +#define DPDMUX_RSP_GET_IRQ_STATUS(cmd, status) \
16847 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status) \
16848 +
16849 +/*                cmd, param, offset, width, type, arg_name */
16850 +#define DPDMUX_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
16851 +do { \
16852 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
16853 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
16854 +} while (0)
16855 +
16856 +#define DPDMUX_RSP_GET_ATTR(cmd, attr) \
16857 +do { \
16858 +       MC_RSP_OP(cmd, 0, 0,  8,  enum dpdmux_method, attr->method);\
16859 +       MC_RSP_OP(cmd, 0, 8,  8,  enum dpdmux_manip, attr->manip);\
16860 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, attr->num_ifs);\
16861 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->mem_size);\
16862 +       MC_RSP_OP(cmd, 2, 0,  32, int,      attr->id);\
16863 +       MC_RSP_OP(cmd, 3, 0,  64, uint64_t, attr->options);\
16864 +       MC_RSP_OP(cmd, 4, 0,  16, uint16_t, attr->version.major);\
16865 +       MC_RSP_OP(cmd, 4, 16, 16, uint16_t, attr->version.minor);\
16866 +} while (0)
16867 +
16868 +/*                cmd, param, offset, width, type, arg_name */
16869 +#define DPDMUX_CMD_UL_SET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
16870 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, max_frame_length)
16871 +
16872 +/*                cmd, param, offset, width, type, arg_name */
16873 +#define DPDMUX_CMD_IF_SET_ACCEPTED_FRAMES(cmd, if_id, cfg) \
16874 +do { \
16875 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
16876 +       MC_CMD_OP(cmd, 0, 16, 4,  enum dpdmux_accepted_frames_type, cfg->type);\
16877 +       MC_CMD_OP(cmd, 0, 20, 4,  enum dpdmux_unaccepted_frames_action, \
16878 +                                           cfg->unaccept_act);\
16879 +} while (0)
16880 +
16881 +/*                cmd, param, offset, width, type, arg_name */
16882 +#define DPDMUX_CMD_IF_GET_ATTR(cmd, if_id) \
16883 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
16884 +
16885 +/*                cmd, param, offset, width, type, arg_name */
16886 +#define DPDMUX_RSP_IF_GET_ATTR(cmd, attr) \
16887 +do { \
16888 +       MC_RSP_OP(cmd, 0, 56, 4,  enum dpdmux_accepted_frames_type, \
16889 +                                           attr->accept_frame_type);\
16890 +       MC_RSP_OP(cmd, 0, 24,  1, int,      attr->enabled);\
16891 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, attr->rate);\
16892 +} while (0)
16893 +
16894 +#define DPDMUX_CMD_IF_REMOVE_L2_RULE(cmd, if_id, l2_rule) \
16895 +do { \
16896 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
16897 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  l2_rule->mac_addr[5]);\
16898 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  l2_rule->mac_addr[4]);\
16899 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  l2_rule->mac_addr[3]);\
16900 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  l2_rule->mac_addr[2]);\
16901 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  l2_rule->mac_addr[1]);\
16902 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  l2_rule->mac_addr[0]);\
16903 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, l2_rule->vlan_id);\
16904 +} while (0)
16905 +
16906 +#define DPDMUX_CMD_IF_ADD_L2_RULE(cmd, if_id, l2_rule) \
16907 +do { \
16908 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
16909 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  l2_rule->mac_addr[5]);\
16910 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  l2_rule->mac_addr[4]);\
16911 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  l2_rule->mac_addr[3]);\
16912 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  l2_rule->mac_addr[2]);\
16913 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  l2_rule->mac_addr[1]);\
16914 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  l2_rule->mac_addr[0]);\
16915 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, l2_rule->vlan_id);\
16916 +} while (0)
16917 +
16918 +/*                cmd, param, offset, width, type, arg_name */
16919 +#define DPDMUX_CMD_IF_GET_COUNTER(cmd, if_id, counter_type) \
16920 +do { \
16921 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
16922 +       MC_CMD_OP(cmd, 0, 16, 8,  enum dpdmux_counter_type, counter_type);\
16923 +} while (0)
16924 +
16925 +/*                cmd, param, offset, width, type, arg_name */
16926 +#define DPDMUX_RSP_IF_GET_COUNTER(cmd, counter) \
16927 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, counter)
16928 +
16929 +/*                cmd, param, offset, width, type, arg_name */
16930 +#define DPDMUX_CMD_IF_SET_LINK_CFG(cmd, if_id, cfg) \
16931 +do { \
16932 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
16933 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->rate);\
16934 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->options);\
16935 +} while (0)
16936 +
16937 +/*                cmd, param, offset, width, type, arg_name */
16938 +#define DPDMUX_CMD_IF_GET_LINK_STATE(cmd, if_id) \
16939 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
16940 +
16941 +/*                cmd, param, offset, width, type, arg_name */
16942 +#define DPDMUX_RSP_IF_GET_LINK_STATE(cmd, state) \
16943 +do { \
16944 +       MC_RSP_OP(cmd, 0, 32, 1,  int,      state->up);\
16945 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, state->rate);\
16946 +       MC_RSP_OP(cmd, 2, 0,  64, uint64_t, state->options);\
16947 +} while (0)
16948 +
16949 +#endif /* _FSL_DPDMUX_CMD_H */
16950 diff --git a/drivers/net/dpaa2/mc/fsl_dpio.h b/drivers/net/dpaa2/mc/fsl_dpio.h
16951 new file mode 100644
16952 index 0000000..88a492f
16953 --- /dev/null
16954 +++ b/drivers/net/dpaa2/mc/fsl_dpio.h
16955 @@ -0,0 +1,460 @@
16956 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
16957 + *
16958 + * Redistribution and use in source and binary forms, with or without
16959 + * modification, are permitted provided that the following conditions are met:
16960 + * * Redistributions of source code must retain the above copyright
16961 + * notice, this list of conditions and the following disclaimer.
16962 + * * Redistributions in binary form must reproduce the above copyright
16963 + * notice, this list of conditions and the following disclaimer in the
16964 + * documentation and/or other materials provided with the distribution.
16965 + * * Neither the name of the above-listed copyright holders nor the
16966 + * names of any contributors may be used to endorse or promote products
16967 + * derived from this software without specific prior written permission.
16968 + *
16969 + *
16970 + * ALTERNATIVELY, this software may be distributed under the terms of the
16971 + * GNU General Public License ("GPL") as published by the Free Software
16972 + * Foundation, either version 2 of that License or (at your option) any
16973 + * later version.
16974 + *
16975 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16976 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16977 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16978 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
16979 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
16980 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
16981 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
16982 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
16983 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
16984 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
16985 + * POSSIBILITY OF SUCH DAMAGE.
16986 + */
16987 +#ifndef __FSL_DPIO_H
16988 +#define __FSL_DPIO_H
16989 +
16990 +/* Data Path I/O Portal API
16991 + * Contains initialization APIs and runtime control APIs for DPIO
16992 + */
16993 +
16994 +struct fsl_mc_io;
16995 +
16996 +/**
16997 + * dpio_open() - Open a control session for the specified object
16998 + * @mc_io:     Pointer to MC portal's I/O object
16999 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17000 + * @dpio_id:   DPIO unique ID
17001 + * @token:     Returned token; use in subsequent API calls
17002 + *
17003 + * This function can be used to open a control session for an
17004 + * already created object; an object may have been declared in
17005 + * the DPL or by calling the dpio_create() function.
17006 + * This function returns a unique authentication token,
17007 + * associated with the specific object ID and the specific MC
17008 + * portal; this token must be used in all subsequent commands for
17009 + * this specific object.
17010 + *
17011 + * Return:     '0' on Success; Error code otherwise.
17012 + */
17013 +int dpio_open(struct fsl_mc_io *mc_io,
17014 +             uint32_t          cmd_flags,
17015 +             int               dpio_id,
17016 +             uint16_t          *token);
17017 +
17018 +/**
17019 + * dpio_close() - Close the control session of the object
17020 + * @mc_io:     Pointer to MC portal's I/O object
17021 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17022 + * @token:     Token of DPIO object
17023 + *
17024 + * Return:     '0' on Success; Error code otherwise.
17025 + */
17026 +int dpio_close(struct fsl_mc_io        *mc_io,
17027 +              uint32_t         cmd_flags,
17028 +              uint16_t         token);
17029 +
17030 +/**
17031 + * enum dpio_channel_mode - DPIO notification channel mode
17032 + * @DPIO_NO_CHANNEL: No support for notification channel
17033 + * @DPIO_LOCAL_CHANNEL: Notifications on data availability can be received by a
17034 + *     dedicated channel in the DPIO; user should point the queue's
17035 + *     destination in the relevant interface to this DPIO
17036 + */
17037 +enum dpio_channel_mode {
17038 +       DPIO_NO_CHANNEL = 0,
17039 +       DPIO_LOCAL_CHANNEL = 1,
17040 +};
17041 +
17042 +/**
17043 + * struct dpio_cfg - Structure representing DPIO configuration
17044 + * @channel_mode: Notification channel mode
17045 + * @num_priorities: Number of priorities for the notification channel (1-8);
17046 + *                     relevant only if 'channel_mode = DPIO_LOCAL_CHANNEL'
17047 + */
17048 +struct dpio_cfg {
17049 +       enum dpio_channel_mode  channel_mode;
17050 +       uint8_t         num_priorities;
17051 +};
17052 +
17053 +/**
17054 + * dpio_create() - Create the DPIO object.
17055 + * @mc_io:     Pointer to MC portal's I/O object
17056 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17057 + * @cfg:       Configuration structure
17058 + * @token:     Returned token; use in subsequent API calls
17059 + *
17060 + * Create the DPIO object, allocate required resources and
17061 + * perform required initialization.
17062 + *
17063 + * The object can be created either by declaring it in the
17064 + * DPL file, or by calling this function.
17065 + *
17066 + * This function returns a unique authentication token,
17067 + * associated with the specific object ID and the specific MC
17068 + * portal; this token must be used in all subsequent calls to
17069 + * this specific object. For objects that are created using the
17070 + * DPL file, call dpio_open() function to get an authentication
17071 + * token first.
17072 + *
17073 + * Return:     '0' on Success; Error code otherwise.
17074 + */
17075 +int dpio_create(struct fsl_mc_io       *mc_io,
17076 +               uint32_t                cmd_flags,
17077 +               const struct dpio_cfg   *cfg,
17078 +               uint16_t                *token);
17079 +
17080 +/**
17081 + * dpio_destroy() - Destroy the DPIO object and release all its resources.
17082 + * @mc_io:     Pointer to MC portal's I/O object
17083 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17084 + * @token:     Token of DPIO object
17085 + *
17086 + * Return:     '0' on Success; Error code otherwise
17087 + */
17088 +int dpio_destroy(struct fsl_mc_io      *mc_io,
17089 +                uint32_t               cmd_flags,
17090 +                uint16_t               token);
17091 +
17092 +/**
17093 + * dpio_enable() - Enable the DPIO, allow I/O portal operations.
17094 + * @mc_io:     Pointer to MC portal's I/O object
17095 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17096 + * @token:     Token of DPIO object
17097 + *
17098 + * Return:     '0' on Success; Error code otherwise
17099 + */
17100 +int dpio_enable(struct fsl_mc_io       *mc_io,
17101 +               uint32_t                cmd_flags,
17102 +               uint16_t                token);
17103 +
17104 +/**
17105 + * dpio_disable() - Disable the DPIO, stop any I/O portal operation.
17106 + * @mc_io:     Pointer to MC portal's I/O object
17107 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17108 + * @token:     Token of DPIO object
17109 + *
17110 + * Return:     '0' on Success; Error code otherwise
17111 + */
17112 +int dpio_disable(struct fsl_mc_io      *mc_io,
17113 +                uint32_t               cmd_flags,
17114 +                uint16_t               token);
17115 +
17116 +/**
17117 + * dpio_is_enabled() - Check if the DPIO is enabled.
17118 + * @mc_io:     Pointer to MC portal's I/O object
17119 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17120 + * @token:     Token of DPIO object
17121 + * @en:        Returns '1' if object is enabled; '0' otherwise
17122 + *
17123 + * Return:     '0' on Success; Error code otherwise.
17124 + */
17125 +int dpio_is_enabled(struct fsl_mc_io   *mc_io,
17126 +                   uint32_t            cmd_flags,
17127 +                   uint16_t            token,
17128 +                   int         *en);
17129 +
17130 +/**
17131 + * dpio_reset() - Reset the DPIO, returns the object to initial state.
17132 + * @mc_io:     Pointer to MC portal's I/O object
17133 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17134 + * @token:     Token of DPIO object
17135 + *
17136 + * Return:     '0' on Success; Error code otherwise.
17137 + */
17138 +int dpio_reset(struct fsl_mc_io        *mc_io,
17139 +              uint32_t                 cmd_flags,
17140 +              uint16_t         token);
17141 +
17142 +/**
17143 + * dpio_set_stashing_destination() - Set the stashing destination.
17144 + * @mc_io:     Pointer to MC portal's I/O object
17145 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17146 + * @token:     Token of DPIO object
17147 + * @sdest:     stashing destination value
17148 + *
17149 + * Return:     '0' on Success; Error code otherwise.
17150 + */
17151 +int dpio_set_stashing_destination(struct fsl_mc_io     *mc_io,
17152 +                                 uint32_t              cmd_flags,
17153 +                                 uint16_t              token,
17154 +                                 uint8_t               sdest);
17155 +
17156 +/**
17157 + * dpio_get_stashing_destination() - Get the stashing destination..
17158 + * @mc_io:     Pointer to MC portal's I/O object
17159 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17160 + * @token:     Token of DPIO object
17161 + * @sdest:     Returns the stashing destination value
17162 + *
17163 + * Return:     '0' on Success; Error code otherwise.
17164 + */
17165 +int dpio_get_stashing_destination(struct fsl_mc_io     *mc_io,
17166 +                                 uint32_t              cmd_flags,
17167 +                                 uint16_t              token,
17168 +                                 uint8_t               *sdest);
17169 +
17170 +/**
17171 + * dpio_add_static_dequeue_channel() - Add a static dequeue channel.
17172 + * @mc_io:     Pointer to MC portal's I/O object
17173 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17174 + * @token:     Token of DPIO object
17175 + * @dpcon_id:  DPCON object ID
17176 + * @channel_index: Returned channel index to be used in qbman API
17177 + *
17178 + * Return:     '0' on Success; Error code otherwise.
17179 + */
17180 +int dpio_add_static_dequeue_channel(struct fsl_mc_io   *mc_io,
17181 +                                   uint32_t            cmd_flags,
17182 +                                   uint16_t            token,
17183 +                                   int         dpcon_id,
17184 +                                   uint8_t             *channel_index);
17185 +
17186 +/**
17187 + * dpio_remove_static_dequeue_channel() - Remove a static dequeue channel.
17188 + * @mc_io:     Pointer to MC portal's I/O object
17189 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17190 + * @token:     Token of DPIO object
17191 + * @dpcon_id:  DPCON object ID
17192 + *
17193 + * Return:     '0' on Success; Error code otherwise.
17194 + */
17195 +int dpio_remove_static_dequeue_channel(struct fsl_mc_io        *mc_io,
17196 +                                      uint32_t         cmd_flags,
17197 +                                      uint16_t         token,
17198 +                                      int                      dpcon_id);
17199 +
17200 +/**
17201 + * DPIO IRQ Index and Events
17202 + */
17203 +
17204 +/**
17205 + * Irq software-portal index
17206 + */
17207 +#define DPIO_IRQ_SWP_INDEX                             0
17208 +
17209 +/**
17210 + * struct dpio_irq_cfg - IRQ configuration
17211 + * @addr:      Address that must be written to signal a message-based interrupt
17212 + * @val:       Value to write into irq_addr address
17213 + * @irq_num: A user defined number associated with this IRQ
17214 + */
17215 +struct dpio_irq_cfg {
17216 +            uint64_t           addr;
17217 +            uint32_t           val;
17218 +            int                irq_num;
17219 +};
17220 +
17221 +/**
17222 + * dpio_set_irq() - Set IRQ information for the DPIO to trigger an interrupt.
17223 + * @mc_io:     Pointer to MC portal's I/O object
17224 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17225 + * @token:     Token of DPIO object
17226 + * @irq_index: Identifies the interrupt index to configure
17227 + * @irq_cfg:   IRQ configuration
17228 + *
17229 + * Return:     '0' on Success; Error code otherwise.
17230 + */
17231 +int dpio_set_irq(struct fsl_mc_io      *mc_io,
17232 +                uint32_t               cmd_flags,
17233 +                uint16_t               token,
17234 +                uint8_t                irq_index,
17235 +                struct dpio_irq_cfg    *irq_cfg);
17236 +
17237 +/**
17238 + * dpio_get_irq() - Get IRQ information from the DPIO.
17239 + *
17240 + * @mc_io:     Pointer to MC portal's I/O object
17241 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17242 + * @token:     Token of DPIO object
17243 + * @irq_index: The interrupt index to configure
17244 + * @type:      Interrupt type: 0 represents message interrupt
17245 + *             type (both irq_addr and irq_val are valid)
17246 + * @irq_cfg:   IRQ attributes
17247 + *
17248 + * Return:     '0' on Success; Error code otherwise.
17249 + */
17250 +int dpio_get_irq(struct fsl_mc_io      *mc_io,
17251 +                uint32_t               cmd_flags,
17252 +                uint16_t               token,
17253 +                uint8_t                irq_index,
17254 +                int                    *type,
17255 +                struct dpio_irq_cfg    *irq_cfg);
17256 +
17257 +/**
17258 + * dpio_set_irq_enable() - Set overall interrupt state.
17259 + * @mc_io:     Pointer to MC portal's I/O object
17260 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17261 + * @token:     Token of DPIO object
17262 + * @irq_index: The interrupt index to configure
17263 + * @en:                Interrupt state - enable = 1, disable = 0
17264 + *
17265 + * Allows GPP software to control when interrupts are generated.
17266 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
17267 + * overall interrupt state. if the interrupt is disabled no causes will cause
17268 + * an interrupt.
17269 + *
17270 + * Return:     '0' on Success; Error code otherwise.
17271 + */
17272 +int dpio_set_irq_enable(struct fsl_mc_io       *mc_io,
17273 +                       uint32_t                cmd_flags,
17274 +                       uint16_t                token,
17275 +                       uint8_t                 irq_index,
17276 +                       uint8_t                 en);
17277 +
17278 +/**
17279 + * dpio_get_irq_enable() - Get overall interrupt state
17280 + * @mc_io:     Pointer to MC portal's I/O object
17281 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17282 + * @token:     Token of DPIO object
17283 + * @irq_index: The interrupt index to configure
17284 + * @en:                Returned interrupt state - enable = 1, disable = 0
17285 + *
17286 + * Return:     '0' on Success; Error code otherwise.
17287 + */
17288 +int dpio_get_irq_enable(struct fsl_mc_io       *mc_io,
17289 +                       uint32_t                cmd_flags,
17290 +                       uint16_t                token,
17291 +                       uint8_t                 irq_index,
17292 +                       uint8_t                 *en);
17293 +
17294 +/**
17295 + * dpio_set_irq_mask() - Set interrupt mask.
17296 + * @mc_io:     Pointer to MC portal's I/O object
17297 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17298 + * @token:     Token of DPIO object
17299 + * @irq_index: The interrupt index to configure
17300 + * @mask:      event mask to trigger interrupt;
17301 + *                     each bit:
17302 + *                             0 = ignore event
17303 + *                             1 = consider event for asserting IRQ
17304 + *
17305 + * Every interrupt can have up to 32 causes and the interrupt model supports
17306 + * masking/unmasking each cause independently
17307 + *
17308 + * Return:     '0' on Success; Error code otherwise.
17309 + */
17310 +int dpio_set_irq_mask(struct fsl_mc_io *mc_io,
17311 +                     uint32_t          cmd_flags,
17312 +                     uint16_t          token,
17313 +                     uint8_t           irq_index,
17314 +                     uint32_t          mask);
17315 +
17316 +/**
17317 + * dpio_get_irq_mask() - Get interrupt mask.
17318 + * @mc_io:     Pointer to MC portal's I/O object
17319 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17320 + * @token:     Token of DPIO object
17321 + * @irq_index: The interrupt index to configure
17322 + * @mask:      Returned event mask to trigger interrupt
17323 + *
17324 + * Every interrupt can have up to 32 causes and the interrupt model supports
17325 + * masking/unmasking each cause independently
17326 + *
17327 + * Return:     '0' on Success; Error code otherwise.
17328 + */
17329 +int dpio_get_irq_mask(struct fsl_mc_io *mc_io,
17330 +                     uint32_t          cmd_flags,
17331 +                     uint16_t          token,
17332 +                     uint8_t           irq_index,
17333 +                     uint32_t          *mask);
17334 +
17335 +/**
17336 + * dpio_get_irq_status() - Get the current status of any pending interrupts.
17337 + * @mc_io:     Pointer to MC portal's I/O object
17338 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17339 + * @token:     Token of DPIO object
17340 + * @irq_index: The interrupt index to configure
17341 + * @status:    Returned interrupts status - one bit per cause:
17342 + *                     0 = no interrupt pending
17343 + *                     1 = interrupt pending
17344 + *
17345 + * Return:     '0' on Success; Error code otherwise.
17346 + */
17347 +int dpio_get_irq_status(struct fsl_mc_io       *mc_io,
17348 +                       uint32_t                cmd_flags,
17349 +                       uint16_t                token,
17350 +                       uint8_t                 irq_index,
17351 +                       uint32_t                *status);
17352 +
17353 +/**
17354 + * dpio_clear_irq_status() - Clear a pending interrupt's status
17355 + * @mc_io:     Pointer to MC portal's I/O object
17356 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17357 + * @token:     Token of DPIO object
17358 + * @irq_index: The interrupt index to configure
17359 + * @status:    bits to clear (W1C) - one bit per cause:
17360 + *                     0 = don't change
17361 + *                     1 = clear status bit
17362 + *
17363 + * Return:     '0' on Success; Error code otherwise.
17364 + */
17365 +int dpio_clear_irq_status(struct fsl_mc_io     *mc_io,
17366 +                         uint32_t              cmd_flags,
17367 +                         uint16_t              token,
17368 +                         uint8_t               irq_index,
17369 +                         uint32_t              status);
17370 +
17371 +/**
17372 + * struct dpio_attr - Structure representing DPIO attributes
17373 + * @id: DPIO object ID
17374 + * @version: DPIO version
17375 + * @qbman_portal_ce_offset: offset of the software portal cache-enabled area
17376 + * @qbman_portal_ci_offset: offset of the software portal cache-inhibited area
17377 + * @qbman_portal_id: Software portal ID
17378 + * @channel_mode: Notification channel mode
17379 + * @num_priorities: Number of priorities for the notification channel (1-8);
17380 + *                     relevant only if 'channel_mode = DPIO_LOCAL_CHANNEL'
17381 + * @qbman_version: QBMAN version
17382 + */
17383 +struct dpio_attr {
17384 +       int                     id;
17385 +       /**
17386 +        * struct version - DPIO version
17387 +        * @major: DPIO major version
17388 +        * @minor: DPIO minor version
17389 +        */
17390 +       struct {
17391 +               uint16_t major;
17392 +               uint16_t minor;
17393 +       } version;
17394 +       uint64_t                qbman_portal_ce_offset;
17395 +       uint64_t                qbman_portal_ci_offset;
17396 +       uint16_t                qbman_portal_id;
17397 +       enum dpio_channel_mode  channel_mode;
17398 +       uint8_t                 num_priorities;
17399 +       uint32_t                qbman_version;
17400 +};
17401 +
17402 +/**
17403 + * dpio_get_attributes() - Retrieve DPIO attributes
17404 + * @mc_io:     Pointer to MC portal's I/O object
17405 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17406 + * @token:     Token of DPIO object
17407 + * @attr:      Returned object's attributes
17408 + *
17409 + * Return:     '0' on Success; Error code otherwise
17410 + */
17411 +int dpio_get_attributes(struct fsl_mc_io       *mc_io,
17412 +                       uint32_t                cmd_flags,
17413 +                       uint16_t                token,
17414 +                       struct dpio_attr        *attr);
17415 +#endif /* __FSL_DPIO_H */
17416 diff --git a/drivers/net/dpaa2/mc/fsl_dpio_cmd.h b/drivers/net/dpaa2/mc/fsl_dpio_cmd.h
17417 new file mode 100644
17418 index 0000000..f339cd6
17419 --- /dev/null
17420 +++ b/drivers/net/dpaa2/mc/fsl_dpio_cmd.h
17421 @@ -0,0 +1,184 @@
17422 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
17423 + *
17424 + * Redistribution and use in source and binary forms, with or without
17425 + * modification, are permitted provided that the following conditions are met:
17426 + * * Redistributions of source code must retain the above copyright
17427 + * notice, this list of conditions and the following disclaimer.
17428 + * * Redistributions in binary form must reproduce the above copyright
17429 + * notice, this list of conditions and the following disclaimer in the
17430 + * documentation and/or other materials provided with the distribution.
17431 + * * Neither the name of the above-listed copyright holders nor the
17432 + * names of any contributors may be used to endorse or promote products
17433 + * derived from this software without specific prior written permission.
17434 + *
17435 + *
17436 + * ALTERNATIVELY, this software may be distributed under the terms of the
17437 + * GNU General Public License ("GPL") as published by the Free Software
17438 + * Foundation, either version 2 of that License or (at your option) any
17439 + * later version.
17440 + *
17441 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17442 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17443 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17444 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
17445 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
17446 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
17447 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
17448 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
17449 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
17450 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
17451 + * POSSIBILITY OF SUCH DAMAGE.
17452 + */
17453 +#ifndef _FSL_DPIO_CMD_H
17454 +#define _FSL_DPIO_CMD_H
17455 +
17456 +/* DPIO Version */
17457 +#define DPIO_VER_MAJOR                         3
17458 +#define DPIO_VER_MINOR                         2
17459 +
17460 +/* Command IDs */
17461 +#define DPIO_CMDID_CLOSE                               0x800
17462 +#define DPIO_CMDID_OPEN                                        0x803
17463 +#define DPIO_CMDID_CREATE                              0x903
17464 +#define DPIO_CMDID_DESTROY                             0x900
17465 +
17466 +#define DPIO_CMDID_ENABLE                              0x002
17467 +#define DPIO_CMDID_DISABLE                             0x003
17468 +#define DPIO_CMDID_GET_ATTR                            0x004
17469 +#define DPIO_CMDID_RESET                               0x005
17470 +#define DPIO_CMDID_IS_ENABLED                          0x006
17471 +
17472 +#define DPIO_CMDID_SET_IRQ                             0x010
17473 +#define DPIO_CMDID_GET_IRQ                             0x011
17474 +#define DPIO_CMDID_SET_IRQ_ENABLE                      0x012
17475 +#define DPIO_CMDID_GET_IRQ_ENABLE                      0x013
17476 +#define DPIO_CMDID_SET_IRQ_MASK                                0x014
17477 +#define DPIO_CMDID_GET_IRQ_MASK                                0x015
17478 +#define DPIO_CMDID_GET_IRQ_STATUS                      0x016
17479 +#define DPIO_CMDID_CLEAR_IRQ_STATUS                    0x017
17480 +
17481 +#define DPIO_CMDID_SET_STASHING_DEST           0x120
17482 +#define DPIO_CMDID_GET_STASHING_DEST           0x121
17483 +#define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL          0x122
17484 +#define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL       0x123
17485 +
17486 +/*                cmd, param, offset, width, type, arg_name */
17487 +#define DPIO_CMD_OPEN(cmd, dpio_id) \
17488 +       MC_CMD_OP(cmd, 0, 0,  32, int,     dpio_id)
17489 +
17490 +/*                cmd, param, offset, width, type, arg_name */
17491 +#define DPIO_CMD_CREATE(cmd, cfg) \
17492 +do { \
17493 +       MC_CMD_OP(cmd, 0, 16, 2,  enum dpio_channel_mode,       \
17494 +                                          cfg->channel_mode);\
17495 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t, cfg->num_priorities);\
17496 +} while (0)
17497 +
17498 +/*                cmd, param, offset, width, type, arg_name */
17499 +#define DPIO_RSP_IS_ENABLED(cmd, en) \
17500 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
17501 +
17502 +/*                cmd, param, offset, width, type, arg_name */
17503 +#define DPIO_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
17504 +do { \
17505 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
17506 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
17507 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
17508 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
17509 +} while (0)
17510 +
17511 +/*                cmd, param, offset, width, type, arg_name */
17512 +#define DPIO_CMD_GET_IRQ(cmd, irq_index) \
17513 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
17514 +
17515 +/*                cmd, param, offset, width, type, arg_name */
17516 +#define DPIO_RSP_GET_IRQ(cmd, type, irq_cfg) \
17517 +do { \
17518 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
17519 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
17520 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
17521 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
17522 +} while (0)
17523 +
17524 +/*                cmd, param, offset, width, type, arg_name */
17525 +#define DPIO_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
17526 +do { \
17527 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t, en); \
17528 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t, irq_index);\
17529 +} while (0)
17530 +
17531 +/*                cmd, param, offset, width, type, arg_name */
17532 +#define DPIO_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
17533 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
17534 +
17535 +/*                cmd, param, offset, width, type, arg_name */
17536 +#define DPIO_RSP_GET_IRQ_ENABLE(cmd, en) \
17537 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
17538 +
17539 +/*                cmd, param, offset, width, type, arg_name */
17540 +#define DPIO_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
17541 +do { \
17542 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
17543 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
17544 +} while (0)
17545 +
17546 +/*                cmd, param, offset, width, type, arg_name */
17547 +#define DPIO_CMD_GET_IRQ_MASK(cmd, irq_index) \
17548 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
17549 +
17550 +/*                cmd, param, offset, width, type, arg_name */
17551 +#define DPIO_RSP_GET_IRQ_MASK(cmd, mask) \
17552 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
17553 +
17554 +/*                cmd, param, offset, width, type, arg_name */
17555 +#define DPIO_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
17556 +do { \
17557 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
17558 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
17559 +} while (0)
17560 +
17561 +/*                cmd, param, offset, width, type, arg_name */
17562 +#define DPIO_RSP_GET_IRQ_STATUS(cmd, status) \
17563 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
17564 +
17565 +/*                cmd, param, offset, width, type, arg_name */
17566 +#define DPIO_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
17567 +do { \
17568 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
17569 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
17570 +} while (0)
17571 +
17572 +/*                cmd, param, offset, width, type, arg_name */
17573 +#define DPIO_RSP_GET_ATTR(cmd, attr) \
17574 +do { \
17575 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id);\
17576 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->qbman_portal_id);\
17577 +       MC_RSP_OP(cmd, 0, 48, 8,  uint8_t,  attr->num_priorities);\
17578 +       MC_RSP_OP(cmd, 0, 56, 4,  enum dpio_channel_mode, attr->channel_mode);\
17579 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, attr->qbman_portal_ce_offset);\
17580 +       MC_RSP_OP(cmd, 2, 0,  64, uint64_t, attr->qbman_portal_ci_offset);\
17581 +       MC_RSP_OP(cmd, 3, 0,  16, uint16_t, attr->version.major);\
17582 +       MC_RSP_OP(cmd, 3, 16, 16, uint16_t, attr->version.minor);\
17583 +       MC_RSP_OP(cmd, 3, 32, 32, uint32_t, attr->qbman_version);\
17584 +} while (0)
17585 +
17586 +/*                cmd, param, offset, width, type, arg_name */
17587 +#define DPIO_CMD_SET_STASHING_DEST(cmd, sdest) \
17588 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  sdest)
17589 +
17590 +/*                cmd, param, offset, width, type, arg_name */
17591 +#define DPIO_RSP_GET_STASHING_DEST(cmd, sdest) \
17592 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  sdest)
17593 +
17594 +/*                cmd, param, offset, width, type, arg_name */
17595 +#define DPIO_CMD_ADD_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id) \
17596 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpcon_id)
17597 +
17598 +/*                cmd, param, offset, width, type, arg_name */
17599 +#define DPIO_RSP_ADD_STATIC_DEQUEUE_CHANNEL(cmd, channel_index) \
17600 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  channel_index)
17601 +
17602 +/*                cmd, param, offset, width, type, arg_name */
17603 +#define DPIO_CMD_REMOVE_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id) \
17604 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpcon_id)
17605 +#endif /* _FSL_DPIO_CMD_H */
17606 diff --git a/drivers/net/dpaa2/mc/fsl_dpkg.h b/drivers/net/dpaa2/mc/fsl_dpkg.h
17607 new file mode 100644
17608 index 0000000..b2bceaf
17609 --- /dev/null
17610 +++ b/drivers/net/dpaa2/mc/fsl_dpkg.h
17611 @@ -0,0 +1,174 @@
17612 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
17613 + *
17614 + * Redistribution and use in source and binary forms, with or without
17615 + * modification, are permitted provided that the following conditions are met:
17616 + * * Redistributions of source code must retain the above copyright
17617 + * notice, this list of conditions and the following disclaimer.
17618 + * * Redistributions in binary form must reproduce the above copyright
17619 + * notice, this list of conditions and the following disclaimer in the
17620 + * documentation and/or other materials provided with the distribution.
17621 + * * Neither the name of the above-listed copyright holders nor the
17622 + * names of any contributors may be used to endorse or promote products
17623 + * derived from this software without specific prior written permission.
17624 + *
17625 + *
17626 + * ALTERNATIVELY, this software may be distributed under the terms of the
17627 + * GNU General Public License ("GPL") as published by the Free Software
17628 + * Foundation, either version 2 of that License or (at your option) any
17629 + * later version.
17630 + *
17631 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17632 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17633 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17634 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
17635 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
17636 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
17637 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
17638 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
17639 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
17640 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
17641 + * POSSIBILITY OF SUCH DAMAGE.
17642 + */
17643 +#ifndef __FSL_DPKG_H_
17644 +#define __FSL_DPKG_H_
17645 +
17646 +#include <fsl_net.h>
17647 +
17648 +/* Data Path Key Generator API
17649 + * Contains initialization APIs and runtime APIs for the Key Generator
17650 + */
17651 +
17652 +/** Key Generator properties */
17653 +
17654 +/**
17655 + * Number of masks per key extraction
17656 + */
17657 +#define DPKG_NUM_OF_MASKS              4
17658 +/**
17659 + * Number of extractions per key profile
17660 + */
17661 +#define DPKG_MAX_NUM_OF_EXTRACTS       10
17662 +
17663 +/**
17664 + * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
17665 + * @DPKG_FROM_HDR: Extract selected bytes from header, by offset
17666 + * @DPKG_FROM_FIELD: Extract selected bytes from header, by offset from field
17667 + * @DPKG_FULL_FIELD: Extract a full field
17668 + */
17669 +enum dpkg_extract_from_hdr_type {
17670 +       DPKG_FROM_HDR = 0,
17671 +       DPKG_FROM_FIELD = 1,
17672 +       DPKG_FULL_FIELD = 2
17673 +};
17674 +
17675 +/**
17676 + * enum dpkg_extract_type - Enumeration for selecting extraction type
17677 + * @DPKG_EXTRACT_FROM_HDR: Extract from the header
17678 + * @DPKG_EXTRACT_FROM_DATA: Extract from data not in specific header
17679 + * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
17680 + *     e.g. can be used to extract header existence;
17681 + *     please refer to 'Parse Result definition' section in the parser BG
17682 + */
17683 +enum dpkg_extract_type {
17684 +       DPKG_EXTRACT_FROM_HDR = 0,
17685 +       DPKG_EXTRACT_FROM_DATA = 1,
17686 +       DPKG_EXTRACT_FROM_PARSE = 3
17687 +};
17688 +
17689 +/**
17690 + * struct dpkg_mask - A structure for defining a single extraction mask
17691 + * @mask: Byte mask for the extracted content
17692 + * @offset: Offset within the extracted content
17693 + */
17694 +struct dpkg_mask {
17695 +       uint8_t mask;
17696 +       uint8_t offset;
17697 +};
17698 +
17699 +/**
17700 + * struct dpkg_extract - A structure for defining a single extraction
17701 + * @type: Determines how the union below is interpreted:
17702 + *             DPKG_EXTRACT_FROM_HDR: selects 'from_hdr';
17703 + *             DPKG_EXTRACT_FROM_DATA: selects 'from_data';
17704 + *             DPKG_EXTRACT_FROM_PARSE: selects 'from_parse'
17705 + * @extract: Selects extraction method
17706 + * @num_of_byte_masks: Defines the number of valid entries in the array below;
17707 + *             This is also the number of bytes to be used as masks
17708 + * @masks: Masks parameters
17709 + */
17710 +struct dpkg_extract {
17711 +       enum dpkg_extract_type type;
17712 +       /**
17713 +        * union extract - Selects extraction method
17714 +        * @from_hdr - Used when 'type = DPKG_EXTRACT_FROM_HDR'
17715 +        * @from_data - Used when 'type = DPKG_EXTRACT_FROM_DATA'
17716 +        * @from_parse - Used when 'type = DPKG_EXTRACT_FROM_PARSE'
17717 +        */
17718 +       union {
17719 +               /**
17720 +                * struct from_hdr - Used when 'type = DPKG_EXTRACT_FROM_HDR'
17721 +                * @prot: Any of the supported headers
17722 +                * @type: Defines the type of header extraction:
17723 +                *      DPKG_FROM_HDR: use size & offset below;
17724 +                *      DPKG_FROM_FIELD: use field, size and offset below;
17725 +                *      DPKG_FULL_FIELD: use field below
17726 +                * @field: One of the supported fields (NH_FLD_)
17727 +                *
17728 +                * @size: Size in bytes
17729 +                * @offset: Byte offset
17730 +                * @hdr_index: Clear for cases not listed below;
17731 +                *      Used for protocols that may have more than a single
17732 +                *      header, 0 indicates an outer header;
17733 +                *      Supported protocols (possible values):
17734 +                *      NET_PROT_VLAN (0, HDR_INDEX_LAST);
17735 +                *      NET_PROT_MPLS (0, 1, HDR_INDEX_LAST);
17736 +                *      NET_PROT_IP(0, HDR_INDEX_LAST);
17737 +                *      NET_PROT_IPv4(0, HDR_INDEX_LAST);
17738 +                *      NET_PROT_IPv6(0, HDR_INDEX_LAST);
17739 +                */
17740 +
17741 +               struct {
17742 +                       enum net_prot                   prot;
17743 +                       enum dpkg_extract_from_hdr_type type;
17744 +                       uint32_t                        field;
17745 +                       uint8_t                 size;
17746 +                       uint8_t                 offset;
17747 +                       uint8_t                 hdr_index;
17748 +               } from_hdr;
17749 +               /**
17750 +                * struct from_data - Used when 'type = DPKG_EXTRACT_FROM_DATA'
17751 +                * @size: Size in bytes
17752 +                * @offset: Byte offset
17753 +                */
17754 +               struct {
17755 +                       uint8_t size;
17756 +                       uint8_t offset;
17757 +               } from_data;
17758 +
17759 +               /**
17760 +                * struct from_parse - Used when 'type = DPKG_EXTRACT_FROM_PARSE'
17761 +                * @size: Size in bytes
17762 +                * @offset: Byte offset
17763 +                */
17764 +               struct {
17765 +                       uint8_t size;
17766 +                       uint8_t offset;
17767 +               } from_parse;
17768 +       } extract;
17769 +
17770 +       uint8_t         num_of_byte_masks;
17771 +       struct dpkg_mask        masks[DPKG_NUM_OF_MASKS];
17772 +};
17773 +
17774 +/**
17775 + * struct dpkg_profile_cfg - A structure for defining a full Key Generation
17776 + *                             profile (rule)
17777 + * @num_extracts: Defines the number of valid entries in the array below
17778 + * @extracts: Array of required extractions
17779 + */
17780 +struct dpkg_profile_cfg {
17781 +       uint8_t num_extracts;
17782 +       struct dpkg_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
17783 +};
17784 +
17785 +#endif /* __FSL_DPKG_H_ */
17786 diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
17787 new file mode 100644
17788 index 0000000..ad27772
17789 --- /dev/null
17790 +++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
17791 @@ -0,0 +1,593 @@
17792 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
17793 + *
17794 + * Redistribution and use in source and binary forms, with or without
17795 + * modification, are permitted provided that the following conditions are met:
17796 + * * Redistributions of source code must retain the above copyright
17797 + * notice, this list of conditions and the following disclaimer.
17798 + * * Redistributions in binary form must reproduce the above copyright
17799 + * notice, this list of conditions and the following disclaimer in the
17800 + * documentation and/or other materials provided with the distribution.
17801 + * * Neither the name of the above-listed copyright holders nor the
17802 + * names of any contributors may be used to endorse or promote products
17803 + * derived from this software without specific prior written permission.
17804 + *
17805 + *
17806 + * ALTERNATIVELY, this software may be distributed under the terms of the
17807 + * GNU General Public License ("GPL") as published by the Free Software
17808 + * Foundation, either version 2 of that License or (at your option) any
17809 + * later version.
17810 + *
17811 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17812 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17813 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17814 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
17815 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
17816 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
17817 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
17818 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
17819 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
17820 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
17821 + * POSSIBILITY OF SUCH DAMAGE.
17822 + */
17823 +#ifndef __FSL_DPMAC_H
17824 +#define __FSL_DPMAC_H
17825 +
17826 +/* Data Path MAC API
17827 + * Contains initialization APIs and runtime control APIs for DPMAC
17828 + */
17829 +
17830 +struct fsl_mc_io;
17831 +
17832 +/**
17833 + * dpmac_open() - Open a control session for the specified object.
17834 + * @mc_io:     Pointer to MC portal's I/O object
17835 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17836 + * @dpmac_id:  DPMAC unique ID
17837 + * @token:     Returned token; use in subsequent API calls
17838 + *
17839 + * This function can be used to open a control session for an
17840 + * already created object; an object may have been declared in
17841 + * the DPL or by calling the dpmac_create function.
17842 + * This function returns a unique authentication token,
17843 + * associated with the specific object ID and the specific MC
17844 + * portal; this token must be used in all subsequent commands for
17845 + * this specific object
17846 + *
17847 + * Return:     '0' on Success; Error code otherwise.
17848 + */
17849 +int dpmac_open(struct fsl_mc_io        *mc_io,
17850 +              uint32_t         cmd_flags,
17851 +              int                      dpmac_id,
17852 +              uint16_t         *token);
17853 +
17854 +/**
17855 + * dpmac_close() - Close the control session of the object
17856 + * @mc_io:     Pointer to MC portal's I/O object
17857 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17858 + * @token:     Token of DPMAC object
17859 + *
17860 + * After this function is called, no further operations are
17861 + * allowed on the object without opening a new control session.
17862 + *
17863 + * Return:     '0' on Success; Error code otherwise.
17864 + */
17865 +int dpmac_close(struct fsl_mc_io       *mc_io,
17866 +               uint32_t                cmd_flags,
17867 +               uint16_t                token);
17868 +
17869 +/**
17870 + * enum dpmac_link_type -  DPMAC link type
17871 + * @DPMAC_LINK_TYPE_NONE: No link
17872 + * @DPMAC_LINK_TYPE_FIXED: Link is fixed type
17873 + * @DPMAC_LINK_TYPE_PHY: Link by PHY ID
17874 + * @DPMAC_LINK_TYPE_BACKPLANE: Backplane link type
17875 + */
17876 +enum dpmac_link_type {
17877 +       DPMAC_LINK_TYPE_NONE,
17878 +       DPMAC_LINK_TYPE_FIXED,
17879 +       DPMAC_LINK_TYPE_PHY,
17880 +       DPMAC_LINK_TYPE_BACKPLANE
17881 +};
17882 +
17883 +/**
17884 + * enum dpmac_eth_if - DPMAC Ethrnet interface
17885 + * @DPMAC_ETH_IF_MII: MII interface
17886 + * @DPMAC_ETH_IF_RMII: RMII interface
17887 + * @DPMAC_ETH_IF_SMII: SMII interface
17888 + * @DPMAC_ETH_IF_GMII: GMII interface
17889 + * @DPMAC_ETH_IF_RGMII: RGMII interface
17890 + * @DPMAC_ETH_IF_SGMII: SGMII interface
17891 + * @DPMAC_ETH_IF_QSGMII: QSGMII interface
17892 + * @DPMAC_ETH_IF_XAUI: XAUI interface
17893 + * @DPMAC_ETH_IF_XFI: XFI interface
17894 + */
17895 +enum dpmac_eth_if {
17896 +       DPMAC_ETH_IF_MII,
17897 +       DPMAC_ETH_IF_RMII,
17898 +       DPMAC_ETH_IF_SMII,
17899 +       DPMAC_ETH_IF_GMII,
17900 +       DPMAC_ETH_IF_RGMII,
17901 +       DPMAC_ETH_IF_SGMII,
17902 +       DPMAC_ETH_IF_QSGMII,
17903 +       DPMAC_ETH_IF_XAUI,
17904 +       DPMAC_ETH_IF_XFI
17905 +};
17906 +
17907 +/**
17908 + * struct dpmac_cfg - Structure representing DPMAC configuration
17909 + * @mac_id:    Represents the Hardware MAC ID; in case of multiple WRIOP,
17910 + *             the MAC IDs are continuous.
17911 + *             For example:  2 WRIOPs, 16 MACs in each:
17912 + *                             MAC IDs for the 1st WRIOP: 1-16,
17913 + *                             MAC IDs for the 2nd WRIOP: 17-32.
17914 + */
17915 +struct dpmac_cfg {
17916 +       int mac_id;
17917 +};
17918 +
17919 +/**
17920 + * dpmac_create() - Create the DPMAC object.
17921 + * @mc_io:     Pointer to MC portal's I/O object
17922 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17923 + * @cfg:       Configuration structure
17924 + * @token:     Returned token; use in subsequent API calls
17925 + *
17926 + * Create the DPMAC object, allocate required resources and
17927 + * perform required initialization.
17928 + *
17929 + * The object can be created either by declaring it in the
17930 + * DPL file, or by calling this function.
17931 + * This function returns a unique authentication token,
17932 + * associated with the specific object ID and the specific MC
17933 + * portal; this token must be used in all subsequent calls to
17934 + * this specific object. For objects that are created using the
17935 + * DPL file, call dpmac_open function to get an authentication
17936 + * token first.
17937 + *
17938 + * Return:     '0' on Success; Error code otherwise.
17939 + */
17940 +int dpmac_create(struct fsl_mc_io      *mc_io,
17941 +                uint32_t               cmd_flags,
17942 +                const struct dpmac_cfg *cfg,
17943 +                uint16_t               *token);
17944 +
17945 +/**
17946 + * dpmac_destroy() - Destroy the DPMAC object and release all its resources.
17947 + * @mc_io:     Pointer to MC portal's I/O object
17948 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17949 + * @token:     Token of DPMAC object
17950 + *
17951 + * Return:     '0' on Success; error code otherwise.
17952 + */
17953 +int dpmac_destroy(struct fsl_mc_io     *mc_io,
17954 +                 uint32_t              cmd_flags,
17955 +                 uint16_t              token);
17956 +
17957 +/**
17958 + * DPMAC IRQ Index and Events
17959 + */
17960 +
17961 +/**
17962 + * IRQ index
17963 + */
17964 +#define DPMAC_IRQ_INDEX                                                0
17965 +/**
17966 + * IRQ event - indicates a change in link state
17967 + */
17968 +#define DPMAC_IRQ_EVENT_LINK_CFG_REQ           0x00000001
17969 +/**
17970 + * IRQ event - Indicates that the link state changed
17971 + */
17972 +#define DPMAC_IRQ_EVENT_LINK_CHANGED           0x00000002
17973 +
17974 +/**
17975 + * struct dpmac_irq_cfg - IRQ configuration
17976 + * @addr:      Address that must be written to signal a message-based interrupt
17977 + * @val:       Value to write into irq_addr address
17978 + * @irq_num: A user defined number associated with this IRQ
17979 + */
17980 +struct dpmac_irq_cfg {
17981 +            uint64_t           addr;
17982 +            uint32_t           val;
17983 +            int                irq_num;
17984 +};
17985 +
17986 +/**
17987 + * dpmac_set_irq() - Set IRQ information for the DPMAC to trigger an interrupt.
17988 + * @mc_io:     Pointer to MC portal's I/O object
17989 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17990 + * @token:     Token of DPMAC object
17991 + * @irq_index: Identifies the interrupt index to configure
17992 + * @irq_cfg:   IRQ configuration
17993 + *
17994 + * Return:     '0' on Success; Error code otherwise.
17995 + */
17996 +int dpmac_set_irq(struct fsl_mc_io     *mc_io,
17997 +                 uint32_t              cmd_flags,
17998 +                 uint16_t              token,
17999 +                 uint8_t               irq_index,
18000 +                 struct dpmac_irq_cfg  *irq_cfg);
18001 +
18002 +/**
18003 + * dpmac_get_irq() - Get IRQ information from the DPMAC.
18004 + * @mc_io:     Pointer to MC portal's I/O object
18005 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18006 + * @token:     Token of DPMAC object
18007 + * @irq_index: The interrupt index to configure
18008 + * @type:      Interrupt type: 0 represents message interrupt
18009 + *             type (both irq_addr and irq_val are valid)
18010 + * @irq_cfg:   IRQ attributes
18011 + *
18012 + * Return:     '0' on Success; Error code otherwise.
18013 + */
18014 +int dpmac_get_irq(struct fsl_mc_io     *mc_io,
18015 +                 uint32_t              cmd_flags,
18016 +                 uint16_t              token,
18017 +                 uint8_t               irq_index,
18018 +                 int                   *type,
18019 +                 struct dpmac_irq_cfg  *irq_cfg);
18020 +
18021 +/**
18022 + * dpmac_set_irq_enable() - Set overall interrupt state.
18023 + * @mc_io:     Pointer to MC portal's I/O object
18024 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18025 + * @token:     Token of DPMAC object
18026 + * @irq_index: The interrupt index to configure
18027 + * @en:        Interrupt state - enable = 1, disable = 0
18028 + *
18029 + * Allows GPP software to control when interrupts are generated.
18030 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
18031 + * overall interrupt state. if the interrupt is disabled no causes will cause
18032 + * an interrupt.
18033 + *
18034 + * Return:     '0' on Success; Error code otherwise.
18035 + */
18036 +int dpmac_set_irq_enable(struct fsl_mc_io      *mc_io,
18037 +                        uint32_t               cmd_flags,
18038 +                        uint16_t               token,
18039 +                        uint8_t                irq_index,
18040 +                        uint8_t                en);
18041 +
18042 +/**
18043 + * dpmac_get_irq_enable() - Get overall interrupt state
18044 + * @mc_io:     Pointer to MC portal's I/O object
18045 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18046 + * @token:     Token of DPMAC object
18047 + * @irq_index: The interrupt index to configure
18048 + * @en:                Returned interrupt state - enable = 1, disable = 0
18049 + *
18050 + * Return:     '0' on Success; Error code otherwise.
18051 + */
18052 +int dpmac_get_irq_enable(struct fsl_mc_io      *mc_io,
18053 +                        uint32_t               cmd_flags,
18054 +                        uint16_t               token,
18055 +                        uint8_t                irq_index,
18056 +                        uint8_t                *en);
18057 +
18058 +/**
18059 + * dpmac_set_irq_mask() - Set interrupt mask.
18060 + * @mc_io:     Pointer to MC portal's I/O object
18061 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18062 + * @token:     Token of DPMAC object
18063 + * @irq_index: The interrupt index to configure
18064 + * @mask:      Event mask to trigger interrupt;
18065 + *                     each bit:
18066 + *                             0 = ignore event
18067 + *                             1 = consider event for asserting IRQ
18068 + *
18069 + * Every interrupt can have up to 32 causes and the interrupt model supports
18070 + * masking/unmasking each cause independently
18071 + *
18072 + * Return:     '0' on Success; Error code otherwise.
18073 + */
18074 +int dpmac_set_irq_mask(struct fsl_mc_io *mc_io,
18075 +                      uint32_t cmd_flags,
18076 +                      uint16_t         token,
18077 +                      uint8_t          irq_index,
18078 +                      uint32_t         mask);
18079 +
18080 +/**
18081 + * dpmac_get_irq_mask() - Get interrupt mask.
18082 + * @mc_io:     Pointer to MC portal's I/O object
18083 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18084 + * @token:     Token of DPMAC object
18085 + * @irq_index: The interrupt index to configure
18086 + * @mask:      Returned event mask to trigger interrupt
18087 + *
18088 + * Every interrupt can have up to 32 causes and the interrupt model supports
18089 + * masking/unmasking each cause independently
18090 + *
18091 + * Return:     '0' on Success; Error code otherwise.
18092 + */
18093 +int dpmac_get_irq_mask(struct fsl_mc_io *mc_io,
18094 +                      uint32_t cmd_flags,
18095 +                      uint16_t         token,
18096 +                      uint8_t          irq_index,
18097 +                      uint32_t         *mask);
18098 +
18099 +/**
18100 + * dpmac_get_irq_status() - Get the current status of any pending interrupts.
18101 + *
18102 + * @mc_io:     Pointer to MC portal's I/O object
18103 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18104 + * @token:     Token of DPMAC object
18105 + * @irq_index: The interrupt index to configure
18106 + * @status:    Returned interrupts status - one bit per cause:
18107 + *                     0 = no interrupt pending
18108 + *                     1 = interrupt pending
18109 + *
18110 + * Return:     '0' on Success; Error code otherwise.
18111 + */
18112 +int dpmac_get_irq_status(struct fsl_mc_io      *mc_io,
18113 +                        uint32_t               cmd_flags,
18114 +                        uint16_t               token,
18115 +                        uint8_t                irq_index,
18116 +                        uint32_t               *status);
18117 +
18118 +/**
18119 + * dpmac_clear_irq_status() - Clear a pending interrupt's status
18120 + *
18121 + * @mc_io:     Pointer to MC portal's I/O object
18122 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18123 + * @token:     Token of DPMAC object
18124 + * @irq_index: The interrupt index to configure
18125 + * @status:    Bits to clear (W1C) - one bit per cause:
18126 + *                                     0 = don't change
18127 + *                                     1 = clear status bit
18128 + *
18129 + * Return:     '0' on Success; Error code otherwise.
18130 + */
18131 +int dpmac_clear_irq_status(struct fsl_mc_io    *mc_io,
18132 +                          uint32_t             cmd_flags,
18133 +                          uint16_t             token,
18134 +                          uint8_t              irq_index,
18135 +                          uint32_t             status);
18136 +
18137 +/**
18138 + * struct dpmac_attr - Structure representing DPMAC attributes
18139 + * @id:                DPMAC object ID
18140 + * @phy_id:    PHY ID
18141 + * @link_type: link type
18142 + * @eth_if: Ethernet interface
18143 + * @max_rate: Maximum supported rate - in Mbps
18144 + * @version:   DPMAC version
18145 + */
18146 +struct dpmac_attr {
18147 +       int                     id;
18148 +       int                     phy_id;
18149 +       enum dpmac_link_type    link_type;
18150 +       enum dpmac_eth_if       eth_if;
18151 +       uint32_t                max_rate;
18152 +       /**
18153 +        * struct version - Structure representing DPMAC version
18154 +        * @major:      DPMAC major version
18155 +        * @minor:      DPMAC minor version
18156 +        */
18157 +       struct {
18158 +               uint16_t major;
18159 +               uint16_t minor;
18160 +       } version;
18161 +};
18162 +
18163 +/**
18164 + * dpmac_get_attributes - Retrieve DPMAC attributes.
18165 + *
18166 + * @mc_io:     Pointer to MC portal's I/O object
18167 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18168 + * @token:     Token of DPMAC object
18169 + * @attr:      Returned object's attributes
18170 + *
18171 + * Return:     '0' on Success; Error code otherwise.
18172 + */
18173 +int dpmac_get_attributes(struct fsl_mc_io      *mc_io,
18174 +                        uint32_t               cmd_flags,
18175 +                        uint16_t               token,
18176 +                        struct dpmac_attr      *attr);
18177 +
18178 +/**
18179 + * struct dpmac_mdio_cfg - DPMAC MDIO read/write parameters
18180 + * @phy_addr: MDIO device address
18181 + * @reg: Address of the register within the Clause 45 PHY device from which data
18182 + *     is to be read
18183 + * @data: Data read/write from/to MDIO
18184 + */
18185 +struct dpmac_mdio_cfg {
18186 +       uint8_t         phy_addr;
18187 +       uint8_t         reg;
18188 +       uint16_t        data;
18189 +};
18190 +
18191 +/**
18192 + * dpmac_mdio_read() - Perform MDIO read transaction
18193 + * @mc_io:     Pointer to opaque I/O object
18194 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18195 + * @token:     Token of DPMAC object
18196 + * @cfg:       Structure with MDIO transaction parameters
18197 + *
18198 + * Return:     '0' on Success; Error code otherwise.
18199 + */
18200 +int dpmac_mdio_read(struct fsl_mc_io           *mc_io,
18201 +                   uint32_t                    cmd_flags,
18202 +                   uint16_t                    token,
18203 +                   struct dpmac_mdio_cfg       *cfg);
18204 +
18205 +/**
18206 + * dpmac_mdio_write() - Perform MDIO write transaction
18207 + * @mc_io:     Pointer to opaque I/O object
18208 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18209 + * @token:     Token of DPMAC object
18210 + * @cfg:       Structure with MDIO transaction parameters
18211 + *
18212 + * Return:     '0' on Success; Error code otherwise.
18213 + */
18214 +int dpmac_mdio_write(struct fsl_mc_io          *mc_io,
18215 +                    uint32_t                   cmd_flags,
18216 +                    uint16_t                   token,
18217 +                    struct dpmac_mdio_cfg      *cfg);
18218 +
18219 +/**
18220 + * DPMAC link configuration/state options
18221 + */
18222 +
18223 +/**
18224 + * Enable auto-negotiation
18225 + */
18226 +#define DPMAC_LINK_OPT_AUTONEG         0x0000000000000001ULL
18227 +/**
18228 + * Enable half-duplex mode
18229 + */
18230 +#define DPMAC_LINK_OPT_HALF_DUPLEX     0x0000000000000002ULL
18231 +/**
18232 + * Enable pause frames
18233 + */
18234 +#define DPMAC_LINK_OPT_PAUSE           0x0000000000000004ULL
18235 +/**
18236 + * Enable a-symmetric pause frames
18237 + */
18238 +#define DPMAC_LINK_OPT_ASYM_PAUSE      0x0000000000000008ULL
18239 +
18240 +/**
18241 + * struct dpmac_link_cfg - Structure representing DPMAC link configuration
18242 + * @rate: Link's rate - in Mbps
18243 + * @options: Enable/Disable DPMAC link cfg features (bitmap)
18244 + */
18245 +struct dpmac_link_cfg {
18246 +       uint32_t rate;
18247 +       uint64_t options;
18248 +};
18249 +
18250 +/**
18251 + * dpmac_get_link_cfg() - Get Ethernet link configuration
18252 + * @mc_io:     Pointer to opaque I/O object
18253 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18254 + * @token:     Token of DPMAC object
18255 + * @cfg:       Returned structure with the link configuration
18256 + *
18257 + * Return:     '0' on Success; Error code otherwise.
18258 + */
18259 +int dpmac_get_link_cfg(struct fsl_mc_io        *mc_io,
18260 +                      uint32_t         cmd_flags,
18261 +                      uint16_t         token,
18262 +                      struct dpmac_link_cfg    *cfg);
18263 +
18264 +/**
18265 + * struct dpmac_link_state - DPMAC link configuration request
18266 + * @rate: Rate in Mbps
18267 + * @options: Enable/Disable DPMAC link cfg features (bitmap)
18268 + * @up: Link state
18269 + */
18270 +struct dpmac_link_state {
18271 +       uint32_t        rate;
18272 +       uint64_t        options;
18273 +       int             up;
18274 +};
18275 +
18276 +/**
18277 + * dpmac_set_link_state() - Set the Ethernet link status
18278 + * @mc_io:     Pointer to opaque I/O object
18279 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18280 + * @token:     Token of DPMAC object
18281 + * @link_state:        Link state configuration
18282 + *
18283 + * Return:     '0' on Success; Error code otherwise.
18284 + */
18285 +int dpmac_set_link_state(struct fsl_mc_io              *mc_io,
18286 +                        uint32_t                       cmd_flags,
18287 +                        uint16_t                       token,
18288 +                        struct dpmac_link_state        *link_state);
18289 +
18290 +/**
18291 + * enum dpmac_counter - DPMAC counter types
18292 + * @DPMAC_CNT_ING_FRAME_64: counts 64-bytes frames, good or bad.
18293 + * @DPMAC_CNT_ING_FRAME_127: counts 65- to 127-bytes frames, good or bad.
18294 + * @DPMAC_CNT_ING_FRAME_255: counts 128- to 255-bytes frames, good or bad.
18295 + * @DPMAC_CNT_ING_FRAME_511: counts 256- to 511-bytes frames, good or bad.
18296 + * @DPMAC_CNT_ING_FRAME_1023: counts 512- to 1023-bytes frames, good or bad.
18297 + * @DPMAC_CNT_ING_FRAME_1518: counts 1024- to 1518-bytes frames, good or bad.
18298 + * @DPMAC_CNT_ING_FRAME_1519_MAX: counts 1519-bytes frames and larger
18299 + *                               (up to max frame length specified),
18300 + *                               good or bad.
18301 + * @DPMAC_CNT_ING_FRAG: counts frames which are shorter than 64 bytes received
18302 + *                     with a wrong CRC
18303 + * @DPMAC_CNT_ING_JABBER: counts frames longer than the maximum frame length
18304 + *                       specified, with a bad frame check sequence.
18305 + * @DPMAC_CNT_ING_FRAME_DISCARD: counts dropped frames due to internal errors.
18306 + *                              Occurs when a receive FIFO overflows.
18307 + *                              Includes also frames truncated as a result of
18308 + *                              the receive FIFO overflow.
18309 + * @DPMAC_CNT_ING_ALIGN_ERR: counts frames with an alignment error
18310 + *                          (optional used for wrong SFD).
18311 + * @DPMAC_CNT_EGR_UNDERSIZED: counts frames transmitted that was less than 64
18312 + *                           bytes long with a good CRC.
18313 + * @DPMAC_CNT_ING_OVERSIZED: counts frames longer than the maximum frame length
18314 + *                          specified, with a good frame check sequence.
18315 + * @DPMAC_CNT_ING_VALID_PAUSE_FRAME: counts valid pause frames (regular and PFC)
18316 + * @DPMAC_CNT_EGR_VALID_PAUSE_FRAME: counts valid pause frames transmitted
18317 + *                                  (regular and PFC).
18318 + * @DPMAC_CNT_ING_BYTE: counts bytes received except preamble for all valid
18319 + *                     frames and valid pause frames.
18320 + * @DPMAC_CNT_ING_MCAST_FRAME: counts received multicast frames.
18321 + * @DPMAC_CNT_ING_BCAST_FRAME: counts received broadcast frames.
18322 + * @DPMAC_CNT_ING_ALL_FRAME: counts each good or bad frames received.
18323 + * @DPMAC_CNT_ING_UCAST_FRAME: counts received unicast frames.
18324 + * @DPMAC_CNT_ING_ERR_FRAME: counts frames received with an error
18325 + *                          (except for undersized/fragment frame).
18326 + * @DPMAC_CNT_EGR_BYTE: counts bytes transmitted except preamble for all valid
18327 + *                     frames and valid pause frames transmitted.
18328 + * @DPMAC_CNT_EGR_MCAST_FRAME: counts transmitted multicast frames.
18329 + * @DPMAC_CNT_EGR_BCAST_FRAME: counts transmitted broadcast frames.
18330 + * @DPMAC_CNT_EGR_UCAST_FRAME: counts transmitted unicast frames.
18331 + * @DPMAC_CNT_EGR_ERR_FRAME: counts frames transmitted with an error.
18332 + * @DPMAC_CNT_ING_GOOD_FRAME: counts frames received without error, including
18333 + *                           pause frames.
18334 + * @DPMAC_CNT_ENG_GOOD_FRAME: counts frames transmitted without error, including
18335 + *                           pause frames.
18336 + */
18337 +enum dpmac_counter {
18338 +       DPMAC_CNT_ING_FRAME_64,
18339 +       DPMAC_CNT_ING_FRAME_127,
18340 +       DPMAC_CNT_ING_FRAME_255,
18341 +       DPMAC_CNT_ING_FRAME_511,
18342 +       DPMAC_CNT_ING_FRAME_1023,
18343 +       DPMAC_CNT_ING_FRAME_1518,
18344 +       DPMAC_CNT_ING_FRAME_1519_MAX,
18345 +       DPMAC_CNT_ING_FRAG,
18346 +       DPMAC_CNT_ING_JABBER,
18347 +       DPMAC_CNT_ING_FRAME_DISCARD,
18348 +       DPMAC_CNT_ING_ALIGN_ERR,
18349 +       DPMAC_CNT_EGR_UNDERSIZED,
18350 +       DPMAC_CNT_ING_OVERSIZED,
18351 +       DPMAC_CNT_ING_VALID_PAUSE_FRAME,
18352 +       DPMAC_CNT_EGR_VALID_PAUSE_FRAME,
18353 +       DPMAC_CNT_ING_BYTE,
18354 +       DPMAC_CNT_ING_MCAST_FRAME,
18355 +       DPMAC_CNT_ING_BCAST_FRAME,
18356 +       DPMAC_CNT_ING_ALL_FRAME,
18357 +       DPMAC_CNT_ING_UCAST_FRAME,
18358 +       DPMAC_CNT_ING_ERR_FRAME,
18359 +       DPMAC_CNT_EGR_BYTE,
18360 +       DPMAC_CNT_EGR_MCAST_FRAME,
18361 +       DPMAC_CNT_EGR_BCAST_FRAME,
18362 +       DPMAC_CNT_EGR_UCAST_FRAME,
18363 +       DPMAC_CNT_EGR_ERR_FRAME,
18364 +       DPMAC_CNT_ING_GOOD_FRAME,
18365 +       DPMAC_CNT_ENG_GOOD_FRAME
18366 +};
18367 +
18368 +/**
18369 + * dpmac_get_counter() - Read a specific DPMAC counter
18370 + * @mc_io:     Pointer to opaque I/O object
18371 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18372 + * @token:     Token of DPMAC object
18373 + * @type:      The requested counter
18374 + * @counter:   Returned counter value
18375 + *
18376 + * Return:     The requested counter; '0' otherwise.
18377 + */
18378 +int dpmac_get_counter(struct fsl_mc_io         *mc_io,
18379 +                     uint32_t                  cmd_flags,
18380 +                     uint16_t                  token,
18381 +                     enum dpmac_counter         type,
18382 +                     uint64_t                  *counter);
18383 +
18384 +#endif /* __FSL_DPMAC_H */
18385 diff --git a/drivers/net/dpaa2/mc/fsl_dpmac_cmd.h b/drivers/net/dpaa2/mc/fsl_dpmac_cmd.h
18386 new file mode 100644
18387 index 0000000..dc00590
18388 --- /dev/null
18389 +++ b/drivers/net/dpaa2/mc/fsl_dpmac_cmd.h
18390 @@ -0,0 +1,195 @@
18391 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
18392 + *
18393 + * Redistribution and use in source and binary forms, with or without
18394 + * modification, are permitted provided that the following conditions are met:
18395 + * * Redistributions of source code must retain the above copyright
18396 + * notice, this list of conditions and the following disclaimer.
18397 + * * Redistributions in binary form must reproduce the above copyright
18398 + * notice, this list of conditions and the following disclaimer in the
18399 + * documentation and/or other materials provided with the distribution.
18400 + * * Neither the name of the above-listed copyright holders nor the
18401 + * names of any contributors may be used to endorse or promote products
18402 + * derived from this software without specific prior written permission.
18403 + *
18404 + *
18405 + * ALTERNATIVELY, this software may be distributed under the terms of the
18406 + * GNU General Public License ("GPL") as published by the Free Software
18407 + * Foundation, either version 2 of that License or (at your option) any
18408 + * later version.
18409 + *
18410 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18411 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18412 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18413 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
18414 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
18415 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
18416 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
18417 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
18418 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
18419 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
18420 + * POSSIBILITY OF SUCH DAMAGE.
18421 + */
18422 +#ifndef _FSL_DPMAC_CMD_H
18423 +#define _FSL_DPMAC_CMD_H
18424 +
18425 +/* DPMAC Version */
18426 +#define DPMAC_VER_MAJOR                                3
18427 +#define DPMAC_VER_MINOR                                2
18428 +
18429 +/* Command IDs */
18430 +#define DPMAC_CMDID_CLOSE                      0x800
18431 +#define DPMAC_CMDID_OPEN                       0x80c
18432 +#define DPMAC_CMDID_CREATE                     0x90c
18433 +#define DPMAC_CMDID_DESTROY                    0x900
18434 +
18435 +#define DPMAC_CMDID_GET_ATTR                   0x004
18436 +#define DPMAC_CMDID_RESET                      0x005
18437 +
18438 +#define DPMAC_CMDID_SET_IRQ                    0x010
18439 +#define DPMAC_CMDID_GET_IRQ                    0x011
18440 +#define DPMAC_CMDID_SET_IRQ_ENABLE             0x012
18441 +#define DPMAC_CMDID_GET_IRQ_ENABLE             0x013
18442 +#define DPMAC_CMDID_SET_IRQ_MASK               0x014
18443 +#define DPMAC_CMDID_GET_IRQ_MASK               0x015
18444 +#define DPMAC_CMDID_GET_IRQ_STATUS             0x016
18445 +#define DPMAC_CMDID_CLEAR_IRQ_STATUS           0x017
18446 +
18447 +#define DPMAC_CMDID_MDIO_READ                  0x0c0
18448 +#define DPMAC_CMDID_MDIO_WRITE                 0x0c1
18449 +#define DPMAC_CMDID_GET_LINK_CFG               0x0c2
18450 +#define DPMAC_CMDID_SET_LINK_STATE             0x0c3
18451 +#define DPMAC_CMDID_GET_COUNTER                        0x0c4
18452 +
18453 +/*                cmd, param, offset, width, type, arg_name */
18454 +#define DPMAC_CMD_CREATE(cmd, cfg) \
18455 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->mac_id)
18456 +
18457 +/*                cmd, param, offset, width, type, arg_name */
18458 +#define DPMAC_CMD_OPEN(cmd, dpmac_id) \
18459 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpmac_id)
18460 +
18461 +/*                cmd, param, offset, width, type, arg_name */
18462 +#define DPMAC_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
18463 +do { \
18464 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
18465 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
18466 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
18467 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
18468 +} while (0)
18469 +
18470 +/*                cmd, param, offset, width, type, arg_name */
18471 +#define DPMAC_CMD_GET_IRQ(cmd, irq_index) \
18472 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
18473 +
18474 +/*                cmd, param, offset, width, type, arg_name */
18475 +#define DPMAC_RSP_GET_IRQ(cmd, type, irq_cfg) \
18476 +do { \
18477 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
18478 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
18479 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
18480 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
18481 +} while (0)
18482 +
18483 +/*                cmd, param, offset, width, type, arg_name */
18484 +#define DPMAC_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
18485 +do { \
18486 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
18487 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
18488 +} while (0)
18489 +
18490 +/*                cmd, param, offset, width, type, arg_name */
18491 +#define DPMAC_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
18492 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
18493 +
18494 +/*                cmd, param, offset, width, type, arg_name */
18495 +#define DPMAC_RSP_GET_IRQ_ENABLE(cmd, en) \
18496 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
18497 +
18498 +/*                cmd, param, offset, width, type, arg_name */
18499 +#define DPMAC_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
18500 +do { \
18501 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask);\
18502 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
18503 +} while (0)
18504 +
18505 +/*                cmd, param, offset, width, type, arg_name */
18506 +#define DPMAC_CMD_GET_IRQ_MASK(cmd, irq_index) \
18507 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
18508 +
18509 +/*                cmd, param, offset, width, type, arg_name */
18510 +#define DPMAC_RSP_GET_IRQ_MASK(cmd, mask) \
18511 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
18512 +
18513 +/*                cmd, param, offset, width, type, arg_name */
18514 +#define DPMAC_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
18515 +do { \
18516 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
18517 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
18518 +} while (0)
18519 +
18520 +/*                cmd, param, offset, width, type, arg_name */
18521 +#define DPMAC_RSP_GET_IRQ_STATUS(cmd, status) \
18522 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
18523 +
18524 +/*                cmd, param, offset, width, type, arg_name */
18525 +#define DPMAC_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
18526 +do { \
18527 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
18528 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
18529 +} while (0)
18530 +
18531 +/*                cmd, param, offset, width, type,     arg_name */
18532 +#define DPMAC_RSP_GET_ATTRIBUTES(cmd, attr) \
18533 +do { \
18534 +       MC_RSP_OP(cmd, 0, 0,  32, int,                  attr->phy_id);\
18535 +       MC_RSP_OP(cmd, 0, 32, 32, int,                  attr->id);\
18536 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t,             attr->version.major);\
18537 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t,             attr->version.minor);\
18538 +       MC_RSP_OP(cmd, 1, 32,  8, enum dpmac_link_type, attr->link_type);\
18539 +       MC_RSP_OP(cmd, 1, 40,  8, enum dpmac_eth_if,    attr->eth_if);\
18540 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t,             attr->max_rate);\
18541 +} while (0)
18542 +
18543 +/*                cmd, param, offset, width, type, arg_name */
18544 +#define DPMAC_CMD_MDIO_READ(cmd, cfg) \
18545 +do { \
18546 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->phy_addr); \
18547 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  cfg->reg); \
18548 +} while (0)
18549 +
18550 +/*                cmd, param, offset, width, type, arg_name */
18551 +#define DPMAC_RSP_MDIO_READ(cmd, data) \
18552 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, data)
18553 +
18554 +/*                cmd, param, offset, width, type, arg_name */
18555 +#define DPMAC_CMD_MDIO_WRITE(cmd, cfg) \
18556 +do { \
18557 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->phy_addr); \
18558 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  cfg->reg); \
18559 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->data); \
18560 +} while (0)
18561 +
18562 +/*                cmd, param, offset, width, type, arg_name */
18563 +#define DPMAC_RSP_GET_LINK_CFG(cmd, cfg) \
18564 +do { \
18565 +       MC_RSP_OP(cmd, 0, 0,  64, uint64_t, cfg->options); \
18566 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, cfg->rate); \
18567 +} while (0)
18568 +
18569 +/*                cmd, param, offset, width, type, arg_name */
18570 +#define DPMAC_CMD_SET_LINK_STATE(cmd, cfg) \
18571 +do { \
18572 +       MC_CMD_OP(cmd, 0, 0,  64, uint64_t, cfg->options); \
18573 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->rate); \
18574 +       MC_CMD_OP(cmd, 2, 0,  1,  int,      cfg->up); \
18575 +} while (0)
18576 +
18577 +/*                cmd, param, offset, width, type, arg_name */
18578 +#define DPMAC_CMD_GET_COUNTER(cmd, type) \
18579 +       MC_CMD_OP(cmd, 0, 0,  8, enum dpmac_counter, type)
18580 +
18581 +/*                cmd, param, offset, width, type, arg_name */
18582 +#define DPMAC_RSP_GET_COUNTER(cmd, counter) \
18583 +       MC_RSP_OP(cmd, 1, 0, 64, uint64_t, counter)
18584 +
18585 +#endif /* _FSL_DPMAC_CMD_H */
18586 diff --git a/drivers/net/dpaa2/mc/fsl_dpmcp.h b/drivers/net/dpaa2/mc/fsl_dpmcp.h
18587 new file mode 100644
18588 index 0000000..80f238e
18589 --- /dev/null
18590 +++ b/drivers/net/dpaa2/mc/fsl_dpmcp.h
18591 @@ -0,0 +1,332 @@
18592 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
18593 + *
18594 + * Redistribution and use in source and binary forms, with or without
18595 + * modification, are permitted provided that the following conditions are met:
18596 + * * Redistributions of source code must retain the above copyright
18597 + * notice, this list of conditions and the following disclaimer.
18598 + * * Redistributions in binary form must reproduce the above copyright
18599 + * notice, this list of conditions and the following disclaimer in the
18600 + * documentation and/or other materials provided with the distribution.
18601 + * * Neither the name of the above-listed copyright holders nor the
18602 + * names of any contributors may be used to endorse or promote products
18603 + * derived from this software without specific prior written permission.
18604 + *
18605 + *
18606 + * ALTERNATIVELY, this software may be distributed under the terms of the
18607 + * GNU General Public License ("GPL") as published by the Free Software
18608 + * Foundation, either version 2 of that License or (at your option) any
18609 + * later version.
18610 + *
18611 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18612 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18613 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18614 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
18615 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
18616 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
18617 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
18618 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
18619 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
18620 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
18621 + * POSSIBILITY OF SUCH DAMAGE.
18622 + */
18623 +#ifndef __FSL_DPMCP_H
18624 +#define __FSL_DPMCP_H
18625 +
18626 +/* Data Path Management Command Portal API
18627 + * Contains initialization APIs and runtime control APIs for DPMCP
18628 + */
18629 +
18630 +struct fsl_mc_io;
18631 +
18632 +/**
18633 + * dpmcp_open() - Open a control session for the specified object.
18634 + * @mc_io:     Pointer to MC portal's I/O object
18635 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18636 + * @dpmcp_id:  DPMCP unique ID
18637 + * @token:     Returned token; use in subsequent API calls
18638 + *
18639 + * This function can be used to open a control session for an
18640 + * already created object; an object may have been declared in
18641 + * the DPL or by calling the dpmcp_create function.
18642 + * This function returns a unique authentication token,
18643 + * associated with the specific object ID and the specific MC
18644 + * portal; this token must be used in all subsequent commands for
18645 + * this specific object
18646 + *
18647 + * Return:     '0' on Success; Error code otherwise.
18648 + */
18649 +int dpmcp_open(struct fsl_mc_io        *mc_io,
18650 +              uint32_t         cmd_flags,
18651 +              int                      dpmcp_id,
18652 +              uint16_t         *token);
18653 +
18654 +/**
18655 + * Get portal ID from pool
18656 + */
18657 +#define DPMCP_GET_PORTAL_ID_FROM_POOL (-1)
18658 +
18659 +/**
18660 + * dpmcp_close() - Close the control session of the object
18661 + * @mc_io:     Pointer to MC portal's I/O object
18662 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18663 + * @token:     Token of DPMCP object
18664 + *
18665 + * After this function is called, no further operations are
18666 + * allowed on the object without opening a new control session.
18667 + *
18668 + * Return:     '0' on Success; Error code otherwise.
18669 + */
18670 +int dpmcp_close(struct fsl_mc_io       *mc_io,
18671 +               uint32_t                cmd_flags,
18672 +               uint16_t                token);
18673 +
18674 +/**
18675 + * struct dpmcp_cfg - Structure representing DPMCP configuration
18676 + * @portal_id: Portal ID; 'DPMCP_GET_PORTAL_ID_FROM_POOL' to get the portal ID
18677 + *                             from pool
18678 + */
18679 +struct dpmcp_cfg {
18680 +       int portal_id;
18681 +};
18682 +
18683 +/**
18684 + * dpmcp_create() - Create the DPMCP object.
18685 + * @mc_io:     Pointer to MC portal's I/O object
18686 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18687 + * @cfg:       Configuration structure
18688 + * @token:     Returned token; use in subsequent API calls
18689 + *
18690 + * Create the DPMCP object, allocate required resources and
18691 + * perform required initialization.
18692 + *
18693 + * The object can be created either by declaring it in the
18694 + * DPL file, or by calling this function.
18695 + * This function returns a unique authentication token,
18696 + * associated with the specific object ID and the specific MC
18697 + * portal; this token must be used in all subsequent calls to
18698 + * this specific object. For objects that are created using the
18699 + * DPL file, call dpmcp_open function to get an authentication
18700 + * token first.
18701 + *
18702 + * Return:     '0' on Success; Error code otherwise.
18703 + */
18704 +int dpmcp_create(struct fsl_mc_io      *mc_io,
18705 +                uint32_t               cmd_flags,
18706 +                const struct dpmcp_cfg *cfg,
18707 +                uint16_t               *token);
18708 +
18709 +/**
18710 + * dpmcp_destroy() - Destroy the DPMCP object and release all its resources.
18711 + * @mc_io:     Pointer to MC portal's I/O object
18712 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18713 + * @token:     Token of DPMCP object
18714 + *
18715 + * Return:     '0' on Success; error code otherwise.
18716 + */
18717 +int dpmcp_destroy(struct fsl_mc_io     *mc_io,
18718 +                 uint32_t              cmd_flags,
18719 +                 uint16_t              token);
18720 +
18721 +/**
18722 + * dpmcp_reset() - Reset the DPMCP, returns the object to initial state.
18723 + * @mc_io:     Pointer to MC portal's I/O object
18724 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18725 + * @token:     Token of DPMCP object
18726 + *
18727 + * Return:     '0' on Success; Error code otherwise.
18728 + */
18729 +int dpmcp_reset(struct fsl_mc_io       *mc_io,
18730 +               uint32_t                cmd_flags,
18731 +               uint16_t                        token);
18732 +
18733 +/**
18734 + * IRQ
18735 + */
18736 +
18737 +/**
18738 + * IRQ Index
18739 + */
18740 +#define DPMCP_IRQ_INDEX                             0
18741 +/**
18742 + * irq event - Indicates that the link state changed
18743 + */
18744 +#define DPMCP_IRQ_EVENT_CMD_DONE                    0x00000001
18745 +
18746 +/**
18747 + * struct dpmcp_irq_cfg - IRQ configuration
18748 + * @addr:      Address that must be written to signal a message-based interrupt
18749 + * @val:       Value to write into irq_addr address
18750 + * @irq_num: A user defined number associated with this IRQ
18751 + */
18752 +struct dpmcp_irq_cfg {
18753 +            uint64_t           addr;
18754 +            uint32_t           val;
18755 +            int                irq_num;
18756 +};
18757 +
18758 +/**
18759 + * dpmcp_set_irq() - Set IRQ information for the DPMCP to trigger an interrupt.
18760 + * @mc_io:     Pointer to MC portal's I/O object
18761 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18762 + * @token:     Token of DPMCP object
18763 + * @irq_index: Identifies the interrupt index to configure
18764 + * @irq_cfg:   IRQ configuration
18765 + *
18766 + * Return:     '0' on Success; Error code otherwise.
18767 + */
18768 +int dpmcp_set_irq(struct fsl_mc_io     *mc_io,
18769 +                 uint32_t              cmd_flags,
18770 +                 uint16_t              token,
18771 +                 uint8_t               irq_index,
18772 +                 struct dpmcp_irq_cfg  *irq_cfg);
18773 +
18774 +/**
18775 + * dpmcp_get_irq() - Get IRQ information from the DPMCP.
18776 + * @mc_io:     Pointer to MC portal's I/O object
18777 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18778 + * @token:     Token of DPMCP object
18779 + * @irq_index: The interrupt index to configure
18780 + * @type:      Interrupt type: 0 represents message interrupt
18781 + *             type (both irq_addr and irq_val are valid)
18782 + * @irq_cfg:   IRQ attributes
18783 + *
18784 + * Return:     '0' on Success; Error code otherwise.
18785 + */
18786 +int dpmcp_get_irq(struct fsl_mc_io     *mc_io,
18787 +                 uint32_t              cmd_flags,
18788 +                 uint16_t              token,
18789 +                 uint8_t               irq_index,
18790 +                 int                   *type,
18791 +                 struct dpmcp_irq_cfg  *irq_cfg);
18792 +
18793 +/**
18794 + * dpmcp_set_irq_enable() - Set overall interrupt state.
18795 + * @mc_io:     Pointer to MC portal's I/O object
18796 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18797 + * @token:     Token of DPMCP object
18798 + * @irq_index: The interrupt index to configure
18799 + * @en:        Interrupt state - enable = 1, disable = 0
18800 + *
18801 + * Allows GPP software to control when interrupts are generated.
18802 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
18803 + * overall interrupt state. if the interrupt is disabled no causes will cause
18804 + * an interrupt.
18805 + *
18806 + * Return:     '0' on Success; Error code otherwise.
18807 + */
18808 +int dpmcp_set_irq_enable(struct fsl_mc_io      *mc_io,
18809 +                        uint32_t               cmd_flags,
18810 +                        uint16_t               token,
18811 +                        uint8_t                irq_index,
18812 +                        uint8_t                en);
18813 +
18814 +/**
18815 + * dpmcp_get_irq_enable() - Get overall interrupt state
18816 + * @mc_io:     Pointer to MC portal's I/O object
18817 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18818 + * @token:     Token of DPMCP object
18819 + * @irq_index: The interrupt index to configure
18820 + * @en:                Returned interrupt state - enable = 1, disable = 0
18821 + *
18822 + * Return:     '0' on Success; Error code otherwise.
18823 + */
18824 +int dpmcp_get_irq_enable(struct fsl_mc_io      *mc_io,
18825 +                        uint32_t               cmd_flags,
18826 +                        uint16_t               token,
18827 +                        uint8_t                irq_index,
18828 +                        uint8_t                *en);
18829 +
18830 +/**
18831 + * dpmcp_set_irq_mask() - Set interrupt mask.
18832 + * @mc_io:     Pointer to MC portal's I/O object
18833 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18834 + * @token:     Token of DPMCP object
18835 + * @irq_index: The interrupt index to configure
18836 + * @mask:      Event mask to trigger interrupt;
18837 + *                     each bit:
18838 + *                             0 = ignore event
18839 + *                             1 = consider event for asserting IRQ
18840 + *
18841 + * Every interrupt can have up to 32 causes and the interrupt model supports
18842 + * masking/unmasking each cause independently
18843 + *
18844 + * Return:     '0' on Success; Error code otherwise.
18845 + */
18846 +int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
18847 +                      uint32_t cmd_flags,
18848 +                      uint16_t         token,
18849 +                      uint8_t          irq_index,
18850 +                      uint32_t         mask);
18851 +
18852 +/**
18853 + * dpmcp_get_irq_mask() - Get interrupt mask.
18854 + * @mc_io:     Pointer to MC portal's I/O object
18855 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18856 + * @token:     Token of DPMCP object
18857 + * @irq_index: The interrupt index to configure
18858 + * @mask:      Returned event mask to trigger interrupt
18859 + *
18860 + * Every interrupt can have up to 32 causes and the interrupt model supports
18861 + * masking/unmasking each cause independently
18862 + *
18863 + * Return:     '0' on Success; Error code otherwise.
18864 + */
18865 +int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
18866 +                      uint32_t cmd_flags,
18867 +                      uint16_t         token,
18868 +                      uint8_t          irq_index,
18869 +                      uint32_t         *mask);
18870 +
18871 +/**
18872 + * dpmcp_get_irq_status() - Get the current status of any pending interrupts.
18873 + *
18874 + * @mc_io:     Pointer to MC portal's I/O object
18875 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18876 + * @token:     Token of DPMCP object
18877 + * @irq_index: The interrupt index to configure
18878 + * @status:    Returned interrupts status - one bit per cause:
18879 + *                     0 = no interrupt pending
18880 + *                     1 = interrupt pending
18881 + *
18882 + * Return:     '0' on Success; Error code otherwise.
18883 + */
18884 +int dpmcp_get_irq_status(struct fsl_mc_io      *mc_io,
18885 +                        uint32_t               cmd_flags,
18886 +                        uint16_t               token,
18887 +                        uint8_t                irq_index,
18888 +                        uint32_t               *status);
18889 +
18890 +/**
18891 + * struct dpmcp_attr - Structure representing DPMCP attributes
18892 + * @id:                DPMCP object ID
18893 + * @version:   DPMCP version
18894 + */
18895 +struct dpmcp_attr {
18896 +       int id;
18897 +       /**
18898 +        * struct version - Structure representing DPMCP version
18899 +        * @major:      DPMCP major version
18900 +        * @minor:      DPMCP minor version
18901 +        */
18902 +       struct {
18903 +               uint16_t major;
18904 +               uint16_t minor;
18905 +       } version;
18906 +};
18907 +
18908 +/**
18909 + * dpmcp_get_attributes - Retrieve DPMCP attributes.
18910 + *
18911 + * @mc_io:     Pointer to MC portal's I/O object
18912 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
18913 + * @token:     Token of DPMCP object
18914 + * @attr:      Returned object's attributes
18915 + *
18916 + * Return:     '0' on Success; Error code otherwise.
18917 + */
18918 +int dpmcp_get_attributes(struct fsl_mc_io      *mc_io,
18919 +                        uint32_t               cmd_flags,
18920 +                        uint16_t               token,
18921 +                        struct dpmcp_attr      *attr);
18922 +
18923 +#endif /* __FSL_DPMCP_H */
18924 diff --git a/drivers/net/dpaa2/mc/fsl_dpmcp_cmd.h b/drivers/net/dpaa2/mc/fsl_dpmcp_cmd.h
18925 new file mode 100644
18926 index 0000000..8f710bd
18927 --- /dev/null
18928 +++ b/drivers/net/dpaa2/mc/fsl_dpmcp_cmd.h
18929 @@ -0,0 +1,135 @@
18930 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
18931 + *
18932 + * Redistribution and use in source and binary forms, with or without
18933 + * modification, are permitted provided that the following conditions are met:
18934 + * * Redistributions of source code must retain the above copyright
18935 + * notice, this list of conditions and the following disclaimer.
18936 + * * Redistributions in binary form must reproduce the above copyright
18937 + * notice, this list of conditions and the following disclaimer in the
18938 + * documentation and/or other materials provided with the distribution.
18939 + * * Neither the name of the above-listed copyright holders nor the
18940 + * names of any contributors may be used to endorse or promote products
18941 + * derived from this software without specific prior written permission.
18942 + *
18943 + *
18944 + * ALTERNATIVELY, this software may be distributed under the terms of the
18945 + * GNU General Public License ("GPL") as published by the Free Software
18946 + * Foundation, either version 2 of that License or (at your option) any
18947 + * later version.
18948 + *
18949 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18950 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18951 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18952 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
18953 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
18954 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
18955 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
18956 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
18957 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
18958 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
18959 + * POSSIBILITY OF SUCH DAMAGE.
18960 + */
18961 +#ifndef _FSL_DPMCP_CMD_H
18962 +#define _FSL_DPMCP_CMD_H
18963 +
18964 +/* DPMCP Version */
18965 +#define DPMCP_VER_MAJOR                                3
18966 +#define DPMCP_VER_MINOR                                0
18967 +
18968 +/* Command IDs */
18969 +#define DPMCP_CMDID_CLOSE                              0x800
18970 +#define DPMCP_CMDID_OPEN                               0x80b
18971 +#define DPMCP_CMDID_CREATE                             0x90b
18972 +#define DPMCP_CMDID_DESTROY                            0x900
18973 +
18974 +#define DPMCP_CMDID_GET_ATTR                           0x004
18975 +#define DPMCP_CMDID_RESET                              0x005
18976 +
18977 +#define DPMCP_CMDID_SET_IRQ                            0x010
18978 +#define DPMCP_CMDID_GET_IRQ                            0x011
18979 +#define DPMCP_CMDID_SET_IRQ_ENABLE                     0x012
18980 +#define DPMCP_CMDID_GET_IRQ_ENABLE                     0x013
18981 +#define DPMCP_CMDID_SET_IRQ_MASK                       0x014
18982 +#define DPMCP_CMDID_GET_IRQ_MASK                       0x015
18983 +#define DPMCP_CMDID_GET_IRQ_STATUS                     0x016
18984 +
18985 +/*                cmd, param, offset, width, type, arg_name */
18986 +#define DPMCP_CMD_OPEN(cmd, dpmcp_id) \
18987 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpmcp_id)
18988 +
18989 +/*                cmd, param, offset, width, type, arg_name */
18990 +#define DPMCP_CMD_CREATE(cmd, cfg) \
18991 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->portal_id)
18992 +
18993 +/*                cmd, param, offset, width, type, arg_name */
18994 +#define DPMCP_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
18995 +do { \
18996 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
18997 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
18998 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
18999 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
19000 +} while (0)
19001 +
19002 +/*                cmd, param, offset, width, type, arg_name */
19003 +#define DPMCP_CMD_GET_IRQ(cmd, irq_index) \
19004 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
19005 +
19006 +/*                cmd, param, offset, width, type, arg_name */
19007 +#define DPMCP_RSP_GET_IRQ(cmd, type, irq_cfg) \
19008 +do { \
19009 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
19010 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
19011 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
19012 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
19013 +} while (0)
19014 +
19015 +/*                cmd, param, offset, width, type, arg_name */
19016 +#define DPMCP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
19017 +do { \
19018 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
19019 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
19020 +} while (0)
19021 +
19022 +/*                cmd, param, offset, width, type, arg_name */
19023 +#define DPMCP_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
19024 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
19025 +
19026 +/*                cmd, param, offset, width, type, arg_name */
19027 +#define DPMCP_RSP_GET_IRQ_ENABLE(cmd, en) \
19028 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
19029 +
19030 +/*                cmd, param, offset, width, type, arg_name */
19031 +#define DPMCP_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
19032 +do { \
19033 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask);\
19034 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
19035 +} while (0)
19036 +
19037 +/*                cmd, param, offset, width, type, arg_name */
19038 +#define DPMCP_CMD_GET_IRQ_MASK(cmd, irq_index) \
19039 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
19040 +
19041 +/*                cmd, param, offset, width, type, arg_name */
19042 +#define DPMCP_RSP_GET_IRQ_MASK(cmd, mask) \
19043 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
19044 +
19045 +/*                cmd, param, offset, width, type, arg_name */
19046 +#define DPMCP_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
19047 +do { \
19048 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
19049 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
19050 +} while (0)
19051 +
19052 +/*                cmd, param, offset, width, type, arg_name */
19053 +#define DPMCP_RSP_GET_IRQ_STATUS(cmd, status) \
19054 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
19055 +
19056 +/*                cmd, param, offset, width, type,     arg_name */
19057 +#define DPMCP_RSP_GET_ATTRIBUTES(cmd, attr) \
19058 +do { \
19059 +       MC_RSP_OP(cmd, 0, 32, 32, int,      attr->id);\
19060 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
19061 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
19062 +} while (0)
19063 +
19064 +#endif /* _FSL_DPMCP_CMD_H */
19065 diff --git a/drivers/net/dpaa2/mc/fsl_dpmng.h b/drivers/net/dpaa2/mc/fsl_dpmng.h
19066 new file mode 100644
19067 index 0000000..4468dea
19068 --- /dev/null
19069 +++ b/drivers/net/dpaa2/mc/fsl_dpmng.h
19070 @@ -0,0 +1,74 @@
19071 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
19072 + *
19073 + * Redistribution and use in source and binary forms, with or without
19074 + * modification, are permitted provided that the following conditions are met:
19075 + * * Redistributions of source code must retain the above copyright
19076 + * notice, this list of conditions and the following disclaimer.
19077 + * * Redistributions in binary form must reproduce the above copyright
19078 + * notice, this list of conditions and the following disclaimer in the
19079 + * documentation and/or other materials provided with the distribution.
19080 + * * Neither the name of the above-listed copyright holders nor the
19081 + * names of any contributors may be used to endorse or promote products
19082 + * derived from this software without specific prior written permission.
19083 + *
19084 + *
19085 + * ALTERNATIVELY, this software may be distributed under the terms of the
19086 + * GNU General Public License ("GPL") as published by the Free Software
19087 + * Foundation, either version 2 of that License or (at your option) any
19088 + * later version.
19089 + *
19090 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19091 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19092 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19093 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
19094 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19095 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19096 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
19097 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
19098 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
19099 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19100 + * POSSIBILITY OF SUCH DAMAGE.
19101 + */
19102 +#ifndef __FSL_DPMNG_H
19103 +#define __FSL_DPMNG_H
19104 +
19105 +/* Management Complex General API
19106 + * Contains general API for the Management Complex firmware
19107 + */
19108 +
19109 +struct fsl_mc_io;
19110 +
19111 +/**
19112 + * Management Complex firmware version information
19113 + */
19114 +#define MC_VER_MAJOR 9
19115 +#define MC_VER_MINOR 0
19116 +
19117 +/**
19118 + * struct mc_versoin
19119 + * @major: Major version number: incremented on API compatibility changes
19120 + * @minor: Minor version number: incremented on API additions (that are
19121 + *             backward compatible); reset when major version is incremented
19122 + * @revision: Internal revision number: incremented on implementation changes
19123 + *             and/or bug fixes that have no impact on API
19124 + */
19125 +struct mc_version {
19126 +       uint32_t major;
19127 +       uint32_t minor;
19128 +       uint32_t revision;
19129 +};
19130 +
19131 +/**
19132 + * mc_get_version() - Retrieves the Management Complex firmware
19133 + *                     version information
19134 + * @mc_io:             Pointer to opaque I/O object
19135 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19136 + * @mc_ver_info:       Returned version information structure
19137 + *
19138 + * Return:     '0' on Success; Error code otherwise.
19139 + */
19140 +int mc_get_version(struct fsl_mc_io    *mc_io,
19141 +                  uint32_t             cmd_flags,
19142 +                  struct mc_version    *mc_ver_info);
19143 +
19144 +#endif /* __FSL_DPMNG_H */
19145 diff --git a/drivers/net/dpaa2/mc/fsl_dpmng_cmd.h b/drivers/net/dpaa2/mc/fsl_dpmng_cmd.h
19146 new file mode 100644
19147 index 0000000..c34ca3a
19148 --- /dev/null
19149 +++ b/drivers/net/dpaa2/mc/fsl_dpmng_cmd.h
19150 @@ -0,0 +1,46 @@
19151 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
19152 + *
19153 + * Redistribution and use in source and binary forms, with or without
19154 + * modification, are permitted provided that the following conditions are met:
19155 + * * Redistributions of source code must retain the above copyright
19156 + * notice, this list of conditions and the following disclaimer.
19157 + * * Redistributions in binary form must reproduce the above copyright
19158 + * notice, this list of conditions and the following disclaimer in the
19159 + * documentation and/or other materials provided with the distribution.
19160 + * * Neither the name of the above-listed copyright holders nor the
19161 + * names of any contributors may be used to endorse or promote products
19162 + * derived from this software without specific prior written permission.
19163 + *
19164 + *
19165 + * ALTERNATIVELY, this software may be distributed under the terms of the
19166 + * GNU General Public License ("GPL") as published by the Free Software
19167 + * Foundation, either version 2 of that License or (at your option) any
19168 + * later version.
19169 + *
19170 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19171 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19172 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19173 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
19174 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19175 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19176 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
19177 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
19178 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
19179 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19180 + * POSSIBILITY OF SUCH DAMAGE.
19181 + */
19182 +#ifndef __FSL_DPMNG_CMD_H
19183 +#define __FSL_DPMNG_CMD_H
19184 +
19185 +/* Command IDs */
19186 +#define DPMNG_CMDID_GET_VERSION                        0x831
19187 +
19188 +/*                cmd, param, offset, width, type, arg_name */
19189 +#define DPMNG_RSP_GET_VERSION(cmd, mc_ver_info) \
19190 +do { \
19191 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mc_ver_info->revision); \
19192 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_ver_info->major); \
19193 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, mc_ver_info->minor); \
19194 +} while (0)
19195 +
19196 +#endif /* __FSL_DPMNG_CMD_H */
19197 diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
19198 new file mode 100644
19199 index 0000000..c820086
19200 --- /dev/null
19201 +++ b/drivers/net/dpaa2/mc/fsl_dpni.h
19202 @@ -0,0 +1,2581 @@
19203 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
19204 + *
19205 + * Redistribution and use in source and binary forms, with or without
19206 + * modification, are permitted provided that the following conditions are met:
19207 + * * Redistributions of source code must retain the above copyright
19208 + * notice, this list of conditions and the following disclaimer.
19209 + * * Redistributions in binary form must reproduce the above copyright
19210 + * notice, this list of conditions and the following disclaimer in the
19211 + * documentation and/or other materials provided with the distribution.
19212 + * * Neither the name of the above-listed copyright holders nor the
19213 + * names of any contributors may be used to endorse or promote products
19214 + * derived from this software without specific prior written permission.
19215 + *
19216 + *
19217 + * ALTERNATIVELY, this software may be distributed under the terms of the
19218 + * GNU General Public License ("GPL") as published by the Free Software
19219 + * Foundation, either version 2 of that License or (at your option) any
19220 + * later version.
19221 + *
19222 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19223 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19224 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19225 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
19226 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19227 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19228 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
19229 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
19230 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
19231 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19232 + * POSSIBILITY OF SUCH DAMAGE.
19233 + */
19234 +#ifndef __FSL_DPNI_H
19235 +#define __FSL_DPNI_H
19236 +
19237 +#include <fsl_dpkg.h>
19238 +
19239 +struct fsl_mc_io;
19240 +
19241 +/**
19242 + * Data Path Network Interface API
19243 + * Contains initialization APIs and runtime control APIs for DPNI
19244 + */
19245 +
19246 +/** General DPNI macros */
19247 +
19248 +/**
19249 + * Maximum number of traffic classes
19250 + */
19251 +#define DPNI_MAX_TC                            8
19252 +/**
19253 + * Maximum number of buffer pools per DPNI
19254 + */
19255 +#define DPNI_MAX_DPBP                          8
19256 +/**
19257 + * Maximum number of storage-profiles per DPNI
19258 + */
19259 +#define DPNI_MAX_SP                            2
19260 +
19261 +/**
19262 + * All traffic classes considered; see dpni_set_rx_flow()
19263 + */
19264 +#define DPNI_ALL_TCS                           (uint8_t)(-1)
19265 +/**
19266 + * All flows within traffic class considered; see dpni_set_rx_flow()
19267 + */
19268 +#define DPNI_ALL_TC_FLOWS                      (uint16_t)(-1)
19269 +/**
19270 + * Generate new flow ID; see dpni_set_tx_flow()
19271 + */
19272 +#define DPNI_NEW_FLOW_ID                       (uint16_t)(-1)
19273 +/* use for common tx-conf queue; see dpni_set_tx_conf_<x>() */
19274 +#define DPNI_COMMON_TX_CONF                    (uint16_t)(-1)
19275 +
19276 +/**
19277 + * dpni_open() - Open a control session for the specified object
19278 + * @mc_io:     Pointer to MC portal's I/O object
19279 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19280 + * @dpni_id:   DPNI unique ID
19281 + * @token:     Returned token; use in subsequent API calls
19282 + *
19283 + * This function can be used to open a control session for an
19284 + * already created object; an object may have been declared in
19285 + * the DPL or by calling the dpni_create() function.
19286 + * This function returns a unique authentication token,
19287 + * associated with the specific object ID and the specific MC
19288 + * portal; this token must be used in all subsequent commands for
19289 + * this specific object.
19290 + *
19291 + * Return:     '0' on Success; Error code otherwise.
19292 + */
19293 +int dpni_open(struct fsl_mc_io *mc_io,
19294 +             uint32_t          cmd_flags,
19295 +             int               dpni_id,
19296 +             uint16_t          *token);
19297 +
19298 +/**
19299 + * dpni_close() - Close the control session of the object
19300 + * @mc_io:     Pointer to MC portal's I/O object
19301 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19302 + * @token:     Token of DPNI object
19303 + *
19304 + * After this function is called, no further operations are
19305 + * allowed on the object without opening a new control session.
19306 + *
19307 + * Return:     '0' on Success; Error code otherwise.
19308 + */
19309 +int dpni_close(struct fsl_mc_io        *mc_io,
19310 +              uint32_t         cmd_flags,
19311 +              uint16_t         token);
19312 +
19313 +/* DPNI configuration options */
19314 +
19315 +/**
19316 + * Allow different distribution key profiles for different traffic classes;
19317 + * if not set, a single key profile is assumed
19318 + */
19319 +#define DPNI_OPT_ALLOW_DIST_KEY_PER_TC         0x00000001
19320 +
19321 +/**
19322 + * Disable all non-error transmit confirmation; error frames are reported
19323 + * back to a common Tx error queue
19324 + */
19325 +#define DPNI_OPT_TX_CONF_DISABLED              0x00000002
19326 +
19327 +/**
19328 + * Disable per-sender private Tx confirmation/error queue
19329 + */
19330 +#define DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED        0x00000004
19331 +
19332 +/**
19333 + * Support distribution based on hashed key;
19334 + * allows statistical distribution over receive queues in a traffic class
19335 + */
19336 +#define DPNI_OPT_DIST_HASH                     0x00000010
19337 +
19338 +/**
19339 + * DEPRECATED - if this flag is selected and and all new 'max_fs_entries' are
19340 + * '0' then backward compatibility is preserved;
19341 + * Support distribution based on flow steering;
19342 + * allows explicit control of distribution over receive queues in a traffic
19343 + * class
19344 + */
19345 +#define DPNI_OPT_DIST_FS                       0x00000020
19346 +
19347 +/**
19348 + * Unicast filtering support
19349 + */
19350 +#define DPNI_OPT_UNICAST_FILTER                        0x00000080
19351 +/**
19352 + * Multicast filtering support
19353 + */
19354 +#define DPNI_OPT_MULTICAST_FILTER              0x00000100
19355 +/**
19356 + * VLAN filtering support
19357 + */
19358 +#define DPNI_OPT_VLAN_FILTER                   0x00000200
19359 +/**
19360 + * Support IP reassembly on received packets
19361 + */
19362 +#define DPNI_OPT_IPR                           0x00000800
19363 +/**
19364 + * Support IP fragmentation on transmitted packets
19365 + */
19366 +#define DPNI_OPT_IPF                           0x00001000
19367 +/**
19368 + * VLAN manipulation support
19369 + */
19370 +#define DPNI_OPT_VLAN_MANIPULATION             0x00010000
19371 +/**
19372 + * Support masking of QoS lookup keys
19373 + */
19374 +#define DPNI_OPT_QOS_MASK_SUPPORT              0x00020000
19375 +/**
19376 + * Support masking of Flow Steering lookup keys
19377 + */
19378 +#define DPNI_OPT_FS_MASK_SUPPORT               0x00040000
19379 +
19380 +/**
19381 + * struct dpni_extended_cfg - Structure representing extended DPNI configuration
19382 + * @tc_cfg: TCs configuration
19383 + * @ipr_cfg: IP reassembly configuration
19384 + */
19385 +struct dpni_extended_cfg {
19386 +       /**
19387 +        * struct tc_cfg - TC configuration
19388 +        * @max_dist: Maximum distribution size for Rx traffic class;
19389 +        *      supported values: 1,2,3,4,6,7,8,12,14,16,24,28,32,48,56,64,96,
19390 +        *      112,128,192,224,256,384,448,512,768,896,1024;
19391 +        *      value '0' will be treated as '1'.
19392 +        *      other unsupported values will be round down to the nearest
19393 +        *      supported value.
19394 +        * @max_fs_entries: Maximum FS entries for Rx traffic class;
19395 +        *      '0' means no support for this TC;
19396 +        */
19397 +       struct {
19398 +               uint16_t        max_dist;
19399 +               uint16_t        max_fs_entries;
19400 +       } tc_cfg[DPNI_MAX_TC];
19401 +       /**
19402 +        * struct ipr_cfg - Structure representing IP reassembly configuration
19403 +        * @max_reass_frm_size: Maximum size of the reassembled frame
19404 +        * @min_frag_size_ipv4: Minimum fragment size of IPv4 fragments
19405 +        * @min_frag_size_ipv6: Minimum fragment size of IPv6 fragments
19406 +        * @max_open_frames_ipv4: Maximum concurrent IPv4 packets in reassembly
19407 +        *              process
19408 +        * @max_open_frames_ipv6: Maximum concurrent IPv6 packets in reassembly
19409 +        *              process
19410 +        */
19411 +       struct {
19412 +               uint16_t max_reass_frm_size;
19413 +               uint16_t min_frag_size_ipv4;
19414 +               uint16_t min_frag_size_ipv6;
19415 +               uint16_t max_open_frames_ipv4;
19416 +               uint16_t max_open_frames_ipv6;
19417 +       } ipr_cfg;
19418 +};
19419 +
19420 +/**
19421 + * dpni_prepare_extended_cfg() - function prepare extended parameters
19422 + * @cfg: extended structure
19423 + * @ext_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
19424 + *
19425 + * This function has to be called before dpni_create()
19426 + */
19427 +int dpni_prepare_extended_cfg(const struct dpni_extended_cfg   *cfg,
19428 +                             uint8_t                   *ext_cfg_buf);
19429 +
19430 +/**
19431 + * struct dpni_cfg - Structure representing DPNI configuration
19432 + * @mac_addr: Primary MAC address
19433 + * @adv: Advanced parameters; default is all zeros;
19434 + *             use this structure to change default settings
19435 + */
19436 +struct dpni_cfg {
19437 +       uint8_t mac_addr[6];
19438 +       /**
19439 +        * struct adv - Advanced parameters
19440 +        * @options: Mask of available options; use 'DPNI_OPT_<X>' values
19441 +        * @start_hdr: Selects the packet starting header for parsing;
19442 +        *              'NET_PROT_NONE' is treated as default: 'NET_PROT_ETH'
19443 +        * @max_senders: Maximum number of different senders; used as the number
19444 +        *              of dedicated Tx flows; Non-power-of-2 values are rounded
19445 +        *              up to the next power-of-2 value as hardware demands it;
19446 +        *              '0' will be treated as '1'
19447 +        * @max_tcs: Maximum number of traffic classes (for both Tx and Rx);
19448 +        *              '0' will e treated as '1'
19449 +        * @max_unicast_filters: Maximum number of unicast filters;
19450 +        *                      '0' is treated  as '16'
19451 +        * @max_multicast_filters: Maximum number of multicast filters;
19452 +        *                      '0' is treated as '64'
19453 +        * @max_qos_entries: if 'max_tcs > 1', declares the maximum entries in
19454 +        *                      the QoS table; '0' is treated as '64'
19455 +        * @max_qos_key_size: Maximum key size for the QoS look-up;
19456 +        *                      '0' is treated as '24' which is enough for IPv4
19457 +        *                      5-tuple
19458 +        * @max_dist_key_size: Maximum key size for the distribution;
19459 +        *              '0' is treated as '24' which is enough for IPv4 5-tuple
19460 +        * @max_policers: Maximum number of policers;
19461 +        *              should be between '0' and max_tcs
19462 +        * @max_congestion_ctrl: Maximum number of congestion control groups
19463 +        *              (CGs); covers early drop and congestion notification
19464 +        *              requirements;
19465 +        *              should be between '0' and ('max_tcs' + 'max_senders')
19466 +        * @ext_cfg_iova: I/O virtual address of 256 bytes DMA-able memory
19467 +        *              filled with the extended configuration by calling
19468 +        *              dpni_prepare_extended_cfg()
19469 +        */
19470 +       struct {
19471 +               uint32_t        options;
19472 +               enum net_prot   start_hdr;
19473 +               uint8_t         max_senders;
19474 +               uint8_t         max_tcs;
19475 +               uint8_t         max_unicast_filters;
19476 +               uint8_t         max_multicast_filters;
19477 +               uint8_t         max_vlan_filters;
19478 +               uint8_t         max_qos_entries;
19479 +               uint8_t         max_qos_key_size;
19480 +               uint8_t         max_dist_key_size;
19481 +               uint8_t         max_policers;
19482 +               uint8_t         max_congestion_ctrl;
19483 +               uint64_t        ext_cfg_iova;
19484 +       } adv;
19485 +};
19486 +
19487 +/**
19488 + * dpni_create() - Create the DPNI object
19489 + * @mc_io:     Pointer to MC portal's I/O object
19490 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19491 + * @cfg:       Configuration structure
19492 + * @token:     Returned token; use in subsequent API calls
19493 + *
19494 + * Create the DPNI object, allocate required resources and
19495 + * perform required initialization.
19496 + *
19497 + * The object can be created either by declaring it in the
19498 + * DPL file, or by calling this function.
19499 + *
19500 + * This function returns a unique authentication token,
19501 + * associated with the specific object ID and the specific MC
19502 + * portal; this token must be used in all subsequent calls to
19503 + * this specific object. For objects that are created using the
19504 + * DPL file, call dpni_open() function to get an authentication
19505 + * token first.
19506 + *
19507 + * Return:     '0' on Success; Error code otherwise.
19508 + */
19509 +int dpni_create(struct fsl_mc_io       *mc_io,
19510 +               uint32_t                cmd_flags,
19511 +               const struct dpni_cfg   *cfg,
19512 +               uint16_t                *token);
19513 +
19514 +/**
19515 + * dpni_destroy() - Destroy the DPNI object and release all its resources.
19516 + * @mc_io:     Pointer to MC portal's I/O object
19517 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19518 + * @token:     Token of DPNI object
19519 + *
19520 + * Return:     '0' on Success; error code otherwise.
19521 + */
19522 +int dpni_destroy(struct fsl_mc_io      *mc_io,
19523 +                uint32_t               cmd_flags,
19524 +                uint16_t               token);
19525 +
19526 +/**
19527 + * struct dpni_pools_cfg - Structure representing buffer pools configuration
19528 + * @num_dpbp: Number of DPBPs
19529 + * @pools: Array of buffer pools parameters; The number of valid entries
19530 + *     must match 'num_dpbp' value
19531 + */
19532 +struct dpni_pools_cfg {
19533 +       uint8_t         num_dpbp;
19534 +       /**
19535 +        * struct pools - Buffer pools parameters
19536 +        * @dpbp_id: DPBP object ID
19537 +        * @buffer_size: Buffer size
19538 +        * @backup_pool: Backup pool
19539 +        */
19540 +       struct {
19541 +               int             dpbp_id;
19542 +               uint16_t        buffer_size;
19543 +               int             backup_pool;
19544 +       } pools[DPNI_MAX_DPBP];
19545 +};
19546 +
19547 +/**
19548 + * dpni_set_pools() - Set buffer pools configuration
19549 + * @mc_io:     Pointer to MC portal's I/O object
19550 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19551 + * @token:     Token of DPNI object
19552 + * @cfg:       Buffer pools configuration
19553 + *
19554 + * mandatory for DPNI operation
19555 + * warning:Allowed only when DPNI is disabled
19556 + *
19557 + * Return:     '0' on Success; Error code otherwise.
19558 + */
19559 +int dpni_set_pools(struct fsl_mc_io            *mc_io,
19560 +                  uint32_t                     cmd_flags,
19561 +                  uint16_t                     token,
19562 +                  const struct dpni_pools_cfg  *cfg);
19563 +
19564 +/**
19565 + * dpni_enable() - Enable the DPNI, allow sending and receiving frames.
19566 + * @mc_io:     Pointer to MC portal's I/O object
19567 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19568 + * @token:             Token of DPNI object
19569 + *
19570 + * Return:     '0' on Success; Error code otherwise.
19571 + */
19572 +int dpni_enable(struct fsl_mc_io       *mc_io,
19573 +               uint32_t                cmd_flags,
19574 +               uint16_t                token);
19575 +
19576 +/**
19577 + * dpni_disable() - Disable the DPNI, stop sending and receiving frames.
19578 + * @mc_io:     Pointer to MC portal's I/O object
19579 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19580 + * @token:     Token of DPNI object
19581 + *
19582 + * Return:     '0' on Success; Error code otherwise.
19583 + */
19584 +int dpni_disable(struct fsl_mc_io      *mc_io,
19585 +                uint32_t               cmd_flags,
19586 +                uint16_t               token);
19587 +
19588 +/**
19589 + * dpni_is_enabled() - Check if the DPNI is enabled.
19590 + * @mc_io:     Pointer to MC portal's I/O object
19591 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19592 + * @token:     Token of DPNI object
19593 + * @en:                Returns '1' if object is enabled; '0' otherwise
19594 + *
19595 + * Return:     '0' on Success; Error code otherwise.
19596 + */
19597 +int dpni_is_enabled(struct fsl_mc_io   *mc_io,
19598 +                   uint32_t            cmd_flags,
19599 +                   uint16_t            token,
19600 +                   int         *en);
19601 +
19602 +/**
19603 + * dpni_reset() - Reset the DPNI, returns the object to initial state.
19604 + * @mc_io:     Pointer to MC portal's I/O object
19605 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19606 + * @token:     Token of DPNI object
19607 + *
19608 + * Return:     '0' on Success; Error code otherwise.
19609 + */
19610 +int dpni_reset(struct fsl_mc_io        *mc_io,
19611 +              uint32_t         cmd_flags,
19612 +              uint16_t         token);
19613 +
19614 +/**
19615 + * DPNI IRQ Index and Events
19616 + */
19617 +
19618 +/**
19619 + * IRQ index
19620 + */
19621 +#define DPNI_IRQ_INDEX                         0
19622 +/**
19623 + * IRQ event - indicates a change in link state
19624 + */
19625 +#define DPNI_IRQ_EVENT_LINK_CHANGED            0x00000001
19626 +
19627 +/**
19628 + * struct dpni_irq_cfg - IRQ configuration
19629 + * @addr:      Address that must be written to signal a message-based interrupt
19630 + * @val:       Value to write into irq_addr address
19631 + * @irq_num: A user defined number associated with this IRQ
19632 + */
19633 +struct dpni_irq_cfg {
19634 +            uint64_t           addr;
19635 +            uint32_t           val;
19636 +            int                irq_num;
19637 +};
19638 +
19639 +/**
19640 + * dpni_set_irq() - Set IRQ information for the DPNI to trigger an interrupt.
19641 + * @mc_io:     Pointer to MC portal's I/O object
19642 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19643 + * @token:     Token of DPNI object
19644 + * @irq_index: Identifies the interrupt index to configure
19645 + * @irq_cfg:   IRQ configuration
19646 + *
19647 + * Return:     '0' on Success; Error code otherwise.
19648 + */
19649 +int dpni_set_irq(struct fsl_mc_io      *mc_io,
19650 +                uint32_t               cmd_flags,
19651 +                uint16_t               token,
19652 +                uint8_t                irq_index,
19653 +                struct dpni_irq_cfg    *irq_cfg);
19654 +
19655 +/**
19656 + * dpni_get_irq() - Get IRQ information from the DPNI.
19657 + * @mc_io:     Pointer to MC portal's I/O object
19658 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19659 + * @token:     Token of DPNI object
19660 + * @irq_index: The interrupt index to configure
19661 + * @type:      Interrupt type: 0 represents message interrupt
19662 + *             type (both irq_addr and irq_val are valid)
19663 + * @irq_cfg:   IRQ attributes
19664 + *
19665 + * Return:     '0' on Success; Error code otherwise.
19666 + */
19667 +int dpni_get_irq(struct fsl_mc_io      *mc_io,
19668 +                uint32_t               cmd_flags,
19669 +                uint16_t               token,
19670 +                uint8_t                irq_index,
19671 +                int                    *type,
19672 +                struct dpni_irq_cfg    *irq_cfg);
19673 +
19674 +/**
19675 + * dpni_set_irq_enable() - Set overall interrupt state.
19676 + * @mc_io:     Pointer to MC portal's I/O object
19677 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19678 + * @token:     Token of DPNI object
19679 + * @irq_index: The interrupt index to configure
19680 + * @en:                Interrupt state: - enable = 1, disable = 0
19681 + *
19682 + * Allows GPP software to control when interrupts are generated.
19683 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
19684 + * overall interrupt state. if the interrupt is disabled no causes will cause
19685 + * an interrupt.
19686 + *
19687 + * Return:     '0' on Success; Error code otherwise.
19688 + */
19689 +int dpni_set_irq_enable(struct fsl_mc_io       *mc_io,
19690 +                       uint32_t                cmd_flags,
19691 +                       uint16_t                token,
19692 +                       uint8_t                 irq_index,
19693 +                       uint8_t                 en);
19694 +
19695 +/**
19696 + * dpni_get_irq_enable() - Get overall interrupt state
19697 + * @mc_io:     Pointer to MC portal's I/O object
19698 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19699 + * @token:     Token of DPNI object
19700 + * @irq_index: The interrupt index to configure
19701 + * @en:                Returned interrupt state - enable = 1, disable = 0
19702 + *
19703 + * Return:     '0' on Success; Error code otherwise.
19704 + */
19705 +int dpni_get_irq_enable(struct fsl_mc_io       *mc_io,
19706 +                       uint32_t                cmd_flags,
19707 +                       uint16_t                token,
19708 +                       uint8_t                 irq_index,
19709 +                       uint8_t                 *en);
19710 +
19711 +/**
19712 + * dpni_set_irq_mask() - Set interrupt mask.
19713 + * @mc_io:     Pointer to MC portal's I/O object
19714 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19715 + * @token:     Token of DPNI object
19716 + * @irq_index: The interrupt index to configure
19717 + * @mask:      event mask to trigger interrupt;
19718 + *                     each bit:
19719 + *                             0 = ignore event
19720 + *                             1 = consider event for asserting IRQ
19721 + *
19722 + * Every interrupt can have up to 32 causes and the interrupt model supports
19723 + * masking/unmasking each cause independently
19724 + *
19725 + * Return:     '0' on Success; Error code otherwise.
19726 + */
19727 +int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
19728 +                     uint32_t          cmd_flags,
19729 +                     uint16_t          token,
19730 +                     uint8_t           irq_index,
19731 +                     uint32_t          mask);
19732 +
19733 +/**
19734 + * dpni_get_irq_mask() - Get interrupt mask.
19735 + * @mc_io:     Pointer to MC portal's I/O object
19736 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19737 + * @token:     Token of DPNI object
19738 + * @irq_index: The interrupt index to configure
19739 + * @mask:      Returned event mask to trigger interrupt
19740 + *
19741 + * Every interrupt can have up to 32 causes and the interrupt model supports
19742 + * masking/unmasking each cause independently
19743 + *
19744 + * Return:     '0' on Success; Error code otherwise.
19745 + */
19746 +int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
19747 +                     uint32_t          cmd_flags,
19748 +                     uint16_t          token,
19749 +                     uint8_t           irq_index,
19750 +                     uint32_t          *mask);
19751 +
19752 +/**
19753 + * dpni_get_irq_status() - Get the current status of any pending interrupts.
19754 + * @mc_io:     Pointer to MC portal's I/O object
19755 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19756 + * @token:     Token of DPNI object
19757 + * @irq_index: The interrupt index to configure
19758 + * @status:    Returned interrupts status - one bit per cause:
19759 + *                     0 = no interrupt pending
19760 + *                     1 = interrupt pending
19761 + *
19762 + * Return:     '0' on Success; Error code otherwise.
19763 + */
19764 +int dpni_get_irq_status(struct fsl_mc_io       *mc_io,
19765 +                       uint32_t                cmd_flags,
19766 +                       uint16_t                token,
19767 +                       uint8_t                 irq_index,
19768 +                       uint32_t                *status);
19769 +
19770 +/**
19771 + * dpni_clear_irq_status() - Clear a pending interrupt's status
19772 + * @mc_io:     Pointer to MC portal's I/O object
19773 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19774 + * @token:     Token of DPNI object
19775 + * @irq_index: The interrupt index to configure
19776 + * @status:    bits to clear (W1C) - one bit per cause:
19777 + *                     0 = don't change
19778 + *                     1 = clear status bit
19779 + *
19780 + * Return:     '0' on Success; Error code otherwise.
19781 + */
19782 +int dpni_clear_irq_status(struct fsl_mc_io     *mc_io,
19783 +                         uint32_t              cmd_flags,
19784 +                         uint16_t              token,
19785 +                         uint8_t               irq_index,
19786 +                         uint32_t              status);
19787 +
19788 +/**
19789 + * struct dpni_attr - Structure representing DPNI attributes
19790 + * @id: DPNI object ID
19791 + * @version: DPNI version
19792 + * @start_hdr: Indicates the packet starting header for parsing
19793 + * @options: Mask of available options; reflects the value as was given in
19794 + *             object's creation
19795 + * @max_senders: Maximum number of different senders; used as the number
19796 + *             of dedicated Tx flows;
19797 + * @max_tcs: Maximum number of traffic classes (for both Tx and Rx)
19798 + * @max_unicast_filters: Maximum number of unicast filters
19799 + * @max_multicast_filters: Maximum number of multicast filters
19800 + * @max_vlan_filters: Maximum number of VLAN filters
19801 + * @max_qos_entries: if 'max_tcs > 1', declares the maximum entries in QoS table
19802 + * @max_qos_key_size: Maximum key size for the QoS look-up
19803 + * @max_dist_key_size: Maximum key size for the distribution look-up
19804 + * @max_policers: Maximum number of policers;
19805 + * @max_congestion_ctrl: Maximum number of congestion control groups (CGs);
19806 + * @ext_cfg_iova: I/O virtual address of 256 bytes DMA-able memory;
19807 + *     call dpni_extract_extended_cfg() to extract the extended configuration
19808 + */
19809 +struct dpni_attr {
19810 +       int             id;
19811 +       /**
19812 +        * struct version - DPNI version
19813 +        * @major: DPNI major version
19814 +        * @minor: DPNI minor version
19815 +        */
19816 +       struct {
19817 +               uint16_t major;
19818 +               uint16_t minor;
19819 +       } version;
19820 +       enum net_prot   start_hdr;
19821 +       uint32_t        options;
19822 +       uint8_t         max_senders;
19823 +       uint8_t         max_tcs;
19824 +       uint8_t         max_unicast_filters;
19825 +       uint8_t         max_multicast_filters;
19826 +       uint8_t         max_vlan_filters;
19827 +       uint8_t         max_qos_entries;
19828 +       uint8_t         max_qos_key_size;
19829 +       uint8_t         max_dist_key_size;
19830 +       uint8_t         max_policers;
19831 +       uint8_t         max_congestion_ctrl;
19832 +       uint64_t        ext_cfg_iova;
19833 +};
19834 +
19835 +/**
19836 + * dpni_get_attributes() - Retrieve DPNI attributes.
19837 + * @mc_io:     Pointer to MC portal's I/O object
19838 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19839 + * @token:     Token of DPNI object
19840 + * @attr:      Object's attributes
19841 + *
19842 + * Return:     '0' on Success; Error code otherwise.
19843 + */
19844 +int dpni_get_attributes(struct fsl_mc_io       *mc_io,
19845 +                       uint32_t                cmd_flags,
19846 +                       uint16_t                token,
19847 +                       struct dpni_attr        *attr);
19848 +
19849 +/**
19850 + * dpni_extract_extended_cfg() - extract the extended parameters
19851 + * @cfg: extended structure
19852 + * @ext_cfg_buf: 256 bytes of DMA-able memory
19853 + *
19854 + * This function has to be called after dpni_get_attributes()
19855 + */
19856 +int dpni_extract_extended_cfg(struct dpni_extended_cfg *cfg,
19857 +                             const uint8_t             *ext_cfg_buf);
19858 +
19859 +/**
19860 + * DPNI errors
19861 + */
19862 +
19863 +/**
19864 + * Extract out of frame header error
19865 + */
19866 +#define DPNI_ERROR_EOFHE       0x00020000
19867 +/**
19868 + * Frame length error
19869 + */
19870 +#define DPNI_ERROR_FLE         0x00002000
19871 +/**
19872 + * Frame physical error
19873 + */
19874 +#define DPNI_ERROR_FPE         0x00001000
19875 +/**
19876 + * Parsing header error
19877 + */
19878 +#define DPNI_ERROR_PHE         0x00000020
19879 +/**
19880 + * Parser L3 checksum error
19881 + */
19882 +#define DPNI_ERROR_L3CE                0x00000004
19883 +/**
19884 + * Parser L3 checksum error
19885 + */
19886 +#define DPNI_ERROR_L4CE                0x00000001
19887 +
19888 +/**
19889 + * enum dpni_error_action - Defines DPNI behavior for errors
19890 + * @DPNI_ERROR_ACTION_DISCARD: Discard the frame
19891 + * @DPNI_ERROR_ACTION_CONTINUE: Continue with the normal flow
19892 + * @DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE: Send the frame to the error queue
19893 + */
19894 +enum dpni_error_action {
19895 +       DPNI_ERROR_ACTION_DISCARD = 0,
19896 +       DPNI_ERROR_ACTION_CONTINUE = 1,
19897 +       DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE = 2
19898 +};
19899 +
19900 +/**
19901 + * struct dpni_error_cfg - Structure representing DPNI errors treatment
19902 + * @errors: Errors mask; use 'DPNI_ERROR__<X>
19903 + * @error_action: The desired action for the errors mask
19904 + * @set_frame_annotation: Set to '1' to mark the errors in frame annotation
19905 + *             status (FAS); relevant only for the non-discard action
19906 + */
19907 +struct dpni_error_cfg {
19908 +       uint32_t                errors;
19909 +       enum dpni_error_action  error_action;
19910 +       int                     set_frame_annotation;
19911 +};
19912 +
19913 +/**
19914 + * dpni_set_errors_behavior() - Set errors behavior
19915 + * @mc_io:     Pointer to MC portal's I/O object
19916 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19917 + * @token:     Token of DPNI object
19918 + * @cfg:       Errors configuration
19919 + *
19920 + * this function may be called numerous times with different
19921 + * error masks
19922 + *
19923 + * Return:     '0' on Success; Error code otherwise.
19924 + */
19925 +int dpni_set_errors_behavior(struct fsl_mc_io          *mc_io,
19926 +                            uint32_t                   cmd_flags,
19927 +                            uint16_t                   token,
19928 +                            struct dpni_error_cfg      *cfg);
19929 +
19930 +/**
19931 + * DPNI buffer layout modification options
19932 + */
19933 +
19934 +/**
19935 + * Select to modify the time-stamp setting
19936 + */
19937 +#define DPNI_BUF_LAYOUT_OPT_TIMESTAMP          0x00000001
19938 +/**
19939 + * Select to modify the parser-result setting; not applicable for Tx
19940 + */
19941 +#define DPNI_BUF_LAYOUT_OPT_PARSER_RESULT      0x00000002
19942 +/**
19943 + * Select to modify the frame-status setting
19944 + */
19945 +#define DPNI_BUF_LAYOUT_OPT_FRAME_STATUS       0x00000004
19946 +/**
19947 + * Select to modify the private-data-size setting
19948 + */
19949 +#define DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE  0x00000008
19950 +/**
19951 + * Select to modify the data-alignment setting
19952 + */
19953 +#define DPNI_BUF_LAYOUT_OPT_DATA_ALIGN         0x00000010
19954 +/**
19955 + * Select to modify the data-head-room setting
19956 + */
19957 +#define DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM     0x00000020
19958 +/**
19959 + * Select to modify the data-tail-room setting
19960 + */
19961 +#define DPNI_BUF_LAYOUT_OPT_DATA_TAIL_ROOM     0x00000040
19962 +
19963 +/**
19964 + * struct dpni_buffer_layout - Structure representing DPNI buffer layout
19965 + * @options: Flags representing the suggested modifications to the buffer
19966 + *             layout; Use any combination of 'DPNI_BUF_LAYOUT_OPT_<X>' flags
19967 + * @pass_timestamp: Pass timestamp value
19968 + * @pass_parser_result: Pass parser results
19969 + * @pass_frame_status: Pass frame status
19970 + * @private_data_size: Size kept for private data (in bytes)
19971 + * @data_align: Data alignment
19972 + * @data_head_room: Data head room
19973 + * @data_tail_room: Data tail room
19974 + */
19975 +struct dpni_buffer_layout {
19976 +       uint32_t        options;
19977 +       int             pass_timestamp;
19978 +       int             pass_parser_result;
19979 +       int             pass_frame_status;
19980 +       uint16_t        private_data_size;
19981 +       uint16_t        data_align;
19982 +       uint16_t        data_head_room;
19983 +       uint16_t        data_tail_room;
19984 +};
19985 +
19986 +/**
19987 + * dpni_get_rx_buffer_layout() - Retrieve Rx buffer layout attributes.
19988 + * @mc_io:     Pointer to MC portal's I/O object
19989 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19990 + * @token:     Token of DPNI object
19991 + * @layout:    Returns buffer layout attributes
19992 + *
19993 + * Return:     '0' on Success; Error code otherwise.
19994 + */
19995 +int dpni_get_rx_buffer_layout(struct fsl_mc_io         *mc_io,
19996 +                             uint32_t                  cmd_flags,
19997 +                             uint16_t                  token,
19998 +                             struct dpni_buffer_layout *layout);
19999 +
20000 +/**
20001 + * dpni_set_rx_buffer_layout() - Set Rx buffer layout configuration.
20002 + * @mc_io:     Pointer to MC portal's I/O object
20003 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20004 + * @token:     Token of DPNI object
20005 + * @layout:    Buffer layout configuration
20006 + *
20007 + * Return:     '0' on Success; Error code otherwise.
20008 + *
20009 + * @warning    Allowed only when DPNI is disabled
20010 + */
20011 +int dpni_set_rx_buffer_layout(struct fsl_mc_io                 *mc_io,
20012 +                             uint32_t                          cmd_flags,
20013 +                             uint16_t                          token,
20014 +                             const struct dpni_buffer_layout   *layout);
20015 +
20016 +/**
20017 + * dpni_get_tx_buffer_layout() - Retrieve Tx buffer layout attributes.
20018 + * @mc_io:     Pointer to MC portal's I/O object
20019 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20020 + * @token:     Token of DPNI object
20021 + * @layout:    Returns buffer layout attributes
20022 + *
20023 + * Return:     '0' on Success; Error code otherwise.
20024 + */
20025 +int dpni_get_tx_buffer_layout(struct fsl_mc_io         *mc_io,
20026 +                             uint32_t                  cmd_flags,
20027 +                             uint16_t                  token,
20028 +                             struct dpni_buffer_layout *layout);
20029 +
20030 +/**
20031 + * dpni_set_tx_buffer_layout() - Set Tx buffer layout configuration.
20032 + * @mc_io:     Pointer to MC portal's I/O object
20033 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20034 + * @token:     Token of DPNI object
20035 + * @layout:    Buffer layout configuration
20036 + *
20037 + * Return:     '0' on Success; Error code otherwise.
20038 + *
20039 + * @warning    Allowed only when DPNI is disabled
20040 + */
20041 +int dpni_set_tx_buffer_layout(struct fsl_mc_io                 *mc_io,
20042 +                             uint32_t                          cmd_flags,
20043 +                             uint16_t                          token,
20044 +                             const struct dpni_buffer_layout   *layout);
20045 +
20046 +/**
20047 + * dpni_get_tx_conf_buffer_layout() - Retrieve Tx confirmation buffer layout
20048 + *                             attributes.
20049 + * @mc_io:     Pointer to MC portal's I/O object
20050 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20051 + * @token:     Token of DPNI object
20052 + * @layout:    Returns buffer layout attributes
20053 + *
20054 + * Return:     '0' on Success; Error code otherwise.
20055 + */
20056 +int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io            *mc_io,
20057 +                                  uint32_t                     cmd_flags,
20058 +                                  uint16_t                     token,
20059 +                                  struct dpni_buffer_layout    *layout);
20060 +
20061 +/**
20062 + * dpni_set_tx_conf_buffer_layout() - Set Tx confirmation buffer layout
20063 + *                                     configuration.
20064 + * @mc_io:     Pointer to MC portal's I/O object
20065 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20066 + * @token:     Token of DPNI object
20067 + * @layout:    Buffer layout configuration
20068 + *
20069 + * Return:     '0' on Success; Error code otherwise.
20070 + *
20071 + * @warning    Allowed only when DPNI is disabled
20072 + */
20073 +int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io               *mc_io,
20074 +                                  uint32_t                        cmd_flags,
20075 +                                  uint16_t                        token,
20076 +                                  const struct dpni_buffer_layout *layout);
20077 +
20078 +/**
20079 + * dpni_set_l3_chksum_validation() - Enable/disable L3 checksum validation
20080 + * @mc_io:     Pointer to MC portal's I/O object
20081 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20082 + * @token:     Token of DPNI object
20083 + * @en:                Set to '1' to enable; '0' to disable
20084 + *
20085 + * Return:     '0' on Success; Error code otherwise.
20086 + */
20087 +int dpni_set_l3_chksum_validation(struct fsl_mc_io     *mc_io,
20088 +                                 uint32_t              cmd_flags,
20089 +                                 uint16_t              token,
20090 +                                 int                   en);
20091 +
20092 +/**
20093 + * dpni_get_l3_chksum_validation() - Get L3 checksum validation mode
20094 + * @mc_io:     Pointer to MC portal's I/O object
20095 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20096 + * @token:     Token of DPNI object
20097 + * @en:                Returns '1' if enabled; '0' otherwise
20098 + *
20099 + * Return:     '0' on Success; Error code otherwise.
20100 + */
20101 +int dpni_get_l3_chksum_validation(struct fsl_mc_io     *mc_io,
20102 +                                 uint32_t              cmd_flags,
20103 +                                 uint16_t              token,
20104 +                                 int                   *en);
20105 +
20106 +/**
20107 + * dpni_set_l4_chksum_validation() - Enable/disable L4 checksum validation
20108 + * @mc_io:     Pointer to MC portal's I/O object
20109 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20110 + * @token:     Token of DPNI object
20111 + * @en:                Set to '1' to enable; '0' to disable
20112 + *
20113 + * Return:     '0' on Success; Error code otherwise.
20114 + */
20115 +int dpni_set_l4_chksum_validation(struct fsl_mc_io     *mc_io,
20116 +                                 uint32_t              cmd_flags,
20117 +                                 uint16_t              token,
20118 +                                 int                   en);
20119 +
20120 +/**
20121 + * dpni_get_l4_chksum_validation() - Get L4 checksum validation mode
20122 + * @mc_io:     Pointer to MC portal's I/O object
20123 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20124 + * @token:     Token of DPNI object
20125 + * @en:                Returns '1' if enabled; '0' otherwise
20126 + *
20127 + * Return:     '0' on Success; Error code otherwise.
20128 + */
20129 +int dpni_get_l4_chksum_validation(struct fsl_mc_io     *mc_io,
20130 +                                 uint32_t              cmd_flags,
20131 +                                 uint16_t              token,
20132 +                                 int                   *en);
20133 +
20134 +/**
20135 + * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used
20136 + *                     for enqueue operations
20137 + * @mc_io:     Pointer to MC portal's I/O object
20138 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20139 + * @token:     Token of DPNI object
20140 + * @qdid:      Returned virtual QDID value that should be used as an argument
20141 + *                     in all enqueue operations
20142 + *
20143 + * Return:     '0' on Success; Error code otherwise.
20144 + */
20145 +int dpni_get_qdid(struct fsl_mc_io     *mc_io,
20146 +                 uint32_t              cmd_flags,
20147 +                 uint16_t              token,
20148 +                 uint16_t              *qdid);
20149 +
20150 +/**
20151 + * struct dpni_sp_info - Structure representing DPNI storage-profile information
20152 + * (relevant only for DPNI owned by AIOP)
20153 + * @spids: array of storage-profiles
20154 + */
20155 +struct dpni_sp_info {
20156 +       uint16_t spids[DPNI_MAX_SP];
20157 +};
20158 +
20159 +/**
20160 + * dpni_get_spids() - Get the AIOP storage profile IDs associated with the DPNI
20161 + * @mc_io:     Pointer to MC portal's I/O object
20162 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20163 + * @token:     Token of DPNI object
20164 + * @sp_info:   Returned AIOP storage-profile information
20165 + *
20166 + * Return:     '0' on Success; Error code otherwise.
20167 + *
20168 + * @warning    Only relevant for DPNI that belongs to AIOP container.
20169 + */
20170 +int dpni_get_sp_info(struct fsl_mc_io          *mc_io,
20171 +                    uint32_t                   cmd_flags,
20172 +                    uint16_t                   token,
20173 +                    struct dpni_sp_info        *sp_info);
20174 +
20175 +/**
20176 + * dpni_get_tx_data_offset() - Get the Tx data offset (from start of buffer)
20177 + * @mc_io:     Pointer to MC portal's I/O object
20178 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20179 + * @token:     Token of DPNI object
20180 + * @data_offset: Tx data offset (from start of buffer)
20181 + *
20182 + * Return:     '0' on Success; Error code otherwise.
20183 + */
20184 +int dpni_get_tx_data_offset(struct fsl_mc_io   *mc_io,
20185 +                           uint32_t            cmd_flags,
20186 +                           uint16_t            token,
20187 +                           uint16_t            *data_offset);
20188 +
20189 +/**
20190 + * enum dpni_counter - DPNI counter types
20191 + * @DPNI_CNT_ING_FRAME: Counts ingress frames
20192 + * @DPNI_CNT_ING_BYTE: Counts ingress bytes
20193 + * @DPNI_CNT_ING_FRAME_DROP: Counts ingress frames dropped due to explicit
20194 + *             'drop' setting
20195 + * @DPNI_CNT_ING_FRAME_DISCARD: Counts ingress frames discarded due to errors
20196 + * @DPNI_CNT_ING_MCAST_FRAME: Counts ingress multicast frames
20197 + * @DPNI_CNT_ING_MCAST_BYTE: Counts ingress multicast bytes
20198 + * @DPNI_CNT_ING_BCAST_FRAME: Counts ingress broadcast frames
20199 + * @DPNI_CNT_ING_BCAST_BYTES: Counts ingress broadcast bytes
20200 + * @DPNI_CNT_EGR_FRAME: Counts egress frames
20201 + * @DPNI_CNT_EGR_BYTE: Counts egress bytes
20202 + * @DPNI_CNT_EGR_FRAME_DISCARD: Counts egress frames discarded due to errors
20203 + */
20204 +enum dpni_counter {
20205 +       DPNI_CNT_ING_FRAME = 0x0,
20206 +       DPNI_CNT_ING_BYTE = 0x1,
20207 +       DPNI_CNT_ING_FRAME_DROP = 0x2,
20208 +       DPNI_CNT_ING_FRAME_DISCARD = 0x3,
20209 +       DPNI_CNT_ING_MCAST_FRAME = 0x4,
20210 +       DPNI_CNT_ING_MCAST_BYTE = 0x5,
20211 +       DPNI_CNT_ING_BCAST_FRAME = 0x6,
20212 +       DPNI_CNT_ING_BCAST_BYTES = 0x7,
20213 +       DPNI_CNT_EGR_FRAME = 0x8,
20214 +       DPNI_CNT_EGR_BYTE = 0x9,
20215 +       DPNI_CNT_EGR_FRAME_DISCARD = 0xa
20216 +};
20217 +
20218 +/**
20219 + * dpni_get_counter() - Read a specific DPNI counter
20220 + * @mc_io:     Pointer to MC portal's I/O object
20221 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20222 + * @token:     Token of DPNI object
20223 + * @counter:   The requested counter
20224 + * @value:     Returned counter's current value
20225 + *
20226 + * Return:     '0' on Success; Error code otherwise.
20227 + */
20228 +int dpni_get_counter(struct fsl_mc_io  *mc_io,
20229 +                    uint32_t           cmd_flags,
20230 +                    uint16_t           token,
20231 +                    enum dpni_counter  counter,
20232 +                    uint64_t           *value);
20233 +
20234 +/**
20235 + * dpni_set_counter() - Set (or clear) a specific DPNI counter
20236 + * @mc_io:     Pointer to MC portal's I/O object
20237 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20238 + * @token:     Token of DPNI object
20239 + * @counter:   The requested counter
20240 + * @value:     New counter value; typically pass '0' for resetting
20241 + *                     the counter.
20242 + *
20243 + * Return:     '0' on Success; Error code otherwise.
20244 + */
20245 +int dpni_set_counter(struct fsl_mc_io  *mc_io,
20246 +                    uint32_t           cmd_flags,
20247 +                    uint16_t           token,
20248 +                    enum dpni_counter  counter,
20249 +                    uint64_t           value);
20250 +
20251 +/**
20252 + * Enable auto-negotiation
20253 + */
20254 +#define DPNI_LINK_OPT_AUTONEG          0x0000000000000001ULL
20255 +/**
20256 + * Enable half-duplex mode
20257 + */
20258 +#define DPNI_LINK_OPT_HALF_DUPLEX      0x0000000000000002ULL
20259 +/**
20260 + * Enable pause frames
20261 + */
20262 +#define DPNI_LINK_OPT_PAUSE            0x0000000000000004ULL
20263 +/**
20264 + * Enable a-symmetric pause frames
20265 + */
20266 +#define DPNI_LINK_OPT_ASYM_PAUSE       0x0000000000000008ULL
20267 +
20268 +/**
20269 + * struct - Structure representing DPNI link configuration
20270 + * @rate: Rate
20271 + * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
20272 + */
20273 +struct dpni_link_cfg {
20274 +       uint32_t rate;
20275 +       uint64_t options;
20276 +};
20277 +
20278 +/**
20279 + * dpni_set_link_cfg() - set the link configuration.
20280 + * @mc_io:     Pointer to MC portal's I/O object
20281 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20282 + * @token:     Token of DPNI object
20283 + * @cfg:       Link configuration
20284 + *
20285 + * Return:     '0' on Success; Error code otherwise.
20286 + */
20287 +int dpni_set_link_cfg(struct fsl_mc_io                 *mc_io,
20288 +                     uint32_t                          cmd_flags,
20289 +                     uint16_t                          token,
20290 +                     const struct dpni_link_cfg        *cfg);
20291 +
20292 +/**
20293 + * struct dpni_link_state - Structure representing DPNI link state
20294 + * @rate: Rate
20295 + * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
20296 + * @up: Link state; '0' for down, '1' for up
20297 + */
20298 +struct dpni_link_state {
20299 +       uint32_t        rate;
20300 +       uint64_t        options;
20301 +       int             up;
20302 +};
20303 +
20304 +/**
20305 + * dpni_get_link_state() - Return the link state (either up or down)
20306 + * @mc_io:     Pointer to MC portal's I/O object
20307 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20308 + * @token:     Token of DPNI object
20309 + * @state:     Returned link state;
20310 + *
20311 + * Return:     '0' on Success; Error code otherwise.
20312 + */
20313 +int dpni_get_link_state(struct fsl_mc_io       *mc_io,
20314 +                       uint32_t                cmd_flags,
20315 +                       uint16_t                token,
20316 +                       struct dpni_link_state  *state);
20317 +
20318 +/**
20319 + * struct dpni_tx_shaping - Structure representing DPNI tx shaping configuration
20320 + * @rate_limit: rate in Mbps
20321 + * @max_burst_size: burst size in bytes (up to 64KB)
20322 + */
20323 +struct dpni_tx_shaping_cfg {
20324 +       uint32_t rate_limit;
20325 +       uint16_t max_burst_size;
20326 +};
20327 +
20328 +/**
20329 + * dpni_set_tx_shaping() - Set the transmit shaping
20330 + * @mc_io:     Pointer to MC portal's I/O object
20331 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20332 + * @token:     Token of DPNI object
20333 + * @tx_shaper:  tx shaping configuration
20334 + *
20335 + * Return:     '0' on Success; Error code otherwise.
20336 + */
20337 +int dpni_set_tx_shaping(struct fsl_mc_io                       *mc_io,
20338 +                       uint32_t                                cmd_flags,
20339 +                       uint16_t                                token,
20340 +                       const struct dpni_tx_shaping_cfg        *tx_shaper);
20341 +
20342 +/**
20343 + * dpni_set_max_frame_length() - Set the maximum received frame length.
20344 + * @mc_io:     Pointer to MC portal's I/O object
20345 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20346 + * @token:     Token of DPNI object
20347 + * @max_frame_length:  Maximum received frame length (in
20348 + *                             bytes); frame is discarded if its
20349 + *                             length exceeds this value
20350 + *
20351 + * Return:     '0' on Success; Error code otherwise.
20352 + */
20353 +int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
20354 +                             uint32_t          cmd_flags,
20355 +                             uint16_t          token,
20356 +                             uint16_t          max_frame_length);
20357 +
20358 +/**
20359 + * dpni_get_max_frame_length() - Get the maximum received frame length.
20360 + * @mc_io:     Pointer to MC portal's I/O object
20361 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20362 + * @token:     Token of DPNI object
20363 + * @max_frame_length:  Maximum received frame length (in
20364 + *                             bytes); frame is discarded if its
20365 + *                             length exceeds this value
20366 + *
20367 + * Return:     '0' on Success; Error code otherwise.
20368 + */
20369 +int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
20370 +                             uint32_t          cmd_flags,
20371 +                             uint16_t          token,
20372 +                             uint16_t          *max_frame_length);
20373 +
20374 +/**
20375 + * dpni_set_mtu() - Set the MTU for the interface.
20376 + * @mc_io:     Pointer to MC portal's I/O object
20377 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20378 + * @token:     Token of DPNI object
20379 + * @mtu:       MTU length (in bytes)
20380 + *
20381 + * MTU determines the maximum fragment size for performing IP
20382 + * fragmentation on egress packets.
20383 + * Return:     '0' on Success; Error code otherwise.
20384 + */
20385 +int dpni_set_mtu(struct fsl_mc_io      *mc_io,
20386 +                uint32_t               cmd_flags,
20387 +                uint16_t               token,
20388 +                uint16_t               mtu);
20389 +
20390 +/**
20391 + * dpni_get_mtu() - Get the MTU.
20392 + * @mc_io:     Pointer to MC portal's I/O object
20393 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20394 + * @token:     Token of DPNI object
20395 + * @mtu:       Returned MTU length (in bytes)
20396 + *
20397 + * Return:     '0' on Success; Error code otherwise.
20398 + */
20399 +int dpni_get_mtu(struct fsl_mc_io      *mc_io,
20400 +                uint32_t               cmd_flags,
20401 +                uint16_t               token,
20402 +                uint16_t               *mtu);
20403 +
20404 +/**
20405 + * dpni_set_multicast_promisc() - Enable/disable multicast promiscuous mode
20406 + * @mc_io:     Pointer to MC portal's I/O object
20407 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20408 + * @token:     Token of DPNI object
20409 + * @en:                Set to '1' to enable; '0' to disable
20410 + *
20411 + * Return:     '0' on Success; Error code otherwise.
20412 + */
20413 +int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
20414 +                              uint32_t cmd_flags,
20415 +                              uint16_t         token,
20416 +                              int              en);
20417 +
20418 +/**
20419 + * dpni_get_multicast_promisc() - Get multicast promiscuous mode
20420 + * @mc_io:     Pointer to MC portal's I/O object
20421 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20422 + * @token:     Token of DPNI object
20423 + * @en:                Returns '1' if enabled; '0' otherwise
20424 + *
20425 + * Return:     '0' on Success; Error code otherwise.
20426 + */
20427 +int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
20428 +                              uint32_t cmd_flags,
20429 +                              uint16_t         token,
20430 +                              int              *en);
20431 +
20432 +/**
20433 + * dpni_set_unicast_promisc() - Enable/disable unicast promiscuous mode
20434 + * @mc_io:     Pointer to MC portal's I/O object
20435 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20436 + * @token:     Token of DPNI object
20437 + * @en:                Set to '1' to enable; '0' to disable
20438 + *
20439 + * Return:     '0' on Success; Error code otherwise.
20440 + */
20441 +int dpni_set_unicast_promisc(struct fsl_mc_io  *mc_io,
20442 +                            uint32_t           cmd_flags,
20443 +                            uint16_t           token,
20444 +                            int                en);
20445 +
20446 +/**
20447 + * dpni_get_unicast_promisc() - Get unicast promiscuous mode
20448 + * @mc_io:     Pointer to MC portal's I/O object
20449 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20450 + * @token:     Token of DPNI object
20451 + * @en:                Returns '1' if enabled; '0' otherwise
20452 + *
20453 + * Return:     '0' on Success; Error code otherwise.
20454 + */
20455 +int dpni_get_unicast_promisc(struct fsl_mc_io  *mc_io,
20456 +                            uint32_t           cmd_flags,
20457 +                            uint16_t           token,
20458 +                            int                *en);
20459 +
20460 +/**
20461 + * dpni_set_primary_mac_addr() - Set the primary MAC address
20462 + * @mc_io:     Pointer to MC portal's I/O object
20463 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20464 + * @token:     Token of DPNI object
20465 + * @mac_addr:  MAC address to set as primary address
20466 + *
20467 + * Return:     '0' on Success; Error code otherwise.
20468 + */
20469 +int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
20470 +                             uint32_t          cmd_flags,
20471 +                             uint16_t          token,
20472 +                             const uint8_t     mac_addr[6]);
20473 +
20474 +/**
20475 + * dpni_get_primary_mac_addr() - Get the primary MAC address
20476 + * @mc_io:     Pointer to MC portal's I/O object
20477 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20478 + * @token:     Token of DPNI object
20479 + * @mac_addr:  Returned MAC address
20480 + *
20481 + * Return:     '0' on Success; Error code otherwise.
20482 + */
20483 +int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
20484 +                             uint32_t          cmd_flags,
20485 +                             uint16_t          token,
20486 +                             uint8_t           mac_addr[6]);
20487 +
20488 +/**
20489 + * dpni_add_mac_addr() - Add MAC address filter
20490 + * @mc_io:     Pointer to MC portal's I/O object
20491 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20492 + * @token:     Token of DPNI object
20493 + * @mac_addr:  MAC address to add
20494 + *
20495 + * Return:     '0' on Success; Error code otherwise.
20496 + */
20497 +int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
20498 +                     uint32_t          cmd_flags,
20499 +                     uint16_t          token,
20500 +                     const uint8_t     mac_addr[6]);
20501 +
20502 +/**
20503 + * dpni_remove_mac_addr() - Remove MAC address filter
20504 + * @mc_io:     Pointer to MC portal's I/O object
20505 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20506 + * @token:     Token of DPNI object
20507 + * @mac_addr:  MAC address to remove
20508 + *
20509 + * Return:     '0' on Success; Error code otherwise.
20510 + */
20511 +int dpni_remove_mac_addr(struct fsl_mc_io      *mc_io,
20512 +                        uint32_t               cmd_flags,
20513 +                        uint16_t               token,
20514 +                        const uint8_t          mac_addr[6]);
20515 +
20516 +/**
20517 + * dpni_clear_mac_filters() - Clear all unicast and/or multicast MAC filters
20518 + * @mc_io:     Pointer to MC portal's I/O object
20519 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20520 + * @token:     Token of DPNI object
20521 + * @unicast:   Set to '1' to clear unicast addresses
20522 + * @multicast: Set to '1' to clear multicast addresses
20523 + *
20524 + * The primary MAC address is not cleared by this operation.
20525 + *
20526 + * Return:     '0' on Success; Error code otherwise.
20527 + */
20528 +int dpni_clear_mac_filters(struct fsl_mc_io    *mc_io,
20529 +                          uint32_t             cmd_flags,
20530 +                          uint16_t             token,
20531 +                          int                  unicast,
20532 +                          int                  multicast);
20533 +
20534 +/**
20535 + * dpni_set_vlan_filters() - Enable/disable VLAN filtering mode
20536 + * @mc_io:     Pointer to MC portal's I/O object
20537 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20538 + * @token:     Token of DPNI object
20539 + * @en:                Set to '1' to enable; '0' to disable
20540 + *
20541 + * Return:     '0' on Success; Error code otherwise.
20542 + */
20543 +int dpni_set_vlan_filters(struct fsl_mc_io     *mc_io,
20544 +                         uint32_t              cmd_flags,
20545 +                         uint16_t              token,
20546 +                         int                   en);
20547 +
20548 +/**
20549 + * dpni_add_vlan_id() - Add VLAN ID filter
20550 + * @mc_io:     Pointer to MC portal's I/O object
20551 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20552 + * @token:     Token of DPNI object
20553 + * @vlan_id:   VLAN ID to add
20554 + *
20555 + * Return:     '0' on Success; Error code otherwise.
20556 + */
20557 +int dpni_add_vlan_id(struct fsl_mc_io  *mc_io,
20558 +                    uint32_t           cmd_flags,
20559 +                    uint16_t           token,
20560 +                    uint16_t           vlan_id);
20561 +
20562 +/**
20563 + * dpni_remove_vlan_id() - Remove VLAN ID filter
20564 + * @mc_io:     Pointer to MC portal's I/O object
20565 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20566 + * @token:     Token of DPNI object
20567 + * @vlan_id:   VLAN ID to remove
20568 + *
20569 + * Return:     '0' on Success; Error code otherwise.
20570 + */
20571 +int dpni_remove_vlan_id(struct fsl_mc_io       *mc_io,
20572 +                       uint32_t                cmd_flags,
20573 +                       uint16_t                token,
20574 +                       uint16_t                vlan_id);
20575 +
20576 +/**
20577 + * dpni_clear_vlan_filters() - Clear all VLAN filters
20578 + * @mc_io:     Pointer to MC portal's I/O object
20579 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20580 + * @token:     Token of DPNI object
20581 + *
20582 + * Return:     '0' on Success; Error code otherwise.
20583 + */
20584 +int dpni_clear_vlan_filters(struct fsl_mc_io   *mc_io,
20585 +                           uint32_t            cmd_flags,
20586 +                           uint16_t            token);
20587 +
20588 +/**
20589 + * enum dpni_tx_schedule_mode - DPNI Tx scheduling mode
20590 + * @DPNI_TX_SCHED_STRICT_PRIORITY: strict priority
20591 + * @DPNI_TX_SCHED_WEIGHTED: weighted based scheduling
20592 + */
20593 +enum dpni_tx_schedule_mode {
20594 +       DPNI_TX_SCHED_STRICT_PRIORITY,
20595 +       DPNI_TX_SCHED_WEIGHTED,
20596 +};
20597 +
20598 +/**
20599 + * struct dpni_tx_schedule_cfg - Structure representing Tx
20600 + *     scheduling configuration
20601 + * @mode: scheduling mode
20602 + * @delta_bandwidth: Bandwidth represented in weights from 100 to 10000;
20603 + *     not applicable for 'strict-priority' mode;
20604 + */
20605 +struct dpni_tx_schedule_cfg {
20606 +       enum dpni_tx_schedule_mode      mode;
20607 +       uint16_t                delta_bandwidth;
20608 +};
20609 +
20610 +/**
20611 + * struct dpni_tx_selection_cfg - Structure representing transmission
20612 + *     selection configuration
20613 + * @tc_sched: an array of traffic-classes
20614 + */
20615 +struct dpni_tx_selection_cfg {
20616 +       struct dpni_tx_schedule_cfg tc_sched[DPNI_MAX_TC];
20617 +};
20618 +
20619 +/**
20620 + * dpni_set_tx_selection() - Set transmission selection configuration
20621 + * @mc_io:     Pointer to MC portal's I/O object
20622 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20623 + * @token:     Token of DPNI object
20624 + * @cfg:       transmission selection configuration
20625 + *
20626 + * warning:    Allowed only when DPNI is disabled
20627 + *
20628 + * Return:     '0' on Success; Error code otherwise.
20629 + */
20630 +int dpni_set_tx_selection(struct fsl_mc_io                     *mc_io,
20631 +                         uint32_t                              cmd_flags,
20632 +                         uint16_t                              token,
20633 +                         const struct dpni_tx_selection_cfg    *cfg);
20634 +
20635 +/**
20636 + * enum dpni_dist_mode - DPNI distribution mode
20637 + * @DPNI_DIST_MODE_NONE: No distribution
20638 + * @DPNI_DIST_MODE_HASH: Use hash distribution; only relevant if
20639 + *             the 'DPNI_OPT_DIST_HASH' option was set at DPNI creation
20640 + * @DPNI_DIST_MODE_FS:  Use explicit flow steering; only relevant if
20641 + *      the 'DPNI_OPT_DIST_FS' option was set at DPNI creation
20642 + */
20643 +enum dpni_dist_mode {
20644 +       DPNI_DIST_MODE_NONE = 0,
20645 +       DPNI_DIST_MODE_HASH = 1,
20646 +       DPNI_DIST_MODE_FS = 2
20647 +};
20648 +
20649 +/**
20650 + * enum dpni_fs_miss_action -   DPNI Flow Steering miss action
20651 + * @DPNI_FS_MISS_DROP: In case of no-match, drop the frame
20652 + * @DPNI_FS_MISS_EXPLICIT_FLOWID: In case of no-match, use explicit flow-id
20653 + * @DPNI_FS_MISS_HASH: In case of no-match, distribute using hash
20654 + */
20655 +enum dpni_fs_miss_action {
20656 +       DPNI_FS_MISS_DROP = 0,
20657 +       DPNI_FS_MISS_EXPLICIT_FLOWID = 1,
20658 +       DPNI_FS_MISS_HASH = 2
20659 +};
20660 +
20661 +/**
20662 + * struct dpni_fs_tbl_cfg - Flow Steering table configuration
20663 + * @miss_action: Miss action selection
20664 + * @default_flow_id: Used when 'miss_action = DPNI_FS_MISS_EXPLICIT_FLOWID'
20665 + */
20666 +struct dpni_fs_tbl_cfg {
20667 +       enum dpni_fs_miss_action        miss_action;
20668 +       uint16_t                        default_flow_id;
20669 +};
20670 +
20671 +/**
20672 + * dpni_prepare_key_cfg() - function prepare extract parameters
20673 + * @cfg: defining a full Key Generation profile (rule)
20674 + * @key_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
20675 + *
20676 + * This function has to be called before the following functions:
20677 + *     - dpni_set_rx_tc_dist()
20678 + *             - dpni_set_qos_table()
20679 + */
20680 +int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
20681 +                        uint8_t                        *key_cfg_buf);
20682 +
20683 +/**
20684 + * struct dpni_rx_tc_dist_cfg - Rx traffic class distribution configuration
20685 + * @dist_size: Set the distribution size;
20686 + *     supported values: 1,2,3,4,6,7,8,12,14,16,24,28,32,48,56,64,96,
20687 + *     112,128,192,224,256,384,448,512,768,896,1024
20688 + * @dist_mode: Distribution mode
20689 + * @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with
20690 + *             the extractions to be used for the distribution key by calling
20691 + *             dpni_prepare_key_cfg() relevant only when
20692 + *             'dist_mode != DPNI_DIST_MODE_NONE', otherwise it can be '0'
20693 + * @fs_cfg: Flow Steering table configuration; only relevant if
20694 + *             'dist_mode = DPNI_DIST_MODE_FS'
20695 + */
20696 +struct dpni_rx_tc_dist_cfg {
20697 +       uint16_t                dist_size;
20698 +       enum dpni_dist_mode     dist_mode;
20699 +       uint64_t                key_cfg_iova;
20700 +       struct dpni_fs_tbl_cfg  fs_cfg;
20701 +};
20702 +
20703 +/**
20704 + * dpni_set_rx_tc_dist() - Set Rx traffic class distribution configuration
20705 + * @mc_io:     Pointer to MC portal's I/O object
20706 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20707 + * @token:     Token of DPNI object
20708 + * @tc_id:     Traffic class selection (0-7)
20709 + * @cfg:       Traffic class distribution configuration
20710 + *
20711 + * warning: if 'dist_mode != DPNI_DIST_MODE_NONE', call dpni_prepare_key_cfg()
20712 + *                     first to prepare the key_cfg_iova parameter
20713 + *
20714 + * Return:     '0' on Success; error code otherwise.
20715 + */
20716 +int dpni_set_rx_tc_dist(struct fsl_mc_io                       *mc_io,
20717 +                       uint32_t                                cmd_flags,
20718 +                       uint16_t                                token,
20719 +                       uint8_t                                 tc_id,
20720 +                       const struct dpni_rx_tc_dist_cfg        *cfg);
20721 +
20722 +/**
20723 + * Set to select color aware mode (otherwise - color blind)
20724 + */
20725 +#define DPNI_POLICER_OPT_COLOR_AWARE   0x00000001
20726 +/**
20727 + * Set to discard frame with RED color
20728 + */
20729 +#define DPNI_POLICER_OPT_DISCARD_RED   0x00000002
20730 +
20731 +/**
20732 + * enum dpni_policer_mode - selecting the policer mode
20733 + * @DPNI_POLICER_MODE_NONE: Policer is disabled
20734 + * @DPNI_POLICER_MODE_PASS_THROUGH: Policer pass through
20735 + * @DPNI_POLICER_MODE_RFC_2698: Policer algorithm RFC 2698
20736 + * @DPNI_POLICER_MODE_RFC_4115: Policer algorithm RFC 4115
20737 + */
20738 +enum dpni_policer_mode {
20739 +       DPNI_POLICER_MODE_NONE = 0,
20740 +       DPNI_POLICER_MODE_PASS_THROUGH,
20741 +       DPNI_POLICER_MODE_RFC_2698,
20742 +       DPNI_POLICER_MODE_RFC_4115
20743 +};
20744 +
20745 +/**
20746 + * enum dpni_policer_unit - DPNI policer units
20747 + * @DPNI_POLICER_UNIT_BYTES: bytes units
20748 + * @DPNI_POLICER_UNIT_FRAMES: frames units
20749 + */
20750 +enum dpni_policer_unit {
20751 +       DPNI_POLICER_UNIT_BYTES = 0,
20752 +       DPNI_POLICER_UNIT_FRAMES
20753 +};
20754 +
20755 +/**
20756 + * enum dpni_policer_color - selecting the policer color
20757 + * @DPNI_POLICER_COLOR_GREEN: Green color
20758 + * @DPNI_POLICER_COLOR_YELLOW: Yellow color
20759 + * @DPNI_POLICER_COLOR_RED: Red color
20760 + */
20761 +enum dpni_policer_color {
20762 +       DPNI_POLICER_COLOR_GREEN = 0,
20763 +       DPNI_POLICER_COLOR_YELLOW,
20764 +       DPNI_POLICER_COLOR_RED
20765 +};
20766 +
20767 +/**
20768 + * struct dpni_rx_tc_policing_cfg - Policer configuration
20769 + * @options: Mask of available options; use 'DPNI_POLICER_OPT_<X>' values
20770 + * @mode: policer mode
20771 + * @default_color: For pass-through mode the policer re-colors with this
20772 + *     color any incoming packets. For Color aware non-pass-through mode:
20773 + *     policer re-colors with this color all packets with FD[DROPP]>2.
20774 + * @units: Bytes or Packets
20775 + * @cir: Committed information rate (CIR) in Kbps or packets/second
20776 + * @cbs: Committed burst size (CBS) in bytes or packets
20777 + * @eir: Peak information rate (PIR, rfc2698) in Kbps or packets/second
20778 + *      Excess information rate (EIR, rfc4115) in Kbps or packets/second
20779 + * @ebs: Peak burst size (PBS, rfc2698) in bytes or packets
20780 + *       Excess burst size (EBS, rfc4115) in bytes or packets
20781 + */
20782 +struct dpni_rx_tc_policing_cfg {
20783 +       uint32_t                options;
20784 +       enum dpni_policer_mode  mode;
20785 +       enum dpni_policer_unit  units;
20786 +       enum dpni_policer_color default_color;
20787 +       uint32_t                cir;
20788 +       uint32_t                cbs;
20789 +       uint32_t                eir;
20790 +       uint32_t                ebs;
20791 +};
20792 +
20793 +/**
20794 + * dpni_set_rx_tc_policing() - Set Rx traffic class policing configuration
20795 + * @mc_io:     Pointer to MC portal's I/O object
20796 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20797 + * @token:     Token of DPNI object
20798 + * @tc_id:     Traffic class selection (0-7)
20799 + * @cfg:       Traffic class policing configuration
20800 + *
20801 + * Return:     '0' on Success; error code otherwise.
20802 + */
20803 +int dpni_set_rx_tc_policing(struct fsl_mc_io                   *mc_io,
20804 +                           uint32_t                            cmd_flags,
20805 +                           uint16_t                            token,
20806 +                           uint8_t                             tc_id,
20807 +                           const struct dpni_rx_tc_policing_cfg *cfg);
20808 +
20809 +/**
20810 + * dpni_get_rx_tc_policing() - Get Rx traffic class policing configuration
20811 + * @mc_io:     Pointer to MC portal's I/O object
20812 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20813 + * @token:     Token of DPNI object
20814 + * @tc_id:     Traffic class selection (0-7)
20815 + * @cfg:       Traffic class policing configuration
20816 + *
20817 + * Return:     '0' on Success; error code otherwise.
20818 + */
20819 +int dpni_get_rx_tc_policing(struct fsl_mc_io                   *mc_io,
20820 +                           uint32_t                            cmd_flags,
20821 +                           uint16_t                            token,
20822 +                           uint8_t                             tc_id,
20823 +                           struct dpni_rx_tc_policing_cfg      *cfg);
20824 +
20825 +/**
20826 + * enum dpni_congestion_unit - DPNI congestion units
20827 + * @DPNI_CONGESTION_UNIT_BYTES: bytes units
20828 + * @DPNI_CONGESTION_UNIT_FRAMES: frames units
20829 + */
20830 +enum dpni_congestion_unit {
20831 +       DPNI_CONGESTION_UNIT_BYTES = 0,
20832 +       DPNI_CONGESTION_UNIT_FRAMES
20833 +};
20834 +
20835 +/**
20836 + * enum dpni_early_drop_mode - DPNI early drop mode
20837 + * @DPNI_EARLY_DROP_MODE_NONE: early drop is disabled
20838 + * @DPNI_EARLY_DROP_MODE_TAIL: early drop in taildrop mode
20839 + * @DPNI_EARLY_DROP_MODE_WRED: early drop in WRED mode
20840 + */
20841 +enum dpni_early_drop_mode {
20842 +       DPNI_EARLY_DROP_MODE_NONE = 0,
20843 +       DPNI_EARLY_DROP_MODE_TAIL,
20844 +       DPNI_EARLY_DROP_MODE_WRED
20845 +};
20846 +
20847 +/**
20848 + * struct dpni_wred_cfg - WRED configuration
20849 + * @max_threshold: maximum threshold that packets may be discarded. Above this
20850 + *       threshold all packets are discarded; must be less than 2^39;
20851 + *       approximated to be expressed as (x+256)*2^(y-1) due to HW
20852 + *       implementation.
20853 + * @min_threshold: minimum threshold that packets may be discarded at
20854 + * @drop_probability: probability that a packet will be discarded (1-100,
20855 + *                     associated with the max_threshold).
20856 + */
20857 +struct dpni_wred_cfg {
20858 +       uint64_t        max_threshold;
20859 +       uint64_t        min_threshold;
20860 +       uint8_t drop_probability;
20861 +};
20862 +
20863 +/**
20864 + * struct dpni_early_drop_cfg - early-drop configuration
20865 + * @mode: drop mode
20866 + * @units: units type
20867 + * @green: WRED - 'green' configuration
20868 + * @yellow: WRED - 'yellow' configuration
20869 + * @red: WRED - 'red' configuration
20870 + * @tail_drop_threshold: tail drop threshold
20871 + */
20872 +struct dpni_early_drop_cfg {
20873 +       enum dpni_early_drop_mode       mode;
20874 +       enum dpni_congestion_unit       units;
20875 +
20876 +       struct dpni_wred_cfg            green;
20877 +       struct dpni_wred_cfg            yellow;
20878 +       struct dpni_wred_cfg            red;
20879 +
20880 +       uint32_t                        tail_drop_threshold;
20881 +};
20882 +
20883 +/**
20884 + * dpni_prepare_early_drop() - prepare an early drop.
20885 + * @cfg: Early-drop configuration
20886 + * @early_drop_buf: Zeroed 256 bytes of memory before mapping it to DMA
20887 + *
20888 + * This function has to be called before dpni_set_rx_tc_early_drop or
20889 + * dpni_set_tx_tc_early_drop
20890 + *
20891 + */
20892 +void dpni_prepare_early_drop(const struct dpni_early_drop_cfg *cfg,
20893 +                            uint8_t    *early_drop_buf);
20894 +
20895 +/**
20896 + * dpni_extract_early_drop() - extract the early drop configuration.
20897 + * @cfg: Early-drop configuration
20898 + * @early_drop_buf: Zeroed 256 bytes of memory before mapping it to DMA
20899 + *
20900 + * This function has to be called after dpni_get_rx_tc_early_drop or
20901 + * dpni_get_tx_tc_early_drop
20902 + *
20903 + */
20904 +void dpni_extract_early_drop(struct dpni_early_drop_cfg *cfg,
20905 +                            const uint8_t *early_drop_buf);
20906 +
20907 +/**
20908 + * dpni_set_rx_tc_early_drop() - Set Rx traffic class early-drop configuration
20909 + * @mc_io:     Pointer to MC portal's I/O object
20910 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20911 + * @token:     Token of DPNI object
20912 + * @tc_id:     Traffic class selection (0-7)
20913 + * @early_drop_iova:  I/O virtual address of 256 bytes DMA-able memory filled
20914 + *     with the early-drop configuration by calling dpni_prepare_early_drop()
20915 + *
20916 + * warning: Before calling this function, call dpni_prepare_early_drop() to
20917 + *                     prepare the early_drop_iova parameter
20918 + *
20919 + * Return:     '0' on Success; error code otherwise.
20920 + */
20921 +int dpni_set_rx_tc_early_drop(struct fsl_mc_io *mc_io,
20922 +                             uint32_t          cmd_flags,
20923 +                             uint16_t          token,
20924 +                             uint8_t           tc_id,
20925 +                             uint64_t          early_drop_iova);
20926 +
20927 +/**
20928 + * dpni_get_rx_tc_early_drop() - Get Rx traffic class early-drop configuration
20929 + * @mc_io:     Pointer to MC portal's I/O object
20930 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20931 + * @token:     Token of DPNI object
20932 + * @tc_id:     Traffic class selection (0-7)
20933 + * @early_drop_iova:  I/O virtual address of 256 bytes DMA-able memory
20934 + *
20935 + * warning: After calling this function, call dpni_extract_early_drop() to
20936 + *     get the early drop configuration
20937 + *
20938 + * Return:     '0' on Success; error code otherwise.
20939 + */
20940 +int dpni_get_rx_tc_early_drop(struct fsl_mc_io *mc_io,
20941 +                             uint32_t          cmd_flags,
20942 +                             uint16_t          token,
20943 +                             uint8_t           tc_id,
20944 +                             uint64_t          early_drop_iova);
20945 +
20946 +/**
20947 + * dpni_set_tx_tc_early_drop() - Set Tx traffic class early-drop configuration
20948 + * @mc_io:     Pointer to MC portal's I/O object
20949 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20950 + * @token:     Token of DPNI object
20951 + * @tc_id:     Traffic class selection (0-7)
20952 + * @early_drop_iova:  I/O virtual address of 256 bytes DMA-able memory filled
20953 + *     with the early-drop configuration by calling dpni_prepare_early_drop()
20954 + *
20955 + * warning: Before calling this function, call dpni_prepare_early_drop() to
20956 + *                     prepare the early_drop_iova parameter
20957 + *
20958 + * Return:     '0' on Success; error code otherwise.
20959 + */
20960 +int dpni_set_tx_tc_early_drop(struct fsl_mc_io *mc_io,
20961 +                             uint32_t          cmd_flags,
20962 +                             uint16_t          token,
20963 +                             uint8_t           tc_id,
20964 +                             uint64_t          early_drop_iova);
20965 +
20966 +/**
20967 + * dpni_get_tx_tc_early_drop() - Get Tx traffic class early-drop configuration
20968 + * @mc_io:     Pointer to MC portal's I/O object
20969 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20970 + * @token:     Token of DPNI object
20971 + * @tc_id:     Traffic class selection (0-7)
20972 + * @early_drop_iova:  I/O virtual address of 256 bytes DMA-able memory
20973 + *
20974 + * warning: After calling this function, call dpni_extract_early_drop() to
20975 + *     get the early drop configuration
20976 + *
20977 + * Return:     '0' on Success; error code otherwise.
20978 + */
20979 +int dpni_get_tx_tc_early_drop(struct fsl_mc_io *mc_io,
20980 +                             uint32_t          cmd_flags,
20981 +                             uint16_t          token,
20982 +                             uint8_t           tc_id,
20983 +                             uint64_t          early_drop_iova);
20984 +
20985 +/**
20986 + * enum dpni_dest - DPNI destination types
20987 + * @DPNI_DEST_NONE: Unassigned destination; The queue is set in parked mode and
20988 + *             does not generate FQDAN notifications; user is expected to
20989 + *             dequeue from the queue based on polling or other user-defined
20990 + *             method
20991 + * @DPNI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN
20992 + *             notifications to the specified DPIO; user is expected to dequeue
20993 + *             from the queue only after notification is received
20994 + * @DPNI_DEST_DPCON: The queue is set in schedule mode and does not generate
20995 + *             FQDAN notifications, but is connected to the specified DPCON
20996 + *             object; user is expected to dequeue from the DPCON channel
20997 + */
20998 +enum dpni_dest {
20999 +       DPNI_DEST_NONE = 0,
21000 +       DPNI_DEST_DPIO = 1,
21001 +       DPNI_DEST_DPCON = 2
21002 +};
21003 +
21004 +/**
21005 + * struct dpni_dest_cfg - Structure representing DPNI destination parameters
21006 + * @dest_type: Destination type
21007 + * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
21008 + * @priority: Priority selection within the DPIO or DPCON channel; valid values
21009 + *             are 0-1 or 0-7, depending on the number of priorities in that
21010 + *             channel; not relevant for 'DPNI_DEST_NONE' option
21011 + */
21012 +struct dpni_dest_cfg {
21013 +       enum dpni_dest  dest_type;
21014 +       int             dest_id;
21015 +       uint8_t priority;
21016 +};
21017 +
21018 +/* DPNI congestion options */
21019 +
21020 +/**
21021 + * CSCN message is written to message_iova once entering a
21022 + * congestion state (see 'threshold_entry')
21023 + */
21024 +#define DPNI_CONG_OPT_WRITE_MEM_ON_ENTER       0x00000001
21025 +/**
21026 + * CSCN message is written to message_iova once exiting a
21027 + * congestion state (see 'threshold_exit')
21028 + */
21029 +#define DPNI_CONG_OPT_WRITE_MEM_ON_EXIT                0x00000002
21030 +/**
21031 + * CSCN write will attempt to allocate into a cache (coherent write);
21032 + * valid only if 'DPNI_CONG_OPT_WRITE_MEM_<X>' is selected
21033 + */
21034 +#define DPNI_CONG_OPT_COHERENT_WRITE           0x00000004
21035 +/**
21036 + * if 'dest_cfg.dest_type != DPNI_DEST_NONE' CSCN message is sent to
21037 + * DPIO/DPCON's WQ channel once entering a congestion state
21038 + * (see 'threshold_entry')
21039 + */
21040 +#define DPNI_CONG_OPT_NOTIFY_DEST_ON_ENTER     0x00000008
21041 +/**
21042 + * if 'dest_cfg.dest_type != DPNI_DEST_NONE' CSCN message is sent to
21043 + * DPIO/DPCON's WQ channel once exiting a congestion state
21044 + * (see 'threshold_exit')
21045 + */
21046 +#define DPNI_CONG_OPT_NOTIFY_DEST_ON_EXIT      0x00000010
21047 +/**
21048 + * if 'dest_cfg.dest_type != DPNI_DEST_NONE' when the CSCN is written to the
21049 + * sw-portal's DQRR, the DQRI interrupt is asserted immediately (if enabled)
21050 + */
21051 +#define DPNI_CONG_OPT_INTR_COALESCING_DISABLED 0x00000020
21052 +
21053 +/**
21054 + * struct dpni_congestion_notification_cfg - congestion notification
21055 + *             configuration
21056 + * @units: units type
21057 + * @threshold_entry: above this threshold we enter a congestion state.
21058 + *     set it to '0' to disable it
21059 + * @threshold_exit: below this threshold we exit the congestion state.
21060 + * @message_ctx: The context that will be part of the CSCN message
21061 + * @message_iova: I/O virtual address (must be in DMA-able memory),
21062 + *     must be 16B aligned; valid only if 'DPNI_CONG_OPT_WRITE_MEM_<X>' is
21063 + *     contained in 'options'
21064 + * @dest_cfg: CSCN can be send to either DPIO or DPCON WQ channel
21065 + * @options: Mask of available options; use 'DPNI_CONG_OPT_<X>' values
21066 + */
21067 +
21068 +struct dpni_congestion_notification_cfg {
21069 +       enum dpni_congestion_unit       units;
21070 +       uint32_t        threshold_entry;
21071 +       uint32_t        threshold_exit;
21072 +       uint64_t        message_ctx;
21073 +       uint64_t        message_iova;
21074 +       struct dpni_dest_cfg dest_cfg;
21075 +       uint16_t        options;
21076 +};
21077 +
21078 +/**
21079 + * dpni_set_rx_tc_congestion_notification() - Set Rx traffic class congestion
21080 + *     notification configuration
21081 + * @mc_io:     Pointer to MC portal's I/O object
21082 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21083 + * @token:     Token of DPNI object
21084 + * @tc_id:     Traffic class selection (0-7)
21085 + * @cfg:       congestion notification configuration
21086 + *
21087 + * Return:     '0' on Success; error code otherwise.
21088 + */
21089 +int dpni_set_rx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
21090 +                                          uint32_t             cmd_flags,
21091 +                                          uint16_t             token,
21092 +                                          uint8_t              tc_id,
21093 +                       const struct dpni_congestion_notification_cfg *cfg);
21094 +
21095 +/**
21096 + * dpni_get_rx_tc_congestion_notification() - Get Rx traffic class congestion
21097 + *     notification configuration
21098 + * @mc_io:     Pointer to MC portal's I/O object
21099 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21100 + * @token:     Token of DPNI object
21101 + * @tc_id:     Traffic class selection (0-7)
21102 + * @cfg:       congestion notification configuration
21103 + *
21104 + * Return:     '0' on Success; error code otherwise.
21105 + */
21106 +int dpni_get_rx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
21107 +                                          uint32_t             cmd_flags,
21108 +                                          uint16_t             token,
21109 +                                          uint8_t              tc_id,
21110 +                               struct dpni_congestion_notification_cfg *cfg);
21111 +
21112 +/**
21113 + * dpni_set_tx_tc_congestion_notification() - Set Tx traffic class congestion
21114 + *     notification configuration
21115 + * @mc_io:     Pointer to MC portal's I/O object
21116 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21117 + * @token:     Token of DPNI object
21118 + * @tc_id:     Traffic class selection (0-7)
21119 + * @cfg:       congestion notification configuration
21120 + *
21121 + * Return:     '0' on Success; error code otherwise.
21122 + */
21123 +int dpni_set_tx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
21124 +                                          uint32_t             cmd_flags,
21125 +                                          uint16_t             token,
21126 +                                          uint8_t              tc_id,
21127 +                       const struct dpni_congestion_notification_cfg *cfg);
21128 +
21129 +/**
21130 + * dpni_get_tx_tc_congestion_notification() - Get Tx traffic class congestion
21131 + *     notification configuration
21132 + * @mc_io:     Pointer to MC portal's I/O object
21133 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21134 + * @token:     Token of DPNI object
21135 + * @tc_id:     Traffic class selection (0-7)
21136 + * @cfg:       congestion notification configuration
21137 + *
21138 + * Return:     '0' on Success; error code otherwise.
21139 + */
21140 +int dpni_get_tx_tc_congestion_notification(struct fsl_mc_io    *mc_io,
21141 +                                          uint32_t             cmd_flags,
21142 +                                          uint16_t             token,
21143 +                                          uint8_t              tc_id,
21144 +                               struct dpni_congestion_notification_cfg *cfg);
21145 +
21146 +/**
21147 + * enum dpni_flc_type - DPNI FLC types
21148 + * @DPNI_FLC_USER_DEFINED: select the FLC to be used for user defined value
21149 + * @DPNI_FLC_STASH: select the FLC to be used for stash control
21150 + */
21151 +enum dpni_flc_type {
21152 +       DPNI_FLC_USER_DEFINED = 0,
21153 +       DPNI_FLC_STASH = 1,
21154 +};
21155 +
21156 +/**
21157 + * enum dpni_stash_size - DPNI FLC stashing size
21158 + * @DPNI_STASH_SIZE_0B: no stash
21159 + * @DPNI_STASH_SIZE_64B: stashes 64 bytes
21160 + * @DPNI_STASH_SIZE_128B: stashes 128 bytes
21161 + * @DPNI_STASH_SIZE_192B: stashes 192 bytes
21162 + */
21163 +enum dpni_stash_size {
21164 +       DPNI_STASH_SIZE_0B = 0,
21165 +       DPNI_STASH_SIZE_64B = 1,
21166 +       DPNI_STASH_SIZE_128B = 2,
21167 +       DPNI_STASH_SIZE_192B = 3,
21168 +};
21169 +
21170 +/* DPNI FLC stash options */
21171 +
21172 +/**
21173 + * stashes the whole annotation area (up to 192 bytes)
21174 + */
21175 +#define DPNI_FLC_STASH_FRAME_ANNOTATION        0x00000001
21176 +
21177 +/**
21178 + * struct dpni_flc_cfg - Structure representing DPNI FLC configuration
21179 + * @flc_type: FLC type
21180 + * @options: Mask of available options;
21181 + *     use 'DPNI_FLC_STASH_<X>' values
21182 + * @frame_data_size: Size of frame data to be stashed
21183 + * @flow_context_size: Size of flow context to be stashed
21184 + * @flow_context: 1. In case flc_type is 'DPNI_FLC_USER_DEFINED':
21185 + *                     this value will be provided in the frame descriptor
21186 + *                     (FD[FLC])
21187 + *               2. In case flc_type is 'DPNI_FLC_STASH':
21188 + *                     this value will be I/O virtual address of the
21189 + *                     flow-context;
21190 + *                     Must be cacheline-aligned and DMA-able memory
21191 + */
21192 +struct dpni_flc_cfg {
21193 +       enum dpni_flc_type      flc_type;
21194 +       uint32_t                options;
21195 +       enum dpni_stash_size    frame_data_size;
21196 +       enum dpni_stash_size    flow_context_size;
21197 +       uint64_t                flow_context;
21198 +};
21199 +
21200 +/**
21201 + * DPNI queue modification options
21202 + */
21203 +
21204 +/**
21205 + * Select to modify the user's context associated with the queue
21206 + */
21207 +#define DPNI_QUEUE_OPT_USER_CTX                0x00000001
21208 +/**
21209 + * Select to modify the queue's destination
21210 + */
21211 +#define DPNI_QUEUE_OPT_DEST            0x00000002
21212 +/** Select to modify the flow-context parameters;
21213 + * not applicable for Tx-conf/Err queues as the FD comes from the user
21214 + */
21215 +#define DPNI_QUEUE_OPT_FLC             0x00000004
21216 +/**
21217 + * Select to modify the queue's order preservation
21218 + */
21219 +#define DPNI_QUEUE_OPT_ORDER_PRESERVATION 0x00000008
21220 +/* Select to modify the queue's tail-drop threshold */
21221 +#define DPNI_QUEUE_OPT_TAILDROP_THRESHOLD 0x00000010
21222 +
21223 +/**
21224 + * struct dpni_queue_cfg - Structure representing queue configuration
21225 + * @options: Flags representing the suggested modifications to the queue;
21226 + *             Use any combination of 'DPNI_QUEUE_OPT_<X>' flags
21227 + * @user_ctx: User context value provided in the frame descriptor of each
21228 + *             dequeued frame; valid only if 'DPNI_QUEUE_OPT_USER_CTX'
21229 + *             is contained in 'options'
21230 + * @dest_cfg: Queue destination parameters;
21231 + *             valid only if 'DPNI_QUEUE_OPT_DEST' is contained in 'options'
21232 + * @flc_cfg: Flow context configuration; in case the TC's distribution
21233 + *             is either NONE or HASH the FLC's settings of flow#0 are used.
21234 + *             in the case of FS (flow-steering) the flow's FLC settings
21235 + *             are used.
21236 + *             valid only if 'DPNI_QUEUE_OPT_FLC' is contained in 'options'
21237 + * @order_preservation_en: enable/disable order preservation;
21238 + *             valid only if 'DPNI_QUEUE_OPT_ORDER_PRESERVATION' is contained
21239 + *             in 'options'
21240 + * @tail_drop_threshold: set the queue's tail drop threshold in bytes;
21241 + *             '0' value disable the threshold; maximum value is 0xE000000;
21242 + *             valid only if 'DPNI_QUEUE_OPT_TAILDROP_THRESHOLD' is contained
21243 + *             in 'options'
21244 + */
21245 +struct dpni_queue_cfg {
21246 +       uint32_t                options;
21247 +       uint64_t                user_ctx;
21248 +       struct dpni_dest_cfg    dest_cfg;
21249 +       struct dpni_flc_cfg     flc_cfg;
21250 +       int                     order_preservation_en;
21251 +       uint32_t                tail_drop_threshold;
21252 +};
21253 +
21254 +/**
21255 + * struct dpni_queue_attr - Structure representing queue attributes
21256 + * @user_ctx: User context value provided in the frame descriptor of each
21257 + *     dequeued frame
21258 + * @dest_cfg: Queue destination configuration
21259 + * @flc_cfg: Flow context configuration
21260 + * @order_preservation_en: enable/disable order preservation
21261 + * @tail_drop_threshold: queue's tail drop threshold in bytes;
21262 + * @fqid: Virtual fqid value to be used for dequeue operations
21263 + */
21264 +struct dpni_queue_attr {
21265 +       uint64_t                user_ctx;
21266 +       struct dpni_dest_cfg    dest_cfg;
21267 +       struct dpni_flc_cfg     flc_cfg;
21268 +       int                     order_preservation_en;
21269 +       uint32_t                tail_drop_threshold;
21270 +
21271 +       uint32_t                fqid;
21272 +};
21273 +
21274 +/**
21275 + * DPNI Tx flow modification options
21276 + */
21277 +
21278 +/**
21279 + * Select to modify the settings for dedicate Tx confirmation/error
21280 + */
21281 +#define DPNI_TX_FLOW_OPT_TX_CONF_ERROR 0x00000001
21282 +/**
21283 + * Select to modify the L3 checksum generation setting
21284 + */
21285 +#define DPNI_TX_FLOW_OPT_L3_CHKSUM_GEN 0x00000010
21286 +/**
21287 + * Select to modify the L4 checksum generation setting
21288 + */
21289 +#define DPNI_TX_FLOW_OPT_L4_CHKSUM_GEN 0x00000020
21290 +
21291 +/**
21292 + * struct dpni_tx_flow_cfg - Structure representing Tx flow configuration
21293 + * @options: Flags representing the suggested modifications to the Tx flow;
21294 + *     Use any combination 'DPNI_TX_FLOW_OPT_<X>' flags
21295 + * @use_common_tx_conf_queue: Set to '1' to use the common (default) Tx
21296 + *     confirmation and error queue; Set to '0' to use the private
21297 + *     Tx confirmation and error queue; valid only if
21298 + *     'DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED' wasn't set at DPNI creation
21299 + *     and 'DPNI_TX_FLOW_OPT_TX_CONF_ERROR' is contained in 'options'
21300 + * @l3_chksum_gen: Set to '1' to enable L3 checksum generation; '0' to disable;
21301 + *     valid only if 'DPNI_TX_FLOW_OPT_L3_CHKSUM_GEN' is contained in 'options'
21302 + * @l4_chksum_gen: Set to '1' to enable L4 checksum generation; '0' to disable;
21303 + *     valid only if 'DPNI_TX_FLOW_OPT_L4_CHKSUM_GEN' is contained in 'options'
21304 + */
21305 +struct dpni_tx_flow_cfg {
21306 +       uint32_t        options;
21307 +       int             use_common_tx_conf_queue;
21308 +       int             l3_chksum_gen;
21309 +       int             l4_chksum_gen;
21310 +};
21311 +
21312 +/**
21313 + * dpni_set_tx_flow() - Set Tx flow configuration
21314 + * @mc_io:     Pointer to MC portal's I/O object
21315 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21316 + * @token:     Token of DPNI object
21317 + * @flow_id:   Provides (or returns) the sender's flow ID;
21318 + *     for each new sender set (*flow_id) to 'DPNI_NEW_FLOW_ID' to generate
21319 + *     a new flow_id;  this ID should be used as the QDBIN argument
21320 + *     in enqueue operations
21321 + * @cfg:       Tx flow configuration
21322 + *
21323 + * Return:     '0' on Success; Error code otherwise.
21324 + */
21325 +int dpni_set_tx_flow(struct fsl_mc_io                  *mc_io,
21326 +                    uint32_t                           cmd_flags,
21327 +                    uint16_t                           token,
21328 +                    uint16_t                           *flow_id,
21329 +                    const struct dpni_tx_flow_cfg      *cfg);
21330 +
21331 +/**
21332 + * struct dpni_tx_flow_attr - Structure representing Tx flow attributes
21333 + * @use_common_tx_conf_queue: '1' if using common (default) Tx confirmation and
21334 + *     error queue; '0' if using private Tx confirmation and error queue
21335 + * @l3_chksum_gen: '1' if L3 checksum generation is enabled; '0' if disabled
21336 + * @l4_chksum_gen: '1' if L4 checksum generation is enabled; '0' if disabled
21337 + */
21338 +struct dpni_tx_flow_attr {
21339 +       int     use_common_tx_conf_queue;
21340 +       int     l3_chksum_gen;
21341 +       int     l4_chksum_gen;
21342 +};
21343 +
21344 +/**
21345 + * dpni_get_tx_flow() - Get Tx flow attributes
21346 + * @mc_io:     Pointer to MC portal's I/O object
21347 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21348 + * @token:     Token of DPNI object
21349 + * @flow_id:   The sender's flow ID, as returned by the
21350 + *     dpni_set_tx_flow() function
21351 + * @attr:      Returned Tx flow attributes
21352 + *
21353 + * Return:     '0' on Success; Error code otherwise.
21354 + */
21355 +int dpni_get_tx_flow(struct fsl_mc_io          *mc_io,
21356 +                    uint32_t                   cmd_flags,
21357 +                    uint16_t                   token,
21358 +                    uint16_t                   flow_id,
21359 +                    struct dpni_tx_flow_attr   *attr);
21360 +
21361 +/**
21362 + * struct dpni_tx_conf_cfg - Structure representing Tx conf configuration
21363 + * @errors_only: Set to '1' to report back only error frames;
21364 + *     Set to '0' to confirm transmission/error for all transmitted frames;
21365 + * @queue_cfg: Queue configuration
21366 + */
21367 +struct dpni_tx_conf_cfg {
21368 +       int                     errors_only;
21369 +       struct dpni_queue_cfg   queue_cfg;
21370 +};
21371 +
21372 +/**
21373 + * dpni_set_tx_conf() - Set Tx confirmation and error queue configuration
21374 + * @mc_io:     Pointer to MC portal's I/O object
21375 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21376 + * @token:     Token of DPNI object
21377 + * @flow_id:   The sender's flow ID, as returned by the
21378 + *     dpni_set_tx_flow() function;
21379 + *     use 'DPNI_COMMON_TX_CONF' for common tx-conf
21380 + * @cfg:       Queue configuration
21381 + *
21382 + * If either 'DPNI_OPT_TX_CONF_DISABLED' or
21383 + * 'DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED' were selected at DPNI creation,
21384 + * this function can ONLY be used with 'flow_id == DPNI_COMMON_TX_CONF';
21385 + * i.e. only serve the common tx-conf-err queue;
21386 + * if 'DPNI_OPT_TX_CONF_DISABLED' was selected, only error frames are reported
21387 + * back - successfully transmitted frames are not confirmed. Otherwise, all
21388 + * transmitted frames are sent for confirmation.
21389 + *
21390 + * Return:     '0' on Success; Error code otherwise.
21391 + */
21392 +int dpni_set_tx_conf(struct fsl_mc_io  *mc_io,
21393 +                    uint32_t           cmd_flags,
21394 +                    uint16_t           token,
21395 +                    uint16_t           flow_id,
21396 +                    const struct dpni_tx_conf_cfg      *cfg);
21397 +
21398 +/**
21399 + * struct dpni_tx_conf_attr - Structure representing Tx conf attributes
21400 + * @errors_only: '1' if only error frames are reported back; '0' if all
21401 + *             transmitted frames are confirmed
21402 + * @queue_attr: Queue attributes
21403 + */
21404 +struct dpni_tx_conf_attr {
21405 +       int                     errors_only;
21406 +       struct dpni_queue_attr  queue_attr;
21407 +};
21408 +
21409 +/**
21410 + * dpni_get_tx_conf() - Get Tx confirmation and error queue attributes
21411 + * @mc_io:     Pointer to MC portal's I/O object
21412 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21413 + * @token:     Token of DPNI object
21414 + * @flow_id:   The sender's flow ID, as returned by the
21415 + *     dpni_set_tx_flow() function;
21416 + *     use 'DPNI_COMMON_TX_CONF' for common tx-conf
21417 + * @attr:      Returned tx-conf attributes
21418 + *
21419 + * If either 'DPNI_OPT_TX_CONF_DISABLED' or
21420 + * 'DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED' were selected at DPNI creation,
21421 + * this function can ONLY be used with 'flow_id == DPNI_COMMON_TX_CONF';
21422 + * i.e. only serve the common tx-conf-err queue;
21423 + *
21424 + * Return:     '0' on Success; Error code otherwise.
21425 + */
21426 +int dpni_get_tx_conf(struct fsl_mc_io  *mc_io,
21427 +                    uint32_t           cmd_flags,
21428 +                    uint16_t           token,
21429 +                    uint16_t           flow_id,
21430 +                    struct dpni_tx_conf_attr   *attr);
21431 +
21432 +/**
21433 + * dpni_set_tx_conf_congestion_notification() - Set Tx conf congestion
21434 + *     notification configuration
21435 + * @mc_io:     Pointer to MC portal's I/O object
21436 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21437 + * @token:     Token of DPNI object
21438 + * @flow_id:   The sender's flow ID, as returned by the
21439 + *     dpni_set_tx_flow() function;
21440 + *     use 'DPNI_COMMON_TX_CONF' for common tx-conf
21441 + * @cfg:       congestion notification configuration
21442 + *
21443 + * If either 'DPNI_OPT_TX_CONF_DISABLED' or
21444 + * 'DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED' were selected at DPNI creation,
21445 + * this function can ONLY be used with 'flow_id == DPNI_COMMON_TX_CONF';
21446 + * i.e. only serve the common tx-conf-err queue;
21447 + *
21448 + * Return:     '0' on Success; error code otherwise.
21449 + */
21450 +int dpni_set_tx_conf_congestion_notification(struct fsl_mc_io  *mc_io,
21451 +                                            uint32_t           cmd_flags,
21452 +                                            uint16_t           token,
21453 +                                            uint16_t           flow_id,
21454 +                       const struct dpni_congestion_notification_cfg *cfg);
21455 +
21456 +/**
21457 + * dpni_get_tx_conf_congestion_notification() - Get Tx conf congestion
21458 + *     notification configuration
21459 + * @mc_io:     Pointer to MC portal's I/O object
21460 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21461 + * @token:     Token of DPNI object
21462 + * @flow_id:   The sender's flow ID, as returned by the
21463 + *     dpni_set_tx_flow() function;
21464 + *     use 'DPNI_COMMON_TX_CONF' for common tx-conf
21465 + * @cfg:       congestion notification
21466 + *
21467 + * If either 'DPNI_OPT_TX_CONF_DISABLED' or
21468 + * 'DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED' were selected at DPNI creation,
21469 + * this function can ONLY be used with 'flow_id == DPNI_COMMON_TX_CONF';
21470 + * i.e. only serve the common tx-conf-err queue;
21471 + *
21472 + * Return:     '0' on Success; error code otherwise.
21473 + */
21474 +int dpni_get_tx_conf_congestion_notification(struct fsl_mc_io  *mc_io,
21475 +                                            uint32_t           cmd_flags,
21476 +                                            uint16_t           token,
21477 +                                            uint16_t           flow_id,
21478 +                               struct dpni_congestion_notification_cfg *cfg);
21479 +
21480 +/**
21481 + * dpni_set_tx_conf_revoke() - Tx confirmation revocation
21482 + * @mc_io:     Pointer to MC portal's I/O object
21483 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21484 + * @token:     Token of DPNI object
21485 + * @revoke:    revoke or not
21486 + *
21487 + * This function is useful only when 'DPNI_OPT_TX_CONF_DISABLED' is not
21488 + * selected at DPNI creation.
21489 + * Calling this function with 'revoke' set to '1' disables all transmit
21490 + * confirmation (including the private confirmation queues), regardless of
21491 + * previous settings; Note that in this case, Tx error frames are still
21492 + * enqueued to the general transmit errors queue.
21493 + * Calling this function with 'revoke' set to '0' restores the previous
21494 + * settings for both general and private transmit confirmation.
21495 + *
21496 + * Return:     '0' on Success; Error code otherwise.
21497 + */
21498 +int dpni_set_tx_conf_revoke(struct fsl_mc_io           *mc_io,
21499 +                           uint32_t                    cmd_flags,
21500 +                           uint16_t                    token,
21501 +                           int                 revoke);
21502 +
21503 +/**
21504 + * dpni_set_rx_flow() - Set Rx flow configuration
21505 + * @mc_io:     Pointer to MC portal's I/O object
21506 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21507 + * @token:     Token of DPNI object
21508 + * @tc_id:     Traffic class selection (0-7);
21509 + *                     use 'DPNI_ALL_TCS' to set all TCs and all flows
21510 + * @flow_id:   Rx flow id within the traffic class; use
21511 + *                     'DPNI_ALL_TC_FLOWS' to set all flows within
21512 + *                     this tc_id; ignored if tc_id is set to
21513 + *                     'DPNI_ALL_TCS';
21514 + * @cfg:       Rx flow configuration
21515 + *
21516 + * Return:     '0' on Success; Error code otherwise.
21517 + */
21518 +int dpni_set_rx_flow(struct fsl_mc_io                  *mc_io,
21519 +                    uint32_t                           cmd_flags,
21520 +                    uint16_t                           token,
21521 +                    uint8_t                            tc_id,
21522 +                    uint16_t                           flow_id,
21523 +                    const struct dpni_queue_cfg        *cfg);
21524 +
21525 +/**
21526 + * dpni_get_rx_flow() -        Get Rx flow attributes
21527 + * @mc_io:     Pointer to MC portal's I/O object
21528 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21529 + * @token:     Token of DPNI object
21530 + * @tc_id:     Traffic class selection (0-7)
21531 + * @flow_id:   Rx flow id within the traffic class
21532 + * @attr:      Returned Rx flow attributes
21533 + *
21534 + * Return:     '0' on Success; Error code otherwise.
21535 + */
21536 +int dpni_get_rx_flow(struct fsl_mc_io          *mc_io,
21537 +                    uint32_t                   cmd_flags,
21538 +                    uint16_t                   token,
21539 +                    uint8_t                    tc_id,
21540 +                    uint16_t                   flow_id,
21541 +                    struct dpni_queue_attr     *attr);
21542 +
21543 +/**
21544 + * dpni_set_rx_err_queue() - Set Rx error queue configuration
21545 + * @mc_io:     Pointer to MC portal's I/O object
21546 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21547 + * @token:     Token of DPNI object
21548 + * @cfg:       Queue configuration
21549 + *
21550 + * Return:     '0' on Success; Error code otherwise.
21551 + */
21552 +int dpni_set_rx_err_queue(struct fsl_mc_io             *mc_io,
21553 +                         uint32_t                      cmd_flags,
21554 +                         uint16_t                      token,
21555 +                         const struct dpni_queue_cfg   *cfg);
21556 +
21557 +/**
21558 + * dpni_get_rx_err_queue() - Get Rx error queue attributes
21559 + * @mc_io:     Pointer to MC portal's I/O object
21560 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21561 + * @token:     Token of DPNI object
21562 + * @attr:      Returned Queue attributes
21563 + *
21564 + * Return:     '0' on Success; Error code otherwise.
21565 + */
21566 +int dpni_get_rx_err_queue(struct fsl_mc_io             *mc_io,
21567 +                         uint32_t                      cmd_flags,
21568 +                         uint16_t                      token,
21569 +                         struct dpni_queue_attr        *attr);
21570 +
21571 +/**
21572 + * struct dpni_qos_tbl_cfg - Structure representing QOS table configuration
21573 + * @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with
21574 + *             key extractions to be used as the QoS criteria by calling
21575 + *             dpni_prepare_key_cfg()
21576 + * @discard_on_miss: Set to '1' to discard frames in case of no match (miss);
21577 + *             '0' to use the 'default_tc' in such cases
21578 + * @default_tc: Used in case of no-match and 'discard_on_miss'= 0
21579 + */
21580 +struct dpni_qos_tbl_cfg {
21581 +       uint64_t        key_cfg_iova;
21582 +       int             discard_on_miss;
21583 +       uint8_t default_tc;
21584 +};
21585 +
21586 +/**
21587 + * dpni_set_qos_table() - Set QoS mapping table
21588 + * @mc_io:     Pointer to MC portal's I/O object
21589 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21590 + * @token:     Token of DPNI object
21591 + * @cfg:       QoS table configuration
21592 + *
21593 + * This function and all QoS-related functions require that
21594 + *'max_tcs > 1' was set at DPNI creation.
21595 + *
21596 + * warning: Before calling this function, call dpni_prepare_key_cfg() to
21597 + *                     prepare the key_cfg_iova parameter
21598 + *
21599 + * Return:     '0' on Success; Error code otherwise.
21600 + */
21601 +int dpni_set_qos_table(struct fsl_mc_io                *mc_io,
21602 +                      uint32_t                 cmd_flags,
21603 +                      uint16_t                         token,
21604 +                      const struct dpni_qos_tbl_cfg    *cfg);
21605 +
21606 +/**
21607 + * struct dpni_rule_cfg - Rule configuration for table lookup
21608 + * @key_iova: I/O virtual address of the key (must be in DMA-able memory)
21609 + * @mask_iova: I/O virtual address of the mask (must be in DMA-able memory)
21610 + * @key_size: key and mask size (in bytes)
21611 + */
21612 +struct dpni_rule_cfg {
21613 +       uint64_t        key_iova;
21614 +       uint64_t        mask_iova;
21615 +       uint8_t key_size;
21616 +};
21617 +
21618 +/**
21619 + * dpni_add_qos_entry() - Add QoS mapping entry (to select a traffic class)
21620 + * @mc_io:     Pointer to MC portal's I/O object
21621 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21622 + * @token:     Token of DPNI object
21623 + * @cfg:       QoS rule to add
21624 + * @tc_id:     Traffic class selection (0-7)
21625 + *
21626 + * Return:     '0' on Success; Error code otherwise.
21627 + */
21628 +int dpni_add_qos_entry(struct fsl_mc_io                *mc_io,
21629 +                      uint32_t                 cmd_flags,
21630 +                      uint16_t                         token,
21631 +                      const struct dpni_rule_cfg       *cfg,
21632 +                      uint8_t                          tc_id);
21633 +
21634 +/**
21635 + * dpni_remove_qos_entry() - Remove QoS mapping entry
21636 + * @mc_io:     Pointer to MC portal's I/O object
21637 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21638 + * @token:     Token of DPNI object
21639 + * @cfg:       QoS rule to remove
21640 + *
21641 + * Return:     '0' on Success; Error code otherwise.
21642 + */
21643 +int dpni_remove_qos_entry(struct fsl_mc_io             *mc_io,
21644 +                         uint32_t                      cmd_flags,
21645 +                         uint16_t                      token,
21646 +                         const struct dpni_rule_cfg    *cfg);
21647 +
21648 +/**
21649 + * dpni_clear_qos_table() - Clear all QoS mapping entries
21650 + * @mc_io:     Pointer to MC portal's I/O object
21651 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21652 + * @token:     Token of DPNI object
21653 + *
21654 + * Following this function call, all frames are directed to
21655 + * the default traffic class (0)
21656 + *
21657 + * Return:     '0' on Success; Error code otherwise.
21658 + */
21659 +int dpni_clear_qos_table(struct fsl_mc_io      *mc_io,
21660 +                        uint32_t               cmd_flags,
21661 +                        uint16_t               token);
21662 +
21663 +/**
21664 + * dpni_add_fs_entry() - Add Flow Steering entry for a specific traffic class
21665 + *                     (to select a flow ID)
21666 + * @mc_io:     Pointer to MC portal's I/O object
21667 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21668 + * @token:     Token of DPNI object
21669 + * @tc_id:     Traffic class selection (0-7)
21670 + * @cfg:       Flow steering rule to add
21671 + * @flow_id:   Flow id selection (must be smaller than the
21672 + *                     distribution size of the traffic class)
21673 + *
21674 + * Return:     '0' on Success; Error code otherwise.
21675 + */
21676 +int dpni_add_fs_entry(struct fsl_mc_io                 *mc_io,
21677 +                     uint32_t                          cmd_flags,
21678 +                     uint16_t                          token,
21679 +                     uint8_t                           tc_id,
21680 +                     const struct dpni_rule_cfg        *cfg,
21681 +                     uint16_t                          flow_id);
21682 +
21683 +/**
21684 + * dpni_remove_fs_entry() - Remove Flow Steering entry from a specific
21685 + *                     traffic class
21686 + * @mc_io:     Pointer to MC portal's I/O object
21687 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21688 + * @token:     Token of DPNI object
21689 + * @tc_id:     Traffic class selection (0-7)
21690 + * @cfg:       Flow steering rule to remove
21691 + *
21692 + * Return:     '0' on Success; Error code otherwise.
21693 + */
21694 +int dpni_remove_fs_entry(struct fsl_mc_io              *mc_io,
21695 +                        uint32_t                       cmd_flags,
21696 +                        uint16_t                       token,
21697 +                        uint8_t                        tc_id,
21698 +                        const struct dpni_rule_cfg     *cfg);
21699 +
21700 +/**
21701 + * dpni_clear_fs_entries() - Clear all Flow Steering entries of a specific
21702 + *                     traffic class
21703 + * @mc_io:     Pointer to MC portal's I/O object
21704 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21705 + * @token:     Token of DPNI object
21706 + * @tc_id:     Traffic class selection (0-7)
21707 + *
21708 + * Return:     '0' on Success; Error code otherwise.
21709 + */
21710 +int dpni_clear_fs_entries(struct fsl_mc_io     *mc_io,
21711 +                         uint32_t              cmd_flags,
21712 +                         uint16_t              token,
21713 +                         uint8_t               tc_id);
21714 +
21715 +/**
21716 + * dpni_set_vlan_insertion() - Enable/disable VLAN insertion for egress frames
21717 + * @mc_io:     Pointer to MC portal's I/O object
21718 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21719 + * @token:     Token of DPNI object
21720 + * @en:                Set to '1' to enable; '0' to disable
21721 + *
21722 + * Requires that the 'DPNI_OPT_VLAN_MANIPULATION' option is set
21723 + * at DPNI creation.
21724 + *
21725 + * Return:     '0' on Success; Error code otherwise.
21726 + */
21727 +int dpni_set_vlan_insertion(struct fsl_mc_io   *mc_io,
21728 +                           uint32_t            cmd_flags,
21729 +                           uint16_t            token,
21730 +                           int         en);
21731 +
21732 +/**
21733 + * dpni_set_vlan_removal() - Enable/disable VLAN removal for ingress frames
21734 + * @mc_io:     Pointer to MC portal's I/O object
21735 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21736 + * @token:     Token of DPNI object
21737 + * @en:                Set to '1' to enable; '0' to disable
21738 + *
21739 + * Requires that the 'DPNI_OPT_VLAN_MANIPULATION' option is set
21740 + * at DPNI creation.
21741 + *
21742 + * Return:     '0' on Success; Error code otherwise.
21743 + */
21744 +int dpni_set_vlan_removal(struct fsl_mc_io     *mc_io,
21745 +                         uint32_t              cmd_flags,
21746 +                         uint16_t              token,
21747 +                         int                   en);
21748 +
21749 +/**
21750 + * dpni_set_ipr() - Enable/disable IP reassembly of ingress frames
21751 + * @mc_io:     Pointer to MC portal's I/O object
21752 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21753 + * @token:     Token of DPNI object
21754 + * @en:                Set to '1' to enable; '0' to disable
21755 + *
21756 + * Requires that the 'DPNI_OPT_IPR' option is set at DPNI creation.
21757 + *
21758 + * Return:     '0' on Success; Error code otherwise.
21759 + */
21760 +int dpni_set_ipr(struct fsl_mc_io      *mc_io,
21761 +                uint32_t               cmd_flags,
21762 +                uint16_t               token,
21763 +                int                    en);
21764 +
21765 +/**
21766 + * dpni_set_ipf() - Enable/disable IP fragmentation of egress frames
21767 + * @mc_io:     Pointer to MC portal's I/O object
21768 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21769 + * @token:     Token of DPNI object
21770 + * @en:                Set to '1' to enable; '0' to disable
21771 + *
21772 + * Requires that the 'DPNI_OPT_IPF' option is set at DPNI
21773 + * creation. Fragmentation is performed according to MTU value
21774 + * set by dpni_set_mtu() function
21775 + *
21776 + * Return:     '0' on Success; Error code otherwise.
21777 + */
21778 +int dpni_set_ipf(struct fsl_mc_io      *mc_io,
21779 +                uint32_t               cmd_flags,
21780 +                uint16_t               token,
21781 +                int                    en);
21782 +
21783 +#endif /* __FSL_DPNI_H */
21784 diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
21785 new file mode 100644
21786 index 0000000..c0f8af0
21787 --- /dev/null
21788 +++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
21789 @@ -0,0 +1,1058 @@
21790 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
21791 + *
21792 + * Redistribution and use in source and binary forms, with or without
21793 + * modification, are permitted provided that the following conditions are met:
21794 + * * Redistributions of source code must retain the above copyright
21795 + * notice, this list of conditions and the following disclaimer.
21796 + * * Redistributions in binary form must reproduce the above copyright
21797 + * notice, this list of conditions and the following disclaimer in the
21798 + * documentation and/or other materials provided with the distribution.
21799 + * * Neither the name of the above-listed copyright holders nor the
21800 + * names of any contributors may be used to endorse or promote products
21801 + * derived from this software without specific prior written permission.
21802 + *
21803 + *
21804 + * ALTERNATIVELY, this software may be distributed under the terms of the
21805 + * GNU General Public License ("GPL") as published by the Free Software
21806 + * Foundation, either version 2 of that License or (at your option) any
21807 + * later version.
21808 + *
21809 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21810 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21811 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21812 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
21813 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21814 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21815 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
21816 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
21817 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
21818 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
21819 + * POSSIBILITY OF SUCH DAMAGE.
21820 + */
21821 +#ifndef _FSL_DPNI_CMD_H
21822 +#define _FSL_DPNI_CMD_H
21823 +
21824 +/* DPNI Version */
21825 +#define DPNI_VER_MAJOR                         6
21826 +#define DPNI_VER_MINOR                         0
21827 +
21828 +/* Command IDs */
21829 +#define DPNI_CMDID_OPEN                                0x801
21830 +#define DPNI_CMDID_CLOSE                       0x800
21831 +#define DPNI_CMDID_CREATE                      0x901
21832 +#define DPNI_CMDID_DESTROY                     0x900
21833 +
21834 +#define DPNI_CMDID_ENABLE                      0x002
21835 +#define DPNI_CMDID_DISABLE                     0x003
21836 +#define DPNI_CMDID_GET_ATTR                    0x004
21837 +#define DPNI_CMDID_RESET                       0x005
21838 +#define DPNI_CMDID_IS_ENABLED                  0x006
21839 +
21840 +#define DPNI_CMDID_SET_IRQ                     0x010
21841 +#define DPNI_CMDID_GET_IRQ                     0x011
21842 +#define DPNI_CMDID_SET_IRQ_ENABLE              0x012
21843 +#define DPNI_CMDID_GET_IRQ_ENABLE              0x013
21844 +#define DPNI_CMDID_SET_IRQ_MASK                        0x014
21845 +#define DPNI_CMDID_GET_IRQ_MASK                        0x015
21846 +#define DPNI_CMDID_GET_IRQ_STATUS              0x016
21847 +#define DPNI_CMDID_CLEAR_IRQ_STATUS            0x017
21848 +
21849 +#define DPNI_CMDID_SET_POOLS                   0x200
21850 +#define DPNI_CMDID_GET_RX_BUFFER_LAYOUT                0x201
21851 +#define DPNI_CMDID_SET_RX_BUFFER_LAYOUT                0x202
21852 +#define DPNI_CMDID_GET_TX_BUFFER_LAYOUT                0x203
21853 +#define DPNI_CMDID_SET_TX_BUFFER_LAYOUT                0x204
21854 +#define DPNI_CMDID_SET_TX_CONF_BUFFER_LAYOUT   0x205
21855 +#define DPNI_CMDID_GET_TX_CONF_BUFFER_LAYOUT   0x206
21856 +#define DPNI_CMDID_SET_L3_CHKSUM_VALIDATION    0x207
21857 +#define DPNI_CMDID_GET_L3_CHKSUM_VALIDATION    0x208
21858 +#define DPNI_CMDID_SET_L4_CHKSUM_VALIDATION    0x209
21859 +#define DPNI_CMDID_GET_L4_CHKSUM_VALIDATION    0x20A
21860 +#define DPNI_CMDID_SET_ERRORS_BEHAVIOR         0x20B
21861 +#define DPNI_CMDID_SET_TX_CONF_REVOKE          0x20C
21862 +
21863 +#define DPNI_CMDID_GET_QDID                    0x210
21864 +#define DPNI_CMDID_GET_SP_INFO                 0x211
21865 +#define DPNI_CMDID_GET_TX_DATA_OFFSET          0x212
21866 +#define DPNI_CMDID_GET_COUNTER                 0x213
21867 +#define DPNI_CMDID_SET_COUNTER                 0x214
21868 +#define DPNI_CMDID_GET_LINK_STATE              0x215
21869 +#define DPNI_CMDID_SET_MAX_FRAME_LENGTH                0x216
21870 +#define DPNI_CMDID_GET_MAX_FRAME_LENGTH                0x217
21871 +#define DPNI_CMDID_SET_MTU                     0x218
21872 +#define DPNI_CMDID_GET_MTU                     0x219
21873 +#define DPNI_CMDID_SET_LINK_CFG                        0x21A
21874 +#define DPNI_CMDID_SET_TX_SHAPING              0x21B
21875 +
21876 +#define DPNI_CMDID_SET_MCAST_PROMISC           0x220
21877 +#define DPNI_CMDID_GET_MCAST_PROMISC           0x221
21878 +#define DPNI_CMDID_SET_UNICAST_PROMISC         0x222
21879 +#define DPNI_CMDID_GET_UNICAST_PROMISC         0x223
21880 +#define DPNI_CMDID_SET_PRIM_MAC                        0x224
21881 +#define DPNI_CMDID_GET_PRIM_MAC                        0x225
21882 +#define DPNI_CMDID_ADD_MAC_ADDR                        0x226
21883 +#define DPNI_CMDID_REMOVE_MAC_ADDR             0x227
21884 +#define DPNI_CMDID_CLR_MAC_FILTERS             0x228
21885 +
21886 +#define DPNI_CMDID_SET_VLAN_FILTERS            0x230
21887 +#define DPNI_CMDID_ADD_VLAN_ID                 0x231
21888 +#define DPNI_CMDID_REMOVE_VLAN_ID              0x232
21889 +#define DPNI_CMDID_CLR_VLAN_FILTERS            0x233
21890 +
21891 +#define DPNI_CMDID_SET_RX_TC_DIST              0x235
21892 +#define DPNI_CMDID_SET_TX_FLOW                 0x236
21893 +#define DPNI_CMDID_GET_TX_FLOW                 0x237
21894 +#define DPNI_CMDID_SET_RX_FLOW                 0x238
21895 +#define DPNI_CMDID_GET_RX_FLOW                 0x239
21896 +#define DPNI_CMDID_SET_RX_ERR_QUEUE            0x23A
21897 +#define DPNI_CMDID_GET_RX_ERR_QUEUE            0x23B
21898 +
21899 +#define DPNI_CMDID_SET_RX_TC_POLICING          0x23E
21900 +#define DPNI_CMDID_SET_RX_TC_EARLY_DROP                0x23F
21901 +
21902 +#define DPNI_CMDID_SET_QOS_TBL                 0x240
21903 +#define DPNI_CMDID_ADD_QOS_ENT                 0x241
21904 +#define DPNI_CMDID_REMOVE_QOS_ENT              0x242
21905 +#define DPNI_CMDID_CLR_QOS_TBL                 0x243
21906 +#define DPNI_CMDID_ADD_FS_ENT                  0x244
21907 +#define DPNI_CMDID_REMOVE_FS_ENT               0x245
21908 +#define DPNI_CMDID_CLR_FS_ENT                  0x246
21909 +#define DPNI_CMDID_SET_VLAN_INSERTION          0x247
21910 +#define DPNI_CMDID_SET_VLAN_REMOVAL            0x248
21911 +#define DPNI_CMDID_SET_IPR                     0x249
21912 +#define DPNI_CMDID_SET_IPF                     0x24A
21913 +
21914 +#define DPNI_CMDID_SET_TX_SELECTION                    0x250
21915 +#define DPNI_CMDID_GET_RX_TC_POLICING          0x251
21916 +#define DPNI_CMDID_GET_RX_TC_EARLY_DROP                0x252
21917 +#define DPNI_CMDID_SET_RX_TC_CONGESTION_NOTIFICATION 0x253
21918 +#define DPNI_CMDID_GET_RX_TC_CONGESTION_NOTIFICATION 0x254
21919 +#define DPNI_CMDID_SET_TX_TC_CONGESTION_NOTIFICATION 0x255
21920 +#define DPNI_CMDID_GET_TX_TC_CONGESTION_NOTIFICATION 0x256
21921 +#define DPNI_CMDID_SET_TX_CONF                                         0x257
21922 +#define DPNI_CMDID_GET_TX_CONF                                         0x258
21923 +#define DPNI_CMDID_SET_TX_CONF_CONGESTION_NOTIFICATION 0x259
21924 +#define DPNI_CMDID_GET_TX_CONF_CONGESTION_NOTIFICATION 0x25A
21925 +#define DPNI_CMDID_SET_TX_TC_EARLY_DROP                                0x25B
21926 +#define DPNI_CMDID_GET_TX_TC_EARLY_DROP                                0x25C
21927 +
21928 +/*                cmd, param, offset, width, type, arg_name */
21929 +#define DPNI_CMD_OPEN(cmd, dpni_id) \
21930 +       MC_CMD_OP(cmd,   0,     0,      32,     int,    dpni_id)
21931 +
21932 +#define DPNI_PREP_EXTENDED_CFG(ext, cfg) \
21933 +do { \
21934 +       MC_PREP_OP(ext, 0, 0,   16, uint16_t, cfg->tc_cfg[0].max_dist); \
21935 +       MC_PREP_OP(ext, 0, 16,  16, uint16_t, cfg->tc_cfg[0].max_fs_entries); \
21936 +       MC_PREP_OP(ext, 0, 32,  16, uint16_t, cfg->tc_cfg[1].max_dist); \
21937 +       MC_PREP_OP(ext, 0, 48,  16, uint16_t, cfg->tc_cfg[1].max_fs_entries); \
21938 +       MC_PREP_OP(ext, 1, 0,   16, uint16_t, cfg->tc_cfg[2].max_dist); \
21939 +       MC_PREP_OP(ext, 1, 16,  16, uint16_t, cfg->tc_cfg[2].max_fs_entries); \
21940 +       MC_PREP_OP(ext, 1, 32,  16, uint16_t, cfg->tc_cfg[3].max_dist); \
21941 +       MC_PREP_OP(ext, 1, 48,  16, uint16_t, cfg->tc_cfg[3].max_fs_entries); \
21942 +       MC_PREP_OP(ext, 2, 0,   16, uint16_t, cfg->tc_cfg[4].max_dist); \
21943 +       MC_PREP_OP(ext, 2, 16,  16, uint16_t, cfg->tc_cfg[4].max_fs_entries); \
21944 +       MC_PREP_OP(ext, 2, 32,  16, uint16_t, cfg->tc_cfg[5].max_dist); \
21945 +       MC_PREP_OP(ext, 2, 48,  16, uint16_t, cfg->tc_cfg[5].max_fs_entries); \
21946 +       MC_PREP_OP(ext, 3, 0,   16, uint16_t, cfg->tc_cfg[6].max_dist); \
21947 +       MC_PREP_OP(ext, 3, 16,  16, uint16_t, cfg->tc_cfg[6].max_fs_entries); \
21948 +       MC_PREP_OP(ext, 3, 32,  16, uint16_t, cfg->tc_cfg[7].max_dist); \
21949 +       MC_PREP_OP(ext, 3, 48,  16, uint16_t, cfg->tc_cfg[7].max_fs_entries); \
21950 +       MC_PREP_OP(ext, 4, 0,   16, uint16_t, \
21951 +                  cfg->ipr_cfg.max_open_frames_ipv4); \
21952 +       MC_PREP_OP(ext, 4, 16,  16, uint16_t, \
21953 +                  cfg->ipr_cfg.max_open_frames_ipv6); \
21954 +       MC_PREP_OP(ext, 4, 32,  16, uint16_t, \
21955 +                  cfg->ipr_cfg.max_reass_frm_size); \
21956 +       MC_PREP_OP(ext, 5, 0,   16, uint16_t, \
21957 +                  cfg->ipr_cfg.min_frag_size_ipv4); \
21958 +       MC_PREP_OP(ext, 5, 16,  16, uint16_t, \
21959 +                  cfg->ipr_cfg.min_frag_size_ipv6); \
21960 +} while (0)
21961 +
21962 +#define DPNI_EXT_EXTENDED_CFG(ext, cfg) \
21963 +do { \
21964 +       MC_EXT_OP(ext, 0, 0,   16, uint16_t, cfg->tc_cfg[0].max_dist); \
21965 +       MC_EXT_OP(ext, 0, 16,  16, uint16_t, cfg->tc_cfg[0].max_fs_entries); \
21966 +       MC_EXT_OP(ext, 0, 32,  16, uint16_t, cfg->tc_cfg[1].max_dist); \
21967 +       MC_EXT_OP(ext, 0, 48,  16, uint16_t, cfg->tc_cfg[1].max_fs_entries); \
21968 +       MC_EXT_OP(ext, 1, 0,   16, uint16_t, cfg->tc_cfg[2].max_dist); \
21969 +       MC_EXT_OP(ext, 1, 16,  16, uint16_t, cfg->tc_cfg[2].max_fs_entries); \
21970 +       MC_EXT_OP(ext, 1, 32,  16, uint16_t, cfg->tc_cfg[3].max_dist); \
21971 +       MC_EXT_OP(ext, 1, 48,  16, uint16_t, cfg->tc_cfg[3].max_fs_entries); \
21972 +       MC_EXT_OP(ext, 2, 0,   16, uint16_t, cfg->tc_cfg[4].max_dist); \
21973 +       MC_EXT_OP(ext, 2, 16,  16, uint16_t, cfg->tc_cfg[4].max_fs_entries); \
21974 +       MC_EXT_OP(ext, 2, 32,  16, uint16_t, cfg->tc_cfg[5].max_dist); \
21975 +       MC_EXT_OP(ext, 2, 48,  16, uint16_t, cfg->tc_cfg[5].max_fs_entries); \
21976 +       MC_EXT_OP(ext, 3, 0,   16, uint16_t, cfg->tc_cfg[6].max_dist); \
21977 +       MC_EXT_OP(ext, 3, 16,  16, uint16_t, cfg->tc_cfg[6].max_fs_entries); \
21978 +       MC_EXT_OP(ext, 3, 32,  16, uint16_t, cfg->tc_cfg[7].max_dist); \
21979 +       MC_EXT_OP(ext, 3, 48,  16, uint16_t, cfg->tc_cfg[7].max_fs_entries); \
21980 +       MC_EXT_OP(ext, 4, 0,   16, uint16_t, \
21981 +                 cfg->ipr_cfg.max_open_frames_ipv4); \
21982 +       MC_EXT_OP(ext, 4, 16,  16, uint16_t, \
21983 +                 cfg->ipr_cfg.max_open_frames_ipv6); \
21984 +       MC_EXT_OP(ext, 4, 32,  16, uint16_t, \
21985 +                 cfg->ipr_cfg.max_reass_frm_size); \
21986 +       MC_EXT_OP(ext, 5, 0,   16, uint16_t, \
21987 +                 cfg->ipr_cfg.min_frag_size_ipv4); \
21988 +       MC_EXT_OP(ext, 5, 16,  16, uint16_t, \
21989 +                 cfg->ipr_cfg.min_frag_size_ipv6); \
21990 +} while (0)
21991 +
21992 +/*                cmd, param, offset, width, type, arg_name */
21993 +#define DPNI_CMD_CREATE(cmd, cfg) \
21994 +do { \
21995 +       MC_CMD_OP(cmd, 0, 0,    8,  uint8_t,  cfg->adv.max_tcs); \
21996 +       MC_CMD_OP(cmd, 0, 8,    8,  uint8_t,  cfg->adv.max_senders); \
21997 +       MC_CMD_OP(cmd, 0, 16,   8,  uint8_t,  cfg->mac_addr[5]); \
21998 +       MC_CMD_OP(cmd, 0, 24,   8,  uint8_t,  cfg->mac_addr[4]); \
21999 +       MC_CMD_OP(cmd, 0, 32,   8,  uint8_t,  cfg->mac_addr[3]); \
22000 +       MC_CMD_OP(cmd, 0, 40,   8,  uint8_t,  cfg->mac_addr[2]); \
22001 +       MC_CMD_OP(cmd, 0, 48,   8,  uint8_t,  cfg->mac_addr[1]); \
22002 +       MC_CMD_OP(cmd, 0, 56,   8,  uint8_t,  cfg->mac_addr[0]); \
22003 +       MC_CMD_OP(cmd, 1, 0,    32, uint32_t, cfg->adv.options); \
22004 +       MC_CMD_OP(cmd, 2, 0,    8,  uint8_t,  cfg->adv.max_unicast_filters); \
22005 +       MC_CMD_OP(cmd, 2, 8,    8,  uint8_t,  cfg->adv.max_multicast_filters); \
22006 +       MC_CMD_OP(cmd, 2, 16,   8,  uint8_t,  cfg->adv.max_vlan_filters); \
22007 +       MC_CMD_OP(cmd, 2, 24,   8,  uint8_t,  cfg->adv.max_qos_entries); \
22008 +       MC_CMD_OP(cmd, 2, 32,   8,  uint8_t,  cfg->adv.max_qos_key_size); \
22009 +       MC_CMD_OP(cmd, 2, 48,   8,  uint8_t,  cfg->adv.max_dist_key_size); \
22010 +       MC_CMD_OP(cmd, 2, 56,   8,  enum net_prot, cfg->adv.start_hdr); \
22011 +       MC_CMD_OP(cmd, 4, 48,   8,  uint8_t, cfg->adv.max_policers); \
22012 +       MC_CMD_OP(cmd, 4, 56,   8,  uint8_t, cfg->adv.max_congestion_ctrl); \
22013 +       MC_CMD_OP(cmd, 5, 0,    64, uint64_t, cfg->adv.ext_cfg_iova); \
22014 +} while (0)
22015 +
22016 +/*                cmd, param, offset, width, type, arg_name */
22017 +#define DPNI_CMD_SET_POOLS(cmd, cfg) \
22018 +do { \
22019 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->num_dpbp); \
22020 +       MC_CMD_OP(cmd, 0, 8,  1,  int,      cfg->pools[0].backup_pool); \
22021 +       MC_CMD_OP(cmd, 0, 9,  1,  int,      cfg->pools[1].backup_pool); \
22022 +       MC_CMD_OP(cmd, 0, 10, 1,  int,      cfg->pools[2].backup_pool); \
22023 +       MC_CMD_OP(cmd, 0, 11, 1,  int,      cfg->pools[3].backup_pool); \
22024 +       MC_CMD_OP(cmd, 0, 12, 1,  int,      cfg->pools[4].backup_pool); \
22025 +       MC_CMD_OP(cmd, 0, 13, 1,  int,      cfg->pools[5].backup_pool); \
22026 +       MC_CMD_OP(cmd, 0, 14, 1,  int,      cfg->pools[6].backup_pool); \
22027 +       MC_CMD_OP(cmd, 0, 15, 1,  int,      cfg->pools[7].backup_pool); \
22028 +       MC_CMD_OP(cmd, 0, 32, 32, int,      cfg->pools[0].dpbp_id); \
22029 +       MC_CMD_OP(cmd, 4, 32, 16, uint16_t, cfg->pools[0].buffer_size);\
22030 +       MC_CMD_OP(cmd, 1, 0,  32, int,      cfg->pools[1].dpbp_id); \
22031 +       MC_CMD_OP(cmd, 4, 48, 16, uint16_t, cfg->pools[1].buffer_size);\
22032 +       MC_CMD_OP(cmd, 1, 32, 32, int,      cfg->pools[2].dpbp_id); \
22033 +       MC_CMD_OP(cmd, 5, 0,  16, uint16_t, cfg->pools[2].buffer_size);\
22034 +       MC_CMD_OP(cmd, 2, 0,  32, int,      cfg->pools[3].dpbp_id); \
22035 +       MC_CMD_OP(cmd, 5, 16, 16, uint16_t, cfg->pools[3].buffer_size);\
22036 +       MC_CMD_OP(cmd, 2, 32, 32, int,      cfg->pools[4].dpbp_id); \
22037 +       MC_CMD_OP(cmd, 5, 32, 16, uint16_t, cfg->pools[4].buffer_size);\
22038 +       MC_CMD_OP(cmd, 3, 0,  32, int,      cfg->pools[5].dpbp_id); \
22039 +       MC_CMD_OP(cmd, 5, 48, 16, uint16_t, cfg->pools[5].buffer_size);\
22040 +       MC_CMD_OP(cmd, 3, 32, 32, int,      cfg->pools[6].dpbp_id); \
22041 +       MC_CMD_OP(cmd, 6, 0,  16, uint16_t, cfg->pools[6].buffer_size);\
22042 +       MC_CMD_OP(cmd, 4, 0,  32, int,      cfg->pools[7].dpbp_id); \
22043 +       MC_CMD_OP(cmd, 6, 16, 16, uint16_t, cfg->pools[7].buffer_size);\
22044 +} while (0)
22045 +
22046 +/*                cmd, param, offset, width, type, arg_name */
22047 +#define DPNI_RSP_IS_ENABLED(cmd, en) \
22048 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
22049 +
22050 +/*                cmd, param, offset, width, type, arg_name */
22051 +#define DPNI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
22052 +do { \
22053 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
22054 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
22055 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
22056 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
22057 +} while (0)
22058 +
22059 +/*                cmd, param, offset, width, type, arg_name */
22060 +#define DPNI_CMD_GET_IRQ(cmd, irq_index) \
22061 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
22062 +
22063 +/*                cmd, param, offset, width, type, arg_name */
22064 +#define DPNI_RSP_GET_IRQ(cmd, type, irq_cfg) \
22065 +do { \
22066 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
22067 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
22068 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
22069 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
22070 +} while (0)
22071 +
22072 +/*                cmd, param, offset, width, type, arg_name */
22073 +#define DPNI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
22074 +do { \
22075 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
22076 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
22077 +} while (0)
22078 +
22079 +/*                cmd, param, offset, width, type, arg_name */
22080 +#define DPNI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
22081 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
22082 +
22083 +/*                cmd, param, offset, width, type, arg_name */
22084 +#define DPNI_RSP_GET_IRQ_ENABLE(cmd, en) \
22085 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
22086 +
22087 +/*                cmd, param, offset, width, type, arg_name */
22088 +#define DPNI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
22089 +do { \
22090 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
22091 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
22092 +} while (0)
22093 +
22094 +/*                cmd, param, offset, width, type, arg_name */
22095 +#define DPNI_CMD_GET_IRQ_MASK(cmd, irq_index) \
22096 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
22097 +
22098 +/*                cmd, param, offset, width, type, arg_name */
22099 +#define DPNI_RSP_GET_IRQ_MASK(cmd, mask) \
22100 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t,  mask)
22101 +
22102 +/*                cmd, param, offset, width, type, arg_name */
22103 +#define DPNI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
22104 +do { \
22105 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
22106 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
22107 +} while (0)
22108 +
22109 +/*                cmd, param, offset, width, type, arg_name */
22110 +#define DPNI_RSP_GET_IRQ_STATUS(cmd, status) \
22111 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t,  status)
22112 +
22113 +/*                cmd, param, offset, width, type, arg_name */
22114 +#define DPNI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
22115 +do { \
22116 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
22117 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
22118 +} while (0)
22119 +
22120 +/*                cmd, param, offset, width, type, arg_name */
22121 +#define DPNI_CMD_GET_ATTR(cmd, attr) \
22122 +       MC_CMD_OP(cmd, 6, 0,  64, uint64_t, attr->ext_cfg_iova)
22123 +
22124 +/*                cmd, param, offset, width, type, arg_name */
22125 +#define DPNI_RSP_GET_ATTR(cmd, attr) \
22126 +do { \
22127 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id);\
22128 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->max_tcs); \
22129 +       MC_RSP_OP(cmd, 0, 40, 8,  uint8_t,  attr->max_senders); \
22130 +       MC_RSP_OP(cmd, 0, 48, 8,  enum net_prot, attr->start_hdr); \
22131 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, attr->options); \
22132 +       MC_RSP_OP(cmd, 2, 0,  8,  uint8_t,  attr->max_unicast_filters); \
22133 +       MC_RSP_OP(cmd, 2, 8,  8,  uint8_t,  attr->max_multicast_filters);\
22134 +       MC_RSP_OP(cmd, 2, 16, 8,  uint8_t,  attr->max_vlan_filters); \
22135 +       MC_RSP_OP(cmd, 2, 24, 8,  uint8_t,  attr->max_qos_entries); \
22136 +       MC_RSP_OP(cmd, 2, 32, 8,  uint8_t,  attr->max_qos_key_size); \
22137 +       MC_RSP_OP(cmd, 2, 40, 8,  uint8_t,  attr->max_dist_key_size); \
22138 +       MC_RSP_OP(cmd, 4, 48, 8,  uint8_t, attr->max_policers); \
22139 +       MC_RSP_OP(cmd, 4, 56, 8,  uint8_t, attr->max_congestion_ctrl); \
22140 +       MC_RSP_OP(cmd, 5, 32, 16, uint16_t, attr->version.major);\
22141 +       MC_RSP_OP(cmd, 5, 48, 16, uint16_t, attr->version.minor);\
22142 +} while (0)
22143 +
22144 +/*                cmd, param, offset, width, type, arg_name */
22145 +#define DPNI_CMD_SET_ERRORS_BEHAVIOR(cmd, cfg) \
22146 +do { \
22147 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, cfg->errors); \
22148 +       MC_CMD_OP(cmd, 0, 32, 4,  enum dpni_error_action, cfg->error_action); \
22149 +       MC_CMD_OP(cmd, 0, 36, 1,  int,      cfg->set_frame_annotation); \
22150 +} while (0)
22151 +
22152 +/*                cmd, param, offset, width, type, arg_name */
22153 +#define DPNI_RSP_GET_RX_BUFFER_LAYOUT(cmd, layout) \
22154 +do { \
22155 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, layout->private_data_size); \
22156 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, layout->data_align); \
22157 +       MC_RSP_OP(cmd, 1, 0,  1,  int,      layout->pass_timestamp); \
22158 +       MC_RSP_OP(cmd, 1, 1,  1,  int,      layout->pass_parser_result); \
22159 +       MC_RSP_OP(cmd, 1, 2,  1,  int,      layout->pass_frame_status); \
22160 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, layout->data_head_room); \
22161 +       MC_RSP_OP(cmd, 1, 32, 16, uint16_t, layout->data_tail_room); \
22162 +} while (0)
22163 +
22164 +/*                cmd, param, offset, width, type, arg_name */
22165 +#define DPNI_CMD_SET_RX_BUFFER_LAYOUT(cmd, layout) \
22166 +do { \
22167 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, layout->private_data_size); \
22168 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, layout->data_align); \
22169 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, layout->options); \
22170 +       MC_CMD_OP(cmd, 1, 0,  1,  int,      layout->pass_timestamp); \
22171 +       MC_CMD_OP(cmd, 1, 1,  1,  int,      layout->pass_parser_result); \
22172 +       MC_CMD_OP(cmd, 1, 2,  1,  int,      layout->pass_frame_status); \
22173 +       MC_CMD_OP(cmd, 1, 16, 16, uint16_t, layout->data_head_room); \
22174 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, layout->data_tail_room); \
22175 +} while (0)
22176 +
22177 +/*                cmd, param, offset, width, type, arg_name */
22178 +#define DPNI_RSP_GET_TX_BUFFER_LAYOUT(cmd, layout) \
22179 +do { \
22180 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, layout->private_data_size); \
22181 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, layout->data_align); \
22182 +       MC_RSP_OP(cmd, 1, 0,  1,  int,      layout->pass_timestamp); \
22183 +       MC_RSP_OP(cmd, 1, 1,  1,  int,      layout->pass_parser_result); \
22184 +       MC_RSP_OP(cmd, 1, 2,  1,  int,      layout->pass_frame_status); \
22185 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, layout->data_head_room); \
22186 +       MC_RSP_OP(cmd, 1, 32, 16, uint16_t, layout->data_tail_room); \
22187 +} while (0)
22188 +
22189 +/*                cmd, param, offset, width, type, arg_name */
22190 +#define DPNI_CMD_SET_TX_BUFFER_LAYOUT(cmd, layout) \
22191 +do { \
22192 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, layout->private_data_size); \
22193 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, layout->data_align); \
22194 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, layout->options); \
22195 +       MC_CMD_OP(cmd, 1, 0,  1,  int,      layout->pass_timestamp); \
22196 +       MC_CMD_OP(cmd, 1, 1,  1,  int,      layout->pass_parser_result); \
22197 +       MC_CMD_OP(cmd, 1, 2,  1,  int,      layout->pass_frame_status); \
22198 +       MC_CMD_OP(cmd, 1, 16, 16, uint16_t, layout->data_head_room); \
22199 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, layout->data_tail_room); \
22200 +} while (0)
22201 +
22202 +/*                cmd, param, offset, width, type, arg_name */
22203 +#define DPNI_RSP_GET_TX_CONF_BUFFER_LAYOUT(cmd, layout) \
22204 +do { \
22205 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, layout->private_data_size); \
22206 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, layout->data_align); \
22207 +       MC_RSP_OP(cmd, 1, 0,  1,  int,      layout->pass_timestamp); \
22208 +       MC_RSP_OP(cmd, 1, 1,  1,  int,      layout->pass_parser_result); \
22209 +       MC_RSP_OP(cmd, 1, 2,  1,  int,      layout->pass_frame_status); \
22210 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, layout->data_head_room); \
22211 +       MC_RSP_OP(cmd, 1, 32, 16, uint16_t, layout->data_tail_room); \
22212 +} while (0)
22213 +
22214 +/*                cmd, param, offset, width, type, arg_name */
22215 +#define DPNI_CMD_SET_TX_CONF_BUFFER_LAYOUT(cmd, layout) \
22216 +do { \
22217 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, layout->private_data_size); \
22218 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, layout->data_align); \
22219 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, layout->options); \
22220 +       MC_CMD_OP(cmd, 1, 0,  1,  int,      layout->pass_timestamp); \
22221 +       MC_CMD_OP(cmd, 1, 1,  1,  int,      layout->pass_parser_result); \
22222 +       MC_CMD_OP(cmd, 1, 2,  1,  int,      layout->pass_frame_status); \
22223 +       MC_CMD_OP(cmd, 1, 16, 16, uint16_t, layout->data_head_room); \
22224 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, layout->data_tail_room); \
22225 +} while (0)
22226 +
22227 +/*                cmd, param, offset, width, type, arg_name */
22228 +#define DPNI_CMD_SET_L3_CHKSUM_VALIDATION(cmd, en) \
22229 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22230 +
22231 +/*                cmd, param, offset, width, type, arg_name */
22232 +#define DPNI_RSP_GET_L3_CHKSUM_VALIDATION(cmd, en) \
22233 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
22234 +
22235 +/*                cmd, param, offset, width, type, arg_name */
22236 +#define DPNI_CMD_SET_L4_CHKSUM_VALIDATION(cmd, en) \
22237 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22238 +
22239 +/*                cmd, param, offset, width, type, arg_name */
22240 +#define DPNI_RSP_GET_L4_CHKSUM_VALIDATION(cmd, en) \
22241 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
22242 +
22243 +/*                cmd, param, offset, width, type, arg_name */
22244 +#define DPNI_RSP_GET_QDID(cmd, qdid) \
22245 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, qdid)
22246 +
22247 +/*                cmd, param, offset, width, type, arg_name */
22248 +#define DPNI_RSP_GET_SP_INFO(cmd, sp_info) \
22249 +do { \
22250 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, sp_info->spids[0]); \
22251 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, sp_info->spids[1]); \
22252 +} while (0)
22253 +
22254 +/*                cmd, param, offset, width, type, arg_name */
22255 +#define DPNI_RSP_GET_TX_DATA_OFFSET(cmd, data_offset) \
22256 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, data_offset)
22257 +
22258 +/*                cmd, param, offset, width, type, arg_name */
22259 +#define DPNI_CMD_GET_COUNTER(cmd, counter) \
22260 +       MC_CMD_OP(cmd, 0, 0,  16, enum dpni_counter, counter)
22261 +
22262 +/*                cmd, param, offset, width, type, arg_name */
22263 +#define DPNI_RSP_GET_COUNTER(cmd, value) \
22264 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, value)
22265 +
22266 +/*                cmd, param, offset, width, type, arg_name */
22267 +#define DPNI_CMD_SET_COUNTER(cmd, counter, value) \
22268 +do { \
22269 +       MC_CMD_OP(cmd, 0, 0,  16, enum dpni_counter, counter); \
22270 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, value); \
22271 +} while (0)
22272 +
22273 +/*                cmd, param, offset, width, type, arg_name */
22274 +#define DPNI_CMD_SET_LINK_CFG(cmd, cfg) \
22275 +do { \
22276 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->rate);\
22277 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->options);\
22278 +} while (0)
22279 +
22280 +/*                cmd, param, offset, width, type, arg_name */
22281 +#define DPNI_RSP_GET_LINK_STATE(cmd, state) \
22282 +do { \
22283 +       MC_RSP_OP(cmd, 0, 32,  1, int,      state->up);\
22284 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, state->rate);\
22285 +       MC_RSP_OP(cmd, 2, 0,  64, uint64_t, state->options);\
22286 +} while (0)
22287 +
22288 +/*                cmd, param, offset, width, type, arg_name */
22289 +#define DPNI_CMD_SET_TX_SHAPING(cmd, tx_shaper) \
22290 +do { \
22291 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, tx_shaper->max_burst_size);\
22292 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, tx_shaper->rate_limit);\
22293 +} while (0)
22294 +
22295 +/*                cmd, param, offset, width, type, arg_name */
22296 +#define DPNI_CMD_SET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
22297 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, max_frame_length)
22298 +
22299 +/*                cmd, param, offset, width, type, arg_name */
22300 +#define DPNI_RSP_GET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
22301 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, max_frame_length)
22302 +
22303 +/*                cmd, param, offset, width, type, arg_name */
22304 +#define DPNI_CMD_SET_MTU(cmd, mtu) \
22305 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, mtu)
22306 +
22307 +/*                cmd, param, offset, width, type, arg_name */
22308 +#define DPNI_RSP_GET_MTU(cmd, mtu) \
22309 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, mtu)
22310 +
22311 +/*                cmd, param, offset, width, type, arg_name */
22312 +#define DPNI_CMD_SET_MULTICAST_PROMISC(cmd, en) \
22313 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22314 +
22315 +/*                cmd, param, offset, width, type, arg_name */
22316 +#define DPNI_RSP_GET_MULTICAST_PROMISC(cmd, en) \
22317 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
22318 +
22319 +/*                cmd, param, offset, width, type, arg_name */
22320 +#define DPNI_CMD_SET_UNICAST_PROMISC(cmd, en) \
22321 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22322 +
22323 +/*                cmd, param, offset, width, type, arg_name */
22324 +#define DPNI_RSP_GET_UNICAST_PROMISC(cmd, en) \
22325 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
22326 +
22327 +/*                cmd, param, offset, width, type, arg_name */
22328 +#define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
22329 +do { \
22330 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  mac_addr[5]); \
22331 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  mac_addr[4]); \
22332 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  mac_addr[3]); \
22333 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  mac_addr[2]); \
22334 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  mac_addr[1]); \
22335 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  mac_addr[0]); \
22336 +} while (0)
22337 +
22338 +/*                cmd, param, offset, width, type, arg_name */
22339 +#define DPNI_RSP_GET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
22340 +do { \
22341 +       MC_RSP_OP(cmd, 0, 16, 8,  uint8_t,  mac_addr[5]); \
22342 +       MC_RSP_OP(cmd, 0, 24, 8,  uint8_t,  mac_addr[4]); \
22343 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  mac_addr[3]); \
22344 +       MC_RSP_OP(cmd, 0, 40, 8,  uint8_t,  mac_addr[2]); \
22345 +       MC_RSP_OP(cmd, 0, 48, 8,  uint8_t,  mac_addr[1]); \
22346 +       MC_RSP_OP(cmd, 0, 56, 8,  uint8_t,  mac_addr[0]); \
22347 +} while (0)
22348 +
22349 +/*                cmd, param, offset, width, type, arg_name */
22350 +#define DPNI_CMD_ADD_MAC_ADDR(cmd, mac_addr) \
22351 +do { \
22352 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  mac_addr[5]); \
22353 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  mac_addr[4]); \
22354 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  mac_addr[3]); \
22355 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  mac_addr[2]); \
22356 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  mac_addr[1]); \
22357 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  mac_addr[0]); \
22358 +} while (0)
22359 +
22360 +/*                cmd, param, offset, width, type, arg_name */
22361 +#define DPNI_CMD_REMOVE_MAC_ADDR(cmd, mac_addr) \
22362 +do { \
22363 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  mac_addr[5]); \
22364 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  mac_addr[4]); \
22365 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  mac_addr[3]); \
22366 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  mac_addr[2]); \
22367 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  mac_addr[1]); \
22368 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  mac_addr[0]); \
22369 +} while (0)
22370 +
22371 +/*                cmd, param, offset, width, type, arg_name */
22372 +#define DPNI_CMD_CLEAR_MAC_FILTERS(cmd, unicast, multicast) \
22373 +do { \
22374 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      unicast); \
22375 +       MC_CMD_OP(cmd, 0, 1,  1,  int,      multicast); \
22376 +} while (0)
22377 +
22378 +/*                cmd, param, offset, width, type, arg_name */
22379 +#define DPNI_CMD_SET_VLAN_FILTERS(cmd, en) \
22380 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22381 +
22382 +/*                cmd, param, offset, width, type, arg_name */
22383 +#define DPNI_CMD_ADD_VLAN_ID(cmd, vlan_id) \
22384 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, vlan_id)
22385 +
22386 +/*                cmd, param, offset, width, type, arg_name */
22387 +#define DPNI_CMD_REMOVE_VLAN_ID(cmd, vlan_id) \
22388 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, vlan_id)
22389 +
22390 +/*                cmd, param, offset, width, type, arg_name */
22391 +#define DPNI_CMD_SET_TX_SELECTION(cmd, cfg) \
22392 +do { \
22393 +       MC_CMD_OP(cmd, 0, 0,  16,  uint16_t, cfg->tc_sched[0].delta_bandwidth);\
22394 +       MC_CMD_OP(cmd, 0, 16,  4,  enum dpni_tx_schedule_mode, \
22395 +                               cfg->tc_sched[0].mode); \
22396 +       MC_CMD_OP(cmd, 0, 32, 16,  uint16_t, cfg->tc_sched[1].delta_bandwidth);\
22397 +       MC_CMD_OP(cmd, 0, 48, 4,  enum dpni_tx_schedule_mode, \
22398 +                               cfg->tc_sched[1].mode); \
22399 +       MC_CMD_OP(cmd, 1, 0,  16,  uint16_t, cfg->tc_sched[2].delta_bandwidth);\
22400 +       MC_CMD_OP(cmd, 1, 16,  4,  enum dpni_tx_schedule_mode, \
22401 +                               cfg->tc_sched[2].mode); \
22402 +       MC_CMD_OP(cmd, 1, 32, 16,  uint16_t, cfg->tc_sched[3].delta_bandwidth);\
22403 +       MC_CMD_OP(cmd, 1, 48, 4,  enum dpni_tx_schedule_mode, \
22404 +                               cfg->tc_sched[3].mode); \
22405 +       MC_CMD_OP(cmd, 2, 0,  16,  uint16_t, cfg->tc_sched[4].delta_bandwidth);\
22406 +       MC_CMD_OP(cmd, 2, 16,  4,  enum dpni_tx_schedule_mode, \
22407 +                               cfg->tc_sched[4].mode); \
22408 +       MC_CMD_OP(cmd, 2, 32, 16,  uint16_t, cfg->tc_sched[5].delta_bandwidth);\
22409 +       MC_CMD_OP(cmd, 2, 48, 4,  enum dpni_tx_schedule_mode, \
22410 +                               cfg->tc_sched[5].mode); \
22411 +       MC_CMD_OP(cmd, 3, 0,  16,  uint16_t, cfg->tc_sched[6].delta_bandwidth);\
22412 +       MC_CMD_OP(cmd, 3, 16,  4,  enum dpni_tx_schedule_mode, \
22413 +                               cfg->tc_sched[6].mode); \
22414 +       MC_CMD_OP(cmd, 3, 32, 16,  uint16_t, cfg->tc_sched[7].delta_bandwidth);\
22415 +       MC_CMD_OP(cmd, 3, 48, 4,  enum dpni_tx_schedule_mode, \
22416 +                               cfg->tc_sched[7].mode); \
22417 +} while (0)
22418 +
22419 +/*                cmd, param, offset, width, type, arg_name */
22420 +#define DPNI_CMD_SET_RX_TC_DIST(cmd, tc_id, cfg) \
22421 +do { \
22422 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t,  cfg->dist_size); \
22423 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id); \
22424 +       MC_CMD_OP(cmd, 0, 24, 4,  enum dpni_dist_mode, cfg->dist_mode); \
22425 +       MC_CMD_OP(cmd, 0, 28, 4,  enum dpni_fs_miss_action, \
22426 +                                                 cfg->fs_cfg.miss_action); \
22427 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, cfg->fs_cfg.default_flow_id); \
22428 +       MC_CMD_OP(cmd, 6, 0,  64, uint64_t, cfg->key_cfg_iova); \
22429 +} while (0)
22430 +
22431 +/*                cmd, param, offset, width, type, arg_name */
22432 +#define DPNI_CMD_SET_TX_FLOW(cmd, flow_id, cfg) \
22433 +do { \
22434 +       MC_CMD_OP(cmd, 0, 43, 1,  int,      cfg->l3_chksum_gen);\
22435 +       MC_CMD_OP(cmd, 0, 44, 1,  int,      cfg->l4_chksum_gen);\
22436 +       MC_CMD_OP(cmd, 0, 45, 1,  int,      cfg->use_common_tx_conf_queue);\
22437 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id);\
22438 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->options);\
22439 +} while (0)
22440 +
22441 +/*                cmd, param, offset, width, type, arg_name */
22442 +#define DPNI_RSP_SET_TX_FLOW(cmd, flow_id) \
22443 +       MC_RSP_OP(cmd, 0, 48, 16, uint16_t, flow_id)
22444 +
22445 +/*                cmd, param, offset, width, type, arg_name */
22446 +#define DPNI_CMD_GET_TX_FLOW(cmd, flow_id) \
22447 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id)
22448 +
22449 +/*                cmd, param, offset, width, type, arg_name */
22450 +#define DPNI_RSP_GET_TX_FLOW(cmd, attr) \
22451 +do { \
22452 +       MC_RSP_OP(cmd, 0, 43, 1,  int,      attr->l3_chksum_gen);\
22453 +       MC_RSP_OP(cmd, 0, 44, 1,  int,      attr->l4_chksum_gen);\
22454 +       MC_RSP_OP(cmd, 0, 45, 1,  int,      attr->use_common_tx_conf_queue);\
22455 +} while (0)
22456 +
22457 +/*                cmd, param, offset, width, type, arg_name */
22458 +#define DPNI_CMD_SET_RX_FLOW(cmd, tc_id, flow_id, cfg) \
22459 +do { \
22460 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dest_cfg.dest_id); \
22461 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dest_cfg.priority);\
22462 +       MC_CMD_OP(cmd, 0, 40, 2,  enum dpni_dest, cfg->dest_cfg.dest_type);\
22463 +       MC_CMD_OP(cmd, 0, 42, 1,  int,      cfg->order_preservation_en);\
22464 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id); \
22465 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx); \
22466 +       MC_CMD_OP(cmd, 2, 16, 8,  uint8_t,  tc_id); \
22467 +       MC_CMD_OP(cmd, 2, 32, 32, uint32_t, cfg->options); \
22468 +       MC_CMD_OP(cmd, 3, 0,  4,  enum dpni_flc_type, cfg->flc_cfg.flc_type); \
22469 +       MC_CMD_OP(cmd, 3, 4,  4,  enum dpni_stash_size, \
22470 +               cfg->flc_cfg.frame_data_size);\
22471 +       MC_CMD_OP(cmd, 3, 8,  4,  enum dpni_stash_size, \
22472 +               cfg->flc_cfg.flow_context_size);\
22473 +       MC_CMD_OP(cmd, 3, 32, 32, uint32_t, cfg->flc_cfg.options);\
22474 +       MC_CMD_OP(cmd, 4, 0,  64, uint64_t, cfg->flc_cfg.flow_context);\
22475 +       MC_CMD_OP(cmd, 5, 0,  32, uint32_t, cfg->tail_drop_threshold); \
22476 +} while (0)
22477 +
22478 +/*                cmd, param, offset, width, type, arg_name */
22479 +#define DPNI_CMD_GET_RX_FLOW(cmd, tc_id, flow_id) \
22480 +do { \
22481 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id); \
22482 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id); \
22483 +} while (0)
22484 +
22485 +/*                cmd, param, offset, width, type, arg_name */
22486 +#define DPNI_RSP_GET_RX_FLOW(cmd, attr) \
22487 +do { \
22488 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->dest_cfg.dest_id); \
22489 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->dest_cfg.priority);\
22490 +       MC_RSP_OP(cmd, 0, 40, 2,  enum dpni_dest, attr->dest_cfg.dest_type); \
22491 +       MC_RSP_OP(cmd, 0, 42, 1,  int,      attr->order_preservation_en);\
22492 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, attr->user_ctx); \
22493 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, attr->tail_drop_threshold); \
22494 +       MC_RSP_OP(cmd, 2, 32, 32, uint32_t, attr->fqid); \
22495 +       MC_RSP_OP(cmd, 3, 0,  4,  enum dpni_flc_type, attr->flc_cfg.flc_type); \
22496 +       MC_RSP_OP(cmd, 3, 4,  4,  enum dpni_stash_size, \
22497 +               attr->flc_cfg.frame_data_size);\
22498 +       MC_RSP_OP(cmd, 3, 8,  4,  enum dpni_stash_size, \
22499 +               attr->flc_cfg.flow_context_size);\
22500 +       MC_RSP_OP(cmd, 3, 32, 32, uint32_t, attr->flc_cfg.options);\
22501 +       MC_RSP_OP(cmd, 4, 0,  64, uint64_t, attr->flc_cfg.flow_context);\
22502 +} while (0)
22503 +
22504 +/*                cmd, param, offset, width, type, arg_name */
22505 +#define DPNI_CMD_SET_RX_ERR_QUEUE(cmd, cfg) \
22506 +do { \
22507 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dest_cfg.dest_id); \
22508 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dest_cfg.priority);\
22509 +       MC_CMD_OP(cmd, 0, 40, 2,  enum dpni_dest, cfg->dest_cfg.dest_type);\
22510 +       MC_CMD_OP(cmd, 0, 42, 1,  int,      cfg->order_preservation_en);\
22511 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx); \
22512 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->options); \
22513 +       MC_CMD_OP(cmd, 2, 32, 32, uint32_t, cfg->tail_drop_threshold); \
22514 +       MC_CMD_OP(cmd, 3, 0,  4,  enum dpni_flc_type, cfg->flc_cfg.flc_type); \
22515 +       MC_CMD_OP(cmd, 3, 4,  4,  enum dpni_stash_size, \
22516 +               cfg->flc_cfg.frame_data_size);\
22517 +       MC_CMD_OP(cmd, 3, 8,  4,  enum dpni_stash_size, \
22518 +               cfg->flc_cfg.flow_context_size);\
22519 +       MC_CMD_OP(cmd, 3, 32, 32, uint32_t, cfg->flc_cfg.options);\
22520 +       MC_CMD_OP(cmd, 4, 0,  64, uint64_t, cfg->flc_cfg.flow_context);\
22521 +} while (0)
22522 +
22523 +/*                cmd, param, offset, width, type, arg_name */
22524 +#define DPNI_RSP_GET_RX_ERR_QUEUE(cmd, attr) \
22525 +do { \
22526 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->dest_cfg.dest_id); \
22527 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->dest_cfg.priority);\
22528 +       MC_RSP_OP(cmd, 0, 40, 2,  enum dpni_dest, attr->dest_cfg.dest_type);\
22529 +       MC_RSP_OP(cmd, 0, 42, 1,  int,      attr->order_preservation_en);\
22530 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, attr->user_ctx); \
22531 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, attr->tail_drop_threshold); \
22532 +       MC_RSP_OP(cmd, 2, 32, 32, uint32_t, attr->fqid); \
22533 +       MC_RSP_OP(cmd, 3, 0,  4,  enum dpni_flc_type, attr->flc_cfg.flc_type); \
22534 +       MC_RSP_OP(cmd, 3, 4,  4,  enum dpni_stash_size, \
22535 +               attr->flc_cfg.frame_data_size);\
22536 +       MC_RSP_OP(cmd, 3, 8,  4,  enum dpni_stash_size, \
22537 +               attr->flc_cfg.flow_context_size);\
22538 +       MC_RSP_OP(cmd, 3, 32, 32, uint32_t, attr->flc_cfg.options);\
22539 +       MC_RSP_OP(cmd, 4, 0,  64, uint64_t, attr->flc_cfg.flow_context);\
22540 +} while (0)
22541 +
22542 +/*                cmd, param, offset, width, type, arg_name */
22543 +#define DPNI_CMD_SET_TX_CONF_REVOKE(cmd, revoke) \
22544 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      revoke)
22545 +
22546 +/*                cmd, param, offset, width, type, arg_name */
22547 +#define DPNI_CMD_SET_QOS_TABLE(cmd, cfg) \
22548 +do { \
22549 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->default_tc); \
22550 +       MC_CMD_OP(cmd, 0, 40, 1,  int,      cfg->discard_on_miss); \
22551 +       MC_CMD_OP(cmd, 6, 0,  64, uint64_t, cfg->key_cfg_iova); \
22552 +} while (0)
22553 +
22554 +/*                cmd, param, offset, width, type, arg_name */
22555 +#define DPNI_CMD_ADD_QOS_ENTRY(cmd, cfg, tc_id) \
22556 +do { \
22557 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id); \
22558 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->key_size); \
22559 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->key_iova); \
22560 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->mask_iova); \
22561 +} while (0)
22562 +
22563 +/*                cmd, param, offset, width, type, arg_name */
22564 +#define DPNI_CMD_REMOVE_QOS_ENTRY(cmd, cfg) \
22565 +do { \
22566 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->key_size); \
22567 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->key_iova); \
22568 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->mask_iova); \
22569 +} while (0)
22570 +
22571 +/*                cmd, param, offset, width, type, arg_name */
22572 +#define DPNI_CMD_ADD_FS_ENTRY(cmd, tc_id, cfg, flow_id) \
22573 +do { \
22574 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id); \
22575 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id); \
22576 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->key_size); \
22577 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->key_iova); \
22578 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->mask_iova); \
22579 +} while (0)
22580 +
22581 +/*                cmd, param, offset, width, type, arg_name */
22582 +#define DPNI_CMD_REMOVE_FS_ENTRY(cmd, tc_id, cfg) \
22583 +do { \
22584 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id); \
22585 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->key_size); \
22586 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->key_iova); \
22587 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->mask_iova); \
22588 +} while (0)
22589 +
22590 +/*                cmd, param, offset, width, type, arg_name */
22591 +#define DPNI_CMD_CLEAR_FS_ENTRIES(cmd, tc_id) \
22592 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id)
22593 +
22594 +/*                cmd, param, offset, width, type, arg_name */
22595 +#define DPNI_CMD_SET_VLAN_INSERTION(cmd, en) \
22596 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22597 +
22598 +/*                cmd, param, offset, width, type, arg_name */
22599 +#define DPNI_CMD_SET_VLAN_REMOVAL(cmd, en) \
22600 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22601 +
22602 +/*                cmd, param, offset, width, type, arg_name */
22603 +#define DPNI_CMD_SET_IPR(cmd, en) \
22604 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22605 +
22606 +/*                cmd, param, offset, width, type, arg_name */
22607 +#define DPNI_CMD_SET_IPF(cmd, en) \
22608 +       MC_CMD_OP(cmd, 0, 0,  1,  int,      en)
22609 +
22610 +/*                cmd, param, offset, width, type, arg_name */
22611 +#define DPNI_CMD_SET_RX_TC_POLICING(cmd, tc_id, cfg) \
22612 +do { \
22613 +       MC_CMD_OP(cmd, 0, 0,  4, enum dpni_policer_mode, cfg->mode); \
22614 +       MC_CMD_OP(cmd, 0, 4,  4, enum dpni_policer_color, cfg->default_color); \
22615 +       MC_CMD_OP(cmd, 0, 8,  4, enum dpni_policer_unit, cfg->units); \
22616 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id); \
22617 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, cfg->options); \
22618 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->cir); \
22619 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->cbs); \
22620 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->eir); \
22621 +       MC_CMD_OP(cmd, 2, 32, 32, uint32_t, cfg->ebs);\
22622 +} while (0)
22623 +
22624 +/*                cmd, param, offset, width, type, arg_name */
22625 +#define DPNI_CMD_GET_RX_TC_POLICING(cmd, tc_id) \
22626 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id)
22627 +
22628 +/*                cmd, param, offset, width, type, arg_name */
22629 +#define DPNI_RSP_GET_RX_TC_POLICING(cmd, cfg) \
22630 +do { \
22631 +       MC_RSP_OP(cmd, 0, 0,  4, enum dpni_policer_mode, cfg->mode); \
22632 +       MC_RSP_OP(cmd, 0, 4,  4, enum dpni_policer_color, cfg->default_color); \
22633 +       MC_RSP_OP(cmd, 0, 8,  4, enum dpni_policer_unit, cfg->units); \
22634 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t, cfg->options); \
22635 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, cfg->cir); \
22636 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, cfg->cbs); \
22637 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, cfg->eir); \
22638 +       MC_RSP_OP(cmd, 2, 32, 32, uint32_t, cfg->ebs);\
22639 +} while (0)
22640 +
22641 +/*                cmd, param, offset, width, type, arg_name */
22642 +#define DPNI_PREP_EARLY_DROP(ext, cfg) \
22643 +do { \
22644 +       MC_PREP_OP(ext, 0, 0,  2, enum dpni_early_drop_mode, cfg->mode); \
22645 +       MC_PREP_OP(ext, 0, 2,  2, \
22646 +                 enum dpni_congestion_unit, cfg->units); \
22647 +       MC_PREP_OP(ext, 0, 32, 32, uint32_t, cfg->tail_drop_threshold); \
22648 +       MC_PREP_OP(ext, 1, 0,  8,  uint8_t,  cfg->green.drop_probability); \
22649 +       MC_PREP_OP(ext, 2, 0,  64, uint64_t, cfg->green.max_threshold); \
22650 +       MC_PREP_OP(ext, 3, 0,  64, uint64_t, cfg->green.min_threshold); \
22651 +       MC_PREP_OP(ext, 5, 0,  8,  uint8_t,  cfg->yellow.drop_probability);\
22652 +       MC_PREP_OP(ext, 6, 0,  64, uint64_t, cfg->yellow.max_threshold); \
22653 +       MC_PREP_OP(ext, 7, 0,  64, uint64_t, cfg->yellow.min_threshold); \
22654 +       MC_PREP_OP(ext, 9, 0,  8,  uint8_t,  cfg->red.drop_probability); \
22655 +       MC_PREP_OP(ext, 10, 0,  64, uint64_t, cfg->red.max_threshold); \
22656 +       MC_PREP_OP(ext, 11, 0,  64, uint64_t, cfg->red.min_threshold); \
22657 +} while (0)
22658 +
22659 +/*                cmd, param, offset, width, type, arg_name */
22660 +#define DPNI_EXT_EARLY_DROP(ext, cfg) \
22661 +do { \
22662 +       MC_EXT_OP(ext, 0, 0,  2, enum dpni_early_drop_mode, cfg->mode); \
22663 +       MC_EXT_OP(ext, 0, 2,  2, \
22664 +                 enum dpni_congestion_unit, cfg->units); \
22665 +       MC_EXT_OP(ext, 0, 32, 32, uint32_t, cfg->tail_drop_threshold); \
22666 +       MC_EXT_OP(ext, 1, 0,  8,  uint8_t,  cfg->green.drop_probability); \
22667 +       MC_EXT_OP(ext, 2, 0,  64, uint64_t, cfg->green.max_threshold); \
22668 +       MC_EXT_OP(ext, 3, 0,  64, uint64_t, cfg->green.min_threshold); \
22669 +       MC_EXT_OP(ext, 5, 0,  8,  uint8_t,  cfg->yellow.drop_probability);\
22670 +       MC_EXT_OP(ext, 6, 0,  64, uint64_t, cfg->yellow.max_threshold); \
22671 +       MC_EXT_OP(ext, 7, 0,  64, uint64_t, cfg->yellow.min_threshold); \
22672 +       MC_EXT_OP(ext, 9, 0,  8,  uint8_t,  cfg->red.drop_probability); \
22673 +       MC_EXT_OP(ext, 10, 0,  64, uint64_t, cfg->red.max_threshold); \
22674 +       MC_EXT_OP(ext, 11, 0,  64, uint64_t, cfg->red.min_threshold); \
22675 +} while (0)
22676 +
22677 +/*                cmd, param, offset, width, type, arg_name */
22678 +#define DPNI_CMD_SET_RX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova) \
22679 +do { \
22680 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
22681 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, early_drop_iova); \
22682 +} while (0)
22683 +
22684 +/*                cmd, param, offset, width, type, arg_name */
22685 +#define DPNI_CMD_GET_RX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova) \
22686 +do { \
22687 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
22688 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, early_drop_iova); \
22689 +} while (0)
22690 +
22691 +/*                cmd, param, offset, width, type, arg_name */
22692 +#define DPNI_CMD_SET_TX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova) \
22693 +do { \
22694 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
22695 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, early_drop_iova); \
22696 +} while (0)
22697 +
22698 +/*                cmd, param, offset, width, type, arg_name */
22699 +#define DPNI_CMD_GET_TX_TC_EARLY_DROP(cmd, tc_id, early_drop_iova) \
22700 +do { \
22701 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
22702 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, early_drop_iova); \
22703 +} while (0)
22704 +
22705 +#define DPNI_CMD_SET_RX_TC_CONGESTION_NOTIFICATION(cmd, tc_id, cfg) \
22706 +do { \
22707 +       MC_CMD_OP(cmd, 0, 0,  2,  enum dpni_congestion_unit, cfg->units); \
22708 +       MC_CMD_OP(cmd, 0, 4,  4,  enum dpni_dest, cfg->dest_cfg.dest_type); \
22709 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
22710 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->dest_cfg.priority); \
22711 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->threshold_entry); \
22712 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->threshold_exit); \
22713 +       MC_CMD_OP(cmd, 2, 0,  16, uint16_t, cfg->options); \
22714 +       MC_CMD_OP(cmd, 2, 32, 32, int,      cfg->dest_cfg.dest_id); \
22715 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx); \
22716 +       MC_CMD_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova); \
22717 +} while (0)
22718 +
22719 +#define DPNI_CMD_GET_RX_TC_CONGESTION_NOTIFICATION(cmd, tc_id) \
22720 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id)
22721 +
22722 +#define DPNI_RSP_GET_RX_TC_CONGESTION_NOTIFICATION(cmd, cfg) \
22723 +do { \
22724 +       MC_RSP_OP(cmd, 0, 0,  2,  enum dpni_congestion_unit, cfg->units); \
22725 +       MC_RSP_OP(cmd, 0, 4,  4,  enum dpni_dest, cfg->dest_cfg.dest_type); \
22726 +       MC_RSP_OP(cmd, 0, 16, 8,  uint8_t,  cfg->dest_cfg.priority); \
22727 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, cfg->threshold_entry); \
22728 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, cfg->threshold_exit); \
22729 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, cfg->options); \
22730 +       MC_RSP_OP(cmd, 2, 32, 32, int,      cfg->dest_cfg.dest_id); \
22731 +       MC_RSP_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx); \
22732 +       MC_RSP_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova); \
22733 +} while (0)
22734 +
22735 +#define DPNI_CMD_SET_TX_TC_CONGESTION_NOTIFICATION(cmd, tc_id, cfg) \
22736 +do { \
22737 +       MC_CMD_OP(cmd, 0, 0,  2,  enum dpni_congestion_unit, cfg->units); \
22738 +       MC_CMD_OP(cmd, 0, 4,  4,  enum dpni_dest, cfg->dest_cfg.dest_type); \
22739 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
22740 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->dest_cfg.priority); \
22741 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->threshold_entry); \
22742 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->threshold_exit); \
22743 +       MC_CMD_OP(cmd, 2, 0,  16, uint16_t, cfg->options); \
22744 +       MC_CMD_OP(cmd, 2, 32, 32, int,      cfg->dest_cfg.dest_id); \
22745 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx); \
22746 +       MC_CMD_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova); \
22747 +} while (0)
22748 +
22749 +#define DPNI_CMD_GET_TX_TC_CONGESTION_NOTIFICATION(cmd, tc_id) \
22750 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id)
22751 +
22752 +#define DPNI_RSP_GET_TX_TC_CONGESTION_NOTIFICATION(cmd, cfg) \
22753 +do { \
22754 +       MC_RSP_OP(cmd, 0, 0,  2,  enum dpni_congestion_unit, cfg->units); \
22755 +       MC_RSP_OP(cmd, 0, 4,  4,  enum dpni_dest, cfg->dest_cfg.dest_type); \
22756 +       MC_RSP_OP(cmd, 0, 16, 8,  uint8_t,  cfg->dest_cfg.priority); \
22757 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, cfg->threshold_entry); \
22758 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, cfg->threshold_exit); \
22759 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, cfg->options); \
22760 +       MC_RSP_OP(cmd, 2, 32, 32, int,      cfg->dest_cfg.dest_id); \
22761 +       MC_RSP_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx); \
22762 +       MC_RSP_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova); \
22763 +} while (0)
22764 +
22765 +#define DPNI_CMD_SET_TX_CONF(cmd, flow_id, cfg) \
22766 +do { \
22767 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t, cfg->queue_cfg.dest_cfg.priority); \
22768 +       MC_CMD_OP(cmd, 0, 40, 2,  enum dpni_dest, \
22769 +               cfg->queue_cfg.dest_cfg.dest_type); \
22770 +       MC_CMD_OP(cmd, 0, 42, 1,  int, cfg->errors_only); \
22771 +       MC_CMD_OP(cmd, 0, 46, 1,  int, cfg->queue_cfg.order_preservation_en); \
22772 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id); \
22773 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->queue_cfg.user_ctx); \
22774 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->queue_cfg.options); \
22775 +       MC_CMD_OP(cmd, 2, 32, 32, int,      cfg->queue_cfg.dest_cfg.dest_id); \
22776 +       MC_CMD_OP(cmd, 3, 0,  32, uint32_t, \
22777 +               cfg->queue_cfg.tail_drop_threshold); \
22778 +       MC_CMD_OP(cmd, 4, 0,  4,  enum dpni_flc_type, \
22779 +               cfg->queue_cfg.flc_cfg.flc_type); \
22780 +       MC_CMD_OP(cmd, 4, 4,  4,  enum dpni_stash_size, \
22781 +               cfg->queue_cfg.flc_cfg.frame_data_size); \
22782 +       MC_CMD_OP(cmd, 4, 8,  4,  enum dpni_stash_size, \
22783 +               cfg->queue_cfg.flc_cfg.flow_context_size); \
22784 +       MC_CMD_OP(cmd, 4, 32, 32, uint32_t, cfg->queue_cfg.flc_cfg.options); \
22785 +       MC_CMD_OP(cmd, 5, 0,  64, uint64_t, \
22786 +               cfg->queue_cfg.flc_cfg.flow_context); \
22787 +} while (0)
22788 +
22789 +#define DPNI_CMD_GET_TX_CONF(cmd, flow_id) \
22790 +               MC_CMD_OP(cmd, 0, 48, 16, uint16_t,  flow_id)
22791 +
22792 +#define DPNI_RSP_GET_TX_CONF(cmd, attr) \
22793 +do { \
22794 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t, \
22795 +                 attr->queue_attr.dest_cfg.priority); \
22796 +       MC_RSP_OP(cmd, 0, 40, 2,  enum dpni_dest, \
22797 +               attr->queue_attr.dest_cfg.dest_type); \
22798 +       MC_RSP_OP(cmd, 0, 42, 1,  int, attr->errors_only); \
22799 +       MC_RSP_OP(cmd, 0, 46, 1,  int, \
22800 +                 attr->queue_attr.order_preservation_en); \
22801 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, attr->queue_attr.user_ctx); \
22802 +       MC_RSP_OP(cmd, 2, 32, 32, int,  attr->queue_attr.dest_cfg.dest_id); \
22803 +       MC_RSP_OP(cmd, 3, 0,  32, uint32_t, \
22804 +               attr->queue_attr.tail_drop_threshold); \
22805 +       MC_RSP_OP(cmd, 3, 32, 32, uint32_t, attr->queue_attr.fqid); \
22806 +       MC_RSP_OP(cmd, 4, 0,  4,  enum dpni_flc_type, \
22807 +               attr->queue_attr.flc_cfg.flc_type); \
22808 +       MC_RSP_OP(cmd, 4, 4,  4,  enum dpni_stash_size, \
22809 +               attr->queue_attr.flc_cfg.frame_data_size); \
22810 +       MC_RSP_OP(cmd, 4, 8,  4,  enum dpni_stash_size, \
22811 +               attr->queue_attr.flc_cfg.flow_context_size); \
22812 +       MC_RSP_OP(cmd, 4, 32, 32, uint32_t, attr->queue_attr.flc_cfg.options); \
22813 +       MC_RSP_OP(cmd, 5, 0,  64, uint64_t, \
22814 +               attr->queue_attr.flc_cfg.flow_context); \
22815 +} while (0)
22816 +
22817 +#define DPNI_CMD_SET_TX_CONF_CONGESTION_NOTIFICATION(cmd, flow_id, cfg) \
22818 +do { \
22819 +       MC_CMD_OP(cmd, 0, 0,  2,  enum dpni_congestion_unit, cfg->units); \
22820 +       MC_CMD_OP(cmd, 0, 4,  4,  enum dpni_dest, cfg->dest_cfg.dest_type); \
22821 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->dest_cfg.priority); \
22822 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id); \
22823 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->threshold_entry); \
22824 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->threshold_exit); \
22825 +       MC_CMD_OP(cmd, 2, 0,  16, uint16_t, cfg->options); \
22826 +       MC_CMD_OP(cmd, 2, 32, 32, int,      cfg->dest_cfg.dest_id); \
22827 +       MC_CMD_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx); \
22828 +       MC_CMD_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova); \
22829 +} while (0)
22830 +
22831 +#define DPNI_CMD_GET_TX_CONF_CONGESTION_NOTIFICATION(cmd, flow_id) \
22832 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id)
22833 +
22834 +#define DPNI_RSP_GET_TX_CONF_CONGESTION_NOTIFICATION(cmd, cfg) \
22835 +do { \
22836 +       MC_RSP_OP(cmd, 0, 0,  2,  enum dpni_congestion_unit, cfg->units); \
22837 +       MC_RSP_OP(cmd, 0, 4,  4,  enum dpni_dest, cfg->dest_cfg.dest_type); \
22838 +       MC_RSP_OP(cmd, 0, 16, 8,  uint8_t,  cfg->dest_cfg.priority); \
22839 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, cfg->threshold_entry); \
22840 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, cfg->threshold_exit); \
22841 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, cfg->options); \
22842 +       MC_RSP_OP(cmd, 2, 32, 32, int,      cfg->dest_cfg.dest_id); \
22843 +       MC_RSP_OP(cmd, 3, 0,  64, uint64_t, cfg->message_ctx); \
22844 +       MC_RSP_OP(cmd, 4, 0,  64, uint64_t, cfg->message_iova); \
22845 +} while (0)
22846 +
22847 +#endif /* _FSL_DPNI_CMD_H */
22848 diff --git a/drivers/net/dpaa2/mc/fsl_dprc.h b/drivers/net/dpaa2/mc/fsl_dprc.h
22849 new file mode 100644
22850 index 0000000..c831f46
22851 --- /dev/null
22852 +++ b/drivers/net/dpaa2/mc/fsl_dprc.h
22853 @@ -0,0 +1,1032 @@
22854 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
22855 + *
22856 + * Redistribution and use in source and binary forms, with or without
22857 + * modification, are permitted provided that the following conditions are met:
22858 + * * Redistributions of source code must retain the above copyright
22859 + * notice, this list of conditions and the following disclaimer.
22860 + * * Redistributions in binary form must reproduce the above copyright
22861 + * notice, this list of conditions and the following disclaimer in the
22862 + * documentation and/or other materials provided with the distribution.
22863 + * * Neither the name of the above-listed copyright holders nor the
22864 + * names of any contributors may be used to endorse or promote products
22865 + * derived from this software without specific prior written permission.
22866 + *
22867 + *
22868 + * ALTERNATIVELY, this software may be distributed under the terms of the
22869 + * GNU General Public License ("GPL") as published by the Free Software
22870 + * Foundation, either version 2 of that License or (at your option) any
22871 + * later version.
22872 + *
22873 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22874 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22875 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22876 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
22877 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22878 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22879 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22880 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
22881 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22882 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
22883 + * POSSIBILITY OF SUCH DAMAGE.
22884 + */
22885 +#ifndef _FSL_DPRC_H
22886 +#define _FSL_DPRC_H
22887 +
22888 +/* Data Path Resource Container API
22889 + * Contains DPRC API for managing and querying DPAA resources
22890 + */
22891 +
22892 +struct fsl_mc_io;
22893 +
22894 +/**
22895 + * Set this value as the icid value in dprc_cfg structure when creating a
22896 + * container, in case the ICID is not selected by the user and should be
22897 + * allocated by the DPRC from the pool of ICIDs.
22898 + */
22899 +#define DPRC_GET_ICID_FROM_POOL                        (uint16_t)(~(0))
22900 +
22901 +/**
22902 + * Set this value as the portal_id value in dprc_cfg structure when creating a
22903 + * container, in case the portal ID is not specifically selected by the
22904 + * user and should be allocated by the DPRC from the pool of portal ids.
22905 + */
22906 +#define DPRC_GET_PORTAL_ID_FROM_POOL   (int)(~(0))
22907 +
22908 +/**
22909 + * dprc_get_container_id() - Get container ID associated with a given portal.
22910 + * @mc_io:     Pointer to MC portal's I/O object
22911 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22912 + * @container_id:      Requested container ID
22913 + *
22914 + * Return:     '0' on Success; Error code otherwise.
22915 + */
22916 +int dprc_get_container_id(struct fsl_mc_io     *mc_io,
22917 +                         uint32_t              cmd_flags,
22918 +                         int                   *container_id);
22919 +
22920 +/**
22921 + * dprc_open() - Open DPRC object for use
22922 + * @mc_io:     Pointer to MC portal's I/O object
22923 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22924 + * @container_id: Container ID to open
22925 + * @token:     Returned token of DPRC object
22926 + *
22927 + * Return:     '0' on Success; Error code otherwise.
22928 + *
22929 + * @warning    Required before any operation on the object.
22930 + */
22931 +int dprc_open(struct fsl_mc_io *mc_io,
22932 +             uint32_t          cmd_flags,
22933 +             int               container_id,
22934 +             uint16_t          *token);
22935 +
22936 +/**
22937 + * dprc_close() - Close the control session of the object
22938 + * @mc_io:     Pointer to MC portal's I/O object
22939 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22940 + * @token:     Token of DPRC object
22941 + *
22942 + * After this function is called, no further operations are
22943 + * allowed on the object without opening a new control session.
22944 + *
22945 + * Return:     '0' on Success; Error code otherwise.
22946 + */
22947 +int dprc_close(struct fsl_mc_io        *mc_io,
22948 +              uint32_t         cmd_flags,
22949 +              uint16_t         token);
22950 +
22951 +/**
22952 + * Container general options
22953 + *
22954 + * These options may be selected at container creation by the container creator
22955 + * and can be retrieved using dprc_get_attributes()
22956 + */
22957 +
22958 +/**
22959 + * Spawn Policy Option allowed - Indicates that the new container is allowed
22960 + * to spawn and have its own child containers.
22961 + */
22962 +#define DPRC_CFG_OPT_SPAWN_ALLOWED             0x00000001
22963 +
22964 +/**
22965 + * General Container allocation policy - Indicates that the new container is
22966 + * allowed to allocate requested resources from its parent container; if not
22967 + * set, the container is only allowed to use resources in its own pools; Note
22968 + * that this is a container's global policy, but the parent container may
22969 + * override it and set specific quota per resource type.
22970 + */
22971 +#define DPRC_CFG_OPT_ALLOC_ALLOWED             0x00000002
22972 +
22973 +/**
22974 + * Object initialization allowed - software context associated with this
22975 + * container is allowed to invoke object initialization operations.
22976 + */
22977 +#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED                0x00000004
22978 +
22979 +/**
22980 + * Topology change allowed - software context associated with this
22981 + * container is allowed to invoke topology operations, such as attach/detach
22982 + * of network objects.
22983 + */
22984 +#define DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED  0x00000008
22985 +
22986 +/**
22987 + * AIOP - Indicates that container belongs to AIOP.
22988 + */
22989 +#define DPRC_CFG_OPT_AIOP                      0x00000020
22990 +
22991 +/**
22992 + * IRQ Config - Indicates that the container allowed to configure its IRQs.
22993 + */
22994 +#define DPRC_CFG_OPT_IRQ_CFG_ALLOWED           0x00000040
22995 +
22996 +/**
22997 + * struct dprc_cfg - Container configuration options
22998 + * @icid: Container's ICID; if set to 'DPRC_GET_ICID_FROM_POOL', a free
22999 + *             ICID value is allocated by the DPRC
23000 + * @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free
23001 + *             portal ID is allocated by the DPRC
23002 + * @options: Combination of 'DPRC_CFG_OPT_<X>' options
23003 + * @label: Object's label
23004 + */
23005 +struct dprc_cfg {
23006 +       uint16_t        icid;
23007 +       int             portal_id;
23008 +       uint64_t        options;
23009 +       char            label[16];
23010 +};
23011 +
23012 +/**
23013 + * dprc_create_container() - Create child container
23014 + * @mc_io:     Pointer to MC portal's I/O object
23015 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23016 + * @token:     Token of DPRC object
23017 + * @cfg:       Child container configuration
23018 + * @child_container_id:        Returned child container ID
23019 + * @child_portal_offset: Returned child portal offset from MC portal base
23020 + *
23021 + *
23022 + * Return:     '0' on Success; Error code otherwise.
23023 + */
23024 +int dprc_create_container(struct fsl_mc_io     *mc_io,
23025 +                         uint32_t              cmd_flags,
23026 +                         uint16_t              token,
23027 +                         struct dprc_cfg       *cfg,
23028 +                         int                   *child_container_id,
23029 +                         uint64_t              *child_portal_offset);
23030 +
23031 +/**
23032 + * dprc_destroy_container() - Destroy child container.
23033 + * @mc_io:     Pointer to MC portal's I/O object
23034 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23035 + * @token:     Token of DPRC object
23036 + * @child_container_id:        ID of the container to destroy
23037 + *
23038 + * This function terminates the child container, so following this call the
23039 + * child container ID becomes invalid.
23040 + *
23041 + * Notes:
23042 + * - All resources and objects of the destroyed container are returned to the
23043 + * parent container or destroyed if were created be the destroyed container.
23044 + * - This function destroy all the child containers of the specified
23045 + *   container prior to destroying the container itself.
23046 + *
23047 + * warning: Only the parent container is allowed to destroy a child policy
23048 + *             Container 0 can't be destroyed
23049 + *
23050 + * Return:     '0' on Success; Error code otherwise.
23051 + *
23052 + */
23053 +int dprc_destroy_container(struct fsl_mc_io    *mc_io,
23054 +                          uint32_t             cmd_flags,
23055 +                          uint16_t             token,
23056 +                          int                  child_container_id);
23057 +
23058 +/**
23059 + * dprc_reset_container - Reset child container.
23060 + * @mc_io:     Pointer to MC portal's I/O object
23061 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23062 + * @token:     Token of DPRC object
23063 + * @child_container_id:        ID of the container to reset
23064 + *
23065 + * In case a software context crashes or becomes non-responsive, the parent
23066 + * may wish to reset its resources container before the software context is
23067 + * restarted.
23068 + *
23069 + * This routine informs all objects assigned to the child container that the
23070 + * container is being reset, so they may perform any cleanup operations that are
23071 + * needed. All objects handles that were owned by the child container shall be
23072 + * closed.
23073 + *
23074 + * Note that such request may be submitted even if the child software context
23075 + * has not crashed, but the resulting object cleanup operations will not be
23076 + * aware of that.
23077 + *
23078 + * Return:     '0' on Success; Error code otherwise.
23079 + */
23080 +int dprc_reset_container(struct fsl_mc_io      *mc_io,
23081 +                        uint32_t               cmd_flags,
23082 +                        uint16_t               token,
23083 +                        int                    child_container_id);
23084 +
23085 +/**
23086 + * DPRC IRQ Index and Events
23087 + */
23088 +
23089 +/**
23090 + * IRQ index
23091 + */
23092 +#define DPRC_IRQ_INDEX          0
23093 +
23094 +/**
23095 + * Number of dprc's IRQs
23096 + */
23097 +#define DPRC_NUM_OF_IRQS               1
23098 +
23099 +/* DPRC IRQ events */
23100 +/**
23101 + * IRQ event - Indicates that a new object added to the container
23102 + */
23103 +#define DPRC_IRQ_EVENT_OBJ_ADDED               0x00000001
23104 +/**
23105 + * IRQ event - Indicates that an object was removed from the container
23106 + */
23107 +#define DPRC_IRQ_EVENT_OBJ_REMOVED             0x00000002
23108 +/**
23109 + * IRQ event - Indicates that resources added to the container
23110 + */
23111 +#define DPRC_IRQ_EVENT_RES_ADDED               0x00000004
23112 +/**
23113 + * IRQ event - Indicates that resources removed from the container
23114 + */
23115 +#define DPRC_IRQ_EVENT_RES_REMOVED             0x00000008
23116 +/**
23117 + * IRQ event - Indicates that one of the descendant containers that opened by
23118 + * this container is destroyed
23119 + */
23120 +#define DPRC_IRQ_EVENT_CONTAINER_DESTROYED     0x00000010
23121 +/**
23122 + * IRQ event - Indicates that on one of the container's opened object is
23123 + * destroyed
23124 + */
23125 +#define DPRC_IRQ_EVENT_OBJ_DESTROYED           0x00000020
23126 +/**
23127 + * Irq event - Indicates that object is created at the container
23128 + */
23129 +#define DPRC_IRQ_EVENT_OBJ_CREATED             0x00000040
23130 +
23131 +/**
23132 + * struct dprc_irq_cfg - IRQ configuration
23133 + * @addr:      Address that must be written to signal a message-based interrupt
23134 + * @val:       Value to write into irq_addr address
23135 + * @irq_num: A user defined number associated with this IRQ
23136 + */
23137 +struct dprc_irq_cfg {
23138 +            uint64_t           addr;
23139 +            uint32_t           val;
23140 +            int                irq_num;
23141 +};
23142 +
23143 +/**
23144 + * dprc_set_irq() - Set IRQ information for the DPRC to trigger an interrupt.
23145 + * @mc_io:     Pointer to MC portal's I/O object
23146 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23147 + * @token:     Token of DPRC object
23148 + * @irq_index: Identifies the interrupt index to configure
23149 + * @irq_cfg:   IRQ configuration
23150 + *
23151 + * Return:     '0' on Success; Error code otherwise.
23152 + */
23153 +int dprc_set_irq(struct fsl_mc_io      *mc_io,
23154 +                uint32_t               cmd_flags,
23155 +                uint16_t               token,
23156 +                uint8_t                irq_index,
23157 +                struct dprc_irq_cfg    *irq_cfg);
23158 +
23159 +/**
23160 + * dprc_get_irq() - Get IRQ information from the DPRC.
23161 + * @mc_io:     Pointer to MC portal's I/O object
23162 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23163 + * @token:     Token of DPRC object
23164 + * @irq_index: The interrupt index to configure
23165 + * @type:      Interrupt type: 0 represents message interrupt
23166 + *             type (both irq_addr and irq_val are valid)
23167 + * @irq_cfg:   IRQ attributes
23168 + *
23169 + * Return:     '0' on Success; Error code otherwise.
23170 + */
23171 +int dprc_get_irq(struct fsl_mc_io      *mc_io,
23172 +                uint32_t               cmd_flags,
23173 +                uint16_t               token,
23174 +                uint8_t                irq_index,
23175 +                int                    *type,
23176 +                struct dprc_irq_cfg    *irq_cfg);
23177 +
23178 +/**
23179 + * dprc_set_irq_enable() - Set overall interrupt state.
23180 + * @mc_io:     Pointer to MC portal's I/O object
23181 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23182 + * @token:     Token of DPRC object
23183 + * @irq_index: The interrupt index to configure
23184 + * @en:                Interrupt state - enable = 1, disable = 0
23185 + *
23186 + * Allows GPP software to control when interrupts are generated.
23187 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
23188 + * overall interrupt state. if the interrupt is disabled no causes will cause
23189 + * an interrupt.
23190 + *
23191 + * Return:     '0' on Success; Error code otherwise.
23192 + */
23193 +int dprc_set_irq_enable(struct fsl_mc_io       *mc_io,
23194 +                       uint32_t                cmd_flags,
23195 +                       uint16_t                token,
23196 +                       uint8_t                 irq_index,
23197 +                       uint8_t                 en);
23198 +
23199 +/**
23200 + * dprc_get_irq_enable() - Get overall interrupt state.
23201 + * @mc_io:     Pointer to MC portal's I/O object
23202 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23203 + * @token:     Token of DPRC object
23204 + * @irq_index:  The interrupt index to configure
23205 + * @en:                Returned interrupt state - enable = 1, disable = 0
23206 + *
23207 + * Return:     '0' on Success; Error code otherwise.
23208 + */
23209 +int dprc_get_irq_enable(struct fsl_mc_io       *mc_io,
23210 +                       uint32_t                cmd_flags,
23211 +                       uint16_t                token,
23212 +                       uint8_t                 irq_index,
23213 +                       uint8_t                 *en);
23214 +
23215 +/**
23216 + * dprc_set_irq_mask() - Set interrupt mask.
23217 + * @mc_io:     Pointer to MC portal's I/O object
23218 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23219 + * @token:     Token of DPRC object
23220 + * @irq_index: The interrupt index to configure
23221 + * @mask:      event mask to trigger interrupt;
23222 + *                     each bit:
23223 + *                             0 = ignore event
23224 + *                             1 = consider event for asserting IRQ
23225 + *
23226 + * Every interrupt can have up to 32 causes and the interrupt model supports
23227 + * masking/unmasking each cause independently
23228 + *
23229 + * Return:     '0' on Success; Error code otherwise.
23230 + */
23231 +int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
23232 +                     uint32_t          cmd_flags,
23233 +                     uint16_t          token,
23234 +                     uint8_t           irq_index,
23235 +                     uint32_t          mask);
23236 +
23237 +/**
23238 + * dprc_get_irq_mask() - Get interrupt mask.
23239 + * @mc_io:     Pointer to MC portal's I/O object
23240 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23241 + * @token:     Token of DPRC object
23242 + * @irq_index: The interrupt index to configure
23243 + * @mask:      Returned event mask to trigger interrupt
23244 + *
23245 + * Every interrupt can have up to 32 causes and the interrupt model supports
23246 + * masking/unmasking each cause independently
23247 + *
23248 + * Return:     '0' on Success; Error code otherwise.
23249 + */
23250 +int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
23251 +                     uint32_t          cmd_flags,
23252 +                     uint16_t          token,
23253 +                     uint8_t           irq_index,
23254 +                     uint32_t          *mask);
23255 +
23256 +/**
23257 + * dprc_get_irq_status() - Get the current status of any pending interrupts.
23258 + * @mc_io:     Pointer to MC portal's I/O object
23259 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23260 + * @token:     Token of DPRC object
23261 + * @irq_index: The interrupt index to configure
23262 + * @status:    Returned interrupts status - one bit per cause:
23263 + *                     0 = no interrupt pending
23264 + *                     1 = interrupt pending
23265 + *
23266 + * Return:     '0' on Success; Error code otherwise.
23267 + */
23268 +int dprc_get_irq_status(struct fsl_mc_io       *mc_io,
23269 +                       uint32_t                cmd_flags,
23270 +                       uint16_t                token,
23271 +                       uint8_t                 irq_index,
23272 +                       uint32_t                *status);
23273 +
23274 +/**
23275 + * dprc_clear_irq_status() - Clear a pending interrupt's status
23276 + * @mc_io:     Pointer to MC portal's I/O object
23277 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23278 + * @token:     Token of DPRC object
23279 + * @irq_index: The interrupt index to configure
23280 + * @status:    bits to clear (W1C) - one bit per cause:
23281 + *                                     0 = don't change
23282 + *                                     1 = clear status bit
23283 + *
23284 + * Return:     '0' on Success; Error code otherwise.
23285 + */
23286 +int dprc_clear_irq_status(struct fsl_mc_io     *mc_io,
23287 +                         uint32_t              cmd_flags,
23288 +                         uint16_t              token,
23289 +                         uint8_t               irq_index,
23290 +                         uint32_t              status);
23291 +
23292 +/**
23293 + * struct dprc_attributes - Container attributes
23294 + * @container_id: Container's ID
23295 + * @icid: Container's ICID
23296 + * @portal_id: Container's portal ID
23297 + * @options: Container's options as set at container's creation
23298 + * @version: DPRC version
23299 + */
23300 +struct dprc_attributes {
23301 +       int             container_id;
23302 +       uint16_t        icid;
23303 +       int             portal_id;
23304 +       uint64_t        options;
23305 +       /**
23306 +        * struct version - DPRC version
23307 +        * @major: DPRC major version
23308 +        * @minor: DPRC minor version
23309 +        */
23310 +       struct {
23311 +               uint16_t major;
23312 +               uint16_t minor;
23313 +       } version;
23314 +};
23315 +
23316 +/**
23317 + * dprc_get_attributes() - Obtains container attributes
23318 + * @mc_io:     Pointer to MC portal's I/O object
23319 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23320 + * @token:     Token of DPRC object
23321 + * @attributes:        Returned container attributes
23322 + *
23323 + * Return:     '0' on Success; Error code otherwise.
23324 + */
23325 +int dprc_get_attributes(struct fsl_mc_io       *mc_io,
23326 +                       uint32_t                cmd_flags,
23327 +                       uint16_t                token,
23328 +                       struct dprc_attributes  *attributes);
23329 +
23330 +/**
23331 + * dprc_set_res_quota() - Set allocation policy for a specific resource/object
23332 + *             type in a child container
23333 + * @mc_io:     Pointer to MC portal's I/O object
23334 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23335 + * @token:     Token of DPRC object
23336 + * @child_container_id:        ID of the child container
23337 + * @type:      Resource/object type
23338 + * @quota:     Sets the maximum number of resources of the selected type
23339 + *             that the child container is allowed to allocate from its parent;
23340 + *             when quota is set to -1, the policy is the same as container's
23341 + *             general policy.
23342 + *
23343 + * Allocation policy determines whether or not a container may allocate
23344 + * resources from its parent. Each container has a 'global' allocation policy
23345 + * that is set when the container is created.
23346 + *
23347 + * This function sets allocation policy for a specific resource type.
23348 + * The default policy for all resource types matches the container's 'global'
23349 + * allocation policy.
23350 + *
23351 + * Return:     '0' on Success; Error code otherwise.
23352 + *
23353 + * @warning    Only the parent container is allowed to change a child policy.
23354 + */
23355 +int dprc_set_res_quota(struct fsl_mc_io *mc_io,
23356 +                      uint32_t cmd_flags,
23357 +                      uint16_t         token,
23358 +                      int              child_container_id,
23359 +                      char             *type,
23360 +                      uint16_t         quota);
23361 +
23362 +/**
23363 + * dprc_get_res_quota() - Gets the allocation policy of a specific
23364 + *             resource/object type in a child container
23365 + * @mc_io:     Pointer to MC portal's I/O object
23366 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23367 + * @token:     Token of DPRC object
23368 + * @child_container_id:        ID of the child container
23369 + * @type:      resource/object type
23370 + * @quota:     Returnes the maximum number of resources of the selected type
23371 + *             that the child container is allowed to allocate from the parent;
23372 + *             when quota is set to -1, the policy is the same as container's
23373 + *             general policy.
23374 + *
23375 + * Return:     '0' on Success; Error code otherwise.
23376 + */
23377 +int dprc_get_res_quota(struct fsl_mc_io *mc_io,
23378 +                      uint32_t cmd_flags,
23379 +                      uint16_t         token,
23380 +                      int              child_container_id,
23381 +                      char             *type,
23382 +                      uint16_t         *quota);
23383 +
23384 +/* Resource request options */
23385 +
23386 +/**
23387 + * Explicit resource ID request - The requested objects/resources
23388 + * are explicit and sequential (in case of resources).
23389 + * The base ID is given at res_req at base_align field
23390 + */
23391 +#define DPRC_RES_REQ_OPT_EXPLICIT              0x00000001
23392 +
23393 +/**
23394 + * Aligned resources request - Relevant only for resources
23395 + * request (and not objects). Indicates that resources base ID should be
23396 + * sequential and aligned to the value given at dprc_res_req base_align field
23397 + */
23398 +#define DPRC_RES_REQ_OPT_ALIGNED               0x00000002
23399 +
23400 +/**
23401 + * Plugged Flag - Relevant only for object assignment request.
23402 + * Indicates that after all objects assigned. An interrupt will be invoked at
23403 + * the relevant GPP. The assigned object will be marked as plugged.
23404 + * plugged objects can't be assigned from their container
23405 + */
23406 +#define DPRC_RES_REQ_OPT_PLUGGED               0x00000004
23407 +
23408 +/**
23409 + * struct dprc_res_req - Resource request descriptor, to be used in assignment
23410 + *                     or un-assignment of resources and objects.
23411 + * @type: Resource/object type: Represent as a NULL terminated string.
23412 + *     This string may received by using dprc_get_pool() to get resource
23413 + *     type and dprc_get_obj() to get object type;
23414 + *     Note: it is not possible to assign/un-assign DPRC objects
23415 + * @num: Number of resources
23416 + * @options: Request options: combination of DPRC_RES_REQ_OPT_ options
23417 + * @id_base_align: In case of explicit assignment (DPRC_RES_REQ_OPT_EXPLICIT
23418 + *             is set at option), this field represents the required base ID
23419 + *             for resource allocation; In case of aligned assignment
23420 + *             (DPRC_RES_REQ_OPT_ALIGNED is set at option), this field
23421 + *             indicates the required alignment for the resource ID(s) -
23422 + *             use 0 if there is no alignment or explicit ID requirements
23423 + */
23424 +struct dprc_res_req {
23425 +       char            type[16];
23426 +       uint32_t        num;
23427 +       uint32_t        options;
23428 +       int             id_base_align;
23429 +};
23430 +
23431 +/**
23432 + * dprc_assign() - Assigns objects or resource to a child container.
23433 + * @mc_io:     Pointer to MC portal's I/O object
23434 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23435 + * @token:     Token of DPRC object
23436 + * @container_id: ID of the child container
23437 + * @res_req:   Describes the type and amount of resources to
23438 + *                     assign to the given container
23439 + *
23440 + * Assignment is usually done by a parent (this DPRC) to one of its child
23441 + * containers.
23442 + *
23443 + * According to the DPRC allocation policy, the assigned resources may be taken
23444 + * (allocated) from the container's ancestors, if not enough resources are
23445 + * available in the container itself.
23446 + *
23447 + * The type of assignment depends on the dprc_res_req options, as follows:
23448 + * - DPRC_RES_REQ_OPT_EXPLICIT: indicates that assigned resources should have
23449 + *   the explicit base ID specified at the id_base_align field of res_req.
23450 + * - DPRC_RES_REQ_OPT_ALIGNED: indicates that the assigned resources should be
23451 + *   aligned to the value given at id_base_align field of res_req.
23452 + * - DPRC_RES_REQ_OPT_PLUGGED: Relevant only for object assignment,
23453 + *   and indicates that the object must be set to the plugged state.
23454 + *
23455 + * A container may use this function with its own ID in order to change a
23456 + * object state to plugged or unplugged.
23457 + *
23458 + * If IRQ information has been set in the child DPRC, it will signal an
23459 + * interrupt following every change in its object assignment.
23460 + *
23461 + * Return:     '0' on Success; Error code otherwise.
23462 + */
23463 +int dprc_assign(struct fsl_mc_io       *mc_io,
23464 +               uint32_t                cmd_flags,
23465 +               uint16_t                token,
23466 +               int                     container_id,
23467 +               struct dprc_res_req     *res_req);
23468 +
23469 +/**
23470 + * dprc_unassign() - Un-assigns objects or resources from a child container
23471 + *             and moves them into this (parent) DPRC.
23472 + * @mc_io:     Pointer to MC portal's I/O object
23473 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23474 + * @token:     Token of DPRC object
23475 + * @child_container_id:        ID of the child container
23476 + * @res_req:   Describes the type and amount of resources to un-assign from
23477 + *             the child container
23478 + *
23479 + * Un-assignment of objects can succeed only if the object is not in the
23480 + * plugged or opened state.
23481 + *
23482 + * Return:     '0' on Success; Error code otherwise.
23483 + */
23484 +int dprc_unassign(struct fsl_mc_io     *mc_io,
23485 +                 uint32_t              cmd_flags,
23486 +                 uint16_t              token,
23487 +                 int                   child_container_id,
23488 +                 struct dprc_res_req   *res_req);
23489 +
23490 +/**
23491 + * dprc_get_pool_count() - Get the number of dprc's pools
23492 + * @mc_io:     Pointer to MC portal's I/O object
23493 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23494 + * @token:     Token of DPRC object
23495 + * @pool_count:        Returned number of resource pools in the dprc
23496 + *
23497 + * Return:     '0' on Success; Error code otherwise.
23498 + */
23499 +int dprc_get_pool_count(struct fsl_mc_io       *mc_io,
23500 +                       uint32_t                cmd_flags,
23501 +                       uint16_t                token,
23502 +                       int                     *pool_count);
23503 +
23504 +/**
23505 + * dprc_get_pool() - Get the type (string) of a certain dprc's pool
23506 + * @mc_io:     Pointer to MC portal's I/O object
23507 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23508 + * @token:     Token of DPRC object
23509 + * @pool_index:        Index of the pool to be queried (< pool_count)
23510 + * @type:      The type of the pool
23511 + *
23512 + * The pool types retrieved one by one by incrementing
23513 + * pool_index up to (not including) the value of pool_count returned
23514 + * from dprc_get_pool_count(). dprc_get_pool_count() must
23515 + * be called prior to dprc_get_pool().
23516 + *
23517 + * Return:     '0' on Success; Error code otherwise.
23518 + */
23519 +int dprc_get_pool(struct fsl_mc_io     *mc_io,
23520 +                 uint32_t              cmd_flags,
23521 +                 uint16_t              token,
23522 +                 int                   pool_index,
23523 +                 char                  *type);
23524 +
23525 +/**
23526 + * dprc_get_obj_count() - Obtains the number of objects in the DPRC
23527 + * @mc_io:     Pointer to MC portal's I/O object
23528 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23529 + * @token:     Token of DPRC object
23530 + * @obj_count: Number of objects assigned to the DPRC
23531 + *
23532 + * Return:     '0' on Success; Error code otherwise.
23533 + */
23534 +int dprc_get_obj_count(struct fsl_mc_io        *mc_io,
23535 +                      uint32_t         cmd_flags,
23536 +                      uint16_t         token,
23537 +                      int                      *obj_count);
23538 +
23539 +/**
23540 + * Objects Attributes Flags
23541 + */
23542 +
23543 +/**
23544 + * Opened state - Indicates that an object is open by at least one owner
23545 + */
23546 +#define DPRC_OBJ_STATE_OPEN            0x00000001
23547 +/**
23548 + * Plugged state - Indicates that the object is plugged
23549 + */
23550 +#define DPRC_OBJ_STATE_PLUGGED         0x00000002
23551 +
23552 +/**
23553 + * Shareability flag - Object flag indicating no memory shareability.
23554 + *  the object generates memory accesses that are non coherent with other
23555 + *  masters;
23556 + *  user is responsible for proper memory handling through IOMMU configuration.
23557 + */
23558 +#define DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY              0x0001
23559 +
23560 +/**
23561 + * struct dprc_obj_desc - Object descriptor, returned from dprc_get_obj()
23562 + * @type: Type of object: NULL terminated string
23563 + * @id: ID of logical object resource
23564 + * @vendor: Object vendor identifier
23565 + * @ver_major: Major version number
23566 + * @ver_minor:  Minor version number
23567 + * @irq_count: Number of interrupts supported by the object
23568 + * @region_count: Number of mappable regions supported by the object
23569 + * @state: Object state: combination of DPRC_OBJ_STATE_ states
23570 + * @label: Object label
23571 + * @flags: Object's flags
23572 + */
23573 +struct dprc_obj_desc {
23574 +       char            type[16];
23575 +       int             id;
23576 +       uint16_t        vendor;
23577 +       uint16_t        ver_major;
23578 +       uint16_t        ver_minor;
23579 +       uint8_t irq_count;
23580 +       uint8_t region_count;
23581 +       uint32_t        state;
23582 +       char            label[16];
23583 +       uint16_t        flags;
23584 +};
23585 +
23586 +/**
23587 + * dprc_get_obj() - Get general information on an object
23588 + * @mc_io:     Pointer to MC portal's I/O object
23589 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23590 + * @token:     Token of DPRC object
23591 + * @obj_index: Index of the object to be queried (< obj_count)
23592 + * @obj_desc:  Returns the requested object descriptor
23593 + *
23594 + * The object descriptors are retrieved one by one by incrementing
23595 + * obj_index up to (not including) the value of obj_count returned
23596 + * from dprc_get_obj_count(). dprc_get_obj_count() must
23597 + * be called prior to dprc_get_obj().
23598 + *
23599 + * Return:     '0' on Success; Error code otherwise.
23600 + */
23601 +int dprc_get_obj(struct fsl_mc_io      *mc_io,
23602 +                uint32_t               cmd_flags,
23603 +                uint16_t               token,
23604 +                int                    obj_index,
23605 +                struct dprc_obj_desc   *obj_desc);
23606 +
23607 +/**
23608 + * dprc_get_obj_desc() - Get object descriptor.
23609 + *
23610 + * @mc_io:     Pointer to MC portal's I/O object
23611 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23612 + * @token:     Token of DPRC object
23613 + * @obj_type:  The type of the object to get its descriptor.
23614 + * @obj_id:    The id of the object to get its descriptor
23615 + * @obj_desc:  The returned descriptor to fill and return to the user
23616 + *
23617 + * Return:     '0' on Success; Error code otherwise.
23618 + *
23619 + */
23620 +int dprc_get_obj_desc(struct fsl_mc_io         *mc_io,
23621 +                     uint32_t          cmd_flags,
23622 +                       uint16_t                token,
23623 +                       char                    *obj_type,
23624 +                       int                     obj_id,
23625 +                       struct dprc_obj_desc    *obj_desc);
23626 +
23627 +/**
23628 + * dprc_set_obj_irq() - Set IRQ information for object to trigger an interrupt.
23629 + * @mc_io:     Pointer to MC portal's I/O object
23630 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23631 + * @token:     Token of DPRC object
23632 + * @obj_type:  Type of the object to set its IRQ
23633 + * @obj_id:    ID of the object to set its IRQ
23634 + * @irq_index: The interrupt index to configure
23635 + * @irq_cfg:   IRQ configuration
23636 + *
23637 + * Return:     '0' on Success; Error code otherwise.
23638 + */
23639 +int dprc_set_obj_irq(struct fsl_mc_io          *mc_io,
23640 +                    uint32_t                   cmd_flags,
23641 +                    uint16_t                   token,
23642 +                    char                       *obj_type,
23643 +                    int                        obj_id,
23644 +                    uint8_t                    irq_index,
23645 +                    struct dprc_irq_cfg        *irq_cfg);
23646 +
23647 +/**
23648 + * dprc_get_obj_irq() - Get IRQ information from object.
23649 + * @mc_io:     Pointer to MC portal's I/O object
23650 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23651 + * @token:     Token of DPRC object
23652 + * @obj_type:  Type od the object to get its IRQ
23653 + * @obj_id:    ID of the object to get its IRQ
23654 + * @irq_index: The interrupt index to configure
23655 + * @type:      Interrupt type: 0 represents message interrupt
23656 + *             type (both irq_addr and irq_val are valid)
23657 + * @irq_cfg:   The returned IRQ attributes
23658 + *
23659 + * Return:     '0' on Success; Error code otherwise.
23660 + */
23661 +int dprc_get_obj_irq(struct fsl_mc_io          *mc_io,
23662 +                    uint32_t                   cmd_flags,
23663 +                    uint16_t                   token,
23664 +                    char                       *obj_type,
23665 +                    int                        obj_id,
23666 +                    uint8_t                    irq_index,
23667 +                    int                        *type,
23668 +                    struct dprc_irq_cfg        *irq_cfg);
23669 +
23670 +/**
23671 + * dprc_get_res_count() - Obtains the number of free resources that are
23672 + *             assigned to this container, by pool type
23673 + * @mc_io:     Pointer to MC portal's I/O object
23674 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23675 + * @token:     Token of DPRC object
23676 + * @type:      pool type
23677 + * @res_count: Returned number of free resources of the given
23678 + *                     resource type that are assigned to this DPRC
23679 + *
23680 + * Return:     '0' on Success; Error code otherwise.
23681 + */
23682 +int dprc_get_res_count(struct fsl_mc_io *mc_io,
23683 +                      uint32_t cmd_flags,
23684 +                      uint16_t         token,
23685 +                      char             *type,
23686 +                      int              *res_count);
23687 +
23688 +/**
23689 + * enum dprc_iter_status - Iteration status
23690 + * @DPRC_ITER_STATUS_FIRST: Perform first iteration
23691 + * @DPRC_ITER_STATUS_MORE: Indicates more/next iteration is needed
23692 + * @DPRC_ITER_STATUS_LAST: Indicates last iteration
23693 + */
23694 +enum dprc_iter_status {
23695 +       DPRC_ITER_STATUS_FIRST = 0,
23696 +       DPRC_ITER_STATUS_MORE = 1,
23697 +       DPRC_ITER_STATUS_LAST = 2
23698 +};
23699 +
23700 +/**
23701 + * struct dprc_res_ids_range_desc - Resource ID range descriptor
23702 + * @base_id: Base resource ID of this range
23703 + * @last_id: Last resource ID of this range
23704 + * @iter_status: Iteration status - should be set to DPRC_ITER_STATUS_FIRST at
23705 + *     first iteration; while the returned marker is DPRC_ITER_STATUS_MORE,
23706 + *     additional iterations are needed, until the returned marker is
23707 + *     DPRC_ITER_STATUS_LAST
23708 + */
23709 +struct dprc_res_ids_range_desc {
23710 +       int                     base_id;
23711 +       int                     last_id;
23712 +       enum dprc_iter_status   iter_status;
23713 +};
23714 +
23715 +/**
23716 + * dprc_get_res_ids() - Obtains IDs of free resources in the container
23717 + * @mc_io:     Pointer to MC portal's I/O object
23718 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23719 + * @token:     Token of DPRC object
23720 + * @type:      pool type
23721 + * @range_desc:        range descriptor
23722 + *
23723 + * Return:     '0' on Success; Error code otherwise.
23724 + */
23725 +int dprc_get_res_ids(struct fsl_mc_io                  *mc_io,
23726 +                    uint32_t                           cmd_flags,
23727 +                    uint16_t                           token,
23728 +                    char                               *type,
23729 +                    struct dprc_res_ids_range_desc     *range_desc);
23730 +
23731 +/**
23732 + * Region flags
23733 + */
23734 +/**
23735 + * Cacheable - Indicates that region should be mapped as cacheable
23736 + */
23737 +#define DPRC_REGION_CACHEABLE  0x00000001
23738 +
23739 +/**
23740 + * enum dprc_region_type - Region type
23741 + * @DPRC_REGION_TYPE_MC_PORTAL: MC portal region
23742 + * @DPRC_REGION_TYPE_QBMAN_PORTAL: Qbman portal region
23743 + */
23744 +enum dprc_region_type {
23745 +       DPRC_REGION_TYPE_MC_PORTAL,
23746 +       DPRC_REGION_TYPE_QBMAN_PORTAL
23747 +};
23748 +
23749 +/**
23750 + * struct dprc_region_desc - Mappable region descriptor
23751 + * @base_offset: Region offset from region's base address.
23752 + *     For DPMCP and DPRC objects, region base is offset from SoC MC portals
23753 + *     base address; For DPIO, region base is offset from SoC QMan portals
23754 + *     base address
23755 + * @size: Region size (in bytes)
23756 + * @flags: Region attributes
23757 + * @type: Portal region type
23758 + */
23759 +struct dprc_region_desc {
23760 +       uint32_t                base_offset;
23761 +       uint32_t                size;
23762 +       uint32_t                flags;
23763 +       enum dprc_region_type   type;
23764 +};
23765 +
23766 +/**
23767 + * dprc_get_obj_region() - Get region information for a specified object.
23768 + * @mc_io:     Pointer to MC portal's I/O object
23769 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23770 + * @token:     Token of DPRC object
23771 + * @obj_type:  Object type as returned in dprc_get_obj()
23772 + * @obj_id:    Unique object instance as returned in dprc_get_obj()
23773 + * @region_index: The specific region to query
23774 + * @region_desc:  Returns the requested region descriptor
23775 + *
23776 + * Return:     '0' on Success; Error code otherwise.
23777 + */
23778 +int dprc_get_obj_region(struct fsl_mc_io       *mc_io,
23779 +                       uint32_t                cmd_flags,
23780 +                       uint16_t                token,
23781 +                       char                    *obj_type,
23782 +                       int                     obj_id,
23783 +                       uint8_t                 region_index,
23784 +                       struct dprc_region_desc *region_desc);
23785 +
23786 +/**
23787 + * dprc_set_obj_label() - Set object label.
23788 + * @mc_io:     Pointer to MC portal's I/O object
23789 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23790 + * @token:     Token of DPRC object
23791 + * @obj_type:  Object's type
23792 + * @obj_id:    Object's ID
23793 + * @label:     The required label. The maximum length is 16 chars.
23794 + *
23795 + * Return:     '0' on Success; Error code otherwise.
23796 + */
23797 +int dprc_set_obj_label(struct fsl_mc_io        *mc_io,
23798 +                      uint32_t         cmd_flags,
23799 +                      uint16_t         token,
23800 +                      char                     *obj_type,
23801 +                      int                      obj_id,
23802 +                      char                     *label);
23803 +
23804 +/**
23805 + * struct dprc_endpoint - Endpoint description for link connect/disconnect
23806 + *                     operations
23807 + * @type: Endpoint object type: NULL terminated string
23808 + * @id: Endpoint object ID
23809 + * @if_id: Interface ID; should be set for endpoints with multiple
23810 + *             interfaces ("dpsw", "dpdmux"); for others, always set to 0
23811 + */
23812 +struct dprc_endpoint {
23813 +       char            type[16];
23814 +       int             id;
23815 +       uint16_t        if_id;
23816 +};
23817 +
23818 +/**
23819 + * struct dprc_connection_cfg - Connection configuration.
23820 + *                             Used for virtual connections only
23821 + * @committed_rate: Committed rate (Mbits/s)
23822 + * @max_rate: Maximum rate (Mbits/s)
23823 + */
23824 +struct dprc_connection_cfg {
23825 +       uint32_t committed_rate;
23826 +       uint32_t max_rate;
23827 +};
23828 +
23829 +/**
23830 + * dprc_connect() - Connect two endpoints to create a network link between them
23831 + * @mc_io:     Pointer to MC portal's I/O object
23832 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23833 + * @token:     Token of DPRC object
23834 + * @endpoint1: Endpoint 1 configuration parameters
23835 + * @endpoint2: Endpoint 2 configuration parameters
23836 + * @cfg: Connection configuration. The connection configuration is ignored for
23837 + *     connections made to DPMAC objects, where rate is retrieved from the
23838 + *     MAC configuration.
23839 + *
23840 + * Return:     '0' on Success; Error code otherwise.
23841 + */
23842 +int dprc_connect(struct fsl_mc_io                      *mc_io,
23843 +                uint32_t                               cmd_flags,
23844 +                uint16_t                               token,
23845 +                const struct dprc_endpoint             *endpoint1,
23846 +                const struct dprc_endpoint             *endpoint2,
23847 +                const struct dprc_connection_cfg       *cfg);
23848 +
23849 +/**
23850 + * dprc_disconnect() - Disconnect one endpoint to remove its network connection
23851 + * @mc_io:     Pointer to MC portal's I/O object
23852 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
23853 + * @token:     Token of DPRC object
23854 + * @endpoint:  Endpoint configuration parameters
23855 + *
23856 + * Return:     '0' on Success; Error code otherwise.
23857 + */
23858 +int dprc_disconnect(struct fsl_mc_io           *mc_io,
23859 +                   uint32_t                    cmd_flags,
23860 +                   uint16_t                    token,
23861 +                   const struct dprc_endpoint  *endpoint);
23862 +
23863 +/**
23864 +* dprc_get_connection() - Get connected endpoint and link status if connection
23865 +*                      exists.
23866 +* @mc_io:      Pointer to MC portal's I/O object
23867 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
23868 +* @token:      Token of DPRC object
23869 +* @endpoint1:  Endpoint 1 configuration parameters
23870 +* @endpoint2:  Returned endpoint 2 configuration parameters
23871 +* @state:      Returned link state:
23872 +*           1 - link is up;
23873 +*           0 - link is down;
23874 +*           -1 - no connection (endpoint2 information is irrelevant)
23875 +*
23876 +* Return:     '0' on Success; -ENAVAIL if connection does not exist.
23877 +*/
23878 +int dprc_get_connection(struct fsl_mc_io               *mc_io,
23879 +                       uint32_t                        cmd_flags,
23880 +                       uint16_t                        token,
23881 +                       const struct dprc_endpoint      *endpoint1,
23882 +                       struct dprc_endpoint            *endpoint2,
23883 +                       int                             *state);
23884 +
23885 +#endif /* _FSL_DPRC_H */
23886 diff --git a/drivers/net/dpaa2/mc/fsl_dprc_cmd.h b/drivers/net/dpaa2/mc/fsl_dprc_cmd.h
23887 new file mode 100644
23888 index 0000000..469e286
23889 --- /dev/null
23890 +++ b/drivers/net/dpaa2/mc/fsl_dprc_cmd.h
23891 @@ -0,0 +1,755 @@
23892 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
23893 + *
23894 + * Redistribution and use in source and binary forms, with or without
23895 + * modification, are permitted provided that the following conditions are met:
23896 + *     * Redistributions of source code must retain the above copyright
23897 + *       notice, this list of conditions and the following disclaimer.
23898 + *     * Redistributions in binary form must reproduce the above copyright
23899 + *       notice, this list of conditions and the following disclaimer in the
23900 + *       documentation and/or other materials provided with the distribution.
23901 + * * Neither the name of the above-listed copyright holders nor the
23902 + * names of any contributors may be used to endorse or promote products
23903 + *       derived from this software without specific prior written permission.
23904 + *
23905 + *
23906 + * ALTERNATIVELY, this software may be distributed under the terms of the
23907 + * GNU General Public License ("GPL") as published by the Free Software
23908 + * Foundation, either version 2 of that License or (at your option) any
23909 + * later version.
23910 + *
23911 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23912 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23913 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23914 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
23915 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23916 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23917 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23918 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23919 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
23920 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
23921 + * POSSIBILITY OF SUCH DAMAGE.
23922 + */
23923 +#ifndef _FSL_DPRC_CMD_H
23924 +#define _FSL_DPRC_CMD_H
23925 +
23926 +/* DPRC Version */
23927 +#define DPRC_VER_MAJOR                         5
23928 +#define DPRC_VER_MINOR                         1
23929 +
23930 +/* Command IDs */
23931 +#define DPRC_CMDID_CLOSE                       0x800
23932 +#define DPRC_CMDID_OPEN                                0x805
23933 +#define DPRC_CMDID_CREATE                      0x905
23934 +
23935 +#define DPRC_CMDID_GET_ATTR                    0x004
23936 +#define DPRC_CMDID_RESET_CONT                  0x005
23937 +
23938 +#define DPRC_CMDID_SET_IRQ                     0x010
23939 +#define DPRC_CMDID_GET_IRQ                     0x011
23940 +#define DPRC_CMDID_SET_IRQ_ENABLE              0x012
23941 +#define DPRC_CMDID_GET_IRQ_ENABLE              0x013
23942 +#define DPRC_CMDID_SET_IRQ_MASK                        0x014
23943 +#define DPRC_CMDID_GET_IRQ_MASK                        0x015
23944 +#define DPRC_CMDID_GET_IRQ_STATUS              0x016
23945 +#define DPRC_CMDID_CLEAR_IRQ_STATUS            0x017
23946 +
23947 +#define DPRC_CMDID_CREATE_CONT                 0x151
23948 +#define DPRC_CMDID_DESTROY_CONT                        0x152
23949 +#define DPRC_CMDID_GET_CONT_ID                 0x830
23950 +#define DPRC_CMDID_SET_RES_QUOTA               0x155
23951 +#define DPRC_CMDID_GET_RES_QUOTA               0x156
23952 +#define DPRC_CMDID_ASSIGN                      0x157
23953 +#define DPRC_CMDID_UNASSIGN                    0x158
23954 +#define DPRC_CMDID_GET_OBJ_COUNT               0x159
23955 +#define DPRC_CMDID_GET_OBJ                     0x15A
23956 +#define DPRC_CMDID_GET_RES_COUNT               0x15B
23957 +#define DPRC_CMDID_GET_RES_IDS                 0x15C
23958 +#define DPRC_CMDID_GET_OBJ_REG                 0x15E
23959 +#define DPRC_CMDID_SET_OBJ_IRQ                 0x15F
23960 +#define DPRC_CMDID_GET_OBJ_IRQ                 0x160
23961 +#define DPRC_CMDID_SET_OBJ_LABEL               0x161
23962 +#define DPRC_CMDID_GET_OBJ_DESC                        0x162
23963 +
23964 +#define DPRC_CMDID_CONNECT                     0x167
23965 +#define DPRC_CMDID_DISCONNECT                  0x168
23966 +#define DPRC_CMDID_GET_POOL                    0x169
23967 +#define DPRC_CMDID_GET_POOL_COUNT              0x16A
23968 +
23969 +#define DPRC_CMDID_GET_CONNECTION              0x16C
23970 +
23971 +/*                cmd, param, offset, width, type, arg_name */
23972 +#define DPRC_RSP_GET_CONTAINER_ID(cmd, container_id) \
23973 +       MC_RSP_OP(cmd, 0, 0,  32,  int,     container_id)
23974 +
23975 +/*                cmd, param, offset, width, type, arg_name */
23976 +#define DPRC_CMD_OPEN(cmd, container_id) \
23977 +       MC_CMD_OP(cmd, 0, 0,  32, int,      container_id)
23978 +
23979 +/*                cmd, param, offset, width, type, arg_name */
23980 +#define DPRC_CMD_CREATE_CONTAINER(cmd, cfg) \
23981 +do { \
23982 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, cfg->icid); \
23983 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, cfg->options); \
23984 +       MC_CMD_OP(cmd, 1, 32, 32, int,      cfg->portal_id); \
23985 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     cfg->label[0]);\
23986 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     cfg->label[1]);\
23987 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     cfg->label[2]);\
23988 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     cfg->label[3]);\
23989 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     cfg->label[4]);\
23990 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     cfg->label[5]);\
23991 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     cfg->label[6]);\
23992 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     cfg->label[7]);\
23993 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     cfg->label[8]);\
23994 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     cfg->label[9]);\
23995 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     cfg->label[10]);\
23996 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     cfg->label[11]);\
23997 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     cfg->label[12]);\
23998 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     cfg->label[13]);\
23999 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     cfg->label[14]);\
24000 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     cfg->label[15]);\
24001 +} while (0)
24002 +
24003 +/*                cmd, param, offset, width, type, arg_name */
24004 +#define DPRC_RSP_CREATE_CONTAINER(cmd, child_container_id, child_portal_offset)\
24005 +do { \
24006 +       MC_RSP_OP(cmd, 1, 0,  32, int,     child_container_id); \
24007 +       MC_RSP_OP(cmd, 2, 0,  64, uint64_t, child_portal_offset);\
24008 +} while (0)
24009 +
24010 +/*                cmd, param, offset, width, type, arg_name */
24011 +#define DPRC_CMD_DESTROY_CONTAINER(cmd, child_container_id) \
24012 +       MC_CMD_OP(cmd, 0, 0,  32, int,      child_container_id)
24013 +
24014 +/*                cmd, param, offset, width, type, arg_name */
24015 +#define DPRC_CMD_RESET_CONTAINER(cmd, child_container_id) \
24016 +       MC_CMD_OP(cmd, 0, 0,  32, int,      child_container_id)
24017 +
24018 +/*                cmd, param, offset, width, type, arg_name */
24019 +#define DPRC_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
24020 +do { \
24021 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
24022 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
24023 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
24024 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
24025 +} while (0)
24026 +
24027 +/*                cmd, param, offset, width, type, arg_name */
24028 +#define DPRC_CMD_GET_IRQ(cmd, irq_index) \
24029 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
24030 +
24031 +/*                cmd, param, offset, width, type, arg_name */
24032 +#define DPRC_RSP_GET_IRQ(cmd, type, irq_cfg) \
24033 +do { \
24034 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
24035 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
24036 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
24037 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
24038 +} while (0)
24039 +
24040 +/*                cmd, param, offset, width, type, arg_name */
24041 +#define DPRC_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
24042 +do { \
24043 +       MC_CMD_OP(cmd, 0, 0,  8, uint8_t, en); \
24044 +       MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
24045 +} while (0)
24046 +
24047 +/*                cmd, param, offset, width, type, arg_name */
24048 +#define DPRC_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
24049 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
24050 +
24051 +/*                cmd, param, offset, width, type, arg_name */
24052 +#define DPRC_RSP_GET_IRQ_ENABLE(cmd, en) \
24053 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
24054 +
24055 +/*                cmd, param, offset, width, type, arg_name */
24056 +#define DPRC_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
24057 +do { \
24058 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
24059 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
24060 +} while (0)
24061 +
24062 +/*                cmd, param, offset, width, type, arg_name */
24063 +#define DPRC_CMD_GET_IRQ_MASK(cmd, irq_index) \
24064 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
24065 +
24066 +/*                cmd, param, offset, width, type, arg_name */
24067 +#define DPRC_RSP_GET_IRQ_MASK(cmd, mask) \
24068 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
24069 +
24070 +/*                cmd, param, offset, width, type, arg_name */
24071 +#define DPRC_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
24072 +do { \
24073 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
24074 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
24075 +} while (0)
24076 +
24077 +/*                cmd, param, offset, width, type, arg_name */
24078 +#define DPRC_RSP_GET_IRQ_STATUS(cmd, status) \
24079 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
24080 +
24081 +/*                cmd, param, offset, width, type, arg_name */
24082 +#define DPRC_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
24083 +do { \
24084 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
24085 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
24086 +} while (0)
24087 +
24088 +/*                cmd, param, offset, width, type, arg_name */
24089 +#define DPRC_RSP_GET_ATTRIBUTES(cmd, attr) \
24090 +do { \
24091 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->container_id); \
24092 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->icid); \
24093 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, attr->options);\
24094 +       MC_RSP_OP(cmd, 1, 32, 32, int,      attr->portal_id); \
24095 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, attr->version.major);\
24096 +       MC_RSP_OP(cmd, 2, 16, 16, uint16_t, attr->version.minor);\
24097 +} while (0)
24098 +
24099 +/*                cmd, param, offset, width, type, arg_name */
24100 +#define DPRC_CMD_SET_RES_QUOTA(cmd, child_container_id, type, quota) \
24101 +do { \
24102 +       MC_CMD_OP(cmd, 0, 0,  32, int,      child_container_id); \
24103 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, quota);\
24104 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     type[0]);\
24105 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     type[1]);\
24106 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     type[2]);\
24107 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     type[3]);\
24108 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     type[4]);\
24109 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     type[5]);\
24110 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     type[6]);\
24111 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     type[7]);\
24112 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     type[8]);\
24113 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     type[9]);\
24114 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     type[10]);\
24115 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     type[11]);\
24116 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     type[12]);\
24117 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     type[13]);\
24118 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     type[14]);\
24119 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     type[15]);\
24120 +} while (0)
24121 +
24122 +/*                cmd, param, offset, width, type, arg_name */
24123 +#define DPRC_CMD_GET_RES_QUOTA(cmd, child_container_id, type) \
24124 +do { \
24125 +       MC_CMD_OP(cmd, 0, 0,  32, int,      child_container_id); \
24126 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     type[0]);\
24127 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     type[1]);\
24128 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     type[2]);\
24129 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     type[3]);\
24130 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     type[4]);\
24131 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     type[5]);\
24132 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     type[6]);\
24133 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     type[7]);\
24134 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     type[8]);\
24135 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     type[9]);\
24136 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     type[10]);\
24137 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     type[11]);\
24138 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     type[12]);\
24139 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     type[13]);\
24140 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     type[14]);\
24141 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     type[15]);\
24142 +} while (0)
24143 +/*                cmd, param, offset, width, type, arg_name */
24144 +#define DPRC_RSP_GET_RES_QUOTA(cmd, quota) \
24145 +       MC_RSP_OP(cmd,    0,    32,     16,     uint16_t, quota)
24146 +
24147 +/*     param, offset, width,   type,           arg_name */
24148 +#define DPRC_CMD_ASSIGN(cmd, container_id, res_req) \
24149 +do { \
24150 +       MC_CMD_OP(cmd, 0, 0,  32, int,      container_id); \
24151 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, res_req->options);\
24152 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, res_req->num); \
24153 +       MC_CMD_OP(cmd, 1, 32, 32, int,      res_req->id_base_align); \
24154 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     res_req->type[0]);\
24155 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     res_req->type[1]);\
24156 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     res_req->type[2]);\
24157 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     res_req->type[3]);\
24158 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     res_req->type[4]);\
24159 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     res_req->type[5]);\
24160 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     res_req->type[6]);\
24161 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     res_req->type[7]);\
24162 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     res_req->type[8]);\
24163 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     res_req->type[9]);\
24164 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     res_req->type[10]);\
24165 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     res_req->type[11]);\
24166 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     res_req->type[12]);\
24167 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     res_req->type[13]);\
24168 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     res_req->type[14]);\
24169 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     res_req->type[15]);\
24170 +} while (0)
24171 +
24172 +/*     param, offset, width,   type,           arg_name */
24173 +#define DPRC_CMD_UNASSIGN(cmd, child_container_id, res_req) \
24174 +do { \
24175 +       MC_CMD_OP(cmd, 0, 0,  32, int,      child_container_id); \
24176 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, res_req->options);\
24177 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, res_req->num); \
24178 +       MC_CMD_OP(cmd, 1, 32, 32, int,      res_req->id_base_align); \
24179 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     res_req->type[0]);\
24180 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     res_req->type[1]);\
24181 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     res_req->type[2]);\
24182 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     res_req->type[3]);\
24183 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     res_req->type[4]);\
24184 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     res_req->type[5]);\
24185 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     res_req->type[6]);\
24186 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     res_req->type[7]);\
24187 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     res_req->type[8]);\
24188 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     res_req->type[9]);\
24189 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     res_req->type[10]);\
24190 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     res_req->type[11]);\
24191 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     res_req->type[12]);\
24192 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     res_req->type[13]);\
24193 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     res_req->type[14]);\
24194 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     res_req->type[15]);\
24195 +} while (0)
24196 +
24197 +/*                cmd, param, offset, width, type, arg_name */
24198 +#define DPRC_RSP_GET_POOL_COUNT(cmd, pool_count) \
24199 +       MC_RSP_OP(cmd, 0, 0,  32, int,      pool_count)
24200 +
24201 +/*                cmd, param, offset, width, type, arg_name */
24202 +#define DPRC_CMD_GET_POOL(cmd, pool_index) \
24203 +       MC_CMD_OP(cmd,    0,    0,      32,     int,    pool_index)
24204 +
24205 +/*                cmd, param, offset, width, type, arg_name */
24206 +#define DPRC_RSP_GET_POOL(cmd, type) \
24207 +do { \
24208 +       MC_RSP_OP(cmd, 1, 0,  8,  char,     type[0]);\
24209 +       MC_RSP_OP(cmd, 1, 8,  8,  char,     type[1]);\
24210 +       MC_RSP_OP(cmd, 1, 16, 8,  char,     type[2]);\
24211 +       MC_RSP_OP(cmd, 1, 24, 8,  char,     type[3]);\
24212 +       MC_RSP_OP(cmd, 1, 32, 8,  char,     type[4]);\
24213 +       MC_RSP_OP(cmd, 1, 40, 8,  char,     type[5]);\
24214 +       MC_RSP_OP(cmd, 1, 48, 8,  char,     type[6]);\
24215 +       MC_RSP_OP(cmd, 1, 56, 8,  char,     type[7]);\
24216 +       MC_RSP_OP(cmd, 2, 0,  8,  char,     type[8]);\
24217 +       MC_RSP_OP(cmd, 2, 8,  8,  char,     type[9]);\
24218 +       MC_RSP_OP(cmd, 2, 16, 8,  char,     type[10]);\
24219 +       MC_RSP_OP(cmd, 2, 24, 8,  char,     type[11]);\
24220 +       MC_RSP_OP(cmd, 2, 32, 8,  char,     type[12]);\
24221 +       MC_RSP_OP(cmd, 2, 40, 8,  char,     type[13]);\
24222 +       MC_RSP_OP(cmd, 2, 48, 8,  char,     type[14]);\
24223 +       MC_RSP_OP(cmd, 2, 56, 8,  char,     type[15]);\
24224 +} while (0)
24225 +
24226 +/*                cmd, param, offset, width, type, arg_name */
24227 +#define DPRC_RSP_GET_OBJ_COUNT(cmd, obj_count) \
24228 +       MC_RSP_OP(cmd, 0, 32, 32, int,      obj_count)
24229 +
24230 +/*                cmd, param, offset, width, type, arg_name */
24231 +#define DPRC_CMD_GET_OBJ(cmd, obj_index) \
24232 +       MC_CMD_OP(cmd, 0, 0,  32, int,      obj_index)
24233 +
24234 +/*                cmd, param, offset, width, type, arg_name */
24235 +#define DPRC_RSP_GET_OBJ(cmd, obj_desc) \
24236 +do { \
24237 +       MC_RSP_OP(cmd, 0, 32, 32, int,      obj_desc->id); \
24238 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, obj_desc->vendor); \
24239 +       MC_RSP_OP(cmd, 1, 16, 8,  uint8_t,  obj_desc->irq_count); \
24240 +       MC_RSP_OP(cmd, 1, 24, 8,  uint8_t,  obj_desc->region_count); \
24241 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, obj_desc->state);\
24242 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, obj_desc->ver_major);\
24243 +       MC_RSP_OP(cmd, 2, 16, 16, uint16_t, obj_desc->ver_minor);\
24244 +       MC_RSP_OP(cmd, 2, 32, 16, uint16_t, obj_desc->flags); \
24245 +       MC_RSP_OP(cmd, 3, 0,  8,  char,     obj_desc->type[0]);\
24246 +       MC_RSP_OP(cmd, 3, 8,  8,  char,     obj_desc->type[1]);\
24247 +       MC_RSP_OP(cmd, 3, 16, 8,  char,     obj_desc->type[2]);\
24248 +       MC_RSP_OP(cmd, 3, 24, 8,  char,     obj_desc->type[3]);\
24249 +       MC_RSP_OP(cmd, 3, 32, 8,  char,     obj_desc->type[4]);\
24250 +       MC_RSP_OP(cmd, 3, 40, 8,  char,     obj_desc->type[5]);\
24251 +       MC_RSP_OP(cmd, 3, 48, 8,  char,     obj_desc->type[6]);\
24252 +       MC_RSP_OP(cmd, 3, 56, 8,  char,     obj_desc->type[7]);\
24253 +       MC_RSP_OP(cmd, 4, 0,  8,  char,     obj_desc->type[8]);\
24254 +       MC_RSP_OP(cmd, 4, 8,  8,  char,     obj_desc->type[9]);\
24255 +       MC_RSP_OP(cmd, 4, 16, 8,  char,     obj_desc->type[10]);\
24256 +       MC_RSP_OP(cmd, 4, 24, 8,  char,     obj_desc->type[11]);\
24257 +       MC_RSP_OP(cmd, 4, 32, 8,  char,     obj_desc->type[12]);\
24258 +       MC_RSP_OP(cmd, 4, 40, 8,  char,     obj_desc->type[13]);\
24259 +       MC_RSP_OP(cmd, 4, 48, 8,  char,     obj_desc->type[14]);\
24260 +       MC_RSP_OP(cmd, 4, 56, 8,  char,     obj_desc->type[15]);\
24261 +       MC_RSP_OP(cmd, 5, 0,  8,  char,     obj_desc->label[0]);\
24262 +       MC_RSP_OP(cmd, 5, 8,  8,  char,     obj_desc->label[1]);\
24263 +       MC_RSP_OP(cmd, 5, 16, 8,  char,     obj_desc->label[2]);\
24264 +       MC_RSP_OP(cmd, 5, 24, 8,  char,     obj_desc->label[3]);\
24265 +       MC_RSP_OP(cmd, 5, 32, 8,  char,     obj_desc->label[4]);\
24266 +       MC_RSP_OP(cmd, 5, 40, 8,  char,     obj_desc->label[5]);\
24267 +       MC_RSP_OP(cmd, 5, 48, 8,  char,     obj_desc->label[6]);\
24268 +       MC_RSP_OP(cmd, 5, 56, 8,  char,     obj_desc->label[7]);\
24269 +       MC_RSP_OP(cmd, 6, 0,  8,  char,     obj_desc->label[8]);\
24270 +       MC_RSP_OP(cmd, 6, 8,  8,  char,     obj_desc->label[9]);\
24271 +       MC_RSP_OP(cmd, 6, 16, 8,  char,     obj_desc->label[10]);\
24272 +       MC_RSP_OP(cmd, 6, 24, 8,  char,     obj_desc->label[11]);\
24273 +       MC_RSP_OP(cmd, 6, 32, 8,  char,     obj_desc->label[12]);\
24274 +       MC_RSP_OP(cmd, 6, 40, 8,  char,     obj_desc->label[13]);\
24275 +       MC_RSP_OP(cmd, 6, 48, 8,  char,     obj_desc->label[14]);\
24276 +       MC_RSP_OP(cmd, 6, 56, 8,  char,     obj_desc->label[15]);\
24277 +} while (0)
24278 +
24279 +/*                cmd, param, offset, width, type, arg_name */
24280 +#define DPRC_CMD_GET_OBJ_DESC(cmd, obj_type, obj_id) \
24281 +do { \
24282 +       MC_CMD_OP(cmd, 0, 0,  32, int,      obj_id);\
24283 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     obj_type[0]);\
24284 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     obj_type[1]);\
24285 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     obj_type[2]);\
24286 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     obj_type[3]);\
24287 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     obj_type[4]);\
24288 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     obj_type[5]);\
24289 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     obj_type[6]);\
24290 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     obj_type[7]);\
24291 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     obj_type[8]);\
24292 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     obj_type[9]);\
24293 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     obj_type[10]);\
24294 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     obj_type[11]);\
24295 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     obj_type[12]);\
24296 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     obj_type[13]);\
24297 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     obj_type[14]);\
24298 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     obj_type[15]);\
24299 +} while (0)
24300 +
24301 +/*                cmd, param, offset, width, type, arg_name */
24302 +#define DPRC_RSP_GET_OBJ_DESC(cmd, obj_desc) \
24303 +do { \
24304 +       MC_RSP_OP(cmd, 0, 32, 32, int,      obj_desc->id); \
24305 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, obj_desc->vendor); \
24306 +       MC_RSP_OP(cmd, 1, 16, 8,  uint8_t,  obj_desc->irq_count); \
24307 +       MC_RSP_OP(cmd, 1, 24, 8,  uint8_t,  obj_desc->region_count); \
24308 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, obj_desc->state);\
24309 +       MC_RSP_OP(cmd, 2, 0,  16, uint16_t, obj_desc->ver_major);\
24310 +       MC_RSP_OP(cmd, 2, 16, 16, uint16_t, obj_desc->ver_minor);\
24311 +       MC_RSP_OP(cmd, 2, 32, 16, uint16_t, obj_desc->flags); \
24312 +       MC_RSP_OP(cmd, 3, 0,  8,  char,     obj_desc->type[0]);\
24313 +       MC_RSP_OP(cmd, 3, 8,  8,  char,     obj_desc->type[1]);\
24314 +       MC_RSP_OP(cmd, 3, 16, 8,  char,     obj_desc->type[2]);\
24315 +       MC_RSP_OP(cmd, 3, 24, 8,  char,     obj_desc->type[3]);\
24316 +       MC_RSP_OP(cmd, 3, 32, 8,  char,     obj_desc->type[4]);\
24317 +       MC_RSP_OP(cmd, 3, 40, 8,  char,     obj_desc->type[5]);\
24318 +       MC_RSP_OP(cmd, 3, 48, 8,  char,     obj_desc->type[6]);\
24319 +       MC_RSP_OP(cmd, 3, 56, 8,  char,     obj_desc->type[7]);\
24320 +       MC_RSP_OP(cmd, 4, 0,  8,  char,     obj_desc->type[8]);\
24321 +       MC_RSP_OP(cmd, 4, 8,  8,  char,     obj_desc->type[9]);\
24322 +       MC_RSP_OP(cmd, 4, 16, 8,  char,     obj_desc->type[10]);\
24323 +       MC_RSP_OP(cmd, 4, 24, 8,  char,     obj_desc->type[11]);\
24324 +       MC_RSP_OP(cmd, 4, 32, 8,  char,     obj_desc->type[12]);\
24325 +       MC_RSP_OP(cmd, 4, 40, 8,  char,     obj_desc->type[13]);\
24326 +       MC_RSP_OP(cmd, 4, 48, 8,  char,     obj_desc->type[14]);\
24327 +       MC_RSP_OP(cmd, 4, 56, 8,  char,     obj_desc->type[15]);\
24328 +       MC_RSP_OP(cmd, 5, 0,  8,  char,     obj_desc->label[0]);\
24329 +       MC_RSP_OP(cmd, 5, 8,  8,  char,     obj_desc->label[1]);\
24330 +       MC_RSP_OP(cmd, 5, 16, 8,  char,     obj_desc->label[2]);\
24331 +       MC_RSP_OP(cmd, 5, 24, 8,  char,     obj_desc->label[3]);\
24332 +       MC_RSP_OP(cmd, 5, 32, 8,  char,     obj_desc->label[4]);\
24333 +       MC_RSP_OP(cmd, 5, 40, 8,  char,     obj_desc->label[5]);\
24334 +       MC_RSP_OP(cmd, 5, 48, 8,  char,     obj_desc->label[6]);\
24335 +       MC_RSP_OP(cmd, 5, 56, 8,  char,     obj_desc->label[7]);\
24336 +       MC_RSP_OP(cmd, 6, 0,  8,  char,     obj_desc->label[8]);\
24337 +       MC_RSP_OP(cmd, 6, 8,  8,  char,     obj_desc->label[9]);\
24338 +       MC_RSP_OP(cmd, 6, 16, 8,  char,     obj_desc->label[10]);\
24339 +       MC_RSP_OP(cmd, 6, 24, 8,  char,     obj_desc->label[11]);\
24340 +       MC_RSP_OP(cmd, 6, 32, 8,  char,     obj_desc->label[12]);\
24341 +       MC_RSP_OP(cmd, 6, 40, 8,  char,     obj_desc->label[13]);\
24342 +       MC_RSP_OP(cmd, 6, 48, 8,  char,     obj_desc->label[14]);\
24343 +       MC_RSP_OP(cmd, 6, 56, 8,  char,     obj_desc->label[15]);\
24344 +} while (0)
24345 +
24346 +/*                cmd, param, offset, width, type, arg_name */
24347 +#define DPRC_CMD_GET_RES_COUNT(cmd, type) \
24348 +do { \
24349 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     type[0]);\
24350 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     type[1]);\
24351 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     type[2]);\
24352 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     type[3]);\
24353 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     type[4]);\
24354 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     type[5]);\
24355 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     type[6]);\
24356 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     type[7]);\
24357 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     type[8]);\
24358 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     type[9]);\
24359 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     type[10]);\
24360 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     type[11]);\
24361 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     type[12]);\
24362 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     type[13]);\
24363 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     type[14]);\
24364 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     type[15]);\
24365 +} while (0)
24366 +
24367 +/*                cmd, param, offset, width, type, arg_name */
24368 +#define DPRC_RSP_GET_RES_COUNT(cmd, res_count) \
24369 +       MC_RSP_OP(cmd, 0, 0,  32, int,      res_count)
24370 +
24371 +/*                cmd, param, offset, width, type, arg_name */
24372 +#define DPRC_CMD_GET_RES_IDS(cmd, range_desc, type) \
24373 +do { \
24374 +       MC_CMD_OP(cmd, 0, 42, 7,  enum dprc_iter_status, \
24375 +                                           range_desc->iter_status); \
24376 +       MC_CMD_OP(cmd, 1, 0,  32, int,      range_desc->base_id); \
24377 +       MC_CMD_OP(cmd, 1, 32, 32, int,      range_desc->last_id);\
24378 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     type[0]);\
24379 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     type[1]);\
24380 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     type[2]);\
24381 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     type[3]);\
24382 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     type[4]);\
24383 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     type[5]);\
24384 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     type[6]);\
24385 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     type[7]);\
24386 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     type[8]);\
24387 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     type[9]);\
24388 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     type[10]);\
24389 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     type[11]);\
24390 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     type[12]);\
24391 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     type[13]);\
24392 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     type[14]);\
24393 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     type[15]);\
24394 +} while (0)
24395 +
24396 +/*                cmd, param, offset, width, type, arg_name */
24397 +#define DPRC_RSP_GET_RES_IDS(cmd, range_desc) \
24398 +do { \
24399 +       MC_RSP_OP(cmd, 0, 42, 7,  enum dprc_iter_status, \
24400 +                                           range_desc->iter_status);\
24401 +       MC_RSP_OP(cmd, 1, 0,  32, int,      range_desc->base_id); \
24402 +       MC_RSP_OP(cmd, 1, 32, 32, int,      range_desc->last_id);\
24403 +} while (0)
24404 +
24405 +/*                cmd, param, offset, width, type, arg_name */
24406 +#define DPRC_CMD_GET_OBJ_REGION(cmd, obj_type, obj_id, region_index) \
24407 +do { \
24408 +       MC_CMD_OP(cmd, 0, 0,  32, int,      obj_id); \
24409 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  region_index);\
24410 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     obj_type[0]);\
24411 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     obj_type[1]);\
24412 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     obj_type[2]);\
24413 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     obj_type[3]);\
24414 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     obj_type[4]);\
24415 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     obj_type[5]);\
24416 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     obj_type[6]);\
24417 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     obj_type[7]);\
24418 +       MC_CMD_OP(cmd, 4, 0,  8,  char,     obj_type[8]);\
24419 +       MC_CMD_OP(cmd, 4, 8,  8,  char,     obj_type[9]);\
24420 +       MC_CMD_OP(cmd, 4, 16, 8,  char,     obj_type[10]);\
24421 +       MC_CMD_OP(cmd, 4, 24, 8,  char,     obj_type[11]);\
24422 +       MC_CMD_OP(cmd, 4, 32, 8,  char,     obj_type[12]);\
24423 +       MC_CMD_OP(cmd, 4, 40, 8,  char,     obj_type[13]);\
24424 +       MC_CMD_OP(cmd, 4, 48, 8,  char,     obj_type[14]);\
24425 +       MC_CMD_OP(cmd, 4, 56, 8,  char,     obj_type[15]);\
24426 +} while (0)
24427 +
24428 +/*     param, offset, width,   type,           arg_name */
24429 +#define DPRC_RSP_GET_OBJ_REGION(cmd, region_desc) \
24430 +do { \
24431 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, region_desc->base_offset);\
24432 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, region_desc->size); \
24433 +       MC_RSP_OP(cmd, 2, 32, 4,  enum dprc_region_type, region_desc->type);\
24434 +       MC_RSP_OP(cmd, 3, 0,  32, uint32_t, region_desc->flags);\
24435 +} while (0)
24436 +
24437 +/*                cmd, param, offset, width, type, arg_name */
24438 +#define DPRC_CMD_SET_OBJ_LABEL(cmd, obj_type, obj_id, label) \
24439 +do { \
24440 +       MC_CMD_OP(cmd, 0, 0,  32, int,      obj_id); \
24441 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     label[0]);\
24442 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     label[1]);\
24443 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     label[2]);\
24444 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     label[3]);\
24445 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     label[4]);\
24446 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     label[5]);\
24447 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     label[6]);\
24448 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     label[7]);\
24449 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     label[8]);\
24450 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     label[9]);\
24451 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     label[10]);\
24452 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     label[11]);\
24453 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     label[12]);\
24454 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     label[13]);\
24455 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     label[14]);\
24456 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     label[15]);\
24457 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     obj_type[0]);\
24458 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     obj_type[1]);\
24459 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     obj_type[2]);\
24460 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     obj_type[3]);\
24461 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     obj_type[4]);\
24462 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     obj_type[5]);\
24463 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     obj_type[6]);\
24464 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     obj_type[7]);\
24465 +       MC_CMD_OP(cmd, 4, 0,  8,  char,     obj_type[8]);\
24466 +       MC_CMD_OP(cmd, 4, 8,  8,  char,     obj_type[9]);\
24467 +       MC_CMD_OP(cmd, 4, 16, 8,  char,     obj_type[10]);\
24468 +       MC_CMD_OP(cmd, 4, 24, 8,  char,     obj_type[11]);\
24469 +       MC_CMD_OP(cmd, 4, 32, 8,  char,     obj_type[12]);\
24470 +       MC_CMD_OP(cmd, 4, 40, 8,  char,     obj_type[13]);\
24471 +       MC_CMD_OP(cmd, 4, 48, 8,  char,     obj_type[14]);\
24472 +       MC_CMD_OP(cmd, 4, 56, 8,  char,     obj_type[15]);\
24473 +} while (0)
24474 +
24475 +/*                cmd, param, offset, width, type, arg_name */
24476 +#define DPRC_CMD_SET_OBJ_IRQ(cmd, obj_type, obj_id, irq_index, irq_cfg) \
24477 +do { \
24478 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
24479 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
24480 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
24481 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
24482 +       MC_CMD_OP(cmd, 2, 32, 32, int,      obj_id); \
24483 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     obj_type[0]);\
24484 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     obj_type[1]);\
24485 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     obj_type[2]);\
24486 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     obj_type[3]);\
24487 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     obj_type[4]);\
24488 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     obj_type[5]);\
24489 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     obj_type[6]);\
24490 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     obj_type[7]);\
24491 +       MC_CMD_OP(cmd, 4, 0,  8,  char,     obj_type[8]);\
24492 +       MC_CMD_OP(cmd, 4, 8,  8,  char,     obj_type[9]);\
24493 +       MC_CMD_OP(cmd, 4, 16, 8,  char,     obj_type[10]);\
24494 +       MC_CMD_OP(cmd, 4, 24, 8,  char,     obj_type[11]);\
24495 +       MC_CMD_OP(cmd, 4, 32, 8,  char,     obj_type[12]);\
24496 +       MC_CMD_OP(cmd, 4, 40, 8,  char,     obj_type[13]);\
24497 +       MC_CMD_OP(cmd, 4, 48, 8,  char,     obj_type[14]);\
24498 +       MC_CMD_OP(cmd, 4, 56, 8,  char,     obj_type[15]);\
24499 +} while (0)
24500 +
24501 +/*                cmd, param, offset, width, type, arg_name */
24502 +#define DPRC_CMD_GET_OBJ_IRQ(cmd, obj_type, obj_id, irq_index) \
24503 +do { \
24504 +       MC_CMD_OP(cmd, 0, 0,  32, int,      obj_id); \
24505 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
24506 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     obj_type[0]);\
24507 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     obj_type[1]);\
24508 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     obj_type[2]);\
24509 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     obj_type[3]);\
24510 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     obj_type[4]);\
24511 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     obj_type[5]);\
24512 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     obj_type[6]);\
24513 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     obj_type[7]);\
24514 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     obj_type[8]);\
24515 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     obj_type[9]);\
24516 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     obj_type[10]);\
24517 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     obj_type[11]);\
24518 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     obj_type[12]);\
24519 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     obj_type[13]);\
24520 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     obj_type[14]);\
24521 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     obj_type[15]);\
24522 +} while (0)
24523 +
24524 +/*                cmd, param, offset, width, type, arg_name */
24525 +#define DPRC_RSP_GET_OBJ_IRQ(cmd, type, irq_cfg) \
24526 +do { \
24527 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
24528 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
24529 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
24530 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
24531 +} while (0)
24532 +
24533 +/*                cmd, param, offset, width, type, arg_name */
24534 +#define DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2, cfg) \
24535 +do { \
24536 +       MC_CMD_OP(cmd, 0, 0,  32, int,      endpoint1->id); \
24537 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, endpoint1->if_id); \
24538 +       MC_CMD_OP(cmd, 1, 0,  32, int,      endpoint2->id); \
24539 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, endpoint2->if_id); \
24540 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     endpoint1->type[0]); \
24541 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     endpoint1->type[1]); \
24542 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     endpoint1->type[2]); \
24543 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     endpoint1->type[3]); \
24544 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     endpoint1->type[4]); \
24545 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     endpoint1->type[5]); \
24546 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     endpoint1->type[6]); \
24547 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     endpoint1->type[7]); \
24548 +       MC_CMD_OP(cmd, 3, 0,  8,  char,     endpoint1->type[8]); \
24549 +       MC_CMD_OP(cmd, 3, 8,  8,  char,     endpoint1->type[9]); \
24550 +       MC_CMD_OP(cmd, 3, 16, 8,  char,     endpoint1->type[10]); \
24551 +       MC_CMD_OP(cmd, 3, 24, 8,  char,     endpoint1->type[11]); \
24552 +       MC_CMD_OP(cmd, 3, 32, 8,  char,     endpoint1->type[12]); \
24553 +       MC_CMD_OP(cmd, 3, 40, 8,  char,     endpoint1->type[13]); \
24554 +       MC_CMD_OP(cmd, 3, 48, 8,  char,     endpoint1->type[14]); \
24555 +       MC_CMD_OP(cmd, 3, 56, 8,  char,     endpoint1->type[15]); \
24556 +       MC_CMD_OP(cmd, 4, 0,  32, uint32_t, cfg->max_rate); \
24557 +       MC_CMD_OP(cmd, 4, 32, 32, uint32_t, cfg->committed_rate); \
24558 +       MC_CMD_OP(cmd, 5, 0,  8,  char,     endpoint2->type[0]); \
24559 +       MC_CMD_OP(cmd, 5, 8,  8,  char,     endpoint2->type[1]); \
24560 +       MC_CMD_OP(cmd, 5, 16, 8,  char,     endpoint2->type[2]); \
24561 +       MC_CMD_OP(cmd, 5, 24, 8,  char,     endpoint2->type[3]); \
24562 +       MC_CMD_OP(cmd, 5, 32, 8,  char,     endpoint2->type[4]); \
24563 +       MC_CMD_OP(cmd, 5, 40, 8,  char,     endpoint2->type[5]); \
24564 +       MC_CMD_OP(cmd, 5, 48, 8,  char,     endpoint2->type[6]); \
24565 +       MC_CMD_OP(cmd, 5, 56, 8,  char,     endpoint2->type[7]); \
24566 +       MC_CMD_OP(cmd, 6, 0,  8,  char,     endpoint2->type[8]); \
24567 +       MC_CMD_OP(cmd, 6, 8,  8,  char,     endpoint2->type[9]); \
24568 +       MC_CMD_OP(cmd, 6, 16, 8,  char,     endpoint2->type[10]); \
24569 +       MC_CMD_OP(cmd, 6, 24, 8,  char,     endpoint2->type[11]); \
24570 +       MC_CMD_OP(cmd, 6, 32, 8,  char,     endpoint2->type[12]); \
24571 +       MC_CMD_OP(cmd, 6, 40, 8,  char,     endpoint2->type[13]); \
24572 +       MC_CMD_OP(cmd, 6, 48, 8,  char,     endpoint2->type[14]); \
24573 +       MC_CMD_OP(cmd, 6, 56, 8,  char,     endpoint2->type[15]); \
24574 +} while (0)
24575 +
24576 +/*                cmd, param, offset, width, type, arg_name */
24577 +#define DPRC_CMD_DISCONNECT(cmd, endpoint) \
24578 +do { \
24579 +       MC_CMD_OP(cmd, 0, 0,  32, int,      endpoint->id); \
24580 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, endpoint->if_id); \
24581 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     endpoint->type[0]); \
24582 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     endpoint->type[1]); \
24583 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     endpoint->type[2]); \
24584 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     endpoint->type[3]); \
24585 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     endpoint->type[4]); \
24586 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     endpoint->type[5]); \
24587 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     endpoint->type[6]); \
24588 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     endpoint->type[7]); \
24589 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     endpoint->type[8]); \
24590 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     endpoint->type[9]); \
24591 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     endpoint->type[10]); \
24592 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     endpoint->type[11]); \
24593 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     endpoint->type[12]); \
24594 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     endpoint->type[13]); \
24595 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     endpoint->type[14]); \
24596 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     endpoint->type[15]); \
24597 +} while (0)
24598 +
24599 +/*                cmd, param, offset, width, type, arg_name */
24600 +#define DPRC_CMD_GET_CONNECTION(cmd, endpoint1) \
24601 +do { \
24602 +       MC_CMD_OP(cmd, 0, 0,  32, int,      endpoint1->id); \
24603 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, endpoint1->if_id); \
24604 +       MC_CMD_OP(cmd, 1, 0,  8,  char,     endpoint1->type[0]); \
24605 +       MC_CMD_OP(cmd, 1, 8,  8,  char,     endpoint1->type[1]); \
24606 +       MC_CMD_OP(cmd, 1, 16, 8,  char,     endpoint1->type[2]); \
24607 +       MC_CMD_OP(cmd, 1, 24, 8,  char,     endpoint1->type[3]); \
24608 +       MC_CMD_OP(cmd, 1, 32, 8,  char,     endpoint1->type[4]); \
24609 +       MC_CMD_OP(cmd, 1, 40, 8,  char,     endpoint1->type[5]); \
24610 +       MC_CMD_OP(cmd, 1, 48, 8,  char,     endpoint1->type[6]); \
24611 +       MC_CMD_OP(cmd, 1, 56, 8,  char,     endpoint1->type[7]); \
24612 +       MC_CMD_OP(cmd, 2, 0,  8,  char,     endpoint1->type[8]); \
24613 +       MC_CMD_OP(cmd, 2, 8,  8,  char,     endpoint1->type[9]); \
24614 +       MC_CMD_OP(cmd, 2, 16, 8,  char,     endpoint1->type[10]); \
24615 +       MC_CMD_OP(cmd, 2, 24, 8,  char,     endpoint1->type[11]); \
24616 +       MC_CMD_OP(cmd, 2, 32, 8,  char,     endpoint1->type[12]); \
24617 +       MC_CMD_OP(cmd, 2, 40, 8,  char,     endpoint1->type[13]); \
24618 +       MC_CMD_OP(cmd, 2, 48, 8,  char,     endpoint1->type[14]); \
24619 +       MC_CMD_OP(cmd, 2, 56, 8,  char,     endpoint1->type[15]); \
24620 +} while (0)
24621 +
24622 +/*                cmd, param, offset, width, type, arg_name */
24623 +#define DPRC_RSP_GET_CONNECTION(cmd, endpoint2, state) \
24624 +do { \
24625 +       MC_RSP_OP(cmd, 3, 0,  32, int,      endpoint2->id); \
24626 +       MC_RSP_OP(cmd, 3, 32, 16, uint16_t, endpoint2->if_id); \
24627 +       MC_RSP_OP(cmd, 4, 0,  8,  char,     endpoint2->type[0]); \
24628 +       MC_RSP_OP(cmd, 4, 8,  8,  char,     endpoint2->type[1]); \
24629 +       MC_RSP_OP(cmd, 4, 16, 8,  char,     endpoint2->type[2]); \
24630 +       MC_RSP_OP(cmd, 4, 24, 8,  char,     endpoint2->type[3]); \
24631 +       MC_RSP_OP(cmd, 4, 32, 8,  char,     endpoint2->type[4]); \
24632 +       MC_RSP_OP(cmd, 4, 40, 8,  char,     endpoint2->type[5]); \
24633 +       MC_RSP_OP(cmd, 4, 48, 8,  char,     endpoint2->type[6]); \
24634 +       MC_RSP_OP(cmd, 4, 56, 8,  char,     endpoint2->type[7]); \
24635 +       MC_RSP_OP(cmd, 5, 0,  8,  char,     endpoint2->type[8]); \
24636 +       MC_RSP_OP(cmd, 5, 8,  8,  char,     endpoint2->type[9]); \
24637 +       MC_RSP_OP(cmd, 5, 16, 8,  char,     endpoint2->type[10]); \
24638 +       MC_RSP_OP(cmd, 5, 24, 8,  char,     endpoint2->type[11]); \
24639 +       MC_RSP_OP(cmd, 5, 32, 8,  char,     endpoint2->type[12]); \
24640 +       MC_RSP_OP(cmd, 5, 40, 8,  char,     endpoint2->type[13]); \
24641 +       MC_RSP_OP(cmd, 5, 48, 8,  char,     endpoint2->type[14]); \
24642 +       MC_RSP_OP(cmd, 5, 56, 8,  char,     endpoint2->type[15]); \
24643 +       MC_RSP_OP(cmd, 6, 0,  32, int,      state); \
24644 +} while (0)
24645 +
24646 +#endif /* _FSL_DPRC_CMD_H */
24647 diff --git a/drivers/net/dpaa2/mc/fsl_dprtc.h b/drivers/net/dpaa2/mc/fsl_dprtc.h
24648 new file mode 100644
24649 index 0000000..cad0693
24650 --- /dev/null
24651 +++ b/drivers/net/dpaa2/mc/fsl_dprtc.h
24652 @@ -0,0 +1,434 @@
24653 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
24654 + *
24655 + * Redistribution and use in source and binary forms, with or without
24656 + * modification, are permitted provided that the following conditions are met:
24657 + * * Redistributions of source code must retain the above copyright
24658 + * notice, this list of conditions and the following disclaimer.
24659 + * * Redistributions in binary form must reproduce the above copyright
24660 + * notice, this list of conditions and the following disclaimer in the
24661 + * documentation and/or other materials provided with the distribution.
24662 + * * Neither the name of the above-listed copyright holders nor the
24663 + * names of any contributors may be used to endorse or promote products
24664 + * derived from this software without specific prior written permission.
24665 + *
24666 + *
24667 + * ALTERNATIVELY, this software may be distributed under the terms of the
24668 + * GNU General Public License ("GPL") as published by the Free Software
24669 + * Foundation, either version 2 of that License or (at your option) any
24670 + * later version.
24671 + *
24672 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24673 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24674 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24675 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
24676 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24677 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24678 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24679 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24680 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24681 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
24682 + * POSSIBILITY OF SUCH DAMAGE.
24683 + */
24684 +#ifndef __FSL_DPRTC_H
24685 +#define __FSL_DPRTC_H
24686 +
24687 +/* Data Path Real Time Counter API
24688 + * Contains initialization APIs and runtime control APIs for RTC
24689 + */
24690 +
24691 +struct fsl_mc_io;
24692 +
24693 +/**
24694 + * Number of irq's
24695 + */
24696 +#define DPRTC_MAX_IRQ_NUM                      1
24697 +#define DPRTC_IRQ_INDEX                                0
24698 +
24699 +/**
24700 + * Interrupt event masks:
24701 + */
24702 +
24703 +/**
24704 + * Interrupt event mask indicating alarm event had occurred
24705 + */
24706 +#define DPRTC_EVENT_ALARM                      0x40000000
24707 +/**
24708 + * Interrupt event mask indicating periodic pulse event had occurred
24709 + */
24710 +#define DPRTC_EVENT_PPS                                0x08000000
24711 +
24712 +/**
24713 + * dprtc_open() - Open a control session for the specified object.
24714 + * @mc_io:     Pointer to MC portal's I/O object
24715 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24716 + * @dprtc_id:  DPRTC unique ID
24717 + * @token:     Returned token; use in subsequent API calls
24718 + *
24719 + * This function can be used to open a control session for an
24720 + * already created object; an object may have been declared in
24721 + * the DPL or by calling the dprtc_create function.
24722 + * This function returns a unique authentication token,
24723 + * associated with the specific object ID and the specific MC
24724 + * portal; this token must be used in all subsequent commands for
24725 + * this specific object
24726 + *
24727 + * Return:     '0' on Success; Error code otherwise.
24728 + */
24729 +int dprtc_open(struct fsl_mc_io        *mc_io,
24730 +              uint32_t         cmd_flags,
24731 +             int               dprtc_id,
24732 +             uint16_t          *token);
24733 +
24734 +/**
24735 + * dprtc_close() - Close the control session of the object
24736 + * @mc_io:     Pointer to MC portal's I/O object
24737 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24738 + * @token:     Token of DPRTC object
24739 + *
24740 + * After this function is called, no further operations are
24741 + * allowed on the object without opening a new control session.
24742 + *
24743 + * Return:     '0' on Success; Error code otherwise.
24744 + */
24745 +int dprtc_close(struct fsl_mc_io       *mc_io,
24746 +               uint32_t                cmd_flags,
24747 +              uint16_t token);
24748 +
24749 +/**
24750 + * struct dprtc_cfg - Structure representing DPRTC configuration
24751 + * @options:   place holder
24752 + */
24753 +struct dprtc_cfg {
24754 +       uint32_t options;
24755 +};
24756 +
24757 +/**
24758 + * dprtc_create() - Create the DPRTC object.
24759 + * @mc_io:     Pointer to MC portal's I/O object
24760 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24761 + * @cfg:       Configuration structure
24762 + * @token:     Returned token; use in subsequent API calls
24763 + *
24764 + * Create the DPRTC object, allocate required resources and
24765 + * perform required initialization.
24766 + *
24767 + * The object can be created either by declaring it in the
24768 + * DPL file, or by calling this function.
24769 + * This function returns a unique authentication token,
24770 + * associated with the specific object ID and the specific MC
24771 + * portal; this token must be used in all subsequent calls to
24772 + * this specific object. For objects that are created using the
24773 + * DPL file, call dprtc_open function to get an authentication
24774 + * token first.
24775 + *
24776 + * Return:     '0' on Success; Error code otherwise.
24777 + */
24778 +int dprtc_create(struct fsl_mc_io      *mc_io,
24779 +                uint32_t               cmd_flags,
24780 +               const struct dprtc_cfg  *cfg,
24781 +               uint16_t                *token);
24782 +
24783 +/**
24784 + * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
24785 + * @mc_io:     Pointer to MC portal's I/O object
24786 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24787 + * @token:     Token of DPRTC object
24788 + *
24789 + * Return:     '0' on Success; error code otherwise.
24790 + */
24791 +int dprtc_destroy(struct fsl_mc_io     *mc_io,
24792 +                 uint32_t              cmd_flags,
24793 +                uint16_t               token);
24794 +
24795 +/**
24796 + * dprtc_set_clock_offset() - Sets the clock's offset
24797 + * (usually relative to another clock).
24798 + *
24799 + * @mc_io:     Pointer to MC portal's I/O object
24800 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24801 + * @token:     Token of DPRTC object
24802 + * @offset: New clock offset (in nanoseconds).
24803 + *
24804 + * Return:     '0' on Success; Error code otherwise.
24805 + */
24806 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
24807 +                          uint32_t cmd_flags,
24808 +                 uint16_t token,
24809 +                 int64_t offset);
24810 +
24811 +/**
24812 + * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
24813 + *
24814 + * @mc_io:             Pointer to MC portal's I/O object
24815 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24816 + * @token:             Token of DPRTC object
24817 + * @freq_compensation:
24818 + *                             The new frequency compensation value to set.
24819 + *
24820 + * Return:     '0' on Success; Error code otherwise.
24821 + */
24822 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
24823 +                               uint32_t cmd_flags,
24824 +                 uint16_t token,
24825 +                 uint32_t freq_compensation);
24826 +
24827 +/**
24828 + * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
24829 + *
24830 + * @mc_io:             Pointer to MC portal's I/O object
24831 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24832 + * @token:             Token of DPRTC object
24833 + * @freq_compensation:
24834 + *                             Frequency compensation value
24835 + *
24836 + * Return:     '0' on Success; Error code otherwise.
24837 + */
24838 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
24839 +                               uint32_t cmd_flags,
24840 +                 uint16_t token,
24841 +                 uint32_t *freq_compensation);
24842 +
24843 +/**
24844 + * dprtc_get_time() - Returns the current RTC time.
24845 + *
24846 + * @mc_io:             Pointer to MC portal's I/O object
24847 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24848 + * @token:             Token of DPRTC object
24849 + * @time:      Current RTC time.
24850 + *
24851 + * Return:     '0' on Success; Error code otherwise.
24852 + */
24853 +int dprtc_get_time(struct fsl_mc_io *mc_io,
24854 +                  uint32_t cmd_flags,
24855 +                 uint16_t token,
24856 +                 uint64_t *time);
24857 +
24858 +/**
24859 + * dprtc_set_time() - Updates current RTC time.
24860 + *
24861 + * @mc_io:             Pointer to MC portal's I/O object
24862 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24863 + * @token:             Token of DPRTC object
24864 + * @time:      New RTC time.
24865 + *
24866 + * Return:     '0' on Success; Error code otherwise.
24867 + */
24868 +int dprtc_set_time(struct fsl_mc_io *mc_io,
24869 +                  uint32_t cmd_flags,
24870 +                 uint16_t token,
24871 +                 uint64_t time);
24872 +
24873 +/**
24874 + * dprtc_set_alarm() - Defines and sets alarm.
24875 + *
24876 + * @mc_io:             Pointer to MC portal's I/O object
24877 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24878 + * @token:             Token of DPRTC object
24879 + * @time:              In nanoseconds, the time when the alarm
24880 + *                             should go off - must be a multiple of
24881 + *                             1 microsecond
24882 + *
24883 + * Return:     '0' on Success; Error code otherwise.
24884 + */
24885 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
24886 +                   uint32_t cmd_flags,
24887 +                 uint16_t token,
24888 +                 uint64_t time);
24889 +
24890 +/**
24891 + * struct dprtc_irq_cfg - IRQ configuration
24892 + * @addr:      Address that must be written to signal a message-based interrupt
24893 + * @val:       Value to write into irq_addr address
24894 + * @irq_num: A user defined number associated with this IRQ
24895 + */
24896 +struct dprtc_irq_cfg {
24897 +            uint64_t           addr;
24898 +            uint32_t           val;
24899 +            int                irq_num;
24900 +};
24901 +
24902 +/**
24903 + * dprtc_set_irq() - Set IRQ information for the DPRTC to trigger an interrupt.
24904 + * @mc_io:     Pointer to MC portal's I/O object
24905 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24906 + * @token:     Token of DPRTC object
24907 + * @irq_index: Identifies the interrupt index to configure
24908 + * @irq_cfg:   IRQ configuration
24909 + *
24910 + * Return:     '0' on Success; Error code otherwise.
24911 + */
24912 +int dprtc_set_irq(struct fsl_mc_io     *mc_io,
24913 +                 uint32_t              cmd_flags,
24914 +                uint16_t               token,
24915 +                uint8_t                irq_index,
24916 +                struct dprtc_irq_cfg   *irq_cfg);
24917 +
24918 +/**
24919 + * dprtc_get_irq() - Get IRQ information from the DPRTC.
24920 + * @mc_io:     Pointer to MC portal's I/O object
24921 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24922 + * @token:     Token of DPRTC object
24923 + * @irq_index: The interrupt index to configure
24924 + * @type:      Interrupt type: 0 represents message interrupt
24925 + *             type (both irq_addr and irq_val are valid)
24926 + * @irq_cfg:   IRQ attributes
24927 + *
24928 + * Return:     '0' on Success; Error code otherwise.
24929 + */
24930 +int dprtc_get_irq(struct fsl_mc_io     *mc_io,
24931 +                 uint32_t              cmd_flags,
24932 +                uint16_t               token,
24933 +                uint8_t                irq_index,
24934 +                int                    *type,
24935 +                struct dprtc_irq_cfg   *irq_cfg);
24936 +
24937 +/**
24938 + * dprtc_set_irq_enable() - Set overall interrupt state.
24939 + * @mc_io:     Pointer to MC portal's I/O object
24940 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24941 + * @token:     Token of DPRTC object
24942 + * @irq_index: The interrupt index to configure
24943 + * @en:        Interrupt state - enable = 1, disable = 0
24944 + *
24945 + * Allows GPP software to control when interrupts are generated.
24946 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
24947 + * overall interrupt state. if the interrupt is disabled no causes will cause
24948 + * an interrupt.
24949 + *
24950 + * Return:     '0' on Success; Error code otherwise.
24951 + */
24952 +int dprtc_set_irq_enable(struct fsl_mc_io      *mc_io,
24953 +                        uint32_t               cmd_flags,
24954 +                       uint16_t                token,
24955 +                       uint8_t                 irq_index,
24956 +                       uint8_t                 en);
24957 +
24958 +/**
24959 + * dprtc_get_irq_enable() - Get overall interrupt state
24960 + * @mc_io:     Pointer to MC portal's I/O object
24961 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24962 + * @token:     Token of DPRTC object
24963 + * @irq_index: The interrupt index to configure
24964 + * @en:                Returned interrupt state - enable = 1, disable = 0
24965 + *
24966 + * Return:     '0' on Success; Error code otherwise.
24967 + */
24968 +int dprtc_get_irq_enable(struct fsl_mc_io      *mc_io,
24969 +                        uint32_t               cmd_flags,
24970 +                       uint16_t                token,
24971 +                       uint8_t                 irq_index,
24972 +                       uint8_t                 *en);
24973 +
24974 +/**
24975 + * dprtc_set_irq_mask() - Set interrupt mask.
24976 + * @mc_io:     Pointer to MC portal's I/O object
24977 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
24978 + * @token:     Token of DPRTC object
24979 + * @irq_index: The interrupt index to configure
24980 + * @mask:      Event mask to trigger interrupt;
24981 + *                     each bit:
24982 + *                             0 = ignore event
24983 + *                             1 = consider event for asserting IRQ
24984 + *
24985 + * Every interrupt can have up to 32 causes and the interrupt model supports
24986 + * masking/unmasking each cause independently
24987 + *
24988 + * Return:     '0' on Success; Error code otherwise.
24989 + */
24990 +int dprtc_set_irq_mask(struct fsl_mc_io        *mc_io,
24991 +                      uint32_t         cmd_flags,
24992 +                     uint16_t          token,
24993 +                     uint8_t           irq_index,
24994 +                     uint32_t          mask);
24995 +
24996 +/**
24997 + * dprtc_get_irq_mask() - Get interrupt mask.
24998 + * @mc_io:     Pointer to MC portal's I/O object
24999 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25000 + * @token:     Token of DPRTC object
25001 + * @irq_index: The interrupt index to configure
25002 + * @mask:      Returned event mask to trigger interrupt
25003 + *
25004 + * Every interrupt can have up to 32 causes and the interrupt model supports
25005 + * masking/unmasking each cause independently
25006 + *
25007 + * Return:     '0' on Success; Error code otherwise.
25008 + */
25009 +int dprtc_get_irq_mask(struct fsl_mc_io        *mc_io,
25010 +                      uint32_t         cmd_flags,
25011 +                     uint16_t          token,
25012 +                     uint8_t           irq_index,
25013 +                     uint32_t          *mask);
25014 +
25015 +/**
25016 + * dprtc_get_irq_status() - Get the current status of any pending interrupts.
25017 + *
25018 + * @mc_io:     Pointer to MC portal's I/O object
25019 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25020 + * @token:     Token of DPRTC object
25021 + * @irq_index: The interrupt index to configure
25022 + * @status:    Returned interrupts status - one bit per cause:
25023 + *                     0 = no interrupt pending
25024 + *                     1 = interrupt pending
25025 + *
25026 + * Return:     '0' on Success; Error code otherwise.
25027 + */
25028 +int dprtc_get_irq_status(struct fsl_mc_io      *mc_io,
25029 +                        uint32_t               cmd_flags,
25030 +                       uint16_t                token,
25031 +                       uint8_t                 irq_index,
25032 +                       uint32_t                *status);
25033 +
25034 +/**
25035 + * dprtc_clear_irq_status() - Clear a pending interrupt's status
25036 + *
25037 + * @mc_io:     Pointer to MC portal's I/O object
25038 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25039 + * @token:     Token of DPRTC object
25040 + * @irq_index: The interrupt index to configure
25041 + * @status:    Bits to clear (W1C) - one bit per cause:
25042 + *                                     0 = don't change
25043 + *                                     1 = clear status bit
25044 + *
25045 + * Return:     '0' on Success; Error code otherwise.
25046 + */
25047 +int dprtc_clear_irq_status(struct fsl_mc_io    *mc_io,
25048 +                          uint32_t             cmd_flags,
25049 +                         uint16_t              token,
25050 +                         uint8_t               irq_index,
25051 +                         uint32_t              status);
25052 +
25053 +/**
25054 + * struct dprtc_attr - Structure representing DPRTC attributes
25055 + * @id:                DPRTC object ID
25056 + * @version:   DPRTC version
25057 + */
25058 +struct dprtc_attr {
25059 +       int id;
25060 +       /**
25061 +        * struct version - Structure representing DPRTC version
25062 +        * @major:      DPRTC major version
25063 +        * @minor:      DPRTC minor version
25064 +        */
25065 +       struct {
25066 +               uint16_t major;
25067 +               uint16_t minor;
25068 +       } version;
25069 +};
25070 +
25071 +/**
25072 + * dprtc_get_attributes - Retrieve DPRTC attributes.
25073 + *
25074 + * @mc_io:     Pointer to MC portal's I/O object
25075 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25076 + * @token:     Token of DPRTC object
25077 + * @attr:      Returned object's attributes
25078 + *
25079 + * Return:     '0' on Success; Error code otherwise.
25080 + */
25081 +int dprtc_get_attributes(struct fsl_mc_io      *mc_io,
25082 +                        uint32_t       cmd_flags,
25083 +                       uint16_t                token,
25084 +                       struct dprtc_attr       *attr);
25085 +
25086 +#endif /* __FSL_DPRTC_H */
25087 diff --git a/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h b/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
25088 new file mode 100644
25089 index 0000000..aeccece
25090 --- /dev/null
25091 +++ b/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
25092 @@ -0,0 +1,181 @@
25093 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
25094 + *
25095 + * Redistribution and use in source and binary forms, with or without
25096 + * modification, are permitted provided that the following conditions are met:
25097 + * * Redistributions of source code must retain the above copyright
25098 + * notice, this list of conditions and the following disclaimer.
25099 + * * Redistributions in binary form must reproduce the above copyright
25100 + * notice, this list of conditions and the following disclaimer in the
25101 + * documentation and/or other materials provided with the distribution.
25102 + * * Neither the name of the above-listed copyright holders nor the
25103 + * names of any contributors may be used to endorse or promote products
25104 + * derived from this software without specific prior written permission.
25105 + *
25106 + *
25107 + * ALTERNATIVELY, this software may be distributed under the terms of the
25108 + * GNU General Public License ("GPL") as published by the Free Software
25109 + * Foundation, either version 2 of that License or (at your option) any
25110 + * later version.
25111 + *
25112 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25113 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25114 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25115 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
25116 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25117 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25118 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25119 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25120 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25121 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25122 + * POSSIBILITY OF SUCH DAMAGE.
25123 + */
25124 +#ifndef _FSL_DPRTC_CMD_H
25125 +#define _FSL_DPRTC_CMD_H
25126 +
25127 +/* DPRTC Version */
25128 +#define DPRTC_VER_MAJOR                                1
25129 +#define DPRTC_VER_MINOR                                0
25130 +
25131 +/* Command IDs */
25132 +#define DPRTC_CMDID_CLOSE                              0x800
25133 +#define DPRTC_CMDID_OPEN                                       0x810
25134 +#define DPRTC_CMDID_CREATE                             0x910
25135 +#define DPRTC_CMDID_DESTROY                            0x900
25136 +
25137 +#define DPRTC_CMDID_ENABLE                             0x002
25138 +#define DPRTC_CMDID_DISABLE                            0x003
25139 +#define DPRTC_CMDID_GET_ATTR                           0x004
25140 +#define DPRTC_CMDID_RESET                              0x005
25141 +#define DPRTC_CMDID_IS_ENABLED                         0x006
25142 +
25143 +#define DPRTC_CMDID_SET_IRQ                            0x010
25144 +#define DPRTC_CMDID_GET_IRQ                            0x011
25145 +#define DPRTC_CMDID_SET_IRQ_ENABLE                     0x012
25146 +#define DPRTC_CMDID_GET_IRQ_ENABLE                     0x013
25147 +#define DPRTC_CMDID_SET_IRQ_MASK                               0x014
25148 +#define DPRTC_CMDID_GET_IRQ_MASK                               0x015
25149 +#define DPRTC_CMDID_GET_IRQ_STATUS                     0x016
25150 +#define DPRTC_CMDID_CLEAR_IRQ_STATUS                   0x017
25151 +
25152 +#define DPRTC_CMDID_SET_CLOCK_OFFSET                   0x1d0
25153 +#define DPRTC_CMDID_SET_FREQ_COMPENSATION              0x1d1
25154 +#define DPRTC_CMDID_GET_FREQ_COMPENSATION              0x1d2
25155 +#define DPRTC_CMDID_GET_TIME                                   0x1d3
25156 +#define DPRTC_CMDID_SET_TIME                                   0x1d4
25157 +#define DPRTC_CMDID_SET_ALARM                                  0x1d5
25158 +#define DPRTC_CMDID_SET_PERIODIC_PULSE                 0x1d6
25159 +#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE               0x1d7
25160 +#define DPRTC_CMDID_SET_EXT_TRIGGER                            0x1d8
25161 +#define DPRTC_CMDID_CLEAR_EXT_TRIGGER                  0x1d9
25162 +#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP  0x1dA
25163 +
25164 +/*                cmd, param, offset, width, type, arg_name */
25165 +#define DPRTC_CMD_OPEN(cmd, dpbp_id) \
25166 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpbp_id)
25167 +
25168 +/*                cmd, param, offset, width, type, arg_name */
25169 +#define DPRTC_RSP_IS_ENABLED(cmd, en) \
25170 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
25171 +
25172 +/*                cmd, param, offset, width, type, arg_name */
25173 +#define DPRTC_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
25174 +do { \
25175 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
25176 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
25177 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
25178 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
25179 +} while (0)
25180 +
25181 +/*                cmd, param, offset, width, type, arg_name */
25182 +#define DPRTC_CMD_GET_IRQ(cmd, irq_index) \
25183 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
25184 +
25185 +/*                cmd, param, offset, width, type, arg_name */
25186 +#define DPRTC_RSP_GET_IRQ(cmd, type, irq_cfg) \
25187 +do { \
25188 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
25189 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr); \
25190 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
25191 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
25192 +} while (0)
25193 +
25194 +/*                cmd, param, offset, width, type, arg_name */
25195 +#define DPRTC_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
25196 +do { \
25197 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  en); \
25198 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
25199 +} while (0)
25200 +
25201 +/*                cmd, param, offset, width, type, arg_name */
25202 +#define DPRTC_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
25203 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
25204 +
25205 +/*                cmd, param, offset, width, type, arg_name */
25206 +#define DPRTC_RSP_GET_IRQ_ENABLE(cmd, en) \
25207 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  en)
25208 +
25209 +/*                cmd, param, offset, width, type, arg_name */
25210 +#define DPRTC_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
25211 +do { \
25212 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask);\
25213 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
25214 +} while (0)
25215 +
25216 +/*                cmd, param, offset, width, type, arg_name */
25217 +#define DPRTC_CMD_GET_IRQ_MASK(cmd, irq_index) \
25218 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
25219 +
25220 +/*                cmd, param, offset, width, type, arg_name */
25221 +#define DPRTC_RSP_GET_IRQ_MASK(cmd, mask) \
25222 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
25223 +
25224 +/*                cmd, param, offset, width, type, arg_name */
25225 +#define DPRTC_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
25226 +do { \
25227 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
25228 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
25229 +} while (0)
25230 +/*                cmd, param, offset, width, type, arg_name */
25231 +#define DPRTC_RSP_GET_IRQ_STATUS(cmd, status) \
25232 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
25233 +
25234 +/*                cmd, param, offset, width, type, arg_name */
25235 +#define DPRTC_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
25236 +do { \
25237 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
25238 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
25239 +} while (0)
25240 +
25241 +/*                cmd, param, offset, width, type,     arg_name */
25242 +#define DPRTC_RSP_GET_ATTRIBUTES(cmd, attr) \
25243 +do { \
25244 +       MC_RSP_OP(cmd, 0, 32, 32, int,      attr->id);\
25245 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
25246 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
25247 +} while (0)
25248 +
25249 +/*                cmd, param, offset, width, type, arg_name */
25250 +#define DPRTC_CMD_SET_CLOCK_OFFSET(cmd, offset) \
25251 +       MC_CMD_OP(cmd, 0, 0,  64, int64_t, offset)
25252 +
25253 +/*                cmd, param, offset, width, type, arg_name */
25254 +#define DPRTC_CMD_SET_FREQ_COMPENSATION(cmd, freq_compensation) \
25255 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, freq_compensation)
25256 +
25257 +/*                cmd, param, offset, width, type, arg_name */
25258 +#define DPRTC_RSP_GET_FREQ_COMPENSATION(cmd, freq_compensation) \
25259 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, freq_compensation)
25260 +
25261 +/*                cmd, param, offset, width, type, arg_name */
25262 +#define DPRTC_RSP_GET_TIME(cmd, time) \
25263 +       MC_RSP_OP(cmd, 0, 0,  64, uint64_t, time)
25264 +
25265 +/*                cmd, param, offset, width, type, arg_name */
25266 +#define DPRTC_CMD_SET_TIME(cmd, time) \
25267 +       MC_CMD_OP(cmd, 0, 0,  64, uint64_t, time)
25268 +
25269 +/*                cmd, param, offset, width, type, arg_name */
25270 +#define DPRTC_CMD_SET_ALARM(cmd, time) \
25271 +       MC_CMD_OP(cmd, 0, 0,  64, uint64_t, time)
25272 +
25273 +#endif /* _FSL_DPRTC_CMD_H */
25274 diff --git a/drivers/net/dpaa2/mc/fsl_dpseci.h b/drivers/net/dpaa2/mc/fsl_dpseci.h
25275 new file mode 100644
25276 index 0000000..1dd7215
25277 --- /dev/null
25278 +++ b/drivers/net/dpaa2/mc/fsl_dpseci.h
25279 @@ -0,0 +1,647 @@
25280 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
25281 + *
25282 + * Redistribution and use in source and binary forms, with or without
25283 + * modification, are permitted provided that the following conditions are met:
25284 + * * Redistributions of source code must retain the above copyright
25285 + * notice, this list of conditions and the following disclaimer.
25286 + * * Redistributions in binary form must reproduce the above copyright
25287 + * notice, this list of conditions and the following disclaimer in the
25288 + * documentation and/or other materials provided with the distribution.
25289 + * * Neither the name of the above-listed copyright holders nor the
25290 + * names of any contributors may be used to endorse or promote products
25291 + * derived from this software without specific prior written permission.
25292 + *
25293 + *
25294 + * ALTERNATIVELY, this software may be distributed under the terms of the
25295 + * GNU General Public License ("GPL") as published by the Free Software
25296 + * Foundation, either version 2 of that License or (at your option) any
25297 + * later version.
25298 + *
25299 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25300 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25301 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25302 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
25303 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25304 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25305 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25306 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25307 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25308 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25309 + * POSSIBILITY OF SUCH DAMAGE.
25310 + */
25311 +#ifndef __FSL_DPSECI_H
25312 +#define __FSL_DPSECI_H
25313 +
25314 +/* Data Path SEC Interface API
25315 + * Contains initialization APIs and runtime control APIs for DPSECI
25316 + */
25317 +
25318 +struct fsl_mc_io;
25319 +
25320 +/**
25321 + * General DPSECI macros
25322 + */
25323 +
25324 +/**
25325 + * Maximum number of Tx/Rx priorities per DPSECI object
25326 + */
25327 +#define DPSECI_PRIO_NUM                8
25328 +
25329 +/**
25330 + * All queues considered; see dpseci_set_rx_queue()
25331 + */
25332 +#define DPSECI_ALL_QUEUES      (uint8_t)(-1)
25333 +
25334 +/**
25335 + * dpseci_open() - Open a control session for the specified object
25336 + * @mc_io:     Pointer to MC portal's I/O object
25337 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25338 + * @dpseci_id: DPSECI unique ID
25339 + * @token:     Returned token; use in subsequent API calls
25340 + *
25341 + * This function can be used to open a control session for an
25342 + * already created object; an object may have been declared in
25343 + * the DPL or by calling the dpseci_create() function.
25344 + * This function returns a unique authentication token,
25345 + * associated with the specific object ID and the specific MC
25346 + * portal; this token must be used in all subsequent commands for
25347 + * this specific object.
25348 + *
25349 + * Return:     '0' on Success; Error code otherwise.
25350 + */
25351 +int dpseci_open(struct fsl_mc_io       *mc_io,
25352 +               uint32_t                cmd_flags,
25353 +               int                     dpseci_id,
25354 +               uint16_t                *token);
25355 +
25356 +/**
25357 + * dpseci_close() - Close the control session of the object
25358 + * @mc_io:     Pointer to MC portal's I/O object
25359 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25360 + * @token:     Token of DPSECI object
25361 + *
25362 + * After this function is called, no further operations are
25363 + * allowed on the object without opening a new control session.
25364 + *
25365 + * Return:     '0' on Success; Error code otherwise.
25366 + */
25367 +int dpseci_close(struct fsl_mc_io      *mc_io,
25368 +                uint32_t               cmd_flags,
25369 +                uint16_t               token);
25370 +
25371 +/**
25372 + * struct dpseci_cfg - Structure representing DPSECI configuration
25373 + * @num_tx_queues: num of queues towards the SEC
25374 + * @num_rx_queues: num of queues back from the SEC
25375 + * @priorities: Priorities for the SEC hardware processing;
25376 + *             each place in the array is the priority of the tx queue
25377 + *             towards the SEC,
25378 + *             valid priorities are configured with values 1-8;
25379 + */
25380 +struct dpseci_cfg {
25381 +       uint8_t num_tx_queues;
25382 +       uint8_t num_rx_queues;
25383 +       uint8_t priorities[DPSECI_PRIO_NUM];
25384 +};
25385 +
25386 +/**
25387 + * dpseci_create() - Create the DPSECI object
25388 + * @mc_io:     Pointer to MC portal's I/O object
25389 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25390 + * @cfg:       Configuration structure
25391 + * @token:     Returned token; use in subsequent API calls
25392 + *
25393 + * Create the DPSECI object, allocate required resources and
25394 + * perform required initialization.
25395 + *
25396 + * The object can be created either by declaring it in the
25397 + * DPL file, or by calling this function.
25398 + *
25399 + * This function returns a unique authentication token,
25400 + * associated with the specific object ID and the specific MC
25401 + * portal; this token must be used in all subsequent calls to
25402 + * this specific object. For objects that are created using the
25403 + * DPL file, call dpseci_open() function to get an authentication
25404 + * token first.
25405 + *
25406 + * Return:     '0' on Success; Error code otherwise.
25407 + */
25408 +int dpseci_create(struct fsl_mc_io             *mc_io,
25409 +                 uint32_t                      cmd_flags,
25410 +                 const struct dpseci_cfg       *cfg,
25411 +                 uint16_t                      *token);
25412 +
25413 +/**
25414 + * dpseci_destroy() - Destroy the DPSECI object and release all its resources.
25415 + * @mc_io:     Pointer to MC portal's I/O object
25416 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25417 + * @token:     Token of DPSECI object
25418 + *
25419 + * Return:     '0' on Success; error code otherwise.
25420 + */
25421 +int dpseci_destroy(struct fsl_mc_io    *mc_io,
25422 +                  uint32_t             cmd_flags,
25423 +                  uint16_t             token);
25424 +
25425 +/**
25426 + * dpseci_enable() - Enable the DPSECI, allow sending and receiving frames.
25427 + * @mc_io:     Pointer to MC portal's I/O object
25428 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25429 + * @token:     Token of DPSECI object
25430 + *
25431 + * Return:     '0' on Success; Error code otherwise.
25432 + */
25433 +int dpseci_enable(struct fsl_mc_io     *mc_io,
25434 +                 uint32_t              cmd_flags,
25435 +                 uint16_t              token);
25436 +
25437 +/**
25438 + * dpseci_disable() - Disable the DPSECI, stop sending and receiving frames.
25439 + * @mc_io:     Pointer to MC portal's I/O object
25440 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25441 + * @token:     Token of DPSECI object
25442 + *
25443 + * Return:     '0' on Success; Error code otherwise.
25444 + */
25445 +int dpseci_disable(struct fsl_mc_io    *mc_io,
25446 +                  uint32_t             cmd_flags,
25447 +                  uint16_t             token);
25448 +
25449 +/**
25450 + * dpseci_is_enabled() - Check if the DPSECI is enabled.
25451 + * @mc_io:     Pointer to MC portal's I/O object
25452 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25453 + * @token:     Token of DPSECI object
25454 + * @en:                Returns '1' if object is enabled; '0' otherwise
25455 + *
25456 + * Return:     '0' on Success; Error code otherwise.
25457 + */
25458 +int dpseci_is_enabled(struct fsl_mc_io *mc_io,
25459 +                     uint32_t          cmd_flags,
25460 +                     uint16_t          token,
25461 +                     int               *en);
25462 +
25463 +/**
25464 + * dpseci_reset() - Reset the DPSECI, returns the object to initial state.
25465 + * @mc_io:     Pointer to MC portal's I/O object
25466 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25467 + * @token:     Token of DPSECI object
25468 + *
25469 + * Return:     '0' on Success; Error code otherwise.
25470 + */
25471 +int dpseci_reset(struct fsl_mc_io      *mc_io,
25472 +                uint32_t               cmd_flags,
25473 +                uint16_t               token);
25474 +
25475 +/**
25476 + * struct dpseci_irq_cfg - IRQ configuration
25477 + * @addr:      Address that must be written to signal a message-based interrupt
25478 + * @val:       Value to write into irq_addr address
25479 + * @irq_num: A user defined number associated with this IRQ
25480 + */
25481 +struct dpseci_irq_cfg {
25482 +            uint64_t           addr;
25483 +            uint32_t           val;
25484 +            int                irq_num;
25485 +};
25486 +
25487 +/**
25488 + * dpseci_set_irq() - Set IRQ information for the DPSECI to trigger an interrupt
25489 + * @mc_io:     Pointer to MC portal's I/O object
25490 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25491 + * @token:     Token of DPSECI object
25492 + * @irq_index: Identifies the interrupt index to configure
25493 + * @irq_cfg:   IRQ configuration
25494 + *
25495 + * Return:     '0' on Success; Error code otherwise.
25496 + */
25497 +int dpseci_set_irq(struct fsl_mc_io            *mc_io,
25498 +                  uint32_t                     cmd_flags,
25499 +                  uint16_t                     token,
25500 +                  uint8_t                      irq_index,
25501 +                  struct dpseci_irq_cfg        *irq_cfg);
25502 +
25503 +/**
25504 + * dpseci_get_irq() - Get IRQ information from the DPSECI
25505 + *
25506 + * @mc_io:     Pointer to MC portal's I/O object
25507 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25508 + * @token:     Token of DPSECI object
25509 + * @irq_index: The interrupt index to configure
25510 + * @type:      Interrupt type: 0 represents message interrupt
25511 + *             type (both irq_addr and irq_val are valid)
25512 + * @irq_cfg:   IRQ attributes
25513 + *
25514 + * Return:     '0' on Success; Error code otherwise.
25515 + */
25516 +int dpseci_get_irq(struct fsl_mc_io            *mc_io,
25517 +                  uint32_t                     cmd_flags,
25518 +                  uint16_t                     token,
25519 +                  uint8_t                      irq_index,
25520 +                  int                          *type,
25521 +                  struct dpseci_irq_cfg        *irq_cfg);
25522 +
25523 +/**
25524 + * dpseci_set_irq_enable() - Set overall interrupt state.
25525 + * @mc_io:     Pointer to MC portal's I/O object
25526 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25527 + * @token:             Token of DPSECI object
25528 + * @irq_index: The interrupt index to configure
25529 + * @en:                        Interrupt state - enable = 1, disable = 0
25530 + *
25531 + * Allows GPP software to control when interrupts are generated.
25532 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
25533 + * overall interrupt state. if the interrupt is disabled no causes will cause
25534 + * an interrupt
25535 + *
25536 + * Return:     '0' on Success; Error code otherwise.
25537 + */
25538 +int dpseci_set_irq_enable(struct fsl_mc_io     *mc_io,
25539 +                         uint32_t              cmd_flags,
25540 +                         uint16_t              token,
25541 +                         uint8_t               irq_index,
25542 +                         uint8_t               en);
25543 +
25544 +/**
25545 + * dpseci_get_irq_enable() - Get overall interrupt state
25546 + * @mc_io:     Pointer to MC portal's I/O object
25547 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25548 + * @token:             Token of DPSECI object
25549 + * @irq_index: The interrupt index to configure
25550 + * @en:                        Returned Interrupt state - enable = 1, disable = 0
25551 + *
25552 + * Return:     '0' on Success; Error code otherwise.
25553 + */
25554 +int dpseci_get_irq_enable(struct fsl_mc_io     *mc_io,
25555 +                         uint32_t              cmd_flags,
25556 +                         uint16_t              token,
25557 +                         uint8_t               irq_index,
25558 +                         uint8_t               *en);
25559 +
25560 +/**
25561 + * dpseci_set_irq_mask() - Set interrupt mask.
25562 + * @mc_io:     Pointer to MC portal's I/O object
25563 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25564 + * @token:             Token of DPSECI object
25565 + * @irq_index: The interrupt index to configure
25566 + * @mask:              event mask to trigger interrupt;
25567 + *                             each bit:
25568 + *                                     0 = ignore event
25569 + *                                     1 = consider event for asserting IRQ
25570 + *
25571 + * Every interrupt can have up to 32 causes and the interrupt model supports
25572 + * masking/unmasking each cause independently
25573 + *
25574 + * Return:     '0' on Success; Error code otherwise.
25575 + */
25576 +int dpseci_set_irq_mask(struct fsl_mc_io       *mc_io,
25577 +                       uint32_t                cmd_flags,
25578 +                       uint16_t                token,
25579 +                       uint8_t         irq_index,
25580 +                       uint32_t                mask);
25581 +
25582 +/**
25583 + * dpseci_get_irq_mask() - Get interrupt mask.
25584 + * @mc_io:     Pointer to MC portal's I/O object
25585 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25586 + * @token:             Token of DPSECI object
25587 + * @irq_index: The interrupt index to configure
25588 + * @mask:              Returned event mask to trigger interrupt
25589 + *
25590 + * Every interrupt can have up to 32 causes and the interrupt model supports
25591 + * masking/unmasking each cause independently
25592 + *
25593 + * Return:     '0' on Success; Error code otherwise.
25594 + */
25595 +int dpseci_get_irq_mask(struct fsl_mc_io       *mc_io,
25596 +                       uint32_t                cmd_flags,
25597 +                       uint16_t                token,
25598 +                       uint8_t         irq_index,
25599 +                       uint32_t                *mask);
25600 +
25601 +/**
25602 + * dpseci_get_irq_status() - Get the current status of any pending interrupts
25603 + * @mc_io:     Pointer to MC portal's I/O object
25604 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25605 + * @token:             Token of DPSECI object
25606 + * @irq_index: The interrupt index to configure
25607 + * @status:            Returned interrupts status - one bit per cause:
25608 + *                                     0 = no interrupt pending
25609 + *                                     1 = interrupt pending
25610 + *
25611 + * Return:     '0' on Success; Error code otherwise.
25612 + */
25613 +int dpseci_get_irq_status(struct fsl_mc_io     *mc_io,
25614 +                         uint32_t              cmd_flags,
25615 +                         uint16_t              token,
25616 +                         uint8_t               irq_index,
25617 +                         uint32_t              *status);
25618 +
25619 +/**
25620 + * dpseci_clear_irq_status() - Clear a pending interrupt's status
25621 + * @mc_io:     Pointer to MC portal's I/O object
25622 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25623 + * @token:             Token of DPSECI object
25624 + * @irq_index: The interrupt index to configure
25625 + * @status:            bits to clear (W1C) - one bit per cause:
25626 + *                                     0 = don't change
25627 + *                                     1 = clear status bit
25628 + *
25629 + * Return:     '0' on Success; Error code otherwise.
25630 + */
25631 +int dpseci_clear_irq_status(struct fsl_mc_io   *mc_io,
25632 +                           uint32_t            cmd_flags,
25633 +                           uint16_t            token,
25634 +                           uint8_t             irq_index,
25635 +                           uint32_t            status);
25636 +
25637 +/**
25638 + * struct dpseci_attr - Structure representing DPSECI attributes
25639 + * @id: DPSECI object ID
25640 + * @version: DPSECI version
25641 + * @num_tx_queues: number of queues towards the SEC
25642 + * @num_rx_queues: number of queues back from the SEC
25643 + */
25644 +struct dpseci_attr {
25645 +       int             id;
25646 +       /**
25647 +        * struct version - DPSECI version
25648 +        * @major: DPSECI major version
25649 +        * @minor: DPSECI minor version
25650 +        */
25651 +       struct {
25652 +               uint16_t major;
25653 +               uint16_t minor;
25654 +       } version;
25655 +       uint8_t num_tx_queues;
25656 +       uint8_t num_rx_queues;
25657 +};
25658 +
25659 +/**
25660 + * dpseci_get_attributes() - Retrieve DPSECI attributes.
25661 + * @mc_io:     Pointer to MC portal's I/O object
25662 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25663 + * @token:     Token of DPSECI object
25664 + * @attr:      Returned object's attributes
25665 + *
25666 + * Return:     '0' on Success; Error code otherwise.
25667 + */
25668 +int dpseci_get_attributes(struct fsl_mc_io     *mc_io,
25669 +                         uint32_t              cmd_flags,
25670 +                         uint16_t              token,
25671 +                         struct dpseci_attr    *attr);
25672 +
25673 +/**
25674 + * enum dpseci_dest - DPSECI destination types
25675 + * @DPSECI_DEST_NONE: Unassigned destination; The queue is set in parked mode
25676 + *             and does not generate FQDAN notifications; user is expected to
25677 + *             dequeue from the queue based on polling or other user-defined
25678 + *             method
25679 + * @DPSECI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN
25680 + *             notifications to the specified DPIO; user is expected to dequeue
25681 + *             from the queue only after notification is received
25682 + * @DPSECI_DEST_DPCON: The queue is set in schedule mode and does not generate
25683 + *             FQDAN notifications, but is connected to the specified DPCON
25684 + *             object; user is expected to dequeue from the DPCON channel
25685 + */
25686 +enum dpseci_dest {
25687 +       DPSECI_DEST_NONE = 0,
25688 +       DPSECI_DEST_DPIO = 1,
25689 +       DPSECI_DEST_DPCON = 2
25690 +};
25691 +
25692 +/**
25693 + * struct dpseci_dest_cfg - Structure representing DPSECI destination parameters
25694 + * @dest_type: Destination type
25695 + * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
25696 + * @priority: Priority selection within the DPIO or DPCON channel; valid values
25697 + *     are 0-1 or 0-7, depending on the number of priorities in that
25698 + *     channel; not relevant for 'DPSECI_DEST_NONE' option
25699 + */
25700 +struct dpseci_dest_cfg {
25701 +       enum dpseci_dest        dest_type;
25702 +       int                     dest_id;
25703 +       uint8_t         priority;
25704 +};
25705 +
25706 +/**
25707 + * DPSECI queue modification options
25708 + */
25709 +
25710 +/**
25711 + * Select to modify the user's context associated with the queue
25712 + */
25713 +#define DPSECI_QUEUE_OPT_USER_CTX      0x00000001
25714 +
25715 +/**
25716 + * Select to modify the queue's destination
25717 + */
25718 +#define DPSECI_QUEUE_OPT_DEST          0x00000002
25719 +
25720 +/**
25721 + * Select to modify the queue's order preservation
25722 + */
25723 +#define DPSECI_QUEUE_OPT_ORDER_PRESERVATION    0x00000004
25724 +
25725 +/**
25726 + * struct dpseci_rx_queue_cfg - DPSECI RX queue configuration
25727 + * @options: Flags representing the suggested modifications to the queue;
25728 + *     Use any combination of 'DPSECI_QUEUE_OPT_<X>' flags
25729 + * @order_preservation_en: order preservation configuration for the rx queue
25730 + * valid only if 'DPSECI_QUEUE_OPT_ORDER_PRESERVATION' is contained in 'options'
25731 + * @user_ctx: User context value provided in the frame descriptor of each
25732 + *     dequeued frame;
25733 + *     valid only if 'DPSECI_QUEUE_OPT_USER_CTX' is contained in 'options'
25734 + * @dest_cfg: Queue destination parameters;
25735 + *     valid only if 'DPSECI_QUEUE_OPT_DEST' is contained in 'options'
25736 + */
25737 +struct dpseci_rx_queue_cfg {
25738 +       uint32_t options;
25739 +       int order_preservation_en;
25740 +       uint64_t user_ctx;
25741 +       struct dpseci_dest_cfg dest_cfg;
25742 +};
25743 +
25744 +/**
25745 + * dpseci_set_rx_queue() - Set Rx queue configuration
25746 + * @mc_io:     Pointer to MC portal's I/O object
25747 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25748 + * @token:     Token of DPSECI object
25749 + * @queue:     Select the queue relative to number of
25750 + *             priorities configured at DPSECI creation; use
25751 + *             DPSECI_ALL_QUEUES to configure all Rx queues identically.
25752 + * @cfg:       Rx queue configuration
25753 + *
25754 + * Return:     '0' on Success; Error code otherwise.
25755 + */
25756 +int dpseci_set_rx_queue(struct fsl_mc_io                       *mc_io,
25757 +                       uint32_t                                cmd_flags,
25758 +                       uint16_t                                token,
25759 +                       uint8_t                                 queue,
25760 +                       const struct dpseci_rx_queue_cfg        *cfg);
25761 +
25762 +/**
25763 + * struct dpseci_rx_queue_attr - Structure representing attributes of Rx queues
25764 + * @user_ctx: User context value provided in the frame descriptor of each
25765 + *     dequeued frame
25766 + * @order_preservation_en: Status of the order preservation configuration
25767 + *                             on the queue
25768 + * @dest_cfg: Queue destination configuration
25769 + * @fqid: Virtual FQID value to be used for dequeue operations
25770 + */
25771 +struct dpseci_rx_queue_attr {
25772 +       uint64_t                user_ctx;
25773 +       int                     order_preservation_en;
25774 +       struct dpseci_dest_cfg  dest_cfg;
25775 +       uint32_t                fqid;
25776 +};
25777 +
25778 +/**
25779 + * dpseci_get_rx_queue() - Retrieve Rx queue attributes.
25780 + * @mc_io:     Pointer to MC portal's I/O object
25781 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25782 + * @token:     Token of DPSECI object
25783 + * @queue:     Select the queue relative to number of
25784 + *                             priorities configured at DPSECI creation
25785 + * @attr:      Returned Rx queue attributes
25786 + *
25787 + * Return:     '0' on Success; Error code otherwise.
25788 + */
25789 +int dpseci_get_rx_queue(struct fsl_mc_io               *mc_io,
25790 +                       uint32_t                        cmd_flags,
25791 +                       uint16_t                        token,
25792 +                       uint8_t                         queue,
25793 +                       struct dpseci_rx_queue_attr     *attr);
25794 +
25795 +/**
25796 + * struct dpseci_tx_queue_attr - Structure representing attributes of Tx queues
25797 + * @fqid: Virtual FQID to be used for sending frames to SEC hardware
25798 + * @priority: SEC hardware processing priority for the queue
25799 + */
25800 +struct dpseci_tx_queue_attr {
25801 +       uint32_t fqid;
25802 +       uint8_t priority;
25803 +};
25804 +
25805 +/**
25806 + * dpseci_get_tx_queue() - Retrieve Tx queue attributes.
25807 + * @mc_io:     Pointer to MC portal's I/O object
25808 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25809 + * @token:     Token of DPSECI object
25810 + * @queue:     Select the queue relative to number of
25811 + *                             priorities configured at DPSECI creation
25812 + * @attr:      Returned Tx queue attributes
25813 + *
25814 + * Return:     '0' on Success; Error code otherwise.
25815 + */
25816 +int dpseci_get_tx_queue(struct fsl_mc_io               *mc_io,
25817 +                       uint32_t                        cmd_flags,
25818 +                       uint16_t                        token,
25819 +                       uint8_t                         queue,
25820 +                       struct dpseci_tx_queue_attr     *attr);
25821 +
25822 +/**
25823 + * struct dpseci_sec_attr - Structure representing attributes of the SEC
25824 + *                     hardware accelerator
25825 + * @ip_id:     ID for SEC.
25826 + * @major_rev: Major revision number for SEC.
25827 + * @minor_rev: Minor revision number for SEC.
25828 + * @era: SEC Era.
25829 + * @deco_num: The number of copies of the DECO that are implemented in
25830 + * this version of SEC.
25831 + * @zuc_auth_acc_num: The number of copies of ZUCA that are implemented
25832 + * in this version of SEC.
25833 + * @zuc_enc_acc_num: The number of copies of ZUCE that are implemented
25834 + * in this version of SEC.
25835 + * @snow_f8_acc_num: The number of copies of the SNOW-f8 module that are
25836 + * implemented in this version of SEC.
25837 + * @snow_f9_acc_num: The number of copies of the SNOW-f9 module that are
25838 + * implemented in this version of SEC.
25839 + * @crc_acc_num: The number of copies of the CRC module that are implemented
25840 + * in this version of SEC.
25841 + * @pk_acc_num:  The number of copies of the Public Key module that are
25842 + * implemented in this version of SEC.
25843 + * @kasumi_acc_num: The number of copies of the Kasumi module that are
25844 + * implemented in this version of SEC.
25845 + * @rng_acc_num: The number of copies of the Random Number Generator that are
25846 + * implemented in this version of SEC.
25847 + * @md_acc_num: The number of copies of the MDHA (Hashing module) that are
25848 + * implemented in this version of SEC.
25849 + * @arc4_acc_num: The number of copies of the ARC4 module that are implemented
25850 + * in this version of SEC.
25851 + * @des_acc_num: The number of copies of the DES module that are implemented
25852 + * in this version of SEC.
25853 + * @aes_acc_num: The number of copies of the AES module that are implemented
25854 + * in this version of SEC.
25855 + **/
25856 +
25857 +struct dpseci_sec_attr {
25858 +       uint16_t        ip_id;
25859 +       uint8_t major_rev;
25860 +       uint8_t minor_rev;
25861 +       uint8_t     era;
25862 +       uint8_t     deco_num;
25863 +       uint8_t     zuc_auth_acc_num;
25864 +       uint8_t     zuc_enc_acc_num;
25865 +       uint8_t     snow_f8_acc_num;
25866 +       uint8_t     snow_f9_acc_num;
25867 +       uint8_t     crc_acc_num;
25868 +       uint8_t     pk_acc_num;
25869 +       uint8_t     kasumi_acc_num;
25870 +       uint8_t     rng_acc_num;
25871 +       uint8_t     md_acc_num;
25872 +       uint8_t     arc4_acc_num;
25873 +       uint8_t     des_acc_num;
25874 +       uint8_t     aes_acc_num;
25875 +};
25876 +
25877 +/**
25878 + * dpseci_get_sec_attr() - Retrieve SEC accelerator attributes.
25879 + * @mc_io:     Pointer to MC portal's I/O object
25880 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25881 + * @token:     Token of DPSECI object
25882 + * @attr:      Returned SEC attributes
25883 + *
25884 + * Return:     '0' on Success; Error code otherwise.
25885 + */
25886 +int dpseci_get_sec_attr(struct fsl_mc_io               *mc_io,
25887 +                       uint32_t                        cmd_flags,
25888 +                       uint16_t                        token,
25889 +                       struct dpseci_sec_attr *attr);
25890 +
25891 +/**
25892 + * struct dpseci_sec_counters - Structure representing global SEC counters and
25893 + *                             not per dpseci counters
25894 + * @dequeued_requests: Number of Requests Dequeued
25895 + * @ob_enc_requests:   Number of Outbound Encrypt Requests
25896 + * @ib_dec_requests:   Number of Inbound Decrypt Requests
25897 + * @ob_enc_bytes:              Number of Outbound Bytes Encrypted
25898 + * @ob_prot_bytes:             Number of Outbound Bytes Protected
25899 + * @ib_dec_bytes:              Number of Inbound Bytes Decrypted
25900 + * @ib_valid_bytes:            Number of Inbound Bytes Validated
25901 + */
25902 +struct dpseci_sec_counters {
25903 +       uint64_t        dequeued_requests;
25904 +       uint64_t        ob_enc_requests;
25905 +       uint64_t        ib_dec_requests;
25906 +       uint64_t        ob_enc_bytes;
25907 +       uint64_t        ob_prot_bytes;
25908 +       uint64_t        ib_dec_bytes;
25909 +       uint64_t        ib_valid_bytes;
25910 +};
25911 +
25912 +/**
25913 + * dpseci_get_sec_counters() - Retrieve SEC accelerator counters.
25914 + * @mc_io:     Pointer to MC portal's I/O object
25915 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
25916 + * @token:     Token of DPSECI object
25917 + * @counters:  Returned SEC counters
25918 + *
25919 + * Return:     '0' on Success; Error code otherwise.
25920 + */
25921 +int dpseci_get_sec_counters(struct fsl_mc_io           *mc_io,
25922 +                           uint32_t                    cmd_flags,
25923 +               uint16_t                        token,
25924 +               struct dpseci_sec_counters *counters);
25925 +
25926 +#endif /* __FSL_DPSECI_H */
25927 diff --git a/drivers/net/dpaa2/mc/fsl_dpseci_cmd.h b/drivers/net/dpaa2/mc/fsl_dpseci_cmd.h
25928 new file mode 100644
25929 index 0000000..6c0b96e
25930 --- /dev/null
25931 +++ b/drivers/net/dpaa2/mc/fsl_dpseci_cmd.h
25932 @@ -0,0 +1,241 @@
25933 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
25934 + *
25935 + * Redistribution and use in source and binary forms, with or without
25936 + * modification, are permitted provided that the following conditions are met:
25937 + * * Redistributions of source code must retain the above copyright
25938 + * notice, this list of conditions and the following disclaimer.
25939 + * * Redistributions in binary form must reproduce the above copyright
25940 + * notice, this list of conditions and the following disclaimer in the
25941 + * documentation and/or other materials provided with the distribution.
25942 + * * Neither the name of the above-listed copyright holders nor the
25943 + * names of any contributors may be used to endorse or promote products
25944 + * derived from this software without specific prior written permission.
25945 + *
25946 + *
25947 + * ALTERNATIVELY, this software may be distributed under the terms of the
25948 + * GNU General Public License ("GPL") as published by the Free Software
25949 + * Foundation, either version 2 of that License or (at your option) any
25950 + * later version.
25951 + *
25952 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25953 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25954 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25955 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
25956 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25957 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25958 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25959 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25960 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25961 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25962 + * POSSIBILITY OF SUCH DAMAGE.
25963 + */
25964 +#ifndef _FSL_DPSECI_CMD_H
25965 +#define _FSL_DPSECI_CMD_H
25966 +
25967 +/* DPSECI Version */
25968 +#define DPSECI_VER_MAJOR                               3
25969 +#define DPSECI_VER_MINOR                               1
25970 +
25971 +/* Command IDs */
25972 +#define DPSECI_CMDID_CLOSE                             0x800
25973 +#define DPSECI_CMDID_OPEN                              0x809
25974 +#define DPSECI_CMDID_CREATE                            0x909
25975 +#define DPSECI_CMDID_DESTROY                           0x900
25976 +
25977 +#define DPSECI_CMDID_ENABLE                            0x002
25978 +#define DPSECI_CMDID_DISABLE                           0x003
25979 +#define DPSECI_CMDID_GET_ATTR                          0x004
25980 +#define DPSECI_CMDID_RESET                             0x005
25981 +#define DPSECI_CMDID_IS_ENABLED                                0x006
25982 +
25983 +#define DPSECI_CMDID_SET_IRQ                           0x010
25984 +#define DPSECI_CMDID_GET_IRQ                           0x011
25985 +#define DPSECI_CMDID_SET_IRQ_ENABLE                    0x012
25986 +#define DPSECI_CMDID_GET_IRQ_ENABLE                    0x013
25987 +#define DPSECI_CMDID_SET_IRQ_MASK                      0x014
25988 +#define DPSECI_CMDID_GET_IRQ_MASK                      0x015
25989 +#define DPSECI_CMDID_GET_IRQ_STATUS                    0x016
25990 +#define DPSECI_CMDID_CLEAR_IRQ_STATUS                  0x017
25991 +
25992 +#define DPSECI_CMDID_SET_RX_QUEUE                      0x194
25993 +#define DPSECI_CMDID_GET_RX_QUEUE                      0x196
25994 +#define DPSECI_CMDID_GET_TX_QUEUE                      0x197
25995 +#define DPSECI_CMDID_GET_SEC_ATTR                      0x198
25996 +#define DPSECI_CMDID_GET_SEC_COUNTERS          0x199
25997 +
25998 +/*                cmd, param, offset, width, type, arg_name */
25999 +#define DPSECI_CMD_OPEN(cmd, dpseci_id) \
26000 +       MC_CMD_OP(cmd, 0, 0,  32, int,      dpseci_id)
26001 +
26002 +/*                cmd, param, offset, width, type, arg_name */
26003 +#define DPSECI_CMD_CREATE(cmd, cfg) \
26004 +do { \
26005 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->priorities[0]);\
26006 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  cfg->priorities[1]);\
26007 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->priorities[2]);\
26008 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->priorities[3]);\
26009 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->priorities[4]);\
26010 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  cfg->priorities[5]);\
26011 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  cfg->priorities[6]);\
26012 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  cfg->priorities[7]);\
26013 +       MC_CMD_OP(cmd, 1, 0,  8,  uint8_t,  cfg->num_tx_queues);\
26014 +       MC_CMD_OP(cmd, 1, 8,  8,  uint8_t,  cfg->num_rx_queues);\
26015 +} while (0)
26016 +
26017 +/*                cmd, param, offset, width, type, arg_name */
26018 +#define DPSECI_RSP_IS_ENABLED(cmd, en) \
26019 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
26020 +
26021 +/*                cmd, param, offset, width, type, arg_name */
26022 +#define DPSECI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
26023 +do { \
26024 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
26025 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
26026 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
26027 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
26028 +} while (0)
26029 +
26030 +/*                cmd, param, offset, width, type, arg_name */
26031 +#define DPSECI_CMD_GET_IRQ(cmd, irq_index) \
26032 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
26033 +
26034 +/*                cmd, param, offset, width, type, arg_name */
26035 +#define DPSECI_RSP_GET_IRQ(cmd, type, irq_cfg) \
26036 +do { \
26037 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
26038 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
26039 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
26040 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
26041 +} while (0)
26042 +
26043 +/*                cmd, param, offset, width, type, arg_name */
26044 +#define DPSECI_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
26045 +do { \
26046 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  enable_state); \
26047 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
26048 +} while (0)
26049 +
26050 +/*                cmd, param, offset, width, type, arg_name */
26051 +#define DPSECI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
26052 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
26053 +
26054 +/*                cmd, param, offset, width, type, arg_name */
26055 +#define DPSECI_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
26056 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  enable_state)
26057 +
26058 +/*                cmd, param, offset, width, type, arg_name */
26059 +#define DPSECI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
26060 +do { \
26061 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
26062 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
26063 +} while (0)
26064 +
26065 +/*                cmd, param, offset, width, type, arg_name */
26066 +#define DPSECI_CMD_GET_IRQ_MASK(cmd, irq_index) \
26067 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
26068 +
26069 +/*                cmd, param, offset, width, type, arg_name */
26070 +#define DPSECI_RSP_GET_IRQ_MASK(cmd, mask) \
26071 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
26072 +
26073 +/*                cmd, param, offset, width, type, arg_name */
26074 +#define DPSECI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
26075 +do { \
26076 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
26077 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
26078 +} while (0)
26079 +
26080 +/*                cmd, param, offset, width, type, arg_name */
26081 +#define DPSECI_RSP_GET_IRQ_STATUS(cmd, status) \
26082 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t,  status)
26083 +
26084 +/*                cmd, param, offset, width, type, arg_name */
26085 +#define DPSECI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
26086 +do { \
26087 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
26088 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index); \
26089 +} while (0)
26090 +
26091 +/*                cmd, param, offset, width, type, arg_name */
26092 +#define DPSECI_RSP_GET_ATTR(cmd, attr) \
26093 +do { \
26094 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->id); \
26095 +       MC_RSP_OP(cmd, 1, 0,  8,  uint8_t,  attr->num_tx_queues); \
26096 +       MC_RSP_OP(cmd, 1, 8,  8,  uint8_t,  attr->num_rx_queues); \
26097 +       MC_RSP_OP(cmd, 5, 0,  16, uint16_t, attr->version.major);\
26098 +       MC_RSP_OP(cmd, 5, 16, 16, uint16_t, attr->version.minor);\
26099 +} while (0)
26100 +
26101 +/*                cmd, param, offset, width, type, arg_name */
26102 +#define DPSECI_CMD_SET_RX_QUEUE(cmd, queue, cfg) \
26103 +do { \
26104 +       MC_CMD_OP(cmd, 0, 0,  32, int,      cfg->dest_cfg.dest_id); \
26105 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dest_cfg.priority); \
26106 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  queue); \
26107 +       MC_CMD_OP(cmd, 0, 48, 4,  enum dpseci_dest, cfg->dest_cfg.dest_type); \
26108 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, cfg->user_ctx); \
26109 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->options);\
26110 +       MC_CMD_OP(cmd, 2, 32, 1,  int,          cfg->order_preservation_en);\
26111 +} while (0)
26112 +
26113 +/*                cmd, param, offset, width, type, arg_name */
26114 +#define DPSECI_CMD_GET_RX_QUEUE(cmd, queue) \
26115 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  queue)
26116 +
26117 +/*                cmd, param, offset, width, type, arg_name */
26118 +#define DPSECI_RSP_GET_RX_QUEUE(cmd, attr) \
26119 +do { \
26120 +       MC_RSP_OP(cmd, 0, 0,  32, int,      attr->dest_cfg.dest_id);\
26121 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  attr->dest_cfg.priority);\
26122 +       MC_RSP_OP(cmd, 0, 48, 4,  enum dpseci_dest, attr->dest_cfg.dest_type);\
26123 +       MC_RSP_OP(cmd, 1, 0,  8,  uint64_t,  attr->user_ctx);\
26124 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t,  attr->fqid);\
26125 +       MC_RSP_OP(cmd, 2, 32, 1,  int,           attr->order_preservation_en);\
26126 +} while (0)
26127 +
26128 +/*                cmd, param, offset, width, type, arg_name */
26129 +#define DPSECI_CMD_GET_TX_QUEUE(cmd, queue) \
26130 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  queue)
26131 +
26132 +/*                cmd, param, offset, width, type, arg_name */
26133 +#define DPSECI_RSP_GET_TX_QUEUE(cmd, attr) \
26134 +do { \
26135 +       MC_RSP_OP(cmd, 0, 32, 32, uint32_t,  attr->fqid);\
26136 +       MC_RSP_OP(cmd, 1, 0,  8,  uint8_t,  attr->priority);\
26137 +} while (0)
26138 +
26139 +/*                cmd, param, offset, width, type, arg_name */
26140 +#define DPSECI_RSP_GET_SEC_ATTR(cmd, attr) \
26141 +do { \
26142 +       MC_RSP_OP(cmd, 0,  0, 16, uint16_t,  attr->ip_id);\
26143 +       MC_RSP_OP(cmd, 0, 16,  8,  uint8_t,  attr->major_rev);\
26144 +       MC_RSP_OP(cmd, 0, 24,  8,  uint8_t,  attr->minor_rev);\
26145 +       MC_RSP_OP(cmd, 0, 32,  8,  uint8_t,  attr->era);\
26146 +       MC_RSP_OP(cmd, 1,  0,  8,  uint8_t,  attr->deco_num);\
26147 +       MC_RSP_OP(cmd, 1,  8,  8,  uint8_t,  attr->zuc_auth_acc_num);\
26148 +       MC_RSP_OP(cmd, 1, 16,  8,  uint8_t,  attr->zuc_enc_acc_num);\
26149 +       MC_RSP_OP(cmd, 1, 32,  8,  uint8_t,  attr->snow_f8_acc_num);\
26150 +       MC_RSP_OP(cmd, 1, 40,  8,  uint8_t,  attr->snow_f9_acc_num);\
26151 +       MC_RSP_OP(cmd, 1, 48,  8,  uint8_t,  attr->crc_acc_num);\
26152 +       MC_RSP_OP(cmd, 2,  0,  8,  uint8_t,  attr->pk_acc_num);\
26153 +       MC_RSP_OP(cmd, 2,  8,  8,  uint8_t,  attr->kasumi_acc_num);\
26154 +       MC_RSP_OP(cmd, 2, 16,  8,  uint8_t,  attr->rng_acc_num);\
26155 +       MC_RSP_OP(cmd, 2, 32,  8,  uint8_t,  attr->md_acc_num);\
26156 +       MC_RSP_OP(cmd, 2, 40,  8,  uint8_t,  attr->arc4_acc_num);\
26157 +       MC_RSP_OP(cmd, 2, 48,  8,  uint8_t,  attr->des_acc_num);\
26158 +       MC_RSP_OP(cmd, 2, 56,  8,  uint8_t,  attr->aes_acc_num);\
26159 +} while (0)
26160 +
26161 +/*                cmd, param, offset, width, type, arg_name */
26162 +#define DPSECI_RSP_GET_SEC_COUNTERS(cmd, counters) \
26163 +do { \
26164 +       MC_RSP_OP(cmd, 0,  0, 64, uint64_t,  counters->dequeued_requests);\
26165 +       MC_RSP_OP(cmd, 1,  0, 64, uint64_t,  counters->ob_enc_requests);\
26166 +       MC_RSP_OP(cmd, 2,  0, 64, uint64_t,  counters->ib_dec_requests);\
26167 +       MC_RSP_OP(cmd, 3,  0, 64, uint64_t,  counters->ob_enc_bytes);\
26168 +       MC_RSP_OP(cmd, 4,  0, 64, uint64_t,  counters->ob_prot_bytes);\
26169 +       MC_RSP_OP(cmd, 5,  0, 64, uint64_t,  counters->ib_dec_bytes);\
26170 +       MC_RSP_OP(cmd, 6,  0, 64, uint64_t,  counters->ib_valid_bytes);\
26171 +} while (0)
26172 +
26173 +#endif /* _FSL_DPSECI_CMD_H */
26174 diff --git a/drivers/net/dpaa2/mc/fsl_dpsw.h b/drivers/net/dpaa2/mc/fsl_dpsw.h
26175 new file mode 100644
26176 index 0000000..9c1bd9d
26177 --- /dev/null
26178 +++ b/drivers/net/dpaa2/mc/fsl_dpsw.h
26179 @@ -0,0 +1,2164 @@
26180 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
26181 + *
26182 + * Redistribution and use in source and binary forms, with or without
26183 + * modification, are permitted provided that the following conditions are met:
26184 + * * Redistributions of source code must retain the above copyright
26185 + * notice, this list of conditions and the following disclaimer.
26186 + * * Redistributions in binary form must reproduce the above copyright
26187 + * notice, this list of conditions and the following disclaimer in the
26188 + * documentation and/or other materials provided with the distribution.
26189 + * * Neither the name of the above-listed copyright holders nor the
26190 + * names of any contributors may be used to endorse or promote products
26191 + * derived from this software without specific prior written permission.
26192 + *
26193 + *
26194 + * ALTERNATIVELY, this software may be distributed under the terms of the
26195 + * GNU General Public License ("GPL") as published by the Free Software
26196 + * Foundation, either version 2 of that License or (at your option) any
26197 + * later version.
26198 + *
26199 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26200 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26201 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26202 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
26203 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26204 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26205 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26206 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26207 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26208 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26209 + * POSSIBILITY OF SUCH DAMAGE.
26210 + */
26211 +#ifndef __FSL_DPSW_H
26212 +#define __FSL_DPSW_H
26213 +
26214 +#include <fsl_net.h>
26215 +
26216 +/* Data Path L2-Switch API
26217 + * Contains API for handling DPSW topology and functionality
26218 + */
26219 +
26220 +struct fsl_mc_io;
26221 +
26222 +/**
26223 + * DPSW general definitions
26224 + */
26225 +
26226 +/**
26227 + * Maximum number of traffic class priorities
26228 + */
26229 +#define DPSW_MAX_PRIORITIES    8
26230 +/**
26231 + * Maximum number of interfaces
26232 + */
26233 +#define DPSW_MAX_IF            64
26234 +
26235 +/**
26236 + * dpsw_open() - Open a control session for the specified object
26237 + * @mc_io:     Pointer to MC portal's I/O object
26238 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26239 + * @dpsw_id:   DPSW unique ID
26240 + * @token:     Returned token; use in subsequent API calls
26241 + *
26242 + * This function can be used to open a control session for an
26243 + * already created object; an object may have been declared in
26244 + * the DPL or by calling the dpsw_create() function.
26245 + * This function returns a unique authentication token,
26246 + * associated with the specific object ID and the specific MC
26247 + * portal; this token must be used in all subsequent commands for
26248 + * this specific object
26249 + *
26250 + * Return:     '0' on Success; Error code otherwise.
26251 + */
26252 +int dpsw_open(struct fsl_mc_io *mc_io,
26253 +             uint32_t          cmd_flags,
26254 +             int               dpsw_id,
26255 +             uint16_t          *token);
26256 +
26257 +/**
26258 + * dpsw_close() - Close the control session of the object
26259 + * @mc_io:     Pointer to MC portal's I/O object
26260 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26261 + * @token:     Token of DPSW object
26262 + *
26263 + * After this function is called, no further operations are
26264 + * allowed on the object without opening a new control session.
26265 + *
26266 + * Return:     '0' on Success; Error code otherwise.
26267 + */
26268 +int dpsw_close(struct fsl_mc_io *mc_io,
26269 +              uint32_t cmd_flags,
26270 +              uint16_t token);
26271 +
26272 +/**
26273 + * DPSW options
26274 + */
26275 +
26276 +/**
26277 + * Disable flooding
26278 + */
26279 +#define DPSW_OPT_FLOODING_DIS          0x0000000000000001ULL
26280 +/**
26281 + * Disable Multicast
26282 + */
26283 +#define DPSW_OPT_MULTICAST_DIS         0x0000000000000004ULL
26284 +/**
26285 + * Support control interface
26286 + */
26287 +#define DPSW_OPT_CTRL_IF_DIS           0x0000000000000010ULL
26288 +/**
26289 + * Disable flooding metering
26290 + */
26291 +#define DPSW_OPT_FLOODING_METERING_DIS  0x0000000000000020ULL
26292 +/**
26293 + * Enable metering
26294 + */
26295 +#define DPSW_OPT_METERING_EN            0x0000000000000040ULL
26296 +
26297 +/**
26298 + * enum dpsw_component_type - component type of a bridge
26299 + * @DPSW_COMPONENT_TYPE_C_VLAN: A C-VLAN component of an
26300 + *   enterprise VLAN bridge or of a Provider Bridge used
26301 + *   to process C-tagged frames
26302 + * @DPSW_COMPONENT_TYPE_S_VLAN: An S-VLAN component of a
26303 + *   Provider Bridge
26304 + *
26305 + */
26306 +enum dpsw_component_type {
26307 +       DPSW_COMPONENT_TYPE_C_VLAN = 0,
26308 +       DPSW_COMPONENT_TYPE_S_VLAN
26309 +};
26310 +
26311 +/**
26312 + * struct dpsw_cfg - DPSW configuration
26313 + * @num_ifs: Number of external and internal interfaces
26314 + * @adv: Advanced parameters; default is all zeros;
26315 + *              use this structure to change default settings
26316 + */
26317 +struct dpsw_cfg {
26318 +       uint16_t                num_ifs;
26319 +       /**
26320 +        * struct adv - Advanced parameters
26321 +        * @options: Enable/Disable DPSW features (bitmap)
26322 +        * @max_vlans: Maximum Number of VLAN's; 0 - indicates default 16
26323 +        * @max_meters_per_if: Number of meters per interface
26324 +        * @max_fdbs: Maximum Number of FDB's; 0 - indicates default 16
26325 +        * @max_fdb_entries: Number of FDB entries for default FDB table;
26326 +        *                      0 - indicates default 1024 entries.
26327 +        * @fdb_aging_time: Default FDB aging time for default FDB table;
26328 +        *                      0 - indicates default 300 seconds
26329 +        * @max_fdb_mc_groups: Number of multicast groups in each FDB table;
26330 +        *                      0 - indicates default 32
26331 +        * @component_type: Indicates the component type of this bridge
26332 +        */
26333 +       struct {
26334 +               uint64_t        options;
26335 +               uint16_t        max_vlans;
26336 +               uint8_t max_meters_per_if;
26337 +               uint8_t max_fdbs;
26338 +               uint16_t        max_fdb_entries;
26339 +               uint16_t        fdb_aging_time;
26340 +               uint16_t        max_fdb_mc_groups;
26341 +               enum dpsw_component_type component_type;
26342 +       } adv;
26343 +};
26344 +
26345 +/**
26346 + * dpsw_create() - Create the DPSW object.
26347 + * @mc_io:     Pointer to MC portal's I/O object
26348 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26349 + * @cfg:       Configuration structure
26350 + * @token:     Returned token; use in subsequent API calls
26351 + *
26352 + * Create the DPSW object, allocate required resources and
26353 + * perform required initialization.
26354 + *
26355 + * The object can be created either by declaring it in the
26356 + * DPL file, or by calling this function.
26357 + *
26358 + * This function returns a unique authentication token,
26359 + * associated with the specific object ID and the specific MC
26360 + * portal; this token must be used in all subsequent calls to
26361 + * this specific object. For objects that are created using the
26362 + * DPL file, call dpsw_open() function to get an authentication
26363 + * token first
26364 + *
26365 + * Return:     '0' on Success; Error code otherwise.
26366 + */
26367 +int dpsw_create(struct fsl_mc_io       *mc_io,
26368 +               uint32_t                cmd_flags,
26369 +               const struct dpsw_cfg   *cfg,
26370 +               uint16_t                *token);
26371 +
26372 +/**
26373 + * dpsw_destroy() - Destroy the DPSW object and release all its resources.
26374 + * @mc_io:     Pointer to MC portal's I/O object
26375 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26376 + * @token:     Token of DPSW object
26377 + *
26378 + * Return:     '0' on Success; error code otherwise.
26379 + */
26380 +int dpsw_destroy(struct fsl_mc_io      *mc_io,
26381 +                uint32_t               cmd_flags,
26382 +                uint16_t               token);
26383 +
26384 +/**
26385 + * dpsw_enable() - Enable DPSW functionality
26386 + * @mc_io:     Pointer to MC portal's I/O object
26387 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26388 + * @token:             Token of DPSW object
26389 + *
26390 + * Return:     Completion status. '0' on Success; Error code otherwise.
26391 + */
26392 +int dpsw_enable(struct fsl_mc_io       *mc_io,
26393 +               uint32_t                cmd_flags,
26394 +               uint16_t                token);
26395 +
26396 +/**
26397 + * dpsw_disable() - Disable DPSW functionality
26398 + * @mc_io:     Pointer to MC portal's I/O object
26399 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26400 + * @token:             Token of DPSW object
26401 + *
26402 + * Return:     Completion status. '0' on Success; Error code otherwise.
26403 + */
26404 +int dpsw_disable(struct fsl_mc_io      *mc_io,
26405 +                uint32_t               cmd_flags,
26406 +                uint16_t               token);
26407 +
26408 +/**
26409 + * dpsw_is_enabled() - Check if the DPSW is enabled
26410 + *
26411 + * @mc_io:     Pointer to MC portal's I/O object
26412 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26413 + * @token:     Token of DPSW object
26414 + * @en:                Returns '1' if object is enabled; '0' otherwise
26415 + *
26416 + * Return:     '0' on Success; Error code otherwise
26417 + */
26418 +int dpsw_is_enabled(struct fsl_mc_io   *mc_io,
26419 +                   uint32_t            cmd_flags,
26420 +                   uint16_t            token,
26421 +                   int         *en);
26422 +
26423 +/**
26424 + * dpsw_reset() - Reset the DPSW, returns the object to initial state.
26425 + * @mc_io:     Pointer to MC portal's I/O object
26426 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26427 + * @token:     Token of DPSW object
26428 + *
26429 + * Return:     '0' on Success; Error code otherwise.
26430 + */
26431 +int dpsw_reset(struct fsl_mc_io *mc_io,
26432 +              uint32_t cmd_flags,
26433 +              uint16_t token);
26434 +
26435 +/**
26436 + * DPSW IRQ Index and Events
26437 + */
26438 +
26439 +#define DPSW_IRQ_INDEX_IF              0x0000
26440 +#define DPSW_IRQ_INDEX_L2SW            0x0001
26441 +
26442 +/**
26443 + * IRQ event - Indicates that the link state changed
26444 + */
26445 +#define DPSW_IRQ_EVENT_LINK_CHANGED    0x0001
26446 +
26447 +/**
26448 + * struct dpsw_irq_cfg - IRQ configuration
26449 + * @addr:      Address that must be written to signal a message-based interrupt
26450 + * @val:       Value to write into irq_addr address
26451 + * @irq_num: A user defined number associated with this IRQ
26452 + */
26453 +struct dpsw_irq_cfg {
26454 +            uint64_t           addr;
26455 +            uint32_t           val;
26456 +            int                irq_num;
26457 +};
26458 +
26459 +/**
26460 + * dpsw_set_irq() - Set IRQ information for the DPSW to trigger an interrupt.
26461 + * @mc_io:     Pointer to MC portal's I/O object
26462 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26463 + * @token:     Token of DPSW object
26464 + * @irq_index: Identifies the interrupt index to configure
26465 + * @irq_cfg:   IRQ configuration
26466 + *
26467 + * Return:     '0' on Success; Error code otherwise.
26468 + */
26469 +int dpsw_set_irq(struct fsl_mc_io      *mc_io,
26470 +                uint32_t               cmd_flags,
26471 +                uint16_t               token,
26472 +                uint8_t                irq_index,
26473 +                struct dpsw_irq_cfg    *irq_cfg);
26474 +
26475 +/**
26476 + * dpsw_get_irq() - Get IRQ information from the DPSW
26477 + *
26478 + * @mc_io:     Pointer to MC portal's I/O object
26479 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26480 + * @token:     Token of DPSW object
26481 + * @irq_index: The interrupt index to configure
26482 + * @type:      Interrupt type: 0 represents message interrupt
26483 + *             type (both irq_addr and irq_val are valid)
26484 + * @irq_cfg:   IRQ attributes
26485 + *
26486 + * Return:     '0' on Success; Error code otherwise.
26487 + */
26488 +int dpsw_get_irq(struct fsl_mc_io      *mc_io,
26489 +                uint32_t               cmd_flags,
26490 +                uint16_t               token,
26491 +                uint8_t                irq_index,
26492 +                int                    *type,
26493 +                struct dpsw_irq_cfg    *irq_cfg);
26494 +
26495 +/**
26496 + * dpsw_set_irq_enable() - Set overall interrupt state.
26497 + * @mc_io:     Pointer to MC portal's I/O object
26498 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26499 + * @token:             Token of DPCI object
26500 + * @irq_index: The interrupt index to configure
26501 + * @en:                        Interrupt state - enable = 1, disable = 0
26502 + *
26503 + * Allows GPP software to control when interrupts are generated.
26504 + * Each interrupt can have up to 32 causes.  The enable/disable control's the
26505 + * overall interrupt state. if the interrupt is disabled no causes will cause
26506 + * an interrupt
26507 + *
26508 + * Return:     '0' on Success; Error code otherwise.
26509 + */
26510 +int dpsw_set_irq_enable(struct fsl_mc_io       *mc_io,
26511 +                       uint32_t                cmd_flags,
26512 +                       uint16_t                token,
26513 +                       uint8_t         irq_index,
26514 +                       uint8_t         en);
26515 +
26516 +/**
26517 + * dpsw_get_irq_enable() - Get overall interrupt state
26518 + * @mc_io:     Pointer to MC portal's I/O object
26519 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26520 + * @token:             Token of DPSW object
26521 + * @irq_index: The interrupt index to configure
26522 + * @en:                        Returned Interrupt state - enable = 1, disable = 0
26523 + *
26524 + * Return:     '0' on Success; Error code otherwise.
26525 + */
26526 +int dpsw_get_irq_enable(struct fsl_mc_io       *mc_io,
26527 +                       uint32_t                cmd_flags,
26528 +                       uint16_t                token,
26529 +                       uint8_t         irq_index,
26530 +                       uint8_t         *en);
26531 +
26532 +/**
26533 + * dpsw_set_irq_mask() - Set interrupt mask.
26534 + * @mc_io:     Pointer to MC portal's I/O object
26535 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26536 + * @token:             Token of DPCI object
26537 + * @irq_index: The interrupt index to configure
26538 + * @mask:              event mask to trigger interrupt;
26539 + *                             each bit:
26540 + *                                     0 = ignore event
26541 + *                                     1 = consider event for asserting IRQ
26542 + *
26543 + * Every interrupt can have up to 32 causes and the interrupt model supports
26544 + * masking/unmasking each cause independently
26545 + *
26546 + * Return:     '0' on Success; Error code otherwise.
26547 + */
26548 +int dpsw_set_irq_mask(struct fsl_mc_io *mc_io,
26549 +                     uint32_t          cmd_flags,
26550 +                     uint16_t          token,
26551 +                     uint8_t           irq_index,
26552 +                     uint32_t          mask);
26553 +
26554 +/**
26555 + * dpsw_get_irq_mask() - Get interrupt mask.
26556 + * @mc_io:     Pointer to MC portal's I/O object
26557 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26558 + * @token:             Token of DPSW object
26559 + * @irq_index: The interrupt index to configure
26560 + * @mask:              Returned event mask to trigger interrupt
26561 + *
26562 + * Every interrupt can have up to 32 causes and the interrupt model supports
26563 + * masking/unmasking each cause independently
26564 + *
26565 + * Return:     '0' on Success; Error code otherwise.
26566 + */
26567 +int dpsw_get_irq_mask(struct fsl_mc_io *mc_io,
26568 +                     uint32_t          cmd_flags,
26569 +                     uint16_t          token,
26570 +                     uint8_t           irq_index,
26571 +                     uint32_t          *mask);
26572 +
26573 +/**
26574 + * dpsw_get_irq_status() - Get the current status of any pending interrupts
26575 + * @mc_io:     Pointer to MC portal's I/O object
26576 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26577 + * @token:             Token of DPSW object
26578 + * @irq_index: The interrupt index to configure
26579 + * @status:            Returned interrupts status - one bit per cause:
26580 + *                                     0 = no interrupt pending
26581 + *                                     1 = interrupt pending
26582 + *
26583 + * Return:     '0' on Success; Error code otherwise.
26584 + */
26585 +int dpsw_get_irq_status(struct fsl_mc_io       *mc_io,
26586 +                       uint32_t                cmd_flags,
26587 +                       uint16_t                token,
26588 +                       uint8_t         irq_index,
26589 +                       uint32_t                *status);
26590 +
26591 +/**
26592 + * dpsw_clear_irq_status() - Clear a pending interrupt's status
26593 + * @mc_io:     Pointer to MC portal's I/O object
26594 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26595 + * @token:             Token of DPCI object
26596 + * @irq_index: The interrupt index to configure
26597 + * @status:            bits to clear (W1C) - one bit per cause:
26598 + *                                     0 = don't change
26599 + *                                     1 = clear status bit
26600 + *
26601 + * Return:     '0' on Success; Error code otherwise.
26602 + */
26603 +int dpsw_clear_irq_status(struct fsl_mc_io     *mc_io,
26604 +                         uint32_t              cmd_flags,
26605 +                         uint16_t              token,
26606 +                         uint8_t               irq_index,
26607 +                         uint32_t              status);
26608 +/**
26609 + * struct dpsw_attr - Structure representing DPSW attributes
26610 + * @id: DPSW object ID
26611 + * @version: DPSW version
26612 + * @options: Enable/Disable DPSW features
26613 + * @max_vlans: Maximum Number of VLANs
26614 + * @max_meters_per_if:  Number of meters per interface
26615 + * @max_fdbs: Maximum Number of FDBs
26616 + * @max_fdb_entries: Number of FDB entries for default FDB table;
26617 + *                     0 - indicates default 1024 entries.
26618 + * @fdb_aging_time: Default FDB aging time for default FDB table;
26619 + *                     0 - indicates default 300 seconds
26620 + * @max_fdb_mc_groups: Number of multicast groups in each FDB table;
26621 + *                     0 - indicates default 32
26622 + * @mem_size: DPSW frame storage memory size
26623 + * @num_ifs: Number of interfaces
26624 + * @num_vlans: Current number of VLANs
26625 + * @num_fdbs: Current number of FDBs
26626 + * @component_type: Component type of this bridge
26627 + */
26628 +struct dpsw_attr {
26629 +       int             id;
26630 +       /**
26631 +        * struct version - DPSW version
26632 +        * @major: DPSW major version
26633 +        * @minor: DPSW minor version
26634 +        */
26635 +       struct {
26636 +               uint16_t major;
26637 +               uint16_t minor;
26638 +       } version;
26639 +       uint64_t        options;
26640 +       uint16_t        max_vlans;
26641 +       uint8_t max_meters_per_if;
26642 +       uint8_t max_fdbs;
26643 +       uint16_t        max_fdb_entries;
26644 +       uint16_t        fdb_aging_time;
26645 +       uint16_t        max_fdb_mc_groups;
26646 +       uint16_t        num_ifs;
26647 +       uint16_t        mem_size;
26648 +       uint16_t        num_vlans;
26649 +       uint8_t         num_fdbs;
26650 +       enum dpsw_component_type component_type;
26651 +};
26652 +
26653 +/**
26654 + * dpsw_get_attributes() - Retrieve DPSW attributes
26655 + * @mc_io:     Pointer to MC portal's I/O object
26656 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26657 + * @token:             Token of DPSW object
26658 + * @attr:              Returned DPSW attributes
26659 + *
26660 + * Return:     Completion status. '0' on Success; Error code otherwise.
26661 + */
26662 +int dpsw_get_attributes(struct fsl_mc_io       *mc_io,
26663 +                       uint32_t                cmd_flags,
26664 +                       uint16_t                token,
26665 +                       struct dpsw_attr        *attr);
26666 +
26667 +/**
26668 + * dpsw_set_reflection_if() - Set target interface for reflected interfaces.
26669 + * @mc_io:     Pointer to MC portal's I/O object
26670 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26671 + * @token:             Token of DPSW object
26672 + * @if_id:             Interface Id
26673 + *
26674 + *     Only one reflection receive interface is allowed per switch
26675 + *
26676 + * Return:     Completion status. '0' on Success; Error code otherwise.
26677 + */
26678 +int dpsw_set_reflection_if(struct fsl_mc_io    *mc_io,
26679 +                          uint32_t             cmd_flags,
26680 +                          uint16_t             token,
26681 +                          uint16_t             if_id);
26682 +
26683 +/**
26684 + * enum dpsw_action - Action selection for special/control frames
26685 + * @DPSW_ACTION_DROP: Drop frame
26686 + * @DPSW_ACTION_REDIRECT: Redirect frame to control port
26687 + */
26688 +enum dpsw_action {
26689 +       DPSW_ACTION_DROP = 0,
26690 +       DPSW_ACTION_REDIRECT = 1
26691 +};
26692 +
26693 +/**
26694 + * Enable auto-negotiation
26695 + */
26696 +#define DPSW_LINK_OPT_AUTONEG          0x0000000000000001ULL
26697 +/**
26698 + * Enable half-duplex mode
26699 + */
26700 +#define DPSW_LINK_OPT_HALF_DUPLEX      0x0000000000000002ULL
26701 +/**
26702 + * Enable pause frames
26703 + */
26704 +#define DPSW_LINK_OPT_PAUSE            0x0000000000000004ULL
26705 +/**
26706 + * Enable a-symmetric pause frames
26707 + */
26708 +#define DPSW_LINK_OPT_ASYM_PAUSE       0x0000000000000008ULL
26709 +
26710 +/**
26711 + * struct dpsw_link_cfg - Structure representing DPSW link configuration
26712 + * @rate: Rate
26713 + * @options: Mask of available options; use 'DPSW_LINK_OPT_<X>' values
26714 + */
26715 +struct dpsw_link_cfg {
26716 +       uint32_t rate;
26717 +       uint64_t options;
26718 +};
26719 +
26720 +/**
26721 + * dpsw_if_set_link_cfg() - set the link configuration.
26722 + * @mc_io:     Pointer to MC portal's I/O object
26723 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26724 + * @token: Token of DPSW object
26725 + * @if_id: interface id
26726 + * @cfg: Link configuration
26727 + *
26728 + * Return:     '0' on Success; Error code otherwise.
26729 + */
26730 +int dpsw_if_set_link_cfg(struct fsl_mc_io      *mc_io,
26731 +                        uint32_t               cmd_flags,
26732 +                        uint16_t               token,
26733 +                        uint16_t               if_id,
26734 +                        struct dpsw_link_cfg   *cfg);
26735 +/**
26736 + * struct dpsw_link_state - Structure representing DPSW link state
26737 + * @rate: Rate
26738 + * @options: Mask of available options; use 'DPSW_LINK_OPT_<X>' values
26739 + * @up: 0 - covers two cases: down and disconnected, 1 - up
26740 + */
26741 +struct dpsw_link_state {
26742 +       uint32_t rate;
26743 +       uint64_t options;
26744 +       int      up;
26745 +};
26746 +
26747 +/**
26748 + * dpsw_if_get_link_state - Return the link state
26749 + * @mc_io:     Pointer to MC portal's I/O object
26750 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26751 + * @token: Token of DPSW object
26752 + * @if_id: interface id
26753 + * @state: link state  1 - linkup, 0 - link down or disconnected
26754 + *
26755 + * @returns    '0' on Success; Error code otherwise.
26756 + */
26757 +int dpsw_if_get_link_state(struct fsl_mc_io            *mc_io,
26758 +                          uint32_t                     cmd_flags,
26759 +                          uint16_t                     token,
26760 +                          uint16_t                     if_id,
26761 +                          struct dpsw_link_state       *state);
26762 +
26763 +/**
26764 + * dpsw_if_set_flooding() - Enable Disable flooding for particular interface
26765 + * @mc_io:     Pointer to MC portal's I/O object
26766 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26767 + * @token:             Token of DPSW object
26768 + * @if_id:             Interface Identifier
26769 + * @en:                        1 - enable, 0 - disable
26770 + *
26771 + * Return:     Completion status. '0' on Success; Error code otherwise.
26772 + */
26773 +int dpsw_if_set_flooding(struct fsl_mc_io      *mc_io,
26774 +                        uint32_t               cmd_flags,
26775 +                        uint16_t               token,
26776 +                        uint16_t               if_id,
26777 +                        int                    en);
26778 +
26779 +/**
26780 + * dpsw_if_set_broadcast() - Enable/disable broadcast for particular interface
26781 + * @mc_io:     Pointer to MC portal's I/O object
26782 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26783 + * @token:             Token of DPSW object
26784 + * @if_id:             Interface Identifier
26785 + * @en:                        1 - enable, 0 - disable
26786 + *
26787 + * Return:     Completion status. '0' on Success; Error code otherwise.
26788 + */
26789 +int dpsw_if_set_broadcast(struct fsl_mc_io     *mc_io,
26790 +                         uint32_t              cmd_flags,
26791 +                         uint16_t              token,
26792 +                         uint16_t              if_id,
26793 +                         int                   en);
26794 +
26795 +/**
26796 + * dpsw_if_set_multicast() - Enable/disable multicast for particular interface
26797 + * @mc_io:     Pointer to MC portal's I/O object
26798 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26799 + * @token:             Token of DPSW object
26800 + * @if_id:             Interface Identifier
26801 + * @en:                        1 - enable, 0 - disable
26802 + *
26803 + * Return:     Completion status. '0' on Success; Error code otherwise.
26804 + */
26805 +int dpsw_if_set_multicast(struct fsl_mc_io     *mc_io,
26806 +                         uint32_t              cmd_flags,
26807 +                         uint16_t              token,
26808 +                         uint16_t              if_id,
26809 +                         int                   en);
26810 +
26811 +/**
26812 + * struct dpsw_tci_cfg - Tag Contorl Information (TCI) configuration
26813 + * @pcp: Priority Code Point (PCP): a 3-bit field which refers
26814 + *              to the IEEE 802.1p priority
26815 + * @dei: Drop Eligible Indicator (DEI): a 1-bit field. May be used
26816 + *              separately or in conjunction with PCP to indicate frames
26817 + *              eligible to be dropped in the presence of congestion
26818 + * @vlan_id: VLAN Identifier (VID): a 12-bit field specifying the VLAN
26819 + *                     to which the frame belongs. The hexadecimal values
26820 + *                     of 0x000 and 0xFFF are reserved;
26821 + *                     all other values may be used as VLAN identifiers,
26822 + *                     allowing up to 4,094 VLANs
26823 + */
26824 +struct dpsw_tci_cfg {
26825 +       uint8_t pcp;
26826 +       uint8_t dei;
26827 +       uint16_t        vlan_id;
26828 +};
26829 +
26830 +/**
26831 + * dpsw_if_set_tci() - Set default VLAN Tag Control Information (TCI)
26832 + * @mc_io:     Pointer to MC portal's I/O object
26833 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26834 + * @token:             Token of DPSW object
26835 + * @if_id:             Interface Identifier
26836 + * @cfg:               Tag Control Information Configuration
26837 + *
26838 + * Return:     Completion status. '0' on Success; Error code otherwise.
26839 + */
26840 +int dpsw_if_set_tci(struct fsl_mc_io           *mc_io,
26841 +                   uint32_t                    cmd_flags,
26842 +                   uint16_t                    token,
26843 +                   uint16_t                    if_id,
26844 +                   const struct dpsw_tci_cfg   *cfg);
26845 +
26846 +/**
26847 + * dpsw_if_get_tci() - Get default VLAN Tag Control Information (TCI)
26848 + * @mc_io:     Pointer to MC portal's I/O object
26849 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26850 + * @token:             Token of DPSW object
26851 + * @if_id:             Interface Identifier
26852 + * @cfg:               Tag Control Information Configuration
26853 + *
26854 + * Return:     Completion status. '0' on Success; Error code otherwise.
26855 + */
26856 +int dpsw_if_get_tci(struct fsl_mc_io   *mc_io,
26857 +                   uint32_t            cmd_flags,
26858 +                   uint16_t            token,
26859 +                   uint16_t            if_id,
26860 +                   struct dpsw_tci_cfg *cfg);
26861 +
26862 +/**
26863 + * enum dpsw_stp_state - Spanning Tree Protocol (STP) states
26864 + * @DPSW_STP_STATE_BLOCKING: Blocking state
26865 + * @DPSW_STP_STATE_LISTENING: Listening state
26866 + * @DPSW_STP_STATE_LEARNING: Learning state
26867 + * @DPSW_STP_STATE_FORWARDING: Forwarding state
26868 + *
26869 + */
26870 +enum dpsw_stp_state {
26871 +       DPSW_STP_STATE_BLOCKING = 0,
26872 +       DPSW_STP_STATE_LISTENING = 1,
26873 +       DPSW_STP_STATE_LEARNING = 2,
26874 +       DPSW_STP_STATE_FORWARDING = 3
26875 +};
26876 +
26877 +/**
26878 + * struct dpsw_stp_cfg - Spanning Tree Protocol (STP) Configuration
26879 + * @vlan_id: VLAN ID STP state
26880 + * @state: STP state
26881 + */
26882 +struct dpsw_stp_cfg {
26883 +       uint16_t                vlan_id;
26884 +       enum dpsw_stp_state     state;
26885 +};
26886 +
26887 +/**
26888 + * dpsw_if_set_stp() - Function sets Spanning Tree Protocol (STP) state.
26889 + * @mc_io:     Pointer to MC portal's I/O object
26890 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26891 + * @token:             Token of DPSW object
26892 + * @if_id:             Interface Identifier
26893 + * @cfg:               STP State configuration parameters
26894 + *
26895 + * The following STP states are supported -
26896 + * blocking, listening, learning, forwarding and disabled.
26897 + *
26898 + * Return:     Completion status. '0' on Success; Error code otherwise.
26899 + */
26900 +int dpsw_if_set_stp(struct fsl_mc_io           *mc_io,
26901 +                   uint32_t                    cmd_flags,
26902 +                   uint16_t                    token,
26903 +                   uint16_t                    if_id,
26904 +                   const struct dpsw_stp_cfg   *cfg);
26905 +
26906 +/**
26907 + * enum dpsw_accepted_frames - Types of frames to accept
26908 + * @DPSW_ADMIT_ALL: The device accepts VLAN tagged, untagged and
26909 + *                     priority tagged frames
26910 + * @DPSW_ADMIT_ONLY_VLAN_TAGGED: The device discards untagged frames or
26911 + *                     Priority-Tagged frames received on this interface.
26912 + *
26913 + */
26914 +enum dpsw_accepted_frames {
26915 +       DPSW_ADMIT_ALL = 1,
26916 +       DPSW_ADMIT_ONLY_VLAN_TAGGED = 3
26917 +};
26918 +
26919 +/**
26920 + * struct dpsw_accepted_frames_cfg - Types of frames to accept configuration
26921 + * @type: Defines ingress accepted frames
26922 + * @unaccept_act: When a frame is not accepted, it may be discarded or
26923 + *                     redirected to control interface depending on this mode
26924 + */
26925 +struct dpsw_accepted_frames_cfg {
26926 +       enum dpsw_accepted_frames       type;
26927 +       enum dpsw_action                unaccept_act;
26928 +};
26929 +
26930 +/**
26931 + * dpsw_if_set_accepted_frames()
26932 + * @mc_io:     Pointer to MC portal's I/O object
26933 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26934 + * @token:             Token of DPSW object
26935 + * @if_id:             Interface Identifier
26936 + * @cfg:               Frame types configuration
26937 + *
26938 + * When is admit_only_vlan_tagged- the device will discard untagged
26939 + * frames or Priority-Tagged frames received on this interface.
26940 + * When admit_only_untagged- untagged frames or Priority-Tagged
26941 + * frames received on this interface will be accepted and assigned
26942 + * to a VID based on the PVID and VID Set for this interface.
26943 + * When admit_all - the device will accept VLAN tagged, untagged
26944 + * and priority tagged frames.
26945 + * The default is admit_all
26946 + *
26947 + * Return:     Completion status. '0' on Success; Error code otherwise.
26948 + */
26949 +int dpsw_if_set_accepted_frames(struct fsl_mc_io               *mc_io,
26950 +                               uint32_t                        cmd_flags,
26951 +                               uint16_t                        token,
26952 +                               uint16_t                        if_id,
26953 +                               const struct dpsw_accepted_frames_cfg *cfg);
26954 +
26955 +/**
26956 + * dpsw_if_set_accept_all_vlan()
26957 + * @mc_io:     Pointer to MC portal's I/O object
26958 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
26959 + * @token:             Token of DPSW object
26960 + * @if_id:             Interface Identifier
26961 + * @accept_all:        Accept or drop frames having different VLAN
26962 + *
26963 + * When this is accept (FALSE), the device will discard incoming
26964 + * frames for VLANs that do not include this interface in its
26965 + * Member set. When accept (TRUE), the interface will accept all incoming frames
26966 + *
26967 + * Return:     Completion status. '0' on Success; Error code otherwise.
26968 + */
26969 +int dpsw_if_set_accept_all_vlan(struct fsl_mc_io       *mc_io,
26970 +                               uint32_t                cmd_flags,
26971 +                               uint16_t                token,
26972 +                               uint16_t                if_id,
26973 +                               int                     accept_all);
26974 +
26975 +/**
26976 + * enum dpsw_counter  - Counters types
26977 + * @DPSW_CNT_ING_FRAME: Counts ingress frames
26978 + * @DPSW_CNT_ING_BYTE: Counts ingress bytes
26979 + * @DPSW_CNT_ING_FLTR_FRAME: Counts filtered ingress frames
26980 + * @DPSW_CNT_ING_FRAME_DISCARD: Counts discarded ingress frame
26981 + * @DPSW_CNT_ING_MCAST_FRAME: Counts ingress multicast frames
26982 + * @DPSW_CNT_ING_MCAST_BYTE: Counts ingress multicast bytes
26983 + * @DPSW_CNT_ING_BCAST_FRAME: Counts ingress broadcast frames
26984 + * @DPSW_CNT_ING_BCAST_BYTES: Counts ingress broadcast bytes
26985 + * @DPSW_CNT_EGR_FRAME: Counts egress frames
26986 + * @DPSW_CNT_EGR_BYTE: Counts eEgress bytes
26987 + * @DPSW_CNT_EGR_FRAME_DISCARD: Counts discarded egress frames
26988 + * @DPSW_CNT_EGR_STP_FRAME_DISCARD: Counts egress STP discarded frames
26989 + */
26990 +enum dpsw_counter {
26991 +       DPSW_CNT_ING_FRAME = 0x0,
26992 +       DPSW_CNT_ING_BYTE = 0x1,
26993 +       DPSW_CNT_ING_FLTR_FRAME = 0x2,
26994 +       DPSW_CNT_ING_FRAME_DISCARD = 0x3,
26995 +       DPSW_CNT_ING_MCAST_FRAME = 0x4,
26996 +       DPSW_CNT_ING_MCAST_BYTE = 0x5,
26997 +       DPSW_CNT_ING_BCAST_FRAME = 0x6,
26998 +       DPSW_CNT_ING_BCAST_BYTES = 0x7,
26999 +       DPSW_CNT_EGR_FRAME = 0x8,
27000 +       DPSW_CNT_EGR_BYTE = 0x9,
27001 +       DPSW_CNT_EGR_FRAME_DISCARD = 0xa,
27002 +       DPSW_CNT_EGR_STP_FRAME_DISCARD = 0xb
27003 +};
27004 +
27005 +/**
27006 + * dpsw_if_get_counter() - Get specific counter of particular interface
27007 + * @mc_io:     Pointer to MC portal's I/O object
27008 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27009 + * @token:             Token of DPSW object
27010 + * @if_id:             Interface Identifier
27011 + * @type:              Counter type
27012 + * @counter:   return value
27013 + *
27014 + * Return:     Completion status. '0' on Success; Error code otherwise.
27015 + */
27016 +int dpsw_if_get_counter(struct fsl_mc_io       *mc_io,
27017 +                       uint32_t                cmd_flags,
27018 +                       uint16_t                token,
27019 +                       uint16_t                if_id,
27020 +                       enum dpsw_counter       type,
27021 +                       uint64_t                *counter);
27022 +
27023 +/**
27024 + * dpsw_if_set_counter() - Set specific counter of particular interface
27025 + * @mc_io:     Pointer to MC portal's I/O object
27026 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27027 + * @token:             Token of DPSW object
27028 + * @if_id:             Interface Identifier
27029 + * @type:              Counter type
27030 + * @counter:   New counter value
27031 + *
27032 + * Return:     Completion status. '0' on Success; Error code otherwise.
27033 + */
27034 +int dpsw_if_set_counter(struct fsl_mc_io       *mc_io,
27035 +                       uint32_t                cmd_flags,
27036 +                       uint16_t                token,
27037 +                       uint16_t                if_id,
27038 +                       enum dpsw_counter       type,
27039 +                       uint64_t                counter);
27040 +
27041 +/**
27042 + * Maximum number of TC
27043 + */
27044 +#define DPSW_MAX_TC             8
27045 +
27046 +/**
27047 + * enum dpsw_priority_selector - User priority
27048 + * @DPSW_UP_PCP: Priority Code Point (PCP): a 3-bit field which
27049 + *                              refers to the IEEE 802.1p priority.
27050 + * @DPSW_UP_DSCP: Differentiated services Code Point (DSCP): 6 bit
27051 + *                             field from IP header
27052 + *
27053 + */
27054 +enum dpsw_priority_selector {
27055 +       DPSW_UP_PCP = 0,
27056 +       DPSW_UP_DSCP = 1
27057 +};
27058 +
27059 +/**
27060 + * enum dpsw_schedule_mode - Traffic classes scheduling
27061 + * @DPSW_SCHED_STRICT_PRIORITY: schedule strict priority
27062 + * @DPSW_SCHED_WEIGHTED: schedule based on token bucket created algorithm
27063 + */
27064 +enum dpsw_schedule_mode {
27065 +       DPSW_SCHED_STRICT_PRIORITY,
27066 +       DPSW_SCHED_WEIGHTED
27067 +};
27068 +
27069 +/**
27070 + * struct dpsw_tx_schedule_cfg - traffic class configuration
27071 + * @mode: Strict or weight-based scheduling
27072 + * @delta_bandwidth: weighted Bandwidth in range from 100 to 10000
27073 + */
27074 +struct dpsw_tx_schedule_cfg {
27075 +       enum dpsw_schedule_mode mode;
27076 +       uint16_t                delta_bandwidth;
27077 +};
27078 +
27079 +/**
27080 + * struct dpsw_tx_selection_cfg - Mapping user priority into traffic
27081 + *                                     class configuration
27082 + * @priority_selector: Source for user priority regeneration
27083 + * @tc_id: The Regenerated User priority that the incoming
27084 + *                             User Priority is mapped to for this interface
27085 + * @tc_sched: Traffic classes configuration
27086 + */
27087 +struct dpsw_tx_selection_cfg {
27088 +       enum dpsw_priority_selector     priority_selector;
27089 +       uint8_t                 tc_id[DPSW_MAX_PRIORITIES];
27090 +       struct dpsw_tx_schedule_cfg     tc_sched[DPSW_MAX_TC];
27091 +};
27092 +
27093 +/**
27094 + * dpsw_if_set_tx_selection() - Function is used for mapping variety
27095 + *                             of frame fields
27096 + * @mc_io:     Pointer to MC portal's I/O object
27097 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27098 + * @token:             Token of DPSW object
27099 + * @if_id:             Interface Identifier
27100 + * @cfg:               Traffic class mapping configuration
27101 + *
27102 + * Function is used for mapping variety of frame fields (DSCP, PCP)
27103 + * to Traffic Class. Traffic class is a number
27104 + * in the range from 0 to 7
27105 + *
27106 + * Return:     Completion status. '0' on Success; Error code otherwise.
27107 + */
27108 +int dpsw_if_set_tx_selection(struct fsl_mc_io                  *mc_io,
27109 +                            uint32_t                           cmd_flags,
27110 +                            uint16_t                           token,
27111 +                            uint16_t                           if_id,
27112 +                            const struct dpsw_tx_selection_cfg *cfg);
27113 +
27114 +/**
27115 + * enum dpsw_reflection_filter - Filter type for frames to reflect
27116 + * @DPSW_REFLECTION_FILTER_INGRESS_ALL: Reflect all frames
27117 + * @DPSW_REFLECTION_FILTER_INGRESS_VLAN: Reflect only frames belong to
27118 + *                     particular VLAN defined by vid parameter
27119 + *
27120 + */
27121 +enum dpsw_reflection_filter {
27122 +       DPSW_REFLECTION_FILTER_INGRESS_ALL = 0,
27123 +       DPSW_REFLECTION_FILTER_INGRESS_VLAN = 1
27124 +};
27125 +
27126 +/**
27127 + * struct dpsw_reflection_cfg - Structure representing reflection information
27128 + * @filter: Filter type for frames to reflect
27129 + * @vlan_id: Vlan Id to reflect; valid only when filter type is
27130 + *             DPSW_INGRESS_VLAN
27131 + */
27132 +struct dpsw_reflection_cfg {
27133 +       enum dpsw_reflection_filter     filter;
27134 +       uint16_t                        vlan_id;
27135 +};
27136 +
27137 +/**
27138 + * dpsw_if_add_reflection() - Identify interface to be reflected or mirrored
27139 + * @mc_io:     Pointer to MC portal's I/O object
27140 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27141 + * @token:             Token of DPSW object
27142 + * @if_id:             Interface Identifier
27143 + * @cfg:               Reflection configuration
27144 + *
27145 + * Return:     Completion status. '0' on Success; Error code otherwise.
27146 + */
27147 +int dpsw_if_add_reflection(struct fsl_mc_io                    *mc_io,
27148 +                          uint32_t                             cmd_flags,
27149 +                          uint16_t                             token,
27150 +                          uint16_t                             if_id,
27151 +                          const struct dpsw_reflection_cfg     *cfg);
27152 +
27153 +/**
27154 + * dpsw_if_remove_reflection() - Remove interface to be reflected or mirrored
27155 + * @mc_io:     Pointer to MC portal's I/O object
27156 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27157 + * @token:             Token of DPSW object
27158 + * @if_id:             Interface Identifier
27159 + * @cfg:               Reflection configuration
27160 + *
27161 + * Return:     Completion status. '0' on Success; Error code otherwise.
27162 + */
27163 +int dpsw_if_remove_reflection(struct fsl_mc_io                 *mc_io,
27164 +                             uint32_t                          cmd_flags,
27165 +                             uint16_t                          token,
27166 +                             uint16_t                          if_id,
27167 +                             const struct dpsw_reflection_cfg  *cfg);
27168 +
27169 +/**
27170 + * enum dpsw_metering_mode - Metering modes
27171 + * @DPSW_METERING_MODE_NONE: metering disabled
27172 + * @DPSW_METERING_MODE_RFC2698: RFC 2698
27173 + * @DPSW_METERING_MODE_RFC4115: RFC 4115
27174 + */
27175 +enum dpsw_metering_mode {
27176 +       DPSW_METERING_MODE_NONE = 0,
27177 +       DPSW_METERING_MODE_RFC2698,
27178 +       DPSW_METERING_MODE_RFC4115
27179 +};
27180 +
27181 +/**
27182 + * enum dpsw_metering_unit - Metering count
27183 + * @DPSW_METERING_UNIT_BYTES: count bytes
27184 + * @DPSW_METERING_UNIT_FRAMES: count frames
27185 + */
27186 +enum dpsw_metering_unit {
27187 +       DPSW_METERING_UNIT_BYTES = 0,
27188 +       DPSW_METERING_UNIT_FRAMES
27189 +};
27190 +
27191 +/**
27192 + * struct dpsw_metering_cfg - Metering configuration
27193 + * @mode: metering modes
27194 + * @units: Bytes or frame units
27195 + * @cir: Committed information rate (CIR) in Kbits/s
27196 + * @eir: Peak information rate (PIR) Kbit/s  rfc2698
27197 + *      Excess information rate (EIR) Kbit/s rfc4115
27198 + * @cbs: Committed burst size (CBS) in bytes
27199 + * @ebs: Peak burst size (PBS) in bytes for rfc2698
27200 + *       Excess bust size (EBS) in bytes rfc4115
27201 + *
27202 + */
27203 +struct dpsw_metering_cfg {
27204 +       enum dpsw_metering_mode mode;
27205 +       enum dpsw_metering_unit units;
27206 +       uint32_t                cir;
27207 +       uint32_t                eir;
27208 +       uint32_t                cbs;
27209 +       uint32_t                ebs;
27210 +};
27211 +
27212 +/**
27213 + * dpsw_if_set_flooding_metering() - Set flooding metering
27214 + * @mc_io:     Pointer to MC portal's I/O object
27215 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27216 + * @token:     Token of DPSW object
27217 + * @if_id:     Interface Identifier
27218 + * @cfg:       Metering parameters
27219 + *
27220 + * Return:     Completion status. '0' on Success; Error code otherwise.
27221 + */
27222 +int dpsw_if_set_flooding_metering(struct fsl_mc_io             *mc_io,
27223 +                                 uint32_t                      cmd_flags,
27224 +                                 uint16_t                      token,
27225 +                                 uint16_t                      if_id,
27226 +                                 const struct dpsw_metering_cfg *cfg);
27227 +
27228 +/**
27229 + * dpsw_if_set_metering() - Set interface metering for flooding
27230 + * @mc_io:     Pointer to MC portal's I/O object
27231 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27232 + * @token:     Token of DPSW object
27233 + * @if_id:     Interface Identifier
27234 + * @tc_id:     Traffic class ID
27235 + * @cfg:       Metering parameters
27236 + *
27237 + * Return:     Completion status. '0' on Success; Error code otherwise.
27238 + */
27239 +int dpsw_if_set_metering(struct fsl_mc_io                      *mc_io,
27240 +                        uint32_t                               cmd_flags,
27241 +                        uint16_t                               token,
27242 +                        uint16_t                               if_id,
27243 +                        uint8_t                                tc_id,
27244 +                        const struct dpsw_metering_cfg *cfg);
27245 +
27246 +/**
27247 + * enum dpsw_early_drop_unit - DPSW early drop unit
27248 + * @DPSW_EARLY_DROP_UNIT_BYTE: count bytes
27249 + * @DPSW_EARLY_DROP_UNIT_FRAMES: count frames
27250 + */
27251 +enum dpsw_early_drop_unit {
27252 +       DPSW_EARLY_DROP_UNIT_BYTE = 0,
27253 +       DPSW_EARLY_DROP_UNIT_FRAMES
27254 +};
27255 +
27256 +/**
27257 + * enum dpsw_early_drop_mode - DPSW early drop mode
27258 + * @DPSW_EARLY_DROP_MODE_NONE: early drop is disabled
27259 + * @DPSW_EARLY_DROP_MODE_TAIL: early drop in taildrop mode
27260 + * @DPSW_EARLY_DROP_MODE_WRED: early drop in WRED mode
27261 + */
27262 +enum dpsw_early_drop_mode {
27263 +       DPSW_EARLY_DROP_MODE_NONE = 0,
27264 +       DPSW_EARLY_DROP_MODE_TAIL,
27265 +       DPSW_EARLY_DROP_MODE_WRED
27266 +};
27267 +
27268 +/**
27269 + * struct dpsw_wred_cfg - WRED configuration
27270 + * @max_threshold: maximum threshold that packets may be discarded. Above this
27271 + *       threshold all packets are discarded; must be less than 2^39;
27272 + *       approximated to be expressed as (x+256)*2^(y-1) due to HW
27273 + *         implementation.
27274 + * @min_threshold: minimum threshold that packets may be discarded at
27275 + * @drop_probability: probability that a packet will be discarded (1-100,
27276 + *     associated with the maximum threshold)
27277 + */
27278 +struct dpsw_wred_cfg {
27279 +       uint64_t                min_threshold;
27280 +       uint64_t                max_threshold;
27281 +       uint8_t                 drop_probability;
27282 +};
27283 +
27284 +/**
27285 + * struct dpsw_early_drop_cfg - early-drop configuration
27286 + * @drop_mode: drop mode
27287 + * @units: count units
27288 + * @yellow: WRED - 'yellow' configuration
27289 + * @green: WRED - 'green' configuration
27290 + * @tail_drop_threshold: tail drop threshold
27291 + */
27292 +struct dpsw_early_drop_cfg {
27293 +       enum dpsw_early_drop_mode       drop_mode;
27294 +       enum dpsw_early_drop_unit       units;
27295 +       struct dpsw_wred_cfg            yellow;
27296 +       struct dpsw_wred_cfg            green;
27297 +       uint32_t                        tail_drop_threshold;
27298 +};
27299 +
27300 +/**
27301 + * dpsw_prepare_early_drop() - Prepare an early drop for setting in to interface
27302 + * @cfg:       Early-drop configuration
27303 + * @early_drop_buf: Zeroed 256 bytes of memory before mapping it to DMA
27304 + *
27305 + * This function has to be called before dpsw_if_tc_set_early_drop
27306 + *
27307 + */
27308 +void dpsw_prepare_early_drop(const struct dpsw_early_drop_cfg *cfg,
27309 +                            uint8_t                    *early_drop_buf);
27310 +
27311 +/**
27312 + * dpsw_if_set_early_drop() - Set interface traffic class early-drop
27313 + *                             configuration
27314 + * @mc_io:     Pointer to MC portal's I/O object
27315 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27316 + * @token:     Token of DPSW object
27317 + * @if_id:             Interface Identifier
27318 + * @tc_id:     Traffic class selection (0-7)
27319 + * @early_drop_iova:  I/O virtual address of 64 bytes;
27320 + * Must be cacheline-aligned and DMA-able memory
27321 + *
27322 + * warning: Before calling this function, call dpsw_prepare_if_tc_early_drop()
27323 + *             to prepare the early_drop_iova parameter
27324 + *
27325 + * Return:     '0' on Success; error code otherwise.
27326 + */
27327 +int dpsw_if_set_early_drop(struct fsl_mc_io    *mc_io,
27328 +                          uint32_t             cmd_flags,
27329 +                          uint16_t             token,
27330 +                          uint16_t             if_id,
27331 +                          uint8_t              tc_id,
27332 +                          uint64_t             early_drop_iova);
27333 +
27334 +/**
27335 + * struct dpsw_custom_tpid_cfg - Structure representing tag Protocol identifier
27336 + * @tpid: An additional tag protocol identifier
27337 + */
27338 +struct dpsw_custom_tpid_cfg {
27339 +       uint16_t tpid;
27340 +};
27341 +
27342 +/**
27343 + * dpsw_add_custom_tpid() - API Configures a distinct Ethernet type value
27344 + * @mc_io:     Pointer to MC portal's I/O object
27345 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27346 + * @token:             Token of DPSW object
27347 + * @cfg:               Tag Protocol identifier
27348 + *
27349 + * API Configures a distinct Ethernet type value (or TPID value)
27350 + * to indicate a VLAN tag in addition to the common
27351 + * TPID values 0x8100 and 0x88A8.
27352 + * Two additional TPID's are supported
27353 + *
27354 + * Return:     Completion status. '0' on Success; Error code otherwise.
27355 + */
27356 +int dpsw_add_custom_tpid(struct fsl_mc_io                      *mc_io,
27357 +                        uint32_t                               cmd_flags,
27358 +                        uint16_t                               token,
27359 +                        const struct dpsw_custom_tpid_cfg      *cfg);
27360 +
27361 +/**
27362 + * dpsw_remove_custom_tpid - API removes a distinct Ethernet type value
27363 + * @mc_io:     Pointer to MC portal's I/O object
27364 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27365 + * @token:             Token of DPSW object
27366 + * @cfg:               Tag Protocol identifier
27367 + *
27368 + * Return:     Completion status. '0' on Success; Error code otherwise.
27369 + */
27370 +int dpsw_remove_custom_tpid(struct fsl_mc_io                   *mc_io,
27371 +                           uint32_t                            cmd_flags,
27372 +                           uint16_t                            token,
27373 +                           const struct dpsw_custom_tpid_cfg   *cfg);
27374 +
27375 +/**
27376 + * dpsw_if_enable() - Enable Interface
27377 + * @mc_io:     Pointer to MC portal's I/O object
27378 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27379 + * @token:             Token of DPSW object
27380 + * @if_id:             Interface Identifier
27381 + *
27382 + * Return:     Completion status. '0' on Success; Error code otherwise.
27383 + */
27384 +int dpsw_if_enable(struct fsl_mc_io    *mc_io,
27385 +                  uint32_t             cmd_flags,
27386 +                  uint16_t             token,
27387 +                  uint16_t             if_id);
27388 +
27389 +/**
27390 + * dpsw_if_disable() - Disable Interface
27391 + * @mc_io:     Pointer to MC portal's I/O object
27392 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27393 + * @token:             Token of DPSW object
27394 + * @if_id:             Interface Identifier
27395 + *
27396 + * Return:     Completion status. '0' on Success; Error code otherwise.
27397 + */
27398 +int dpsw_if_disable(struct fsl_mc_io   *mc_io,
27399 +                   uint32_t            cmd_flags,
27400 +                   uint16_t            token,
27401 +                   uint16_t            if_id);
27402 +
27403 +/**
27404 + * struct dpsw_if_attr - Structure representing DPSW interface attributes
27405 + * @num_tcs: Number of traffic classes
27406 + * @rate: Transmit rate in bits per second
27407 + * @options: Interface configuration options (bitmap)
27408 + * @enabled: Indicates if interface is enabled
27409 + * @accept_all_vlan: The device discards/accepts incoming frames
27410 + *             for VLANs that do not include this interface
27411 + * @admit_untagged: When set to 'DPSW_ADMIT_ONLY_VLAN_TAGGED', the device
27412 + *             discards untagged frames or priority-tagged frames received on
27413 + *             this interface;
27414 + *             When set to 'DPSW_ADMIT_ALL', untagged frames or priority-
27415 + *             tagged frames received on this interface are accepted
27416 + * @qdid: control frames transmit qdid
27417 + */
27418 +struct dpsw_if_attr {
27419 +       uint8_t                         num_tcs;
27420 +       uint32_t                        rate;
27421 +       uint32_t                        options;
27422 +       int                             enabled;
27423 +       int                             accept_all_vlan;
27424 +       enum dpsw_accepted_frames       admit_untagged;
27425 +       uint16_t                        qdid;
27426 +};
27427 +
27428 +/**
27429 + * dpsw_if_get_attributes() - Function obtains attributes of interface
27430 + * @mc_io:     Pointer to MC portal's I/O object
27431 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27432 + * @token:     Token of DPSW object
27433 + * @if_id:     Interface Identifier
27434 + * @attr:      Returned interface attributes
27435 + *
27436 + * Return:     Completion status. '0' on Success; Error code otherwise.
27437 + */
27438 +int dpsw_if_get_attributes(struct fsl_mc_io    *mc_io,
27439 +                          uint32_t             cmd_flags,
27440 +                          uint16_t             token,
27441 +                          uint16_t             if_id,
27442 +                          struct dpsw_if_attr  *attr);
27443 +
27444 +/**
27445 + * dpsw_if_set_max_frame_length() - Set Maximum Receive frame length.
27446 + * @mc_io:     Pointer to MC portal's I/O object
27447 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27448 + * @token:     Token of DPSW object
27449 + * @if_id:     Interface Identifier
27450 + * @frame_length: Maximum Frame Length
27451 + *
27452 + * Return:     Completion status. '0' on Success; Error code otherwise.
27453 + */
27454 +int dpsw_if_set_max_frame_length(struct fsl_mc_io      *mc_io,
27455 +                                uint32_t               cmd_flags,
27456 +                                uint16_t               token,
27457 +                                uint16_t               if_id,
27458 +                                uint16_t               frame_length);
27459 +
27460 +/**
27461 + * dpsw_if_get_max_frame_length() - Get Maximum Receive frame length.
27462 + * @mc_io:     Pointer to MC portal's I/O object
27463 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27464 + * @token:     Token of DPSW object
27465 + * @if_id:     Interface Identifier
27466 + * @frame_length: Returned maximum Frame Length
27467 + *
27468 + * Return:     Completion status. '0' on Success; Error code otherwise.
27469 + */
27470 +int dpsw_if_get_max_frame_length(struct fsl_mc_io      *mc_io,
27471 +                                uint32_t               cmd_flags,
27472 +                                uint16_t               token,
27473 +                                uint16_t               if_id,
27474 +                                uint16_t               *frame_length);
27475 +
27476 +/**
27477 + * struct dpsw_vlan_cfg - VLAN Configuration
27478 + * @fdb_id: Forwarding Data Base
27479 + */
27480 +struct dpsw_vlan_cfg {
27481 +       uint16_t fdb_id;
27482 +};
27483 +
27484 +/**
27485 + * dpsw_vlan_add() - Adding new VLAN to DPSW.
27486 + * @mc_io:     Pointer to MC portal's I/O object
27487 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27488 + * @token:     Token of DPSW object
27489 + * @vlan_id:   VLAN Identifier
27490 + * @cfg:       VLAN configuration
27491 + *
27492 + * Only VLAN ID and FDB ID are required parameters here.
27493 + * 12 bit VLAN ID is defined in IEEE802.1Q.
27494 + * Adding a duplicate VLAN ID is not allowed.
27495 + * FDB ID can be shared across multiple VLANs. Shared learning
27496 + * is obtained by calling dpsw_vlan_add for multiple VLAN IDs
27497 + * with same fdb_id
27498 + *
27499 + * Return:     Completion status. '0' on Success; Error code otherwise.
27500 + */
27501 +int dpsw_vlan_add(struct fsl_mc_io             *mc_io,
27502 +                 uint32_t                      cmd_flags,
27503 +                 uint16_t                      token,
27504 +                 uint16_t                      vlan_id,
27505 +                 const struct dpsw_vlan_cfg    *cfg);
27506 +
27507 +/**
27508 + * struct dpsw_vlan_if_cfg - Set of VLAN Interfaces
27509 + * @num_ifs: The number of interfaces that are assigned to the egress
27510 + *             list for this VLAN
27511 + * @if_id: The set of interfaces that are
27512 + *             assigned to the egress list for this VLAN
27513 + */
27514 +struct dpsw_vlan_if_cfg {
27515 +       uint16_t num_ifs;
27516 +       uint16_t if_id[DPSW_MAX_IF];
27517 +};
27518 +
27519 +/**
27520 + * dpsw_vlan_add_if() - Adding a set of interfaces to an existing VLAN.
27521 + * @mc_io:     Pointer to MC portal's I/O object
27522 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27523 + * @token:     Token of DPSW object
27524 + * @vlan_id:   VLAN Identifier
27525 + * @cfg:       Set of interfaces to add
27526 + *
27527 + * It adds only interfaces not belonging to this VLAN yet,
27528 + * otherwise an error is generated and an entire command is
27529 + * ignored. This function can be called numerous times always
27530 + * providing required interfaces delta.
27531 + *
27532 + * Return:     Completion status. '0' on Success; Error code otherwise.
27533 + */
27534 +int dpsw_vlan_add_if(struct fsl_mc_io                  *mc_io,
27535 +                    uint32_t                           cmd_flags,
27536 +                    uint16_t                           token,
27537 +                    uint16_t                           vlan_id,
27538 +                    const struct dpsw_vlan_if_cfg      *cfg);
27539 +
27540 +/**
27541 + * dpsw_vlan_add_if_untagged() - Defining a set of interfaces that should be
27542 + *                             transmitted as untagged.
27543 + * @mc_io:     Pointer to MC portal's I/O object
27544 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27545 + * @token:     Token of DPSW object
27546 + * @vlan_id:   VLAN Identifier
27547 + * @cfg:       set of interfaces that should be transmitted as untagged
27548 + *
27549 + * These interfaces should already belong to this VLAN.
27550 + * By default all interfaces are transmitted as tagged.
27551 + * Providing un-existing interface or untagged interface that is
27552 + * configured untagged already generates an error and the entire
27553 + * command is ignored.
27554 + *
27555 + * Return:     Completion status. '0' on Success; Error code otherwise.
27556 + */
27557 +int dpsw_vlan_add_if_untagged(struct fsl_mc_io                 *mc_io,
27558 +                             uint32_t                          cmd_flags,
27559 +                             uint16_t                          token,
27560 +                             uint16_t                          vlan_id,
27561 +                             const struct dpsw_vlan_if_cfg     *cfg);
27562 +
27563 +/**
27564 + * dpsw_vlan_add_if_flooding() - Define a set of interfaces that should be
27565 + *                     included in flooding when frame with unknown destination
27566 + *                     unicast MAC arrived.
27567 + * @mc_io:     Pointer to MC portal's I/O object
27568 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27569 + * @token:     Token of DPSW object
27570 + * @vlan_id:   VLAN Identifier
27571 + * @cfg:       Set of interfaces that should be used for flooding
27572 + *
27573 + * These interfaces should belong to this VLAN. By default all
27574 + * interfaces are included into flooding list. Providing
27575 + * un-existing interface or an interface that already in the
27576 + * flooding list generates an error and the entire command is
27577 + * ignored.
27578 + *
27579 + * Return:     Completion status. '0' on Success; Error code otherwise.
27580 + */
27581 +int dpsw_vlan_add_if_flooding(struct fsl_mc_io                 *mc_io,
27582 +                             uint32_t                          cmd_flags,
27583 +                             uint16_t                          token,
27584 +                             uint16_t                          vlan_id,
27585 +                             const struct dpsw_vlan_if_cfg     *cfg);
27586 +
27587 +/**
27588 + * dpsw_vlan_remove_if() - Remove interfaces from an existing VLAN.
27589 + * @mc_io:     Pointer to MC portal's I/O object
27590 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27591 + * @token:     Token of DPSW object
27592 + * @vlan_id:   VLAN Identifier
27593 + * @cfg:       Set of interfaces that should be removed
27594 + *
27595 + * Interfaces must belong to this VLAN, otherwise an error
27596 + * is returned and an the command is ignored
27597 + *
27598 + * Return:     Completion status. '0' on Success; Error code otherwise.
27599 + */
27600 +int dpsw_vlan_remove_if(struct fsl_mc_io               *mc_io,
27601 +                       uint32_t                        cmd_flags,
27602 +                       uint16_t                        token,
27603 +                       uint16_t                        vlan_id,
27604 +                       const struct dpsw_vlan_if_cfg   *cfg);
27605 +
27606 +/**
27607 + * dpsw_vlan_remove_if_untagged() - Define a set of interfaces that should be
27608 + *             converted from transmitted as untagged to transmit as tagged.
27609 + * @mc_io:     Pointer to MC portal's I/O object
27610 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27611 + * @token:     Token of DPSW object
27612 + * @vlan_id:   VLAN Identifier
27613 + * @cfg:       set of interfaces that should be removed
27614 + *
27615 + * Interfaces provided by API have to belong to this VLAN and
27616 + * configured untagged, otherwise an error is returned and the
27617 + * command is ignored
27618 + *
27619 + * Return:     Completion status. '0' on Success; Error code otherwise.
27620 + */
27621 +int dpsw_vlan_remove_if_untagged(struct fsl_mc_io              *mc_io,
27622 +                                uint32_t                       cmd_flags,
27623 +                                uint16_t                       token,
27624 +                                uint16_t                       vlan_id,
27625 +                                const struct dpsw_vlan_if_cfg  *cfg);
27626 +
27627 +/**
27628 + * dpsw_vlan_remove_if_flooding() - Define a set of interfaces that should be
27629 + *                     removed from the flooding list.
27630 + * @mc_io:     Pointer to MC portal's I/O object
27631 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27632 + * @token:     Token of DPSW object
27633 + * @vlan_id:   VLAN Identifier
27634 + * @cfg:       set of interfaces used for flooding
27635 + *
27636 + * Return:     Completion status. '0' on Success; Error code otherwise.
27637 + */
27638 +int dpsw_vlan_remove_if_flooding(struct fsl_mc_io              *mc_io,
27639 +                                uint32_t                       cmd_flags,
27640 +                                uint16_t                       token,
27641 +                                uint16_t                       vlan_id,
27642 +                                const struct dpsw_vlan_if_cfg  *cfg);
27643 +
27644 +/**
27645 + * dpsw_vlan_remove() - Remove an entire VLAN
27646 + * @mc_io:     Pointer to MC portal's I/O object
27647 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27648 + * @token:     Token of DPSW object
27649 + * @vlan_id:   VLAN Identifier
27650 + *
27651 + * Return:     Completion status. '0' on Success; Error code otherwise.
27652 + */
27653 +int dpsw_vlan_remove(struct fsl_mc_io  *mc_io,
27654 +                    uint32_t           cmd_flags,
27655 +                    uint16_t           token,
27656 +                    uint16_t           vlan_id);
27657 +
27658 +/**
27659 + * struct dpsw_vlan_attr - VLAN attributes
27660 + * @fdb_id: Associated FDB ID
27661 + * @num_ifs: Number of interfaces
27662 + * @num_untagged_ifs: Number of untagged interfaces
27663 + * @num_flooding_ifs: Number of flooding interfaces
27664 + */
27665 +struct dpsw_vlan_attr {
27666 +       uint16_t fdb_id;
27667 +       uint16_t num_ifs;
27668 +       uint16_t num_untagged_ifs;
27669 +       uint16_t num_flooding_ifs;
27670 +};
27671 +
27672 +/**
27673 + * dpsw_vlan_get_attributes() - Get VLAN attributes
27674 + * @mc_io:     Pointer to MC portal's I/O object
27675 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27676 + * @token:     Token of DPSW object
27677 + * @vlan_id:   VLAN Identifier
27678 + * @attr:      Returned DPSW attributes
27679 + *
27680 + * Return:     Completion status. '0' on Success; Error code otherwise.
27681 + */
27682 +int dpsw_vlan_get_attributes(struct fsl_mc_io          *mc_io,
27683 +                            uint32_t                   cmd_flags,
27684 +                            uint16_t                   token,
27685 +                            uint16_t                   vlan_id,
27686 +                            struct dpsw_vlan_attr      *attr);
27687 +
27688 +/**
27689 + * dpsw_vlan_get_if() - Get interfaces belong to this VLAN
27690 + * @mc_io:     Pointer to MC portal's I/O object
27691 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27692 + * @token:     Token of DPSW object
27693 + * @vlan_id:   VLAN Identifier
27694 + * @cfg:       Returned set of interfaces belong to this VLAN
27695 + *
27696 + * Return:     Completion status. '0' on Success; Error code otherwise.
27697 + */
27698 +int dpsw_vlan_get_if(struct fsl_mc_io          *mc_io,
27699 +                    uint32_t                   cmd_flags,
27700 +                    uint16_t                   token,
27701 +                    uint16_t                   vlan_id,
27702 +                    struct dpsw_vlan_if_cfg    *cfg);
27703 +
27704 +/**
27705 + * dpsw_vlan_get_if_flooding() - Get interfaces used in flooding for this VLAN
27706 + * @mc_io:     Pointer to MC portal's I/O object
27707 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27708 + * @token:     Token of DPSW object
27709 + * @vlan_id:   VLAN Identifier
27710 + * @cfg:       Returned set of flooding interfaces
27711 + *
27712 + * Return:     Completion status. '0' on Success; Error code otherwise.
27713 + */
27714 +int dpsw_vlan_get_if_flooding(struct fsl_mc_io         *mc_io,
27715 +                             uint32_t                  cmd_flags,
27716 +                             uint16_t                  token,
27717 +                             uint16_t                  vlan_id,
27718 +                             struct dpsw_vlan_if_cfg   *cfg);
27719 +
27720 +/**
27721 + * dpsw_vlan_get_if_untagged() - Get interfaces that should be transmitted as
27722 + *                             untagged
27723 + * @mc_io:     Pointer to MC portal's I/O object
27724 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27725 + * @token:     Token of DPSW object
27726 + * @vlan_id:   VLAN Identifier
27727 + * @cfg:       Returned set of untagged interfaces
27728 + *
27729 + * Return:     Completion status. '0' on Success; Error code otherwise.
27730 + */
27731 +int dpsw_vlan_get_if_untagged(struct fsl_mc_io         *mc_io,
27732 +                             uint32_t                  cmd_flags,
27733 +                             uint16_t                  token,
27734 +                             uint16_t                  vlan_id,
27735 +                             struct dpsw_vlan_if_cfg   *cfg);
27736 +
27737 +/**
27738 + * struct dpsw_fdb_cfg  - FDB Configuration
27739 + * @num_fdb_entries: Number of FDB entries
27740 + * @fdb_aging_time: Aging time in seconds
27741 + */
27742 +struct dpsw_fdb_cfg {
27743 +       uint16_t num_fdb_entries;
27744 +       uint16_t fdb_aging_time;
27745 +};
27746 +
27747 +/**
27748 + * dpsw_fdb_add() - Add FDB to switch and Returns handle to FDB table for
27749 + *             the reference
27750 + * @mc_io:     Pointer to MC portal's I/O object
27751 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27752 + * @token:     Token of DPSW object
27753 + * @fdb_id:    Returned Forwarding Database Identifier
27754 + * @cfg:       FDB Configuration
27755 + *
27756 + * Return:     Completion status. '0' on Success; Error code otherwise.
27757 + */
27758 +int dpsw_fdb_add(struct fsl_mc_io              *mc_io,
27759 +                uint32_t                       cmd_flags,
27760 +                uint16_t                       token,
27761 +                uint16_t                       *fdb_id,
27762 +                const struct dpsw_fdb_cfg      *cfg);
27763 +
27764 +/**
27765 + * dpsw_fdb_remove() - Remove FDB from switch
27766 + * @mc_io:     Pointer to MC portal's I/O object
27767 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27768 + * @token:     Token of DPSW object
27769 + * @fdb_id:    Forwarding Database Identifier
27770 + *
27771 + * Return:     Completion status. '0' on Success; Error code otherwise.
27772 + */
27773 +int dpsw_fdb_remove(struct fsl_mc_io   *mc_io,
27774 +                   uint32_t            cmd_flags,
27775 +                   uint16_t            token,
27776 +                   uint16_t            fdb_id);
27777 +
27778 +/**
27779 + * enum dpsw_fdb_entry_type - FDB Entry type - Static/Dynamic
27780 + * @DPSW_FDB_ENTRY_STATIC: Static entry
27781 + * @DPSW_FDB_ENTRY_DINAMIC: Dynamic entry
27782 + */
27783 +enum dpsw_fdb_entry_type {
27784 +       DPSW_FDB_ENTRY_STATIC = 0,
27785 +       DPSW_FDB_ENTRY_DINAMIC = 1
27786 +};
27787 +
27788 +/**
27789 + * struct dpsw_fdb_unicast_cfg - Unicast entry configuration
27790 + * @type: Select static or dynamic entry
27791 + * @mac_addr: MAC address
27792 + * @if_egress: Egress interface ID
27793 + */
27794 +struct dpsw_fdb_unicast_cfg {
27795 +       enum dpsw_fdb_entry_type        type;
27796 +       uint8_t                 mac_addr[6];
27797 +       uint16_t                        if_egress;
27798 +};
27799 +
27800 +/**
27801 + * dpsw_fdb_add_unicast() - Function adds an unicast entry into MAC lookup table
27802 + * @mc_io:     Pointer to MC portal's I/O object
27803 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27804 + * @token:     Token of DPSW object
27805 + * @fdb_id:    Forwarding Database Identifier
27806 + * @cfg:       Unicast entry configuration
27807 + *
27808 + * Return:     Completion status. '0' on Success; Error code otherwise.
27809 + */
27810 +int dpsw_fdb_add_unicast(struct fsl_mc_io                      *mc_io,
27811 +                        uint32_t                               cmd_flags,
27812 +                        uint16_t                               token,
27813 +                        uint16_t                               fdb_id,
27814 +                        const struct dpsw_fdb_unicast_cfg      *cfg);
27815 +
27816 +/**
27817 + * dpsw_fdb_get_unicast() - Get unicast entry from MAC lookup table by
27818 + *             unicast Ethernet address
27819 + * @mc_io:     Pointer to MC portal's I/O object
27820 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27821 + * @token:     Token of DPSW object
27822 + * @fdb_id:    Forwarding Database Identifier
27823 + * @cfg:       Returned unicast entry configuration
27824 + *
27825 + * Return:     Completion status. '0' on Success; Error code otherwise.
27826 + */
27827 +int dpsw_fdb_get_unicast(struct fsl_mc_io              *mc_io,
27828 +                        uint32_t                       cmd_flags,
27829 +                        uint16_t                       token,
27830 +                        uint16_t                       fdb_id,
27831 +                        struct dpsw_fdb_unicast_cfg    *cfg);
27832 +
27833 +/**
27834 + * dpsw_fdb_remove_unicast() - removes an entry from MAC lookup table
27835 + * @mc_io:     Pointer to MC portal's I/O object
27836 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27837 + * @token:     Token of DPSW object
27838 + * @fdb_id:    Forwarding Database Identifier
27839 + * @cfg:       Unicast entry configuration
27840 + *
27841 + * Return:     Completion status. '0' on Success; Error code otherwise.
27842 + */
27843 +int dpsw_fdb_remove_unicast(struct fsl_mc_io                   *mc_io,
27844 +                           uint32_t                            cmd_flags,
27845 +                           uint16_t                            token,
27846 +                           uint16_t                            fdb_id,
27847 +                           const struct dpsw_fdb_unicast_cfg   *cfg);
27848 +
27849 +/**
27850 + * struct dpsw_fdb_multicast_cfg - Multi-cast entry configuration
27851 + * @type: Select static or dynamic entry
27852 + * @mac_addr: MAC address
27853 + * @num_ifs: Number of external and internal interfaces
27854 + * @if_id: Egress interface IDs
27855 + */
27856 +struct dpsw_fdb_multicast_cfg {
27857 +       enum dpsw_fdb_entry_type        type;
27858 +       uint8_t                 mac_addr[6];
27859 +       uint16_t                        num_ifs;
27860 +       uint16_t                        if_id[DPSW_MAX_IF];
27861 +};
27862 +
27863 +/**
27864 + * dpsw_fdb_add_multicast() - Add a set of egress interfaces to multi-cast group
27865 + * @mc_io:     Pointer to MC portal's I/O object
27866 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27867 + * @token:     Token of DPSW object
27868 + * @fdb_id:    Forwarding Database Identifier
27869 + * @cfg:       Multicast entry configuration
27870 + *
27871 + * If group doesn't exist, it will be created.
27872 + * It adds only interfaces not belonging to this multicast group
27873 + * yet, otherwise error will be generated and the command is
27874 + * ignored.
27875 + * This function may be called numerous times always providing
27876 + * required interfaces delta.
27877 + *
27878 + * Return:     Completion status. '0' on Success; Error code otherwise.
27879 + */
27880 +int dpsw_fdb_add_multicast(struct fsl_mc_io                    *mc_io,
27881 +                          uint32_t                             cmd_flags,
27882 +                          uint16_t                             token,
27883 +                          uint16_t                             fdb_id,
27884 +                          const struct dpsw_fdb_multicast_cfg  *cfg);
27885 +
27886 +/**
27887 + * dpsw_fdb_get_multicast() - Reading multi-cast group by multi-cast Ethernet
27888 + *                             address.
27889 + * @mc_io:     Pointer to MC portal's I/O object
27890 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27891 + * @token:     Token of DPSW object
27892 + * @fdb_id:    Forwarding Database Identifier
27893 + * @cfg:       Returned multicast entry configuration
27894 + *
27895 + * Return:     Completion status. '0' on Success; Error code otherwise.
27896 + */
27897 +int dpsw_fdb_get_multicast(struct fsl_mc_io                    *mc_io,
27898 +                          uint32_t                             cmd_flags,
27899 +                          uint16_t                             token,
27900 +                          uint16_t                             fdb_id,
27901 +                          struct dpsw_fdb_multicast_cfg        *cfg);
27902 +
27903 +/**
27904 + * dpsw_fdb_remove_multicast() - Removing interfaces from an existing multicast
27905 + *                             group.
27906 + * @mc_io:     Pointer to MC portal's I/O object
27907 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27908 + * @token:     Token of DPSW object
27909 + * @fdb_id:    Forwarding Database Identifier
27910 + * @cfg:       Multicast entry configuration
27911 + *
27912 + * Interfaces provided by this API have to exist in the group,
27913 + * otherwise an error will be returned and an entire command
27914 + * ignored. If there is no interface left in the group,
27915 + * an entire group is deleted
27916 + *
27917 + * Return:     Completion status. '0' on Success; Error code otherwise.
27918 + */
27919 +int dpsw_fdb_remove_multicast(struct fsl_mc_io                 *mc_io,
27920 +                             uint32_t                          cmd_flags,
27921 +                             uint16_t                          token,
27922 +                             uint16_t                          fdb_id,
27923 +                             const struct dpsw_fdb_multicast_cfg *cfg);
27924 +
27925 +/**
27926 + * enum dpsw_fdb_learning_mode - Auto-learning modes
27927 + * @DPSW_FDB_LEARNING_MODE_DIS: Disable Auto-learning
27928 + * @DPSW_FDB_LEARNING_MODE_HW: Enable HW auto-Learning
27929 + * @DPSW_FDB_LEARNING_MODE_NON_SECURE: Enable None secure learning by CPU
27930 + * @DPSW_FDB_LEARNING_MODE_SECURE: Enable secure learning by CPU
27931 + *
27932 + *     NONE - SECURE LEARNING
27933 + *     SMAC found      DMAC found      CTLU Action
27934 + *     v               v       Forward frame to
27935 + *                                             1.  DMAC destination
27936 + *     -               v       Forward frame to
27937 + *                                             1.  DMAC destination
27938 + *                                             2.  Control interface
27939 + *     v               -       Forward frame to
27940 + *                                             1.  Flooding list of interfaces
27941 + *     -               -       Forward frame to
27942 + *                                             1.  Flooding list of interfaces
27943 + *                                             2.  Control interface
27944 + *     SECURE LEARING
27945 + *     SMAC found      DMAC found      CTLU Action
27946 + *     v               v               Forward frame to
27947 + *                                             1.  DMAC destination
27948 + *     -               v               Forward frame to
27949 + *                                             1.  Control interface
27950 + *     v               -               Forward frame to
27951 + *                                             1.  Flooding list of interfaces
27952 + *     -               -               Forward frame to
27953 + *                                             1.  Control interface
27954 + */
27955 +enum dpsw_fdb_learning_mode {
27956 +       DPSW_FDB_LEARNING_MODE_DIS = 0,
27957 +       DPSW_FDB_LEARNING_MODE_HW = 1,
27958 +       DPSW_FDB_LEARNING_MODE_NON_SECURE = 2,
27959 +       DPSW_FDB_LEARNING_MODE_SECURE = 3
27960 +};
27961 +
27962 +/**
27963 + * dpsw_fdb_set_learning_mode() - Define FDB learning mode
27964 + * @mc_io:     Pointer to MC portal's I/O object
27965 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27966 + * @token:     Token of DPSW object
27967 + * @fdb_id:    Forwarding Database Identifier
27968 + * @mode:      learning mode
27969 + *
27970 + * Return:     Completion status. '0' on Success; Error code otherwise.
27971 + */
27972 +int dpsw_fdb_set_learning_mode(struct fsl_mc_io                *mc_io,
27973 +                              uint32_t                 cmd_flags,
27974 +                              uint16_t                 token,
27975 +                              uint16_t                 fdb_id,
27976 +                              enum dpsw_fdb_learning_mode      mode);
27977 +
27978 +/**
27979 + * struct dpsw_fdb_attr - FDB Attributes
27980 + * @max_fdb_entries: Number of FDB entries
27981 + * @fdb_aging_time: Aging time in seconds
27982 + * @learning_mode: Learning mode
27983 + * @num_fdb_mc_groups: Current number of multicast groups
27984 + * @max_fdb_mc_groups: Maximum number of multicast groups
27985 + */
27986 +struct dpsw_fdb_attr {
27987 +       uint16_t                        max_fdb_entries;
27988 +       uint16_t                        fdb_aging_time;
27989 +       enum dpsw_fdb_learning_mode     learning_mode;
27990 +       uint16_t                        num_fdb_mc_groups;
27991 +       uint16_t                        max_fdb_mc_groups;
27992 +};
27993 +
27994 +/**
27995 + * dpsw_fdb_get_attributes() - Get FDB attributes
27996 + * @mc_io:     Pointer to MC portal's I/O object
27997 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
27998 + * @token:     Token of DPSW object
27999 + * @fdb_id:    Forwarding Database Identifier
28000 + * @attr:      Returned FDB attributes
28001 + *
28002 + * Return:     Completion status. '0' on Success; Error code otherwise.
28003 + */
28004 +int dpsw_fdb_get_attributes(struct fsl_mc_io           *mc_io,
28005 +                           uint32_t                    cmd_flags,
28006 +                           uint16_t                    token,
28007 +                           uint16_t                    fdb_id,
28008 +                           struct dpsw_fdb_attr        *attr);
28009 +
28010 +/**
28011 + * struct dpsw_acl_cfg - ACL Configuration
28012 + * @max_entries: Number of FDB entries
28013 + */
28014 +struct dpsw_acl_cfg {
28015 +       uint16_t        max_entries;
28016 +};
28017 +
28018 +/**
28019 + * struct dpsw_acl_fields - ACL fields.
28020 + * @l2_dest_mac: Destination MAC address: BPDU, Multicast, Broadcast, Unicast,
28021 + *                     slow protocols, MVRP, STP
28022 + * @l2_source_mac: Source MAC address
28023 + * @l2_tpid: Layer 2 (Ethernet) protocol type, used to identify the following
28024 + *             protocols: MPLS, PTP, PFC, ARP, Jumbo frames, LLDP, IEEE802.1ae,
28025 + *             Q-in-Q, IPv4, IPv6, PPPoE
28026 + * @l2_pcp_dei: indicate which protocol is encapsulated in the payload
28027 + * @l2_vlan_id: layer 2 VLAN ID
28028 + * @l2_ether_type: layer 2 Ethernet type
28029 + * @l3_dscp: Layer 3 differentiated services code point
28030 + * @l3_protocol: Tells the Network layer at the destination host, to which
28031 + *             Protocol this packet belongs to. The following protocol are
28032 + *             supported: ICMP, IGMP, IPv4 (encapsulation), TCP, IPv6
28033 + *             (encapsulation), GRE, PTP
28034 + * @l3_source_ip: Source IPv4 IP
28035 + * @l3_dest_ip: Destination IPv4 IP
28036 + * @l4_source_port: Source TCP/UDP Port
28037 + * @l4_dest_port: Destination TCP/UDP Port
28038 + */
28039 +struct dpsw_acl_fields {
28040 +       uint8_t         l2_dest_mac[6];
28041 +       uint8_t         l2_source_mac[6];
28042 +       uint16_t        l2_tpid;
28043 +       uint8_t         l2_pcp_dei;
28044 +       uint16_t        l2_vlan_id;
28045 +       uint16_t        l2_ether_type;
28046 +       uint8_t         l3_dscp;
28047 +       uint8_t         l3_protocol;
28048 +       uint32_t        l3_source_ip;
28049 +       uint32_t        l3_dest_ip;
28050 +       uint16_t        l4_source_port;
28051 +       uint16_t        l4_dest_port;
28052 +};
28053 +
28054 +/**
28055 + * struct dpsw_acl_key - ACL key
28056 + * @match: Match fields
28057 + * @mask: Mask: b'1 - valid, b'0 don't care
28058 + */
28059 +struct dpsw_acl_key {
28060 +       struct dpsw_acl_fields  match;
28061 +       struct dpsw_acl_fields  mask;
28062 +};
28063 +
28064 +/**
28065 + * enum dpsw_acl_action
28066 + * @DPSW_ACL_ACTION_DROP: Drop frame
28067 + * @DPSW_ACL_ACTION_REDIRECT: Redirect to certain port
28068 + * @DPSW_ACL_ACTION_ACCEPT: Accept frame
28069 + * @DPSW_ACL_ACTION_REDIRECT_TO_CTRL_IF: Redirect to control interface
28070 + */
28071 +enum dpsw_acl_action {
28072 +       DPSW_ACL_ACTION_DROP,
28073 +       DPSW_ACL_ACTION_REDIRECT,
28074 +       DPSW_ACL_ACTION_ACCEPT,
28075 +       DPSW_ACL_ACTION_REDIRECT_TO_CTRL_IF
28076 +};
28077 +
28078 +/**
28079 + * struct dpsw_acl_result - ACL action
28080 + * @action: Action should be taken when        ACL entry hit
28081 + * @if_id:  Interface IDs to redirect frame. Valid only if redirect selected for
28082 + *              action
28083 + */
28084 +struct dpsw_acl_result {
28085 +       enum dpsw_acl_action    action;
28086 +       uint16_t                if_id;
28087 +};
28088 +
28089 +/**
28090 + * struct dpsw_acl_entry_cfg - ACL entry
28091 + * @key_iova: I/O virtual address of DMA-able memory filled with key after call
28092 + *                             to dpsw_acl_prepare_entry_cfg()
28093 + * @result: Required action when entry hit occurs
28094 + * @precedence: Precedence inside ACL 0 is lowest; This priority can not change
28095 + *             during the lifetime of a Policy. It is user responsibility to
28096 + *             space the priorities according to consequent rule additions.
28097 + */
28098 +struct dpsw_acl_entry_cfg {
28099 +       uint64_t                key_iova;
28100 +       struct dpsw_acl_result  result;
28101 +       int                     precedence;
28102 +};
28103 +
28104 +/**
28105 + * dpsw_acl_add() - Adds ACL to L2 switch.
28106 + * @mc_io:     Pointer to MC portal's I/O object
28107 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
28108 + * @token:     Token of DPSW object
28109 + * @acl_id:    Returned ACL ID, for the future reference
28110 + * @cfg:       ACL configuration
28111 + *
28112 + * Create Access Control List. Multiple ACLs can be created and
28113 + * co-exist in L2 switch
28114 + *
28115 + * Return:     '0' on Success; Error code otherwise.
28116 + */
28117 +int dpsw_acl_add(struct fsl_mc_io              *mc_io,
28118 +                uint32_t                       cmd_flags,
28119 +                uint16_t                       token,
28120 +                uint16_t                       *acl_id,
28121 +                const struct dpsw_acl_cfg      *cfg);
28122 +
28123 +/**
28124 + * dpsw_acl_remove() - Removes ACL from L2 switch.
28125 + * @mc_io:     Pointer to MC portal's I/O object
28126 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
28127 + * @token:     Token of DPSW object
28128 + * @acl_id:    ACL ID
28129 + *
28130 + * Return:     '0' on Success; Error code otherwise.
28131 + */
28132 +int dpsw_acl_remove(struct fsl_mc_io   *mc_io,
28133 +                   uint32_t            cmd_flags,
28134 +                   uint16_t            token,
28135 +                   uint16_t            acl_id);
28136 +
28137 +/**
28138 + * dpsw_acl_prepare_entry_cfg() - Set an entry to ACL.
28139 + * @key:       key
28140 + * @entry_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
28141 + *
28142 + * This function has to be called before adding or removing acl_entry
28143 + *
28144 + */
28145 +void dpsw_acl_prepare_entry_cfg(const struct dpsw_acl_key      *key,
28146 +                               uint8_t                 *entry_cfg_buf);
28147 +
28148 +/**
28149 + * dpsw_acl_add_entry() - Adds an entry to ACL.
28150 + * @mc_io:     Pointer to MC portal's I/O object
28151 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
28152 + * @token:     Token of DPSW object
28153 + * @acl_id:    ACL ID
28154 + * @cfg:       entry configuration
28155 + *
28156 + * warning: This function has to be called after dpsw_acl_set_entry_cfg()
28157 + *
28158 + * Return:     '0' on Success; Error code otherwise.
28159 + */
28160 +int dpsw_acl_add_entry(struct fsl_mc_io                *mc_io,
28161 +                      uint32_t                 cmd_flags,
28162 +                      uint16_t                 token,
28163 +                      uint16_t                 acl_id,
28164 +                      const struct dpsw_acl_entry_cfg  *cfg);
28165 +
28166 +/**
28167 + * dpsw_acl_remove_entry() - Removes an entry from ACL.
28168 + * @mc_io:     Pointer to MC portal's I/O object
28169 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
28170 + * @token:     Token of DPSW object
28171 + * @acl_id:    ACL ID
28172 + * @cfg:       entry configuration
28173 + *
28174 + * warning: This function has to be called after dpsw_acl_set_entry_cfg()
28175 + *
28176 + * Return:     '0' on Success; Error code otherwise.
28177 + */
28178 +int dpsw_acl_remove_entry(struct fsl_mc_io                     *mc_io,
28179 +                         uint32_t                              cmd_flags,
28180 +                         uint16_t                              token,
28181 +                         uint16_t                              acl_id,
28182 +                         const struct dpsw_acl_entry_cfg       *cfg);
28183 +
28184 +/**
28185 + * struct dpsw_acl_if_cfg - List of interfaces to Associate with ACL
28186 + * @num_ifs: Number of interfaces
28187 + * @if_id: List of interfaces
28188 + */
28189 +struct dpsw_acl_if_cfg {
28190 +       uint16_t        num_ifs;
28191 +       uint16_t        if_id[DPSW_MAX_IF];
28192 +};
28193 +
28194 +/**
28195 + * dpsw_acl_add_if() - Associate interface/interfaces with ACL.
28196 + * @mc_io:     Pointer to MC portal's I/O object
28197 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
28198 + * @token:     Token of DPSW object
28199 + * @acl_id:    ACL ID
28200 + * @cfg:       interfaces list
28201 + *
28202 + * Return:     '0' on Success; Error code otherwise.
28203 + */
28204 +int dpsw_acl_add_if(struct fsl_mc_io                   *mc_io,
28205 +                   uint32_t                            cmd_flags,
28206 +                   uint16_t                            token,
28207 +                   uint16_t                            acl_id,
28208 +                   const struct dpsw_acl_if_cfg        *cfg);
28209 +
28210 +/**
28211 + * dpsw_acl_remove_if() - De-associate interface/interfaces from ACL.
28212 + * @mc_io:     Pointer to MC portal's I/O object
28213 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
28214 + * @token:     Token of DPSW object
28215 + * @acl_id:    ACL ID
28216 + * @cfg:       interfaces list
28217 + *
28218 + * Return:     '0' on Success; Error code otherwise.
28219 + */
28220 +int dpsw_acl_remove_if(struct fsl_mc_io                *mc_io,
28221 +                      uint32_t                 cmd_flags,
28222 +                      uint16_t                 token,
28223 +                      uint16_t                 acl_id,
28224 +                      const struct dpsw_acl_if_cfg     *cfg);
28225 +
28226 +/**
28227 + * struct dpsw_acl_attr -  ACL Attributes
28228 + * @max_entries: Max number of ACL entries
28229 + * @num_entries: Number of used ACL entries
28230 + * @num_ifs: Number of interfaces associated with ACL
28231 + */
28232 +struct dpsw_acl_attr {
28233 +       uint16_t max_entries;
28234 +       uint16_t num_entries;
28235 +       uint16_t num_ifs;
28236 +};
28237 +
28238 +/**
28239 +* dpsw_acl_get_attributes() - Get specific counter of particular interface
28240 +* @mc_io:      Pointer to MC portal's I/O object
28241 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
28242 +* @token:      Token of DPSW object
28243 +* @acl_id:      ACL Identifier
28244 +* @attr:        Returned ACL attributes
28245 +*
28246 +* Return:      '0' on Success; Error code otherwise.
28247 +*/
28248 +int dpsw_acl_get_attributes(struct fsl_mc_io           *mc_io,
28249 +                           uint32_t                    cmd_flags,
28250 +                           uint16_t                    token,
28251 +                           uint16_t                    acl_id,
28252 +                           struct dpsw_acl_attr        *attr);
28253 +/**
28254 +* struct dpsw_ctrl_if_attr - Control interface attributes
28255 +* @rx_fqid:            Receive FQID
28256 +* @rx_err_fqid:                Receive error FQID
28257 +* @tx_err_conf_fqid:   Transmit error and confirmation FQID
28258 +*/
28259 +struct dpsw_ctrl_if_attr {
28260 +       uint32_t        rx_fqid;
28261 +       uint32_t        rx_err_fqid;
28262 +       uint32_t        tx_err_conf_fqid;
28263 +};
28264 +
28265 +/**
28266 +* dpsw_ctrl_if_get_attributes() - Obtain control interface attributes
28267 +* @mc_io:      Pointer to MC portal's I/O object
28268 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
28269 +* @token:      Token of DPSW object
28270 +* @attr:        Returned control interface attributes
28271 +*
28272 +* Return:      '0' on Success; Error code otherwise.
28273 +*/
28274 +int dpsw_ctrl_if_get_attributes(struct fsl_mc_io               *mc_io,
28275 +                               uint32_t                        cmd_flags,
28276 +                               uint16_t                        token,
28277 +                               struct dpsw_ctrl_if_attr        *attr);
28278 +
28279 +/**
28280 + * Maximum number of DPBP
28281 + */
28282 +#define DPSW_MAX_DPBP     8
28283 +
28284 +/**
28285 + * struct dpsw_ctrl_if_pools_cfg - Control interface buffer pools configuration
28286 + * @num_dpbp: Number of DPBPs
28287 + * @pools: Array of buffer pools parameters; The number of valid entries
28288 + *     must match 'num_dpbp' value
28289 + */
28290 +struct dpsw_ctrl_if_pools_cfg {
28291 +       uint8_t num_dpbp;
28292 +       /**
28293 +       * struct pools - Buffer pools parameters
28294 +       * @dpbp_id: DPBP object ID
28295 +       * @buffer_size: Buffer size
28296 +       * @backup_pool: Backup pool
28297 +       */
28298 +       struct {
28299 +               int dpbp_id;
28300 +               uint16_t buffer_size;
28301 +               int backup_pool;
28302 +       } pools[DPSW_MAX_DPBP];
28303 +};
28304 +
28305 +/**
28306 +* dpsw_ctrl_if_set_pools() - Set control interface buffer pools
28307 +* @mc_io:      Pointer to MC portal's I/O object
28308 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
28309 +* @token:      Token of DPSW object
28310 +* @cfg:         buffer pools configuration
28311 +*
28312 +* Return:      '0' on Success; Error code otherwise.
28313 +*/
28314 +int dpsw_ctrl_if_set_pools(struct fsl_mc_io                    *mc_io,
28315 +                          uint32_t                             cmd_flags,
28316 +                          uint16_t                             token,
28317 +                          const struct dpsw_ctrl_if_pools_cfg *cfg);
28318 +
28319 +/**
28320 +* dpsw_ctrl_if_enable() - Enable control interface
28321 +* @mc_io:      Pointer to MC portal's I/O object
28322 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
28323 +* @token:      Token of DPSW object
28324 +*
28325 +* Return:      '0' on Success; Error code otherwise.
28326 +*/
28327 +int dpsw_ctrl_if_enable(struct fsl_mc_io       *mc_io,
28328 +                       uint32_t                cmd_flags,
28329 +                       uint16_t                token);
28330 +
28331 +/**
28332 +* dpsw_ctrl_if_disable() - Function disables control interface
28333 +* @mc_io:      Pointer to MC portal's I/O object
28334 +* @cmd_flags:  Command flags; one or more of 'MC_CMD_FLAG_'
28335 +* @token:      Token of DPSW object
28336 +*
28337 +* Return:      '0' on Success; Error code otherwise.
28338 +*/
28339 +int dpsw_ctrl_if_disable(struct fsl_mc_io      *mc_io,
28340 +                        uint32_t               cmd_flags,
28341 +                        uint16_t               token);
28342 +
28343 +#endif /* __FSL_DPSW_H */
28344 diff --git a/drivers/net/dpaa2/mc/fsl_dpsw_cmd.h b/drivers/net/dpaa2/mc/fsl_dpsw_cmd.h
28345 new file mode 100644
28346 index 0000000..c65fe38
28347 --- /dev/null
28348 +++ b/drivers/net/dpaa2/mc/fsl_dpsw_cmd.h
28349 @@ -0,0 +1,916 @@
28350 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
28351 + *
28352 + * Redistribution and use in source and binary forms, with or without
28353 + * modification, are permitted provided that the following conditions are met:
28354 + * * Redistributions of source code must retain the above copyright
28355 + * notice, this list of conditions and the following disclaimer.
28356 + * * Redistributions in binary form must reproduce the above copyright
28357 + * notice, this list of conditions and the following disclaimer in the
28358 + * documentation and/or other materials provided with the distribution.
28359 + * * Neither the name of the above-listed copyright holders nor the
28360 + * names of any contributors may be used to endorse or promote products
28361 + * derived from this software without specific prior written permission.
28362 + *
28363 + *
28364 + * ALTERNATIVELY, this software may be distributed under the terms of the
28365 + * GNU General Public License ("GPL") as published by the Free Software
28366 + * Foundation, either version 2 of that License or (at your option) any
28367 + * later version.
28368 + *
28369 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28370 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28371 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28372 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
28373 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28374 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28375 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28376 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28377 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28378 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28379 + * POSSIBILITY OF SUCH DAMAGE.
28380 + */
28381 +#ifndef __FSL_DPSW_CMD_H
28382 +#define __FSL_DPSW_CMD_H
28383 +
28384 +/* DPSW Version */
28385 +#define DPSW_VER_MAJOR                         7
28386 +#define DPSW_VER_MINOR                         0
28387 +
28388 +/* Command IDs */
28389 +#define DPSW_CMDID_CLOSE                       0x800
28390 +#define DPSW_CMDID_OPEN                                0x802
28391 +#define DPSW_CMDID_CREATE                      0x902
28392 +#define DPSW_CMDID_DESTROY                     0x900
28393 +
28394 +#define DPSW_CMDID_ENABLE                      0x002
28395 +#define DPSW_CMDID_DISABLE                     0x003
28396 +#define DPSW_CMDID_GET_ATTR                    0x004
28397 +#define DPSW_CMDID_RESET                       0x005
28398 +#define DPSW_CMDID_IS_ENABLED                  0x006
28399 +
28400 +#define DPSW_CMDID_SET_IRQ                     0x010
28401 +#define DPSW_CMDID_GET_IRQ                     0x011
28402 +#define DPSW_CMDID_SET_IRQ_ENABLE              0x012
28403 +#define DPSW_CMDID_GET_IRQ_ENABLE              0x013
28404 +#define DPSW_CMDID_SET_IRQ_MASK                        0x014
28405 +#define DPSW_CMDID_GET_IRQ_MASK                        0x015
28406 +#define DPSW_CMDID_GET_IRQ_STATUS              0x016
28407 +#define DPSW_CMDID_CLEAR_IRQ_STATUS            0x017
28408 +
28409 +#define DPSW_CMDID_SET_REFLECTION_IF           0x022
28410 +
28411 +#define DPSW_CMDID_ADD_CUSTOM_TPID             0x024
28412 +
28413 +#define DPSW_CMDID_REMOVE_CUSTOM_TPID          0x026
28414 +
28415 +#define DPSW_CMDID_IF_SET_TCI                  0x030
28416 +#define DPSW_CMDID_IF_SET_STP                  0x031
28417 +#define DPSW_CMDID_IF_SET_ACCEPTED_FRAMES      0x032
28418 +#define DPSW_CMDID_SET_IF_ACCEPT_ALL_VLAN      0x033
28419 +#define DPSW_CMDID_IF_GET_COUNTER              0x034
28420 +#define DPSW_CMDID_IF_SET_COUNTER              0x035
28421 +#define DPSW_CMDID_IF_SET_TX_SELECTION         0x036
28422 +#define DPSW_CMDID_IF_ADD_REFLECTION           0x037
28423 +#define DPSW_CMDID_IF_REMOVE_REFLECTION                0x038
28424 +#define DPSW_CMDID_IF_SET_FLOODING_METERING    0x039
28425 +#define DPSW_CMDID_IF_SET_METERING             0x03A
28426 +#define DPSW_CMDID_IF_SET_EARLY_DROP           0x03B
28427 +
28428 +#define DPSW_CMDID_IF_ENABLE                   0x03D
28429 +#define DPSW_CMDID_IF_DISABLE                  0x03E
28430 +
28431 +#define DPSW_CMDID_IF_GET_ATTR                 0x042
28432 +
28433 +#define DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH     0x044
28434 +#define DPSW_CMDID_IF_GET_MAX_FRAME_LENGTH     0x045
28435 +#define DPSW_CMDID_IF_GET_LINK_STATE           0x046
28436 +#define DPSW_CMDID_IF_SET_FLOODING             0x047
28437 +#define DPSW_CMDID_IF_SET_BROADCAST            0x048
28438 +#define DPSW_CMDID_IF_SET_MULTICAST            0x049
28439 +#define DPSW_CMDID_IF_GET_TCI                  0x04A
28440 +
28441 +#define DPSW_CMDID_IF_SET_LINK_CFG             0x04C
28442 +
28443 +#define DPSW_CMDID_VLAN_ADD                    0x060
28444 +#define DPSW_CMDID_VLAN_ADD_IF                 0x061
28445 +#define DPSW_CMDID_VLAN_ADD_IF_UNTAGGED                0x062
28446 +#define DPSW_CMDID_VLAN_ADD_IF_FLOODING                0x063
28447 +#define DPSW_CMDID_VLAN_REMOVE_IF              0x064
28448 +#define DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED     0x065
28449 +#define DPSW_CMDID_VLAN_REMOVE_IF_FLOODING     0x066
28450 +#define DPSW_CMDID_VLAN_REMOVE                 0x067
28451 +#define DPSW_CMDID_VLAN_GET_IF                 0x068
28452 +#define DPSW_CMDID_VLAN_GET_IF_FLOODING                0x069
28453 +#define DPSW_CMDID_VLAN_GET_IF_UNTAGGED                0x06A
28454 +#define DPSW_CMDID_VLAN_GET_ATTRIBUTES         0x06B
28455 +
28456 +#define DPSW_CMDID_FDB_GET_MULTICAST           0x080
28457 +#define DPSW_CMDID_FDB_GET_UNICAST             0x081
28458 +#define DPSW_CMDID_FDB_ADD                     0x082
28459 +#define DPSW_CMDID_FDB_REMOVE                  0x083
28460 +#define DPSW_CMDID_FDB_ADD_UNICAST             0x084
28461 +#define DPSW_CMDID_FDB_REMOVE_UNICAST          0x085
28462 +#define DPSW_CMDID_FDB_ADD_MULTICAST           0x086
28463 +#define DPSW_CMDID_FDB_REMOVE_MULTICAST                0x087
28464 +#define DPSW_CMDID_FDB_SET_LEARNING_MODE       0x088
28465 +#define DPSW_CMDID_FDB_GET_ATTR                        0x089
28466 +
28467 +#define DPSW_CMDID_ACL_ADD                     0x090
28468 +#define DPSW_CMDID_ACL_REMOVE                  0x091
28469 +#define DPSW_CMDID_ACL_ADD_ENTRY               0x092
28470 +#define DPSW_CMDID_ACL_REMOVE_ENTRY            0x093
28471 +#define DPSW_CMDID_ACL_ADD_IF                  0x094
28472 +#define DPSW_CMDID_ACL_REMOVE_IF               0x095
28473 +#define DPSW_CMDID_ACL_GET_ATTR                        0x096
28474 +
28475 +#define DPSW_CMDID_CTRL_IF_GET_ATTR            0x0A0
28476 +#define DPSW_CMDID_CTRL_IF_SET_POOLS           0x0A1
28477 +#define DPSW_CMDID_CTRL_IF_ENABLE              0x0A2
28478 +#define DPSW_CMDID_CTRL_IF_DISABLE             0x0A3
28479 +
28480 +/*                cmd, param, offset, width, type, arg_name */
28481 +#define DPSW_CMD_OPEN(cmd, dpsw_id) \
28482 +       MC_CMD_OP(cmd, 0, 0,  32, int,   dpsw_id)
28483 +
28484 +/*                cmd, param, offset, width, type, arg_name */
28485 +#define DPSW_CMD_CREATE(cmd, cfg) \
28486 +do { \
28487 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, cfg->num_ifs);\
28488 +       MC_CMD_OP(cmd, 0, 16,  8, uint8_t,  cfg->adv.max_fdbs);\
28489 +       MC_CMD_OP(cmd, 0, 24,  8, uint8_t,  cfg->adv.max_meters_per_if);\
28490 +       MC_CMD_OP(cmd, 0, 32,  4, enum dpsw_component_type,  \
28491 +                       cfg->adv.component_type);\
28492 +       MC_CMD_OP(cmd, 1, 0,  16, uint16_t, cfg->adv.max_vlans);\
28493 +       MC_CMD_OP(cmd, 1, 16, 16, uint16_t, cfg->adv.max_fdb_entries);\
28494 +       MC_CMD_OP(cmd, 1, 32, 16, uint16_t, cfg->adv.fdb_aging_time);\
28495 +       MC_CMD_OP(cmd, 1, 48, 16, uint16_t, cfg->adv.max_fdb_mc_groups);\
28496 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->adv.options);\
28497 +} while (0)
28498 +
28499 +/*                cmd, param, offset, width, type, arg_name */
28500 +#define DPSW_RSP_IS_ENABLED(cmd, en) \
28501 +       MC_RSP_OP(cmd, 0, 0,  1,  int,      en)
28502 +
28503 +/*                cmd, param, offset, width, type, arg_name */
28504 +#define DPSW_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
28505 +do { \
28506 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  irq_index);\
28507 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
28508 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
28509 +       MC_CMD_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
28510 +} while (0)
28511 +
28512 +/*                cmd, param, offset, width, type, arg_name */
28513 +#define DPSW_CMD_GET_IRQ(cmd, irq_index) \
28514 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
28515 +
28516 +/*                cmd, param, offset, width, type, arg_name */
28517 +#define DPSW_RSP_GET_IRQ(cmd, type, irq_cfg) \
28518 +do { \
28519 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, irq_cfg->val); \
28520 +       MC_RSP_OP(cmd, 1, 0,  64, uint64_t, irq_cfg->addr);\
28521 +       MC_RSP_OP(cmd, 2, 0,  32, int,      irq_cfg->irq_num); \
28522 +       MC_RSP_OP(cmd, 2, 32, 32, int,      type); \
28523 +} while (0)
28524 +
28525 +/*                cmd, param, offset, width, type, arg_name */
28526 +#define DPSW_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
28527 +do { \
28528 +       MC_CMD_OP(cmd, 0, 0,  8, uint8_t, enable_state); \
28529 +       MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
28530 +} while (0)
28531 +
28532 +/*                cmd, param, offset, width, type, arg_name */
28533 +#define DPSW_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
28534 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
28535 +
28536 +/*                cmd, param, offset, width, type, arg_name */
28537 +#define DPSW_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
28538 +       MC_RSP_OP(cmd, 0, 0,  8,  uint8_t,  enable_state)
28539 +
28540 +/*                cmd, param, offset, width, type, arg_name */
28541 +#define DPSW_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
28542 +do { \
28543 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, mask); \
28544 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
28545 +} while (0)
28546 +
28547 +/*                cmd, param, offset, width, type, arg_name */
28548 +#define DPSW_CMD_GET_IRQ_MASK(cmd, irq_index) \
28549 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index)
28550 +
28551 +/*                cmd, param, offset, width, type, arg_name */
28552 +#define DPSW_RSP_GET_IRQ_MASK(cmd, mask) \
28553 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, mask)
28554 +
28555 +/*                cmd, param, offset, width, type, arg_name */
28556 +#define DPSW_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
28557 +do { \
28558 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status);\
28559 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
28560 +} while (0)
28561 +
28562 +/*                cmd, param, offset, width, type, arg_name */
28563 +#define DPSW_RSP_GET_IRQ_STATUS(cmd, status) \
28564 +       MC_RSP_OP(cmd, 0, 0,  32, uint32_t, status)
28565 +
28566 +/*                cmd, param, offset, width, type, arg_name */
28567 +#define DPSW_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
28568 +do { \
28569 +       MC_CMD_OP(cmd, 0, 0,  32, uint32_t, status); \
28570 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  irq_index);\
28571 +} while (0)
28572 +
28573 +/*                cmd, param, offset, width, type, arg_name */
28574 +#define DPSW_RSP_GET_ATTR(cmd, attr) \
28575 +do { \
28576 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, attr->num_ifs);\
28577 +       MC_RSP_OP(cmd, 0, 16, 8,  uint8_t,  attr->max_fdbs);\
28578 +       MC_RSP_OP(cmd, 0, 24, 8,  uint8_t,  attr->num_fdbs);\
28579 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->max_vlans);\
28580 +       MC_RSP_OP(cmd, 0, 48, 16, uint16_t, attr->num_vlans);\
28581 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->version.major);\
28582 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
28583 +       MC_RSP_OP(cmd, 1, 32, 16, uint16_t, attr->max_fdb_entries);\
28584 +       MC_RSP_OP(cmd, 1, 48, 16, uint16_t, attr->fdb_aging_time);\
28585 +       MC_RSP_OP(cmd, 2, 0,  32, int,   attr->id);\
28586 +       MC_RSP_OP(cmd, 2, 32, 16, uint16_t, attr->mem_size);\
28587 +       MC_RSP_OP(cmd, 2, 48, 16, uint16_t, attr->max_fdb_mc_groups);\
28588 +       MC_RSP_OP(cmd, 3, 0,  64, uint64_t, attr->options);\
28589 +       MC_RSP_OP(cmd, 4, 0,  8,  uint8_t, attr->max_meters_per_if);\
28590 +       MC_RSP_OP(cmd, 4, 8,  4,  enum dpsw_component_type, \
28591 +                       attr->component_type);\
28592 +} while (0)
28593 +
28594 +/*                cmd, param, offset, width, type, arg_name */
28595 +#define DPSW_CMD_SET_REFLECTION_IF(cmd, if_id) \
28596 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28597 +
28598 +/*                cmd, param, offset, width, type, arg_name */
28599 +#define DPSW_CMD_IF_SET_FLOODING(cmd, if_id, en) \
28600 +do { \
28601 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28602 +       MC_CMD_OP(cmd, 0, 16, 1,  int,   en);\
28603 +} while (0)
28604 +
28605 +/*                cmd, param, offset, width, type, arg_name */
28606 +#define DPSW_CMD_IF_SET_BROADCAST(cmd, if_id, en) \
28607 +do { \
28608 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28609 +       MC_CMD_OP(cmd, 0, 16, 1,  int,   en);\
28610 +} while (0)
28611 +
28612 +/*                cmd, param, offset, width, type, arg_name */
28613 +#define DPSW_CMD_IF_SET_MULTICAST(cmd, if_id, en) \
28614 +do { \
28615 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28616 +       MC_CMD_OP(cmd, 0, 16, 1,  int,   en);\
28617 +} while (0)
28618 +
28619 +/*                cmd, param, offset, width, type, arg_name */
28620 +#define DPSW_CMD_IF_SET_TCI(cmd, if_id, cfg) \
28621 +do { \
28622 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28623 +       MC_CMD_OP(cmd, 0, 16, 12, uint16_t, cfg->vlan_id);\
28624 +       MC_CMD_OP(cmd, 0, 28, 1,  uint8_t,  cfg->dei);\
28625 +       MC_CMD_OP(cmd, 0, 29, 3,  uint8_t,  cfg->pcp);\
28626 +} while (0)
28627 +
28628 +/*                cmd, param, offset, width, type, arg_name */
28629 +#define DPSW_CMD_IF_GET_TCI(cmd, if_id) \
28630 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28631 +
28632 +/*                cmd, param, offset, width, type, arg_name */
28633 +#define DPSW_RSP_IF_GET_TCI(cmd, cfg) \
28634 +do { \
28635 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, cfg->vlan_id);\
28636 +       MC_RSP_OP(cmd, 0, 32, 8,  uint8_t,  cfg->dei);\
28637 +       MC_RSP_OP(cmd, 0, 40, 8,  uint8_t,  cfg->pcp);\
28638 +} while (0)
28639 +
28640 +/*                cmd, param, offset, width, type, arg_name */
28641 +#define DPSW_CMD_IF_SET_STP(cmd, if_id, cfg) \
28642 +do { \
28643 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28644 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->vlan_id);\
28645 +       MC_CMD_OP(cmd, 0, 32, 4,  enum dpsw_stp_state, cfg->state);\
28646 +} while (0)
28647 +
28648 +/*                cmd, param, offset, width, type, arg_name */
28649 +#define DPSW_CMD_IF_SET_ACCEPTED_FRAMES(cmd, if_id, cfg) \
28650 +do { \
28651 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28652 +       MC_CMD_OP(cmd, 0, 16, 4,  enum dpsw_accepted_frames, cfg->type);\
28653 +       MC_CMD_OP(cmd, 0, 20, 4,  enum dpsw_action, cfg->unaccept_act);\
28654 +} while (0)
28655 +
28656 +/*                cmd, param, offset, width, type, arg_name */
28657 +#define DPSW_CMD_IF_SET_ACCEPT_ALL_VLAN(cmd, if_id, accept_all) \
28658 +do { \
28659 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28660 +       MC_CMD_OP(cmd, 0, 16, 1,  int,   accept_all);\
28661 +} while (0)
28662 +
28663 +/*                cmd, param, offset, width, type, arg_name */
28664 +#define DPSW_CMD_IF_GET_COUNTER(cmd, if_id, type) \
28665 +do { \
28666 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28667 +       MC_CMD_OP(cmd, 0, 16, 5,  enum dpsw_counter, type);\
28668 +} while (0)
28669 +
28670 +/*                cmd, param, offset, width, type, arg_name */
28671 +#define DPSW_RSP_IF_GET_COUNTER(cmd, counter) \
28672 +       MC_RSP_OP(cmd, 1, 0, 64, uint64_t, counter)
28673 +
28674 +/*                cmd, param, offset, width, type, arg_name */
28675 +#define DPSW_CMD_IF_SET_COUNTER(cmd, if_id, type, counter) \
28676 +do { \
28677 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t,       if_id);\
28678 +       MC_CMD_OP(cmd, 0, 16, 5,  enum dpsw_counter, type);\
28679 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t,       counter);\
28680 +} while (0)
28681 +
28682 +/*                cmd, param, offset, width, type, arg_name */
28683 +#define DPSW_CMD_IF_SET_TX_SELECTION(cmd, if_id, cfg) \
28684 +do { \
28685 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28686 +       MC_CMD_OP(cmd, 0, 16, 3,  enum dpsw_priority_selector, \
28687 +                                                 cfg->priority_selector);\
28688 +       MC_CMD_OP(cmd, 1, 0,  8,  uint8_t,  cfg->tc_id[0]);\
28689 +       MC_CMD_OP(cmd, 1, 8,  8,  uint8_t,  cfg->tc_id[1]);\
28690 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  cfg->tc_id[2]);\
28691 +       MC_CMD_OP(cmd, 1, 24, 8,  uint8_t,  cfg->tc_id[3]);\
28692 +       MC_CMD_OP(cmd, 1, 32, 8,  uint8_t,  cfg->tc_id[4]);\
28693 +       MC_CMD_OP(cmd, 1, 40, 8,  uint8_t,  cfg->tc_id[5]);\
28694 +       MC_CMD_OP(cmd, 1, 48, 8,  uint8_t,  cfg->tc_id[6]);\
28695 +       MC_CMD_OP(cmd, 1, 56, 8,  uint8_t,  cfg->tc_id[7]);\
28696 +       MC_CMD_OP(cmd, 2, 0,  16, uint16_t, cfg->tc_sched[0].delta_bandwidth);\
28697 +       MC_CMD_OP(cmd, 2, 16, 4,  enum dpsw_schedule_mode,  \
28698 +                                           cfg->tc_sched[0].mode);\
28699 +       MC_CMD_OP(cmd, 2, 32, 16, uint16_t, cfg->tc_sched[1].delta_bandwidth);\
28700 +       MC_CMD_OP(cmd, 2, 48, 4,  enum dpsw_schedule_mode, \
28701 +                                           cfg->tc_sched[1].mode);\
28702 +       MC_CMD_OP(cmd, 3, 0,  16, uint16_t, cfg->tc_sched[2].delta_bandwidth);\
28703 +       MC_CMD_OP(cmd, 3, 16, 4,  enum dpsw_schedule_mode,  \
28704 +                                           cfg->tc_sched[2].mode);\
28705 +       MC_CMD_OP(cmd, 3, 32, 16, uint16_t, cfg->tc_sched[3].delta_bandwidth);\
28706 +       MC_CMD_OP(cmd, 3, 48, 4,  enum dpsw_schedule_mode, \
28707 +                                           cfg->tc_sched[3].mode);\
28708 +       MC_CMD_OP(cmd, 4, 0,  16, uint16_t, cfg->tc_sched[4].delta_bandwidth);\
28709 +       MC_CMD_OP(cmd, 4, 16,  4,  enum dpsw_schedule_mode,  \
28710 +                                           cfg->tc_sched[4].mode);\
28711 +       MC_CMD_OP(cmd, 4, 32, 16, uint16_t, cfg->tc_sched[5].delta_bandwidth);\
28712 +       MC_CMD_OP(cmd, 4, 48, 4,  enum dpsw_schedule_mode,  \
28713 +                                           cfg->tc_sched[5].mode);\
28714 +       MC_CMD_OP(cmd, 5, 0,  16, uint16_t, cfg->tc_sched[6].delta_bandwidth);\
28715 +       MC_CMD_OP(cmd, 5, 16, 4,  enum dpsw_schedule_mode,  \
28716 +                                           cfg->tc_sched[6].mode);\
28717 +       MC_CMD_OP(cmd, 5, 32, 16, uint16_t, cfg->tc_sched[7].delta_bandwidth);\
28718 +       MC_CMD_OP(cmd, 5, 48, 4,  enum dpsw_schedule_mode,  \
28719 +                                           cfg->tc_sched[7].mode);\
28720 +} while (0)
28721 +
28722 +/*                cmd, param, offset, width, type, arg_name */
28723 +#define DPSW_CMD_IF_ADD_REFLECTION(cmd, if_id, cfg) \
28724 +do { \
28725 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28726 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->vlan_id);\
28727 +       MC_CMD_OP(cmd, 0, 32, 2,  enum dpsw_reflection_filter, cfg->filter);\
28728 +} while (0)
28729 +
28730 +/*                cmd, param, offset, width, type, arg_name */
28731 +#define DPSW_CMD_IF_REMOVE_REFLECTION(cmd, if_id, cfg) \
28732 +do { \
28733 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28734 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->vlan_id);\
28735 +       MC_CMD_OP(cmd, 0, 32, 2,  enum dpsw_reflection_filter, cfg->filter);\
28736 +} while (0)
28737 +
28738 +/*                cmd, param, offset, width, type, arg_name */
28739 +#define DPSW_CMD_IF_SET_FLOODING_METERING(cmd, if_id, cfg) \
28740 +do { \
28741 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28742 +       MC_CMD_OP(cmd, 0, 24, 4,  enum dpsw_metering_mode, cfg->mode);\
28743 +       MC_CMD_OP(cmd, 0, 28, 4,  enum dpsw_metering_unit, cfg->units);\
28744 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, cfg->cir);\
28745 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->eir);\
28746 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->cbs);\
28747 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->ebs);\
28748 +} while (0)
28749 +
28750 +/*                cmd, param, offset, width, type, arg_name */
28751 +#define DPSW_CMD_IF_SET_METERING(cmd, if_id, tc_id, cfg) \
28752 +do { \
28753 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28754 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  tc_id);\
28755 +       MC_CMD_OP(cmd, 0, 24, 4,  enum dpsw_metering_mode, cfg->mode);\
28756 +       MC_CMD_OP(cmd, 0, 28, 4,  enum dpsw_metering_unit, cfg->units);\
28757 +       MC_CMD_OP(cmd, 0, 32, 32, uint32_t, cfg->cir);\
28758 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->eir);\
28759 +       MC_CMD_OP(cmd, 1, 32, 32, uint32_t, cfg->cbs);\
28760 +       MC_CMD_OP(cmd, 2, 0,  32, uint32_t, cfg->ebs);\
28761 +} while (0)
28762 +
28763 +/*                cmd, param, offset, width, type, arg_name */
28764 +#define DPSW_PREP_EARLY_DROP(ext, cfg) \
28765 +do { \
28766 +       MC_PREP_OP(ext, 0, 0,  2, enum dpsw_early_drop_mode, cfg->drop_mode); \
28767 +       MC_PREP_OP(ext, 0, 2,  2, \
28768 +                 enum dpsw_early_drop_unit, cfg->units); \
28769 +       MC_PREP_OP(ext, 0, 32, 32, uint32_t, cfg->tail_drop_threshold); \
28770 +       MC_PREP_OP(ext, 1, 0,  8,  uint8_t,  cfg->green.drop_probability); \
28771 +       MC_PREP_OP(ext, 2, 0,  64, uint64_t, cfg->green.max_threshold); \
28772 +       MC_PREP_OP(ext, 3, 0,  64, uint64_t, cfg->green.min_threshold); \
28773 +       MC_PREP_OP(ext, 5, 0,  8,  uint8_t,  cfg->yellow.drop_probability);\
28774 +       MC_PREP_OP(ext, 6, 0,  64, uint64_t, cfg->yellow.max_threshold); \
28775 +       MC_PREP_OP(ext, 7, 0,  64, uint64_t, cfg->yellow.min_threshold); \
28776 +} while (0)
28777 +
28778 +/*                cmd, param, offset, width, type, arg_name */
28779 +#define DPSW_EXT_EARLY_DROP(ext, cfg) \
28780 +do { \
28781 +       MC_EXT_OP(ext, 0, 0,  2, enum dpsw_early_drop_mode, cfg->drop_mode); \
28782 +       MC_EXT_OP(ext, 0, 2,  2, \
28783 +                 enum dpsw_early_drop_unit, cfg->units); \
28784 +       MC_EXT_OP(ext, 0, 32, 32, uint32_t, cfg->tail_drop_threshold); \
28785 +       MC_EXT_OP(ext, 1, 0,  8,  uint8_t,  cfg->green.drop_probability); \
28786 +       MC_EXT_OP(ext, 2, 0,  64, uint64_t, cfg->green.max_threshold); \
28787 +       MC_EXT_OP(ext, 3, 0,  64, uint64_t, cfg->green.min_threshold); \
28788 +       MC_EXT_OP(ext, 5, 0,  8,  uint8_t,  cfg->yellow.drop_probability);\
28789 +       MC_EXT_OP(ext, 6, 0,  64, uint64_t, cfg->yellow.max_threshold); \
28790 +       MC_EXT_OP(ext, 7, 0,  64, uint64_t, cfg->yellow.min_threshold); \
28791 +} while (0)
28792 +
28793 +/*                cmd, param, offset, width, type, arg_name */
28794 +#define DPSW_CMD_IF_SET_EARLY_DROP(cmd, if_id, tc_id, early_drop_iova) \
28795 +do { \
28796 +       MC_CMD_OP(cmd, 0, 8,  8,  uint8_t,  tc_id); \
28797 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, if_id); \
28798 +       MC_CMD_OP(cmd, 1, 0,  64, uint64_t, early_drop_iova); \
28799 +} while (0)
28800 +
28801 +/*                cmd, param, offset, width, type, arg_name */
28802 +#define DPSW_CMD_ADD_CUSTOM_TPID(cmd, cfg) \
28803 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->tpid)
28804 +
28805 +/*                cmd, param, offset, width, type, arg_name */
28806 +#define DPSW_CMD_REMOVE_CUSTOM_TPID(cmd, cfg) \
28807 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->tpid)
28808 +
28809 +/*                cmd, param, offset, width, type, arg_name */
28810 +#define DPSW_CMD_IF_ENABLE(cmd, if_id) \
28811 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28812 +
28813 +/*                cmd, param, offset, width, type, arg_name */
28814 +#define DPSW_CMD_IF_DISABLE(cmd, if_id) \
28815 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28816 +
28817 +/*                cmd, param, offset, width, type, arg_name */
28818 +#define DPSW_CMD_IF_GET_ATTR(cmd, if_id) \
28819 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28820 +
28821 +/*                cmd, param, offset, width, type, arg_name */
28822 +#define DPSW_RSP_IF_GET_ATTR(cmd, attr) \
28823 +do { \
28824 +       MC_RSP_OP(cmd, 0, 0,  4,  enum dpsw_accepted_frames, \
28825 +                                                       attr->admit_untagged);\
28826 +       MC_RSP_OP(cmd, 0, 5,  1,  int,      attr->enabled);\
28827 +       MC_RSP_OP(cmd, 0, 6,  1,  int,      attr->accept_all_vlan);\
28828 +       MC_RSP_OP(cmd, 0, 16, 8,  uint8_t,  attr->num_tcs);\
28829 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t,     attr->qdid);\
28830 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, attr->options);\
28831 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, attr->rate);\
28832 +} while (0)
28833 +
28834 +/*                cmd, param, offset, width, type, arg_name */
28835 +#define DPSW_CMD_IF_SET_MAX_FRAME_LENGTH(cmd, if_id, frame_length) \
28836 +do { \
28837 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28838 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, frame_length);\
28839 +} while (0)
28840 +
28841 +/*                cmd, param, offset, width, type, arg_name */
28842 +#define DPSW_CMD_IF_GET_MAX_FRAME_LENGTH(cmd, if_id) \
28843 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28844 +
28845 +/*                cmd, param, offset, width, type, arg_name */
28846 +#define DPSW_RSP_IF_GET_MAX_FRAME_LENGTH(cmd, frame_length) \
28847 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, frame_length)
28848 +
28849 +/*                cmd, param, offset, width, type, arg_name */
28850 +#define DPSW_CMD_IF_SET_LINK_CFG(cmd, if_id, cfg) \
28851 +do { \
28852 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id);\
28853 +       MC_CMD_OP(cmd, 1, 0,  32, uint32_t, cfg->rate);\
28854 +       MC_CMD_OP(cmd, 2, 0,  64, uint64_t, cfg->options);\
28855 +} while (0)
28856 +
28857 +/*                cmd, param, offset, width, type, arg_name */
28858 +#define DPSW_CMD_IF_GET_LINK_STATE(cmd, if_id) \
28859 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, if_id)
28860 +
28861 +/*                cmd, param, offset, width, type, arg_name */
28862 +#define DPSW_RSP_IF_GET_LINK_STATE(cmd, state) \
28863 +do { \
28864 +       MC_RSP_OP(cmd, 0, 32, 1,  int,      state->up);\
28865 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, state->rate);\
28866 +       MC_RSP_OP(cmd, 2, 0,  64, uint64_t, state->options);\
28867 +} while (0)
28868 +
28869 +/*                cmd, param, offset, width, type, arg_name */
28870 +#define DPSW_CMD_VLAN_ADD(cmd, vlan_id, cfg) \
28871 +do { \
28872 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, cfg->fdb_id);\
28873 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id);\
28874 +} while (0)
28875 +
28876 +/*                cmd, param, offset, width, type, arg_name */
28877 +#define DPSW_CMD_VLAN_ADD_IF(cmd, vlan_id) \
28878 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28879 +
28880 +/*                cmd, param, offset, width, type, arg_name */
28881 +#define DPSW_CMD_VLAN_ADD_IF_UNTAGGED(cmd, vlan_id) \
28882 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28883 +
28884 +/*                cmd, param, offset, width, type, arg_name */
28885 +#define DPSW_CMD_VLAN_ADD_IF_FLOODING(cmd, vlan_id) \
28886 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28887 +
28888 +#define DPSW_CMD_VLAN_REMOVE_IF(cmd, vlan_id) \
28889 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28890 +
28891 +/*                cmd, param, offset, width, type, arg_name */
28892 +#define DPSW_CMD_VLAN_REMOVE_IF_UNTAGGED(cmd, vlan_id) \
28893 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28894 +
28895 +/*                cmd, param, offset, width, type, arg_name */
28896 +#define DPSW_CMD_VLAN_REMOVE_IF_FLOODING(cmd, vlan_id) \
28897 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28898 +
28899 +/*                cmd, param, offset, width, type, arg_name */
28900 +#define DPSW_CMD_VLAN_REMOVE(cmd, vlan_id) \
28901 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, vlan_id)
28902 +
28903 +/*                cmd, param, offset, width, type, arg_name */
28904 +#define DPSW_CMD_VLAN_GET_ATTR(cmd, vlan_id) \
28905 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, vlan_id)
28906 +
28907 +/*                cmd, param, offset, width, type, arg_name */
28908 +#define DPSW_RSP_VLAN_GET_ATTR(cmd, attr) \
28909 +do { \
28910 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->fdb_id); \
28911 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->num_ifs); \
28912 +       MC_RSP_OP(cmd, 1, 32, 16, uint16_t, attr->num_untagged_ifs); \
28913 +       MC_RSP_OP(cmd, 1, 48, 16, uint16_t, attr->num_flooding_ifs); \
28914 +} while (0)
28915 +
28916 +/*                cmd, param, offset, width, type, arg_name */
28917 +#define DPSW_CMD_VLAN_GET_IF(cmd, vlan_id) \
28918 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, vlan_id)
28919 +
28920 +/*                cmd, param, offset, width, type, arg_name */
28921 +#define DPSW_RSP_VLAN_GET_IF(cmd, cfg) \
28922 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs)
28923 +
28924 +/*                cmd, param, offset, width, type, arg_name */
28925 +#define DPSW_CMD_VLAN_GET_IF_FLOODING(cmd, vlan_id) \
28926 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, vlan_id)
28927 +
28928 +/*                cmd, param, offset, width, type, arg_name */
28929 +#define DPSW_RSP_VLAN_GET_IF_FLOODING(cmd, cfg) \
28930 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs)
28931 +
28932 +/*                cmd, param, offset, width, type, arg_name */
28933 +#define DPSW_CMD_VLAN_GET_IF_UNTAGGED(cmd, vlan_id) \
28934 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, vlan_id)
28935 +
28936 +/*                cmd, param, offset, width, type, arg_name */
28937 +#define DPSW_RSP_VLAN_GET_IF_UNTAGGED(cmd, cfg) \
28938 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs)
28939 +
28940 +/*     param, offset, width,   type,           arg_name */
28941 +#define DPSW_CMD_FDB_ADD(cmd, cfg) \
28942 +do { \
28943 +       MC_CMD_OP(cmd, 0, 32, 16, uint16_t, cfg->fdb_aging_time);\
28944 +       MC_CMD_OP(cmd, 0, 48, 16, uint16_t, cfg->num_fdb_entries);\
28945 +} while (0)
28946 +
28947 +/*                cmd, param, offset, width, type, arg_name */
28948 +#define DPSW_RSP_FDB_ADD(cmd, fdb_id) \
28949 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, fdb_id)
28950 +
28951 +/*                cmd, param, offset, width, type, arg_name */
28952 +#define DPSW_CMD_FDB_REMOVE(cmd, fdb_id) \
28953 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id)
28954 +
28955 +/*                cmd, param, offset, width, type, arg_name */
28956 +#define DPSW_CMD_FDB_ADD_UNICAST(cmd, fdb_id, cfg) \
28957 +do { \
28958 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
28959 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->mac_addr[5]);\
28960 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->mac_addr[4]);\
28961 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->mac_addr[3]);\
28962 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  cfg->mac_addr[2]);\
28963 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  cfg->mac_addr[1]);\
28964 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  cfg->mac_addr[0]);\
28965 +       MC_CMD_OP(cmd, 1, 0,  8,  uint16_t, cfg->if_egress);\
28966 +       MC_CMD_OP(cmd, 1, 16, 4,  enum dpsw_fdb_entry_type, cfg->type);\
28967 +} while (0)
28968 +
28969 +/*                cmd, param, offset, width, type, arg_name */
28970 +#define DPSW_CMD_FDB_GET_UNICAST(cmd, fdb_id) \
28971 +do { \
28972 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
28973 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->mac_addr[5]);\
28974 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->mac_addr[4]);\
28975 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->mac_addr[3]);\
28976 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  cfg->mac_addr[2]);\
28977 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  cfg->mac_addr[1]);\
28978 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  cfg->mac_addr[0]);\
28979 +} while (0)
28980 +
28981 +/*                cmd, param, offset, width, type, arg_name */
28982 +#define DPSW_RSP_FDB_GET_UNICAST(cmd, cfg) \
28983 +do { \
28984 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, cfg->if_egress);\
28985 +       MC_RSP_OP(cmd, 1, 16, 4,  enum dpsw_fdb_entry_type, cfg->type);\
28986 +} while (0)
28987 +
28988 +/*                cmd, param, offset, width, type, arg_name */
28989 +#define DPSW_CMD_FDB_REMOVE_UNICAST(cmd, fdb_id, cfg) \
28990 +do { \
28991 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
28992 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->mac_addr[5]);\
28993 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->mac_addr[4]);\
28994 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->mac_addr[3]);\
28995 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  cfg->mac_addr[2]);\
28996 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  cfg->mac_addr[1]);\
28997 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  cfg->mac_addr[0]);\
28998 +       MC_CMD_OP(cmd, 1, 0,  16, uint16_t, cfg->if_egress);\
28999 +       MC_CMD_OP(cmd, 1, 16, 4,  enum dpsw_fdb_entry_type, cfg->type);\
29000 +} while (0)
29001 +
29002 +/*                cmd, param, offset, width, type, arg_name */
29003 +#define DPSW_CMD_FDB_ADD_MULTICAST(cmd, fdb_id, cfg) \
29004 +do { \
29005 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
29006 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs);\
29007 +       MC_CMD_OP(cmd, 0, 32, 4,  enum dpsw_fdb_entry_type, cfg->type);\
29008 +       MC_CMD_OP(cmd, 1, 0,  8,  uint8_t,  cfg->mac_addr[5]);\
29009 +       MC_CMD_OP(cmd, 1, 8,  8,  uint8_t,  cfg->mac_addr[4]);\
29010 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  cfg->mac_addr[3]);\
29011 +       MC_CMD_OP(cmd, 1, 24, 8,  uint8_t,  cfg->mac_addr[2]);\
29012 +       MC_CMD_OP(cmd, 1, 32, 8,  uint8_t,  cfg->mac_addr[1]);\
29013 +       MC_CMD_OP(cmd, 1, 40, 8,  uint8_t,  cfg->mac_addr[0]);\
29014 +} while (0)
29015 +
29016 +/*                cmd, param, offset, width, type, arg_name */
29017 +#define DPSW_CMD_FDB_GET_MULTICAST(cmd, fdb_id) \
29018 +do { \
29019 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
29020 +       MC_CMD_OP(cmd, 0, 16, 8,  uint8_t,  cfg->mac_addr[5]);\
29021 +       MC_CMD_OP(cmd, 0, 24, 8,  uint8_t,  cfg->mac_addr[4]);\
29022 +       MC_CMD_OP(cmd, 0, 32, 8,  uint8_t,  cfg->mac_addr[3]);\
29023 +       MC_CMD_OP(cmd, 0, 40, 8,  uint8_t,  cfg->mac_addr[2]);\
29024 +       MC_CMD_OP(cmd, 0, 48, 8,  uint8_t,  cfg->mac_addr[1]);\
29025 +       MC_CMD_OP(cmd, 0, 56, 8,  uint8_t,  cfg->mac_addr[0]);\
29026 +} while (0)
29027 +
29028 +/*                cmd, param, offset, width, type, arg_name */
29029 +#define DPSW_RSP_FDB_GET_MULTICAST(cmd, cfg) \
29030 +do { \
29031 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, cfg->num_ifs);\
29032 +       MC_RSP_OP(cmd, 1, 16, 4,  enum dpsw_fdb_entry_type, cfg->type);\
29033 +} while (0)
29034 +
29035 +/*                cmd, param, offset, width, type, arg_name */
29036 +#define DPSW_CMD_FDB_REMOVE_MULTICAST(cmd, fdb_id, cfg) \
29037 +do { \
29038 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
29039 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs);\
29040 +       MC_CMD_OP(cmd, 0, 32, 4,  enum dpsw_fdb_entry_type, cfg->type);\
29041 +       MC_CMD_OP(cmd, 1, 0,  8,  uint8_t,  cfg->mac_addr[5]);\
29042 +       MC_CMD_OP(cmd, 1, 8,  8,  uint8_t,  cfg->mac_addr[4]);\
29043 +       MC_CMD_OP(cmd, 1, 16, 8,  uint8_t,  cfg->mac_addr[3]);\
29044 +       MC_CMD_OP(cmd, 1, 24, 8,  uint8_t,  cfg->mac_addr[2]);\
29045 +       MC_CMD_OP(cmd, 1, 32, 8,  uint8_t,  cfg->mac_addr[1]);\
29046 +       MC_CMD_OP(cmd, 1, 40, 8,  uint8_t,  cfg->mac_addr[0]);\
29047 +} while (0)
29048 +
29049 +/*                cmd, param, offset, width, type, arg_name */
29050 +#define DPSW_CMD_FDB_SET_LEARNING_MODE(cmd, fdb_id, mode) \
29051 +do { \
29052 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id);\
29053 +       MC_CMD_OP(cmd, 0, 16, 4,  enum dpsw_fdb_learning_mode, mode);\
29054 +} while (0)
29055 +
29056 +/*                cmd, param, offset, width, type, arg_name */
29057 +#define DPSW_CMD_FDB_GET_ATTR(cmd, fdb_id) \
29058 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, fdb_id)
29059 +
29060 +/*                cmd, param, offset, width, type, arg_name */
29061 +#define DPSW_RSP_FDB_GET_ATTR(cmd, attr) \
29062 +do { \
29063 +       MC_RSP_OP(cmd, 0, 16, 16, uint16_t, attr->max_fdb_entries);\
29064 +       MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->fdb_aging_time);\
29065 +       MC_RSP_OP(cmd, 0, 48, 16, uint16_t, attr->num_fdb_mc_groups);\
29066 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->max_fdb_mc_groups);\
29067 +       MC_RSP_OP(cmd, 1, 16, 4,  enum dpsw_fdb_learning_mode, \
29068 +                                                         attr->learning_mode);\
29069 +} while (0)
29070 +
29071 +/*                cmd, param, offset, width, type, arg_name */
29072 +#define DPSW_CMD_ACL_ADD(cmd, cfg) \
29073 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->max_entries)
29074 +
29075 +/*                cmd, param, offset, width, type, arg_name */
29076 +#define DPSW_RSP_ACL_ADD(cmd, acl_id) \
29077 +       MC_RSP_OP(cmd, 0, 0,  16, uint16_t, acl_id)
29078 +
29079 +/*                cmd, param, offset, width, type, arg_name */
29080 +#define DPSW_CMD_ACL_REMOVE(cmd, acl_id) \
29081 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, acl_id)
29082 +
29083 +/*                cmd, param, offset, width, type, arg_name */
29084 +#define DPSW_PREP_ACL_ENTRY(ext, key) \
29085 +do { \
29086 +       MC_PREP_OP(ext, 0, 0,  8,  uint8_t,  key->match.l2_dest_mac[5]);\
29087 +       MC_PREP_OP(ext, 0, 8,  8,  uint8_t,  key->match.l2_dest_mac[4]);\
29088 +       MC_PREP_OP(ext, 0, 16, 8,  uint8_t,  key->match.l2_dest_mac[3]);\
29089 +       MC_PREP_OP(ext, 0, 24, 8,  uint8_t,  key->match.l2_dest_mac[2]);\
29090 +       MC_PREP_OP(ext, 0, 32, 8,  uint8_t,  key->match.l2_dest_mac[1]);\
29091 +       MC_PREP_OP(ext, 0, 40, 8,  uint8_t,  key->match.l2_dest_mac[0]);\
29092 +       MC_PREP_OP(ext, 0, 48, 16, uint16_t, key->match.l2_tpid);\
29093 +       MC_PREP_OP(ext, 1, 0,  8,  uint8_t,  key->match.l2_source_mac[5]);\
29094 +       MC_PREP_OP(ext, 1, 8,  8,  uint8_t,  key->match.l2_source_mac[4]);\
29095 +       MC_PREP_OP(ext, 1, 16, 8,  uint8_t,  key->match.l2_source_mac[3]);\
29096 +       MC_PREP_OP(ext, 1, 24, 8,  uint8_t,  key->match.l2_source_mac[2]);\
29097 +       MC_PREP_OP(ext, 1, 32, 8,  uint8_t,  key->match.l2_source_mac[1]);\
29098 +       MC_PREP_OP(ext, 1, 40, 8,  uint8_t,  key->match.l2_source_mac[0]);\
29099 +       MC_PREP_OP(ext, 1, 48, 16, uint16_t, key->match.l2_vlan_id);\
29100 +       MC_PREP_OP(ext, 2, 0,  32, uint32_t, key->match.l3_dest_ip);\
29101 +       MC_PREP_OP(ext, 2, 32, 32, uint32_t, key->match.l3_source_ip);\
29102 +       MC_PREP_OP(ext, 3, 0,  16, uint16_t, key->match.l4_dest_port);\
29103 +       MC_PREP_OP(ext, 3, 16, 16, uint16_t, key->match.l4_source_port);\
29104 +       MC_PREP_OP(ext, 3, 32, 16, uint16_t, key->match.l2_ether_type);\
29105 +       MC_PREP_OP(ext, 3, 48, 8,  uint8_t,  key->match.l2_pcp_dei);\
29106 +       MC_PREP_OP(ext, 3, 56, 8,  uint8_t,  key->match.l3_dscp);\
29107 +       MC_PREP_OP(ext, 4, 0,  8,  uint8_t,  key->mask.l2_dest_mac[5]);\
29108 +       MC_PREP_OP(ext, 4, 8,  8,  uint8_t,  key->mask.l2_dest_mac[4]);\
29109 +       MC_PREP_OP(ext, 4, 16, 8,  uint8_t,  key->mask.l2_dest_mac[3]);\
29110 +       MC_PREP_OP(ext, 4, 24, 8,  uint8_t,  key->mask.l2_dest_mac[2]);\
29111 +       MC_PREP_OP(ext, 4, 32, 8,  uint8_t,  key->mask.l2_dest_mac[1]);\
29112 +       MC_PREP_OP(ext, 4, 40, 8,  uint8_t,  key->mask.l2_dest_mac[0]);\
29113 +       MC_PREP_OP(ext, 4, 48, 16, uint16_t, key->mask.l2_tpid);\
29114 +       MC_PREP_OP(ext, 5, 0,  8,  uint8_t,  key->mask.l2_source_mac[5]);\
29115 +       MC_PREP_OP(ext, 5, 8,  8,  uint8_t,  key->mask.l2_source_mac[4]);\
29116 +       MC_PREP_OP(ext, 5, 16, 8,  uint8_t,  key->mask.l2_source_mac[3]);\
29117 +       MC_PREP_OP(ext, 5, 24, 8,  uint8_t,  key->mask.l2_source_mac[2]);\
29118 +       MC_PREP_OP(ext, 5, 32, 8,  uint8_t,  key->mask.l2_source_mac[1]);\
29119 +       MC_PREP_OP(ext, 5, 40, 8,  uint8_t,  key->mask.l2_source_mac[0]);\
29120 +       MC_PREP_OP(ext, 5, 48, 16, uint16_t, key->mask.l2_vlan_id);\
29121 +       MC_PREP_OP(ext, 6, 0,  32, uint32_t, key->mask.l3_dest_ip);\
29122 +       MC_PREP_OP(ext, 6, 32, 32, uint32_t, key->mask.l3_source_ip);\
29123 +       MC_PREP_OP(ext, 7, 0,  16, uint16_t, key->mask.l4_dest_port);\
29124 +       MC_PREP_OP(ext, 7, 16, 16, uint16_t, key->mask.l4_source_port);\
29125 +       MC_PREP_OP(ext, 7, 32, 16, uint16_t, key->mask.l2_ether_type);\
29126 +       MC_PREP_OP(ext, 7, 48, 8,  uint8_t,  key->mask.l2_pcp_dei);\
29127 +       MC_PREP_OP(ext, 7, 56, 8,  uint8_t,  key->mask.l3_dscp);\
29128 +       MC_PREP_OP(ext, 8, 0,  8,  uint8_t,  key->match.l3_protocol);\
29129 +       MC_PREP_OP(ext, 8, 8,  8,  uint8_t,  key->mask.l3_protocol);\
29130 +} while (0)
29131 +
29132 +/*                cmd, param, offset, width, type, arg_name */
29133 +#define DPSW_EXT_ACL_ENTRY(ext, key) \
29134 +do { \
29135 +       MC_EXT_OP(ext, 0, 0,  8,  uint8_t,  key->match.l2_dest_mac[5]);\
29136 +       MC_EXT_OP(ext, 0, 8,  8,  uint8_t,  key->match.l2_dest_mac[4]);\
29137 +       MC_EXT_OP(ext, 0, 16, 8,  uint8_t,  key->match.l2_dest_mac[3]);\
29138 +       MC_EXT_OP(ext, 0, 24, 8,  uint8_t,  key->match.l2_dest_mac[2]);\
29139 +       MC_EXT_OP(ext, 0, 32, 8,  uint8_t,  key->match.l2_dest_mac[1]);\
29140 +       MC_EXT_OP(ext, 0, 40, 8,  uint8_t,  key->match.l2_dest_mac[0]);\
29141 +       MC_EXT_OP(ext, 0, 48, 16, uint16_t, key->match.l2_tpid);\
29142 +       MC_EXT_OP(ext, 1, 0,  8,  uint8_t,  key->match.l2_source_mac[5]);\
29143 +       MC_EXT_OP(ext, 1, 8,  8,  uint8_t,  key->match.l2_source_mac[4]);\
29144 +       MC_EXT_OP(ext, 1, 16, 8,  uint8_t,  key->match.l2_source_mac[3]);\
29145 +       MC_EXT_OP(ext, 1, 24, 8,  uint8_t,  key->match.l2_source_mac[2]);\
29146 +       MC_EXT_OP(ext, 1, 32, 8,  uint8_t,  key->match.l2_source_mac[1]);\
29147 +       MC_EXT_OP(ext, 1, 40, 8,  uint8_t,  key->match.l2_source_mac[0]);\
29148 +       MC_EXT_OP(ext, 1, 48, 16, uint16_t, key->match.l2_vlan_id);\
29149 +       MC_EXT_OP(ext, 2, 0,  32, uint32_t, key->match.l3_dest_ip);\
29150 +       MC_EXT_OP(ext, 2, 32, 32, uint32_t, key->match.l3_source_ip);\
29151 +       MC_EXT_OP(ext, 3, 0,  16, uint16_t, key->match.l4_dest_port);\
29152 +       MC_EXT_OP(ext, 3, 16, 16, uint16_t, key->match.l4_source_port);\
29153 +       MC_EXT_OP(ext, 3, 32, 16, uint16_t, key->match.l2_ether_type);\
29154 +       MC_EXT_OP(ext, 3, 48, 8,  uint8_t,  key->match.l2_pcp_dei);\
29155 +       MC_EXT_OP(ext, 3, 56, 8,  uint8_t,  key->match.l3_dscp);\
29156 +       MC_EXT_OP(ext, 4, 0,  8,  uint8_t,  key->mask.l2_dest_mac[5]);\
29157 +       MC_EXT_OP(ext, 4, 8,  8,  uint8_t,  key->mask.l2_dest_mac[4]);\
29158 +       MC_EXT_OP(ext, 4, 16, 8,  uint8_t,  key->mask.l2_dest_mac[3]);\
29159 +       MC_EXT_OP(ext, 4, 24, 8,  uint8_t,  key->mask.l2_dest_mac[2]);\
29160 +       MC_EXT_OP(ext, 4, 32, 8,  uint8_t,  key->mask.l2_dest_mac[1]);\
29161 +       MC_EXT_OP(ext, 4, 40, 8,  uint8_t,  key->mask.l2_dest_mac[0]);\
29162 +       MC_EXT_OP(ext, 4, 48, 16, uint16_t, key->mask.l2_tpid);\
29163 +       MC_EXT_OP(ext, 5, 0,  8,  uint8_t,  key->mask.l2_source_mac[5]);\
29164 +       MC_EXT_OP(ext, 5, 8,  8,  uint8_t,  key->mask.l2_source_mac[4]);\
29165 +       MC_EXT_OP(ext, 5, 16, 8,  uint8_t,  key->mask.l2_source_mac[3]);\
29166 +       MC_EXT_OP(ext, 5, 24, 8,  uint8_t,  key->mask.l2_source_mac[2]);\
29167 +       MC_EXT_OP(ext, 5, 32, 8,  uint8_t,  key->mask.l2_source_mac[1]);\
29168 +       MC_EXT_OP(ext, 5, 40, 8,  uint8_t,  key->mask.l2_source_mac[0]);\
29169 +       MC_EXT_OP(ext, 5, 48, 16, uint16_t, key->mask.l2_vlan_id);\
29170 +       MC_EXT_OP(ext, 6, 0,  32, uint32_t, key->mask.l3_dest_ip);\
29171 +       MC_EXT_OP(ext, 6, 32, 32, uint32_t, key->mask.l3_source_ip);\
29172 +       MC_EXT_OP(ext, 7, 0,  16, uint16_t, key->mask.l4_dest_port);\
29173 +       MC_EXT_OP(ext, 7, 16, 16, uint16_t, key->mask.l4_source_port);\
29174 +       MC_EXT_OP(ext, 7, 32, 16, uint16_t, key->mask.l2_ether_type);\
29175 +       MC_EXT_OP(ext, 7, 48, 8,  uint8_t,  key->mask.l2_pcp_dei);\
29176 +       MC_EXT_OP(ext, 7, 56, 8,  uint8_t,  key->mask.l3_dscp);\
29177 +       MC_EXT_OP(ext, 8, 0,  8,  uint8_t,  key->match.l3_protocol);\
29178 +       MC_EXT_OP(ext, 8, 8,  8,  uint8_t,  key->mask.l3_protocol);\
29179 +} while (0)
29180 +
29181 +/*                cmd, param, offset, width, type, arg_name */
29182 +#define DPSW_CMD_ACL_ADD_ENTRY(cmd, acl_id, cfg) \
29183 +do { \
29184 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, acl_id);\
29185 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->result.if_id);\
29186 +       MC_CMD_OP(cmd, 0, 32, 32, int,      cfg->precedence);\
29187 +       MC_CMD_OP(cmd, 1, 0,  4,  enum dpsw_acl_action, cfg->result.action);\
29188 +       MC_CMD_OP(cmd, 6, 0,  64, uint64_t, cfg->key_iova); \
29189 +} while (0)
29190 +
29191 +/*                cmd, param, offset, width, type, arg_name */
29192 +#define DPSW_CMD_ACL_REMOVE_ENTRY(cmd, acl_id, cfg) \
29193 +do { \
29194 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, acl_id);\
29195 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->result.if_id);\
29196 +       MC_CMD_OP(cmd, 0, 32, 32, int,      cfg->precedence);\
29197 +       MC_CMD_OP(cmd, 1, 0,  4,  enum dpsw_acl_action, cfg->result.action);\
29198 +       MC_CMD_OP(cmd, 6, 0,  64, uint64_t, cfg->key_iova); \
29199 +} while (0)
29200 +
29201 +/*                cmd, param, offset, width, type, arg_name */
29202 +#define DPSW_CMD_ACL_ADD_IF(cmd, acl_id, cfg) \
29203 +do { \
29204 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, acl_id);\
29205 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs); \
29206 +} while (0)
29207 +
29208 +/*                cmd, param, offset, width, type, arg_name */
29209 +#define DPSW_CMD_ACL_REMOVE_IF(cmd, acl_id, cfg) \
29210 +do { \
29211 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, acl_id);\
29212 +       MC_CMD_OP(cmd, 0, 16, 16, uint16_t, cfg->num_ifs); \
29213 +} while (0)
29214 +
29215 +/*                cmd, param, offset, width, type, arg_name */
29216 +#define DPSW_CMD_ACL_GET_ATTR(cmd, acl_id) \
29217 +       MC_CMD_OP(cmd, 0, 0,  16, uint16_t, acl_id)
29218 +
29219 +/*                cmd, param, offset, width, type, arg_name */
29220 +#define DPSW_RSP_ACL_GET_ATTR(cmd, attr) \
29221 +do { \
29222 +       MC_RSP_OP(cmd, 1, 0,  16, uint16_t, attr->max_entries);\
29223 +       MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->num_entries);\
29224 +       MC_RSP_OP(cmd, 1, 32, 16, uint16_t, attr->num_ifs);\
29225 +} while (0)
29226 +
29227 +/*                cmd, param, offset, width, type, arg_name */
29228 +#define DPSW_RSP_CTRL_IF_GET_ATTR(cmd, attr) \
29229 +do { \
29230 +       MC_RSP_OP(cmd, 1, 0,  32, uint32_t, attr->rx_fqid);\
29231 +       MC_RSP_OP(cmd, 1, 32, 32, uint32_t, attr->rx_err_fqid);\
29232 +       MC_RSP_OP(cmd, 2, 0,  32, uint32_t, attr->tx_err_conf_fqid);\
29233 +} while (0)
29234 +
29235 +/*                cmd, param, offset, width, type, arg_name */
29236 +#define DPSW_CMD_CTRL_IF_SET_POOLS(cmd, cfg) \
29237 +do { \
29238 +       MC_CMD_OP(cmd, 0, 0,  8,  uint8_t,  cfg->num_dpbp); \
29239 +       MC_CMD_OP(cmd, 0, 8,  1,  int,      cfg->pools[0].backup_pool); \
29240 +       MC_CMD_OP(cmd, 0, 9,  1,  int,      cfg->pools[1].backup_pool); \
29241 +       MC_CMD_OP(cmd, 0, 10, 1,  int,      cfg->pools[2].backup_pool); \
29242 +       MC_CMD_OP(cmd, 0, 11, 1,  int,      cfg->pools[3].backup_pool); \
29243 +       MC_CMD_OP(cmd, 0, 12, 1,  int,      cfg->pools[4].backup_pool); \
29244 +       MC_CMD_OP(cmd, 0, 13, 1,  int,      cfg->pools[5].backup_pool); \
29245 +       MC_CMD_OP(cmd, 0, 14, 1,  int,      cfg->pools[6].backup_pool); \
29246 +       MC_CMD_OP(cmd, 0, 15, 1,  int,      cfg->pools[7].backup_pool); \
29247 +       MC_CMD_OP(cmd, 0, 32, 32, int,      cfg->pools[0].dpbp_id); \
29248 +       MC_CMD_OP(cmd, 4, 32, 16, uint16_t, cfg->pools[0].buffer_size);\
29249 +       MC_CMD_OP(cmd, 1, 0,  32, int,      cfg->pools[1].dpbp_id); \
29250 +       MC_CMD_OP(cmd, 4, 48, 16, uint16_t, cfg->pools[1].buffer_size);\
29251 +       MC_CMD_OP(cmd, 1, 32, 32, int,      cfg->pools[2].dpbp_id); \
29252 +       MC_CMD_OP(cmd, 5, 0,  16, uint16_t, cfg->pools[2].buffer_size);\
29253 +       MC_CMD_OP(cmd, 2, 0,  32, int,      cfg->pools[3].dpbp_id); \
29254 +       MC_CMD_OP(cmd, 5, 16, 16, uint16_t, cfg->pools[3].buffer_size);\
29255 +       MC_CMD_OP(cmd, 2, 32, 32, int,      cfg->pools[4].dpbp_id); \
29256 +       MC_CMD_OP(cmd, 5, 32, 16, uint16_t, cfg->pools[4].buffer_size);\
29257 +       MC_CMD_OP(cmd, 3, 0,  32, int,      cfg->pools[5].dpbp_id); \
29258 +       MC_CMD_OP(cmd, 5, 48, 16, uint16_t, cfg->pools[5].buffer_size);\
29259 +       MC_CMD_OP(cmd, 3, 32, 32, int,      cfg->pools[6].dpbp_id); \
29260 +       MC_CMD_OP(cmd, 6, 0,  16, uint16_t, cfg->pools[6].buffer_size);\
29261 +       MC_CMD_OP(cmd, 4, 0,  32, int,      cfg->pools[7].dpbp_id); \
29262 +       MC_CMD_OP(cmd, 6, 16, 16, uint16_t, cfg->pools[7].buffer_size);\
29263 +} while (0)
29264 +
29265 +#endif /* __FSL_DPSW_CMD_H */
29266 diff --git a/drivers/net/dpaa2/mc/fsl_mc_cmd.h b/drivers/net/dpaa2/mc/fsl_mc_cmd.h
29267 new file mode 100644
29268 index 0000000..ca4fb64
29269 --- /dev/null
29270 +++ b/drivers/net/dpaa2/mc/fsl_mc_cmd.h
29271 @@ -0,0 +1,221 @@
29272 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
29273 + *
29274 + * Redistribution and use in source and binary forms, with or without
29275 + * modification, are permitted provided that the following conditions are met:
29276 + * * Redistributions of source code must retain the above copyright
29277 + * notice, this list of conditions and the following disclaimer.
29278 + * * Redistributions in binary form must reproduce the above copyright
29279 + * notice, this list of conditions and the following disclaimer in the
29280 + * documentation and/or other materials provided with the distribution.
29281 + * * Neither the name of the above-listed copyright holders nor the
29282 + * names of any contributors may be used to endorse or promote products
29283 + * derived from this software without specific prior written permission.
29284 + *
29285 + *
29286 + * ALTERNATIVELY, this software may be distributed under the terms of the
29287 + * GNU General Public License ("GPL") as published by the Free Software
29288 + * Foundation, either version 2 of that License or (at your option) any
29289 + * later version.
29290 + *
29291 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29292 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29293 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29294 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
29295 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29296 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29297 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29298 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29299 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29300 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29301 + * POSSIBILITY OF SUCH DAMAGE.
29302 + */
29303 +#ifndef __FSL_MC_CMD_H
29304 +#define __FSL_MC_CMD_H
29305 +
29306 +#define MC_CMD_NUM_OF_PARAMS   7
29307 +
29308 +#define MAKE_UMASK64(_width) \
29309 +       ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 :\
29310 +                      (uint64_t)-1))
29311 +static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)
29312 +{
29313 +       return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
29314 +}
29315 +
29316 +static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)
29317 +{
29318 +       return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
29319 +}
29320 +
29321 +struct mc_command {
29322 +       uint64_t header;
29323 +       uint64_t params[MC_CMD_NUM_OF_PARAMS];
29324 +};
29325 +
29326 +/**
29327 + * enum mc_cmd_status - indicates MC status at command response
29328 + * @MC_CMD_STATUS_OK: Completed successfully
29329 + * @MC_CMD_STATUS_READY: Ready to be processed
29330 + * @MC_CMD_STATUS_AUTH_ERR: Authentication error
29331 + * @MC_CMD_STATUS_NO_PRIVILEGE: No privilege
29332 + * @MC_CMD_STATUS_DMA_ERR: DMA or I/O error
29333 + * @MC_CMD_STATUS_CONFIG_ERR: Configuration error
29334 + * @MC_CMD_STATUS_TIMEOUT: Operation timed out
29335 + * @MC_CMD_STATUS_NO_RESOURCE: No resources
29336 + * @MC_CMD_STATUS_NO_MEMORY: No memory available
29337 + * @MC_CMD_STATUS_BUSY: Device is busy
29338 + * @MC_CMD_STATUS_UNSUPPORTED_OP: Unsupported operation
29339 + * @MC_CMD_STATUS_INVALID_STATE: Invalid state
29340 + */
29341 +enum mc_cmd_status {
29342 +       MC_CMD_STATUS_OK = 0x0,
29343 +       MC_CMD_STATUS_READY = 0x1,
29344 +       MC_CMD_STATUS_AUTH_ERR = 0x3,
29345 +       MC_CMD_STATUS_NO_PRIVILEGE = 0x4,
29346 +       MC_CMD_STATUS_DMA_ERR = 0x5,
29347 +       MC_CMD_STATUS_CONFIG_ERR = 0x6,
29348 +       MC_CMD_STATUS_TIMEOUT = 0x7,
29349 +       MC_CMD_STATUS_NO_RESOURCE = 0x8,
29350 +       MC_CMD_STATUS_NO_MEMORY = 0x9,
29351 +       MC_CMD_STATUS_BUSY = 0xA,
29352 +       MC_CMD_STATUS_UNSUPPORTED_OP = 0xB,
29353 +       MC_CMD_STATUS_INVALID_STATE = 0xC
29354 +};
29355 +
29356 +/*  MC command flags */
29357 +
29358 +/**
29359 + * High priority flag
29360 + */
29361 +#define MC_CMD_FLAG_PRI                0x00008000
29362 +/**
29363 + * Command completion flag
29364 + */
29365 +#define MC_CMD_FLAG_INTR_DIS   0x01000000
29366 +
29367 +/**
29368 + * Command ID field offset
29369 + */
29370 +#define MC_CMD_HDR_CMDID_O     52
29371 +/**
29372 + * Command ID field size
29373 + */
29374 +#define MC_CMD_HDR_CMDID_S     12
29375 +/**
29376 + * Token field offset
29377 + */
29378 +#define MC_CMD_HDR_TOKEN_O     38
29379 +/**
29380 + * Token field size
29381 + */
29382 +#define MC_CMD_HDR_TOKEN_S     10
29383 +/**
29384 + * Status field offset
29385 + */
29386 +#define MC_CMD_HDR_STATUS_O    16
29387 +/**
29388 + * Status field size
29389 + */
29390 +#define MC_CMD_HDR_STATUS_S    8
29391 +/**
29392 + * Flags field offset
29393 + */
29394 +#define MC_CMD_HDR_FLAGS_O     0
29395 +/**
29396 + * Flags field size
29397 + */
29398 +#define MC_CMD_HDR_FLAGS_S     32
29399 +/**
29400 + *  Command flags mask
29401 + */
29402 +#define MC_CMD_HDR_FLAGS_MASK  0xFF00FF00
29403 +
29404 +#define MC_CMD_HDR_READ_STATUS(_hdr) \
29405 +       ((enum mc_cmd_status)mc_dec((_hdr), \
29406 +               MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
29407 +
29408 +#define MC_CMD_HDR_READ_TOKEN(_hdr) \
29409 +       ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S))
29410 +
29411 +#define MC_PREP_OP(_ext, _param, _offset, _width, _type, _arg) \
29412 +       ((_ext)[_param] |= cpu_to_le64(mc_enc((_offset), (_width), _arg)))
29413 +
29414 +#define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \
29415 +       (_arg = (_type)mc_dec(cpu_to_le64(_ext[_param]), (_offset), (_width)))
29416 +
29417 +#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
29418 +       ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg))
29419 +
29420 +#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
29421 +       (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width)))
29422 +
29423 +static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
29424 +                                           uint32_t cmd_flags,
29425 +                                           uint16_t token)
29426 +{
29427 +       uint64_t hdr;
29428 +
29429 +       hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
29430 +       hdr |= mc_enc(MC_CMD_HDR_FLAGS_O, MC_CMD_HDR_FLAGS_S,
29431 +                      (cmd_flags & MC_CMD_HDR_FLAGS_MASK));
29432 +       hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token);
29433 +       hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
29434 +                      MC_CMD_STATUS_READY);
29435 +
29436 +       return hdr;
29437 +}
29438 +
29439 +/**
29440 + * mc_write_command - writes a command to a Management Complex (MC) portal
29441 + *
29442 + * @portal: pointer to an MC portal
29443 + * @cmd: pointer to a filled command
29444 + */
29445 +static inline void mc_write_command(struct mc_command __iomem *portal,
29446 +                                   struct mc_command *cmd)
29447 +{
29448 +       int i;
29449 +       uint32_t word;
29450 +
29451 +       /* copy command parameters into the portal */
29452 +       for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
29453 +               iowrite64(cmd->params[i], &portal->params[i]);
29454 +
29455 +       /* submit the command by writing the header */
29456 +       word = (uint32_t)mc_dec(cmd->header, 32, 32);
29457 +       iowrite32(word, (((uint32_t *)&portal->header) + 1));
29458 +
29459 +       word = (uint32_t)mc_dec(cmd->header, 0, 32);
29460 +       iowrite32(word, (uint32_t *)&portal->header);
29461 +}
29462 +
29463 +/**
29464 + * mc_read_response - reads the response for the last MC command from a
29465 + * Management Complex (MC) portal
29466 + *
29467 + * @portal: pointer to an MC portal
29468 + * @resp: pointer to command response buffer
29469 + *
29470 + * Returns MC_CMD_STATUS_OK on Success; Error code otherwise.
29471 + */
29472 +static inline enum mc_cmd_status mc_read_response(
29473 +                                       struct mc_command __iomem *portal,
29474 +                                       struct mc_command *resp)
29475 +{
29476 +       int i;
29477 +       enum mc_cmd_status status;
29478 +
29479 +       /* Copy command response header from MC portal: */
29480 +       resp->header = ioread64(&portal->header);
29481 +       status = MC_CMD_HDR_READ_STATUS(resp->header);
29482 +       if (status != MC_CMD_STATUS_OK)
29483 +               return status;
29484 +
29485 +       /* Copy command response data from MC portal: */
29486 +       for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
29487 +               resp->params[i] = ioread64(&portal->params[i]);
29488 +
29489 +       return status;
29490 +}
29491 +
29492 +#endif /* __FSL_MC_CMD_H */
29493 diff --git a/drivers/net/dpaa2/mc/fsl_mc_sys.h b/drivers/net/dpaa2/mc/fsl_mc_sys.h
29494 new file mode 100644
29495 index 0000000..b9f4244
29496 --- /dev/null
29497 +++ b/drivers/net/dpaa2/mc/fsl_mc_sys.h
29498 @@ -0,0 +1,98 @@
29499 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
29500 + *
29501 + * Redistribution and use in source and binary forms, with or without
29502 + * modification, are permitted provided that the following conditions are met:
29503 + * * Redistributions of source code must retain the above copyright
29504 + * notice, this list of conditions and the following disclaimer.
29505 + * * Redistributions in binary form must reproduce the above copyright
29506 + * notice, this list of conditions and the following disclaimer in the
29507 + * documentation and/or other materials provided with the distribution.
29508 + * * Neither the name of the above-listed copyright holders nor the
29509 + * names of any contributors may be used to endorse or promote products
29510 + * derived from this software without specific prior written permission.
29511 + *
29512 + *
29513 + * ALTERNATIVELY, this software may be distributed under the terms of the
29514 + * GNU General Public License ("GPL") as published by the Free Software
29515 + * Foundation, either version 2 of that License or (at your option) any
29516 + * later version.
29517 + *
29518 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29519 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29520 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29521 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
29522 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29523 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29524 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29525 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29526 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29527 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29528 + * POSSIBILITY OF SUCH DAMAGE.
29529 + */
29530 +#ifndef _FSL_MC_SYS_H
29531 +#define _FSL_MC_SYS_H
29532 +
29533 +#ifdef __linux_driver__
29534 +
29535 +#include <linux/errno.h>
29536 +#include <asm/io.h>
29537 +#include <linux/slab.h>
29538 +
29539 +struct fsl_mc_io {
29540 +       void *regs;
29541 +};
29542 +
29543 +#ifndef ENOTSUP
29544 +#define ENOTSUP                95
29545 +#endif
29546 +
29547 +#define ioread64(_p)       readq(_p)
29548 +#define iowrite64(_v, _p)   writeq(_v, _p)
29549 +
29550 +#else /* __linux_driver__ */
29551 +
29552 +#include <stdio.h>
29553 +#include <libio.h>
29554 +#include <stdint.h>
29555 +#include <errno.h>
29556 +#include <sys/uio.h>
29557 +#include <linux/byteorder/little_endian.h>
29558 +
29559 +#define cpu_to_le64(x) __cpu_to_le64(x)
29560 +#ifndef dmb
29561 +#define dmb()          do {\
29562 +        __asm__ __volatile__ ("" : : : "memory");\
29563 +} while (0)
29564 +
29565 +#endif
29566 +#define __iormb()       dmb()
29567 +#define __iowmb()       dmb()
29568 +#define __arch_getq(a)                  (*(volatile unsigned long *)(a))
29569 +#define __arch_putq(v, a)                (*(volatile unsigned long *)(a) = (v))
29570 +#define __arch_putq32(v, a)                (*(volatile unsigned int *)(a) = (v))
29571 +#define readq(c)        ({ uint64_t __v = __arch_getq(c); __iormb(); __v; })
29572 +#define writeq(v, c)     ({ uint64_t __v = v; __iowmb(); __arch_putq(__v, c); __v; })
29573 +#define writeq32(v, c) ({ uint32_t __v = v; __iowmb(); __arch_putq32(__v, c); __v; })
29574 +#define ioread64(_p)       readq(_p)
29575 +#define iowrite64(_v, _p)   writeq(_v, _p)
29576 +#define iowrite32(_v, _p)   writeq32(_v, _p)
29577 +#define __iomem
29578 +
29579 +struct fsl_mc_io {
29580 +       void *regs;
29581 +};
29582 +
29583 +#ifndef ENOTSUP
29584 +#define ENOTSUP                95
29585 +#endif
29586 +
29587 +/*GPP is supposed to use MC commands with low priority*/
29588 +#define CMD_PRI_LOW          0 /*!< Low Priority command indication */
29589 +
29590 +struct mc_command;
29591 +
29592 +int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
29593 +
29594 +#endif /* __linux_driver__ */
29595 +
29596 +#endif /* _FSL_MC_SYS_H */
29597 diff --git a/drivers/net/dpaa2/mc/fsl_net.h b/drivers/net/dpaa2/mc/fsl_net.h
29598 new file mode 100644
29599 index 0000000..43825b8
29600 --- /dev/null
29601 +++ b/drivers/net/dpaa2/mc/fsl_net.h
29602 @@ -0,0 +1,480 @@
29603 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
29604 + *
29605 + * Redistribution and use in source and binary forms, with or without
29606 + * modification, are permitted provided that the following conditions are met:
29607 + * * Redistributions of source code must retain the above copyright
29608 + * notice, this list of conditions and the following disclaimer.
29609 + * * Redistributions in binary form must reproduce the above copyright
29610 + * notice, this list of conditions and the following disclaimer in the
29611 + * documentation and/or other materials provided with the distribution.
29612 + * * Neither the name of the above-listed copyright holders nor the
29613 + * names of any contributors may be used to endorse or promote products
29614 + * derived from this software without specific prior written permission.
29615 + *
29616 + *
29617 + * ALTERNATIVELY, this software may be distributed under the terms of the
29618 + * GNU General Public License ("GPL") as published by the Free Software
29619 + * Foundation, either version 2 of that License or (at your option) any
29620 + * later version.
29621 + *
29622 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29623 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29624 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29625 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
29626 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29627 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29628 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29629 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29630 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29631 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29632 + * POSSIBILITY OF SUCH DAMAGE.
29633 + */
29634 +#ifndef __FSL_NET_H
29635 +#define __FSL_NET_H
29636 +
29637 +#define LAST_HDR_INDEX 0xFFFFFFFF
29638 +
29639 +/*****************************************************************************/
29640 +/*                Protocol fields                                            */
29641 +/*****************************************************************************/
29642 +
29643 +/*************************  Ethernet fields  *********************************/
29644 +#define NH_FLD_ETH_DA                         (1)
29645 +#define NH_FLD_ETH_SA                         (NH_FLD_ETH_DA << 1)
29646 +#define NH_FLD_ETH_LENGTH                     (NH_FLD_ETH_DA << 2)
29647 +#define NH_FLD_ETH_TYPE                       (NH_FLD_ETH_DA << 3)
29648 +#define NH_FLD_ETH_FINAL_CKSUM                (NH_FLD_ETH_DA << 4)
29649 +#define NH_FLD_ETH_PADDING                    (NH_FLD_ETH_DA << 5)
29650 +#define NH_FLD_ETH_ALL_FIELDS                 ((NH_FLD_ETH_DA << 6) - 1)
29651 +
29652 +#define NH_FLD_ETH_ADDR_SIZE                 6
29653 +
29654 +/***************************  VLAN fields  ***********************************/
29655 +#define NH_FLD_VLAN_VPRI                      (1)
29656 +#define NH_FLD_VLAN_CFI                       (NH_FLD_VLAN_VPRI << 1)
29657 +#define NH_FLD_VLAN_VID                       (NH_FLD_VLAN_VPRI << 2)
29658 +#define NH_FLD_VLAN_LENGTH                    (NH_FLD_VLAN_VPRI << 3)
29659 +#define NH_FLD_VLAN_TYPE                      (NH_FLD_VLAN_VPRI << 4)
29660 +#define NH_FLD_VLAN_ALL_FIELDS                ((NH_FLD_VLAN_VPRI << 5) - 1)
29661 +
29662 +#define NH_FLD_VLAN_TCI                       (NH_FLD_VLAN_VPRI | \
29663 +                                              NH_FLD_VLAN_CFI | \
29664 +                                              NH_FLD_VLAN_VID)
29665 +
29666 +/************************  IP (generic) fields  ******************************/
29667 +#define NH_FLD_IP_VER                         (1)
29668 +#define NH_FLD_IP_DSCP                        (NH_FLD_IP_VER << 2)
29669 +#define NH_FLD_IP_ECN                         (NH_FLD_IP_VER << 3)
29670 +#define NH_FLD_IP_PROTO                       (NH_FLD_IP_VER << 4)
29671 +#define NH_FLD_IP_SRC                         (NH_FLD_IP_VER << 5)
29672 +#define NH_FLD_IP_DST                         (NH_FLD_IP_VER << 6)
29673 +#define NH_FLD_IP_TOS_TC                      (NH_FLD_IP_VER << 7)
29674 +#define NH_FLD_IP_ID                          (NH_FLD_IP_VER << 8)
29675 +#define NH_FLD_IP_ALL_FIELDS                  ((NH_FLD_IP_VER << 9) - 1)
29676 +
29677 +#define NH_FLD_IP_PROTO_SIZE                  1
29678 +
29679 +/*****************************  IPV4 fields  *********************************/
29680 +#define NH_FLD_IPV4_VER                       (1)
29681 +#define NH_FLD_IPV4_HDR_LEN                   (NH_FLD_IPV4_VER << 1)
29682 +#define NH_FLD_IPV4_TOS                       (NH_FLD_IPV4_VER << 2)
29683 +#define NH_FLD_IPV4_TOTAL_LEN                 (NH_FLD_IPV4_VER << 3)
29684 +#define NH_FLD_IPV4_ID                        (NH_FLD_IPV4_VER << 4)
29685 +#define NH_FLD_IPV4_FLAG_D                    (NH_FLD_IPV4_VER << 5)
29686 +#define NH_FLD_IPV4_FLAG_M                    (NH_FLD_IPV4_VER << 6)
29687 +#define NH_FLD_IPV4_OFFSET                    (NH_FLD_IPV4_VER << 7)
29688 +#define NH_FLD_IPV4_TTL                       (NH_FLD_IPV4_VER << 8)
29689 +#define NH_FLD_IPV4_PROTO                     (NH_FLD_IPV4_VER << 9)
29690 +#define NH_FLD_IPV4_CKSUM                     (NH_FLD_IPV4_VER << 10)
29691 +#define NH_FLD_IPV4_SRC_IP                    (NH_FLD_IPV4_VER << 11)
29692 +#define NH_FLD_IPV4_DST_IP                    (NH_FLD_IPV4_VER << 12)
29693 +#define NH_FLD_IPV4_OPTS                      (NH_FLD_IPV4_VER << 13)
29694 +#define NH_FLD_IPV4_OPTS_COUNT                (NH_FLD_IPV4_VER << 14)
29695 +#define NH_FLD_IPV4_ALL_FIELDS                ((NH_FLD_IPV4_VER << 15) - 1)
29696 +
29697 +#define NH_FLD_IPV4_ADDR_SIZE                 4
29698 +#define NH_FLD_IPV4_PROTO_SIZE                1
29699 +
29700 +/*****************************  IPV6 fields  *********************************/
29701 +#define NH_FLD_IPV6_VER                       (1)
29702 +#define NH_FLD_IPV6_TC                        (NH_FLD_IPV6_VER << 1)
29703 +#define NH_FLD_IPV6_SRC_IP                    (NH_FLD_IPV6_VER << 2)
29704 +#define NH_FLD_IPV6_DST_IP                    (NH_FLD_IPV6_VER << 3)
29705 +#define NH_FLD_IPV6_NEXT_HDR                  (NH_FLD_IPV6_VER << 4)
29706 +#define NH_FLD_IPV6_FL                        (NH_FLD_IPV6_VER << 5)
29707 +#define NH_FLD_IPV6_HOP_LIMIT                 (NH_FLD_IPV6_VER << 6)
29708 +#define NH_FLD_IPV6_ID                       (NH_FLD_IPV6_VER << 7)
29709 +#define NH_FLD_IPV6_ALL_FIELDS                ((NH_FLD_IPV6_VER << 8) - 1)
29710 +
29711 +#define NH_FLD_IPV6_ADDR_SIZE                 16
29712 +#define NH_FLD_IPV6_NEXT_HDR_SIZE             1
29713 +
29714 +/*****************************  ICMP fields  *********************************/
29715 +#define NH_FLD_ICMP_TYPE                      (1)
29716 +#define NH_FLD_ICMP_CODE                      (NH_FLD_ICMP_TYPE << 1)
29717 +#define NH_FLD_ICMP_CKSUM                     (NH_FLD_ICMP_TYPE << 2)
29718 +#define NH_FLD_ICMP_ID                        (NH_FLD_ICMP_TYPE << 3)
29719 +#define NH_FLD_ICMP_SQ_NUM                    (NH_FLD_ICMP_TYPE << 4)
29720 +#define NH_FLD_ICMP_ALL_FIELDS                ((NH_FLD_ICMP_TYPE << 5) - 1)
29721 +
29722 +#define NH_FLD_ICMP_CODE_SIZE                 1
29723 +#define NH_FLD_ICMP_TYPE_SIZE                 1
29724 +
29725 +/*****************************  IGMP fields  *********************************/
29726 +#define NH_FLD_IGMP_VERSION                   (1)
29727 +#define NH_FLD_IGMP_TYPE                      (NH_FLD_IGMP_VERSION << 1)
29728 +#define NH_FLD_IGMP_CKSUM                     (NH_FLD_IGMP_VERSION << 2)
29729 +#define NH_FLD_IGMP_DATA                      (NH_FLD_IGMP_VERSION << 3)
29730 +#define NH_FLD_IGMP_ALL_FIELDS                ((NH_FLD_IGMP_VERSION << 4) - 1)
29731 +
29732 +/*****************************  TCP fields  **********************************/
29733 +#define NH_FLD_TCP_PORT_SRC                   (1)
29734 +#define NH_FLD_TCP_PORT_DST                   (NH_FLD_TCP_PORT_SRC << 1)
29735 +#define NH_FLD_TCP_SEQ                        (NH_FLD_TCP_PORT_SRC << 2)
29736 +#define NH_FLD_TCP_ACK                        (NH_FLD_TCP_PORT_SRC << 3)
29737 +#define NH_FLD_TCP_OFFSET                     (NH_FLD_TCP_PORT_SRC << 4)
29738 +#define NH_FLD_TCP_FLAGS                      (NH_FLD_TCP_PORT_SRC << 5)
29739 +#define NH_FLD_TCP_WINDOW                     (NH_FLD_TCP_PORT_SRC << 6)
29740 +#define NH_FLD_TCP_CKSUM                      (NH_FLD_TCP_PORT_SRC << 7)
29741 +#define NH_FLD_TCP_URGPTR                     (NH_FLD_TCP_PORT_SRC << 8)
29742 +#define NH_FLD_TCP_OPTS                       (NH_FLD_TCP_PORT_SRC << 9)
29743 +#define NH_FLD_TCP_OPTS_COUNT                 (NH_FLD_TCP_PORT_SRC << 10)
29744 +#define NH_FLD_TCP_ALL_FIELDS                 ((NH_FLD_TCP_PORT_SRC << 11) - 1)
29745 +
29746 +#define NH_FLD_TCP_PORT_SIZE                  2
29747 +
29748 +/*****************************  UDP fields  **********************************/
29749 +#define NH_FLD_UDP_PORT_SRC                   (1)
29750 +#define NH_FLD_UDP_PORT_DST                   (NH_FLD_UDP_PORT_SRC << 1)
29751 +#define NH_FLD_UDP_LEN                        (NH_FLD_UDP_PORT_SRC << 2)
29752 +#define NH_FLD_UDP_CKSUM                      (NH_FLD_UDP_PORT_SRC << 3)
29753 +#define NH_FLD_UDP_ALL_FIELDS                 ((NH_FLD_UDP_PORT_SRC << 4) - 1)
29754 +
29755 +#define NH_FLD_UDP_PORT_SIZE                  2
29756 +
29757 +/***************************  UDP-lite fields  *******************************/
29758 +#define NH_FLD_UDP_LITE_PORT_SRC              (1)
29759 +#define NH_FLD_UDP_LITE_PORT_DST              (NH_FLD_UDP_LITE_PORT_SRC << 1)
29760 +#define NH_FLD_UDP_LITE_ALL_FIELDS \
29761 +       ((NH_FLD_UDP_LITE_PORT_SRC << 2) - 1)
29762 +
29763 +#define NH_FLD_UDP_LITE_PORT_SIZE             2
29764 +
29765 +/***************************  UDP-encap-ESP fields  **************************/
29766 +#define NH_FLD_UDP_ENC_ESP_PORT_SRC         (1)
29767 +#define NH_FLD_UDP_ENC_ESP_PORT_DST         (NH_FLD_UDP_ENC_ESP_PORT_SRC << 1)
29768 +#define NH_FLD_UDP_ENC_ESP_LEN              (NH_FLD_UDP_ENC_ESP_PORT_SRC << 2)
29769 +#define NH_FLD_UDP_ENC_ESP_CKSUM            (NH_FLD_UDP_ENC_ESP_PORT_SRC << 3)
29770 +#define NH_FLD_UDP_ENC_ESP_SPI              (NH_FLD_UDP_ENC_ESP_PORT_SRC << 4)
29771 +#define NH_FLD_UDP_ENC_ESP_SEQUENCE_NUM     (NH_FLD_UDP_ENC_ESP_PORT_SRC << 5)
29772 +#define NH_FLD_UDP_ENC_ESP_ALL_FIELDS \
29773 +       ((NH_FLD_UDP_ENC_ESP_PORT_SRC << 6) - 1)
29774 +
29775 +#define NH_FLD_UDP_ENC_ESP_PORT_SIZE        2
29776 +#define NH_FLD_UDP_ENC_ESP_SPI_SIZE         4
29777 +
29778 +/*****************************  SCTP fields  *********************************/
29779 +#define NH_FLD_SCTP_PORT_SRC                  (1)
29780 +#define NH_FLD_SCTP_PORT_DST                  (NH_FLD_SCTP_PORT_SRC << 1)
29781 +#define NH_FLD_SCTP_VER_TAG                   (NH_FLD_SCTP_PORT_SRC << 2)
29782 +#define NH_FLD_SCTP_CKSUM                     (NH_FLD_SCTP_PORT_SRC << 3)
29783 +#define NH_FLD_SCTP_ALL_FIELDS                ((NH_FLD_SCTP_PORT_SRC << 4) - 1)
29784 +
29785 +#define NH_FLD_SCTP_PORT_SIZE                 2
29786 +
29787 +/*****************************  DCCP fields  *********************************/
29788 +#define NH_FLD_DCCP_PORT_SRC                  (1)
29789 +#define NH_FLD_DCCP_PORT_DST                  (NH_FLD_DCCP_PORT_SRC << 1)
29790 +#define NH_FLD_DCCP_ALL_FIELDS                ((NH_FLD_DCCP_PORT_SRC << 2) - 1)
29791 +
29792 +#define NH_FLD_DCCP_PORT_SIZE                 2
29793 +
29794 +/*****************************  IPHC fields  *********************************/
29795 +#define NH_FLD_IPHC_CID                       (1)
29796 +#define NH_FLD_IPHC_CID_TYPE                  (NH_FLD_IPHC_CID << 1)
29797 +#define NH_FLD_IPHC_HCINDEX                   (NH_FLD_IPHC_CID << 2)
29798 +#define NH_FLD_IPHC_GEN                       (NH_FLD_IPHC_CID << 3)
29799 +#define NH_FLD_IPHC_D_BIT                     (NH_FLD_IPHC_CID << 4)
29800 +#define NH_FLD_IPHC_ALL_FIELDS                ((NH_FLD_IPHC_CID << 5) - 1)
29801 +
29802 +/*****************************  SCTP fields  *********************************/
29803 +#define NH_FLD_SCTP_CHUNK_DATA_TYPE           (1)
29804 +#define NH_FLD_SCTP_CHUNK_DATA_FLAGS          (NH_FLD_SCTP_CHUNK_DATA_TYPE << 1)
29805 +#define NH_FLD_SCTP_CHUNK_DATA_LENGTH         (NH_FLD_SCTP_CHUNK_DATA_TYPE << 2)
29806 +#define NH_FLD_SCTP_CHUNK_DATA_TSN            (NH_FLD_SCTP_CHUNK_DATA_TYPE << 3)
29807 +#define NH_FLD_SCTP_CHUNK_DATA_STREAM_ID      (NH_FLD_SCTP_CHUNK_DATA_TYPE << 4)
29808 +#define NH_FLD_SCTP_CHUNK_DATA_STREAM_SQN     (NH_FLD_SCTP_CHUNK_DATA_TYPE << 5)
29809 +#define NH_FLD_SCTP_CHUNK_DATA_PAYLOAD_PID    (NH_FLD_SCTP_CHUNK_DATA_TYPE << 6)
29810 +#define NH_FLD_SCTP_CHUNK_DATA_UNORDERED      (NH_FLD_SCTP_CHUNK_DATA_TYPE << 7)
29811 +#define NH_FLD_SCTP_CHUNK_DATA_BEGGINING      (NH_FLD_SCTP_CHUNK_DATA_TYPE << 8)
29812 +#define NH_FLD_SCTP_CHUNK_DATA_END            (NH_FLD_SCTP_CHUNK_DATA_TYPE << 9)
29813 +#define NH_FLD_SCTP_CHUNK_DATA_ALL_FIELDS \
29814 +       ((NH_FLD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
29815 +
29816 +/***************************  L2TPV2 fields  *********************************/
29817 +#define NH_FLD_L2TPV2_TYPE_BIT                (1)
29818 +#define NH_FLD_L2TPV2_LENGTH_BIT              (NH_FLD_L2TPV2_TYPE_BIT << 1)
29819 +#define NH_FLD_L2TPV2_SEQUENCE_BIT            (NH_FLD_L2TPV2_TYPE_BIT << 2)
29820 +#define NH_FLD_L2TPV2_OFFSET_BIT              (NH_FLD_L2TPV2_TYPE_BIT << 3)
29821 +#define NH_FLD_L2TPV2_PRIORITY_BIT            (NH_FLD_L2TPV2_TYPE_BIT << 4)
29822 +#define NH_FLD_L2TPV2_VERSION                 (NH_FLD_L2TPV2_TYPE_BIT << 5)
29823 +#define NH_FLD_L2TPV2_LEN                     (NH_FLD_L2TPV2_TYPE_BIT << 6)
29824 +#define NH_FLD_L2TPV2_TUNNEL_ID               (NH_FLD_L2TPV2_TYPE_BIT << 7)
29825 +#define NH_FLD_L2TPV2_SESSION_ID              (NH_FLD_L2TPV2_TYPE_BIT << 8)
29826 +#define NH_FLD_L2TPV2_NS                      (NH_FLD_L2TPV2_TYPE_BIT << 9)
29827 +#define NH_FLD_L2TPV2_NR                      (NH_FLD_L2TPV2_TYPE_BIT << 10)
29828 +#define NH_FLD_L2TPV2_OFFSET_SIZE             (NH_FLD_L2TPV2_TYPE_BIT << 11)
29829 +#define NH_FLD_L2TPV2_FIRST_BYTE              (NH_FLD_L2TPV2_TYPE_BIT << 12)
29830 +#define NH_FLD_L2TPV2_ALL_FIELDS \
29831 +       ((NH_FLD_L2TPV2_TYPE_BIT << 13) - 1)
29832 +
29833 +/***************************  L2TPV3 fields  *********************************/
29834 +#define NH_FLD_L2TPV3_CTRL_TYPE_BIT           (1)
29835 +#define NH_FLD_L2TPV3_CTRL_LENGTH_BIT         (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 1)
29836 +#define NH_FLD_L2TPV3_CTRL_SEQUENCE_BIT       (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 2)
29837 +#define NH_FLD_L2TPV3_CTRL_VERSION            (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 3)
29838 +#define NH_FLD_L2TPV3_CTRL_LENGTH             (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 4)
29839 +#define NH_FLD_L2TPV3_CTRL_CONTROL            (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 5)
29840 +#define NH_FLD_L2TPV3_CTRL_SENT               (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 6)
29841 +#define NH_FLD_L2TPV3_CTRL_RECV               (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 7)
29842 +#define NH_FLD_L2TPV3_CTRL_FIRST_BYTE         (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 8)
29843 +#define NH_FLD_L2TPV3_CTRL_ALL_FIELDS \
29844 +       ((NH_FLD_L2TPV3_CTRL_TYPE_BIT << 9) - 1)
29845 +
29846 +#define NH_FLD_L2TPV3_SESS_TYPE_BIT           (1)
29847 +#define NH_FLD_L2TPV3_SESS_VERSION            (NH_FLD_L2TPV3_SESS_TYPE_BIT << 1)
29848 +#define NH_FLD_L2TPV3_SESS_ID                 (NH_FLD_L2TPV3_SESS_TYPE_BIT << 2)
29849 +#define NH_FLD_L2TPV3_SESS_COOKIE             (NH_FLD_L2TPV3_SESS_TYPE_BIT << 3)
29850 +#define NH_FLD_L2TPV3_SESS_ALL_FIELDS \
29851 +       ((NH_FLD_L2TPV3_SESS_TYPE_BIT << 4) - 1)
29852 +
29853 +/****************************  PPP fields  ***********************************/
29854 +#define NH_FLD_PPP_PID                        (1)
29855 +#define NH_FLD_PPP_COMPRESSED                 (NH_FLD_PPP_PID << 1)
29856 +#define NH_FLD_PPP_ALL_FIELDS                 ((NH_FLD_PPP_PID << 2) - 1)
29857 +
29858 +/**************************  PPPoE fields  ***********************************/
29859 +#define NH_FLD_PPPOE_VER                      (1)
29860 +#define NH_FLD_PPPOE_TYPE                     (NH_FLD_PPPOE_VER << 1)
29861 +#define NH_FLD_PPPOE_CODE                     (NH_FLD_PPPOE_VER << 2)
29862 +#define NH_FLD_PPPOE_SID                      (NH_FLD_PPPOE_VER << 3)
29863 +#define NH_FLD_PPPOE_LEN                      (NH_FLD_PPPOE_VER << 4)
29864 +#define NH_FLD_PPPOE_SESSION                  (NH_FLD_PPPOE_VER << 5)
29865 +#define NH_FLD_PPPOE_PID                      (NH_FLD_PPPOE_VER << 6)
29866 +#define NH_FLD_PPPOE_ALL_FIELDS               ((NH_FLD_PPPOE_VER << 7) - 1)
29867 +
29868 +/*************************  PPP-Mux fields  **********************************/
29869 +#define NH_FLD_PPPMUX_PID                     (1)
29870 +#define NH_FLD_PPPMUX_CKSUM                   (NH_FLD_PPPMUX_PID << 1)
29871 +#define NH_FLD_PPPMUX_COMPRESSED              (NH_FLD_PPPMUX_PID << 2)
29872 +#define NH_FLD_PPPMUX_ALL_FIELDS              ((NH_FLD_PPPMUX_PID << 3) - 1)
29873 +
29874 +/***********************  PPP-Mux sub-frame fields  **************************/
29875 +#define NH_FLD_PPPMUX_SUBFRM_PFF            (1)
29876 +#define NH_FLD_PPPMUX_SUBFRM_LXT            (NH_FLD_PPPMUX_SUBFRM_PFF << 1)
29877 +#define NH_FLD_PPPMUX_SUBFRM_LEN            (NH_FLD_PPPMUX_SUBFRM_PFF << 2)
29878 +#define NH_FLD_PPPMUX_SUBFRM_PID            (NH_FLD_PPPMUX_SUBFRM_PFF << 3)
29879 +#define NH_FLD_PPPMUX_SUBFRM_USE_PID        (NH_FLD_PPPMUX_SUBFRM_PFF << 4)
29880 +#define NH_FLD_PPPMUX_SUBFRM_ALL_FIELDS \
29881 +       ((NH_FLD_PPPMUX_SUBFRM_PFF << 5) - 1)
29882 +
29883 +/***************************  LLC fields  ************************************/
29884 +#define NH_FLD_LLC_DSAP                       (1)
29885 +#define NH_FLD_LLC_SSAP                       (NH_FLD_LLC_DSAP << 1)
29886 +#define NH_FLD_LLC_CTRL                       (NH_FLD_LLC_DSAP << 2)
29887 +#define NH_FLD_LLC_ALL_FIELDS                 ((NH_FLD_LLC_DSAP << 3) - 1)
29888 +
29889 +/***************************  NLPID fields  **********************************/
29890 +#define NH_FLD_NLPID_NLPID                    (1)
29891 +#define NH_FLD_NLPID_ALL_FIELDS               ((NH_FLD_NLPID_NLPID << 1) - 1)
29892 +
29893 +/***************************  SNAP fields  ***********************************/
29894 +#define NH_FLD_SNAP_OUI                       (1)
29895 +#define NH_FLD_SNAP_PID                       (NH_FLD_SNAP_OUI << 1)
29896 +#define NH_FLD_SNAP_ALL_FIELDS                ((NH_FLD_SNAP_OUI << 2) - 1)
29897 +
29898 +/***************************  LLC SNAP fields  *******************************/
29899 +#define NH_FLD_LLC_SNAP_TYPE                  (1)
29900 +#define NH_FLD_LLC_SNAP_ALL_FIELDS            ((NH_FLD_LLC_SNAP_TYPE << 1) - 1)
29901 +
29902 +#define NH_FLD_ARP_HTYPE                      (1)
29903 +#define NH_FLD_ARP_PTYPE                      (NH_FLD_ARP_HTYPE << 1)
29904 +#define NH_FLD_ARP_HLEN                       (NH_FLD_ARP_HTYPE << 2)
29905 +#define NH_FLD_ARP_PLEN                       (NH_FLD_ARP_HTYPE << 3)
29906 +#define NH_FLD_ARP_OPER                       (NH_FLD_ARP_HTYPE << 4)
29907 +#define NH_FLD_ARP_SHA                        (NH_FLD_ARP_HTYPE << 5)
29908 +#define NH_FLD_ARP_SPA                        (NH_FLD_ARP_HTYPE << 6)
29909 +#define NH_FLD_ARP_THA                        (NH_FLD_ARP_HTYPE << 7)
29910 +#define NH_FLD_ARP_TPA                        (NH_FLD_ARP_HTYPE << 8)
29911 +#define NH_FLD_ARP_ALL_FIELDS                 ((NH_FLD_ARP_HTYPE << 9) - 1)
29912 +
29913 +/***************************  RFC2684 fields  ********************************/
29914 +#define NH_FLD_RFC2684_LLC                    (1)
29915 +#define NH_FLD_RFC2684_NLPID                  (NH_FLD_RFC2684_LLC << 1)
29916 +#define NH_FLD_RFC2684_OUI                    (NH_FLD_RFC2684_LLC << 2)
29917 +#define NH_FLD_RFC2684_PID                    (NH_FLD_RFC2684_LLC << 3)
29918 +#define NH_FLD_RFC2684_VPN_OUI                (NH_FLD_RFC2684_LLC << 4)
29919 +#define NH_FLD_RFC2684_VPN_IDX                (NH_FLD_RFC2684_LLC << 5)
29920 +#define NH_FLD_RFC2684_ALL_FIELDS             ((NH_FLD_RFC2684_LLC << 6) - 1)
29921 +
29922 +/***************************  User defined fields  ***************************/
29923 +#define NH_FLD_USER_DEFINED_SRCPORT           (1)
29924 +#define NH_FLD_USER_DEFINED_PCDID             (NH_FLD_USER_DEFINED_SRCPORT << 1)
29925 +#define NH_FLD_USER_DEFINED_ALL_FIELDS \
29926 +       ((NH_FLD_USER_DEFINED_SRCPORT << 2) - 1)
29927 +
29928 +/***************************  Payload fields  ********************************/
29929 +#define NH_FLD_PAYLOAD_BUFFER                 (1)
29930 +#define NH_FLD_PAYLOAD_SIZE                   (NH_FLD_PAYLOAD_BUFFER << 1)
29931 +#define NH_FLD_MAX_FRM_SIZE                   (NH_FLD_PAYLOAD_BUFFER << 2)
29932 +#define NH_FLD_MIN_FRM_SIZE                   (NH_FLD_PAYLOAD_BUFFER << 3)
29933 +#define NH_FLD_PAYLOAD_TYPE                   (NH_FLD_PAYLOAD_BUFFER << 4)
29934 +#define NH_FLD_FRAME_SIZE                     (NH_FLD_PAYLOAD_BUFFER << 5)
29935 +#define NH_FLD_PAYLOAD_ALL_FIELDS             ((NH_FLD_PAYLOAD_BUFFER << 6) - 1)
29936 +
29937 +/***************************  GRE fields  ************************************/
29938 +#define NH_FLD_GRE_TYPE                       (1)
29939 +#define NH_FLD_GRE_ALL_FIELDS                 ((NH_FLD_GRE_TYPE << 1) - 1)
29940 +
29941 +/***************************  MINENCAP fields  *******************************/
29942 +#define NH_FLD_MINENCAP_SRC_IP                (1)
29943 +#define NH_FLD_MINENCAP_DST_IP                (NH_FLD_MINENCAP_SRC_IP << 1)
29944 +#define NH_FLD_MINENCAP_TYPE                  (NH_FLD_MINENCAP_SRC_IP << 2)
29945 +#define NH_FLD_MINENCAP_ALL_FIELDS \
29946 +       ((NH_FLD_MINENCAP_SRC_IP << 3) - 1)
29947 +
29948 +/***************************  IPSEC AH fields  *******************************/
29949 +#define NH_FLD_IPSEC_AH_SPI                   (1)
29950 +#define NH_FLD_IPSEC_AH_NH                    (NH_FLD_IPSEC_AH_SPI << 1)
29951 +#define NH_FLD_IPSEC_AH_ALL_FIELDS            ((NH_FLD_IPSEC_AH_SPI << 2) - 1)
29952 +
29953 +/***************************  IPSEC ESP fields  ******************************/
29954 +#define NH_FLD_IPSEC_ESP_SPI                  (1)
29955 +#define NH_FLD_IPSEC_ESP_SEQUENCE_NUM         (NH_FLD_IPSEC_ESP_SPI << 1)
29956 +#define NH_FLD_IPSEC_ESP_ALL_FIELDS           ((NH_FLD_IPSEC_ESP_SPI << 2) - 1)
29957 +
29958 +#define NH_FLD_IPSEC_ESP_SPI_SIZE             4
29959 +
29960 +/***************************  MPLS fields  ***********************************/
29961 +#define NH_FLD_MPLS_LABEL_STACK               (1)
29962 +#define NH_FLD_MPLS_LABEL_STACK_ALL_FIELDS \
29963 +       ((NH_FLD_MPLS_LABEL_STACK << 1) - 1)
29964 +
29965 +/***************************  MACSEC fields  *********************************/
29966 +#define NH_FLD_MACSEC_SECTAG                  (1)
29967 +#define NH_FLD_MACSEC_ALL_FIELDS              ((NH_FLD_MACSEC_SECTAG << 1) - 1)
29968 +
29969 +/***************************  GTP fields  ************************************/
29970 +#define NH_FLD_GTP_TEID                       (1)
29971 +
29972 +/* Protocol options */
29973 +
29974 +/* Ethernet options */
29975 +#define        NH_OPT_ETH_BROADCAST                    1
29976 +#define        NH_OPT_ETH_MULTICAST                    2
29977 +#define        NH_OPT_ETH_UNICAST                      3
29978 +#define        NH_OPT_ETH_BPDU                         4
29979 +
29980 +#define NH_ETH_IS_MULTICAST_ADDR(addr) (addr[0] & 0x01)
29981 +/* also applicable for broadcast */
29982 +
29983 +/* VLAN options */
29984 +#define        NH_OPT_VLAN_CFI                         1
29985 +
29986 +/* IPV4 options */
29987 +#define        NH_OPT_IPV4_UNICAST                     1
29988 +#define        NH_OPT_IPV4_MULTICAST                   2
29989 +#define        NH_OPT_IPV4_BROADCAST                   3
29990 +#define        NH_OPT_IPV4_OPTION                      4
29991 +#define        NH_OPT_IPV4_FRAG                        5
29992 +#define        NH_OPT_IPV4_INITIAL_FRAG                6
29993 +
29994 +/* IPV6 options */
29995 +#define        NH_OPT_IPV6_UNICAST                     1
29996 +#define        NH_OPT_IPV6_MULTICAST                   2
29997 +#define        NH_OPT_IPV6_OPTION                      3
29998 +#define        NH_OPT_IPV6_FRAG                        4
29999 +#define        NH_OPT_IPV6_INITIAL_FRAG                5
30000 +
30001 +/* General IP options (may be used for any version) */
30002 +#define        NH_OPT_IP_FRAG                          1
30003 +#define        NH_OPT_IP_INITIAL_FRAG                  2
30004 +#define        NH_OPT_IP_OPTION                        3
30005 +
30006 +/* Minenc. options */
30007 +#define        NH_OPT_MINENCAP_SRC_ADDR_PRESENT        1
30008 +
30009 +/* GRE. options */
30010 +#define        NH_OPT_GRE_ROUTING_PRESENT              1
30011 +
30012 +/* TCP options */
30013 +#define        NH_OPT_TCP_OPTIONS                      1
30014 +#define        NH_OPT_TCP_CONTROL_HIGH_BITS            2
30015 +#define        NH_OPT_TCP_CONTROL_LOW_BITS             3
30016 +
30017 +/* CAPWAP options */
30018 +#define        NH_OPT_CAPWAP_DTLS                      1
30019 +
30020 +enum net_prot {
30021 +       NET_PROT_NONE = 0,
30022 +       NET_PROT_PAYLOAD,
30023 +       NET_PROT_ETH,
30024 +       NET_PROT_VLAN,
30025 +       NET_PROT_IPV4,
30026 +       NET_PROT_IPV6,
30027 +       NET_PROT_IP,
30028 +       NET_PROT_TCP,
30029 +       NET_PROT_UDP,
30030 +       NET_PROT_UDP_LITE,
30031 +       NET_PROT_IPHC,
30032 +       NET_PROT_SCTP,
30033 +       NET_PROT_SCTP_CHUNK_DATA,
30034 +       NET_PROT_PPPOE,
30035 +       NET_PROT_PPP,
30036 +       NET_PROT_PPPMUX,
30037 +       NET_PROT_PPPMUX_SUBFRM,
30038 +       NET_PROT_L2TPV2,
30039 +       NET_PROT_L2TPV3_CTRL,
30040 +       NET_PROT_L2TPV3_SESS,
30041 +       NET_PROT_LLC,
30042 +       NET_PROT_LLC_SNAP,
30043 +       NET_PROT_NLPID,
30044 +       NET_PROT_SNAP,
30045 +       NET_PROT_MPLS,
30046 +       NET_PROT_IPSEC_AH,
30047 +       NET_PROT_IPSEC_ESP,
30048 +       NET_PROT_UDP_ENC_ESP, /* RFC 3948 */
30049 +       NET_PROT_MACSEC,
30050 +       NET_PROT_GRE,
30051 +       NET_PROT_MINENCAP,
30052 +       NET_PROT_DCCP,
30053 +       NET_PROT_ICMP,
30054 +       NET_PROT_IGMP,
30055 +       NET_PROT_ARP,
30056 +       NET_PROT_CAPWAP_DATA,
30057 +       NET_PROT_CAPWAP_CTRL,
30058 +       NET_PROT_RFC2684,
30059 +       NET_PROT_ICMPV6,
30060 +       NET_PROT_FCOE,
30061 +       NET_PROT_FIP,
30062 +       NET_PROT_ISCSI,
30063 +       NET_PROT_GTP,
30064 +       NET_PROT_USER_DEFINED_L2,
30065 +       NET_PROT_USER_DEFINED_L3,
30066 +       NET_PROT_USER_DEFINED_L4,
30067 +       NET_PROT_USER_DEFINED_L5,
30068 +       NET_PROT_USER_DEFINED_SHIM1,
30069 +       NET_PROT_USER_DEFINED_SHIM2,
30070 +
30071 +       NET_PROT_DUMMY_LAST
30072 +};
30073 +
30074 +/*! IEEE8021.Q */
30075 +#define NH_IEEE8021Q_ETYPE  0x8100
30076 +#define NH_IEEE8021Q_HDR(etype, pcp, dei, vlan_id)      \
30077 +           ((((uint32_t)(etype & 0xFFFF)) << 16) |       \
30078 +           (((uint32_t)(pcp & 0x07)) << 13) |          \
30079 +           (((uint32_t)(dei & 0x01)) << 12) |          \
30080 +           (((uint32_t)(vlan_id & 0xFFF))))
30081 +
30082 +#endif /* __FSL_NET_H */
30083 diff --git a/drivers/net/dpaa2/mc/mc_sys.c b/drivers/net/dpaa2/mc/mc_sys.c
30084 new file mode 100644
30085 index 0000000..fcbed28
30086 --- /dev/null
30087 +++ b/drivers/net/dpaa2/mc/mc_sys.c
30088 @@ -0,0 +1,127 @@
30089 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
30090 + *
30091 + * Redistribution and use in source and binary forms, with or without
30092 + * modification, are permitted provided that the following conditions are met:
30093 + * * Redistributions of source code must retain the above copyright
30094 + * notice, this list of conditions and the following disclaimer.
30095 + * * Redistributions in binary form must reproduce the above copyright
30096 + * notice, this list of conditions and the following disclaimer in the
30097 + * documentation and/or other materials provided with the distribution.
30098 + * * Neither the name of the above-listed copyright holders nor the
30099 + * names of any contributors may be used to endorse or promote products
30100 + * derived from this software without specific prior written permission.
30101 + *
30102 + *
30103 + * ALTERNATIVELY, this software may be distributed under the terms of the
30104 + * GNU General Public License ("GPL") as published by the Free Software
30105 + * Foundation, either version 2 of that License or (at your option) any
30106 + * later version.
30107 + *
30108 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30109 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30110 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30111 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
30112 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30113 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30114 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30115 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30116 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30117 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30118 + * POSSIBILITY OF SUCH DAMAGE.
30119 + */
30120 +#include <fsl_mc_sys.h>
30121 +#include <fsl_mc_cmd.h>
30122 +
30123 +/* ODP framework using MC poratl in shared mode. Following
30124 +   changes to introduce Locks must be maintained while
30125 +   merging the FLIB.
30126 +*/
30127 +
30128 +/**
30129 +* The mc_spinlock_t type.
30130 +*/
30131 +typedef struct {
30132 +       volatile int locked; /**< lock status 0 = unlocked, 1 = locked */
30133 +} mc_spinlock_t;
30134 +
30135 +/**
30136 +* A static spinlock initializer.
30137 +*/
30138 +static mc_spinlock_t mc_portal_lock = { 0 };
30139 +
30140 +static inline void mc_pause(void) {}
30141 +
30142 +static inline void mc_spinlock_lock(mc_spinlock_t *sl)
30143 +{
30144 +       while (__sync_lock_test_and_set(&sl->locked, 1))
30145 +               while (sl->locked)
30146 +                       mc_pause();
30147 +}
30148 +
30149 +static inline void mc_spinlock_unlock(mc_spinlock_t *sl)
30150 +{
30151 +       __sync_lock_release(&sl->locked);
30152 +}
30153 +
30154 +static int mc_status_to_error(enum mc_cmd_status status)
30155 +{
30156 +       switch (status) {
30157 +       case MC_CMD_STATUS_OK:
30158 +               return 0;
30159 +       case MC_CMD_STATUS_AUTH_ERR:
30160 +               return -EACCES; /* Token error */
30161 +       case MC_CMD_STATUS_NO_PRIVILEGE:
30162 +               return -EPERM; /* Permission denied */
30163 +       case MC_CMD_STATUS_DMA_ERR:
30164 +               return -EIO; /* Input/Output error */
30165 +       case MC_CMD_STATUS_CONFIG_ERR:
30166 +               return -EINVAL; /* Device not configured */
30167 +       case MC_CMD_STATUS_TIMEOUT:
30168 +               return -ETIMEDOUT; /* Operation timed out */
30169 +       case MC_CMD_STATUS_NO_RESOURCE:
30170 +               return -ENAVAIL; /* Resource temporarily unavailable */
30171 +       case MC_CMD_STATUS_NO_MEMORY:
30172 +               return -ENOMEM; /* Cannot allocate memory */
30173 +       case MC_CMD_STATUS_BUSY:
30174 +               return -EBUSY; /* Device busy */
30175 +       case MC_CMD_STATUS_UNSUPPORTED_OP:
30176 +               return -ENOTSUP; /* Operation not supported by device */
30177 +       case MC_CMD_STATUS_INVALID_STATE:
30178 +               return -ENODEV; /* Invalid device state */
30179 +       default:
30180 +               break;
30181 +       }
30182 +
30183 +       /* Not expected to reach here */
30184 +       return -EINVAL;
30185 +}
30186 +
30187 +int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd)
30188 +{
30189 +       enum mc_cmd_status status;
30190 +
30191 +       if (!mc_io || !mc_io->regs)
30192 +               return -EACCES;
30193 +
30194 +       /* --- Call lock function here in case portal is shared --- */
30195 +       mc_spinlock_lock(&mc_portal_lock);
30196 +
30197 +       mc_write_command(mc_io->regs, cmd);
30198 +
30199 +       /* Spin until status changes */
30200 +       do {
30201 +               status = MC_CMD_HDR_READ_STATUS(ioread64(mc_io->regs));
30202 +
30203 +               /* --- Call wait function here to prevent blocking ---
30204 +                * Change the loop condition accordingly to exit on timeout.
30205 +                */
30206 +       } while (status == MC_CMD_STATUS_READY);
30207 +
30208 +       /* Read the response back into the command buffer */
30209 +       mc_read_response(mc_io->regs, cmd);
30210 +
30211 +       /* --- Call unlock function here in case portal is shared --- */
30212 +       mc_spinlock_unlock(&mc_portal_lock);
30213 +
30214 +       return mc_status_to_error(status);
30215 +}
30216 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_debug.c b/drivers/net/dpaa2/qbman/driver/qbman_debug.c
30217 new file mode 100644
30218 index 0000000..ef6c257
30219 --- /dev/null
30220 +++ b/drivers/net/dpaa2/qbman/driver/qbman_debug.c
30221 @@ -0,0 +1,929 @@
30222 +/* Copyright (C) 2015 Freescale Semiconductor, Inc.
30223 + *
30224 + * Redistribution and use in source and binary forms, with or without
30225 + * modification, are permitted provided that the following conditions are met:
30226 + *     * Redistributions of source code must retain the above copyright
30227 + *       notice, this list of conditions and the following disclaimer.
30228 + *     * Redistributions in binary form must reproduce the above copyright
30229 + *       notice, this list of conditions and the following disclaimer in the
30230 + *       documentation and/or other materials provided with the distribution.
30231 + *     * Neither the name of Freescale Semiconductor nor the
30232 + *       names of its contributors may be used to endorse or promote products
30233 + *       derived from this software without specific prior written permission.
30234 + *
30235 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
30236 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
30237 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30238 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
30239 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30240 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30241 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30242 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30243 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30244 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30245 + */
30246 +
30247 +#include "qbman_portal.h"
30248 +#include "qbman_debug.h"
30249 +#include <drivers/fsl_qbman_portal.h>
30250 +
30251 +/* QBMan portal management command code */
30252 +#define QBMAN_BP_QUERY            0x32
30253 +#define QBMAN_FQ_QUERY            0x44
30254 +#define QBMAN_FQ_QUERY_NP         0x45
30255 +#define QBMAN_WQ_QUERY            0x47
30256 +#define QBMAN_CGR_QUERY           0x51
30257 +#define QBMAN_WRED_QUERY          0x54
30258 +#define QBMAN_CGR_STAT_QUERY      0x55
30259 +#define QBMAN_CGR_STAT_QUERY_CLR  0x56
30260 +
30261 +enum qbman_attr_usage_e {
30262 +       qbman_attr_usage_fq,
30263 +       qbman_attr_usage_bpool,
30264 +       qbman_attr_usage_cgr,
30265 +       qbman_attr_usage_wqchan
30266 +};
30267 +
30268 +struct int_qbman_attr {
30269 +       uint32_t words[32];
30270 +       enum qbman_attr_usage_e usage;
30271 +};
30272 +
30273 +#define attr_type_set(a, e) \
30274 +{ \
30275 +       struct qbman_attr *__attr = a; \
30276 +       enum qbman_attr_usage_e __usage = e; \
30277 +       ((struct int_qbman_attr *)__attr)->usage = __usage; \
30278 +}
30279 +
30280 +#define ATTR32(d) (&(d)->dont_manipulate_directly[0])
30281 +#define ATTR32_1(d) (&(d)->dont_manipulate_directly[16])
30282 +
30283 +static struct qb_attr_code code_bp_bpid = QB_CODE(0, 16, 16);
30284 +static struct qb_attr_code code_bp_bdi = QB_CODE(1, 16, 1);
30285 +static struct qb_attr_code code_bp_va = QB_CODE(1, 17, 1);
30286 +static struct qb_attr_code code_bp_wae = QB_CODE(1, 18, 1);
30287 +static struct qb_attr_code code_bp_swdet = QB_CODE(4, 0, 16);
30288 +static struct qb_attr_code code_bp_swdxt = QB_CODE(4, 16, 16);
30289 +static struct qb_attr_code code_bp_hwdet = QB_CODE(5, 0, 16);
30290 +static struct qb_attr_code code_bp_hwdxt = QB_CODE(5, 16, 16);
30291 +static struct qb_attr_code code_bp_swset = QB_CODE(6, 0, 16);
30292 +static struct qb_attr_code code_bp_swsxt = QB_CODE(6, 16, 16);
30293 +static struct qb_attr_code code_bp_vbpid = QB_CODE(7, 0, 14);
30294 +static struct qb_attr_code code_bp_icid = QB_CODE(7, 16, 15);
30295 +static struct qb_attr_code code_bp_pl = QB_CODE(7, 31, 1);
30296 +static struct qb_attr_code code_bp_bpscn_addr_lo = QB_CODE(8, 0, 32);
30297 +static struct qb_attr_code code_bp_bpscn_addr_hi = QB_CODE(9, 0, 32);
30298 +static struct qb_attr_code code_bp_bpscn_ctx_lo = QB_CODE(10, 0, 32);
30299 +static struct qb_attr_code code_bp_bpscn_ctx_hi = QB_CODE(11, 0, 32);
30300 +static struct qb_attr_code code_bp_hw_targ = QB_CODE(12, 0, 16);
30301 +static struct qb_attr_code code_bp_state = QB_CODE(1, 24, 3);
30302 +static struct qb_attr_code code_bp_fill = QB_CODE(2, 0, 32);
30303 +static struct qb_attr_code code_bp_hdptr = QB_CODE(3, 0, 32);
30304 +static struct qb_attr_code code_bp_sdcnt = QB_CODE(13, 0, 8);
30305 +static struct qb_attr_code code_bp_hdcnt = QB_CODE(13, 8, 8);
30306 +static struct qb_attr_code code_bp_sscnt = QB_CODE(13, 16, 8);
30307 +
30308 +static void qbman_bp_attr_clear(struct qbman_attr *a)
30309 +{
30310 +       memset(a, 0, sizeof(*a));
30311 +       attr_type_set(a, qbman_attr_usage_bpool);
30312 +}
30313 +
30314 +int qbman_bp_query(struct qbman_swp *s, uint32_t bpid,
30315 +                  struct qbman_attr *a)
30316 +{
30317 +       uint32_t *p;
30318 +       uint32_t rslt;
30319 +       uint32_t *attr = ATTR32(a);
30320 +
30321 +       qbman_bp_attr_clear(a);
30322 +
30323 +       /* Start the management command */
30324 +       p = qbman_swp_mc_start(s);
30325 +       if (!p)
30326 +               return -EBUSY;
30327 +
30328 +       /* Encode the caller-provided attributes */
30329 +       qb_attr_code_encode(&code_bp_bpid, p, bpid);
30330 +
30331 +       /* Complete the management command */
30332 +       p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_BP_QUERY);
30333 +
30334 +       /* Decode the outcome */
30335 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
30336 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != QBMAN_BP_QUERY);
30337 +
30338 +       /* Determine success or failure */
30339 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
30340 +               pr_err("Query of BPID 0x%x failed, code=0x%02x\n", bpid, rslt);
30341 +               return -EIO;
30342 +       }
30343 +
30344 +       /* For the query, word[0] of the result contains only the
30345 +        * verb/rslt fields, so skip word[0].
30346 +        */
30347 +       word_copy(&attr[1], &p[1], 15);
30348 +       return 0;
30349 +}
30350 +
30351 +void qbman_bp_attr_get_bdi(struct qbman_attr *a, int *bdi, int *va, int *wae)
30352 +{
30353 +       uint32_t *p = ATTR32(a);
30354 +
30355 +       *bdi = !!qb_attr_code_decode(&code_bp_bdi, p);
30356 +       *va = !!qb_attr_code_decode(&code_bp_va, p);
30357 +       *wae = !!qb_attr_code_decode(&code_bp_wae, p);
30358 +}
30359 +
30360 +static uint32_t qbman_bp_thresh_to_value(uint32_t val)
30361 +{
30362 +       return (val & 0xff) << ((val & 0xf00) >> 8);
30363 +}
30364 +
30365 +void qbman_bp_attr_get_swdet(struct qbman_attr *a, uint32_t *swdet)
30366 +{
30367 +       uint32_t *p = ATTR32(a);
30368 +
30369 +       *swdet = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swdet,
30370 +                                         p));
30371 +}
30372 +
30373 +void qbman_bp_attr_get_swdxt(struct qbman_attr *a, uint32_t *swdxt)
30374 +{
30375 +       uint32_t *p = ATTR32(a);
30376 +
30377 +       *swdxt = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swdxt,
30378 +                                         p));
30379 +}
30380 +
30381 +void qbman_bp_attr_get_hwdet(struct qbman_attr *a, uint32_t *hwdet)
30382 +{
30383 +       uint32_t *p = ATTR32(a);
30384 +
30385 +       *hwdet = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_hwdet,
30386 +                                         p));
30387 +}
30388 +
30389 +void qbman_bp_attr_get_hwdxt(struct qbman_attr *a, uint32_t *hwdxt)
30390 +{
30391 +       uint32_t *p = ATTR32(a);
30392 +
30393 +       *hwdxt = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_hwdxt,
30394 +                                         p));
30395 +}
30396 +
30397 +void qbman_bp_attr_get_swset(struct qbman_attr *a, uint32_t *swset)
30398 +{
30399 +       uint32_t *p = ATTR32(a);
30400 +
30401 +       *swset = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swset,
30402 +                                         p));
30403 +}
30404 +
30405 +void qbman_bp_attr_get_swsxt(struct qbman_attr *a, uint32_t *swsxt)
30406 +{
30407 +       uint32_t *p = ATTR32(a);
30408 +
30409 +       *swsxt = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swsxt,
30410 +                                         p));
30411 +}
30412 +
30413 +void qbman_bp_attr_get_vbpid(struct qbman_attr *a, uint32_t *vbpid)
30414 +{
30415 +       uint32_t *p = ATTR32(a);
30416 +
30417 +       *vbpid = qb_attr_code_decode(&code_bp_vbpid, p);
30418 +}
30419 +
30420 +void qbman_bp_attr_get_icid(struct qbman_attr *a, uint32_t *icid, int *pl)
30421 +{
30422 +       uint32_t *p = ATTR32(a);
30423 +
30424 +       *icid = qb_attr_code_decode(&code_bp_icid, p);
30425 +       *pl = !!qb_attr_code_decode(&code_bp_pl, p);
30426 +}
30427 +
30428 +void qbman_bp_attr_get_bpscn_addr(struct qbman_attr *a, uint64_t *bpscn_addr)
30429 +{
30430 +       uint32_t *p = ATTR32(a);
30431 +
30432 +       *bpscn_addr = ((uint64_t)qb_attr_code_decode(&code_bp_bpscn_addr_hi,
30433 +                       p) << 32) |
30434 +                       (uint64_t)qb_attr_code_decode(&code_bp_bpscn_addr_lo,
30435 +                       p);
30436 +}
30437 +
30438 +void qbman_bp_attr_get_bpscn_ctx(struct qbman_attr *a, uint64_t *bpscn_ctx)
30439 +{
30440 +       uint32_t *p = ATTR32(a);
30441 +
30442 +       *bpscn_ctx = ((uint64_t)qb_attr_code_decode(&code_bp_bpscn_ctx_hi, p)
30443 +                       << 32) |
30444 +                       (uint64_t)qb_attr_code_decode(&code_bp_bpscn_ctx_lo,
30445 +                       p);
30446 +}
30447 +
30448 +void qbman_bp_attr_get_hw_targ(struct qbman_attr *a, uint32_t *hw_targ)
30449 +{
30450 +       uint32_t *p = ATTR32(a);
30451 +
30452 +       *hw_targ = qb_attr_code_decode(&code_bp_hw_targ, p);
30453 +}
30454 +
30455 +int qbman_bp_info_has_free_bufs(struct qbman_attr *a)
30456 +{
30457 +       uint32_t *p = ATTR32(a);
30458 +
30459 +       return !(int)(qb_attr_code_decode(&code_bp_state, p) & 0x1);
30460 +}
30461 +
30462 +int qbman_bp_info_is_depleted(struct qbman_attr *a)
30463 +{
30464 +       uint32_t *p = ATTR32(a);
30465 +
30466 +       return (int)(qb_attr_code_decode(&code_bp_state, p) & 0x2);
30467 +}
30468 +
30469 +int qbman_bp_info_is_surplus(struct qbman_attr *a)
30470 +{
30471 +       uint32_t *p = ATTR32(a);
30472 +
30473 +       return (int)(qb_attr_code_decode(&code_bp_state, p) & 0x4);
30474 +}
30475 +
30476 +uint32_t qbman_bp_info_num_free_bufs(struct qbman_attr *a)
30477 +{
30478 +       uint32_t *p = ATTR32(a);
30479 +
30480 +       return qb_attr_code_decode(&code_bp_fill, p);
30481 +}
30482 +
30483 +uint32_t qbman_bp_info_hdptr(struct qbman_attr *a)
30484 +{
30485 +       uint32_t *p = ATTR32(a);
30486 +
30487 +       return qb_attr_code_decode(&code_bp_hdptr, p);
30488 +}
30489 +
30490 +uint32_t qbman_bp_info_sdcnt(struct qbman_attr *a)
30491 +{
30492 +       uint32_t *p = ATTR32(a);
30493 +
30494 +       return qb_attr_code_decode(&code_bp_sdcnt, p);
30495 +}
30496 +
30497 +uint32_t qbman_bp_info_hdcnt(struct qbman_attr *a)
30498 +{
30499 +       uint32_t *p = ATTR32(a);
30500 +
30501 +       return qb_attr_code_decode(&code_bp_hdcnt, p);
30502 +}
30503 +
30504 +uint32_t qbman_bp_info_sscnt(struct qbman_attr *a)
30505 +{
30506 +       uint32_t *p = ATTR32(a);
30507 +
30508 +       return qb_attr_code_decode(&code_bp_sscnt, p);
30509 +}
30510 +
30511 +static struct qb_attr_code code_fq_fqid = QB_CODE(1, 0, 24);
30512 +static struct qb_attr_code code_fq_cgrid = QB_CODE(2, 16, 16);
30513 +static struct qb_attr_code code_fq_destwq = QB_CODE(3, 0, 15);
30514 +static struct qb_attr_code code_fq_fqctrl = QB_CODE(3, 24, 8);
30515 +static struct qb_attr_code code_fq_icscred = QB_CODE(4, 0, 15);
30516 +static struct qb_attr_code code_fq_tdthresh = QB_CODE(4, 16, 13);
30517 +static struct qb_attr_code code_fq_oa_len = QB_CODE(5, 0, 12);
30518 +static struct qb_attr_code code_fq_oa_ics = QB_CODE(5, 14, 1);
30519 +static struct qb_attr_code code_fq_oa_cgr = QB_CODE(5, 15, 1);
30520 +static struct qb_attr_code code_fq_mctl_bdi = QB_CODE(5, 24, 1);
30521 +static struct qb_attr_code code_fq_mctl_ff = QB_CODE(5, 25, 1);
30522 +static struct qb_attr_code code_fq_mctl_va = QB_CODE(5, 26, 1);
30523 +static struct qb_attr_code code_fq_mctl_ps = QB_CODE(5, 27, 1);
30524 +static struct qb_attr_code code_fq_ctx_lower32 = QB_CODE(6, 0, 32);
30525 +static struct qb_attr_code code_fq_ctx_upper32 = QB_CODE(7, 0, 32);
30526 +static struct qb_attr_code code_fq_icid = QB_CODE(8, 0, 15);
30527 +static struct qb_attr_code code_fq_pl = QB_CODE(8, 15, 1);
30528 +static struct qb_attr_code code_fq_vfqid = QB_CODE(9, 0, 24);
30529 +static struct qb_attr_code code_fq_erfqid = QB_CODE(10, 0, 24);
30530 +
30531 +static void qbman_fq_attr_clear(struct qbman_attr *a)
30532 +{
30533 +       memset(a, 0, sizeof(*a));
30534 +       attr_type_set(a, qbman_attr_usage_fq);
30535 +}
30536 +
30537 +/* FQ query function for programmable fields */
30538 +int qbman_fq_query(struct qbman_swp *s, uint32_t fqid, struct qbman_attr *desc)
30539 +{
30540 +       uint32_t *p;
30541 +       uint32_t rslt;
30542 +       uint32_t *d = ATTR32(desc);
30543 +
30544 +       qbman_fq_attr_clear(desc);
30545 +
30546 +       p = qbman_swp_mc_start(s);
30547 +       if (!p)
30548 +               return -EBUSY;
30549 +       qb_attr_code_encode(&code_fq_fqid, p, fqid);
30550 +       p = qbman_swp_mc_complete(s, p, QBMAN_FQ_QUERY);
30551 +
30552 +       /* Decode the outcome */
30553 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
30554 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != QBMAN_FQ_QUERY);
30555 +
30556 +       /* Determine success or failure */
30557 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
30558 +               pr_err("Query of FQID 0x%x failed, code=0x%02x\n",
30559 +                      fqid, rslt);
30560 +               return -EIO;
30561 +       }
30562 +       /* For the configure, word[0] of the command contains only the WE-mask.
30563 +        * For the query, word[0] of the result contains only the verb/rslt
30564 +        * fields. Skip word[0] in the latter case. */
30565 +       word_copy(&d[1], &p[1], 15);
30566 +       return 0;
30567 +}
30568 +
30569 +void qbman_fq_attr_get_fqctrl(struct qbman_attr *d, uint32_t *fqctrl)
30570 +{
30571 +       uint32_t *p = ATTR32(d);
30572 +
30573 +       *fqctrl = qb_attr_code_decode(&code_fq_fqctrl, p);
30574 +}
30575 +
30576 +void qbman_fq_attr_get_cgrid(struct qbman_attr *d, uint32_t *cgrid)
30577 +{
30578 +       uint32_t *p = ATTR32(d);
30579 +
30580 +       *cgrid = qb_attr_code_decode(&code_fq_cgrid, p);
30581 +}
30582 +
30583 +void qbman_fq_attr_get_destwq(struct qbman_attr *d, uint32_t *destwq)
30584 +{
30585 +       uint32_t *p = ATTR32(d);
30586 +
30587 +       *destwq = qb_attr_code_decode(&code_fq_destwq, p);
30588 +}
30589 +
30590 +void qbman_fq_attr_get_icscred(struct qbman_attr *d, uint32_t *icscred)
30591 +{
30592 +       uint32_t *p = ATTR32(d);
30593 +
30594 +       *icscred = qb_attr_code_decode(&code_fq_icscred, p);
30595 +}
30596 +
30597 +static struct qb_attr_code code_tdthresh_exp = QB_CODE(0, 0, 5);
30598 +static struct qb_attr_code code_tdthresh_mant = QB_CODE(0, 5, 8);
30599 +static uint32_t qbman_thresh_to_value(uint32_t val)
30600 +{
30601 +       uint32_t m, e;
30602 +
30603 +       m = qb_attr_code_decode(&code_tdthresh_mant, &val);
30604 +       e = qb_attr_code_decode(&code_tdthresh_exp, &val);
30605 +       return m << e;
30606 +}
30607 +
30608 +void qbman_fq_attr_get_tdthresh(struct qbman_attr *d, uint32_t *tdthresh)
30609 +{
30610 +       uint32_t *p = ATTR32(d);
30611 +
30612 +       *tdthresh = qbman_thresh_to_value(qb_attr_code_decode(&code_fq_tdthresh,
30613 +                                       p));
30614 +}
30615 +
30616 +void qbman_fq_attr_get_oa(struct qbman_attr *d,
30617 +                         int *oa_ics, int *oa_cgr, int32_t *oa_len)
30618 +{
30619 +       uint32_t *p = ATTR32(d);
30620 +
30621 +       *oa_ics = !!qb_attr_code_decode(&code_fq_oa_ics, p);
30622 +       *oa_cgr = !!qb_attr_code_decode(&code_fq_oa_cgr, p);
30623 +       *oa_len = qb_attr_code_makesigned(&code_fq_oa_len,
30624 +                       qb_attr_code_decode(&code_fq_oa_len, p));
30625 +}
30626 +
30627 +void qbman_fq_attr_get_mctl(struct qbman_attr *d,
30628 +                           int *bdi, int *ff, int *va, int *ps)
30629 +{
30630 +       uint32_t *p = ATTR32(d);
30631 +
30632 +       *bdi = !!qb_attr_code_decode(&code_fq_mctl_bdi, p);
30633 +       *ff = !!qb_attr_code_decode(&code_fq_mctl_ff, p);
30634 +       *va = !!qb_attr_code_decode(&code_fq_mctl_va, p);
30635 +       *ps = !!qb_attr_code_decode(&code_fq_mctl_ps, p);
30636 +}
30637 +
30638 +void qbman_fq_attr_get_ctx(struct qbman_attr *d, uint32_t *hi, uint32_t *lo)
30639 +{
30640 +       uint32_t *p = ATTR32(d);
30641 +
30642 +       *hi = qb_attr_code_decode(&code_fq_ctx_upper32, p);
30643 +       *lo = qb_attr_code_decode(&code_fq_ctx_lower32, p);
30644 +}
30645 +
30646 +void qbman_fq_attr_get_icid(struct qbman_attr *d, uint32_t *icid, int *pl)
30647 +{
30648 +       uint32_t *p = ATTR32(d);
30649 +
30650 +       *icid = qb_attr_code_decode(&code_fq_icid, p);
30651 +       *pl = !!qb_attr_code_decode(&code_fq_pl, p);
30652 +}
30653 +
30654 +void qbman_fq_attr_get_vfqid(struct qbman_attr *d, uint32_t *vfqid)
30655 +{
30656 +       uint32_t *p = ATTR32(d);
30657 +
30658 +       *vfqid = qb_attr_code_decode(&code_fq_vfqid, p);
30659 +}
30660 +
30661 +void qbman_fq_attr_get_erfqid(struct qbman_attr *d, uint32_t *erfqid)
30662 +{
30663 +       uint32_t *p = ATTR32(d);
30664 +
30665 +       *erfqid = qb_attr_code_decode(&code_fq_erfqid, p);
30666 +}
30667 +
30668 +/* Query FQ Non-Programmalbe Fields */
30669 +static struct qb_attr_code code_fq_np_state = QB_CODE(0, 16, 3);
30670 +static struct qb_attr_code code_fq_np_fe = QB_CODE(0, 19, 1);
30671 +static struct qb_attr_code code_fq_np_x = QB_CODE(0, 20, 1);
30672 +static struct qb_attr_code code_fq_np_r = QB_CODE(0, 21, 1);
30673 +static struct qb_attr_code code_fq_np_oe = QB_CODE(0, 22, 1);
30674 +static struct qb_attr_code code_fq_np_frm_cnt = QB_CODE(6, 0, 24);
30675 +static struct qb_attr_code code_fq_np_byte_cnt = QB_CODE(7, 0, 32);
30676 +
30677 +int qbman_fq_query_state(struct qbman_swp *s, uint32_t fqid,
30678 +                        struct qbman_attr *state)
30679 +{
30680 +       uint32_t *p;
30681 +       uint32_t rslt;
30682 +       uint32_t *d = ATTR32(state);
30683 +
30684 +       qbman_fq_attr_clear(state);
30685 +
30686 +       p = qbman_swp_mc_start(s);
30687 +       if (!p)
30688 +               return -EBUSY;
30689 +       qb_attr_code_encode(&code_fq_fqid, p, fqid);
30690 +       p = qbman_swp_mc_complete(s, p, QBMAN_FQ_QUERY_NP);
30691 +
30692 +       /* Decode the outcome */
30693 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
30694 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != QBMAN_FQ_QUERY_NP);
30695 +
30696 +       /* Determine success or failure */
30697 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
30698 +               pr_err("Query NP fields of FQID 0x%x failed, code=0x%02x\n",
30699 +                      fqid, rslt);
30700 +               return -EIO;
30701 +       }
30702 +       word_copy(&d[0], &p[0], 16);
30703 +       return 0;
30704 +}
30705 +
30706 +uint32_t qbman_fq_state_schedstate(const struct qbman_attr *state)
30707 +{
30708 +       const uint32_t *p = ATTR32(state);
30709 +
30710 +       return qb_attr_code_decode(&code_fq_np_state, p);
30711 +}
30712 +
30713 +int qbman_fq_state_force_eligible(const struct qbman_attr *state)
30714 +{
30715 +       const uint32_t *p = ATTR32(state);
30716 +
30717 +       return !!qb_attr_code_decode(&code_fq_np_fe, p);
30718 +}
30719 +
30720 +int qbman_fq_state_xoff(const struct qbman_attr *state)
30721 +{
30722 +       const uint32_t *p = ATTR32(state);
30723 +
30724 +       return !!qb_attr_code_decode(&code_fq_np_x, p);
30725 +}
30726 +
30727 +int qbman_fq_state_retirement_pending(const struct qbman_attr *state)
30728 +{
30729 +       const uint32_t *p = ATTR32(state);
30730 +
30731 +       return !!qb_attr_code_decode(&code_fq_np_r, p);
30732 +}
30733 +
30734 +int qbman_fq_state_overflow_error(const struct qbman_attr *state)
30735 +{
30736 +       const uint32_t *p = ATTR32(state);
30737 +
30738 +       return !!qb_attr_code_decode(&code_fq_np_oe, p);
30739 +}
30740 +
30741 +uint32_t qbman_fq_state_frame_count(const struct qbman_attr *state)
30742 +{
30743 +       const uint32_t *p = ATTR32(state);
30744 +
30745 +       return qb_attr_code_decode(&code_fq_np_frm_cnt, p);
30746 +}
30747 +
30748 +uint32_t qbman_fq_state_byte_count(const struct qbman_attr *state)
30749 +{
30750 +       const uint32_t *p = ATTR32(state);
30751 +
30752 +       return qb_attr_code_decode(&code_fq_np_byte_cnt, p);
30753 +}
30754 +
30755 +/* Query CGR */
30756 +static struct qb_attr_code code_cgr_cgid = QB_CODE(0, 16, 16);
30757 +static struct qb_attr_code code_cgr_cscn_wq_en_enter = QB_CODE(2, 0, 1);
30758 +static struct qb_attr_code code_cgr_cscn_wq_en_exit = QB_CODE(2, 1, 1);
30759 +static struct qb_attr_code code_cgr_cscn_wq_icd = QB_CODE(2, 2, 1);
30760 +static struct qb_attr_code code_cgr_mode = QB_CODE(3, 16, 2);
30761 +static struct qb_attr_code code_cgr_rej_cnt_mode = QB_CODE(3, 18, 1);
30762 +static struct qb_attr_code code_cgr_cscn_bdi = QB_CODE(3, 19, 1);
30763 +static struct qb_attr_code code_cgr_cscn_wr_en_enter = QB_CODE(3, 24, 1);
30764 +static struct qb_attr_code code_cgr_cscn_wr_en_exit = QB_CODE(3, 25, 1);
30765 +static struct qb_attr_code code_cgr_cg_wr_ae = QB_CODE(3, 26, 1);
30766 +static struct qb_attr_code code_cgr_cscn_dcp_en = QB_CODE(3, 27, 1);
30767 +static struct qb_attr_code code_cgr_cg_wr_va = QB_CODE(3, 28, 1);
30768 +static struct qb_attr_code code_cgr_i_cnt_wr_en = QB_CODE(4, 0, 1);
30769 +static struct qb_attr_code code_cgr_i_cnt_wr_bnd = QB_CODE(4, 1, 5);
30770 +static struct qb_attr_code code_cgr_td_en = QB_CODE(4, 8, 1);
30771 +static struct qb_attr_code code_cgr_cs_thres = QB_CODE(4, 16, 13);
30772 +static struct qb_attr_code code_cgr_cs_thres_x = QB_CODE(5, 0, 13);
30773 +static struct qb_attr_code code_cgr_td_thres = QB_CODE(5, 16, 13);
30774 +static struct qb_attr_code code_cgr_cscn_tdcp = QB_CODE(6, 0, 16);
30775 +static struct qb_attr_code code_cgr_cscn_wqid = QB_CODE(6, 16, 16);
30776 +static struct qb_attr_code code_cgr_cscn_vcgid = QB_CODE(7, 0, 16);
30777 +static struct qb_attr_code code_cgr_cg_icid = QB_CODE(7, 16, 15);
30778 +static struct qb_attr_code code_cgr_cg_pl = QB_CODE(7, 31, 1);
30779 +static struct qb_attr_code code_cgr_cg_wr_addr_lo = QB_CODE(8, 0, 32);
30780 +static struct qb_attr_code code_cgr_cg_wr_addr_hi = QB_CODE(9, 0, 32);
30781 +static struct qb_attr_code code_cgr_cscn_ctx_lo = QB_CODE(10, 0, 32);
30782 +static struct qb_attr_code code_cgr_cscn_ctx_hi = QB_CODE(11, 0, 32);
30783 +
30784 +static void qbman_cgr_attr_clear(struct qbman_attr *a)
30785 +{
30786 +       memset(a, 0, sizeof(*a));
30787 +       attr_type_set(a, qbman_attr_usage_cgr);
30788 +}
30789 +
30790 +int qbman_cgr_query(struct qbman_swp *s, uint32_t cgid, struct qbman_attr *attr)
30791 +{
30792 +       uint32_t *p;
30793 +       uint32_t verb, rslt;
30794 +       uint32_t *d[2];
30795 +       int i;
30796 +       uint32_t query_verb;
30797 +
30798 +       d[0] = ATTR32(attr);
30799 +       d[1] = ATTR32_1(attr);
30800 +
30801 +       qbman_cgr_attr_clear(attr);
30802 +
30803 +       for (i = 0; i < 2; i++) {
30804 +               p = qbman_swp_mc_start(s);
30805 +               if (!p)
30806 +                       return -EBUSY;
30807 +               query_verb = i ? QBMAN_WRED_QUERY : QBMAN_CGR_QUERY;
30808 +
30809 +               qb_attr_code_encode(&code_cgr_cgid, p, cgid);
30810 +               p = qbman_swp_mc_complete(s, p, p[0] | query_verb);
30811 +
30812 +               /* Decode the outcome */
30813 +               verb = qb_attr_code_decode(&code_generic_verb, p);
30814 +               rslt = qb_attr_code_decode(&code_generic_rslt, p);
30815 +               BUG_ON(verb != query_verb);
30816 +
30817 +               /* Determine success or failure */
30818 +               if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
30819 +                       pr_err("Query CGID 0x%x failed,", cgid);
30820 +                       pr_err(" verb=0x%02x, code=0x%02x\n", verb, rslt);
30821 +                       return -EIO;
30822 +               }
30823 +               /* For the configure, word[0] of the command contains only the
30824 +                * verb/cgid. For the query, word[0] of the result contains
30825 +                * only the verb/rslt fields. Skip word[0] in the latter case.
30826 +                */
30827 +               word_copy(&d[i][1], &p[1], 15);
30828 +       }
30829 +       return 0;
30830 +}
30831 +
30832 +void qbman_cgr_attr_get_ctl1(struct qbman_attr *d, int *cscn_wq_en_enter,
30833 +                            int *cscn_wq_en_exit, int *cscn_wq_icd)
30834 +       {
30835 +       uint32_t *p = ATTR32(d);
30836 +       *cscn_wq_en_enter = !!qb_attr_code_decode(&code_cgr_cscn_wq_en_enter,
30837 +                                                                        p);
30838 +       *cscn_wq_en_exit = !!qb_attr_code_decode(&code_cgr_cscn_wq_en_exit, p);
30839 +       *cscn_wq_icd = !!qb_attr_code_decode(&code_cgr_cscn_wq_icd, p);
30840 +}
30841 +
30842 +void qbman_cgr_attr_get_mode(struct qbman_attr *d, uint32_t *mode,
30843 +                            int *rej_cnt_mode, int *cscn_bdi)
30844 +{
30845 +       uint32_t *p = ATTR32(d);
30846 +       *mode = qb_attr_code_decode(&code_cgr_mode, p);
30847 +       *rej_cnt_mode = !!qb_attr_code_decode(&code_cgr_rej_cnt_mode, p);
30848 +       *cscn_bdi = !!qb_attr_code_decode(&code_cgr_cscn_bdi, p);
30849 +}
30850 +
30851 +void qbman_cgr_attr_get_ctl2(struct qbman_attr *d, int *cscn_wr_en_enter,
30852 +                            int *cscn_wr_en_exit, int *cg_wr_ae,
30853 +                            int *cscn_dcp_en, int *cg_wr_va)
30854 +{
30855 +       uint32_t *p = ATTR32(d);
30856 +       *cscn_wr_en_enter = !!qb_attr_code_decode(&code_cgr_cscn_wr_en_enter,
30857 +                                                                       p);
30858 +       *cscn_wr_en_exit = !!qb_attr_code_decode(&code_cgr_cscn_wr_en_exit, p);
30859 +       *cg_wr_ae = !!qb_attr_code_decode(&code_cgr_cg_wr_ae, p);
30860 +       *cscn_dcp_en = !!qb_attr_code_decode(&code_cgr_cscn_dcp_en, p);
30861 +       *cg_wr_va = !!qb_attr_code_decode(&code_cgr_cg_wr_va, p);
30862 +}
30863 +
30864 +void qbman_cgr_attr_get_iwc(struct qbman_attr *d, int *i_cnt_wr_en,
30865 +                           uint32_t *i_cnt_wr_bnd)
30866 +{
30867 +       uint32_t *p = ATTR32(d);
30868 +       *i_cnt_wr_en = !!qb_attr_code_decode(&code_cgr_i_cnt_wr_en, p);
30869 +       *i_cnt_wr_bnd = qb_attr_code_decode(&code_cgr_i_cnt_wr_bnd, p);
30870 +}
30871 +
30872 +void qbman_cgr_attr_get_tdc(struct qbman_attr *d, int *td_en)
30873 +{
30874 +       uint32_t *p = ATTR32(d);
30875 +       *td_en = !!qb_attr_code_decode(&code_cgr_td_en, p);
30876 +}
30877 +
30878 +void qbman_cgr_attr_get_cs_thres(struct qbman_attr *d, uint32_t *cs_thres)
30879 +{
30880 +       uint32_t *p = ATTR32(d);
30881 +       *cs_thres = qbman_thresh_to_value(qb_attr_code_decode(
30882 +                                               &code_cgr_cs_thres, p));
30883 +}
30884 +
30885 +void qbman_cgr_attr_get_cs_thres_x(struct qbman_attr *d,
30886 +                                  uint32_t *cs_thres_x)
30887 +{
30888 +       uint32_t *p = ATTR32(d);
30889 +       *cs_thres_x = qbman_thresh_to_value(qb_attr_code_decode(
30890 +                                           &code_cgr_cs_thres_x, p));
30891 +}
30892 +
30893 +void qbman_cgr_attr_get_td_thres(struct qbman_attr *d, uint32_t *td_thres)
30894 +{
30895 +       uint32_t *p = ATTR32(d);
30896 +       *td_thres = qbman_thresh_to_value(qb_attr_code_decode(
30897 +                                         &code_cgr_td_thres, p));
30898 +}
30899 +
30900 +void qbman_cgr_attr_get_cscn_tdcp(struct qbman_attr *d, uint32_t *cscn_tdcp)
30901 +{
30902 +       uint32_t *p = ATTR32(d);
30903 +       *cscn_tdcp = qb_attr_code_decode(&code_cgr_cscn_tdcp, p);
30904 +}
30905 +
30906 +void qbman_cgr_attr_get_cscn_wqid(struct qbman_attr *d, uint32_t *cscn_wqid)
30907 +{
30908 +       uint32_t *p = ATTR32(d);
30909 +       *cscn_wqid = qb_attr_code_decode(&code_cgr_cscn_wqid, p);
30910 +}
30911 +
30912 +void qbman_cgr_attr_get_cscn_vcgid(struct qbman_attr *d,
30913 +                                  uint32_t *cscn_vcgid)
30914 +{
30915 +       uint32_t *p = ATTR32(d);
30916 +       *cscn_vcgid = qb_attr_code_decode(&code_cgr_cscn_vcgid, p);
30917 +}
30918 +
30919 +void qbman_cgr_attr_get_cg_icid(struct qbman_attr *d, uint32_t *icid,
30920 +                               int *pl)
30921 +{
30922 +       uint32_t *p = ATTR32(d);
30923 +       *icid = qb_attr_code_decode(&code_cgr_cg_icid, p);
30924 +       *pl = !!qb_attr_code_decode(&code_cgr_cg_pl, p);
30925 +}
30926 +
30927 +void qbman_cgr_attr_get_cg_wr_addr(struct qbman_attr *d,
30928 +                                  uint64_t *cg_wr_addr)
30929 +{
30930 +       uint32_t *p = ATTR32(d);
30931 +       *cg_wr_addr = ((uint64_t)qb_attr_code_decode(&code_cgr_cg_wr_addr_hi,
30932 +                       p) << 32) |
30933 +                       (uint64_t)qb_attr_code_decode(&code_cgr_cg_wr_addr_lo,
30934 +                       p);
30935 +}
30936 +
30937 +void qbman_cgr_attr_get_cscn_ctx(struct qbman_attr *d, uint64_t *cscn_ctx)
30938 +{
30939 +       uint32_t *p = ATTR32(d);
30940 +       *cscn_ctx = ((uint64_t)qb_attr_code_decode(&code_cgr_cscn_ctx_hi, p)
30941 +                       << 32) |
30942 +                       (uint64_t)qb_attr_code_decode(&code_cgr_cscn_ctx_lo, p);
30943 +}
30944 +
30945 +#define WRED_EDP_WORD(n) (18 + n / 4)
30946 +#define WRED_EDP_OFFSET(n) (8 * (n % 4))
30947 +#define WRED_PARM_DP_WORD(n) (n + 20)
30948 +#define WRED_WE_EDP(n) (16 + n * 2)
30949 +#define WRED_WE_PARM_DP(n) (17 + n * 2)
30950 +void qbman_cgr_attr_wred_get_edp(struct qbman_attr *d, uint32_t idx,
30951 +                                int *edp)
30952 +{
30953 +       uint32_t *p = ATTR32(d);
30954 +       struct qb_attr_code code_wred_edp = QB_CODE(WRED_EDP_WORD(idx),
30955 +                                               WRED_EDP_OFFSET(idx), 8);
30956 +       *edp = (int)qb_attr_code_decode(&code_wred_edp, p);
30957 +}
30958 +
30959 +void qbman_cgr_attr_wred_dp_decompose(uint32_t dp, uint64_t *minth,
30960 +                                     uint64_t *maxth, uint8_t *maxp)
30961 +{
30962 +       uint8_t ma, mn, step_i, step_s, pn;
30963 +
30964 +       ma = (uint8_t)(dp >> 24);
30965 +       mn = (uint8_t)(dp >> 19) & 0x1f;
30966 +       step_i = (uint8_t)(dp >> 11);
30967 +       step_s = (uint8_t)(dp >> 6) & 0x1f;
30968 +       pn = (uint8_t)dp & 0x3f;
30969 +
30970 +       *maxp = (uint8_t)(((pn << 2) * 100) / 256);
30971 +
30972 +       if (mn == 0)
30973 +               *maxth = ma;
30974 +       else
30975 +               *maxth = ((ma + 256) * (1 << (mn - 1)));
30976 +
30977 +       if (step_s == 0)
30978 +               *minth = *maxth - step_i;
30979 +       else
30980 +               *minth = *maxth - (256 + step_i) * (1 << (step_s - 1));
30981 +}
30982 +
30983 +void qbman_cgr_attr_wred_get_parm_dp(struct qbman_attr *d, uint32_t idx,
30984 +                                    uint32_t *dp)
30985 +{
30986 +       uint32_t *p = ATTR32(d);
30987 +       struct qb_attr_code code_wred_parm_dp = QB_CODE(WRED_PARM_DP_WORD(idx),
30988 +                                               0, 8);
30989 +       *dp = qb_attr_code_decode(&code_wred_parm_dp, p);
30990 +}
30991 +
30992 +/* Query CGR/CCGR/CQ statistics */
30993 +static struct qb_attr_code code_cgr_stat_ct = QB_CODE(4, 0, 32);
30994 +static struct qb_attr_code code_cgr_stat_frame_cnt_lo = QB_CODE(4, 0, 32);
30995 +static struct qb_attr_code code_cgr_stat_frame_cnt_hi = QB_CODE(5, 0, 8);
30996 +static struct qb_attr_code code_cgr_stat_byte_cnt_lo = QB_CODE(6, 0, 32);
30997 +static struct qb_attr_code code_cgr_stat_byte_cnt_hi = QB_CODE(7, 0, 16);
30998 +static int qbman_cgr_statistics_query(struct qbman_swp *s, uint32_t cgid,
30999 +                                     int clear, uint32_t command_type,
31000 +                                     uint64_t *frame_cnt, uint64_t *byte_cnt)
31001 +{
31002 +       uint32_t *p;
31003 +       uint32_t verb, rslt;
31004 +       uint32_t query_verb;
31005 +       uint32_t hi, lo;
31006 +
31007 +       p = qbman_swp_mc_start(s);
31008 +       if (!p)
31009 +               return -EBUSY;
31010 +
31011 +       qb_attr_code_encode(&code_cgr_cgid, p, cgid);
31012 +       if (command_type < 2)
31013 +               qb_attr_code_encode(&code_cgr_stat_ct, p, command_type);
31014 +       query_verb = clear ?
31015 +                       QBMAN_CGR_STAT_QUERY_CLR : QBMAN_CGR_STAT_QUERY;
31016 +       p = qbman_swp_mc_complete(s, p, p[0] | query_verb);
31017 +
31018 +       /* Decode the outcome */
31019 +       verb = qb_attr_code_decode(&code_generic_verb, p);
31020 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
31021 +       BUG_ON(verb != query_verb);
31022 +
31023 +       /* Determine success or failure */
31024 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
31025 +               pr_err("Query statistics of CGID 0x%x failed,", cgid);
31026 +               pr_err(" verb=0x%02x code=0x%02x\n", verb, rslt);
31027 +               return -EIO;
31028 +       }
31029 +
31030 +       if (*frame_cnt) {
31031 +               hi = qb_attr_code_decode(&code_cgr_stat_frame_cnt_hi, p);
31032 +               lo = qb_attr_code_decode(&code_cgr_stat_frame_cnt_lo, p);
31033 +               *frame_cnt = ((uint64_t)hi << 32) | (uint64_t)lo;
31034 +       }
31035 +       if (*byte_cnt) {
31036 +               hi = qb_attr_code_decode(&code_cgr_stat_byte_cnt_hi, p);
31037 +               lo = qb_attr_code_decode(&code_cgr_stat_byte_cnt_lo, p);
31038 +               *byte_cnt = ((uint64_t)hi << 32) | (uint64_t)lo;
31039 +       }
31040 +
31041 +       return 0;
31042 +}
31043 +
31044 +int qbman_cgr_reject_statistics(struct qbman_swp *s, uint32_t cgid, int clear,
31045 +                               uint64_t *frame_cnt, uint64_t *byte_cnt)
31046 +{
31047 +       return qbman_cgr_statistics_query(s, cgid, clear, 0xff,
31048 +                                         frame_cnt, byte_cnt);
31049 +}
31050 +
31051 +int qbman_ccgr_reject_statistics(struct qbman_swp *s, uint32_t cgid, int clear,
31052 +                                uint64_t *frame_cnt, uint64_t *byte_cnt)
31053 +{
31054 +       return qbman_cgr_statistics_query(s, cgid, clear, 1,
31055 +                                         frame_cnt, byte_cnt);
31056 +}
31057 +
31058 +int qbman_cq_dequeue_statistics(struct qbman_swp *s, uint32_t cgid, int clear,
31059 +                               uint64_t *frame_cnt, uint64_t *byte_cnt)
31060 +{
31061 +       return qbman_cgr_statistics_query(s, cgid, clear, 0,
31062 +                                         frame_cnt, byte_cnt);
31063 +}
31064 +
31065 +/* WQ Chan Query */
31066 +static struct qb_attr_code code_wqchan_chanid = QB_CODE(0, 16, 16);
31067 +static struct qb_attr_code code_wqchan_cdan_ctx_lo = QB_CODE(2, 0, 32);
31068 +static struct qb_attr_code code_wqchan_cdan_ctx_hi = QB_CODE(3, 0, 32);
31069 +static struct qb_attr_code code_wqchan_cdan_wqid = QB_CODE(1, 16, 16);
31070 +static struct qb_attr_code code_wqchan_ctrl = QB_CODE(1, 8, 8);
31071 +
31072 +static void qbman_wqchan_attr_clear(struct qbman_attr *a)
31073 +{
31074 +       memset(a, 0, sizeof(*a));
31075 +       attr_type_set(a, qbman_attr_usage_wqchan);
31076 +}
31077 +
31078 +int qbman_wqchan_query(struct qbman_swp *s, uint16_t chanid,
31079 +                      struct qbman_attr *a)
31080 +{
31081 +       uint32_t *p;
31082 +       uint32_t rslt;
31083 +       uint32_t *attr = ATTR32(a);
31084 +
31085 +       qbman_wqchan_attr_clear(a);
31086 +
31087 +       /* Start the management command */
31088 +       p = qbman_swp_mc_start(s);
31089 +       if (!p)
31090 +               return -EBUSY;
31091 +
31092 +       /* Encode the caller-provided attributes */
31093 +       qb_attr_code_encode(&code_wqchan_chanid, p, chanid);
31094 +
31095 +       /* Complete the management command */
31096 +       p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_WQ_QUERY);
31097 +
31098 +       /* Decode the outcome */
31099 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
31100 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p); != QBMAN_WQ_QUERY);
31101 +
31102 +       /* Determine success or failure */
31103 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
31104 +               pr_err("Query of WQCHAN 0x%x failed, code=0x%02x\n",
31105 +                      chanid, rslt);
31106 +               return -EIO;
31107 +       }
31108 +
31109 +       /* For the query, word[0] of the result contains only the
31110 +        * verb/rslt fields, so skip word[0].
31111 +        */
31112 +       word_copy(&attr[1], &p[1], 15);
31113 +       return 0;
31114 +}
31115 +
31116 +void qbman_wqchan_attr_get_wqlen(struct qbman_attr *attr, int wq, uint32_t *len)
31117 +{
31118 +       uint32_t *p = ATTR32(attr);
31119 +       struct qb_attr_code code_wqchan_len = QB_CODE(wq + 8, 0, 24);
31120 +       *len = qb_attr_code_decode(&code_wqchan_len, p);
31121 +}
31122 +
31123 +void qbman_wqchan_attr_get_cdan_ctx(struct qbman_attr *attr, uint64_t *cdan_ctx)
31124 +{
31125 +       uint32_t lo, hi;
31126 +       uint32_t *p = ATTR32(attr);
31127 +
31128 +       lo = qb_attr_code_decode(&code_wqchan_cdan_ctx_lo, p);
31129 +       hi = qb_attr_code_decode(&code_wqchan_cdan_ctx_hi, p);
31130 +       *cdan_ctx = ((uint64_t)hi << 32) | (uint64_t)lo;
31131 +}
31132 +
31133 +void qbman_wqchan_attr_get_cdan_wqid(struct qbman_attr *attr,
31134 +                                    uint16_t *cdan_wqid)
31135 +{
31136 +       uint32_t *p = ATTR32(attr);
31137 +       *cdan_wqid = (uint16_t)qb_attr_code_decode(&code_wqchan_cdan_wqid, p);
31138 +}
31139 +
31140 +void qbman_wqchan_attr_get_ctrl(struct qbman_attr *attr, uint8_t *ctrl)
31141 +{
31142 +       uint32_t *p = ATTR32(attr);
31143 +       *ctrl = (uint8_t)qb_attr_code_decode(&code_wqchan_ctrl, p);
31144 +}
31145 +
31146 +void qbman_wqchan_attr_get_chanid(struct qbman_attr *attr, uint16_t *chanid)
31147 +{
31148 +       uint32_t *p = ATTR32(attr);
31149 +       *chanid = (uint16_t)qb_attr_code_decode(&code_wqchan_chanid, p);
31150 +}
31151 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_debug.h b/drivers/net/dpaa2/qbman/driver/qbman_debug.h
31152 new file mode 100644
31153 index 0000000..4d586a6
31154 --- /dev/null
31155 +++ b/drivers/net/dpaa2/qbman/driver/qbman_debug.h
31156 @@ -0,0 +1,140 @@
31157 +/* Copyright (C) 2015 Freescale Semiconductor, Inc.
31158 + *
31159 + * Redistribution and use in source and binary forms, with or without
31160 + * modification, are permitted provided that the following conditions are met:
31161 + *     * Redistributions of source code must retain the above copyright
31162 + *       notice, this list of conditions and the following disclaimer.
31163 + *     * Redistributions in binary form must reproduce the above copyright
31164 + *       notice, this list of conditions and the following disclaimer in the
31165 + *       documentation and/or other materials provided with the distribution.
31166 + *     * Neither the name of Freescale Semiconductor nor the
31167 + *       names of its contributors may be used to endorse or promote products
31168 + *       derived from this software without specific prior written permission.
31169 + *
31170 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
31171 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
31172 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31173 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
31174 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31175 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
31176 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31177 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31178 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31179 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31180 + */
31181 +
31182 +struct qbman_attr {
31183 +       uint32_t dont_manipulate_directly[40];
31184 +};
31185 +
31186 +/* Buffer pool query commands */
31187 +int qbman_bp_query(struct qbman_swp *s, uint32_t bpid,
31188 +                  struct qbman_attr *a);
31189 +void qbman_bp_attr_get_bdi(struct qbman_attr *a, int *bdi, int *va, int *wae);
31190 +void qbman_bp_attr_get_swdet(struct qbman_attr *a, uint32_t *swdet);
31191 +void qbman_bp_attr_get_swdxt(struct qbman_attr *a, uint32_t *swdxt);
31192 +void qbman_bp_attr_get_hwdet(struct qbman_attr *a, uint32_t *hwdet);
31193 +void qbman_bp_attr_get_hwdxt(struct qbman_attr *a, uint32_t *hwdxt);
31194 +void qbman_bp_attr_get_swset(struct qbman_attr *a, uint32_t *swset);
31195 +void qbman_bp_attr_get_swsxt(struct qbman_attr *a, uint32_t *swsxt);
31196 +void qbman_bp_attr_get_vbpid(struct qbman_attr *a, uint32_t *vbpid);
31197 +void qbman_bp_attr_get_icid(struct qbman_attr *a, uint32_t *icid, int *pl);
31198 +void qbman_bp_attr_get_bpscn_addr(struct qbman_attr *a, uint64_t *bpscn_addr);
31199 +void qbman_bp_attr_get_bpscn_ctx(struct qbman_attr *a, uint64_t *bpscn_ctx);
31200 +void qbman_bp_attr_get_hw_targ(struct qbman_attr *a, uint32_t *hw_targ);
31201 +int qbman_bp_info_has_free_bufs(struct qbman_attr *a);
31202 +int qbman_bp_info_is_depleted(struct qbman_attr *a);
31203 +int qbman_bp_info_is_surplus(struct qbman_attr *a);
31204 +uint32_t qbman_bp_info_num_free_bufs(struct qbman_attr *a);
31205 +uint32_t qbman_bp_info_hdptr(struct qbman_attr *a);
31206 +uint32_t qbman_bp_info_sdcnt(struct qbman_attr *a);
31207 +uint32_t qbman_bp_info_hdcnt(struct qbman_attr *a);
31208 +uint32_t qbman_bp_info_sscnt(struct qbman_attr *a);
31209 +
31210 +/* FQ query function for programmable fields */
31211 +int qbman_fq_query(struct qbman_swp *s, uint32_t fqid,
31212 +                  struct qbman_attr *desc);
31213 +void qbman_fq_attr_get_fqctrl(struct qbman_attr *d, uint32_t *fqctrl);
31214 +void qbman_fq_attr_get_cgrid(struct qbman_attr *d, uint32_t *cgrid);
31215 +void qbman_fq_attr_get_destwq(struct qbman_attr *d, uint32_t *destwq);
31216 +void qbman_fq_attr_get_icscred(struct qbman_attr *d, uint32_t *icscred);
31217 +void qbman_fq_attr_get_tdthresh(struct qbman_attr *d, uint32_t *tdthresh);
31218 +void qbman_fq_attr_get_oa(struct qbman_attr *d,
31219 +                         int *oa_ics, int *oa_cgr, int32_t *oa_len);
31220 +void qbman_fq_attr_get_mctl(struct qbman_attr *d,
31221 +                           int *bdi, int *ff, int *va, int *ps);
31222 +void qbman_fq_attr_get_ctx(struct qbman_attr *d, uint32_t *hi, uint32_t *lo);
31223 +void qbman_fq_attr_get_icid(struct qbman_attr *d, uint32_t *icid, int *pl);
31224 +void qbman_fq_attr_get_vfqid(struct qbman_attr *d, uint32_t *vfqid);
31225 +void qbman_fq_attr_get_erfqid(struct qbman_attr *d, uint32_t *erfqid);
31226 +
31227 +/* FQ query command for non-programmable fields*/
31228 +enum qbman_fq_schedstate_e {
31229 +       qbman_fq_schedstate_oos = 0,
31230 +       qbman_fq_schedstate_retired,
31231 +       qbman_fq_schedstate_tentatively_scheduled,
31232 +       qbman_fq_schedstate_truly_scheduled,
31233 +       qbman_fq_schedstate_parked,
31234 +       qbman_fq_schedstate_held_active,
31235 +};
31236 +
31237 +int qbman_fq_query_state(struct qbman_swp *s, uint32_t fqid,
31238 +                        struct qbman_attr *state);
31239 +uint32_t qbman_fq_state_schedstate(const struct qbman_attr *state);
31240 +int qbman_fq_state_force_eligible(const struct qbman_attr *state);
31241 +int qbman_fq_state_xoff(const struct qbman_attr *state);
31242 +int qbman_fq_state_retirement_pending(const struct qbman_attr *state);
31243 +int qbman_fq_state_overflow_error(const struct qbman_attr *state);
31244 +uint32_t qbman_fq_state_frame_count(const struct qbman_attr *state);
31245 +uint32_t qbman_fq_state_byte_count(const struct qbman_attr *state);
31246 +
31247 +/* CGR query */
31248 +int qbman_cgr_query(struct qbman_swp *s, uint32_t cgid,
31249 +                   struct qbman_attr *attr);
31250 +void qbman_cgr_attr_get_ctl1(struct qbman_attr *d, int *cscn_wq_en_enter,
31251 +                            int *cscn_wq_en_exit, int *cscn_wq_icd);
31252 +void qbman_cgr_attr_get_mode(struct qbman_attr *d, uint32_t *mode,
31253 +                            int *rej_cnt_mode, int *cscn_bdi);
31254 +void qbman_cgr_attr_get_ctl2(struct qbman_attr *d, int *cscn_wr_en_enter,
31255 +                            int *cscn_wr_en_exit, int *cg_wr_ae,
31256 +                            int *cscn_dcp_en, int *cg_wr_va);
31257 +void qbman_cgr_attr_get_iwc(struct qbman_attr *d, int *i_cnt_wr_en,
31258 +                           uint32_t *i_cnt_wr_bnd);
31259 +void qbman_cgr_attr_get_tdc(struct qbman_attr *d, int *td_en);
31260 +void qbman_cgr_attr_get_cs_thres(struct qbman_attr *d, uint32_t *cs_thres);
31261 +void qbman_cgr_attr_get_cs_thres_x(struct qbman_attr *d,
31262 +                                  uint32_t *cs_thres_x);
31263 +void qbman_cgr_attr_get_td_thres(struct qbman_attr *d, uint32_t *td_thres);
31264 +void qbman_cgr_attr_get_cscn_tdcp(struct qbman_attr *d, uint32_t *cscn_tdcp);
31265 +void qbman_cgr_attr_get_cscn_wqid(struct qbman_attr *d, uint32_t *cscn_wqid);
31266 +void qbman_cgr_attr_get_cscn_vcgid(struct qbman_attr *d,
31267 +                                  uint32_t *cscn_vcgid);
31268 +void qbman_cgr_attr_get_cg_icid(struct qbman_attr *d, uint32_t *icid,
31269 +                               int *pl);
31270 +void qbman_cgr_attr_get_cg_wr_addr(struct qbman_attr *d,
31271 +                                  uint64_t *cg_wr_addr);
31272 +void qbman_cgr_attr_get_cscn_ctx(struct qbman_attr *d, uint64_t *cscn_ctx);
31273 +void qbman_cgr_attr_wred_get_edp(struct qbman_attr *d, uint32_t idx,
31274 +                                int *edp);
31275 +void qbman_cgr_attr_wred_dp_decompose(uint32_t dp, uint64_t *minth,
31276 +                                     uint64_t *maxth, uint8_t *maxp);
31277 +void qbman_cgr_attr_wred_get_parm_dp(struct qbman_attr *d, uint32_t idx,
31278 +                                    uint32_t *dp);
31279 +
31280 +/* CGR/CCGR/CQ statistics query */
31281 +int qbman_cgr_reject_statistics(struct qbman_swp *s, uint32_t cgid, int clear,
31282 +                               uint64_t *frame_cnt, uint64_t *byte_cnt);
31283 +int qbman_ccgr_reject_statistics(struct qbman_swp *s, uint32_t cgid, int clear,
31284 +                                uint64_t *frame_cnt, uint64_t *byte_cnt);
31285 +int qbman_cq_dequeue_statistics(struct qbman_swp *s, uint32_t cgid, int clear,
31286 +                               uint64_t *frame_cnt, uint64_t *byte_cnt);
31287 +
31288 +/* Query Work Queue Channel */
31289 +int qbman_wqchan_query(struct qbman_swp *s, uint16_t chanid,
31290 +                      struct qbman_attr *attr);
31291 +void qbman_wqchan_attr_get_wqlen(struct qbman_attr *attr, int wq, uint32_t *len);
31292 +void qbman_wqchan_attr_get_cdan_ctx(struct qbman_attr *attr, uint64_t *cdan_ctx);
31293 +void qbman_wqchan_attr_get_cdan_wqid(struct qbman_attr *attr,
31294 +                                    uint16_t *cdan_wqid);
31295 +void qbman_wqchan_attr_get_ctrl(struct qbman_attr *attr, uint8_t *ctrl);
31296 +void qbman_wqchan_attr_get_chanid(struct qbman_attr *attr, uint16_t *chanid);
31297 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_portal.c b/drivers/net/dpaa2/qbman/driver/qbman_portal.c
31298 new file mode 100644
31299 index 0000000..52e1f64
31300 --- /dev/null
31301 +++ b/drivers/net/dpaa2/qbman/driver/qbman_portal.c
31302 @@ -0,0 +1,1441 @@
31303 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
31304 + *
31305 + * Redistribution and use in source and binary forms, with or without
31306 + * modification, are permitted provided that the following conditions are met:
31307 + *     * Redistributions of source code must retain the above copyright
31308 + *       notice, this list of conditions and the following disclaimer.
31309 + *     * Redistributions in binary form must reproduce the above copyright
31310 + *       notice, this list of conditions and the following disclaimer in the
31311 + *       documentation and/or other materials provided with the distribution.
31312 + *     * Neither the name of Freescale Semiconductor nor the
31313 + *       names of its contributors may be used to endorse or promote products
31314 + *       derived from this software without specific prior written permission.
31315 + *
31316 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
31317 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
31318 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31319 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
31320 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31321 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
31322 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31323 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31324 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31325 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31326 + */
31327 +
31328 +#include "qbman_portal.h"
31329 +
31330 +/* QBMan portal management command codes */
31331 +#define QBMAN_MC_ACQUIRE       0x30
31332 +#define QBMAN_WQCHAN_CONFIGURE 0x46
31333 +
31334 +/* CINH register offsets */
31335 +#define QBMAN_CINH_SWP_EQCR_PI 0x800
31336 +#define QBMAN_CINH_SWP_EQCR_CI 0x840
31337 +#define QBMAN_CINH_SWP_EQAR    0x8c0
31338 +#define QBMAN_CINH_SWP_DQPI    0xa00
31339 +#define QBMAN_CINH_SWP_DCAP    0xac0
31340 +#define QBMAN_CINH_SWP_SDQCR   0xb00
31341 +#define QBMAN_CINH_SWP_RAR     0xcc0
31342 +#define QBMAN_CINH_SWP_ISR     0xe00
31343 +#define QBMAN_CINH_SWP_IER     0xe40
31344 +#define QBMAN_CINH_SWP_ISDR    0xe80
31345 +#define QBMAN_CINH_SWP_IIR     0xec0
31346 +
31347 +/* CENA register offsets */
31348 +#define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
31349 +#define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
31350 +#define QBMAN_CENA_SWP_RCR(n)  (0x400 + ((uint32_t)(n) << 6))
31351 +#define QBMAN_CENA_SWP_CR      0x600
31352 +#define QBMAN_CENA_SWP_RR(vb)  (0x700 + ((uint32_t)(vb) >> 1))
31353 +#define QBMAN_CENA_SWP_VDQCR   0x780
31354 +#define QBMAN_CENA_SWP_EQCR_CI 0x840
31355 +
31356 +/* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
31357 +#define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
31358 +
31359 +/* QBMan FQ management command codes */
31360 +#define QBMAN_FQ_SCHEDULE      0x48
31361 +#define QBMAN_FQ_FORCE         0x49
31362 +#define QBMAN_FQ_XON           0x4d
31363 +#define QBMAN_FQ_XOFF          0x4e
31364 +
31365 +/*******************************/
31366 +/* Pre-defined attribute codes */
31367 +/*******************************/
31368 +
31369 +struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
31370 +struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
31371 +
31372 +/*************************/
31373 +/* SDQCR attribute codes */
31374 +/*************************/
31375 +
31376 +/* we put these here because at least some of them are required by
31377 + * qbman_swp_init() */
31378 +struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
31379 +struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
31380 +struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
31381 +static struct qb_attr_code code_eq_dca_idx;
31382 +#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
31383 +enum qbman_sdqcr_dct {
31384 +       qbman_sdqcr_dct_null = 0,
31385 +       qbman_sdqcr_dct_prio_ics,
31386 +       qbman_sdqcr_dct_active_ics,
31387 +       qbman_sdqcr_dct_active
31388 +};
31389 +
31390 +enum qbman_sdqcr_fc {
31391 +       qbman_sdqcr_fc_one = 0,
31392 +       qbman_sdqcr_fc_up_to_3 = 1
31393 +};
31394 +
31395 +struct qb_attr_code code_sdqcr_dqsrc = QB_CODE(0, 0, 16);
31396 +
31397 +/*********************************/
31398 +/* Portal constructor/destructor */
31399 +/*********************************/
31400 +
31401 +/* Software portals should always be in the power-on state when we initialise,
31402 + * due to the CCSR-based portal reset functionality that MC has.
31403 + *
31404 + * Erk! Turns out that QMan versions prior to 4.1 do not correctly reset DQRR
31405 + * valid-bits, so we need to support a workaround where we don't trust
31406 + * valid-bits when detecting new entries until any stale ring entries have been
31407 + * overwritten at least once. The idea is that we read PI for the first few
31408 + * entries, then switch to valid-bit after that. The trick is to clear the
31409 + * bug-work-around boolean once the PI wraps around the ring for the first time.
31410 + *
31411 + * Note: this still carries a slight additional cost once the decrementer hits
31412 + * zero.
31413 + */
31414 +struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
31415 +{
31416 +       int ret;
31417 +       uint32_t eqcr_pi;
31418 +       struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL);
31419 +
31420 +       if (!p)
31421 +               return NULL;
31422 +       p->desc = d;
31423 +#ifdef QBMAN_CHECKING
31424 +       p->mc.check = swp_mc_can_start;
31425 +#endif
31426 +       p->mc.valid_bit = QB_VALID_BIT;
31427 +       p->sdq = 0;
31428 +       qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
31429 +       qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
31430 +       qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
31431 +       atomic_set(&p->vdq.busy, 1);
31432 +       p->vdq.valid_bit = QB_VALID_BIT;
31433 +       p->dqrr.next_idx = 0;
31434 +       p->dqrr.valid_bit = QB_VALID_BIT;
31435 +       qman_version = p->desc->qman_version;
31436 +       if ((qman_version & 0xFFFF0000) < QMAN_REV_4100) {
31437 +               p->dqrr.dqrr_size = 4;
31438 +               p->dqrr.reset_bug = 1;
31439 +               /* Set size of DQRR to 4, encoded in 2 bits */
31440 +               code_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 2);
31441 +       } else {
31442 +               p->dqrr.dqrr_size = 8;
31443 +               p->dqrr.reset_bug = 0;
31444 +               /* Set size of DQRR to 8, encoded in 3 bits */
31445 +               code_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 3);
31446 +       }
31447 +
31448 +       ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
31449 +       if (ret) {
31450 +               kfree(p);
31451 +               pr_err("qbman_swp_sys_init() failed %d\n", ret);
31452 +               return NULL;
31453 +       }
31454 +       /* SDQCR needs to be initialized to 0 when no channels are
31455 +          being dequeued from or else the QMan HW will indicate an
31456 +          error.  The values that were calculated above will be
31457 +          applied when dequeues from a specific channel are enabled */
31458 +       qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, 0);
31459 +       eqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);
31460 +       p->eqcr.pi = eqcr_pi & 0xF;
31461 +       p->eqcr.pi_vb = eqcr_pi & QB_VALID_BIT;
31462 +       p->eqcr.ci = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_CI) & 0xF;
31463 +       p->eqcr.available = QBMAN_EQCR_SIZE - qm_cyc_diff(QBMAN_EQCR_SIZE,
31464 +                                               p->eqcr.ci, p->eqcr.pi);
31465 +
31466 +       return p;
31467 +}
31468 +
31469 +void qbman_swp_finish(struct qbman_swp *p)
31470 +{
31471 +#ifdef QBMAN_CHECKING
31472 +       BUG_ON(p->mc.check != swp_mc_can_start);
31473 +#endif
31474 +       qbman_swp_sys_finish(&p->sys);
31475 +       kfree(p);
31476 +}
31477 +
31478 +const struct qbman_swp_desc *qbman_swp_get_desc(struct qbman_swp *p)
31479 +{
31480 +       return p->desc;
31481 +}
31482 +
31483 +/**************/
31484 +/* Interrupts */
31485 +/**************/
31486 +
31487 +uint32_t qbman_swp_interrupt_get_vanish(struct qbman_swp *p)
31488 +{
31489 +       return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_ISDR);
31490 +}
31491 +
31492 +void qbman_swp_interrupt_set_vanish(struct qbman_swp *p, uint32_t mask)
31493 +{
31494 +       qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_ISDR, mask);
31495 +}
31496 +
31497 +uint32_t qbman_swp_interrupt_read_status(struct qbman_swp *p)
31498 +{
31499 +       return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_ISR);
31500 +}
31501 +
31502 +void qbman_swp_interrupt_clear_status(struct qbman_swp *p, uint32_t mask)
31503 +{
31504 +       qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_ISR, mask);
31505 +}
31506 +
31507 +uint32_t qbman_swp_interrupt_get_trigger(struct qbman_swp *p)
31508 +{
31509 +       return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_IER);
31510 +}
31511 +
31512 +void qbman_swp_interrupt_set_trigger(struct qbman_swp *p, uint32_t mask)
31513 +{
31514 +       qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_IER, mask);
31515 +}
31516 +
31517 +int qbman_swp_interrupt_get_inhibit(struct qbman_swp *p)
31518 +{
31519 +       return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_IIR);
31520 +}
31521 +
31522 +void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit)
31523 +{
31524 +       qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_IIR, inhibit ? 0xffffffff : 0);
31525 +}
31526 +
31527 +/***********************/
31528 +/* Management commands */
31529 +/***********************/
31530 +
31531 +/*
31532 + * Internal code common to all types of management commands.
31533 + */
31534 +
31535 +void *qbman_swp_mc_start(struct qbman_swp *p)
31536 +{
31537 +       void *ret;
31538 +#ifdef QBMAN_CHECKING
31539 +       BUG_ON(p->mc.check != swp_mc_can_start);
31540 +#endif
31541 +       ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
31542 +#ifdef QBMAN_CHECKING
31543 +       if (!ret)
31544 +               p->mc.check = swp_mc_can_submit;
31545 +#endif
31546 +       return ret;
31547 +}
31548 +
31549 +void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
31550 +{
31551 +       uint32_t *v = cmd;
31552 +#ifdef QBMAN_CHECKING
31553 +       BUG_ON(!p->mc.check != swp_mc_can_submit);
31554 +#endif
31555 +       /* TBD: "|=" is going to hurt performance. Need to move as many fields
31556 +        * out of word zero, and for those that remain, the "OR" needs to occur
31557 +        * at the caller side. This debug check helps to catch cases where the
31558 +        * caller wants to OR but has forgotten to do so. */
31559 +       BUG_ON((*v & cmd_verb) != *v);
31560 +       *v = cmd_verb | p->mc.valid_bit;
31561 +       qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
31562 +#ifdef QBMAN_CHECKING
31563 +       p->mc.check = swp_mc_can_poll;
31564 +#endif
31565 +}
31566 +
31567 +void *qbman_swp_mc_result(struct qbman_swp *p)
31568 +{
31569 +       uint32_t *ret, verb;
31570 +#ifdef QBMAN_CHECKING
31571 +       BUG_ON(p->mc.check != swp_mc_can_poll);
31572 +#endif
31573 +       qbman_cena_invalidate_prefetch(&p->sys,
31574 +                                      QBMAN_CENA_SWP_RR(p->mc.valid_bit));
31575 +       ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
31576 +       /* Remove the valid-bit - command completed iff the rest is non-zero */
31577 +       verb = ret[0] & ~QB_VALID_BIT;
31578 +       if (!verb)
31579 +               return NULL;
31580 +#ifdef QBMAN_CHECKING
31581 +       p->mc.check = swp_mc_can_start;
31582 +#endif
31583 +       p->mc.valid_bit ^= QB_VALID_BIT;
31584 +       return ret;
31585 +}
31586 +
31587 +/***********/
31588 +/* Enqueue */
31589 +/***********/
31590 +
31591 +/* These should be const, eventually */
31592 +static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
31593 +static struct qb_attr_code code_eq_eqdi = QB_CODE(0, 3, 1);
31594 +static struct qb_attr_code code_eq_dca_en = QB_CODE(0, 15, 1);
31595 +static struct qb_attr_code code_eq_dca_pk = QB_CODE(0, 14, 1);
31596 +/* Can't set code_eq_dca_idx width. Need qman version. Read at runtime */
31597 +static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
31598 +static struct qb_attr_code code_eq_orp_is_nesn = QB_CODE(0, 31, 1);
31599 +static struct qb_attr_code code_eq_orp_nlis = QB_CODE(0, 30, 1);
31600 +static struct qb_attr_code code_eq_orp_seqnum = QB_CODE(0, 16, 14);
31601 +static struct qb_attr_code code_eq_opr_id = QB_CODE(1, 0, 16);
31602 +static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
31603 +/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
31604 +static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
31605 +static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
31606 +static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
31607 +static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
31608 +static struct qb_attr_code code_eq_rsp_id = QB_CODE(5, 24, 8);
31609 +static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
31610 +
31611 +enum qbman_eq_cmd_e {
31612 +       /* No enqueue, primarily for plugging ORP gaps for dropped frames */
31613 +       qbman_eq_cmd_empty,
31614 +       /* DMA an enqueue response once complete */
31615 +       qbman_eq_cmd_respond,
31616 +       /* DMA an enqueue response only if the enqueue fails */
31617 +       qbman_eq_cmd_respond_reject
31618 +};
31619 +
31620 +void qbman_eq_desc_clear(struct qbman_eq_desc *d)
31621 +{
31622 +       memset(d, 0, sizeof(*d));
31623 +}
31624 +
31625 +void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
31626 +{
31627 +       uint32_t *cl = qb_cl(d);
31628 +
31629 +       qb_attr_code_encode(&code_eq_orp_en, cl, 0);
31630 +       qb_attr_code_encode(&code_eq_cmd, cl,
31631 +                           respond_success ? qbman_eq_cmd_respond :
31632 +                                             qbman_eq_cmd_respond_reject);
31633 +}
31634 +
31635 +void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
31636 +                          uint32_t opr_id, uint32_t seqnum, int incomplete)
31637 +{
31638 +       uint32_t *cl = qb_cl(d);
31639 +
31640 +       qb_attr_code_encode(&code_eq_orp_en, cl, 1);
31641 +       qb_attr_code_encode(&code_eq_cmd, cl,
31642 +                           respond_success ? qbman_eq_cmd_respond :
31643 +                                             qbman_eq_cmd_respond_reject);
31644 +       qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
31645 +       qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
31646 +       qb_attr_code_encode(&code_eq_orp_nlis, cl, !!incomplete);
31647 +}
31648 +
31649 +void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
31650 +                               uint32_t seqnum)
31651 +{
31652 +       uint32_t *cl = qb_cl(d);
31653 +
31654 +       qb_attr_code_encode(&code_eq_orp_en, cl, 1);
31655 +       qb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);
31656 +       qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
31657 +       qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
31658 +       qb_attr_code_encode(&code_eq_orp_nlis, cl, 0);
31659 +       qb_attr_code_encode(&code_eq_orp_is_nesn, cl, 0);
31660 +}
31661 +
31662 +void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,
31663 +                               uint32_t seqnum)
31664 +{
31665 +       uint32_t *cl = qb_cl(d);
31666 +
31667 +       qb_attr_code_encode(&code_eq_orp_en, cl, 1);
31668 +       qb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);
31669 +       qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
31670 +       qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
31671 +       qb_attr_code_encode(&code_eq_orp_nlis, cl, 0);
31672 +       qb_attr_code_encode(&code_eq_orp_is_nesn, cl, 1);
31673 +}
31674 +
31675 +void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
31676 +                               dma_addr_t storage_phys,
31677 +                               int stash)
31678 +{
31679 +       uint32_t *cl = qb_cl(d);
31680 +
31681 +       qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
31682 +       qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
31683 +}
31684 +
31685 +void qbman_eq_desc_set_token(struct qbman_eq_desc *d, uint8_t token)
31686 +{
31687 +       uint32_t *cl = qb_cl(d);
31688 +
31689 +       qb_attr_code_encode(&code_eq_rsp_id, cl, (uint32_t)token);
31690 +}
31691 +
31692 +void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid)
31693 +{
31694 +       uint32_t *cl = qb_cl(d);
31695 +
31696 +       qb_attr_code_encode(&code_eq_qd_en, cl, 0);
31697 +       qb_attr_code_encode(&code_eq_tgt_id, cl, fqid);
31698 +}
31699 +
31700 +void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
31701 +                         uint32_t qd_bin, uint32_t qd_prio)
31702 +{
31703 +       uint32_t *cl = qb_cl(d);
31704 +
31705 +       qb_attr_code_encode(&code_eq_qd_en, cl, 1);
31706 +       qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
31707 +       qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
31708 +       qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
31709 +}
31710 +
31711 +void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable)
31712 +{
31713 +       uint32_t *cl = qb_cl(d);
31714 +
31715 +       qb_attr_code_encode(&code_eq_eqdi, cl, !!enable);
31716 +}
31717 +
31718 +void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
31719 +                          uint32_t dqrr_idx, int park)
31720 +{
31721 +       uint32_t *cl = qb_cl(d);
31722 +
31723 +       qb_attr_code_encode(&code_eq_dca_en, cl, !!enable);
31724 +       if (enable) {
31725 +               qb_attr_code_encode(&code_eq_dca_pk, cl, !!park);
31726 +               qb_attr_code_encode(&code_eq_dca_idx, cl, dqrr_idx);
31727 +       }
31728 +}
31729 +
31730 +#define EQAR_IDX(eqar)     ((eqar) & 0x7)
31731 +#define EQAR_VB(eqar)      ((eqar) & 0x80)
31732 +#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
31733 +static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
31734 +                                       const struct qbman_eq_desc *d,
31735 +                                const struct qbman_fd *fd)
31736 +{
31737 +       uint32_t *p;
31738 +       const uint32_t *cl = qb_cl(d);
31739 +       uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
31740 +
31741 +       pr_debug("EQAR=%08x\n", eqar);
31742 +       if (!EQAR_SUCCESS(eqar))
31743 +               return -EBUSY;
31744 +       p = qbman_cena_write_start_wo_shadow(&s->sys,
31745 +                                            QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
31746 +       word_copy(&p[1], &cl[1], 7);
31747 +       word_copy(&p[8], fd, sizeof(*fd) >> 2);
31748 +       /* Set the verb byte, have to substitute in the valid-bit */
31749 +       lwsync();
31750 +       p[0] = cl[0] | EQAR_VB(eqar);
31751 +       qbman_cena_write_complete_wo_shadow(&s->sys,
31752 +                                           QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
31753 +       return 0;
31754 +}
31755 +
31756 +static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
31757 +                                      const struct qbman_eq_desc *d,
31758 +                               const struct qbman_fd *fd)
31759 +{
31760 +       uint32_t *p;
31761 +       const uint32_t *cl = qb_cl(d);
31762 +       uint32_t eqcr_ci;
31763 +       uint8_t diff;
31764 +
31765 +       if (!s->eqcr.available) {
31766 +               eqcr_ci = s->eqcr.ci;
31767 +               s->eqcr.ci = qbman_cena_read_reg(&s->sys,
31768 +                               QBMAN_CENA_SWP_EQCR_CI) & 0xF;
31769 +               diff = qm_cyc_diff(QBMAN_EQCR_SIZE,
31770 +                                  eqcr_ci, s->eqcr.ci);
31771 +               s->eqcr.available += diff;
31772 +               if (!diff)
31773 +                       return -EBUSY;
31774 +       }
31775 +
31776 +       p = qbman_cena_write_start_wo_shadow(&s->sys,
31777 +                                            QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
31778 +       word_copy(&p[1], &cl[1], 7);
31779 +       word_copy(&p[8], fd, sizeof(*fd) >> 2);
31780 +       lwsync();
31781 +       /* Set the verb byte, have to substitute in the valid-bit */
31782 +       p[0] = cl[0] | s->eqcr.pi_vb;
31783 +       qbman_cena_write_complete_wo_shadow(&s->sys,
31784 +                                           QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
31785 +       s->eqcr.pi++;
31786 +       s->eqcr.pi &= 0xF;
31787 +       s->eqcr.available--;
31788 +       if (!(s->eqcr.pi & 7))
31789 +               s->eqcr.pi_vb ^= QB_VALID_BIT;
31790 +       return 0;
31791 +}
31792 +
31793 +int qbman_swp_fill_ring(struct qbman_swp *s,
31794 +                       const struct qbman_eq_desc *d,
31795 +                       const struct qbman_fd *fd,
31796 +                       __attribute__((unused)) uint8_t burst_index)
31797 +{
31798 +       uint32_t *p;
31799 +       const uint32_t *cl = qb_cl(d);
31800 +       uint32_t eqcr_ci;
31801 +       uint8_t diff;
31802 +
31803 +       if (!s->eqcr.available) {
31804 +               eqcr_ci = s->eqcr.ci;
31805 +               s->eqcr.ci = qbman_cena_read_reg(&s->sys,
31806 +                               QBMAN_CENA_SWP_EQCR_CI) & 0xF;
31807 +               diff = qm_cyc_diff(QBMAN_EQCR_SIZE,
31808 +                                  eqcr_ci, s->eqcr.ci);
31809 +               s->eqcr.available += diff;
31810 +               if (!diff)
31811 +                       return -EBUSY;
31812 +
31813 +       }
31814 +       p = qbman_cena_write_start_wo_shadow(&s->sys,
31815 +                                    QBMAN_CENA_SWP_EQCR((s->eqcr.pi/* +burst_index */) & 7));
31816 +       /* word_copy(&p[1], &cl[1], 7); */
31817 +       memcpy(&p[1], &cl[1], 7*4);
31818 +       /* word_copy(&p[8], fd, sizeof(*fd) >> 2); */
31819 +       memcpy(&p[8], fd, sizeof(struct qbman_fd));
31820 +
31821 +       /* lwsync(); */
31822 +       p[0] = cl[0] | s->eqcr.pi_vb;
31823 +
31824 +       s->eqcr.pi++;
31825 +       s->eqcr.pi &= 0xF;
31826 +       s->eqcr.available--;
31827 +       if (!(s->eqcr.pi & 7))
31828 +               s->eqcr.pi_vb ^= QB_VALID_BIT;
31829 +
31830 +       return 0;
31831 +}
31832 +
31833 +int qbman_swp_flush_ring(struct qbman_swp *s)
31834 +{
31835 +       void *ptr = s->sys.addr_cena;
31836 +
31837 +       dcbf((uint64_t)ptr);
31838 +       dcbf((uint64_t)ptr + 0x40);
31839 +       dcbf((uint64_t)ptr + 0x80);
31840 +       dcbf((uint64_t)ptr + 0xc0);
31841 +       dcbf((uint64_t)ptr + 0x100);
31842 +       dcbf((uint64_t)ptr + 0x140);
31843 +       dcbf((uint64_t)ptr + 0x180);
31844 +       dcbf((uint64_t)ptr + 0x1c0);
31845 +
31846 +       return 0;
31847 +}
31848 +
31849 +void qbman_sync(void)
31850 +{
31851 +       lwsync();
31852 +}
31853 +
31854 +int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
31855 +                     const struct qbman_fd *fd)
31856 +{
31857 +       if (s->sys.eqcr_mode == qman_eqcr_vb_array)
31858 +               return qbman_swp_enqueue_array_mode(s, d, fd);
31859 +       else    /* Use ring mode by default */
31860 +               return qbman_swp_enqueue_ring_mode(s, d, fd);
31861 +}
31862 +
31863 +/*************************/
31864 +/* Static (push) dequeue */
31865 +/*************************/
31866 +
31867 +void qbman_swp_push_get(struct qbman_swp *s, uint8_t channel_idx, int *enabled)
31868 +{
31869 +       struct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);
31870 +
31871 +       BUG_ON(channel_idx > 15);
31872 +       *enabled = (int)qb_attr_code_decode(&code, &s->sdq);
31873 +}
31874 +
31875 +void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)
31876 +{
31877 +       uint16_t dqsrc;
31878 +       struct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);
31879 +
31880 +       BUG_ON(channel_idx > 15);
31881 +       qb_attr_code_encode(&code, &s->sdq, !!enable);
31882 +       /* Read make the complete src map.  If no channels are enabled
31883 +          the SDQCR must be 0 or else QMan will assert errors */
31884 +       dqsrc = (uint16_t)qb_attr_code_decode(&code_sdqcr_dqsrc, &s->sdq);
31885 +       if (dqsrc != 0)
31886 +               qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_SDQCR, s->sdq);
31887 +       else
31888 +               qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_SDQCR, 0);
31889 +}
31890 +
31891 +/***************************/
31892 +/* Volatile (pull) dequeue */
31893 +/***************************/
31894 +
31895 +/* These should be const, eventually */
31896 +static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
31897 +static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
31898 +static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
31899 +static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
31900 +static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
31901 +static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
31902 +static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
31903 +static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
31904 +
31905 +enum qb_pull_dt_e {
31906 +       qb_pull_dt_channel,
31907 +       qb_pull_dt_workqueue,
31908 +       qb_pull_dt_framequeue
31909 +};
31910 +
31911 +void qbman_pull_desc_clear(struct qbman_pull_desc *d)
31912 +{
31913 +       memset(d, 0, sizeof(*d));
31914 +}
31915 +
31916 +void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
31917 +                                struct qbman_result *storage,
31918 +                                dma_addr_t storage_phys,
31919 +                                int stash)
31920 +{
31921 +       uint32_t *cl = qb_cl(d);
31922 +       /* Squiggle the pointer 'storage' into the extra 2 words of the
31923 +        * descriptor (which aren't copied to the hw command) */
31924 +       *(void **)&cl[4] = storage;
31925 +       if (!storage) {
31926 +               qb_attr_code_encode(&code_pull_rls, cl, 0);
31927 +               return;
31928 +       }
31929 +       qb_attr_code_encode(&code_pull_rls, cl, 1);
31930 +       qb_attr_code_encode(&code_pull_stash, cl, !!stash);
31931 +       qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
31932 +}
31933 +
31934 +void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
31935 +{
31936 +       uint32_t *cl = qb_cl(d);
31937 +
31938 +       BUG_ON(!numframes || (numframes > 16));
31939 +       qb_attr_code_encode(&code_pull_numframes, cl,
31940 +                           (uint32_t)(numframes - 1));
31941 +}
31942 +
31943 +void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
31944 +{
31945 +       uint32_t *cl = qb_cl(d);
31946 +
31947 +       qb_attr_code_encode(&code_pull_token, cl, token);
31948 +}
31949 +
31950 +void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
31951 +{
31952 +       uint32_t *cl = qb_cl(d);
31953 +
31954 +       qb_attr_code_encode(&code_pull_dct, cl, 1);
31955 +       qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
31956 +       qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
31957 +}
31958 +
31959 +void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, uint32_t wqid,
31960 +                           enum qbman_pull_type_e dct)
31961 +{
31962 +       uint32_t *cl = qb_cl(d);
31963 +
31964 +       qb_attr_code_encode(&code_pull_dct, cl, dct);
31965 +       qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_workqueue);
31966 +       qb_attr_code_encode(&code_pull_dqsource, cl, wqid);
31967 +}
31968 +
31969 +void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, uint32_t chid,
31970 +                                enum qbman_pull_type_e dct)
31971 +{
31972 +       uint32_t *cl = qb_cl(d);
31973 +
31974 +       qb_attr_code_encode(&code_pull_dct, cl, dct);
31975 +       qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_channel);
31976 +       qb_attr_code_encode(&code_pull_dqsource, cl, chid);
31977 +}
31978 +
31979 +int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
31980 +{
31981 +       uint32_t *p;
31982 +       uint32_t *cl = qb_cl(d);
31983 +
31984 +       if (!atomic_dec_and_test(&s->vdq.busy)) {
31985 +               atomic_inc(&s->vdq.busy);
31986 +               return -EBUSY;
31987 +       }
31988 +       s->vdq.storage = *(void **)&cl[4];
31989 +       qb_attr_code_encode(&code_pull_token, cl, 1);
31990 +       p = qbman_cena_write_start_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
31991 +       word_copy(&p[1], &cl[1], 3);
31992 +       /* Set the verb byte, have to substitute in the valid-bit */
31993 +       lwsync();
31994 +       p[0] = cl[0] | s->vdq.valid_bit;
31995 +       s->vdq.valid_bit ^= QB_VALID_BIT;
31996 +       qbman_cena_write_complete_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
31997 +       return 0;
31998 +}
31999 +
32000 +/****************/
32001 +/* Polling DQRR */
32002 +/****************/
32003 +
32004 +static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
32005 +static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
32006 +static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
32007 +static struct qb_attr_code code_dqrr_seqnum = QB_CODE(0, 16, 14);
32008 +static struct qb_attr_code code_dqrr_odpid = QB_CODE(1, 0, 16);
32009 +/* static struct qb_attr_code code_dqrr_tok = QB_CODE(1, 24, 8); */
32010 +static struct qb_attr_code code_dqrr_fqid = QB_CODE(2, 0, 24);
32011 +static struct qb_attr_code code_dqrr_byte_count = QB_CODE(4, 0, 32);
32012 +static struct qb_attr_code code_dqrr_frame_count = QB_CODE(5, 0, 24);
32013 +static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);
32014 +
32015 +#define QBMAN_RESULT_DQ        0x60
32016 +#define QBMAN_RESULT_FQRN      0x21
32017 +#define QBMAN_RESULT_FQRNI     0x22
32018 +#define QBMAN_RESULT_FQPN      0x24
32019 +#define QBMAN_RESULT_FQDAN     0x25
32020 +#define QBMAN_RESULT_CDAN      0x26
32021 +#define QBMAN_RESULT_CSCN_MEM  0x27
32022 +#define QBMAN_RESULT_CGCU      0x28
32023 +#define QBMAN_RESULT_BPSCN     0x29
32024 +#define QBMAN_RESULT_CSCN_WQ   0x2a
32025 +
32026 +static struct qb_attr_code code_dqpi_pi = QB_CODE(0, 0, 4);
32027 +
32028 +/* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
32029 + * only once, so repeated calls can return a sequence of DQRR entries, without
32030 + * requiring they be consumed immediately or in any particular order. */
32031 +const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
32032 +{
32033 +       uint32_t verb;
32034 +       uint32_t response_verb;
32035 +       uint32_t flags;
32036 +       const struct qbman_result *dq;
32037 +       const uint32_t *p;
32038 +
32039 +       /* Before using valid-bit to detect if something is there, we have to
32040 +       * handle the case of the DQRR reset bug... */
32041 +       if (unlikely(s->dqrr.reset_bug)) {
32042 +               /* We pick up new entries by cache-inhibited producer index,
32043 +                * which means that a non-coherent mapping would require us to
32044 +                * invalidate and read *only* once that PI has indicated that
32045 +                * there's an entry here. The first trip around the DQRR ring
32046 +                * will be much less efficient than all subsequent trips around
32047 +                * it...
32048 +                */
32049 +               uint32_t dqpi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI);
32050 +               uint32_t pi = qb_attr_code_decode(&code_dqpi_pi, &dqpi);
32051 +               /* there are new entries iff pi != next_idx */
32052 +               if (pi == s->dqrr.next_idx)
32053 +                       return NULL;
32054 +               /* if next_idx is/was the last ring index, and 'pi' is
32055 +                * different, we can disable the workaround as all the ring
32056 +                * entries have now been DMA'd to so valid-bit checking is
32057 +                * repaired. Note: this logic needs to be based on next_idx
32058 +                * (which increments one at a time), rather than on pi (which
32059 +                * can burst and wrap-around between our snapshots of it).
32060 +                */
32061 +               BUG_ON((s->dqrr.dqrr_size - 1) < 0);
32062 +               if (s->dqrr.next_idx == (s->dqrr.dqrr_size - 1u)) {
32063 +                       pr_debug("DEBUG: next_idx=%d, pi=%d, clear reset bug\n",
32064 +                                s->dqrr.next_idx, pi);
32065 +                       s->dqrr.reset_bug = 0;
32066 +               }
32067 +               qbman_cena_invalidate_prefetch(&s->sys,
32068 +                                              QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
32069 +       }
32070 +       dq = qbman_cena_read_wo_shadow(&s->sys,
32071 +                                      QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
32072 +       p = qb_cl(dq);
32073 +       verb = qb_attr_code_decode(&code_dqrr_verb, p);
32074 +       /* If the valid-bit isn't of the expected polarity, nothing there. Note,
32075 +        * in the DQRR reset bug workaround, we shouldn't need to skip these
32076 +        * check, because we've already determined that a new entry is available
32077 +        * and we've invalidated the cacheline before reading it, so the
32078 +        * valid-bit behaviour is repaired and should tell us what we already
32079 +        * knew from reading PI.
32080 +        */
32081 +       if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit)
32082 +               return NULL;
32083 +
32084 +       /* There's something there. Move "next_idx" attention to the next ring
32085 +        * entry (and prefetch it) before returning what we found. */
32086 +       s->dqrr.next_idx++;
32087 +       if (s->dqrr.next_idx == s->dqrr.dqrr_size) {
32088 +               s->dqrr.next_idx = 0;
32089 +               s->dqrr.valid_bit ^= QB_VALID_BIT;
32090 +       }
32091 +       /* If this is the final response to a volatile dequeue command
32092 +         indicate that the vdq is no longer busy */
32093 +       flags = qbman_result_DQ_flags(dq);
32094 +       response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
32095 +       if ((response_verb == QBMAN_RESULT_DQ) &&
32096 +           (flags & QBMAN_DQ_STAT_VOLATILE) &&
32097 +               (flags & QBMAN_DQ_STAT_EXPIRED))
32098 +                       atomic_inc(&s->vdq.busy);
32099 +
32100 +       return dq;
32101 +}
32102 +
32103 +/* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
32104 +void qbman_swp_dqrr_consume(struct qbman_swp *s,
32105 +                           const struct qbman_result *dq)
32106 +{
32107 +       qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
32108 +}
32109 +
32110 +/*********************************/
32111 +/* Polling user-provided storage */
32112 +/*********************************/
32113 +
32114 +int qbman_result_has_new_result(__attribute__((unused)) struct qbman_swp *s,
32115 +                               const struct qbman_result *dq)
32116 +{
32117 +       /* To avoid converting the little-endian DQ entry to host-endian prior
32118 +        * to us knowing whether there is a valid entry or not (and run the
32119 +        * risk of corrupting the incoming hardware LE write), we detect in
32120 +        * hardware endianness rather than host. This means we need a different
32121 +        * "code" depending on whether we are BE or LE in software, which is
32122 +        * where DQRR_TOK_OFFSET comes in... */
32123 +       static struct qb_attr_code code_dqrr_tok_detect =
32124 +                                       QB_CODE(0, DQRR_TOK_OFFSET, 8);
32125 +       /* The user trying to poll for a result treats "dq" as const. It is
32126 +        * however the same address that was provided to us non-const in the
32127 +        * first place, for directing hardware DMA to. So we can cast away the
32128 +        * const because it is mutable from our perspective. */
32129 +       uint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);
32130 +       uint32_t token;
32131 +
32132 +       token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
32133 +       if (token != 1)
32134 +               return 0;
32135 +       qb_attr_code_encode(&code_dqrr_tok_detect, &p[1], 0);
32136 +
32137 +       /* Only now do we convert from hardware to host endianness. Also, as we
32138 +        * are returning success, the user has promised not to call us again, so
32139 +        * there's no risk of us converting the endianness twice... */
32140 +       make_le32_n(p, 16);
32141 +       return 1;
32142 +}
32143 +
32144 +int qbman_check_command_complete(struct qbman_swp *s,
32145 +                                const struct qbman_result *dq)
32146 +{
32147 +       /* To avoid converting the little-endian DQ entry to host-endian prior
32148 +        * to us knowing whether there is a valid entry or not (and run the
32149 +        * risk of corrupting the incoming hardware LE write), we detect in
32150 +        * hardware endianness rather than host. This means we need a different
32151 +        * "code" depending on whether we are BE or LE in software, which is
32152 +        * where DQRR_TOK_OFFSET comes in... */
32153 +       static struct qb_attr_code code_dqrr_tok_detect =
32154 +                                       QB_CODE(0, DQRR_TOK_OFFSET, 8);
32155 +       /* The user trying to poll for a result treats "dq" as const. It is
32156 +        * however the same address that was provided to us non-const in the
32157 +        * first place, for directing hardware DMA to. So we can cast away the
32158 +        * const because it is mutable from our perspective. */
32159 +       uint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);
32160 +       uint32_t token;
32161 +
32162 +       token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
32163 +       if (token != 1)
32164 +               return 0;
32165 +       /*When token is set it indicates that  VDQ command has been fetched by qbman and
32166 +        *is working on it. It is safe for software to issue another VDQ command, so
32167 +        *incrementing the busy variable.*/
32168 +       if (s->vdq.storage == dq) {
32169 +               s->vdq.storage = NULL;
32170 +               atomic_inc(&s->vdq.busy);
32171 +       }
32172 +       return 1;
32173 +}
32174 +
32175 +/********************************/
32176 +/* Categorising qbman results   */
32177 +/********************************/
32178 +
32179 +static struct qb_attr_code code_result_in_mem =
32180 +                       QB_CODE(0, QBMAN_RESULT_VERB_OFFSET_IN_MEM, 7);
32181 +
32182 +static inline int __qbman_result_is_x(const struct qbman_result *dq,
32183 +                                     uint32_t x)
32184 +{
32185 +       const uint32_t *p = qb_cl(dq);
32186 +       uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
32187 +
32188 +       return (response_verb == x);
32189 +}
32190 +
32191 +static inline int __qbman_result_is_x_in_mem(const struct qbman_result *dq,
32192 +                                            uint32_t x)
32193 +{
32194 +       const uint32_t *p = qb_cl(dq);
32195 +       uint32_t response_verb = qb_attr_code_decode(&code_result_in_mem, p);
32196 +
32197 +       return (response_verb == x);
32198 +}
32199 +
32200 +int qbman_result_is_DQ(const struct qbman_result *dq)
32201 +{
32202 +       return __qbman_result_is_x(dq, QBMAN_RESULT_DQ);
32203 +}
32204 +
32205 +int qbman_result_is_FQDAN(const struct qbman_result *dq)
32206 +{
32207 +       return __qbman_result_is_x(dq, QBMAN_RESULT_FQDAN);
32208 +}
32209 +
32210 +int qbman_result_is_CDAN(const struct qbman_result *dq)
32211 +{
32212 +       return __qbman_result_is_x(dq, QBMAN_RESULT_CDAN);
32213 +}
32214 +
32215 +int qbman_result_is_CSCN(const struct qbman_result *dq)
32216 +{
32217 +       return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CSCN_MEM) ||
32218 +               __qbman_result_is_x(dq, QBMAN_RESULT_CSCN_WQ);
32219 +}
32220 +
32221 +int qbman_result_is_BPSCN(const struct qbman_result *dq)
32222 +{
32223 +       return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_BPSCN);
32224 +}
32225 +
32226 +int qbman_result_is_CGCU(const struct qbman_result *dq)
32227 +{
32228 +       return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CGCU);
32229 +}
32230 +
32231 +int qbman_result_is_FQRN(const struct qbman_result *dq)
32232 +{
32233 +       return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRN);
32234 +}
32235 +
32236 +int qbman_result_is_FQRNI(const struct qbman_result *dq)
32237 +{
32238 +       return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRNI);
32239 +}
32240 +
32241 +int qbman_result_is_FQPN(const struct qbman_result *dq)
32242 +{
32243 +       return __qbman_result_is_x(dq, QBMAN_RESULT_FQPN);
32244 +}
32245 +
32246 +/*********************************/
32247 +/* Parsing frame dequeue results */
32248 +/*********************************/
32249 +
32250 +/* These APIs assume qbman_result_is_DQ() is TRUE */
32251 +
32252 +uint32_t qbman_result_DQ_flags(const struct qbman_result *dq)
32253 +{
32254 +       const uint32_t *p = qb_cl(dq);
32255 +
32256 +       return qb_attr_code_decode(&code_dqrr_stat, p);
32257 +}
32258 +
32259 +uint16_t qbman_result_DQ_seqnum(const struct qbman_result *dq)
32260 +{
32261 +       const uint32_t *p = qb_cl(dq);
32262 +
32263 +       return (uint16_t)qb_attr_code_decode(&code_dqrr_seqnum, p);
32264 +}
32265 +
32266 +uint16_t qbman_result_DQ_odpid(const struct qbman_result *dq)
32267 +{
32268 +       const uint32_t *p = qb_cl(dq);
32269 +
32270 +       return (uint16_t)qb_attr_code_decode(&code_dqrr_odpid, p);
32271 +}
32272 +
32273 +uint32_t qbman_result_DQ_fqid(const struct qbman_result *dq)
32274 +{
32275 +       const uint32_t *p = qb_cl(dq);
32276 +
32277 +       return qb_attr_code_decode(&code_dqrr_fqid, p);
32278 +}
32279 +
32280 +uint32_t qbman_result_DQ_byte_count(const struct qbman_result *dq)
32281 +{
32282 +       const uint32_t *p = qb_cl(dq);
32283 +
32284 +       return qb_attr_code_decode(&code_dqrr_byte_count, p);
32285 +}
32286 +
32287 +uint32_t qbman_result_DQ_frame_count(const struct qbman_result *dq)
32288 +{
32289 +       const uint32_t *p = qb_cl(dq);
32290 +
32291 +       return qb_attr_code_decode(&code_dqrr_frame_count, p);
32292 +}
32293 +
32294 +uint64_t qbman_result_DQ_fqd_ctx(const struct qbman_result *dq)
32295 +{
32296 +       const uint64_t *p = (const uint64_t *)qb_cl(dq);
32297 +
32298 +       return qb_attr_code_decode_64(&code_dqrr_ctx_lo, p);
32299 +}
32300 +
32301 +const struct qbman_fd *qbman_result_DQ_fd(const struct qbman_result *dq)
32302 +{
32303 +       const uint32_t *p = qb_cl(dq);
32304 +
32305 +       return (const struct qbman_fd *)&p[8];
32306 +}
32307 +
32308 +/**************************************/
32309 +/* Parsing state-change notifications */
32310 +/**************************************/
32311 +
32312 +static struct qb_attr_code code_scn_state = QB_CODE(0, 16, 8);
32313 +static struct qb_attr_code code_scn_rid = QB_CODE(1, 0, 24);
32314 +static struct qb_attr_code code_scn_state_in_mem =
32315 +                       QB_CODE(0, SCN_STATE_OFFSET_IN_MEM, 8);
32316 +static struct qb_attr_code code_scn_rid_in_mem =
32317 +                       QB_CODE(1, SCN_RID_OFFSET_IN_MEM, 24);
32318 +static struct qb_attr_code code_scn_ctx_lo = QB_CODE(2, 0, 32);
32319 +
32320 +uint8_t qbman_result_SCN_state(const struct qbman_result *scn)
32321 +{
32322 +       const uint32_t *p = qb_cl(scn);
32323 +
32324 +       return (uint8_t)qb_attr_code_decode(&code_scn_state, p);
32325 +}
32326 +
32327 +uint32_t qbman_result_SCN_rid(const struct qbman_result *scn)
32328 +{
32329 +       const uint32_t *p = qb_cl(scn);
32330 +
32331 +       return qb_attr_code_decode(&code_scn_rid, p);
32332 +}
32333 +
32334 +uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn)
32335 +{
32336 +       const uint64_t *p = (const uint64_t *)qb_cl(scn);
32337 +
32338 +       return qb_attr_code_decode_64(&code_scn_ctx_lo, p);
32339 +}
32340 +
32341 +uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn)
32342 +{
32343 +       const uint32_t *p = qb_cl(scn);
32344 +
32345 +       return (uint8_t)qb_attr_code_decode(&code_scn_state_in_mem, p);
32346 +}
32347 +
32348 +uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)
32349 +{
32350 +       const uint32_t *p = qb_cl(scn);
32351 +       uint32_t result_rid;
32352 +
32353 +       result_rid = qb_attr_code_decode(&code_scn_rid_in_mem, p);
32354 +       return make_le24(result_rid);
32355 +}
32356 +
32357 +/*****************/
32358 +/* Parsing BPSCN */
32359 +/*****************/
32360 +uint16_t qbman_result_bpscn_bpid(const struct qbman_result *scn)
32361 +{
32362 +       return (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0x3FFF;
32363 +}
32364 +
32365 +int qbman_result_bpscn_has_free_bufs(const struct qbman_result *scn)
32366 +{
32367 +       return !(int)(qbman_result_SCN_state_in_mem(scn) & 0x1);
32368 +}
32369 +
32370 +int qbman_result_bpscn_is_depleted(const struct qbman_result *scn)
32371 +{
32372 +       return (int)(qbman_result_SCN_state_in_mem(scn) & 0x2);
32373 +}
32374 +
32375 +int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)
32376 +{
32377 +       return (int)(qbman_result_SCN_state_in_mem(scn) & 0x4);
32378 +}
32379 +
32380 +uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
32381 +{
32382 +       uint64_t ctx;
32383 +       uint32_t ctx_hi, ctx_lo;
32384 +
32385 +       ctx = qbman_result_SCN_ctx(scn);
32386 +       ctx_hi = upper32(ctx);
32387 +       ctx_lo = lower32(ctx);
32388 +       return ((uint64_t)make_le32(ctx_hi) << 32 |
32389 +               (uint64_t)make_le32(ctx_lo));
32390 +}
32391 +
32392 +/*****************/
32393 +/* Parsing CGCU  */
32394 +/*****************/
32395 +uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)
32396 +{
32397 +       return (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0xFFFF;
32398 +}
32399 +
32400 +uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
32401 +{
32402 +       uint64_t ctx;
32403 +       uint32_t ctx_hi, ctx_lo;
32404 +
32405 +       ctx = qbman_result_SCN_ctx(scn);
32406 +       ctx_hi = upper32(ctx);
32407 +       ctx_lo = lower32(ctx);
32408 +       return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |
32409 +               (uint64_t)make_le32(ctx_lo);
32410 +}
32411 +
32412 +/******************/
32413 +/* Buffer release */
32414 +/******************/
32415 +
32416 +/* These should be const, eventually */
32417 +/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
32418 +static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
32419 +static struct qb_attr_code code_release_rcdi = QB_CODE(0, 6, 1);
32420 +static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
32421 +
32422 +void qbman_release_desc_clear(struct qbman_release_desc *d)
32423 +{
32424 +       uint32_t *cl;
32425 +
32426 +       memset(d, 0, sizeof(*d));
32427 +       cl = qb_cl(d);
32428 +       qb_attr_code_encode(&code_release_set_me, cl, 1);
32429 +}
32430 +
32431 +void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
32432 +{
32433 +       uint32_t *cl = qb_cl(d);
32434 +
32435 +       qb_attr_code_encode(&code_release_bpid, cl, bpid);
32436 +}
32437 +
32438 +void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable)
32439 +{
32440 +       uint32_t *cl = qb_cl(d);
32441 +
32442 +       qb_attr_code_encode(&code_release_rcdi, cl, !!enable);
32443 +}
32444 +
32445 +#define RAR_IDX(rar)     ((rar) & 0x7)
32446 +#define RAR_VB(rar)      ((rar) & 0x80)
32447 +#define RAR_SUCCESS(rar) ((rar) & 0x100)
32448 +
32449 +int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
32450 +                     const uint64_t *buffers, unsigned int num_buffers)
32451 +{
32452 +       uint32_t *p;
32453 +       const uint32_t *cl = qb_cl(d);
32454 +       uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
32455 +
32456 +       pr_debug("RAR=%08x\n", rar);
32457 +       if (!RAR_SUCCESS(rar))
32458 +               return -EBUSY;
32459 +       BUG_ON(!num_buffers || (num_buffers > 7));
32460 +       /* Start the release command */
32461 +       p = qbman_cena_write_start_wo_shadow(&s->sys,
32462 +                                            QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
32463 +       /* Copy the caller's buffer pointers to the command */
32464 +       u64_to_le32_copy(&p[2], buffers, num_buffers);
32465 +       /* Set the verb byte, have to substitute in the valid-bit and the number
32466 +        * of buffers. */
32467 +       lwsync();
32468 +       p[0] = cl[0] | RAR_VB(rar) | num_buffers;
32469 +       qbman_cena_write_complete_wo_shadow(&s->sys,
32470 +                                           QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
32471 +       return 0;
32472 +}
32473 +
32474 +/*******************/
32475 +/* Buffer acquires */
32476 +/*******************/
32477 +
32478 +/* These should be const, eventually */
32479 +static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
32480 +static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
32481 +static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
32482 +
32483 +int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
32484 +                     unsigned int num_buffers)
32485 +{
32486 +       uint32_t *p;
32487 +       uint32_t rslt, num;
32488 +
32489 +       BUG_ON(!num_buffers || (num_buffers > 7));
32490 +
32491 +       /* Start the management command */
32492 +       p = qbman_swp_mc_start(s);
32493 +
32494 +       if (!p)
32495 +               return -EBUSY;
32496 +
32497 +       /* Encode the caller-provided attributes */
32498 +       qb_attr_code_encode(&code_acquire_bpid, p, bpid);
32499 +       qb_attr_code_encode(&code_acquire_num, p, num_buffers);
32500 +
32501 +       /* Complete the management command */
32502 +       p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
32503 +
32504 +       /* Decode the outcome */
32505 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
32506 +       num = qb_attr_code_decode(&code_acquire_r_num, p);
32507 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != QBMAN_MC_ACQUIRE);
32508 +
32509 +       /* Determine success or failure */
32510 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
32511 +               pr_err("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
32512 +                      bpid, rslt);
32513 +               return -EIO;
32514 +       }
32515 +       BUG_ON(num > num_buffers);
32516 +       /* Copy the acquired buffers to the caller's array */
32517 +       u64_from_le32_copy(buffers, &p[2], num);
32518 +       return (int)num;
32519 +}
32520 +
32521 +/*****************/
32522 +/* FQ management */
32523 +/*****************/
32524 +
32525 +static struct qb_attr_code code_fqalt_fqid = QB_CODE(1, 0, 32);
32526 +
32527 +static int qbman_swp_alt_fq_state(struct qbman_swp *s, uint32_t fqid,
32528 +                                 uint8_t alt_fq_verb)
32529 +{
32530 +       uint32_t *p;
32531 +       uint32_t rslt;
32532 +
32533 +       /* Start the management command */
32534 +       p = qbman_swp_mc_start(s);
32535 +       if (!p)
32536 +               return -EBUSY;
32537 +
32538 +       qb_attr_code_encode(&code_fqalt_fqid, p, fqid);
32539 +       /* Complete the management command */
32540 +       p = qbman_swp_mc_complete(s, p, p[0] | alt_fq_verb);
32541 +
32542 +       /* Decode the outcome */
32543 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
32544 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != alt_fq_verb);
32545 +
32546 +       /* Determine success or failure */
32547 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
32548 +               pr_err("ALT FQID %d failed: verb = 0x%08x, code = 0x%02x\n",
32549 +                      fqid, alt_fq_verb, rslt);
32550 +               return -EIO;
32551 +       }
32552 +
32553 +       return 0;
32554 +}
32555 +
32556 +int qbman_swp_fq_schedule(struct qbman_swp *s, uint32_t fqid)
32557 +{
32558 +       return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_SCHEDULE);
32559 +}
32560 +
32561 +int qbman_swp_fq_force(struct qbman_swp *s, uint32_t fqid)
32562 +{
32563 +       return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_FORCE);
32564 +}
32565 +
32566 +int qbman_swp_fq_xon(struct qbman_swp *s, uint32_t fqid)
32567 +{
32568 +       return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_XON);
32569 +}
32570 +
32571 +int qbman_swp_fq_xoff(struct qbman_swp *s, uint32_t fqid)
32572 +{
32573 +       return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_XOFF);
32574 +}
32575 +
32576 +/**********************/
32577 +/* Channel management */
32578 +/**********************/
32579 +
32580 +static struct qb_attr_code code_cdan_cid = QB_CODE(0, 16, 12);
32581 +static struct qb_attr_code code_cdan_we = QB_CODE(1, 0, 8);
32582 +static struct qb_attr_code code_cdan_en = QB_CODE(1, 8, 1);
32583 +static struct qb_attr_code code_cdan_ctx_lo = QB_CODE(2, 0, 32);
32584 +
32585 +/* Hide "ICD" for now as we don't use it, don't set it, and don't test it, so it
32586 + * would be irresponsible to expose it. */
32587 +#define CODE_CDAN_WE_EN    0x1
32588 +#define CODE_CDAN_WE_CTX   0x4
32589 +
32590 +static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,
32591 +                             uint8_t we_mask, uint8_t cdan_en,
32592 +                             uint64_t ctx)
32593 +{
32594 +       uint32_t *p;
32595 +       uint32_t rslt;
32596 +
32597 +       /* Start the management command */
32598 +       p = qbman_swp_mc_start(s);
32599 +       if (!p)
32600 +               return -EBUSY;
32601 +
32602 +       /* Encode the caller-provided attributes */
32603 +       qb_attr_code_encode(&code_cdan_cid, p, channelid);
32604 +       qb_attr_code_encode(&code_cdan_we, p, we_mask);
32605 +       qb_attr_code_encode(&code_cdan_en, p, cdan_en);
32606 +       qb_attr_code_encode_64(&code_cdan_ctx_lo, (uint64_t *)p, ctx);
32607 +       /* Complete the management command */
32608 +       p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_WQCHAN_CONFIGURE);
32609 +
32610 +       /* Decode the outcome */
32611 +       rslt = qb_attr_code_decode(&code_generic_rslt, p);
32612 +       BUG_ON(qb_attr_code_decode(&code_generic_verb, p)
32613 +                                       != QBMAN_WQCHAN_CONFIGURE);
32614 +
32615 +       /* Determine success or failure */
32616 +       if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
32617 +               pr_err("CDAN cQID %d failed: code = 0x%02x\n",
32618 +                      channelid, rslt);
32619 +               return -EIO;
32620 +       }
32621 +
32622 +       return 0;
32623 +}
32624 +
32625 +int qbman_swp_CDAN_set_context(struct qbman_swp *s, uint16_t channelid,
32626 +                              uint64_t ctx)
32627 +{
32628 +       return qbman_swp_CDAN_set(s, channelid,
32629 +                                 CODE_CDAN_WE_CTX,
32630 +                                 0, ctx);
32631 +}
32632 +
32633 +int qbman_swp_CDAN_enable(struct qbman_swp *s, uint16_t channelid)
32634 +{
32635 +       return qbman_swp_CDAN_set(s, channelid,
32636 +                                 CODE_CDAN_WE_EN,
32637 +                                 1, 0);
32638 +}
32639 +
32640 +int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid)
32641 +{
32642 +       return qbman_swp_CDAN_set(s, channelid,
32643 +                                 CODE_CDAN_WE_EN,
32644 +                                 0, 0);
32645 +}
32646 +
32647 +int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,
32648 +                                     uint64_t ctx)
32649 +{
32650 +       return qbman_swp_CDAN_set(s, channelid,
32651 +                                 CODE_CDAN_WE_EN | CODE_CDAN_WE_CTX,
32652 +                                 1, ctx);
32653 +}
32654 +
32655 +uint8_t qbman_get_dqrr_idx(struct qbman_result *dqrr)
32656 +{
32657 +       return QBMAN_IDX_FROM_DQRR(dqrr);
32658 +}
32659 +
32660 +struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx)
32661 +{
32662 +       struct qbman_result *dq;
32663 +
32664 +       dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(idx));
32665 +       return dq;
32666 +}
32667 +
32668 +int qbman_swp_send_multiple(struct qbman_swp *s,
32669 +                           const struct qbman_eq_desc *d,
32670 +                           const struct qbman_fd *fd,
32671 +                           int frames_to_send)
32672 +{
32673 +       uint32_t *p;
32674 +       const uint32_t *cl = qb_cl(d);
32675 +       uint32_t eqcr_ci;
32676 +       uint8_t diff;
32677 +       int sent = 0;
32678 +       int i;
32679 +       int initial_pi = s->eqcr.pi;
32680 +       uint64_t start_pointer;
32681 +
32682 +       if (!s->eqcr.available) {
32683 +               eqcr_ci = s->eqcr.ci;
32684 +               s->eqcr.ci = qbman_cena_read_reg(&s->sys,
32685 +                                QBMAN_CENA_SWP_EQCR_CI) & 0xF;
32686 +               diff = qm_cyc_diff(QBMAN_EQCR_SIZE,
32687 +                          eqcr_ci, s->eqcr.ci);
32688 +               if (!diff)
32689 +                       goto done;
32690 +               s->eqcr.available += diff;
32691 +       }
32692 +
32693 +       /* we are trying to send frames_to_send  if we have enough space in the ring */
32694 +       while (s->eqcr.available && frames_to_send--) {
32695 +               p = qbman_cena_write_start_wo_shadow_fast(&s->sys,
32696 +                                               QBMAN_CENA_SWP_EQCR((initial_pi) & 7));
32697 +               /* Write command (except of first byte) and FD */
32698 +               memcpy(&p[1], &cl[1], 7*4);
32699 +               memcpy(&p[8], &fd[sent], sizeof(struct qbman_fd));
32700 +
32701 +               initial_pi++;
32702 +               initial_pi &= 0xF;
32703 +               s->eqcr.available--;
32704 +               sent++;
32705 +       }
32706 +
32707 +       done:
32708 +       initial_pi =  s->eqcr.pi;
32709 +       lwsync();
32710 +
32711 +       /* in order for flushes to complete faster */
32712 +       /*For that we use a following trick: we record all lines in 32 bit word */
32713 +
32714 +       initial_pi =  s->eqcr.pi;
32715 +       for (i = 0; i < sent; i++) {
32716 +               p = qbman_cena_write_start_wo_shadow_fast(&s->sys,
32717 +                                               QBMAN_CENA_SWP_EQCR((initial_pi) & 7));
32718 +
32719 +               p[0] = cl[0] | s->eqcr.pi_vb;
32720 +               initial_pi++;
32721 +               initial_pi &= 0xF;
32722 +
32723 +               if (!(initial_pi & 7))
32724 +                       s->eqcr.pi_vb ^= QB_VALID_BIT;
32725 +       }
32726 +
32727 +       initial_pi = s->eqcr.pi;
32728 +
32729 +       /* We need  to flush all the lines but without load/store operations between them */
32730 +  /* We assign start_pointer  before we start loop so that in loop we do not read it from memory */
32731 +       start_pointer = (uint64_t)s->sys.addr_cena;
32732 +       for (i = 0; i < sent; i++) {
32733 +               p = (uint32_t *)(start_pointer + QBMAN_CENA_SWP_EQCR(initial_pi & 7));
32734 +               dcbf((uint64_t)p);
32735 +               initial_pi++;
32736 +               initial_pi &= 0xF;
32737 +       }
32738 +
32739 +       /* Update producer index for the next call */
32740 +       s->eqcr.pi = initial_pi;
32741 +
32742 +       return sent;
32743 +}
32744 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_portal.h b/drivers/net/dpaa2/qbman/driver/qbman_portal.h
32745 new file mode 100644
32746 index 0000000..17f1c53
32747 --- /dev/null
32748 +++ b/drivers/net/dpaa2/qbman/driver/qbman_portal.h
32749 @@ -0,0 +1,270 @@
32750 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
32751 + *
32752 + * Redistribution and use in source and binary forms, with or without
32753 + * modification, are permitted provided that the following conditions are met:
32754 + *     * Redistributions of source code must retain the above copyright
32755 + *       notice, this list of conditions and the following disclaimer.
32756 + *     * Redistributions in binary form must reproduce the above copyright
32757 + *       notice, this list of conditions and the following disclaimer in the
32758 + *       documentation and/or other materials provided with the distribution.
32759 + *     * Neither the name of Freescale Semiconductor nor the
32760 + *       names of its contributors may be used to endorse or promote products
32761 + *       derived from this software without specific prior written permission.
32762 + *
32763 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
32764 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32765 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32766 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
32767 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32768 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
32769 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32770 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32771 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32772 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32773 + */
32774 +
32775 +#include "qbman_private.h"
32776 +#include <drivers/fsl_qbman_portal.h>
32777 +
32778 +uint32_t qman_version;
32779 +/* All QBMan command and result structures use this "valid bit" encoding */
32780 +#define QB_VALID_BIT ((uint32_t)0x80)
32781 +
32782 +/* Management command result codes */
32783 +#define QBMAN_MC_RSLT_OK      0xf0
32784 +
32785 +/* QBMan DQRR size is set at runtime in qbman_portal.c */
32786 +
32787 +#define QBMAN_EQCR_SIZE 8
32788 +
32789 +static inline u8 qm_cyc_diff(u8 ringsize, u8 first, u8 last)
32790 +{
32791 +       /* 'first' is included, 'last' is excluded */
32792 +       if (first <= last)
32793 +               return last - first;
32794 +       return (2 * ringsize) + last - first;
32795 +}
32796 +
32797 +/* --------------------- */
32798 +/* portal data structure */
32799 +/* --------------------- */
32800 +
32801 +struct qbman_swp {
32802 +       const struct qbman_swp_desc *desc;
32803 +       /* The qbman_sys (ie. arch/OS-specific) support code can put anything it
32804 +        * needs in here. */
32805 +       struct qbman_swp_sys sys;
32806 +       /* Management commands */
32807 +       struct {
32808 +#ifdef QBMAN_CHECKING
32809 +               enum swp_mc_check {
32810 +                       swp_mc_can_start, /* call __qbman_swp_mc_start() */
32811 +                       swp_mc_can_submit, /* call __qbman_swp_mc_submit() */
32812 +                       swp_mc_can_poll, /* call __qbman_swp_mc_result() */
32813 +               } check;
32814 +#endif
32815 +               uint32_t valid_bit; /* 0x00 or 0x80 */
32816 +       } mc;
32817 +       /* Push dequeues */
32818 +       uint32_t sdq;
32819 +       /* Volatile dequeues */
32820 +       struct {
32821 +               /* VDQCR supports a "1 deep pipeline", meaning that if you know
32822 +                * the last-submitted command is already executing in the
32823 +                * hardware (as evidenced by at least 1 valid dequeue result),
32824 +                * you can write another dequeue command to the register, the
32825 +                * hardware will start executing it as soon as the
32826 +                * already-executing command terminates. (This minimises latency
32827 +                * and stalls.) With that in mind, this "busy" variable refers
32828 +                * to whether or not a command can be submitted, not whether or
32829 +                * not a previously-submitted command is still executing. In
32830 +                * other words, once proof is seen that the previously-submitted
32831 +                * command is executing, "vdq" is no longer "busy". */
32832 +               atomic_t busy;
32833 +               uint32_t valid_bit; /* 0x00 or 0x80 */
32834 +               /* We need to determine when vdq is no longer busy. This depends
32835 +                * on whether the "busy" (last-submitted) dequeue command is
32836 +                * targeting DQRR or main-memory, and detected is based on the
32837 +                * presence of the dequeue command's "token" showing up in
32838 +                * dequeue entries in DQRR or main-memory (respectively). */
32839 +               struct qbman_result *storage; /* NULL if DQRR */
32840 +       } vdq;
32841 +       /* DQRR */
32842 +       struct {
32843 +               uint32_t next_idx;
32844 +               uint32_t valid_bit;
32845 +               uint8_t dqrr_size;
32846 +               int reset_bug;
32847 +       } dqrr;
32848 +       struct {
32849 +               uint32_t pi;
32850 +               uint32_t pi_vb;
32851 +               uint32_t ci;
32852 +               int available;
32853 +       } eqcr;
32854 +};
32855 +
32856 +/* -------------------------- */
32857 +/* portal management commands */
32858 +/* -------------------------- */
32859 +
32860 +/* Different management commands all use this common base layer of code to issue
32861 + * commands and poll for results. The first function returns a pointer to where
32862 + * the caller should fill in their MC command (though they should ignore the
32863 + * verb byte), the second function commits merges in the caller-supplied command
32864 + * verb (which should not include the valid-bit) and submits the command to
32865 + * hardware, and the third function checks for a completed response (returns
32866 + * non-NULL if only if the response is complete). */
32867 +void *qbman_swp_mc_start(struct qbman_swp *p);
32868 +void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);
32869 +void *qbman_swp_mc_result(struct qbman_swp *p);
32870 +
32871 +/* Wraps up submit + poll-for-result */
32872 +static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
32873 +                                         uint32_t cmd_verb)
32874 +{
32875 +       int loopvar;
32876 +
32877 +       qbman_swp_mc_submit(swp, cmd, cmd_verb);
32878 +       DBG_POLL_START(loopvar);
32879 +       do {
32880 +               DBG_POLL_CHECK(loopvar);
32881 +               cmd = qbman_swp_mc_result(swp);
32882 +       } while (!cmd);
32883 +       return cmd;
32884 +}
32885 +
32886 +/* ------------ */
32887 +/* qb_attr_code */
32888 +/* ------------ */
32889 +
32890 +/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
32891 + * is either serving as a configuration command or a query result. The
32892 + * representation is inherently little-endian, as the indexing of the words is
32893 + * itself little-endian in nature and DPAA2 QBMan is little endian for anything
32894 + * that crosses a word boundary too (64-bit fields are the obvious examples).
32895 + */
32896 +struct qb_attr_code {
32897 +       unsigned int word; /* which uint32_t[] array member encodes the field */
32898 +       unsigned int lsoffset; /* encoding offset from ls-bit */
32899 +       unsigned int width; /* encoding width. (bool must be 1.) */
32900 +};
32901 +
32902 +/* Some pre-defined codes */
32903 +extern struct qb_attr_code code_generic_verb;
32904 +extern struct qb_attr_code code_generic_rslt;
32905 +
32906 +/* Macros to define codes */
32907 +#define QB_CODE(a, b, c) { a, b, c}
32908 +#define QB_CODE_NULL \
32909 +       QB_CODE((unsigned int)-1, (unsigned int)-1, (unsigned int)-1)
32910 +
32911 +/* Rotate a code "ms", meaning that it moves from less-significant bytes to
32912 + * more-significant, from less-significant words to more-significant, etc. The
32913 + * "ls" version does the inverse, from more-significant towards
32914 + * less-significant.
32915 + */
32916 +static inline void qb_attr_code_rotate_ms(struct qb_attr_code *code,
32917 +                                         unsigned int bits)
32918 +{
32919 +       code->lsoffset += bits;
32920 +       while (code->lsoffset > 31) {
32921 +               code->word++;
32922 +               code->lsoffset -= 32;
32923 +       }
32924 +}
32925 +
32926 +static inline void qb_attr_code_rotate_ls(struct qb_attr_code *code,
32927 +                                         unsigned int bits)
32928 +{
32929 +       /* Don't be fooled, this trick should work because the types are
32930 +        * unsigned. So the case that interests the while loop (the rotate has
32931 +        * gone too far and the word count needs to compensate for it), is
32932 +        * manifested when lsoffset is negative. But that equates to a really
32933 +        * large unsigned value, starting with lots of "F"s. As such, we can
32934 +        * continue adding 32 back to it until it wraps back round above zero,
32935 +        * to a value of 31 or less...
32936 +        */
32937 +       code->lsoffset -= bits;
32938 +       while (code->lsoffset > 31) {
32939 +               code->word--;
32940 +               code->lsoffset += 32;
32941 +       }
32942 +}
32943 +
32944 +/* Implement a loop of code rotations until 'expr' evaluates to FALSE (0). */
32945 +#define qb_attr_code_for_ms(code, bits, expr) \
32946 +               for (; expr; qb_attr_code_rotate_ms(code, bits))
32947 +#define qb_attr_code_for_ls(code, bits, expr) \
32948 +               for (; expr; qb_attr_code_rotate_ls(code, bits))
32949 +
32950 +/* decode a field from a cacheline */
32951 +static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
32952 +                                          const uint32_t *cacheline)
32953 +{
32954 +       return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
32955 +}
32956 +
32957 +static inline uint64_t qb_attr_code_decode_64(const struct qb_attr_code *code,
32958 +                                             const uint64_t *cacheline)
32959 +{
32960 +       return cacheline[code->word / 2];
32961 +}
32962 +
32963 +/* encode a field to a cacheline */
32964 +static inline void qb_attr_code_encode(const struct qb_attr_code *code,
32965 +                                      uint32_t *cacheline, uint32_t val)
32966 +{
32967 +       cacheline[code->word] =
32968 +               r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
32969 +               | e32_uint32_t(code->lsoffset, code->width, val);
32970 +}
32971 +
32972 +static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
32973 +                                         uint64_t *cacheline, uint64_t val)
32974 +{
32975 +       cacheline[code->word / 2] = val;
32976 +}
32977 +
32978 +/* Small-width signed values (two's-complement) will decode into medium-width
32979 + * positives. (Eg. for an 8-bit signed field, which stores values from -128 to
32980 + * +127, a setting of -7 would appear to decode to the 32-bit unsigned value
32981 + * 249. Likewise -120 would decode as 136.) This function allows the caller to
32982 + * "re-sign" such fields to 32-bit signed. (Eg. -7, which was 249 with an 8-bit
32983 + * encoding, will become 0xfffffff9 if you cast the return value to uint32_t).
32984 + */
32985 +static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
32986 +                                             uint32_t val)
32987 +{
32988 +       BUG_ON(val >= (1u << code->width));
32989 +       /* code->width should never exceed the width of val. If it does then a
32990 +        * different function with larger val size must be used to translate
32991 +        * from unsigned to signed */
32992 +       BUG_ON(code->width > sizeof(val) * CHAR_BIT);
32993 +       /* If the high bit was set, it was encoding a negative */
32994 +       if (val >= 1u << (code->width - 1))
32995 +               return (int32_t)0 - (int32_t)(((uint32_t)1 << code->width) -
32996 +                       val);
32997 +       /* Otherwise, it was encoding a positive */
32998 +       return (int32_t)val;
32999 +}
33000 +
33001 +/* ---------------------- */
33002 +/* Descriptors/cachelines */
33003 +/* ---------------------- */
33004 +
33005 +/* To avoid needless dynamic allocation, the driver API often gives the caller
33006 + * a "descriptor" type that the caller can instantiate however they like.
33007 + * Ultimately though, it is just a cacheline of binary storage (or something
33008 + * smaller when it is known that the descriptor doesn't need all 64 bytes) for
33009 + * holding pre-formatted pieces of hardware commands. The performance-critical
33010 + * code can then copy these descriptors directly into hardware command
33011 + * registers more efficiently than trying to construct/format commands
33012 + * on-the-fly. The API user sees the descriptor as an array of 32-bit words in
33013 + * order for the compiler to know its size, but the internal details are not
33014 + * exposed. The following macro is used within the driver for converting *any*
33015 + * descriptor pointer to a usable array pointer. The use of a macro (instead of
33016 + * an inline) is necessary to work with different descriptor types and to work
33017 + * correctly with const and non-const inputs (and similarly-qualified outputs).
33018 + */
33019 +#define qb_cl(d) (&(d)->dont_manipulate_directly[0])
33020 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_private.h b/drivers/net/dpaa2/qbman/driver/qbman_private.h
33021 new file mode 100644
33022 index 0000000..624ede1
33023 --- /dev/null
33024 +++ b/drivers/net/dpaa2/qbman/driver/qbman_private.h
33025 @@ -0,0 +1,168 @@
33026 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
33027 + *
33028 + * Redistribution and use in source and binary forms, with or without
33029 + * modification, are permitted provided that the following conditions are met:
33030 + *     * Redistributions of source code must retain the above copyright
33031 + *       notice, this list of conditions and the following disclaimer.
33032 + *     * Redistributions in binary form must reproduce the above copyright
33033 + *       notice, this list of conditions and the following disclaimer in the
33034 + *       documentation and/or other materials provided with the distribution.
33035 + *     * Neither the name of Freescale Semiconductor nor the
33036 + *       names of its contributors may be used to endorse or promote products
33037 + *       derived from this software without specific prior written permission.
33038 + *
33039 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
33040 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33041 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33042 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
33043 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33044 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33045 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
33046 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33047 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33048 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33049 +*/
33050 +
33051 +/* Perform extra checking */
33052 +#define QBMAN_CHECKING
33053 +
33054 +/* To maximise the amount of logic that is common between the Linux driver and
33055 + * other targets (such as the embedded MC firmware), we pivot here between the
33056 + * inclusion of two platform-specific headers.
33057 + *
33058 + * The first, qbman_sys_decl.h, includes any and all required system headers as
33059 + * well as providing any definitions for the purposes of compatibility. The
33060 + * second, qbman_sys.h, is where platform-specific routines go.
33061 + *
33062 + * The point of the split is that the platform-independent code (including this
33063 + * header) may depend on platform-specific declarations, yet other
33064 + * platform-specific routines may depend on platform-independent definitions.
33065 + */
33066 +
33067 +#include "qbman_sys_decl.h"
33068 +
33069 +/* When things go wrong, it is a convenient trick to insert a few FOO()
33070 + * statements in the code to trace progress. TODO: remove this once we are
33071 + * hacking the code less actively.
33072 + */
33073 +#define FOO() fsl_os_print("FOO: %s:%d\n", __FILE__, __LINE__)
33074 +
33075 +/* Any time there is a register interface which we poll on, this provides a
33076 + * "break after x iterations" scheme for it. It's handy for debugging, eg.
33077 + * where you don't want millions of lines of log output from a polling loop
33078 + * that won't, because such things tend to drown out the earlier log output
33079 + * that might explain what caused the problem. (NB: put ";" after each macro!)
33080 + * TODO: we should probably remove this once we're done sanitising the
33081 + * simulator...
33082 + */
33083 +#define DBG_POLL_START(loopvar) (loopvar = 10)
33084 +#define DBG_POLL_CHECK(loopvar) \
33085 +       do {if (!(loopvar--)) BUG_ON(NULL == "DBG_POLL_CHECK"); } while (0)
33086 +
33087 +/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
33088 + * and widths, these macro-generated encode/decode/isolate/remove inlines can
33089 + * be used.
33090 + *
33091 + * Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type),
33092 + * where the field is located 3 bits "up" from the least-significant bit of the
33093 + * register (ie. the field location within the 32-bit register corresponds to a
33094 + * mask of 0x0001fff8), you would do;
33095 + *                uint16_t field = d32_uint16_t(3, 14, reg_value);
33096 + *
33097 + * Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
33098 + * non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
33099 + * operator) into a register at bit location 0x00080000 (19 bits "in" from the
33100 + * LS bit), do;
33101 + *                reg_value |= e32_int(19, 1, !!field);
33102 + *
33103 + * If you wish to read-modify-write a register, such that you leave the 14-bit
33104 + * field as-is but have all other fields set to zero, then "i"solate the 14-bit
33105 + * value using;
33106 + *                reg_value = i32_uint16_t(3, 14, reg_value);
33107 + *
33108 + * Alternatively, you could "r"emove the 1-bit boolean field (setting it to
33109 + * zero) but leaving all other fields as-is;
33110 + *                reg_val = r32_int(19, 1, reg_value);
33111 + *
33112 + */
33113 +#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
33114 +                                (uint32_t)((1 << width) - 1))
33115 +#define DECLARE_CODEC32(t) \
33116 +static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \
33117 +{ \
33118 +       BUG_ON(width > (sizeof(t) * 8)); \
33119 +       return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \
33120 +} \
33121 +static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \
33122 +{ \
33123 +       BUG_ON(width > (sizeof(t) * 8)); \
33124 +       return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
33125 +} \
33126 +static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \
33127 +                               uint32_t val) \
33128 +{ \
33129 +       BUG_ON(width > (sizeof(t) * 8)); \
33130 +       return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
33131 +} \
33132 +static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \
33133 +                               uint32_t val) \
33134 +{ \
33135 +       BUG_ON(width > (sizeof(t) * 8)); \
33136 +       return ~(MAKE_MASK32(width) << lsoffset) & val; \
33137 +}
33138 +DECLARE_CODEC32(uint32_t)
33139 +DECLARE_CODEC32(uint16_t)
33140 +DECLARE_CODEC32(uint8_t)
33141 +DECLARE_CODEC32(int)
33142 +
33143 +       /*********************/
33144 +       /* Debugging assists */
33145 +       /*********************/
33146 +
33147 +static inline void __hexdump(unsigned long start, unsigned long end,
33148 +                            unsigned long p, size_t sz, const unsigned char *c)
33149 +{
33150 +       while (start < end) {
33151 +               unsigned int pos = 0;
33152 +               char buf[64];
33153 +               int nl = 0;
33154 +
33155 +               pos += sprintf(buf + pos, "%08lx: ", start);
33156 +               do {
33157 +                       if ((start < p) || (start >= (p + sz)))
33158 +                               pos += sprintf(buf + pos, "..");
33159 +                       else
33160 +                               pos += sprintf(buf + pos, "%02x", *(c++));
33161 +                       if (!(++start & 15)) {
33162 +                               buf[pos++] = '\n';
33163 +                               nl = 1;
33164 +                       } else {
33165 +                               nl = 0;
33166 +                               if (!(start & 1))
33167 +                                       buf[pos++] = ' ';
33168 +                               if (!(start & 3))
33169 +                                       buf[pos++] = ' ';
33170 +                       }
33171 +               } while (start & 15);
33172 +               if (!nl)
33173 +                       buf[pos++] = '\n';
33174 +               buf[pos] = '\0';
33175 +               pr_info("%s", buf);
33176 +       }
33177 +}
33178 +
33179 +static inline void hexdump(const void *ptr, size_t sz)
33180 +{
33181 +       unsigned long p = (unsigned long)ptr;
33182 +       unsigned long start = p & ~(unsigned long)15;
33183 +       unsigned long end = (p + sz + 15) & ~(unsigned long)15;
33184 +       const unsigned char *c = ptr;
33185 +
33186 +       __hexdump(start, end, p, sz, c);
33187 +}
33188 +
33189 +#define QMAN_REV_4000   0x04000000
33190 +#define QMAN_REV_4100   0x04010000
33191 +#define QMAN_REV_4101   0x04010001
33192 +
33193 +#include "qbman_sys.h"
33194 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_sys.h b/drivers/net/dpaa2/qbman/driver/qbman_sys.h
33195 new file mode 100644
33196 index 0000000..a39fa71
33197 --- /dev/null
33198 +++ b/drivers/net/dpaa2/qbman/driver/qbman_sys.h
33199 @@ -0,0 +1,373 @@
33200 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
33201 + *
33202 + * Redistribution and use in source and binary forms, with or without
33203 + * modification, are permitted provided that the following conditions are met:
33204 + *     * Redistributions of source code must retain the above copyright
33205 + *       notice, this list of conditions and the following disclaimer.
33206 + *     * Redistributions in binary form must reproduce the above copyright
33207 + *       notice, this list of conditions and the following disclaimer in the
33208 + *       documentation and/or other materials provided with the distribution.
33209 + *     * Neither the name of Freescale Semiconductor nor the
33210 + *       names of its contributors may be used to endorse or promote products
33211 + *       derived from this software without specific prior written permission.
33212 + *
33213 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
33214 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33215 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33216 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
33217 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33218 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33219 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
33220 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33221 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33222 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33223 + */
33224 +/* qbman_sys_decl.h and qbman_sys.h are the two platform-specific files in the
33225 + * driver. They are only included via qbman_private.h, which is itself a
33226 + * platform-independent file and is included by all the other driver source.
33227 + *
33228 + * qbman_sys_decl.h is included prior to all other declarations and logic, and
33229 + * it exists to provide compatibility with any linux interfaces our
33230 + * single-source driver code is dependent on (eg. kmalloc). Ie. this file
33231 + * provides linux compatibility.
33232 + *
33233 + * This qbman_sys.h header, on the other hand, is included *after* any common
33234 + * and platform-neutral declarations and logic in qbman_private.h, and exists to
33235 + * implement any platform-specific logic of the qbman driver itself. Ie. it is
33236 + * *not* to provide linux compatibility.
33237 + */
33238 +
33239 +/* Trace the 3 different classes of read/write access to QBMan. #undef as
33240 + * required. */
33241 +#undef QBMAN_CCSR_TRACE
33242 +#undef QBMAN_CINH_TRACE
33243 +#undef QBMAN_CENA_TRACE
33244 +
33245 +static inline void word_copy(void *d, const void *s, unsigned int cnt)
33246 +{
33247 +       uint32_t *dd = d;
33248 +       const uint32_t *ss = s;
33249 +
33250 +       while (cnt--)
33251 +               *(dd++) = *(ss++);
33252 +}
33253 +
33254 +/* Currently, the CENA support code expects each 32-bit word to be written in
33255 + * host order, and these are converted to hardware (little-endian) order on
33256 + * command submission. However, 64-bit quantities are must be written (and read)
33257 + * as two 32-bit words with the least-significant word first, irrespective of
33258 + * host endianness. */
33259 +static inline void u64_to_le32_copy(void *d, const uint64_t *s,
33260 +                                   unsigned int cnt)
33261 +{
33262 +       uint32_t *dd = d;
33263 +       const uint32_t *ss = (const uint32_t *)s;
33264 +
33265 +       while (cnt--) {
33266 +               /* TBD: the toolchain was choking on the use of 64-bit types up
33267 +                * until recently so this works entirely with 32-bit variables.
33268 +                * When 64-bit types become usable again, investigate better
33269 +                * ways of doing this. */
33270 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
33271 +               *(dd++) = ss[1];
33272 +               *(dd++) = ss[0];
33273 +               ss += 2;
33274 +#else
33275 +               *(dd++) = *(ss++);
33276 +               *(dd++) = *(ss++);
33277 +#endif
33278 +       }
33279 +}
33280 +
33281 +static inline void u64_from_le32_copy(uint64_t *d, const void *s,
33282 +                                     unsigned int cnt)
33283 +{
33284 +       const uint32_t *ss = s;
33285 +       uint32_t *dd = (uint32_t *)d;
33286 +
33287 +       while (cnt--) {
33288 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
33289 +               dd[1] = *(ss++);
33290 +               dd[0] = *(ss++);
33291 +               dd += 2;
33292 +#else
33293 +               *(dd++) = *(ss++);
33294 +               *(dd++) = *(ss++);
33295 +#endif
33296 +       }
33297 +}
33298 +
33299 +/* Convert a host-native 32bit value into little endian */
33300 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
33301 +static inline uint32_t make_le32(uint32_t val)
33302 +{
33303 +       return ((val & 0xff) << 24) | ((val & 0xff00) << 8) |
33304 +               ((val & 0xff0000) >> 8) | ((val & 0xff000000) >> 24);
33305 +}
33306 +
33307 +static inline uint32_t make_le24(uint32_t val)
33308 +{
33309 +       return (((val & 0xff) << 16) | (val & 0xff00) |
33310 +               ((val & 0xff0000) >> 16));
33311 +}
33312 +#else
33313 +#define make_le32(val) (val)
33314 +#define make_le24(val) (val)
33315 +#endif
33316 +static inline void make_le32_n(uint32_t *val, unsigned int num)
33317 +{
33318 +       while (num--) {
33319 +               *val = make_le32(*val);
33320 +               val++;
33321 +       }
33322 +}
33323 +
33324 +       /******************/
33325 +       /* Portal access  */
33326 +       /******************/
33327 +struct qbman_swp_sys {
33328 +       /* On GPP, the sys support for qbman_swp is here. The CENA region isi
33329 +        * not an mmap() of the real portal registers, but an allocated
33330 +        * place-holder, because the actual writes/reads to/from the portal are
33331 +        * marshalled from these allocated areas using QBMan's "MC access
33332 +        * registers". CINH accesses are atomic so there's no need for a
33333 +        * place-holder. */
33334 +       uint8_t *cena;
33335 +       uint8_t __iomem *addr_cena;
33336 +       uint8_t __iomem *addr_cinh;
33337 +       uint32_t idx;
33338 +       enum qbman_eqcr_mode eqcr_mode;
33339 +};
33340 +
33341 +/* P_OFFSET is (ACCESS_CMD,0,12) - offset within the portal
33342 + * C is (ACCESS_CMD,12,1) - is inhibited? (0==CENA, 1==CINH)
33343 + * SWP_IDX is (ACCESS_CMD,16,10) - Software portal index
33344 + * P is (ACCESS_CMD,28,1) - (0==special portal, 1==any portal)
33345 + * T is (ACCESS_CMD,29,1) - Command type (0==READ, 1==WRITE)
33346 + * E is (ACCESS_CMD,31,1) - Command execute (1 to issue, poll for 0==complete)
33347 + */
33348 +
33349 +static inline void qbman_cinh_write(struct qbman_swp_sys *s, uint32_t offset,
33350 +                                   uint32_t val)
33351 +{
33352 +       __raw_writel(val, s->addr_cinh + offset);
33353 +#ifdef QBMAN_CINH_TRACE
33354 +       pr_info("qbman_cinh_write(%p:%d:0x%03x) 0x%08x\n",
33355 +               s->addr_cinh, s->idx, offset, val);
33356 +#endif
33357 +}
33358 +
33359 +static inline uint32_t qbman_cinh_read(struct qbman_swp_sys *s, uint32_t offset)
33360 +{
33361 +       uint32_t reg = __raw_readl(s->addr_cinh + offset);
33362 +#ifdef QBMAN_CINH_TRACE
33363 +       pr_info("qbman_cinh_read(%p:%d:0x%03x) 0x%08x\n",
33364 +               s->addr_cinh, s->idx, offset, reg);
33365 +#endif
33366 +       return reg;
33367 +}
33368 +
33369 +static inline void *qbman_cena_write_start(struct qbman_swp_sys *s,
33370 +                                          uint32_t offset)
33371 +{
33372 +       void *shadow = s->cena + offset;
33373 +
33374 +#ifdef QBMAN_CENA_TRACE
33375 +       pr_info("qbman_cena_write_start(%p:%d:0x%03x) %p\n",
33376 +               s->addr_cena, s->idx, offset, shadow);
33377 +#endif
33378 +       BUG_ON(offset & 63);
33379 +       dcbz(shadow);
33380 +       return shadow;
33381 +}
33382 +
33383 +static inline void *qbman_cena_write_start_wo_shadow(struct qbman_swp_sys *s,
33384 +                                                    uint32_t offset)
33385 +{
33386 +#ifdef QBMAN_CENA_TRACE
33387 +       pr_info("qbman_cena_write_start(%p:%d:0x%03x)\n",
33388 +               s->addr_cena, s->idx, offset);
33389 +#endif
33390 +       BUG_ON(offset & 63);
33391 +       return (s->addr_cena + offset);
33392 +}
33393 +
33394 +static inline void qbman_cena_write_complete(struct qbman_swp_sys *s,
33395 +                                            uint32_t offset, void *cmd)
33396 +{
33397 +       const uint32_t *shadow = cmd;
33398 +       int loop;
33399 +#ifdef QBMAN_CENA_TRACE
33400 +       pr_info("qbman_cena_write_complete(%p:%d:0x%03x) %p\n",
33401 +               s->addr_cena, s->idx, offset, shadow);
33402 +       hexdump(cmd, 64);
33403 +#endif
33404 +       for (loop = 15; loop >= 1; loop--)
33405 +               __raw_writel(shadow[loop], s->addr_cena +
33406 +                                        offset + loop * 4);
33407 +       lwsync();
33408 +               __raw_writel(shadow[0], s->addr_cena + offset);
33409 +       dcbf(s->addr_cena + offset);
33410 +}
33411 +
33412 +static inline void qbman_cena_write_complete_wo_shadow(struct qbman_swp_sys *s,
33413 +                                                      uint32_t offset)
33414 +{
33415 +#ifdef QBMAN_CENA_TRACE
33416 +       pr_info("qbman_cena_write_complete(%p:%d:0x%03x)\n",
33417 +               s->addr_cena, s->idx, offset);
33418 +       hexdump(cmd, 64);
33419 +#endif
33420 +       dcbf(s->addr_cena + offset);
33421 +}
33422 +
33423 +static inline uint32_t qbman_cena_read_reg(struct qbman_swp_sys *s,
33424 +                                          uint32_t offset)
33425 +{
33426 +       return __raw_readl(s->addr_cena + offset);
33427 +}
33428 +
33429 +static inline void *qbman_cena_read(struct qbman_swp_sys *s, uint32_t offset)
33430 +{
33431 +       uint32_t *shadow = (uint32_t *)(s->cena + offset);
33432 +       unsigned int loop;
33433 +#ifdef QBMAN_CENA_TRACE
33434 +       pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
33435 +               s->addr_cena, s->idx, offset, shadow);
33436 +#endif
33437 +
33438 +       for (loop = 0; loop < 16; loop++)
33439 +               shadow[loop] = __raw_readl(s->addr_cena + offset
33440 +                                       + loop * 4);
33441 +#ifdef QBMAN_CENA_TRACE
33442 +       hexdump(shadow, 64);
33443 +#endif
33444 +       return shadow;
33445 +}
33446 +
33447 +static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
33448 +                                             uint32_t offset)
33449 +{
33450 +#ifdef QBMAN_CENA_TRACE
33451 +       pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
33452 +               s->addr_cena, s->idx, offset, shadow);
33453 +#endif
33454 +
33455 +#ifdef QBMAN_CENA_TRACE
33456 +       hexdump(shadow, 64);
33457 +#endif
33458 +       return s->addr_cena + offset;
33459 +}
33460 +
33461 +static inline void qbman_cena_invalidate(struct qbman_swp_sys *s,
33462 +                                        uint32_t offset)
33463 +{
33464 +       dccivac(s->addr_cena + offset);
33465 +}
33466 +
33467 +static inline void qbman_cena_invalidate_prefetch(struct qbman_swp_sys *s,
33468 +                                                 uint32_t offset)
33469 +{
33470 +       dccivac(s->addr_cena + offset);
33471 +       prefetch_for_load(s->addr_cena + offset);
33472 +}
33473 +
33474 +static inline void qbman_cena_prefetch(struct qbman_swp_sys *s,
33475 +                                      uint32_t offset)
33476 +{
33477 +       prefetch_for_load(s->addr_cena + offset);
33478 +}
33479 +
33480 +       /******************/
33481 +       /* Portal support */
33482 +       /******************/
33483 +
33484 +/* The SWP_CFG portal register is special, in that it is used by the
33485 + * platform-specific code rather than the platform-independent code in
33486 + * qbman_portal.c. So use of it is declared locally here. */
33487 +#define QBMAN_CINH_SWP_CFG   0xd00
33488 +
33489 +/* For MC portal use, we always configure with
33490 + * DQRR_MF is (SWP_CFG,20,3) - DQRR max fill (<- 0x4)
33491 + * EST is (SWP_CFG,16,3) - EQCR_CI stashing threshold (<- 0x2)
33492 + * RPM is (SWP_CFG,12,2) - RCR production notification mode (<- 0x3)
33493 + * DCM is (SWP_CFG,10,2) - DQRR consumption notification mode (<- 0x2)
33494 + * EPM is (SWP_CFG,8,2) - EQCR production notification mode (<- 0x2)
33495 + * SD is (SWP_CFG,5,1) - memory stashing drop enable (<- TRUE)
33496 + * SP is (SWP_CFG,4,1) - memory stashing priority (<- TRUE)
33497 + * SE is (SWP_CFG,3,1) - memory stashing enable (<- TRUE)
33498 + * DP is (SWP_CFG,2,1) - dequeue stashing priority (<- TRUE)
33499 + * DE is (SWP_CFG,1,1) - dequeue stashing enable (<- TRUE)
33500 + * EP is (SWP_CFG,0,1) - EQCR_CI stashing priority (<- TRUE)
33501 + */
33502 +static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
33503 +                                        uint8_t est, uint8_t rpm, uint8_t dcm,
33504 +                                       uint8_t epm, int sd, int sp, int se,
33505 +                                       int dp, int de, int ep)
33506 +{
33507 +       uint32_t reg;
33508 +
33509 +       reg = e32_uint8_t(20, (uint32_t)(3 + (max_fill >> 3)), max_fill) |
33510 +               e32_uint8_t(16, 3, est) |
33511 +               e32_uint8_t(12, 2, rpm) | e32_uint8_t(10, 2, dcm) |
33512 +               e32_uint8_t(8, 2, epm) | e32_int(5, 1, sd) |
33513 +               e32_int(4, 1, sp) | e32_int(3, 1, se) | e32_int(2, 1, dp) |
33514 +               e32_int(1, 1, de) | e32_int(0, 1, ep) | e32_uint8_t(14, 1, wn);
33515 +       return reg;
33516 +}
33517 +
33518 +static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
33519 +                                    const struct qbman_swp_desc *d,
33520 +                                    uint8_t dqrr_size)
33521 +{
33522 +       uint32_t reg;
33523 +
33524 +       s->addr_cena = d->cena_bar;
33525 +       s->addr_cinh = d->cinh_bar;
33526 +       s->idx = (uint32_t)d->idx;
33527 +       s->cena = (void *)get_zeroed_page(GFP_KERNEL);
33528 +       if (!s->cena) {
33529 +               pr_err("Could not allocate page for cena shadow\n");
33530 +               return -1;
33531 +       }
33532 +       s->eqcr_mode = d->eqcr_mode;
33533 +       BUG_ON(d->idx < 0);
33534 +#ifdef QBMAN_CHECKING
33535 +       /* We should never be asked to initialise for a portal that isn't in
33536 +        * the power-on state. (Ie. don't forget to reset portals when they are
33537 +        * decommissioned!)
33538 +        */
33539 +       reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);
33540 +       BUG_ON(reg);
33541 +#endif
33542 +       if (s->eqcr_mode == qman_eqcr_vb_array)
33543 +               reg = qbman_set_swp_cfg(dqrr_size, 0, 0, 3, 2, 3, 1, 1, 1, 1,
33544 +                                       1, 1);
33545 +       else
33546 +               reg = qbman_set_swp_cfg(dqrr_size, 0, 2, 3, 2, 2, 1, 1, 1, 1,
33547 +                                       1, 1);
33548 +       qbman_cinh_write(s, QBMAN_CINH_SWP_CFG, reg);
33549 +       reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);
33550 +       if (!reg) {
33551 +               pr_err("The portal %d is not enabled!\n", s->idx);
33552 +               kfree(s->cena);
33553 +               return -1;
33554 +       }
33555 +       return 0;
33556 +}
33557 +
33558 +static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)
33559 +{
33560 +       free_page((unsigned long)s->cena);
33561 +}
33562 +
33563 +static inline void *qbman_cena_write_start_wo_shadow_fast(struct qbman_swp_sys *s,
33564 +                                                         uint32_t offset)
33565 +{
33566 +#ifdef QBMAN_CENA_TRACE
33567 +       pr_info("qbman_cena_write_start(%p:%d:0x%03x)\n",
33568 +               s->addr_cena, s->idx, offset);
33569 +#endif
33570 +       BUG_ON(offset & 63);
33571 +       return (s->addr_cena + offset);
33572 +}
33573 diff --git a/drivers/net/dpaa2/qbman/driver/qbman_sys_decl.h b/drivers/net/dpaa2/qbman/driver/qbman_sys_decl.h
33574 new file mode 100644
33575 index 0000000..bbf3627
33576 --- /dev/null
33577 +++ b/drivers/net/dpaa2/qbman/driver/qbman_sys_decl.h
33578 @@ -0,0 +1,69 @@
33579 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
33580 + *
33581 + * Redistribution and use in source and binary forms, with or without
33582 + * modification, are permitted provided that the following conditions are met:
33583 + *     * Redistributions of source code must retain the above copyright
33584 + *       notice, this list of conditions and the following disclaimer.
33585 + *     * Redistributions in binary form must reproduce the above copyright
33586 + *       notice, this list of conditions and the following disclaimer in the
33587 + *       documentation and/or other materials provided with the distribution.
33588 + *     * Neither the name of Freescale Semiconductor nor the
33589 + *       names of its contributors may be used to endorse or promote products
33590 + *       derived from this software without specific prior written permission.
33591 + *
33592 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
33593 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33594 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33595 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
33596 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33597 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33598 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
33599 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33600 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33601 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33602 + */
33603 +#include <compat.h>
33604 +#include <drivers/fsl_qbman_base.h>
33605 +
33606 +/* Sanity check */
33607 +#if (__BYTE_ORDER__ != __ORDER_BIG_ENDIAN__) && \
33608 +       (__BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__)
33609 +#error "Unknown endianness!"
33610 +#endif
33611 +
33612 +/* The platform-independent code shouldn't need endianness, except for
33613 + * weird/fast-path cases like qbman_result_has_token(), which needs to
33614 + * perform a passive and endianness-specific test on a read-only data structure
33615 + * very quickly. It's an exception, and this symbol is used for that case. */
33616 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
33617 +#define DQRR_TOK_OFFSET 0
33618 +#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 24
33619 +#define SCN_STATE_OFFSET_IN_MEM 8
33620 +#define SCN_RID_OFFSET_IN_MEM 8
33621 +#else
33622 +#define DQRR_TOK_OFFSET 24
33623 +#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 0
33624 +#define SCN_STATE_OFFSET_IN_MEM 16
33625 +#define SCN_RID_OFFSET_IN_MEM 0
33626 +#endif
33627 +
33628 +/* Similarly-named functions */
33629 +#define upper32(a) upper_32_bits(a)
33630 +#define lower32(a) lower_32_bits(a)
33631 +
33632 +       /****************/
33633 +       /* arch assists */
33634 +       /****************/
33635 +#define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }
33636 +#define lwsync() { asm volatile("dmb st" : : : "memory"); }
33637 +#define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); }
33638 +#define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
33639 +static inline void prefetch_for_load(void *p)
33640 +{
33641 +       asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p));
33642 +}
33643 +
33644 +static inline void prefetch_for_store(void *p)
33645 +{
33646 +       asm volatile("prfm pstl1keep, [%0, #64]" : : "r" (p));
33647 +}
33648 diff --git a/drivers/net/dpaa2/qbman/include/compat.h b/drivers/net/dpaa2/qbman/include/compat.h
33649 new file mode 100644
33650 index 0000000..456f938
33651 --- /dev/null
33652 +++ b/drivers/net/dpaa2/qbman/include/compat.h
33653 @@ -0,0 +1,637 @@
33654 +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
33655 + * All rights reserved.
33656 + *
33657 + * Redistribution and use in source and binary forms, with or without
33658 + * modification, are permitted provided that the following conditions are met:
33659 + *     * Redistributions of source code must retain the above copyright
33660 + *      notice, this list of conditions and the following disclaimer.
33661 + *     * Redistributions in binary form must reproduce the above copyright
33662 + *      notice, this list of conditions and the following disclaimer in the
33663 + *      documentation and/or other materials provided with the distribution.
33664 + *     * Neither the name of Freescale Semiconductor nor the
33665 + *      names of its contributors may be used to endorse or promote products
33666 + *      derived from this software without specific prior written permission.
33667 + *
33668 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
33669 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33670 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33671 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
33672 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33673 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33674 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
33675 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33676 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33677 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33678 + */
33679 +
33680 +#ifndef HEADER_COMPAT_H
33681 +#define HEADER_COMPAT_H
33682 +
33683 +#include <sched.h>
33684 +
33685 +#ifndef _GNU_SOURCE
33686 +#define _GNU_SOURCE
33687 +#endif
33688 +#include <stdint.h>
33689 +#include <stdlib.h>
33690 +#include <stddef.h>
33691 +#include <errno.h>
33692 +#include <string.h>
33693 +#include <pthread.h>
33694 +#include <net/ethernet.h>
33695 +#include <stdio.h>
33696 +#include <stdbool.h>
33697 +#include <ctype.h>
33698 +#include <malloc.h>
33699 +#include <sys/types.h>
33700 +#include <sys/stat.h>
33701 +#include <fcntl.h>
33702 +#include <unistd.h>
33703 +#include <sys/mman.h>
33704 +#include <limits.h>
33705 +#include <assert.h>
33706 +#include <dirent.h>
33707 +#include <inttypes.h>
33708 +#include <error.h>
33709 +
33710 +/* The following definitions are primarily to allow the single-source driver
33711 + * interfaces to be included by arbitrary program code. Ie. for interfaces that
33712 + * are also available in kernel-space, these definitions provide compatibility
33713 + * with certain attributes and types used in those interfaces. */
33714 +
33715 +/* Required compiler attributes */
33716 +#define __maybe_unused __attribute__((unused))
33717 +#define __always_unused        __attribute__((unused))
33718 +#define __packed       __attribute__((__packed__))
33719 +#define __user
33720 +#define likely(x)      __builtin_expect(!!(x), 1)
33721 +#define unlikely(x)    __builtin_expect(!!(x), 0)
33722 +#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
33723 +#undef container_of
33724 +#define container_of(ptr, type, member) ({ \
33725 +               typeof(((type *)0)->member)(*__mptr) = (ptr); \
33726 +               (type *)((char *)__mptr - offsetof(type, member)); })
33727 +#define __stringify_1(x) #x
33728 +#define __stringify(x) __stringify_1(x)
33729 +#define panic(x) \
33730 +do { \
33731 +       printf("panic: %s", x); \
33732 +       abort(); \
33733 +} while (0)
33734 +
33735 +#ifdef ARRAY_SIZE
33736 +#undef ARRAY_SIZE
33737 +#endif
33738 +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
33739 +
33740 +/* Required types */
33741 +typedef uint8_t                u8;
33742 +typedef uint16_t       u16;
33743 +typedef uint32_t       u32;
33744 +typedef uint64_t       u64;
33745 +typedef uint64_t       dma_addr_t;
33746 +typedef cpu_set_t      cpumask_t;
33747 +#define spinlock_t     pthread_mutex_t
33748 +typedef        u32             compat_uptr_t;
33749 +static inline void __user *compat_ptr(compat_uptr_t uptr)
33750 +{
33751 +       return (void __user *)(unsigned long)uptr;
33752 +}
33753 +
33754 +static inline compat_uptr_t ptr_to_compat(void __user *uptr)
33755 +{
33756 +       return (u32)(unsigned long)uptr;
33757 +}
33758 +
33759 +/* I/O operations */
33760 +static inline u32 in_be32(volatile void *__p)
33761 +{
33762 +       volatile u32 *p = __p;
33763 +       return *p;
33764 +}
33765 +
33766 +static inline void out_be32(volatile void *__p, u32 val)
33767 +{
33768 +       volatile u32 *p = __p;
33769 +       *p = val;
33770 +}
33771 +
33772 +/* Debugging */
33773 +#define prflush(fmt, args...) \
33774 +       do { \
33775 +               printf(fmt, ##args); \
33776 +               fflush(stdout); \
33777 +       } while (0)
33778 +#define pr_crit(fmt, args...)   prflush("CRIT:" fmt, ##args)
33779 +#define pr_err(fmt, args...)    prflush("ERR:" fmt, ##args)
33780 +#define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args)
33781 +#define pr_info(fmt, args...)   prflush(fmt, ##args)
33782 +
33783 +#define BUG()  abort()
33784 +#ifdef CONFIG_BUGON
33785 +#ifdef pr_debug
33786 +#undef pr_debug
33787 +#endif
33788 +#define pr_debug(fmt, args...) printf(fmt, ##args)
33789 +#define BUG_ON(c) \
33790 +do { \
33791 +       if (c) { \
33792 +               pr_crit("BUG: %s:%d\n", __FILE__, __LINE__); \
33793 +               abort(); \
33794 +       } \
33795 +} while (0)
33796 +#define might_sleep_if(c)      BUG_ON(c)
33797 +#define msleep(x) \
33798 +do { \
33799 +       pr_crit("BUG: illegal call %s:%d\n", __FILE__, __LINE__); \
33800 +       exit(EXIT_FAILURE); \
33801 +} while (0)
33802 +#else
33803 +#ifdef pr_debug
33804 +#undef pr_debug
33805 +#endif
33806 +#define pr_debug(fmt, args...) do { ; } while (0)
33807 +#define BUG_ON(c)              do { ; } while (0)
33808 +#define might_sleep_if(c)      do { ; } while (0)
33809 +#define msleep(x)              do { ; } while (0)
33810 +#endif
33811 +#define WARN_ON(c, str) \
33812 +do { \
33813 +       static int warned_##__LINE__; \
33814 +       if ((c) && !warned_##__LINE__) { \
33815 +               pr_warn("%s\n", str); \
33816 +               pr_warn("(%s:%d)\n", __FILE__, __LINE__); \
33817 +               warned_##__LINE__ = 1; \
33818 +       } \
33819 +} while (0)
33820 +
33821 +#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1))
33822 +
33823 +/****************/
33824 +/* Linked-lists */
33825 +/****************/
33826 +
33827 +struct list_head {
33828 +       struct list_head *prev;
33829 +       struct list_head *next;
33830 +};
33831 +
33832 +#define LIST_HEAD(n) \
33833 +struct list_head n = { \
33834 +       .prev = &n, \
33835 +       .next = &n \
33836 +}
33837 +
33838 +#define INIT_LIST_HEAD(p) \
33839 +do { \
33840 +       struct list_head *__p298 = (p); \
33841 +       __p298->prev = __p298->next = __p298; \
33842 +} while (0)
33843 +#define list_entry(node, type, member) \
33844 +       (type *)((void *)node - offsetof(type, member))
33845 +#define list_empty(p) \
33846 +({ \
33847 +       const struct list_head *__p298 = (p); \
33848 +       ((__p298->next == __p298) && (__p298->prev == __p298)); \
33849 +})
33850 +#define list_add(p, l) \
33851 +do { \
33852 +       struct list_head *__p298 = (p); \
33853 +       struct list_head *__l298 = (l); \
33854 +       __p298->next = __l298->next; \
33855 +       __p298->prev = __l298; \
33856 +       __l298->next->prev = __p298; \
33857 +       __l298->next = __p298; \
33858 +} while (0)
33859 +#define list_add_tail(p, l) \
33860 +do { \
33861 +       struct list_head *__p298 = (p); \
33862 +       struct list_head *__l298 = (l); \
33863 +       __p298->prev = __l298->prev; \
33864 +       __p298->next = __l298; \
33865 +       __l298->prev->next = __p298; \
33866 +       __l298->prev = __p298; \
33867 +} while (0)
33868 +#define list_for_each(i, l)                            \
33869 +       for (i = (l)->next; i != (l); i = i->next)
33870 +#define list_for_each_safe(i, j, l)                    \
33871 +       for (i = (l)->next, j = i->next; i != (l);      \
33872 +            i = j, j = i->next)
33873 +#define list_for_each_entry(i, l, name) \
33874 +       for (i = list_entry((l)->next, typeof(*i), name); &i->name != (l); \
33875 +               i = list_entry(i->name.next, typeof(*i), name))
33876 +#define list_for_each_entry_safe(i, j, l, name) \
33877 +       for (i = list_entry((l)->next, typeof(*i), name), \
33878 +               j = list_entry(i->name.next, typeof(*j), name); \
33879 +               &i->name != (l); \
33880 +               i = j, j = list_entry(j->name.next, typeof(*j), name))
33881 +#define list_del(i) \
33882 +do { \
33883 +       (i)->next->prev = (i)->prev; \
33884 +       (i)->prev->next = (i)->next; \
33885 +} while (0)
33886 +
33887 +/* Other miscellaneous interfaces our APIs depend on; */
33888 +
33889 +#define lower_32_bits(x) ((u32)(x))
33890 +#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
33891 +
33892 +/* Compiler/type stuff */
33893 +typedef unsigned int   gfp_t;
33894 +typedef uint32_t       phandle;
33895 +
33896 +#define noinline       __attribute__((noinline))
33897 +#define __iomem
33898 +#define EINTR          4
33899 +#define ENODEV         19
33900 +#define MODULE_AUTHOR(s)
33901 +#define MODULE_LICENSE(s)
33902 +#define MODULE_DESCRIPTION(s)
33903 +#define MODULE_PARM_DESC(x, y)
33904 +#define EXPORT_SYMBOL(x)
33905 +#define module_init(fn) int m_##fn(void) { return fn(); }
33906 +#define module_exit(fn) void m_##fn(void) { fn(); }
33907 +#define module_param(x, y, z)
33908 +#define module_param_string(w, x, y, z)
33909 +#define GFP_KERNEL     0
33910 +#define __KERNEL__
33911 +#define __init
33912 +#define __raw_readb(p) *(const volatile unsigned char *)(p)
33913 +#define __raw_readl(p) *(const volatile unsigned int *)(p)
33914 +#define __raw_writel(v, p) \
33915 +do { \
33916 +       *(volatile unsigned int *)(p) = (v); \
33917 +} while (0)
33918 +
33919 +/* printk() stuff */
33920 +#define printk(fmt, args...)   do_not_use_printk
33921 +#define nada(fmt, args...)     do { ; } while (0)
33922 +
33923 +/* Interrupt stuff */
33924 +typedef uint32_t       irqreturn_t;
33925 +#define IRQ_HANDLED    0
33926 +
33927 +/* memcpy() stuff - when you know alignments in advance */
33928 +#ifdef CONFIG_TRY_BETTER_MEMCPY
33929 +static inline void copy_words(void *dest, const void *src, size_t sz)
33930 +{
33931 +       u32 *__dest = dest;
33932 +       const u32 *__src = src;
33933 +       size_t __sz = sz >> 2;
33934 +
33935 +       BUG_ON((unsigned long)dest & 0x3);
33936 +       BUG_ON((unsigned long)src & 0x3);
33937 +       BUG_ON(sz & 0x3);
33938 +       while (__sz--)
33939 +               *(__dest++) = *(__src++);
33940 +}
33941 +
33942 +static inline void copy_shorts(void *dest, const void *src, size_t sz)
33943 +{
33944 +       u16 *__dest = dest;
33945 +       const u16 *__src = src;
33946 +       size_t __sz = sz >> 1;
33947 +
33948 +       BUG_ON((unsigned long)dest & 0x1);
33949 +       BUG_ON((unsigned long)src & 0x1);
33950 +       BUG_ON(sz & 0x1);
33951 +       while (__sz--)
33952 +               *(__dest++) = *(__src++);
33953 +}
33954 +
33955 +static inline void copy_bytes(void *dest, const void *src, size_t sz)
33956 +{
33957 +       u8 *__dest = dest;
33958 +       const u8 *__src = src;
33959 +
33960 +       while (sz--)
33961 +               *(__dest++) = *(__src++);
33962 +}
33963 +#else
33964 +#define copy_words memcpy
33965 +#define copy_shorts memcpy
33966 +#define copy_bytes memcpy
33967 +#endif
33968 +
33969 +/* Spinlock stuff */
33970 +#define spinlock_t             pthread_mutex_t
33971 +#define __SPIN_LOCK_UNLOCKED(x)        PTHREAD_ADAPTIVE_MUTEX_INITIALIZER_NP
33972 +#define DEFINE_SPINLOCK(x)     spinlock_t x = __SPIN_LOCK_UNLOCKED(x)
33973 +#define spin_lock_init(x) \
33974 +       do { \
33975 +               __maybe_unused int __foo;       \
33976 +               pthread_mutexattr_t __foo_attr; \
33977 +               __foo = pthread_mutexattr_init(&__foo_attr);    \
33978 +               BUG_ON(__foo);  \
33979 +               __foo = pthread_mutexattr_settype(&__foo_attr,  \
33980 +                                                 PTHREAD_MUTEX_ADAPTIVE_NP); \
33981 +               BUG_ON(__foo);  \
33982 +               __foo = pthread_mutex_init(x, &__foo_attr); \
33983 +               BUG_ON(__foo); \
33984 +       } while (0)
33985 +#define spin_lock(x) \
33986 +       do { \
33987 +               __maybe_unused int __foo = pthread_mutex_lock(x); \
33988 +               BUG_ON(__foo); \
33989 +       } while (0)
33990 +#define spin_unlock(x) \
33991 +       do { \
33992 +               __maybe_unused int __foo = pthread_mutex_unlock(x); \
33993 +               BUG_ON(__foo); \
33994 +       } while (0)
33995 +#define spin_lock_irq(x)       do {                            \
33996 +                                       local_irq_disable();    \
33997 +                                       spin_lock(x);           \
33998 +                               } while (0)
33999 +#define spin_unlock_irq(x)     do {                            \
34000 +                                       spin_unlock(x);         \
34001 +                                       local_irq_enable();     \
34002 +                               } while (0)
34003 +#define spin_lock_irqsave(x, f)        do { spin_lock_irq(x); } while (0)
34004 +#define spin_unlock_irqrestore(x, f) do { spin_unlock_irq(x); } while (0)
34005 +
34006 +#define raw_spinlock_t                         spinlock_t
34007 +#define raw_spin_lock_init(x)                  spin_lock_init(x)
34008 +#define raw_spin_lock_irqsave(x, f)            spin_lock(x)
34009 +#define raw_spin_unlock_irqrestore(x, f)       spin_unlock(x)
34010 +
34011 +/* Completion stuff */
34012 +#define DECLARE_COMPLETION(n) int n = 0;
34013 +#define complete(n) \
34014 +do { \
34015 +       *n = 1; \
34016 +} while (0)
34017 +#define wait_for_completion(n) \
34018 +do { \
34019 +       while (!*n) { \
34020 +               bman_poll(); \
34021 +               qman_poll(); \
34022 +       } \
34023 +       *n = 0; \
34024 +} while (0)
34025 +
34026 +/* Platform device stuff */
34027 +struct platform_device { void *dev; };
34028 +static inline struct
34029 +platform_device *platform_device_alloc(const char *name __always_unused,
34030 +                                      int id __always_unused)
34031 +{
34032 +       struct platform_device *ret = malloc(sizeof(*ret));
34033 +
34034 +       if (ret)
34035 +               ret->dev = NULL;
34036 +       return ret;
34037 +}
34038 +
34039 +#define platform_device_add(pdev)      0
34040 +#define platform_device_del(pdev)      do { ; } while (0)
34041 +static inline void platform_device_put(struct platform_device *pdev)
34042 +{
34043 +       free(pdev);
34044 +}
34045 +
34046 +struct resource {
34047 +       int unused;
34048 +};
34049 +
34050 +/* Allocator stuff */
34051 +#define kmalloc(sz, t) malloc(sz)
34052 +#define vmalloc(sz)    malloc(sz)
34053 +#define kfree(p)       do { if (p) free(p); } while (0)
34054 +static inline void *kzalloc(size_t sz, gfp_t __foo __always_unused)
34055 +{
34056 +       void *ptr = malloc(sz);
34057 +
34058 +       if (ptr)
34059 +               memset(ptr, 0, sz);
34060 +       return ptr;
34061 +}
34062 +
34063 +static inline unsigned long get_zeroed_page(gfp_t __foo __always_unused)
34064 +{
34065 +       void *p;
34066 +
34067 +       if (posix_memalign(&p, 4096, 4096))
34068 +               return 0;
34069 +       memset(p, 0, 4096);
34070 +       return (unsigned long)p;
34071 +}
34072 +
34073 +static inline void free_page(unsigned long p)
34074 +{
34075 +       free((void *)p);
34076 +}
34077 +
34078 +struct kmem_cache {
34079 +       size_t sz;
34080 +       size_t align;
34081 +};
34082 +
34083 +#define SLAB_HWCACHE_ALIGN     0
34084 +static inline struct kmem_cache *kmem_cache_create(const char *n __always_unused,
34085 +                                                  size_t sz, size_t align, unsigned long flags __always_unused,
34086 +                       void (*c)(void *) __always_unused)
34087 +{
34088 +       struct kmem_cache *ret = malloc(sizeof(*ret));
34089 +
34090 +       if (ret) {
34091 +               ret->sz = sz;
34092 +               ret->align = align;
34093 +       }
34094 +       return ret;
34095 +}
34096 +
34097 +static inline void kmem_cache_destroy(struct kmem_cache *c)
34098 +{
34099 +       free(c);
34100 +}
34101 +
34102 +static inline void *kmem_cache_alloc(struct kmem_cache *c, gfp_t f __always_unused)
34103 +{
34104 +       void *p;
34105 +
34106 +       if (posix_memalign(&p, c->align, c->sz))
34107 +               return NULL;
34108 +       return p;
34109 +}
34110 +
34111 +static inline void kmem_cache_free(struct kmem_cache *c __always_unused, void *p)
34112 +{
34113 +       free(p);
34114 +}
34115 +
34116 +static inline void *kmem_cache_zalloc(struct kmem_cache *c, gfp_t f)
34117 +{
34118 +       void *ret = kmem_cache_alloc(c, f);
34119 +
34120 +       if (ret)
34121 +               memset(ret, 0, c->sz);
34122 +       return ret;
34123 +}
34124 +
34125 +/* Bitfield stuff. */
34126 +#define BITS_PER_ULONG (sizeof(unsigned long) << 3)
34127 +#define SHIFT_PER_ULONG        (((1 << 5) == BITS_PER_ULONG) ? 5 : 6)
34128 +#define BITS_MASK(idx) ((unsigned long)1 << ((idx) & (BITS_PER_ULONG - 1)))
34129 +#define BITS_IDX(idx)  ((idx) >> SHIFT_PER_ULONG)
34130 +static inline unsigned long test_bits(unsigned long mask,
34131 +                                     volatile unsigned long *p)
34132 +{
34133 +       return *p & mask;
34134 +}
34135 +
34136 +static inline int test_bit(int idx, volatile unsigned long *bits)
34137 +{
34138 +       return test_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
34139 +}
34140 +
34141 +static inline void set_bits(unsigned long mask, volatile unsigned long *p)
34142 +{
34143 +       *p |= mask;
34144 +}
34145 +
34146 +static inline void set_bit(int idx, volatile unsigned long *bits)
34147 +{
34148 +       set_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
34149 +}
34150 +
34151 +static inline void clear_bits(unsigned long mask, volatile unsigned long *p)
34152 +{
34153 +       *p &= ~mask;
34154 +}
34155 +
34156 +static inline void clear_bit(int idx, volatile unsigned long *bits)
34157 +{
34158 +       clear_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
34159 +}
34160 +
34161 +static inline unsigned long test_and_set_bits(unsigned long mask,
34162 +                                             volatile unsigned long *p)
34163 +{
34164 +       unsigned long ret = test_bits(mask, p);
34165 +
34166 +       set_bits(mask, p);
34167 +       return ret;
34168 +}
34169 +
34170 +static inline int test_and_set_bit(int idx, volatile unsigned long *bits)
34171 +{
34172 +       int ret = test_bit(idx, bits);
34173 +
34174 +       set_bit(idx, bits);
34175 +       return ret;
34176 +}
34177 +
34178 +static inline int test_and_clear_bit(int idx, volatile unsigned long *bits)
34179 +{
34180 +       int ret = test_bit(idx, bits);
34181 +
34182 +       clear_bit(idx, bits);
34183 +       return ret;
34184 +}
34185 +
34186 +static inline int find_next_zero_bit(unsigned long *bits, int limit, int idx)
34187 +{
34188 +       while ((++idx < limit) && test_bit(idx, bits))
34189 +               ;
34190 +       return idx;
34191 +}
34192 +
34193 +static inline int find_first_zero_bit(unsigned long *bits, int limit)
34194 +{
34195 +       int idx = 0;
34196 +
34197 +       while (test_bit(idx, bits) && (++idx < limit))
34198 +               ;
34199 +       return idx;
34200 +}
34201 +
34202 +static inline u64 div64_u64(u64 n, u64 d)
34203 +{
34204 +       return n / d;
34205 +}
34206 +
34207 +#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); }
34208 +#define smp_mb() dmb(ish)
34209 +
34210 +/* Atomic stuff */
34211 +typedef struct {
34212 +       int counter;
34213 +} atomic_t;
34214 +
34215 +#define atomic_read(v)  (*(volatile int *)&(v)->counter)
34216 +#define atomic_set(v, i) (((v)->counter) = (i))
34217 +static inline void atomic_add(int i, atomic_t *v)
34218 +{
34219 +       unsigned long tmp;
34220 +       int result;
34221 +
34222 +       asm volatile("// atomic_add\n"
34223 +       "1:     ldxr    %w0, %2\n"
34224 +       "       add     %w0, %w0, %w3\n"
34225 +       "       stxr    %w1, %w0, %2\n"
34226 +       "       cbnz    %w1, 1b"
34227 +       : "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
34228 +       : "Ir" (i));
34229 +}
34230 +
34231 +static inline int atomic_add_return(int i, atomic_t *v)
34232 +{
34233 +       unsigned long tmp;
34234 +       int result;
34235 +
34236 +       asm volatile("// atomic_add_return\n"
34237 +       "1:     ldxr    %w0, %2\n"
34238 +       "       add     %w0, %w0, %w3\n"
34239 +       "       stlxr   %w1, %w0, %2\n"
34240 +       "       cbnz    %w1, 1b"
34241 +       : "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
34242 +       : "Ir" (i)
34243 +       : "memory");
34244 +
34245 +       smp_mb();
34246 +       return result;
34247 +}
34248 +
34249 +static inline void atomic_sub(int i, atomic_t *v)
34250 +{
34251 +       unsigned long tmp;
34252 +       int result;
34253 +
34254 +       asm volatile("// atomic_sub\n"
34255 +       "1:     ldxr    %w0, %2\n"
34256 +       "       sub     %w0, %w0, %w3\n"
34257 +       "       stxr    %w1, %w0, %2\n"
34258 +       "       cbnz    %w1, 1b"
34259 +       : "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
34260 +       : "Ir" (i));
34261 +}
34262 +
34263 +static inline int atomic_sub_return(int i, atomic_t *v)
34264 +{
34265 +       unsigned long tmp;
34266 +       int result;
34267 +
34268 +       asm volatile("// atomic_sub_return\n"
34269 +       "1:     ldxr    %w0, %2\n"
34270 +       "       sub     %w0, %w0, %w3\n"
34271 +       "       stlxr   %w1, %w0, %2\n"
34272 +       "       cbnz    %w1, 1b"
34273 +       : "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
34274 +       : "Ir" (i)
34275 +       : "memory");
34276 +
34277 +       smp_mb();
34278 +       return result;
34279 +}
34280 +
34281 +#define atomic_inc(v)           atomic_add(1, v)
34282 +#define atomic_dec(v)           atomic_sub(1, v)
34283 +
34284 +#define atomic_inc_and_test(v)  (atomic_add_return(1, v) == 0)
34285 +#define atomic_dec_and_test(v)  (atomic_sub_return(1, v) == 0)
34286 +#define atomic_inc_return(v)    (atomic_add_return(1, v))
34287 +#define atomic_dec_return(v)    (atomic_sub_return(1, v))
34288 +#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
34289 +
34290 +#endif /* HEADER_COMPAT_H */
34291 diff --git a/drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_base.h b/drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_base.h
34292 new file mode 100644
34293 index 0000000..4cb784c
34294 --- /dev/null
34295 +++ b/drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_base.h
34296 @@ -0,0 +1,151 @@
34297 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
34298 + *
34299 + * Redistribution and use in source and binary forms, with or without
34300 + * modification, are permitted provided that the following conditions are met:
34301 + *     * Redistributions of source code must retain the above copyright
34302 + *       notice, this list of conditions and the following disclaimer.
34303 + *     * Redistributions in binary form must reproduce the above copyright
34304 + *       notice, this list of conditions and the following disclaimer in the
34305 + *       documentation and/or other materials provided with the distribution.
34306 + *     * Neither the name of Freescale Semiconductor nor the
34307 + *       names of its contributors may be used to endorse or promote products
34308 + *       derived from this software without specific prior written permission.
34309 + *
34310 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
34311 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34312 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34313 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
34314 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34315 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34316 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
34317 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34318 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34319 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34320 + */
34321 +#ifndef _FSL_QBMAN_BASE_H
34322 +#define _FSL_QBMAN_BASE_H
34323 +
34324 +/**
34325 + * DOC: QBMan basic structures
34326 + *
34327 + * The QBMan block descriptor, software portal descriptor and Frame descriptor
34328 + * are defined here.
34329 + *
34330 + */
34331 +
34332 +/**
34333 + * struct qbman_block_desc - qbman block descriptor structure
34334 + * @ccsr_reg_bar: CCSR register map.
34335 + * @irq_rerr: Recoverable error interrupt line.
34336 + * @irq_nrerr: Non-recoverable error interrupt line
34337 + *
34338 + * Descriptor for a QBMan instance on the SoC. On partitions/targets that do not
34339 + * control this QBMan instance, these values may simply be place-holders. The
34340 + * idea is simply that we be able to distinguish between them, eg. so that SWP
34341 + * descriptors can identify which QBMan instance they belong to.
34342 + */
34343 +struct qbman_block_desc {
34344 +       void *ccsr_reg_bar;
34345 +       int irq_rerr;
34346 +       int irq_nrerr;
34347 +};
34348 +
34349 +enum qbman_eqcr_mode {
34350 +       qman_eqcr_vb_ring = 2, /* Valid bit, with eqcr in ring mode */
34351 +       qman_eqcr_vb_array, /* Valid bit, with eqcr in array mode */
34352 +};
34353 +
34354 +/**
34355 + * struct qbman_swp_desc - qbman software portal descriptor structure
34356 + * @block: The QBMan instance.
34357 + * @cena_bar: Cache-enabled portal register map.
34358 + * @cinh_bar: Cache-inhibited portal register map.
34359 + * @irq: -1 if unused (or unassigned)
34360 + * @idx: SWPs within a QBMan are indexed. -1 if opaque to the user.
34361 + * @qman_version: the qman version.
34362 + * @eqcr_mode: Select the eqcr mode, currently only valid bit ring mode and
34363 + * valid bit array mode are supported.
34364 + *
34365 + * Descriptor for a QBMan software portal, expressed in terms that make sense to
34366 + * the user context. Ie. on MC, this information is likely to be true-physical,
34367 + * and instantiated statically at compile-time. On GPP, this information is
34368 + * likely to be obtained via "discovery" over a partition's "MC bus"
34369 + * (ie. in response to a MC portal command), and would take into account any
34370 + * virtualisation of the GPP user's address space and/or interrupt numbering.
34371 + */
34372 +struct qbman_swp_desc {
34373 +       const struct qbman_block_desc *block;
34374 +       uint8_t *cena_bar;
34375 +       uint8_t *cinh_bar;
34376 +       int irq;
34377 +       int idx;
34378 +       uint32_t qman_version;
34379 +       enum qbman_eqcr_mode eqcr_mode;
34380 +};
34381 +
34382 +/* Driver object for managing a QBMan portal */
34383 +struct qbman_swp;
34384 +
34385 +/**
34386 + * struct qbman_fd - basci structure for qbman frame descriptor
34387 + * @words: for easier/faster copying the whole FD structure.
34388 + * @addr_lo: the lower 32 bits of the address in FD.
34389 + * @addr_hi: the upper 32 bits of the address in FD.
34390 + * @len: the length field in FD.
34391 + * @bpid_offset: represent the bpid and offset fields in FD. offset in
34392 + * the MS 16 bits, BPID in the LS 16 bits.
34393 + * @frc: frame context
34394 + * @ctrl: the 32bit control bits including dd, sc,... va, err.
34395 + * @flc_lo: the lower 32bit of flow context.
34396 + * @flc_hi: the upper 32bits of flow context.
34397 + *
34398 + * Place-holder for FDs, we represent it via the simplest form that we need for
34399 + * now. Different overlays may be needed to support different options, etc. (It
34400 + * is impractical to define One True Struct, because the resulting encoding
34401 + * routines (lots of read-modify-writes) would be worst-case performance whether
34402 + * or not circumstances required them.)
34403 + *
34404 + * Note, as with all data-structures exchanged between software and hardware (be
34405 + * they located in the portal register map or DMA'd to and from main-memory),
34406 + * the driver ensures that the caller of the driver API sees the data-structures
34407 + * in host-endianness. "struct qbman_fd" is no exception. The 32-bit words
34408 + * contained within this structure are represented in host-endianness, even if
34409 + * hardware always treats them as little-endian. As such, if any of these fields
34410 + * are interpreted in a binary (rather than numerical) fashion by hardware
34411 + * blocks (eg. accelerators), then the user should be careful. We illustrate
34412 + * with an example;
34413 + *
34414 + * Suppose the desired behaviour of an accelerator is controlled by the "frc"
34415 + * field of the FDs that are sent to it. Suppose also that the behaviour desired
34416 + * by the user corresponds to an "frc" value which is expressed as the literal
34417 + * sequence of bytes 0xfe, 0xed, 0xab, and 0xba. So "frc" should be the 32-bit
34418 + * value in which 0xfe is the first byte and 0xba is the last byte, and as
34419 + * hardware is little-endian, this amounts to a 32-bit "value" of 0xbaabedfe. If
34420 + * the software is little-endian also, this can simply be achieved by setting
34421 + * frc=0xbaabedfe. On the other hand, if software is big-endian, it should set
34422 + * frc=0xfeedabba! The best away of avoiding trouble with this sort of thing is
34423 + * to treat the 32-bit words as numerical values, in which the offset of a field
34424 + * from the beginning of the first byte (as required or generated by hardware)
34425 + * is numerically encoded by a left-shift (ie. by raising the field to a
34426 + * corresponding power of 2).  Ie. in the current example, software could set
34427 + * "frc" in the following way, and it would work correctly on both little-endian
34428 + * and big-endian operation;
34429 + *    fd.frc = (0xfe << 0) | (0xed << 8) | (0xab << 16) | (0xba << 24);
34430 + */
34431 +struct qbman_fd {
34432 +       union {
34433 +               uint32_t words[8];
34434 +               struct qbman_fd_simple {
34435 +                       uint32_t addr_lo;
34436 +                       uint32_t addr_hi;
34437 +                       uint32_t len;
34438 +                       uint32_t bpid_offset;
34439 +                       uint32_t frc;
34440 +                       uint32_t ctrl;
34441 +                       uint32_t flc_lo;
34442 +                       uint32_t flc_hi;
34443 +               } simple;
34444 +       };
34445 +};
34446 +
34447 +#endif /* !_FSL_QBMAN_BASE_H */
34448 diff --git a/drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_portal.h b/drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_portal.h
34449 new file mode 100644
34450 index 0000000..9e8e5f2
34451 --- /dev/null
34452 +++ b/drivers/net/dpaa2/qbman/include/drivers/fsl_qbman_portal.h
34453 @@ -0,0 +1,1087 @@
34454 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
34455 + *
34456 + * Redistribution and use in source and binary forms, with or without
34457 + * modification, are permitted provided that the following conditions are met:
34458 + *     * Redistributions of source code must retain the above copyright
34459 + *       notice, this list of conditions and the following disclaimer.
34460 + *     * Redistributions in binary form must reproduce the above copyright
34461 + *       notice, this list of conditions and the following disclaimer in the
34462 + *       documentation and/or other materials provided with the distribution.
34463 + *     * Neither the name of Freescale Semiconductor nor the
34464 + *       names of its contributors may be used to endorse or promote products
34465 + *       derived from this software without specific prior written permission.
34466 + *
34467 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
34468 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34469 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34470 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
34471 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34472 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34473 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
34474 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34475 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34476 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34477 + */
34478 +#ifndef _FSL_QBMAN_PORTAL_H
34479 +#define _FSL_QBMAN_PORTAL_H
34480 +
34481 +#include <drivers/fsl_qbman_base.h>
34482 +
34483 +/**
34484 + * DOC - QBMan portal APIs to implement the following functions:
34485 + * - Initialize and destroy Software portal object.
34486 + * - Read and write Software portal interrupt registers.
34487 + * - Enqueue, including setting the enqueue descriptor, and issuing enqueue
34488 + *   command etc.
34489 + * - Dequeue, including setting the dequeue descriptor, issuing dequeue command,
34490 + *   parsing the dequeue response in DQRR and memeory, parsing the state change
34491 + *   notifications etc.
34492 + * - Release, including setting the release descriptor, and issuing the buffer
34493 + *   release command.
34494 + * - Acquire, acquire the buffer from the given buffer pool.
34495 + * - FQ management.
34496 + * - Channel management, enable/disable CDAN with or without context.
34497 + */
34498 +
34499 +/**
34500 + * qbman_swp_init() - Create a functional object representing the given
34501 + * QBMan portal descriptor.
34502 + * @d: the given qbman swp descriptor
34503 + *
34504 + * Return qbman_swp portal object for success, NULL if the object cannot
34505 + * be created.
34506 + */
34507 +struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d);
34508 +
34509 +/**
34510 + * qbman_swp_finish() - Create and destroy a functional object representing
34511 + * the given QBMan portal descriptor.
34512 + * @p: the qbman_swp object to be destroyed.
34513 + *
34514 + */
34515 +void qbman_swp_finish(struct qbman_swp *p);
34516 +
34517 +/**
34518 + * qbman_swp_get_desc() - Get the descriptor of the given portal object.
34519 + * @p: the given portal object.
34520 + *
34521 + * Return the descriptor for this portal.
34522 + */
34523 +const struct qbman_swp_desc *qbman_swp_get_desc(struct qbman_swp *);
34524 +
34525 +       /**************/
34526 +       /* Interrupts */
34527 +       /**************/
34528 +
34529 +/* EQCR ring interrupt */
34530 +#define QBMAN_SWP_INTERRUPT_EQRI ((uint32_t)0x00000001)
34531 +/* Enqueue command dispatched interrupt */
34532 +#define QBMAN_SWP_INTERRUPT_EQDI ((uint32_t)0x00000002)
34533 +/* DQRR non-empty interrupt */
34534 +#define QBMAN_SWP_INTERRUPT_DQRI ((uint32_t)0x00000004)
34535 +/* RCR ring interrupt */
34536 +#define QBMAN_SWP_INTERRUPT_RCRI ((uint32_t)0x00000008)
34537 +/* Release command dispatched interrupt */
34538 +#define QBMAN_SWP_INTERRUPT_RCDI ((uint32_t)0x00000010)
34539 +/* Volatile dequeue command interrupt */
34540 +#define QBMAN_SWP_INTERRUPT_VDCI ((uint32_t)0x00000020)
34541 +
34542 +/**
34543 + * qbman_swp_interrupt_get_vanish() - Get the data in software portal
34544 + * interrupt status disable register.
34545 + * @p: the given software portal object.
34546 + *
34547 + * Return the settings in SWP_ISDR register.
34548 + */
34549 +uint32_t qbman_swp_interrupt_get_vanish(struct qbman_swp *p);
34550 +
34551 +/**
34552 + * qbman_swp_interrupt_set_vanish() - Set the data in software portal
34553 + * interrupt status disable register.
34554 + * @p: the given software portal object.
34555 + * @mask: The value to set in SWP_IDSR register.
34556 + */
34557 +void qbman_swp_interrupt_set_vanish(struct qbman_swp *p, uint32_t mask);
34558 +
34559 +/**
34560 + * qbman_swp_interrupt_read_status() - Get the data in software portal
34561 + * interrupt status register.
34562 + * @p: the given software portal object.
34563 + *
34564 + * Return the settings in SWP_ISR register.
34565 + */
34566 +uint32_t qbman_swp_interrupt_read_status(struct qbman_swp *p);
34567 +
34568 +/**
34569 + * qbman_swp_interrupt_clear_status() - Set the data in software portal
34570 + * interrupt status register.
34571 + * @p: the given software portal object.
34572 + * @mask: The value to set in SWP_ISR register.
34573 + */
34574 +void qbman_swp_interrupt_clear_status(struct qbman_swp *p, uint32_t mask);
34575 +
34576 +/**
34577 + * qbman_swp_interrupt_get_trigger() - Get the data in software portal
34578 + * interrupt enable register.
34579 + * @p: the given software portal object.
34580 + *
34581 + * Return the settings in SWP_IER register.
34582 + */
34583 +uint32_t qbman_swp_interrupt_get_trigger(struct qbman_swp *p);
34584 +
34585 +/**
34586 + * qbman_swp_interrupt_set_trigger() - Set the data in software portal
34587 + * interrupt enable register.
34588 + * @p: the given software portal object.
34589 + * @mask: The value to set in SWP_IER register.
34590 + */
34591 +void qbman_swp_interrupt_set_trigger(struct qbman_swp *p, uint32_t mask);
34592 +
34593 +/**
34594 + * qbman_swp_interrupt_get_inhibit() - Get the data in software portal
34595 + * interrupt inhibit register.
34596 + * @p: the given software portal object.
34597 + *
34598 + * Return the settings in SWP_IIR register.
34599 + */
34600 +int qbman_swp_interrupt_get_inhibit(struct qbman_swp *p);
34601 +
34602 +/**
34603 + * qbman_swp_interrupt_set_inhibit() - Set the data in software portal
34604 + * interrupt inhibit register.
34605 + * @p: the given software portal object.
34606 + * @mask: The value to set in SWP_IIR register.
34607 + */
34608 +void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit);
34609 +
34610 +       /************/
34611 +       /* Dequeues */
34612 +       /************/
34613 +
34614 +/**
34615 + * struct qbman_result - structure for qbman dequeue response and/or
34616 + * notification.
34617 + * @dont_manipulate_directly: the 16 32bit data to represent the whole
34618 + * possible qbman dequeue result.
34619 + */
34620 +struct qbman_result {
34621 +       uint32_t dont_manipulate_directly[16];
34622 +};
34623 +
34624 +/* TODO:
34625 + *A DQRI interrupt can be generated when there are dequeue results on the
34626 + * portal's DQRR (this mechanism does not deal with "pull" dequeues to
34627 + * user-supplied 'storage' addresses). There are two parameters to this
34628 + * interrupt source, one is a threshold and the other is a timeout. The
34629 + * interrupt will fire if either the fill-level of the ring exceeds 'thresh', or
34630 + * if the ring has been non-empty for been longer than 'timeout' nanoseconds.
34631 + * For timeout, an approximation to the desired nanosecond-granularity value is
34632 + * made, so there are get and set APIs to allow the user to see what actual
34633 + * timeout is set (compared to the timeout that was requested). */
34634 +int qbman_swp_dequeue_thresh(struct qbman_swp *s, unsigned int thresh);
34635 +int qbman_swp_dequeue_set_timeout(struct qbman_swp *s, unsigned int timeout);
34636 +int qbman_swp_dequeue_get_timeout(struct qbman_swp *s, unsigned int *timeout);
34637 +
34638 +/* ------------------- */
34639 +/* Push-mode dequeuing */
34640 +/* ------------------- */
34641 +
34642 +/* The user of a portal can enable and disable push-mode dequeuing of up to 16
34643 + * channels independently. It does not specify this toggling by channel IDs, but
34644 + * rather by specifying the index (from 0 to 15) that has been mapped to the
34645 + * desired channel.
34646 + */
34647 +
34648 +/**
34649 + * qbman_swp_push_get() - Get the push dequeue setup.
34650 + * @s: the software portal object.
34651 + * @channel_idx: the channel index to query.
34652 + * @enabled: returned boolean to show whether the push dequeue is enabled for
34653 + * the given channel.
34654 + */
34655 +void qbman_swp_push_get(struct qbman_swp *s, uint8_t channel_idx, int *enabled);
34656 +
34657 +/**
34658 + * qbman_swp_push_set() - Enable or disable push dequeue.
34659 + * @s: the software portal object.
34660 + * @channel_idx: the channel index..
34661 + * @enable: enable or disable push dequeue.
34662 + *
34663 + * The user of a portal can enable and disable push-mode dequeuing of up to 16
34664 + * channels independently. It does not specify this toggling by channel IDs, but
34665 + * rather by specifying the index (from 0 to 15) that has been mapped to the
34666 + * desired channel.
34667 + */
34668 +void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable);
34669 +
34670 +/* ------------------- */
34671 +/* Pull-mode dequeuing */
34672 +/* ------------------- */
34673 +
34674 +/**
34675 + * struct qbman_pull_desc - the structure for pull dequeue descriptor
34676 + * @dont_manipulate_directly: the 6 32bit data to represent the whole
34677 + * possible settings for pull dequeue descriptor.
34678 + */
34679 +struct qbman_pull_desc {
34680 +       uint32_t dont_manipulate_directly[6];
34681 +};
34682 +
34683 +enum qbman_pull_type_e {
34684 +       /* dequeue with priority precedence, respect intra-class scheduling */
34685 +       qbman_pull_type_prio = 1,
34686 +       /* dequeue with active FQ precedence, respect ICS */
34687 +       qbman_pull_type_active,
34688 +       /* dequeue with active FQ precedence, no ICS */
34689 +       qbman_pull_type_active_noics
34690 +};
34691 +
34692 +/**
34693 + * qbman_pull_desc_clear() - Clear the contents of a descriptor to
34694 + * default/starting state.
34695 + * @d: the pull dequeue descriptor to be cleared.
34696 + */
34697 +void qbman_pull_desc_clear(struct qbman_pull_desc *d);
34698 +
34699 +/**
34700 + * qbman_pull_desc_set_storage()- Set the pull dequeue storage
34701 + * @d: the pull dequeue descriptor to be set.
34702 + * @storage: the pointer of the memory to store the dequeue result.
34703 + * @storage_phys: the physical address of the storage memory.
34704 + * @stash: to indicate whether write allocate is enabled.
34705 + *
34706 + * If not called, or if called with 'storage' as NULL, the result pull dequeues
34707 + * will produce results to DQRR. If 'storage' is non-NULL, then results are
34708 + * produced to the given memory location (using the physical/DMA address which
34709 + * the caller provides in 'storage_phys'), and 'stash' controls whether or not
34710 + * those writes to main-memory express a cache-warming attribute.
34711 + */
34712 +void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
34713 +                                struct qbman_result *storage,
34714 +                                dma_addr_t storage_phys,
34715 +                                int stash);
34716 +/**
34717 + * qbman_pull_desc_set_numframes() - Set the number of frames to be dequeued.
34718 + * @d: the pull dequeue descriptor to be set.
34719 + * @numframes: number of frames to be set, must be between 1 and 16, inclusive.
34720 + */
34721 +void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d,
34722 +                                  uint8_t numframes);
34723 +/**
34724 + * qbman_pull_desc_set_token() - Set dequeue token for pull command
34725 + * @d: the dequeue descriptor
34726 + * @token: the token to be set
34727 + *
34728 + * token is the value that shows up in the dequeue response that can be used to
34729 + * detect when the results have been published. The easiest technique is to zero
34730 + * result "storage" before issuing a dequeue, and use any non-zero 'token' value
34731 + */
34732 +void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token);
34733 +
34734 +/* Exactly one of the following descriptor "actions" should be set. (Calling any
34735 + * one of these will replace the effect of any prior call to one of these.)
34736 + * - pull dequeue from the given frame queue (FQ)
34737 + * - pull dequeue from any FQ in the given work queue (WQ)
34738 + * - pull dequeue from any FQ in any WQ in the given channel
34739 + */
34740 +/**
34741 + * qbman_pull_desc_set_fq() - Set fqid from which the dequeue command dequeues.
34742 + * @fqid: the frame queue index of the given FQ.
34743 + */
34744 +void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid);
34745 +
34746 +/**
34747 + * qbman_pull_desc_set_wq() - Set wqid from which the dequeue command dequeues.
34748 + * @wqid: composed of channel id and wqid within the channel.
34749 + * @dct: the dequeue command type.
34750 + */
34751 +void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, uint32_t wqid,
34752 +                           enum qbman_pull_type_e dct);
34753 +
34754 +/* qbman_pull_desc_set_channel() - Set channelid from which the dequeue command
34755 + * dequeues.
34756 + * @chid: the channel id to be dequeued.
34757 + * @dct: the dequeue command type.
34758 + */
34759 +void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, uint32_t chid,
34760 +                                enum qbman_pull_type_e dct);
34761 +
34762 +/**
34763 + * qbman_swp_pull() - Issue the pull dequeue command
34764 + * @s: the software portal object.
34765 + * @d: the software portal descriptor which has been configured with
34766 + * the set of qbman_pull_desc_set_*() calls.
34767 + *
34768 + * Return 0 for success, and -EBUSY if the software portal is not ready
34769 + * to do pull dequeue.
34770 + */
34771 +int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d);
34772 +
34773 +/* -------------------------------- */
34774 +/* Polling DQRR for dequeue results */
34775 +/* -------------------------------- */
34776 +
34777 +/**
34778 + * qbman_swp_dqrr_next() - Get an valid DQRR entry.
34779 + * @s: the software portal object.
34780 + *
34781 + * Return NULL if there are no unconsumed DQRR entries. Return a DQRR entry
34782 + * only once, so repeated calls can return a sequence of DQRR entries, without
34783 + * requiring they be consumed immediately or in any particular order.
34784 + */
34785 +const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *);
34786 +
34787 +/**
34788 + * qbman_swp_dqrr_consume() -  Consume DQRR entries previously returned from
34789 + * qbman_swp_dqrr_next().
34790 + * @s: the software portal object.
34791 + * @dq: the DQRR entry to be consumed.
34792 + */
34793 +void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct qbman_result *dq);
34794 +
34795 +/**
34796 + * qbman_get_dqrr_idx() - Get dqrr index from the given dqrr
34797 + * @dqrr: the given dqrr object.
34798 + *
34799 + * Return dqrr index.
34800 + */
34801 +uint8_t qbman_get_dqrr_idx(struct qbman_result *dqrr);
34802 +
34803 +/**
34804 + * qbman_get_dqrr_from_idx() - Use index to get the dqrr entry from the
34805 + * given portal
34806 + * @s: the given portal.
34807 + * @idx: the dqrr index.
34808 + *
34809 + * Return dqrr entry object.
34810 + */
34811 +struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx);
34812 +
34813 +/* ------------------------------------------------- */
34814 +/* Polling user-provided storage for dequeue results */
34815 +/* ------------------------------------------------- */
34816 +
34817 +/**
34818 + * qbman_result_has_new_result() - Check and get the dequeue response from the
34819 + * dq storage memory set in pull dequeue command
34820 + * @s: the software portal object.
34821 + * @dq: the dequeue result read from the memory.
34822 + *
34823 + * Only used for user-provided storage of dequeue results, not DQRR. For
34824 + * efficiency purposes, the driver will perform any required endianness
34825 + * conversion to ensure that the user's dequeue result storage is in host-endian
34826 + * format (whether or not that is the same as the little-endian format that
34827 + * hardware DMA'd to the user's storage). As such, once the user has called
34828 + * qbman_result_has_new_result() and been returned a valid dequeue result,
34829 + * they should not call it again on the same memory location (except of course
34830 + * if another dequeue command has been executed to produce a new result to that
34831 + * location).
34832 + *
34833 + * Return 1 for getting a valid dequeue result, or 0 for not getting a valid
34834 + * dequeue result.
34835 + */
34836 +int qbman_result_has_new_result(struct qbman_swp *s,
34837 +                               const struct qbman_result *dq);
34838 +
34839 +/* -------------------------------------------------------- */
34840 +/* Parsing dequeue entries (DQRR and user-provided storage) */
34841 +/* -------------------------------------------------------- */
34842 +
34843 +/**
34844 + * qbman_result_is_DQ() - check the dequeue result is a dequeue response or not
34845 + * @dq: the dequeue result to be checked.
34846 + *
34847 + * DQRR entries may contain non-dequeue results, ie. notifications
34848 + */
34849 +int qbman_result_is_DQ(const struct qbman_result *);
34850 +
34851 +/**
34852 + * qbman_result_is_SCN() - Check the dequeue result is notification or not
34853 + * @dq: the dequeue result to be checked.
34854 + *
34855 + * All the non-dequeue results (FQDAN/CDAN/CSCN/...) are "state change
34856 + * notifications" of one type or another. Some APIs apply to all of them, of the
34857 + * form qbman_result_SCN_***().
34858 + */
34859 +static inline int qbman_result_is_SCN(const struct qbman_result *dq)
34860 +{
34861 +       return !qbman_result_is_DQ(dq);
34862 +}
34863 +
34864 +/* Recognise different notification types, only required if the user allows for
34865 + * these to occur, and cares about them when they do.
34866 + */
34867 +
34868 +/**
34869 + * qbman_result_is_FQDAN() - Check for FQ Data Availability
34870 + * @dq: the qbman_result object.
34871 + *
34872 + * Return 1 if this is FQDAN.
34873 + */
34874 +int qbman_result_is_FQDAN(const struct qbman_result *dq);
34875 +
34876 +/**
34877 + * qbman_result_is_CDAN() - Check for Channel Data Availability
34878 + * @dq: the qbman_result object to check.
34879 + *
34880 + * Return 1 if this is CDAN.
34881 + */
34882 +int qbman_result_is_CDAN(const struct qbman_result *dq);
34883 +
34884 +/**
34885 + * qbman_result_is_CSCN() - Check for Congestion State Change
34886 + * @dq: the qbman_result object to check.
34887 + *
34888 + * Return 1 if this is CSCN.
34889 + */
34890 +int qbman_result_is_CSCN(const struct qbman_result *dq);
34891 +
34892 +/**
34893 + * qbman_result_is_BPSCN() - Check for Buffer Pool State Change.
34894 + * @dq: the qbman_result object to check.
34895 + *
34896 + * Return 1 if this is BPSCN.
34897 + */
34898 +int qbman_result_is_BPSCN(const struct qbman_result *dq);
34899 +
34900 +/**
34901 + * qbman_result_is_CGCU() - Check for Congestion Group Count Update.
34902 + * @dq: the qbman_result object to check.
34903 + *
34904 + * Return 1 if this is CGCU.
34905 + */
34906 +int qbman_result_is_CGCU(const struct qbman_result *dq);
34907 +
34908 +/* Frame queue state change notifications; (FQDAN in theory counts too as it
34909 + * leaves a FQ parked, but it is primarily a data availability notification)
34910 + */
34911 +
34912 +/**
34913 + * qbman_result_is_FQRN() - Check for FQ Retirement Notification.
34914 + * @dq: the qbman_result object to check.
34915 + *
34916 + * Return 1 if this is FQRN.
34917 + */
34918 +int qbman_result_is_FQRN(const struct qbman_result *);
34919 +
34920 +/**
34921 + * qbman_result_is_FQRNI() - Check for FQ Retirement Immediate
34922 + * @dq: the qbman_result object to check.
34923 + *
34924 + * Return 1 if this is FQRNI.
34925 + */
34926 +int qbman_result_is_FQRNI(const struct qbman_result *);
34927 +
34928 +/**
34929 + * qbman_result_is_FQPN() - Check for FQ Park Notification
34930 + * @dq: the qbman_result object to check.
34931 + *
34932 + * Return 1 if this is FQPN.
34933 + */
34934 +int qbman_result_is_FQPN(const struct qbman_result *dq);
34935 +
34936 +/* Parsing frame dequeue results (qbman_result_is_DQ() must be TRUE)
34937 + */
34938 +/* FQ empty */
34939 +#define QBMAN_DQ_STAT_FQEMPTY       0x80
34940 +/* FQ held active */
34941 +#define QBMAN_DQ_STAT_HELDACTIVE    0x40
34942 +/* FQ force eligible */
34943 +#define QBMAN_DQ_STAT_FORCEELIGIBLE 0x20
34944 +/* Valid frame */
34945 +#define QBMAN_DQ_STAT_VALIDFRAME    0x10
34946 +/* FQ ODP enable */
34947 +#define QBMAN_DQ_STAT_ODPVALID      0x04
34948 +/* Volatile dequeue */
34949 +#define QBMAN_DQ_STAT_VOLATILE      0x02
34950 +/* volatile dequeue command is expired */
34951 +#define QBMAN_DQ_STAT_EXPIRED       0x01
34952 +
34953 +/**
34954 + * qbman_result_DQ_flags() - Get the STAT field of dequeue response
34955 + * @dq: the dequeue result.
34956 + *
34957 + * Return the state field.
34958 + */
34959 +uint32_t qbman_result_DQ_flags(const struct qbman_result *dq);
34960 +
34961 +/**
34962 + * qbman_result_DQ_is_pull() - Check whether the dq response is from a pull
34963 + * command.
34964 + * @dq: the dequeue result.
34965 + *
34966 + * Return 1 for volatile(pull) dequeue, 0 for static dequeue.
34967 + */
34968 +static inline int qbman_result_DQ_is_pull(const struct qbman_result *dq)
34969 +{
34970 +       return (int)(qbman_result_DQ_flags(dq) & QBMAN_DQ_STAT_VOLATILE);
34971 +}
34972 +
34973 +/**
34974 + * qbman_result_DQ_is_pull_complete() - Check whether the pull command is
34975 + * completed.
34976 + * @dq: the dequeue result.
34977 + *
34978 + * Return boolean.
34979 + */
34980 +static inline int qbman_result_DQ_is_pull_complete(
34981 +                                       const struct qbman_result *dq)
34982 +{
34983 +       return (int)(qbman_result_DQ_flags(dq) & QBMAN_DQ_STAT_EXPIRED);
34984 +}
34985 +
34986 +/**
34987 + * qbman_result_DQ_seqnum()  - Get the seqnum field in dequeue response
34988 + * seqnum is valid only if VALIDFRAME flag is TRUE
34989 + * @dq: the dequeue result.
34990 + *
34991 + * Return seqnum.
34992 + */
34993 +uint16_t qbman_result_DQ_seqnum(const struct qbman_result *dq);
34994 +
34995 +/**
34996 + * qbman_result_DQ_odpid() - Get the seqnum field in dequeue response
34997 + * odpid is valid only if ODPVAILD flag is TRUE.
34998 + * @dq: the dequeue result.
34999 + *
35000 + * Return odpid.
35001 + */
35002 +uint16_t qbman_result_DQ_odpid(const struct qbman_result *dq);
35003 +
35004 +/**
35005 + * qbman_result_DQ_fqid() - Get the fqid in dequeue response
35006 + * @dq: the dequeue result.
35007 + *
35008 + * Return fqid.
35009 + */
35010 +uint32_t qbman_result_DQ_fqid(const struct qbman_result *dq);
35011 +
35012 +/**
35013 + * qbman_result_DQ_byte_count() - Get the byte count in dequeue response
35014 + * @dq: the dequeue result.
35015 + *
35016 + * Return the byte count remaining in the FQ.
35017 + */
35018 +uint32_t qbman_result_DQ_byte_count(const struct qbman_result *dq);
35019 +
35020 +/**
35021 + * qbman_result_DQ_frame_count - Get the frame count in dequeue response
35022 + * @dq: the dequeue result.
35023 + *
35024 + * Return the frame count remaining in the FQ.
35025 + */
35026 +uint32_t qbman_result_DQ_frame_count(const struct qbman_result *dq);
35027 +
35028 +/**
35029 + * qbman_result_DQ_fqd_ctx() - Get the frame queue context in dequeue response
35030 + * @dq: the dequeue result.
35031 + *
35032 + * Return the frame queue context.
35033 + */
35034 +uint64_t qbman_result_DQ_fqd_ctx(const struct qbman_result *dq);
35035 +
35036 +/**
35037 + * qbman_result_DQ_fd() - Get the frame descriptor in dequeue response
35038 + * @dq: the dequeue result.
35039 + *
35040 + * Return the frame descriptor.
35041 + */
35042 +const struct qbman_fd *qbman_result_DQ_fd(const struct qbman_result *dq);
35043 +
35044 +/* State-change notifications (FQDAN/CDAN/CSCN/...). */
35045 +
35046 +/**
35047 + * qbman_result_SCN_state() - Get the state field in State-change notification
35048 + * @scn: the state change notification.
35049 + *
35050 + * Return the state in the notifiation.
35051 + */
35052 +uint8_t qbman_result_SCN_state(const struct qbman_result *scn);
35053 +
35054 +/**
35055 + * qbman_result_SCN_rid() - Get the resource id from the notification
35056 + * @scn: the state change notification.
35057 + *
35058 + * Return the resource id.
35059 + */
35060 +uint32_t qbman_result_SCN_rid(const struct qbman_result *scn);
35061 +
35062 +/**
35063 + * qbman_result_SCN_ctx() - get the context from the notification
35064 + * @scn: the state change notification.
35065 + *
35066 + * Return the context.
35067 + */
35068 +uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn);
35069 +
35070 +/**
35071 + * qbman_result_SCN_state_in_mem() - Get the state in notification written
35072 + * in memory
35073 + * @scn: the state change notification.
35074 + *
35075 + * Return the state.
35076 + */
35077 +uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn);
35078 +
35079 +/**
35080 + * qbman_result_SCN_rid_in_mem() - Get the resource id in notification written
35081 + * in memory.
35082 + * @scn: the state change notification.
35083 + *
35084 + * Return the resource id.
35085 + */
35086 +uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn);
35087 +
35088 +/* Type-specific "resource IDs". Mainly for illustration purposes, though it
35089 + * also gives the appropriate type widths.
35090 + */
35091 +/* Get the FQID from the FQDAN */
35092 +#define qbman_result_FQDAN_fqid(dq) qbman_result_SCN_rid(dq)
35093 +/* Get the FQID from the FQRN */
35094 +#define qbman_result_FQRN_fqid(dq) qbman_result_SCN_rid(dq)
35095 +/* Get the FQID from the FQRNI */
35096 +#define qbman_result_FQRNI_fqid(dq) qbman_result_SCN_rid(dq)
35097 +/* Get the FQID from the FQPN */
35098 +#define qbman_result_FQPN_fqid(dq) qbman_result_SCN_rid(dq)
35099 +/* Get the channel ID from the CDAN */
35100 +#define qbman_result_CDAN_cid(dq) ((uint16_t)qbman_result_SCN_rid(dq))
35101 +/* Get the CGID from the CSCN */
35102 +#define qbman_result_CSCN_cgid(dq) ((uint16_t)qbman_result_SCN_rid(dq))
35103 +
35104 +/**
35105 + * qbman_result_bpscn_bpid() - Get the bpid from BPSCN
35106 + * @scn: the state change notification.
35107 + *
35108 + * Return the buffer pool id.
35109 + */
35110 +uint16_t qbman_result_bpscn_bpid(const struct qbman_result *scn);
35111 +
35112 +/**
35113 + * qbman_result_bpscn_has_free_bufs() - Check whether there are free
35114 + * buffers in the pool from BPSCN.
35115 + * @scn: the state change notification.
35116 + *
35117 + * Return the number of free buffers.
35118 + */
35119 +int qbman_result_bpscn_has_free_bufs(const struct qbman_result *scn);
35120 +
35121 +/**
35122 + * qbman_result_bpscn_is_depleted() - Check BPSCN to see whether the
35123 + * buffer pool is depleted.
35124 + * @scn: the state change notification.
35125 + *
35126 + * Return the status of buffer pool depletion.
35127 + */
35128 +int qbman_result_bpscn_is_depleted(const struct qbman_result *scn);
35129 +
35130 +/**
35131 + * qbman_result_bpscn_is_surplus() - Check BPSCN to see whether the buffer
35132 + * pool is surplus or not.
35133 + * @scn: the state change notification.
35134 + *
35135 + * Return the status of buffer pool surplus.
35136 + */
35137 +int qbman_result_bpscn_is_surplus(const struct qbman_result *scn);
35138 +
35139 +/**
35140 + * qbman_result_bpscn_ctx() - Get the BPSCN CTX from BPSCN message
35141 + * @scn: the state change notification.
35142 + *
35143 + * Return the BPSCN context.
35144 + */
35145 +uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn);
35146 +
35147 +/* Parsing CGCU */
35148 +/**
35149 + * qbman_result_cgcu_cgid() - Check CGCU resouce id, i.e. cgid
35150 + * @scn: the state change notification.
35151 + *
35152 + * Return the CGCU resource id.
35153 + */
35154 +uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn);
35155 +
35156 +/**
35157 + * qbman_result_cgcu_icnt() - Get the I_CNT from CGCU
35158 + * @scn: the state change notification.
35159 + *
35160 + * Return instantaneous count in the CGCU notification.
35161 + */
35162 +uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn);
35163 +
35164 +       /************/
35165 +       /* Enqueues */
35166 +       /************/
35167 +
35168 +/**
35169 + * struct qbman_eq_desc - structure of enqueue descriptor
35170 + * @dont_manipulate_directly: the 8 32bit data to represent the whole
35171 + * possible qbman enqueue setting in enqueue descriptor.
35172 + */
35173 +struct qbman_eq_desc {
35174 +       uint32_t dont_manipulate_directly[8];
35175 +};
35176 +
35177 +/**
35178 + * struct qbman_eq_response - structure of enqueue response
35179 + * @dont_manipulate_directly: the 16 32bit data to represent the whole
35180 + * enqueue response.
35181 + */
35182 +struct qbman_eq_response {
35183 +       uint32_t dont_manipulate_directly[16];
35184 +};
35185 +
35186 +/**
35187 + * qbman_eq_desc_clear() - Clear the contents of a descriptor to
35188 + * default/starting state.
35189 + * @d: the given enqueue descriptor.
35190 + */
35191 +void qbman_eq_desc_clear(struct qbman_eq_desc *d);
35192 +
35193 +/* Exactly one of the following descriptor "actions" should be set. (Calling
35194 + * any one of these will replace the effect of any prior call to one of these.)
35195 + * - enqueue without order-restoration
35196 + * - enqueue with order-restoration
35197 + * - fill a hole in the order-restoration sequence, without any enqueue
35198 + * - advance NESN (Next Expected Sequence Number), without any enqueue
35199 + * 'respond_success' indicates whether an enqueue response should be DMA'd
35200 + * after success (otherwise a response is DMA'd only after failure).
35201 + * 'incomplete' indicates that other fragments of the same 'seqnum' are yet to
35202 + * be enqueued.
35203 + */
35204 +
35205 +/**
35206 + * qbman_eq_desc_set_no_orp() - Set enqueue descriptor without orp
35207 + * @d: the enqueue descriptor.
35208 + * @response_success: 1 = enqueue with response always; 0 = enqueue with
35209 + * rejections returned on a FQ.
35210 + */
35211 +void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success);
35212 +/**
35213 + * qbman_eq_desc_set_orp() - Set order-resotration in the enqueue descriptor
35214 + * @d: the enqueue descriptor.
35215 + * @response_success: 1 = enqueue with response always; 0 = enqueue with
35216 + * rejections returned on a FQ.
35217 + * @opr_id: the order point record id.
35218 + * @seqnum: the order restoration sequence number.
35219 + * @incomplete: indiates whether this is the last fragments using the same
35220 + * sequeue number.
35221 + */
35222 +void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
35223 +                          uint32_t opr_id, uint32_t seqnum, int incomplete);
35224 +
35225 +/**
35226 + * qbman_eq_desc_set_orp_hole() - fill a hole in the order-restoration sequence
35227 + * without any enqueue
35228 + * @d: the enqueue descriptor.
35229 + * @opr_id: the order point record id.
35230 + * @seqnum: the order restoration sequence number.
35231 + */
35232 +void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
35233 +                               uint32_t seqnum);
35234 +
35235 +/**
35236 + * qbman_eq_desc_set_orp_nesn() -  advance NESN (Next Expected Sequence Number)
35237 + * without any enqueue
35238 + * @d: the enqueue descriptor.
35239 + * @opr_id: the order point record id.
35240 + * @seqnum: the order restoration sequence number.
35241 + */
35242 +void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,
35243 +                               uint32_t seqnum);
35244 +/**
35245 + * qbman_eq_desc_set_response() - Set the enqueue response info.
35246 + * @d: the enqueue descriptor
35247 + * @storage_phys: the physical address of the enqueue response in memory.
35248 + * @stash: indicate that the write allocation enabled or not.
35249 + *
35250 + * In the case where an enqueue response is DMA'd, this determines where that
35251 + * response should go. (The physical/DMA address is given for hardware's
35252 + * benefit, but software should interpret it as a "struct qbman_eq_response"
35253 + * data structure.) 'stash' controls whether or not the write to main-memory
35254 + * expresses a cache-warming attribute.
35255 + */
35256 +void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
35257 +                               dma_addr_t storage_phys,
35258 +                               int stash);
35259 +
35260 +/**
35261 + * qbman_eq_desc_set_token() - Set token for the enqueue command
35262 + * @d: the enqueue descriptor
35263 + * @token: the token to be set.
35264 + *
35265 + * token is the value that shows up in an enqueue response that can be used to
35266 + * detect when the results have been published. The easiest technique is to zero
35267 + * result "storage" before issuing an enqueue, and use any non-zero 'token'
35268 + * value.
35269 + */
35270 +void qbman_eq_desc_set_token(struct qbman_eq_desc *d, uint8_t token);
35271 +
35272 +/**
35273 + * Exactly one of the following descriptor "targets" should be set. (Calling any
35274 + * one of these will replace the effect of any prior call to one of these.)
35275 + * - enqueue to a frame queue
35276 + * - enqueue to a queuing destination
35277 + * Note, that none of these will have any affect if the "action" type has been
35278 + * set to "orp_hole" or "orp_nesn".
35279 + */
35280 +/**
35281 + * qbman_eq_desc_set_fq() - Set Frame Queue id for the enqueue command
35282 + * @d: the enqueue descriptor
35283 + * @fqid: the id of the frame queue to be enqueued.
35284 + */
35285 +void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid);
35286 +
35287 +/**
35288 + * qbman_eq_desc_set_qd() - Set Queuing Destination for the enqueue command.
35289 + * @d: the enqueue descriptor
35290 + * @qdid: the id of the queuing destination to be enqueued.
35291 + * @qd_bin: the queuing destination bin
35292 + * @qd_prio: the queuing destination priority.
35293 + */
35294 +void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
35295 +                         uint32_t qd_bin, uint32_t qd_prio);
35296 +
35297 +/**
35298 + * qbman_eq_desc_set_eqdi() - enable/disable EQDI interrupt
35299 + * @d: the enqueue descriptor
35300 + * @enable: boolean to enable/disable EQDI
35301 + *
35302 + * Determines whether or not the portal's EQDI interrupt source should be
35303 + * asserted after the enqueue command is completed.
35304 + */
35305 +void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable);
35306 +
35307 +/**
35308 + * qbman_eq_desc_set_dca() - Set DCA mode in the enqueue command.
35309 + * @d: the enqueue descriptor.
35310 + * @enable: enabled/disable DCA mode.
35311 + * @dqrr_idx: DCAP_CI, the DCAP consumer index.
35312 + * @park: determine the whether park the FQ or not
35313 + *
35314 + * Determines whether or not a portal DQRR entry should be consumed once the
35315 + * enqueue command is completed. (And if so, and the DQRR entry corresponds to a
35316 + * held-active (order-preserving) FQ, whether the FQ should be parked instead of
35317 + * being rescheduled.)
35318 + */
35319 +void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
35320 +                          uint32_t dqrr_idx, int park);
35321 +
35322 +/**
35323 + * qbman_swp_enqueue() - Issue an enqueue command.
35324 + * @s: the software portal used for enqueue.
35325 + * @d: the enqueue descriptor.
35326 + * @fd: the frame descriptor to be enqueued.
35327 + *
35328 + * Please note that 'fd' should only be NULL if the "action" of the
35329 + * descriptor is "orp_hole" or "orp_nesn".
35330 + *
35331 + * Return 0 for a successful enqueue, -EBUSY if the EQCR is not ready.
35332 + */
35333 +int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
35334 +                     const struct qbman_fd *fd);
35335 +
35336 +/* TODO:
35337 + * qbman_swp_enqueue_thresh() - Set threshold for EQRI interrupt.
35338 + * @s: the software portal.
35339 + * @thresh: the threshold to trigger the EQRI interrupt.
35340 + *
35341 + * An EQRI interrupt can be generated when the fill-level of EQCR falls below
35342 + * the 'thresh' value set here. Setting thresh==0 (the default) disables.
35343 + */
35344 +int qbman_swp_enqueue_thresh(struct qbman_swp *s, unsigned int thresh);
35345 +
35346 +       /*******************/
35347 +       /* Buffer releases */
35348 +       /*******************/
35349 +/**
35350 + * struct qbman_release_desc - The structure for buffer release descriptor
35351 + * @dont_manipulate_directly: the 32bit data to represent the whole
35352 + * possible settings of qbman release descriptor.
35353 + */
35354 +struct qbman_release_desc {
35355 +       uint32_t dont_manipulate_directly[1];
35356 +};
35357 +
35358 +/**
35359 + * qbman_release_desc_clear() - Clear the contents of a descriptor to
35360 + * default/starting state.
35361 + * @d: the qbman release descriptor.
35362 + */
35363 +void qbman_release_desc_clear(struct qbman_release_desc *d);
35364 +
35365 +/**
35366 + * qbman_release_desc_set_bpid() - Set the ID of the buffer pool to release to
35367 + * @d: the qbman release descriptor.
35368 + */
35369 +void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid);
35370 +
35371 +/**
35372 + * qbman_release_desc_set_rcdi() - Determines whether or not the portal's RCDI
35373 + * interrupt source should be asserted after the release command is completed.
35374 + * @d: the qbman release descriptor.
35375 + */
35376 +void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable);
35377 +
35378 +/**
35379 + * qbman_swp_release() - Issue a buffer release command.
35380 + * @s: the software portal object.
35381 + * @d: the release descriptor.
35382 + * @buffers: a pointer pointing to the buffer address to be released.
35383 + * @num_buffers: number of buffers to be released,  must be less than 8.
35384 + *
35385 + * Return 0 for success, -EBUSY if the release command ring is not ready.
35386 + */
35387 +int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
35388 +                     const uint64_t *buffers, unsigned int num_buffers);
35389 +
35390 +/* TODO:
35391 + * qbman_swp_release_thresh() - Set threshold for RCRI interrupt
35392 + * @s: the software portal.
35393 + * @thresh: the threshold.
35394 + * An RCRI interrupt can be generated when the fill-level of RCR falls below
35395 + * the 'thresh' value set here. Setting thresh==0 (the default) disables.
35396 + */
35397 +int qbman_swp_release_thresh(struct qbman_swp *s, unsigned int thresh);
35398 +
35399 +       /*******************/
35400 +       /* Buffer acquires */
35401 +       /*******************/
35402 +/**
35403 + * qbman_swp_acquire() - Issue a buffer acquire command.
35404 + * @s: the software portal object.
35405 + * @bpid: the buffer pool index.
35406 + * @buffers: a pointer pointing to the acquired buffer address|es.
35407 + * @num_buffers: number of buffers to be acquired, must be less than 8.
35408 + *
35409 + * Return 0 for success, or negative error code if the acquire command
35410 + * fails.
35411 + */
35412 +int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
35413 +                     unsigned int num_buffers);
35414 +
35415 +       /*****************/
35416 +       /* FQ management */
35417 +       /*****************/
35418 +/**
35419 + * qbman_swp_fq_schedule() - Move the fq to the scheduled state.
35420 + * @s: the software portal object.
35421 + * @fqid: the index of frame queue to be scheduled.
35422 + *
35423 + * There are a couple of different ways that a FQ can end up parked state,
35424 + * This schedules it.
35425 + *
35426 + * Return 0 for success, or negative error code for failure.
35427 + */
35428 +int qbman_swp_fq_schedule(struct qbman_swp *s, uint32_t fqid);
35429 +
35430 +/**
35431 + * qbman_swp_fq_force() - Force the FQ to fully scheduled state.
35432 + * @s: the software portal object.
35433 + * @fqid: the index of frame queue to be forced.
35434 + *
35435 + * Force eligible will force a tentatively-scheduled FQ to be fully-scheduled
35436 + * and thus be available for selection by any channel-dequeuing behaviour (push
35437 + * or pull). If the FQ is subsequently "dequeued" from the channel and is still
35438 + * empty at the time this happens, the resulting dq_entry will have no FD.
35439 + * (qbman_result_DQ_fd() will return NULL.)
35440 + *
35441 + * Return 0 for success, or negative error code for failure.
35442 + */
35443 +int qbman_swp_fq_force(struct qbman_swp *s, uint32_t fqid);
35444 +
35445 +/**
35446 + * These functions change the FQ flow-control stuff between XON/XOFF. (The
35447 + * default is XON.) This setting doesn't affect enqueues to the FQ, just
35448 + * dequeues. XOFF FQs will remain in the tenatively-scheduled state, even when
35449 + * non-empty, meaning they won't be selected for scheduled dequeuing. If a FQ is
35450 + * changed to XOFF after it had already become truly-scheduled to a channel, and
35451 + * a pull dequeue of that channel occurs that selects that FQ for dequeuing,
35452 + * then the resulting dq_entry will have no FD. (qbman_result_DQ_fd() will
35453 + * return NULL.)
35454 + */
35455 +/**
35456 + * qbman_swp_fq_xon() - XON the frame queue.
35457 + * @s: the software portal object.
35458 + * @fqid: the index of frame queue.
35459 + *
35460 + * Return 0 for success, or negative error code for failure.
35461 + */
35462 +int qbman_swp_fq_xon(struct qbman_swp *s, uint32_t fqid);
35463 +/**
35464 + * qbman_swp_fq_xoff() - XOFF the frame queue.
35465 + * @s: the software portal object.
35466 + * @fqid: the index of frame queue.
35467 + *
35468 + * Return 0 for success, or negative error code for failure.
35469 + */
35470 +int qbman_swp_fq_xoff(struct qbman_swp *s, uint32_t fqid);
35471 +
35472 +       /**********************/
35473 +       /* Channel management */
35474 +       /**********************/
35475 +
35476 +/**
35477 + * If the user has been allocated a channel object that is going to generate
35478 + * CDANs to another channel, then these functions will be necessary.
35479 + * CDAN-enabled channels only generate a single CDAN notification, after which
35480 + * it they need to be reenabled before they'll generate another. (The idea is
35481 + * that pull dequeuing will occur in reaction to the CDAN, followed by a
35482 + * reenable step.) Each function generates a distinct command to hardware, so a
35483 + * combination function is provided if the user wishes to modify the "context"
35484 + * (which shows up in each CDAN message) each time they reenable, as a single
35485 + * command to hardware.
35486 + */
35487 +
35488 +/**
35489 + * qbman_swp_CDAN_set_context() - Set CDAN context
35490 + * @s: the software portal object.
35491 + * @channelid: the channel index.
35492 + * @ctx: the context to be set in CDAN.
35493 + *
35494 + * Return 0 for success, or negative error code for failure.
35495 + */
35496 +int qbman_swp_CDAN_set_context(struct qbman_swp *s, uint16_t channelid,
35497 +                              uint64_t ctx);
35498 +
35499 +/**
35500 + * qbman_swp_CDAN_enable() - Enable CDAN for the channel.
35501 + * @s: the software portal object.
35502 + * @channelid: the index of the channel to generate CDAN.
35503 + *
35504 + * Return 0 for success, or negative error code for failure.
35505 + */
35506 +int qbman_swp_CDAN_enable(struct qbman_swp *s, uint16_t channelid);
35507 +
35508 +/**
35509 + * qbman_swp_CDAN_disable() - disable CDAN for the channel.
35510 + * @s: the software portal object.
35511 + * @channelid: the index of the channel to generate CDAN.
35512 + *
35513 + * Return 0 for success, or negative error code for failure.
35514 + */
35515 +int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid);
35516 +
35517 +/**
35518 + * qbman_swp_CDAN_set_context_enable() - Set CDAN contest and enable CDAN
35519 + * @s: the software portal object.
35520 + * @channelid: the index of the channel to generate CDAN.
35521 + * @ctx: the context set in CDAN.
35522 + *
35523 + * Return 0 for success, or negative error code for failure.
35524 + */
35525 +int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,
35526 +                                     uint64_t ctx);
35527 +int qbman_swp_fill_ring(struct qbman_swp *s,
35528 +                       const struct qbman_eq_desc *d,
35529 +                      const struct qbman_fd *fd,
35530 +                      uint8_t burst_index);
35531 +int qbman_swp_flush_ring(struct qbman_swp *s);
35532 +void qbman_sync(void);
35533 +int qbman_swp_send_multiple(struct qbman_swp *s,
35534 +                           const struct qbman_eq_desc *d,
35535 +                           const struct qbman_fd *fd,
35536 +                           int frames_to_send);
35537 +
35538 +int qbman_check_command_complete(struct qbman_swp *s,
35539 +                                const struct qbman_result *dq);
35540 +#endif /* !_FSL_QBMAN_PORTAL_H */
35541 diff --git a/drivers/net/dpaa2/rte_eth_dpaa2_pvt.h b/drivers/net/dpaa2/rte_eth_dpaa2_pvt.h
35542 new file mode 100644
35543 index 0000000..bd5d4d5
35544 --- /dev/null
35545 +++ b/drivers/net/dpaa2/rte_eth_dpaa2_pvt.h
35546 @@ -0,0 +1,330 @@
35547 +/*-
35548 + *   BSD LICENSE
35549 + *
35550 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
35551 + *   All rights reserved.
35552 + *
35553 + *   Redistribution and use in source and binary forms, with or without
35554 + *   modification, are permitted provided that the following conditions
35555 + *   are met:
35556 + *
35557 + *     * Redistributions of source code must retain the above copyright
35558 + *       notice, this list of conditions and the following disclaimer.
35559 + *     * Redistributions in binary form must reproduce the above copyright
35560 + *       notice, this list of conditions and the following disclaimer in
35561 + *       the documentation and/or other materials provided with the
35562 + *       distribution.
35563 + *     * Neither the name of Freescale Semiconductor nor the names of its
35564 + *       contributors may be used to endorse or promote products derived
35565 + *       from this software without specific prior written permission.
35566 + *
35567 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35568 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35569 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
35570 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35571 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35572 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35573 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35574 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35575 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35576 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35577 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35578 + */
35579 +
35580 +#ifndef _RTE_ETH_DPAA2_PVT_H_
35581 +#define _RTE_ETH_DPAA2_PVT_H_
35582 +
35583 +#include <rte_memory.h>
35584 +#include <rte_mbuf.h>
35585 +#include <rte_atomic.h>
35586 +#include <fsl_mc_sys.h>
35587 +#include <eal_vfio.h>
35588 +#include <eal_vfio_fsl_mc.h>
35589 +#include <rte_mempool.h>
35590 +
35591 +typedef uint64_t  dma_addr_t;
35592 +
35593 +#define FALSE               0
35594 +#define TRUE                1
35595 +#ifndef false
35596 +#define false      FALSE
35597 +#endif
35598 +#ifndef true
35599 +#define true       TRUE
35600 +#endif
35601 +#define lower_32_bits(x) ((uint32_t)(x))
35602 +#define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
35603 +
35604 +#ifndef ETH_ADDR_LEN
35605 +#define ETH_ADDR_LEN                   6
35606 +#endif
35607 +#ifndef ETH_VLAN_HLEN
35608 +#define ETH_VLAN_HLEN   4 /** < Vlan Header Length */
35609 +#endif
35610 +
35611 +#define NUM_MAX_RECV_FRAMES    16
35612 +
35613 +#define MC_PORTAL_INDEX                0
35614 +#define NUM_DPIO_REGIONS       2
35615 +#define NUM_DQS_PER_QUEUE       2
35616 +#define MC_PORTALS_BASE_PADDR   0x00080C000000ULL
35617 +#define MC_PORTAL_STRIDE        0x10000
35618 +#define MC_PORTAL_SIZE         64
35619 +#define MC_PORTAL_ID_TO_PADDR(portal_id) \
35620 +(MC_PORTALS_BASE_PADDR + (portal_id) * MC_PORTAL_STRIDE)
35621 +
35622 +struct dpaa2_dpio_dev {
35623 +       TAILQ_ENTRY(dpaa2_dpio_dev) next; /**< Pointer to Next device instance */
35624 +       uint16_t index; /**< Index of a instance in the list */
35625 +       rte_atomic16_t ref_count; /**< How many thread contexts are sharing this.*/
35626 +       struct fsl_mc_io *dpio; /** handle to DPIO portal object */
35627 +       uint16_t token;
35628 +       struct qbman_swp *sw_portal; /** SW portal object */
35629 +       const struct qbman_result *dqrr[4]; /**< DQRR Entry for this SW portal */
35630 +       pthread_mutex_t lock; /** Required when Portal is shared */
35631 +       void *mc_portal; /**< MC Portal for configuring this device */
35632 +       uintptr_t qbman_portal_ce_paddr; /**< Physical address of Cache Enabled Area */
35633 +       uintptr_t ce_size; /**< Size of the CE region */
35634 +       uintptr_t qbman_portal_ci_paddr; /**< Physical address of Cache Inhibit Area */
35635 +       uintptr_t ci_size; /**< Size of the CI region */
35636 +       void *intr_handle;
35637 +       int32_t vfio_fd; /**< File descriptor received via VFIO */
35638 +       int32_t hw_id; /**< An unique ID of this DPIO device instance */
35639 +};
35640 +
35641 +struct queue_storage_info_t {
35642 +       struct qbman_result *dq_storage[NUM_DQS_PER_QUEUE];
35643 +       struct qbman_result *active_dqs;
35644 +       int toggle;
35645 +};
35646 +
35647 +struct thread_io_info_t {
35648 +       struct dpaa2_dpio_dev *dpio_dev;
35649 +       struct dpaa2_dpio_dev *sec_dpio_dev;
35650 +       struct qbman_result *global_active_dqs;
35651 +};
35652 +
35653 +/*! Global per thread DPIO portal */
35654 +extern __thread struct thread_io_info_t thread_io_info;
35655 +/*! Global MCP list */
35656 +extern void *(*mcp_ptr_list);
35657 +
35658 +/* Refer to Table 7-3 in SEC BG */
35659 +struct qbman_fle {
35660 +       uint32_t addr_lo;
35661 +       uint32_t addr_hi;
35662 +       uint32_t length;
35663 +       /* FMT must be 00, MSB is final bit  */
35664 +       uint32_t fin_bpid_offset;
35665 +       uint32_t frc;
35666 +       uint32_t reserved[3]; /* Not used currently */
35667 +};
35668 +
35669 +/* Maximum release/acquire from QBMAN */
35670 +#define DPAA2_MBUF_MAX_ACQ_REL 7
35671 +
35672 +#define MAX_BPID 256
35673 +
35674 +/*Macros to define operations on FD*/
35675 +#define DPAA2_SET_FD_ADDR(fd, addr)                            \
35676 +       fd->simple.addr_lo = lower_32_bits((uint64_t)addr);     \
35677 +       fd->simple.addr_hi = upper_32_bits((uint64_t)addr);
35678 +#define DPAA2_SET_FD_LEN(fd, length)   fd->simple.len = length
35679 +#define DPAA2_SET_FD_BPID(fd, bpid)    fd->simple.bpid_offset |= bpid;
35680 +#define DPAA2_SET_FD_IVP(fd)   ((fd->simple.bpid_offset |= 0x00004000))
35681 +#define DPAA2_SET_FD_OFFSET(fd, offset)        (fd->simple.bpid_offset |= (uint32_t)(offset) << 16);
35682 +#define DPAA2_SET_FD_INTERNAL_JD(fd, len) fd->simple.frc = (0x80000000 | (len));
35683 +#define DPAA2_SET_FD_FRC(fd, frc)      fd->simple.frc = frc;
35684 +#define DPAA2_RESET_FD_CTRL(fd)        fd->simple.ctrl = 0;
35685 +
35686 +#define        DPAA2_SET_FD_ASAL(fd, asal)     (fd->simple.ctrl |= (asal << 16))
35687 +#define DPAA2_SET_FD_FLC(fd, addr)                             \
35688 +       fd->simple.flc_lo = lower_32_bits((uint64_t)addr);      \
35689 +       fd->simple.flc_hi = upper_32_bits((uint64_t)addr);
35690 +#define DPAA2_SET_FLE_INTERNAL_JD(fle, len) fle->frc = (0x80000000 | (len));
35691 +#define DPAA2_GET_FLE_ADDR(fle)                                        \
35692 +       (uint64_t)((((uint64_t)(fle->addr_hi)) << 32) + fle->addr_lo)
35693 +#define DPAA2_SET_FLE_ADDR(fle, addr)  \
35694 +       fle->addr_lo = lower_32_bits((uint64_t)addr);     \
35695 +       fle->addr_hi = upper_32_bits((uint64_t)addr);
35696 +#define DPAA2_SET_FLE_OFFSET(fle, offset) (fle)->fin_bpid_offset |= (uint32_t)(offset) << 16;
35697 +#define DPAA2_SET_FLE_BPID(fle, bpid)  (fle)->fin_bpid_offset |= (uint64_t)bpid;
35698 +#define DPAA2_GET_FLE_BPID(fle, bpid)  (fle->fin_bpid_offset & 0x000000ff)
35699 +#define DPAA2_SET_FLE_FIN(fle) fle->fin_bpid_offset |= (uint64_t)1 << 31;
35700 +#define DPAA2_SET_FLE_IVP(fle)   (((fle)->fin_bpid_offset |= 0x00004000))
35701 +#define DPAA2_SET_FD_COMPOUND_FMT(fd)  \
35702 +       fd->simple.bpid_offset |= (uint32_t)1 << 28;
35703 +#define DPAA2_GET_FD_ADDR(fd)  \
35704 +       (uint64_t)((((uint64_t)(fd->simple.addr_hi)) << 32) + fd->simple.addr_lo)
35705 +#define DPAA2_GET_FD_LEN(fd)   (fd->simple.len)
35706 +#define DPAA2_GET_FD_BPID(fd)  ((fd->simple.bpid_offset & 0x00003FFF))
35707 +#define DPAA2_GET_FD_IVP(fd)   ((fd->simple.bpid_offset & 0x00004000) >> 14)
35708 +#define DPAA2_GET_FD_OFFSET(fd)        ((fd->simple.bpid_offset & 0x0FFF0000) >> 16)
35709 +#define DPAA2_GET_FD_FRC(fd)   (fd->simple.frc)
35710 +#define DPAA2_GET_FD_FLC(fd)   \
35711 +       (uint64_t)((((uint64_t)(fd->simple.flc_hi)) << 32) + fd->simple.flc_lo)
35712 +
35713 +#define DPAA2_SET_FLE_SG_EXT(fle)      fle->fin_bpid_offset |= (uint64_t)1 << 29;
35714 +#define DPAA2_IS_SET_FLE_SG_EXT(fle)   \
35715 +       (fle->fin_bpid_offset & ((uint64_t)1 << 29)) ? 1 : 0
35716 +
35717 +#define DPAA2_INLINE_MBUF_FROM_BUF(buf, meta_data_size) \
35718 +       ((struct rte_mbuf *)((uint64_t)buf - meta_data_size))
35719 +#define DPAA2_BUF_FROM_INLINE_MBUF(mbuf, meta_data_size) \
35720 +       ((uint8_t *)((uint64_t)mbuf + meta_data_size))
35721 +
35722 +#define DPAA2_ASAL_VAL (DPAA2_MBUF_HW_ANNOTATION / 64)
35723 +
35724 +/*Macros to define QBMAN enqueue options */
35725 +#define DPAA2_ETH_EQ_DISABLE           0       /*!< Dont Enqueue the Frame */
35726 +#define DPAA2_ETH_EQ_RESP_ON_SUCC      1       /*!< Enqueue the Frame with
35727 +                                                       response after success*/
35728 +#define DPAA2_ETH_EQ_RESP_ON_FAIL      2       /*!< Enqueue the Frame with
35729 +                                                       response after failure*/
35730 +#define DPAA2_ETH_EQ_NO_RESP           3       /*!< Enqueue the Frame without
35731 +                                                       response*/
35732 +/* Only Enqueue Error responses will be
35733 + * pushed on FQID_ERR of Enqueue FQ */
35734 +#define DPAA2_EQ_RESP_ERR_FQ           0
35735 +/* All Enqueue responses will be pushed on address
35736 + * set with qbman_eq_desc_set_response */
35737 +#define DPAA2_EQ_RESP_ALWAYS           1
35738 +
35739 +#define DPAA2_MAX_BUF_POOLS    8
35740 +
35741 +struct dpbp_node {
35742 +       struct dpbp_node *next;
35743 +       struct fsl_mc_io dpbp;
35744 +       uint16_t token;
35745 +       int dpbp_id;
35746 +};
35747 +
35748 +struct buf_pool_cfg {
35749 +       void *addr; /*!< The address from where DPAA2 will carve out the
35750 +                       * buffers. 'addr' should be 'NULL' if user wants
35751 +                       * to create buffers from the memory which user
35752 +                       * asked DPAA2 to reserve during 'nadk init' */
35753 +       phys_addr_t    phys_addr;  /*!< corresponding physical address
35754 +                               * of the memory provided in addr */
35755 +       uint32_t num; /*!< number of buffers */
35756 +       uint32_t size; /*!< size of each buffer. 'size' should include
35757 +                       * any headroom to be reserved and alignment */
35758 +       uint16_t align; /*!< Buffer alignment (in bytes) */
35759 +       uint16_t bpid; /*!< The buffer pool id. This will be filled
35760 +                       *in by DPAA2 for each buffer pool */
35761 +};
35762 +
35763 +struct buf_pool {
35764 +       uint32_t size;
35765 +       uint32_t num_bufs;
35766 +       uint16_t bpid;
35767 +       uint8_t *h_bpool_mem;
35768 +       struct rte_mempool *mp;
35769 +       struct dpbp_node *dpbp_node;
35770 +};
35771 +
35772 +/*!
35773 + * Buffer pool list configuration structure. User need to give DPAA2 the
35774 + * valid number of 'num_buf_pools'.
35775 + */
35776 +struct dpaa2_bp_list_cfg {
35777 +       struct buf_pool_cfg buf_pool; /* Configuration
35778 +                       * of each buffer pool */
35779 +};
35780 +
35781 +struct dpaa2_bp_list {
35782 +       struct dpaa2_bp_list *next;
35783 +       struct rte_mempool *mp;
35784 +       struct buf_pool buf_pool;
35785 +};
35786 +
35787 +struct bp_info {
35788 +       uint32_t meta_data_size;
35789 +       uint32_t bpid;
35790 +       struct dpaa2_bp_list *bp_list;
35791 +};
35792 +
35793 +#define mempool_to_bpinfo(mp) ((struct bp_info *)mp->pool_data)
35794 +#define mempool_to_bpid(mp) ((mempool_to_bpinfo(mp))->bpid)
35795 +
35796 +extern struct dpaa2_bp_list *h_bp_list;
35797 +
35798 +/* todo - this is costly, need to write a fast coversion routine */
35799 +static void *dpaa2_mem_ptov(phys_addr_t paddr)
35800 +{
35801 +       const struct rte_memseg *memseg = rte_eal_get_physmem_layout();
35802 +       int i;
35803 +
35804 +       for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
35805 +               if (paddr >= memseg[i].phys_addr &&
35806 +                   (char *)paddr < (char *)memseg[i].phys_addr + memseg[i].len)
35807 +                       return (void *)(memseg[i].addr_64 + (paddr - memseg[i].phys_addr));
35808 +       }
35809 +       return NULL;
35810 +}
35811 +
35812 +static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
35813 +{
35814 +       const struct rte_memseg *memseg = rte_eal_get_physmem_layout();
35815 +       int i;
35816 +
35817 +       for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
35818 +               if (vaddr >= memseg[i].addr_64 &&
35819 +                   vaddr < memseg[i].addr_64 + memseg[i].len)
35820 +                       return memseg[i].phys_addr + (vaddr - memseg[i].addr_64);
35821 +       }
35822 +       return (phys_addr_t)(NULL);
35823 +}
35824 +
35825 +#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
35826 +/*
35827 + * When we are using Physical addresses as IO Virtual Addresses,
35828 + * we call conversion routines nadk_mem_vtop & nadk_mem_ptov wherever required.
35829 + * These routines are called with help of below MACRO's
35830 + */
35831 +
35832 +#define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) (mbuf->buf_physaddr)
35833 +#define DPAA2_OP_VADDR_TO_IOVA(op) (op->phys_addr)
35834 +
35835 +/**
35836 + * macro to convert Virtual address to IOVA
35837 + */
35838 +#define DPAA2_VADDR_TO_IOVA(_vaddr) dpaa2_mem_vtop((uint64_t)(_vaddr))
35839 +
35840 +/**
35841 + * macro to convert IOVA to Virtual address
35842 + */
35843 +#define DPAA2_IOVA_TO_VADDR(_iova) dpaa2_mem_ptov((phys_addr_t)(_iova))
35844 +
35845 +/**
35846 + * macro to convert modify the memory containing Virtual address to IOVA
35847 + */
35848 +#define DPAA2_MODIFY_VADDR_TO_IOVA(_mem, _type) \
35849 +       {_mem = (_type)(dpaa2_mem_vtop((uint64_t)(_mem))); }
35850 +
35851 +/**
35852 + * macro to convert modify the memory containing IOVA to Virtual address
35853 + */
35854 +#define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type) \
35855 +       {_mem = (_type)(dpaa2_mem_ptov((phys_addr_t)(_mem))); }
35856 +
35857 +#else
35858 +#define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) (mbuf->buf_addr)
35859 +#define DPAA2_OP_VADDR_TO_IOVA(op) (op)
35860 +
35861 +#define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr)
35862 +#define DPAA2_IOVA_TO_VADDR(_iova) (_iova)
35863 +#define DPAA2_MODIFY_VADDR_TO_IOVA(_mem, _type)
35864 +#define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type)
35865 +#endif
35866 +
35867 +/* Function definitions for Mempool operations */
35868 +int hw_mbuf_init(struct rte_mempool *mp, void *_m);
35869 +int hw_mbuf_free_bulk(struct rte_mempool *pool, void * const *obj_table,
35870 +                       unsigned n);
35871 +int hw_mbuf_alloc_bulk(struct rte_mempool *pool, void **obj_table,
35872 +                       unsigned count);
35873 +int hw_mbuf_create_pool(struct rte_mempool *mp);
35874 +unsigned hw_mbuf_get_count(const struct rte_mempool *mp);
35875 +
35876 +#endif
35877 diff --git a/drivers/net/dpaa2/rte_eth_dpbp.c b/drivers/net/dpaa2/rte_eth_dpbp.c
35878 new file mode 100644
35879 index 0000000..a4d29c9
35880 --- /dev/null
35881 +++ b/drivers/net/dpaa2/rte_eth_dpbp.c
35882 @@ -0,0 +1,377 @@
35883 +/*-
35884 + *   BSD LICENSE
35885 + *
35886 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
35887 + *   All rights reserved.
35888 + *
35889 + *   Redistribution and use in source and binary forms, with or without
35890 + *   modification, are permitted provided that the following conditions
35891 + *   are met:
35892 + *
35893 + *     * Redistributions of source code must retain the above copyright
35894 + *       notice, this list of conditions and the following disclaimer.
35895 + *     * Redistributions in binary form must reproduce the above copyright
35896 + *       notice, this list of conditions and the following disclaimer in
35897 + *       the documentation and/or other materials provided with the
35898 + *       distribution.
35899 + *     * Neither the name of Freescale Semiconductor nor the names of its
35900 + *       contributors may be used to endorse or promote products derived
35901 + *       from this software without specific prior written permission.
35902 + *
35903 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35904 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35905 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
35906 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35907 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35908 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35909 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35910 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35911 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35912 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35913 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35914 + */
35915 +
35916 +#include <unistd.h>
35917 +#include <stdio.h>
35918 +#include <sys/types.h>
35919 +#include <string.h>
35920 +#include <stdlib.h>
35921 +#include <fcntl.h>
35922 +#include <errno.h>
35923 +#include <sys/ioctl.h>
35924 +#include <sys/stat.h>
35925 +#include <sys/types.h>
35926 +#include <sys/mman.h>
35927 +#include <sys/vfs.h>
35928 +#include <libgen.h>
35929 +#include <rte_mbuf.h>
35930 +
35931 +#include "rte_pci.h"
35932 +#include "rte_memzone.h"
35933 +
35934 +#include "rte_eth_dpaa2_pvt.h"
35935 +#include "fsl_qbman_portal.h"
35936 +#include <fsl_dpbp.h>
35937 +
35938 +#include <rte_log.h>
35939 +#include "dpaa2_logs.h"
35940 +
35941 +static struct dpbp_node *g_dpbp_list;
35942 +static struct dpbp_node *avail_dpbp;
35943 +
35944 +struct bp_info bpid_info[MAX_BPID];
35945 +
35946 +struct dpaa2_bp_list *h_bp_list;
35947 +
35948 +int
35949 +dpaa2_create_dpbp_device(
35950 +               int dpbp_id)
35951 +{
35952 +       struct dpbp_node *dpbp_node;
35953 +       int ret;
35954 +
35955 +       /* Allocate DPAA2 dpbp handle */
35956 +       dpbp_node = (struct dpbp_node *)malloc(sizeof(struct dpbp_node));
35957 +       if (!dpbp_node) {
35958 +               PMD_DRV_LOG(ERR, "Memory allocation failed for DPBP Device\n");
35959 +               return -1;
35960 +       }
35961 +
35962 +       /* Open the dpbp object */
35963 +       dpbp_node->dpbp.regs = mcp_ptr_list[MC_PORTAL_INDEX];
35964 +       ret = dpbp_open(&dpbp_node->dpbp, CMD_PRI_LOW, dpbp_id, &dpbp_node->token);
35965 +       if (ret) {
35966 +               PMD_DRV_LOG(ERR, "Resource allocation failure with err code: %d",
35967 +                           ret);
35968 +               free(dpbp_node);
35969 +               return -1;
35970 +       }
35971 +
35972 +       /* Clean the device first */
35973 +       ret = dpbp_reset(&dpbp_node->dpbp, CMD_PRI_LOW, dpbp_node->token);
35974 +       if (ret) {
35975 +               PMD_DRV_LOG(ERR, "Failure cleaning dpbp device with"
35976 +                       "error code %d\n", ret);
35977 +               return -1;
35978 +       }
35979 +
35980 +       dpbp_node->dpbp_id = dpbp_id;
35981 +       /* Add the dpbp handle into the global list */
35982 +       dpbp_node->next = g_dpbp_list;
35983 +       g_dpbp_list = dpbp_node;
35984 +       avail_dpbp = g_dpbp_list;
35985 +
35986 +       PMD_DRV_LOG(INFO, "Buffer resource initialized");
35987 +
35988 +       return 0;
35989 +}
35990 +
35991 +int hw_mbuf_create_pool(struct rte_mempool *mp)
35992 +{
35993 +       struct dpaa2_bp_list *bp_list;
35994 +       struct dpbp_attr dpbp_attr;
35995 +       uint32_t bpid;
35996 +       int ret;
35997 +
35998 +       if (!avail_dpbp) {
35999 +               PMD_DRV_LOG(ERR, "DPAA2 resources not available\n");
36000 +               return -1;
36001 +       }
36002 +
36003 +       ret = dpbp_enable(&avail_dpbp->dpbp, CMD_PRI_LOW, avail_dpbp->token);
36004 +       if (ret != 0) {
36005 +               PMD_DRV_LOG(ERR, "Resource enable failure with"
36006 +                       "err code: %d\n", ret);
36007 +               return -1;
36008 +       }
36009 +
36010 +       ret = dpbp_get_attributes(&avail_dpbp->dpbp, CMD_PRI_LOW,
36011 +                                 avail_dpbp->token, &dpbp_attr);
36012 +       if (ret != 0) {
36013 +               PMD_DRV_LOG(ERR, "Resource read failure with"
36014 +                       "err code: %d\n", ret);
36015 +               ret = dpbp_disable(&avail_dpbp->dpbp, CMD_PRI_LOW,
36016 +                                  avail_dpbp->token);
36017 +               return -1;
36018 +       }
36019 +
36020 +       /* Allocate the bp_list which will be added into global_bp_list */
36021 +       bp_list = (struct dpaa2_bp_list *)malloc(sizeof(struct dpaa2_bp_list));
36022 +       if (!bp_list) {
36023 +               PMD_DRV_LOG(ERR, "No heap memory available\n");
36024 +               return -1;
36025 +       }
36026 +
36027 +       /* Set parameters of buffer pool list */
36028 +       bp_list->buf_pool.num_bufs = mp->size;
36029 +       bp_list->buf_pool.size = mp->elt_size
36030 +                       - sizeof(struct rte_mbuf) - rte_pktmbuf_priv_size(mp);
36031 +       bp_list->buf_pool.bpid = dpbp_attr.bpid;
36032 +       bp_list->buf_pool.h_bpool_mem = NULL;
36033 +       bp_list->buf_pool.mp = mp;
36034 +       bp_list->buf_pool.dpbp_node = avail_dpbp;
36035 +       bp_list->next = h_bp_list;
36036 +
36037 +       bpid = dpbp_attr.bpid;
36038 +
36039 +       /* Increment the available DPBP */
36040 +       avail_dpbp = avail_dpbp->next;
36041 +
36042 +       bpid_info[bpid].meta_data_size = sizeof(struct rte_mbuf)
36043 +                               + rte_pktmbuf_priv_size(mp);
36044 +       bpid_info[bpid].bp_list = bp_list;
36045 +       bpid_info[bpid].bpid = bpid;
36046 +
36047 +       mp->pool_data = (void *)&bpid_info[bpid];
36048 +
36049 +       PMD_DRV_LOG(INFO, "BP List created for bpid =%d\n", dpbp_attr.bpid);
36050 +
36051 +       h_bp_list = bp_list;
36052 +       /* TODO: Replace with mp->pool_data->flags after creating appropriate
36053 +        * pool_data structure
36054 +        */
36055 +       mp->flags |= MEMPOOL_F_HW_PKT_POOL;
36056 +       return 0;
36057 +}
36058 +
36059 +void hw_mbuf_free_pool(struct rte_mempool *mp __rte_unused)
36060 +{
36061 +       /* TODO:
36062 +        * 1. Release bp_list memory allocation
36063 +        * 2. opposite of dpbp_enable()
36064 +        * <More>
36065 +        */
36066 +       struct dpaa2_bp_list *bp;
36067 +
36068 +       /* Iterate over h_bp_list linked list and release each element */
36069 +       while (h_bp_list) {
36070 +               bp = h_bp_list;
36071 +               h_bp_list = bp->next;
36072 +
36073 +               /* TODO: Should be changed to rte_free */
36074 +               free(bp);
36075 +       }
36076 +
36077 +       PMD_DRV_LOG(DEBUG, "(%s) called\n", __func__);
36078 +       return;
36079 +}
36080 +
36081 +static inline void dpaa2_mbuf_release(uint64_t buf, uint32_t bpid)
36082 +{
36083 +       struct qbman_release_desc releasedesc;
36084 +       struct qbman_swp *swp;
36085 +       int ret;
36086 +
36087 +       if (!thread_io_info.dpio_dev) {
36088 +               ret = dpaa2_affine_qbman_swp();
36089 +               if (ret != 0) {
36090 +                       PMD_DRV_LOG(ERR, "Failed to allocate IO portal");
36091 +                       return;
36092 +               }
36093 +       }
36094 +       swp = thread_io_info.dpio_dev->sw_portal;
36095 +
36096 +       /* Create a release descriptor required for releasing
36097 +        * buffers into BMAN */
36098 +       qbman_release_desc_clear(&releasedesc);
36099 +       qbman_release_desc_set_bpid(&releasedesc, bpid);
36100 +
36101 +       do {
36102 +               /* Release buffer into the BMAN */
36103 +               ret = qbman_swp_release(swp, &releasedesc, &buf, 1);
36104 +       } while (ret == -EBUSY);
36105 +       PMD_TX_FREE_LOG(DEBUG, "Released %p address to BMAN\n", buf);
36106 +}
36107 +
36108 +int hw_mbuf_alloc_bulk(struct rte_mempool *pool,
36109 +                      void **obj_table, unsigned count)
36110 +{
36111 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
36112 +       static int alloc;
36113 +#endif
36114 +       struct qbman_swp *swp;
36115 +       uint32_t mbuf_size;
36116 +       uint16_t bpid;
36117 +       uint64_t bufs[RTE_MEMPOOL_CACHE_MAX_SIZE + 1];
36118 +       int ret;
36119 +       unsigned i, n = 0;
36120 +       struct bp_info *bp_info;
36121 +
36122 +       PMD_DRV_LOG_RAW(INFO, "%s/n", __func__);
36123 +       bp_info = mempool_to_bpinfo(pool);
36124 +
36125 +       if (!(bp_info->bp_list)) {
36126 +               printf("\nDPAA2 buffer pool not configured\n");
36127 +               return -2;
36128 +       }
36129 +
36130 +       bpid = bp_info->bpid;
36131 +
36132 +       if (!thread_io_info.dpio_dev) {
36133 +               ret = dpaa2_affine_qbman_swp();
36134 +               if (ret != 0) {
36135 +                       PMD_DRV_LOG(ERR, "Failed to allocate IO portal");
36136 +                       return -1;
36137 +               }
36138 +       }
36139 +       swp = thread_io_info.dpio_dev->sw_portal;
36140 +
36141 +       /* if number of buffers requested is less than 7 */
36142 +       if (count < DPAA2_MBUF_MAX_ACQ_REL) {
36143 +               ret = qbman_swp_acquire(swp, bpid, &bufs[n], count);
36144 +               if (ret <= 0) {
36145 +                       PMD_DRV_LOG(ERR, "Failed to allocate buffers %d", ret);
36146 +                       return -1;
36147 +               }
36148 +               n = ret;
36149 +               goto set_buf;
36150 +       }
36151 +
36152 +       while (n < count) {
36153 +               ret = 0;
36154 +               /* Acquire is all-or-nothing, so we drain in 7s,
36155 +                * then the remainder.
36156 +                */
36157 +               if ((count - n) > DPAA2_MBUF_MAX_ACQ_REL) {
36158 +                       ret = qbman_swp_acquire(swp, bpid, &bufs[n],
36159 +                                               DPAA2_MBUF_MAX_ACQ_REL);
36160 +                       if (ret == DPAA2_MBUF_MAX_ACQ_REL) {
36161 +                               n += ret;
36162 +                       }
36163 +               } else {
36164 +                       ret = qbman_swp_acquire(swp, bpid, &bufs[n], count - n);
36165 +                       if (ret > 0) {
36166 +                               PMD_DRV_LOG(DEBUG, "Drained buffer: %x",
36167 +                                       bufs[n]);
36168 +                               n += ret;
36169 +                       }
36170 +               }
36171 +               /* In case of less than requested number of buffers available
36172 +                * in pool, qbman_swp_acquire returns 0
36173 +                */
36174 +               if (ret <= 0) {
36175 +                       PMD_DRV_LOG(WARNING, "Buffer aquire failed with"
36176 +                               "err code: %d", ret);
36177 +                       break;
36178 +               }
36179 +       }
36180 +
36181 +       /* This function either returns expected buffers or error */
36182 +       if (count != n) {
36183 +               i = 0;
36184 +               /* Releasing all buffers allocated */
36185 +               while (i < n) {
36186 +                       dpaa2_mbuf_release(bufs[i], bpid);
36187 +                       i++;
36188 +               }
36189 +               return -1;
36190 +       }
36191 +
36192 +       if (ret < 0 || n == 0) {
36193 +               PMD_DRV_LOG_RAW(ERR, "Failed to allocate buffers %d", ret);
36194 +               return -1;
36195 +       }
36196 +set_buf:
36197 +
36198 +       mbuf_size = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(pool);
36199 +
36200 +       for (i = 0; i < n; i++) {
36201 +               DPAA2_MODIFY_IOVA_TO_VADDR(bufs[i], uint64_t);
36202 +               obj_table[i] = (struct rte_mbuf *)(bufs[i] - mbuf_size);
36203 +               PMD_DRV_LOG(DEBUG, "Acquired %p address %p from BMAN\n",
36204 +                               (void *)bufs[i], (void *)obj_table[i]);
36205 +       }
36206 +
36207 +#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
36208 +       alloc += n;
36209 +       PMD_DRV_LOG_RAW(INFO, "Total = %d , req = %d done = %d",
36210 +               alloc, count, n);
36211 +#endif
36212 +       return 0;
36213 +}
36214 +
36215 +int hw_mbuf_free_bulk(struct rte_mempool *pool, void * const *obj_table,
36216 +                     unsigned n)
36217 +{
36218 +       unsigned i;
36219 +       struct bp_info *bp_info;
36220 +
36221 +       PMD_DRV_LOG_RAW(INFO, "%s/n", __func__);
36222 +
36223 +       bp_info = mempool_to_bpinfo(pool);
36224 +       if (!(bp_info->bp_list)) {
36225 +               PMD_DRV_LOG(INFO, "DPAA2 buffer pool not configured\n");
36226 +               return -1;
36227 +       }
36228 +       /* TODO - optimize it */
36229 +       for (i = 0; i < n; i++) {
36230 +#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
36231 +               dpaa2_mbuf_release(
36232 +                       (uint64_t)rte_mempool_virt2phy(pool, obj_table[i])
36233 +                       + bp_info->meta_data_size, bp_info->bpid);
36234 +#else
36235 +               dpaa2_mbuf_release((uint64_t)obj_table[i]
36236 +                       + bp_info->meta_data_size, bp_info->bpid);
36237 +#endif
36238 +
36239 +       }
36240 +
36241 +       return 0;
36242 +}
36243 +
36244 +unsigned hw_mbuf_get_count(const struct rte_mempool *mp __rte_unused)
36245 +{
36246 +       /* TODO: incomplete */
36247 +       return 0;
36248 +}
36249 +
36250 +struct rte_mempool_ops dpaa2_mpool_ops = {
36251 +       .name = "dpaa2",
36252 +       .alloc = hw_mbuf_create_pool,
36253 +       .free = hw_mbuf_free_pool,
36254 +       .enqueue = hw_mbuf_free_bulk,
36255 +       .dequeue = hw_mbuf_alloc_bulk,
36256 +       .get_count = hw_mbuf_get_count,
36257 +};
36258 +
36259 +MEMPOOL_REGISTER_OPS(dpaa2_mpool_ops);
36260 diff --git a/drivers/net/dpaa2/rte_eth_dpio.c b/drivers/net/dpaa2/rte_eth_dpio.c
36261 new file mode 100644
36262 index 0000000..2d06923
36263 --- /dev/null
36264 +++ b/drivers/net/dpaa2/rte_eth_dpio.c
36265 @@ -0,0 +1,336 @@
36266 +/*-
36267 + *   BSD LICENSE
36268 + *
36269 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
36270 + *   All rights reserved.
36271 + *
36272 + *   Redistribution and use in source and binary forms, with or without
36273 + *   modification, are permitted provided that the following conditions
36274 + *   are met:
36275 + *
36276 + *     * Redistributions of source code must retain the above copyright
36277 + *       notice, this list of conditions and the following disclaimer.
36278 + *     * Redistributions in binary form must reproduce the above copyright
36279 + *       notice, this list of conditions and the following disclaimer in
36280 + *       the documentation and/or other materials provided with the
36281 + *       distribution.
36282 + *     * Neither the name of Freescale Semiconductor nor the names of its
36283 + *       contributors may be used to endorse or promote products derived
36284 + *       from this software without specific prior written permission.
36285 + *
36286 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36287 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36288 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
36289 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36290 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
36291 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36292 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36293 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36294 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36295 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36296 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36297 + */
36298 +
36299 +#include <unistd.h>
36300 +#include <stdio.h>
36301 +#include <sys/types.h>
36302 +#include <string.h>
36303 +#include <stdlib.h>
36304 +#include <fcntl.h>
36305 +#include <errno.h>
36306 +#include <sys/ioctl.h>
36307 +#include <sys/stat.h>
36308 +#include <sys/types.h>
36309 +#include <sys/mman.h>
36310 +#include <sys/vfs.h>
36311 +#include <libgen.h>
36312 +
36313 +#include "rte_pci.h"
36314 +#include "rte_memzone.h"
36315 +#include <rte_malloc.h>
36316 +
36317 +#include "rte_eth_dpaa2_pvt.h"
36318 +#include "fsl_qbman_portal.h"
36319 +#include <fsl_dpio.h>
36320 +
36321 +#include <rte_log.h>
36322 +#include "dpaa2_logs.h"
36323 +
36324 +#define NUM_HOST_CPUS RTE_MAX_LCORE
36325 +
36326 +__thread struct thread_io_info_t thread_io_info;
36327 +
36328 +TAILQ_HEAD(dpio_device_list, dpaa2_dpio_dev);
36329 +static struct dpio_device_list *dpio_dev_list; /*!< DPIO device list */
36330 +static uint32_t io_space_count;
36331 +
36332 +/*Stashing Macros*/
36333 +#define DPAA2_CORE_CLUSTER_BASE                0x04
36334 +#define DPAA2_CORE_CLUSTER_FIRST               (DPAA2_CORE_CLUSTER_BASE + 0)
36335 +#define DPAA2_CORE_CLUSTER_SECOND      (DPAA2_CORE_CLUSTER_BASE + 1)
36336 +#define DPAA2_CORE_CLUSTER_THIRD               (DPAA2_CORE_CLUSTER_BASE + 2)
36337 +#define DPAA2_CORE_CLUSTER_FOURTH      (DPAA2_CORE_CLUSTER_BASE + 3)
36338 +
36339 +#define DPAA2_CORE_CLUSTER_GET(sdest, cpu_id) \
36340 +do { \
36341 +       if (cpu_id == 0 || cpu_id == 1) \
36342 +               sdest = DPAA2_CORE_CLUSTER_FIRST; \
36343 +       else if (cpu_id == 2 || cpu_id == 3) \
36344 +               sdest = DPAA2_CORE_CLUSTER_SECOND; \
36345 +       else if (cpu_id == 4 || cpu_id == 5) \
36346 +               sdest = DPAA2_CORE_CLUSTER_THIRD; \
36347 +       else \
36348 +               sdest = DPAA2_CORE_CLUSTER_FOURTH; \
36349 +} while (0)
36350 +
36351 +static int
36352 +configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
36353 +{
36354 +       struct qbman_swp_desc p_des;
36355 +       struct dpio_attr attr;
36356 +
36357 +       dpio_dev->dpio = malloc(sizeof(struct fsl_mc_io));
36358 +       if (!dpio_dev->dpio) {
36359 +               PMD_DRV_LOG(ERR, "Memory allocation failure\n");
36360 +               return -1;
36361 +       }
36362 +
36363 +       PMD_DRV_LOG(INFO, "\t Alocated  DPIO[%p]", dpio_dev->dpio);
36364 +       dpio_dev->dpio->regs = dpio_dev->mc_portal;
36365 +       if (dpio_open(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->hw_id,
36366 +                     &dpio_dev->token)) {
36367 +               PMD_DRV_LOG(ERR, "Failed to allocate IO space\n");
36368 +               free(dpio_dev->dpio);
36369 +               return -1;
36370 +       }
36371 +
36372 +       if (dpio_reset(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token)) {
36373 +               PMD_DRV_LOG(ERR, "Failed to reset dpio\n");
36374 +               dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
36375 +               free(dpio_dev->dpio);
36376 +               return -1;
36377 +       }
36378 +
36379 +       if (dpio_enable(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token)) {
36380 +               PMD_DRV_LOG(ERR, "Failed to Enable dpio\n");
36381 +               dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
36382 +               free(dpio_dev->dpio);
36383 +               return -1;
36384 +       }
36385 +
36386 +       if (dpio_get_attributes(dpio_dev->dpio, CMD_PRI_LOW,
36387 +                               dpio_dev->token, &attr)) {
36388 +               PMD_DRV_LOG(ERR, "DPIO Get attribute failed\n");
36389 +               dpio_disable(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
36390 +               dpio_close(dpio_dev->dpio, CMD_PRI_LOW,  dpio_dev->token);
36391 +               free(dpio_dev->dpio);
36392 +               return -1;
36393 +       }
36394 +
36395 +       PMD_DRV_LOG(INFO, "Qbman Portal ID %d", attr.qbman_portal_id);
36396 +       PMD_DRV_LOG(INFO, "Portal CE addr 0x%lX", attr.qbman_portal_ce_offset);
36397 +       PMD_DRV_LOG(INFO, "Portal CI addr 0x%lX", attr.qbman_portal_ci_offset);
36398 +
36399 +       /* Configure & setup SW portal */
36400 +       p_des.block = NULL;
36401 +       p_des.idx = attr.qbman_portal_id;
36402 +       p_des.cena_bar = (void *)(dpio_dev->qbman_portal_ce_paddr);
36403 +       p_des.cinh_bar = (void *)(dpio_dev->qbman_portal_ci_paddr);
36404 +       p_des.irq = -1;
36405 +       p_des.qman_version = attr.qbman_version;
36406 +
36407 +       PMD_DRV_LOG(INFO, "Portal CE addr 0x%p", p_des.cena_bar);
36408 +       PMD_DRV_LOG(INFO, "Portal CI addr 0x%p", p_des.cinh_bar);
36409 +
36410 +       dpio_dev->sw_portal = qbman_swp_init(&p_des);
36411 +       if (dpio_dev->sw_portal == NULL) {
36412 +               PMD_DRV_LOG(ERR, " QBMan SW Portal Init failed\n");
36413 +               dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
36414 +               free(dpio_dev->dpio);
36415 +               return -1;
36416 +       }
36417 +
36418 +       PMD_DRV_LOG(INFO, "QBMan SW Portal 0x%p\n", dpio_dev->sw_portal);
36419 +
36420 +       return 0;
36421 +}
36422 +
36423 +int dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev)
36424 +{
36425 +       int sdest;
36426 +       int cpu_id, ret;
36427 +
36428 +       /* Set the Stashing Destination */
36429 +       cpu_id = rte_lcore_id();
36430 +       if (cpu_id < 0) {
36431 +               cpu_id = rte_get_master_lcore();
36432 +               if (cpu_id < 0) {
36433 +                       PMD_DRV_LOG(ERR, "\tGetting CPU Index failed\n");
36434 +                       return -1;
36435 +               }
36436 +       }
36437 +
36438 +       /*
36439 +        *  In case of running DPDK on the Virtual Machine the Stashing
36440 +        *  Destination gets set in the H/W w.r.t. the Virtual CPU ID's.
36441 +        *  As a W.A. environment variable HOST_START_CPU tells which
36442 +        *  the offset of the host start core of the Virtual Machine threads.
36443 +        */
36444 +       if (getenv("HOST_START_CPU")) {
36445 +               cpu_id +=
36446 +               atoi(getenv("HOST_START_CPU"));
36447 +               cpu_id = cpu_id % NUM_HOST_CPUS;
36448 +       }
36449 +
36450 +       /* Set the STASH Destination depending on Current CPU ID.
36451 +          Valid values of SDEST are 4,5,6,7. Where,
36452 +          CPU 0-1 will have SDEST 4
36453 +          CPU 2-3 will have SDEST 5.....and so on.
36454 +       */
36455 +       DPAA2_CORE_CLUSTER_GET(sdest, cpu_id);
36456 +       PMD_DRV_LOG(INFO, "Portal= %d  CPU= %u SDEST= %d\n",
36457 +                   dpio_dev->index, cpu_id, sdest);
36458 +
36459 +       ret = dpio_set_stashing_destination(dpio_dev->dpio, CMD_PRI_LOW,
36460 +                                           dpio_dev->token, sdest);
36461 +       if (ret) {
36462 +               PMD_DRV_LOG(ERR, "%d ERROR in SDEST\n",  ret);
36463 +               return -1;
36464 +       }
36465 +
36466 +       return 0;
36467 +}
36468 +
36469 +static inline struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(void)
36470 +{
36471 +       struct dpaa2_dpio_dev *dpio_dev = NULL;
36472 +       int ret;
36473 +
36474 +       /* Get DPIO dev handle from list using index */
36475 +       TAILQ_FOREACH(dpio_dev, dpio_dev_list, next) {
36476 +               if (dpio_dev && rte_atomic16_test_and_set(&dpio_dev->ref_count))
36477 +                       break;
36478 +       }
36479 +       if (!dpio_dev)
36480 +               return NULL;
36481 +
36482 +       ret = dpaa2_configure_stashing(dpio_dev);
36483 +       if (ret) {
36484 +               RTE_LOG(ERR, EAL, "dpaa2_configure_stashing failed");
36485 +       }
36486 +       return dpio_dev;
36487 +}
36488 +int
36489 +dpaa2_affine_qbman_swp(void)
36490 +{
36491 +       if (thread_io_info.dpio_dev)
36492 +               return 0;
36493 +
36494 +       /* Populate the thread_io_info structure */
36495 +       thread_io_info.dpio_dev = dpaa2_get_qbman_swp();
36496 +       if (thread_io_info.dpio_dev)
36497 +               return 0;
36498 +       else
36499 +               return -1;
36500 +}
36501 +
36502 +int
36503 +dpaa2_affine_qbman_swp_sec(void)
36504 +{
36505 +       if (thread_io_info.sec_dpio_dev)
36506 +               return 0;
36507 +
36508 +       /* Populate the thread_io_info structure */
36509 +       thread_io_info.sec_dpio_dev = dpaa2_get_qbman_swp();
36510 +       if (thread_io_info.sec_dpio_dev)
36511 +               return 0;
36512 +       else
36513 +               return -1;
36514 +}
36515 +
36516 +int
36517 +dpaa2_create_dpio_device(struct fsl_vfio_device *vdev,
36518 +                        struct vfio_device_info *obj_info,
36519 +               int object_id)
36520 +{
36521 +       struct dpaa2_dpio_dev *dpio_dev;
36522 +       struct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};
36523 +
36524 +       if (obj_info->num_regions < NUM_DPIO_REGIONS) {
36525 +               PMD_DRV_LOG(ERR, "ERROR, Not sufficient number "
36526 +                               "of DPIO regions.\n");
36527 +               return -1;
36528 +       }
36529 +
36530 +       if (!dpio_dev_list) {
36531 +               dpio_dev_list = malloc(sizeof(struct dpio_device_list));
36532 +               if (NULL == dpio_dev_list) {
36533 +                       PMD_DRV_LOG(ERR, "Memory allocation failed for DPIO list\n");
36534 +                       return -1;
36535 +               }
36536 +
36537 +               /* Initialize the DPIO List */
36538 +               TAILQ_INIT(dpio_dev_list);
36539 +       }
36540 +
36541 +       dpio_dev = malloc(sizeof(struct dpaa2_dpio_dev));
36542 +       if (!dpio_dev) {
36543 +               PMD_DRV_LOG(ERR, "Memory allocation failed for DPIO Device\n");
36544 +               return -1;
36545 +       }
36546 +
36547 +       PMD_DRV_LOG(INFO, "\t Aloocated DPIO [%p]", dpio_dev);
36548 +       dpio_dev->dpio = NULL;
36549 +       dpio_dev->hw_id = object_id;
36550 +       dpio_dev->vfio_fd = vdev->fd;
36551 +       rte_atomic16_init(&dpio_dev->ref_count);
36552 +       /* Using single portal  for all devices */
36553 +       dpio_dev->mc_portal = mcp_ptr_list[MC_PORTAL_INDEX];
36554 +
36555 +       reg_info.index = 0;
36556 +       if (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info)) {
36557 +               printf("vfio: error getting region info\n");
36558 +               return -1;
36559 +       }
36560 +
36561 +       PMD_DRV_LOG(INFO, "\t  Region Offset = %llx", reg_info.offset);
36562 +       PMD_DRV_LOG(INFO, "\t  Region Size = %llx", reg_info.size);
36563 +       dpio_dev->ce_size = reg_info.size;
36564 +       dpio_dev->qbman_portal_ce_paddr = (uint64_t)mmap(NULL, reg_info.size,
36565 +                               PROT_WRITE | PROT_READ, MAP_SHARED,
36566 +                               dpio_dev->vfio_fd, reg_info.offset);
36567 +
36568 +       /* Create Mapping for QBMan Cache Enabled area. This is a fix for
36569 +          SMMU fault for DQRR statshing transaction. */
36570 +       if (vfio_dmamap_mem_region(dpio_dev->qbman_portal_ce_paddr,
36571 +                                  reg_info.offset, reg_info.size)) {
36572 +               PMD_DRV_LOG(ERR, "DMAMAP for Portal CE area failed.\n");
36573 +               return -1;
36574 +       }
36575 +
36576 +       reg_info.index = 1;
36577 +       if (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info)) {
36578 +               printf("vfio: error getting region info\n");
36579 +               return -1;
36580 +       }
36581 +
36582 +       PMD_DRV_LOG(INFO, "\t  Region Offset = %llx", reg_info.offset);
36583 +       PMD_DRV_LOG(INFO, "\t  Region Size = %llx", reg_info.size);
36584 +       dpio_dev->ci_size = reg_info.size;
36585 +       dpio_dev->qbman_portal_ci_paddr = (uint64_t)mmap(NULL, reg_info.size,
36586 +                               PROT_WRITE | PROT_READ, MAP_SHARED,
36587 +                               dpio_dev->vfio_fd, reg_info.offset);
36588 +
36589 +       if (configure_dpio_qbman_swp(dpio_dev)) {
36590 +               PMD_DRV_LOG(ERR,
36591 +                           "Failed in configuring the qbman portal for dpio %d\n",
36592 +                        dpio_dev->hw_id);
36593 +               return -1;
36594 +       }
36595 +
36596 +       io_space_count++;
36597 +       dpio_dev->index = io_space_count;
36598 +       TAILQ_INSERT_HEAD(dpio_dev_list, dpio_dev, next);
36599 +
36600 +       return 0;
36601 +}
36602 diff --git a/drivers/net/dpaa2/rte_eth_dpni.c b/drivers/net/dpaa2/rte_eth_dpni.c
36603 new file mode 100644
36604 index 0000000..c1587dc
36605 --- /dev/null
36606 +++ b/drivers/net/dpaa2/rte_eth_dpni.c
36607 @@ -0,0 +1,2269 @@
36608 +/*-
36609 + *   BSD LICENSE
36610 + *
36611 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
36612 + *
36613 + *   Redistribution and use in source and binary forms, with or without
36614 + *   modification, are permitted provided that the following conditions
36615 + *   are met:
36616 + *
36617 + *     * Redistributions of source code must retain the above copyright
36618 + *       notice, this list of conditions and the following disclaimer.
36619 + *     * Redistributions in binary form must reproduce the above copyright
36620 + *       notice, this list of conditions and the following disclaimer in
36621 + *       the documentation and/or other materials provided with the
36622 + *       distribution.
36623 + *     * Neither the name of Freescale Semiconductor, Inc nor the names of its
36624 + *       contributors may be used to endorse or promote products derived
36625 + *       from this software without specific prior written permission.
36626 + *
36627 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36628 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36629 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
36630 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36631 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
36632 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36633 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36634 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36635 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36636 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36637 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36638 + */
36639 +
36640 +#include <time.h>
36641 +#include <rte_mbuf.h>
36642 +#include <rte_ethdev.h>
36643 +#include <rte_malloc.h>
36644 +#include <rte_memcpy.h>
36645 +#include <rte_string_fns.h>
36646 +#include <rte_cycles.h>
36647 +#include <rte_kvargs.h>
36648 +#include <rte_dev.h>
36649 +
36650 +#include <net/if.h>
36651 +/* MC header files */
36652 +#include <fsl_dpbp.h>
36653 +#include <fsl_dpni.h>
36654 +#include "rte_eth_dpaa2_pvt.h"
36655 +#include "rte_eth_dpni_annot.h"
36656 +#include "dpaa2_logs.h"
36657 +
36658 +#include <fsl_qbman_portal.h>
36659 +#include <fsl_dpio.h>
36660 +
36661 +#define DPAA2_STASHING
36662 +
36663 +/* tx fd send batching */
36664 +#define QBMAN_MULTI_TX
36665 +/* #define DPAA2_CGR_SUPPORT */
36666 +
36667 +
36668 +#define DPAA2_MIN_RX_BUF_SIZE 512
36669 +#define DPAA2_MAX_RX_PKT_LEN  10240 /*WRIOP support*/
36670 +
36671 +#define RTE_ETH_DPAA2_SNAPSHOT_LEN 65535
36672 +#define RTE_ETH_DPAA2_SNAPLEN 4096
36673 +#define RTE_ETH_DPAA2_PROMISC 1
36674 +#define RTE_ETH_DPAA2_TIMEOUT -1
36675 +#define ETH_DPAA2_RX_IFACE_ARG "rx_iface"
36676 +#define ETH_DPAA2_TX_IFACE_ARG "tx_iface"
36677 +#define ETH_DPAA2_IFACE_ARG    "iface"
36678 +
36679 +static const char *drivername = "DPNI PMD";
36680 +
36681 +#define MAX_TCS                        DPNI_MAX_TC
36682 +#define MAX_RX_QUEUES          64
36683 +#define MAX_TX_QUEUES          64
36684 +
36685 +/*Maximum number of slots available in TX ring*/
36686 +#define MAX_SLOTS              8
36687 +
36688 +/*Threshold for a queue to *Enter* Congestion state.
36689 +  It is set to 128 frames of size 64 bytes.*/
36690 +#define CONG_ENTER_THRESHOLD   (128 * 64)
36691 +
36692 +/*Threshold for a queue to *Exit* Congestion state.
36693 +  It is set to 98 frames of size 64 bytes*/
36694 +#define CONG_EXIT_THRESHOLD    (98 * 64)
36695 +
36696 +/*! Maximum number of flow distributions per traffic class */
36697 +#define MAX_DIST_PER_TC 16
36698 +
36699 +/* Size of the input SMMU mapped memory required by MC */
36700 +#define DIST_PARAM_IOVA_SIZE 256
36701 +
36702 +struct dpaa2_queue {
36703 +       void *dev;
36704 +       int32_t eventfd;        /*!< Event Fd of this queue */
36705 +       uint32_t fqid;  /*!< Unique ID of this queue */
36706 +       uint8_t tc_index;       /*!< traffic class identifier */
36707 +       uint16_t flow_id;       /*!< To be used by DPAA2 frmework */
36708 +       uint64_t rx_pkts;
36709 +       uint64_t tx_pkts;
36710 +       uint64_t err_pkts;
36711 +       union {
36712 +               struct queue_storage_info_t *q_storage;
36713 +               struct qbman_result *cscn;
36714 +       };
36715 +};
36716 +
36717 +struct dpaa2_dev_priv {
36718 +       void *hw;
36719 +       int32_t hw_id;
36720 +       int32_t qdid;
36721 +       uint16_t token;
36722 +       uint8_t nb_tx_queues;
36723 +       uint8_t nb_rx_queues;
36724 +       void *rx_vq[MAX_RX_QUEUES];
36725 +       void *tx_vq[MAX_TX_QUEUES];
36726 +
36727 +       struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */
36728 +       uint16_t num_dist_per_tc[MAX_TCS];
36729 +
36730 +       uint8_t max_unicast_filters;
36731 +       uint8_t max_multicast_filters;
36732 +       uint8_t max_vlan_filters;
36733 +       uint8_t num_tc;
36734 +       uint32_t options;
36735 +};
36736 +
36737 +static struct rte_pci_id pci_id_dpaa2_map[] = {
36738 +       {RTE_PCI_DEVICE(FSL_VENDOR_ID, FSL_MC_DPNI_DEVID)},
36739 +};
36740 +
36741 +extern struct bp_info bpid_info[MAX_BPID];
36742 +
36743 +static void dpaa2_print_stats(struct rte_eth_dev *dev)
36744 +{
36745 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
36746 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
36747 +       uint64_t value;
36748 +
36749 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_ING_FRAME, &value);
36750 +       printf("Rx packets: %ld\n", value);
36751 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_ING_BYTE, &value);
36752 +       printf("Rx bytes: %ld\n", value);
36753 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_ING_MCAST_FRAME, &value);
36754 +       printf("Rx Multicast: %ld\n", value);
36755 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_ING_FRAME_DROP, &value);
36756 +       printf("Rx dropped: %ld\n", value);
36757 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_ING_FRAME_DISCARD, &value);
36758 +       printf("Rx discarded: %ld\n", value);
36759 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_EGR_FRAME, &value);
36760 +       printf("Tx packets: %ld\n", value);
36761 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_EGR_BYTE, &value);
36762 +       printf("Tx bytes: %ld\n", value);
36763 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token, DPNI_CNT_EGR_FRAME_DISCARD, &value);
36764 +       printf("Tx dropped: %ld\n", value);
36765 +}
36766 +
36767 +/**
36768 + * Atomically reads the link status information from global
36769 + * structure rte_eth_dev.
36770 + *
36771 + * @param dev
36772 + *   - Pointer to the structure rte_eth_dev to read from.
36773 + *   - Pointer to the buffer to be saved with the link status.
36774 + *
36775 + * @return
36776 + *   - On success, zero.
36777 + *   - On failure, negative value.
36778 + */
36779 +static inline int
36780 +rte_dpni_dev_atomic_read_link_status(struct rte_eth_dev *dev,
36781 +                                    struct rte_eth_link *link)
36782 +{
36783 +       struct rte_eth_link *dst = link;
36784 +       struct rte_eth_link *src = &dev->data->dev_link;
36785 +
36786 +       if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
36787 +                               *(uint64_t *)src) == 0)
36788 +               return -1;
36789 +
36790 +       return 0;
36791 +}
36792 +
36793 +/**
36794 + * Atomically writes the link status information into global
36795 + * structure rte_eth_dev.
36796 + *
36797 + * @param dev
36798 + *   - Pointer to the structure rte_eth_dev to read from.
36799 + *   - Pointer to the buffer to be saved with the link status.
36800 + *
36801 + * @return
36802 + *   - On success, zero.
36803 + *   - On failure, negative value.
36804 + */
36805 +static inline int
36806 +rte_dpni_dev_atomic_write_link_status(struct rte_eth_dev *dev,
36807 +                                     struct rte_eth_link *link)
36808 +{
36809 +       struct rte_eth_link *dst = &dev->data->dev_link;
36810 +       struct rte_eth_link *src = link;
36811 +
36812 +       if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
36813 +                               *(uint64_t *)src) == 0)
36814 +               return -1;
36815 +
36816 +       return 0;
36817 +}
36818 +
36819 +static inline void
36820 +dpaa2_eth_parse_packet(struct rte_mbuf *mbuf, uint64_t hw_annot_addr)
36821 +{
36822 +       uint32_t pkt_type = 0;
36823 +       struct pkt_annotation *annotation =
36824 +                       (struct pkt_annotation *)hw_annot_addr;
36825 +
36826 +       PMD_DRV_LOG(DEBUG, "\n 1 annotation = 0x%lx   ", annotation->word4);
36827 +
36828 +       if (BIT_ISSET_AT_POS(annotation->word3, L2_ETH_MAC_PRESENT))
36829 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L2_ETHER;
36830 +
36831 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_IPV4_1_PRESENT))
36832 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L3_IPV4;
36833 +
36834 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_IPV6_1_PRESENT))
36835 +               pkt_type /* mbuf->packet_type */ |= RTE_PTYPE_L3_IPV6;
36836 +
36837 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_1_OPT_PRESENT))
36838 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L3_IPV4_EXT;
36839 +
36840 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_UDP_PRESENT))
36841 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L4_UDP;
36842 +
36843 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_TCP_PRESENT))
36844 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L4_TCP;
36845 +
36846 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_SCTP_PRESENT))
36847 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L4_SCTP;
36848 +
36849 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_ICMP_PRESENT))
36850 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_L4_ICMP;
36851 +
36852 +       if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_UNKNOWN_PROTOCOL))
36853 +               pkt_type/* mbuf->packet_type */ |= RTE_PTYPE_UNKNOWN;
36854 +
36855 +       mbuf->packet_type = pkt_type;
36856 +}
36857 +
36858 +static inline
36859 +struct rte_mbuf *eth_fd_to_mbuf(const struct qbman_fd *fd)
36860 +{
36861 +       struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
36862 +               DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
36863 +                       bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
36864 +       /* need to repopulated some of the fields,
36865 +       as they may have changed in last transmission*/
36866 +
36867 +
36868 +       mbuf->data_off = DPAA2_GET_FD_OFFSET(fd);
36869 +       mbuf->data_len = DPAA2_GET_FD_LEN(fd);
36870 +       mbuf->pkt_len = mbuf->data_len;
36871 +       mbuf->next = NULL;
36872 +       rte_mbuf_refcnt_set(mbuf, 1);
36873 +
36874 +       PMD_DRV_LOG(DEBUG, "to mbuf - mbuf =%p, mbuf->buf_addr =%p, off = %d,"
36875 +               "fd_off=%d fd =%lx, meta = %d  bpid =%d, len=%d\n",
36876 +               mbuf, mbuf->buf_addr, mbuf->data_off,
36877 +               DPAA2_GET_FD_OFFSET(fd), DPAA2_GET_FD_ADDR(fd),
36878 +               bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
36879 +               DPAA2_GET_FD_BPID(fd), DPAA2_GET_FD_LEN(fd));
36880 +
36881 +       /* Parse the packet */
36882 +       /* parse results are after the private - sw annotation area */
36883 +       dpaa2_eth_parse_packet(mbuf,
36884 +                              (uint64_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
36885 +                + DPAA2_FD_PTA_SIZE);
36886 +
36887 +       mbuf->nb_segs = 1;
36888 +       mbuf->ol_flags = 0;
36889 +
36890 +       return mbuf;
36891 +}
36892 +
36893 +static void __attribute__ ((noinline)) eth_mbuf_to_fd(struct rte_mbuf *mbuf,
36894 +                                                     struct qbman_fd *fd, uint16_t bpid)
36895 +{
36896 +       /*Resetting the buffer pool id and offset field*/
36897 +       fd->simple.bpid_offset = 0;
36898 +
36899 +       DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
36900 +       DPAA2_SET_FD_LEN(fd, mbuf->data_len);
36901 +       DPAA2_SET_FD_BPID(fd, bpid);
36902 +       DPAA2_SET_FD_OFFSET(fd, mbuf->data_off);
36903 +       DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
36904 +
36905 +       PMD_DRV_LOG(DEBUG, "mbuf =%p, mbuf->buf_addr =%p, off = %d,"
36906 +               "fd_off=%d fd =%lx, meta = %d  bpid =%d, len=%d\n",
36907 +               mbuf, mbuf->buf_addr, mbuf->data_off,
36908 +               DPAA2_GET_FD_OFFSET(fd), DPAA2_GET_FD_ADDR(fd),
36909 +               bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
36910 +               DPAA2_GET_FD_BPID(fd), DPAA2_GET_FD_LEN(fd));
36911 +
36912 +       return;
36913 +}
36914 +
36915 +static int eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
36916 +                              struct qbman_fd *fd, uint16_t bpid)
36917 +{
36918 +       struct rte_mbuf *m;
36919 +       void *mb = NULL;
36920 +
36921 +       if (hw_mbuf_alloc_bulk(bpid_info[bpid].bp_list->buf_pool.mp, &mb, 1)) {
36922 +               PMD_DRV_LOG(WARNING, "Unable to allocated DPAA2 buffer");
36923 +               rte_pktmbuf_free(mbuf);
36924 +               return -1;
36925 +       }
36926 +       m = (struct rte_mbuf *)mb;
36927 +       memcpy((char *)m->buf_addr + mbuf->data_off,
36928 +              (void *)((char *)mbuf->buf_addr + mbuf->data_off),
36929 +               mbuf->pkt_len);
36930 +
36931 +       /*Resetting the buffer pool id and offset field*/
36932 +       fd->simple.bpid_offset = 0;
36933 +
36934 +       DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(m));
36935 +       DPAA2_SET_FD_LEN(fd, mbuf->data_len);
36936 +       DPAA2_SET_FD_BPID(fd, bpid);
36937 +       DPAA2_SET_FD_OFFSET(fd, mbuf->data_off);
36938 +       DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
36939 +
36940 +       PMD_DRV_LOG(DEBUG, "\nmbuf %p BMAN buf addr %p",
36941 +                   (void *)mbuf, mbuf->buf_addr);
36942 +
36943 +       PMD_DRV_LOG(DEBUG, "\nfdaddr =%lx bpid =%d meta =%d off =%d, len =%d\n",
36944 +                   DPAA2_GET_FD_ADDR(fd),
36945 +               DPAA2_GET_FD_BPID(fd),
36946 +               bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
36947 +               DPAA2_GET_FD_OFFSET(fd),
36948 +               DPAA2_GET_FD_LEN(fd));
36949 +       /*free the original packet */
36950 +       rte_pktmbuf_free(mbuf);
36951 +
36952 +       return 0;
36953 +}
36954 +
36955 +static uint16_t
36956 +eth_dpaa2_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
36957 +{
36958 +       /* Function is responsible to receive frames for a given device and VQ*/
36959 +       struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
36960 +       struct qbman_result *dq_storage;
36961 +       uint32_t fqid = dpaa2_q->fqid;
36962 +       int ret, num_rx = 0;
36963 +       uint8_t is_last = 0, status;
36964 +       struct qbman_swp *swp;
36965 +       const struct qbman_fd *fd;
36966 +       struct qbman_pull_desc pulldesc;
36967 +       struct rte_eth_dev *dev = dpaa2_q->dev;
36968 +
36969 +       if (!thread_io_info.dpio_dev) {
36970 +               ret = dpaa2_affine_qbman_swp();
36971 +               if (ret) {
36972 +                       PMD_DRV_LOG(ERR, "Failure in affining portal\n");
36973 +                       return 0;
36974 +               }
36975 +       }
36976 +       swp = thread_io_info.dpio_dev->sw_portal;
36977 +       dq_storage = dpaa2_q->q_storage->dq_storage[0];
36978 +
36979 +       qbman_pull_desc_clear(&pulldesc);
36980 +       qbman_pull_desc_set_numframes(&pulldesc, nb_pkts);
36981 +       qbman_pull_desc_set_fq(&pulldesc, fqid);
36982 +       /* todo optimization - we can have dq_storage_phys available*/
36983 +       qbman_pull_desc_set_storage(&pulldesc, dq_storage,
36984 +                                   (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
36985 +
36986 +       /*Issue a volatile dequeue command. */
36987 +       while (1) {
36988 +               if (qbman_swp_pull(swp, &pulldesc)) {
36989 +                       PMD_DRV_LOG(ERR, "VDQ command is not issued."
36990 +                               "QBMAN is busy\n");
36991 +                       /* Portal was busy, try again */
36992 +                       continue;
36993 +               }
36994 +               break;
36995 +       };
36996 +
36997 +       /* Receive the packets till Last Dequeue entry is found with
36998 +          respect to the above issues PULL command.
36999 +        */
37000 +       while (!is_last) {
37001 +               /*Check if the previous issued command is completed.
37002 +               *Also seems like the SWP is shared between the Ethernet Driver
37003 +               *and the SEC driver.*/
37004 +               while (!qbman_check_command_complete(swp, dq_storage))
37005 +                       ;
37006 +               /* Loop until the dq_storage is updated with
37007 +                * new token by QBMAN */
37008 +               while (!qbman_result_has_new_result(swp, dq_storage))
37009 +                       ;
37010 +               /* Check whether Last Pull command is Expired and
37011 +               setting Condition for Loop termination */
37012 +               if (qbman_result_DQ_is_pull_complete(dq_storage)) {
37013 +                       is_last = 1;
37014 +                       /* Check for valid frame. */
37015 +                       status = (uint8_t)qbman_result_DQ_flags(dq_storage);
37016 +                       if (unlikely((status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
37017 +                               PMD_DRV_LOG(DEBUG, "No frame is delivered\n");
37018 +                               continue;
37019 +                       }
37020 +               }
37021 +
37022 +               fd = qbman_result_DQ_fd(dq_storage);
37023 +               bufs[num_rx] = eth_fd_to_mbuf(fd);
37024 +               bufs[num_rx]->port = dev->data->port_id;
37025 +
37026 +               num_rx++;
37027 +               dq_storage++;
37028 +       } /* End of Packet Rx loop */
37029 +
37030 +       dpaa2_q->rx_pkts += num_rx;
37031 +
37032 +       PMD_DRV_LOG(INFO, "Ethernet Received %d Packets\n", num_rx);
37033 +       /*Return the total number of packets received to DPAA2 app*/
37034 +       return num_rx;
37035 +}
37036 +
37037 +static uint16_t
37038 +eth_dpaa2_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
37039 +{
37040 +       /* Function is responsible to receive frames for a given device and VQ*/
37041 +       struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
37042 +       struct qbman_result *dq_storage;
37043 +       uint32_t fqid = dpaa2_q->fqid;
37044 +       int ret, i, num_rx = 0;
37045 +       uint8_t is_last = 0, status;
37046 +       struct qbman_swp *swp;
37047 +       const struct qbman_fd *fd[16];
37048 +       struct qbman_pull_desc pulldesc;
37049 +       struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
37050 +       struct rte_eth_dev *dev = dpaa2_q->dev;
37051 +
37052 +       if (!thread_io_info.dpio_dev) {
37053 +               ret = dpaa2_affine_qbman_swp();
37054 +               if (ret) {
37055 +                       PMD_DRV_LOG(ERR, "Failure in affining portal\n");
37056 +                       return 0;
37057 +               }
37058 +       }
37059 +       swp = thread_io_info.dpio_dev->sw_portal;
37060 +
37061 +       if (!q_storage->active_dqs) {
37062 +               q_storage->toggle = 0;
37063 +               dq_storage = q_storage->dq_storage[q_storage->toggle];
37064 +               qbman_pull_desc_clear(&pulldesc);
37065 +               qbman_pull_desc_set_numframes(&pulldesc, nb_pkts);
37066 +               qbman_pull_desc_set_fq(&pulldesc, fqid);
37067 +               qbman_pull_desc_set_storage(&pulldesc, dq_storage,
37068 +                                           (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
37069 +               if (thread_io_info.global_active_dqs) {
37070 +                       while (!qbman_check_command_complete(swp, thread_io_info.global_active_dqs))
37071 +                               ;
37072 +               }
37073 +               while (1) {
37074 +                       if (qbman_swp_pull(swp, &pulldesc)) {
37075 +                               PMD_DRV_LOG(WARNING, "VDQ command is not issued."
37076 +                                           "QBMAN is busy\n");
37077 +                               /* Portal was busy, try again */
37078 +                               continue;
37079 +                       }
37080 +                       break;
37081 +               }
37082 +               q_storage->active_dqs = dq_storage;
37083 +               thread_io_info.global_active_dqs = dq_storage;
37084 +       }
37085 +       if (thread_io_info.global_active_dqs)
37086 +               while (!qbman_check_command_complete(swp, thread_io_info.global_active_dqs))
37087 +               ;
37088 +       dq_storage = q_storage->active_dqs;
37089 +       while (!is_last) {
37090 +               /* Loop until the dq_storage is updated with
37091 +                * new token by QBMAN */
37092 +               struct rte_mbuf *mbuf;
37093 +
37094 +               while (!qbman_result_has_new_result(swp, dq_storage))
37095 +                       ;
37096 +               rte_prefetch0((void *)((uint64_t)(dq_storage + 1)));
37097 +               /* Check whether Last Pull command is Expired and
37098 +               setting Condition for Loop termination */
37099 +               if (qbman_result_DQ_is_pull_complete(dq_storage)) {
37100 +                       is_last = 1;
37101 +                       /* Check for valid frame. */
37102 +                       status = (uint8_t)qbman_result_DQ_flags(dq_storage);
37103 +                       if (unlikely((status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
37104 +                               PMD_DRV_LOG2(DEBUG, "No frame is delivered\n");
37105 +                               continue;
37106 +                       }
37107 +               }
37108 +               fd[num_rx] = qbman_result_DQ_fd(dq_storage);
37109 +               mbuf = (struct rte_mbuf *)DPAA2_IOVA_TO_VADDR(
37110 +                               DPAA2_GET_FD_ADDR(fd[num_rx])
37111 +                                - bpid_info[DPAA2_GET_FD_BPID(fd[num_rx])].meta_data_size);
37112 +               /* Prefeth mbuf */
37113 +               rte_prefetch0(mbuf);
37114 +               /* Prefetch Annotation address from where we get parse results */
37115 +               rte_prefetch0((void *)((uint64_t)DPAA2_GET_FD_ADDR(fd[num_rx]) + DPAA2_FD_PTA_SIZE + 16));
37116 +               /*Prefetch Data buffer*/
37117 +               /* rte_prefetch0((void *)((uint64_t)DPAA2_GET_FD_ADDR(fd[num_rx]) + DPAA2_GET_FD_OFFSET(fd[num_rx]))); */
37118 +               dq_storage++;
37119 +               num_rx++;
37120 +
37121 +       } /* End of Packet Rx loop */
37122 +
37123 +       for (i = 0; i < num_rx; i++) {
37124 +               bufs[i] = eth_fd_to_mbuf(fd[i]);
37125 +               bufs[i]->port = dev->data->port_id;
37126 +       }
37127 +
37128 +       q_storage->toggle ^= 1;
37129 +       dq_storage = q_storage->dq_storage[q_storage->toggle];
37130 +       qbman_pull_desc_clear(&pulldesc);
37131 +       qbman_pull_desc_set_numframes(&pulldesc, nb_pkts);
37132 +       qbman_pull_desc_set_fq(&pulldesc, fqid);
37133 +       qbman_pull_desc_set_storage(&pulldesc, dq_storage,
37134 +                                   (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
37135 +       /*Issue a volatile dequeue command. */
37136 +
37137 +       while (1) {
37138 +               if (qbman_swp_pull(swp, &pulldesc)) {
37139 +                       PMD_DRV_LOG(WARNING, "VDQ command is not issued."
37140 +                               "QBMAN is busy\n");
37141 +                       continue;
37142 +               }
37143 +               break;
37144 +       }
37145 +       q_storage->active_dqs = dq_storage;
37146 +       thread_io_info.global_active_dqs = dq_storage;
37147 +
37148 +       dpaa2_q->rx_pkts += num_rx;
37149 +
37150 +       PMD_DRV_LOG2(INFO, "Ethernet Received %d Packets\n", num_rx);
37151 +       /*Return the total number of packets received to DPAA2 app*/
37152 +       return num_rx;
37153 +}
37154 +
37155 +/*
37156 + * Callback to handle sending packets through a real NIC.
37157 + */
37158 +static uint16_t
37159 +eth_dpaa2_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
37160 +{
37161 +       /* Function to transmit the frames to given device and VQ*/
37162 +       uint32_t loop;
37163 +       int32_t ret;
37164 +#ifdef QBMAN_MULTI_TX
37165 +       struct qbman_fd fd_arr[8];
37166 +       uint32_t frames_to_send;
37167 +#else
37168 +       struct qbman_fd fd;
37169 +#endif
37170 +       struct rte_mempool *mp;
37171 +       struct qbman_eq_desc eqdesc;
37172 +       struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
37173 +       struct qbman_swp *swp;
37174 +       uint16_t num_tx = 0;
37175 +       uint16_t bpid;
37176 +       struct rte_eth_dev *dev = dpaa2_q->dev;
37177 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37178 +
37179 +       if (!thread_io_info.dpio_dev) {
37180 +               ret = dpaa2_affine_qbman_swp();
37181 +               if (ret) {
37182 +                       PMD_DRV_LOG(ERR, "Failure in affining portal\n");
37183 +                       return 0;
37184 +               }
37185 +       }
37186 +       swp = thread_io_info.dpio_dev->sw_portal;
37187 +
37188 +       PMD_DRV_LOG(DEBUG, "===> dev =%p, fqid =%d", dev, dpaa2_q->fqid);
37189 +
37190 +       /*Prepare enqueue descriptor*/
37191 +       qbman_eq_desc_clear(&eqdesc);
37192 +       qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
37193 +       qbman_eq_desc_set_response(&eqdesc, 0, 0);
37194 +       qbman_eq_desc_set_qd(&eqdesc, priv->qdid,
37195 +                            dpaa2_q->flow_id, dpaa2_q->tc_index);
37196 +
37197 +       /*Clear the unused FD fields before sending*/
37198 +#ifdef QBMAN_MULTI_TX
37199 +       while (nb_pkts) {
37200 +#ifdef DPAA2_CGR_SUPPORT
37201 +               /*Check if the queue is congested*/
37202 +               if (qbman_result_is_CSCN(dpaa2_q->cscn))
37203 +                       goto skip_tx;
37204 +#endif
37205 +               frames_to_send = (nb_pkts >> 3) ? MAX_SLOTS : nb_pkts;
37206 +
37207 +               for (loop = 0; loop < frames_to_send; loop++) {
37208 +                       fd_arr[loop].simple.frc = 0;
37209 +                       DPAA2_RESET_FD_CTRL((&fd_arr[loop]));
37210 +                       DPAA2_SET_FD_FLC((&fd_arr[loop]), NULL);
37211 +                       mp = (*bufs)->pool;
37212 +                       /* Not a hw_pkt pool allocated frame */
37213 +                       if (mp && !(mp->flags & MEMPOOL_F_HW_PKT_POOL)) {
37214 +                               printf("\n non hw offload bufffer ");
37215 +                               /* alloc should be from the default buffer pool
37216 +                               attached to this interface */
37217 +                               if (priv->bp_list) {
37218 +                                       bpid = priv->bp_list->buf_pool.bpid;
37219 +                               } else {
37220 +                                       printf("\n ??? why no bpool attached");
37221 +                                       num_tx = 0;
37222 +                                       goto skip_tx;
37223 +                               }
37224 +                               if (eth_copy_mbuf_to_fd(*bufs, &fd_arr[loop], bpid)) {
37225 +                                       bufs++;
37226 +                                       continue;
37227 +                               }
37228 +                       } else {
37229 +                               RTE_ASSERT(mp);
37230 +                               bpid = mempool_to_bpid(mp);
37231 +                               eth_mbuf_to_fd(*bufs, &fd_arr[loop], bpid);
37232 +                       }
37233 +                       bufs++;
37234 +               }
37235 +               loop = 0;
37236 +               while (loop < frames_to_send) {
37237 +                       loop += qbman_swp_send_multiple(swp, &eqdesc,
37238 +                                       &fd_arr[loop], frames_to_send - loop);
37239 +               }
37240 +
37241 +               num_tx += frames_to_send;
37242 +               dpaa2_q->tx_pkts += frames_to_send;
37243 +               nb_pkts -= frames_to_send;
37244 +       }
37245 +#else
37246 +#ifdef DPAA2_CGR_SUPPORT
37247 +       /*Check if the queue is congested*/
37248 +       if(qbman_result_is_CSCN(dpaa2_q->cscn))
37249 +               goto skip_tx;
37250 +#endif
37251 +
37252 +       fd.simple.frc = 0;
37253 +       DPAA2_RESET_FD_CTRL((&fd));
37254 +       DPAA2_SET_FD_FLC((&fd), NULL);
37255 +       loop = 0;
37256 +
37257 +       while (loop < nb_pkts) {
37258 +               /*Prepare each packet which is to be sent*/
37259 +               mp = bufs[loop]->pool;
37260 +               /* Not a hw_pkt pool allocated frame */
37261 +               if (mp && !(mp->flags & MEMPOOL_F_HW_PKT_POOL)) {
37262 +                       /* alloc should be from the default buffer pool
37263 +                       attached to this interface */
37264 +                       if (priv->bp_list) {
37265 +                               bpid = priv->bp_list->buf_pool.bpid;
37266 +                       } else {
37267 +                               /* Buffer not from offloaded area as well as
37268 +                               * lacks buffer pool identifier. Cannot
37269 +                               * continue.
37270 +                               */
37271 +                               PMD_DRV_LOG(ERR, "No Buffer pool "
37272 +                                               "attached.\n");
37273 +                               num_tx = 0;
37274 +                               goto skip_tx;
37275 +                       }
37276 +
37277 +                       if (eth_copy_mbuf_to_fd(bufs[loop], &fd, bpid)) {
37278 +                               loop++;
37279 +                               continue;
37280 +                       }
37281 +               } else {
37282 +                       RTE_ASSERT(mp);
37283 +                       bpid = mempool_to_bpid(mp);
37284 +                       eth_mbuf_to_fd(bufs[loop], &fd, bpid);
37285 +               }
37286 +               /*Enqueue a single packet to the QBMAN*/
37287 +               do {
37288 +                       ret = qbman_swp_enqueue(swp, &eqdesc, &fd);
37289 +                       if (ret != 0) {
37290 +                               PMD_DRV_LOG(DEBUG, "Error in transmiting the frame\n");
37291 +                       }
37292 +               } while (ret != 0);
37293 +
37294 +               /* Free the buffer shell */
37295 +               /* rte_pktmbuf_free(bufs[loop]); */
37296 +               num_tx++; loop++;
37297 +       }
37298 +       dpaa2_q->tx_pkts += num_tx;
37299 +       dpaa2_q->err_pkts += nb_pkts - num_tx;
37300 +#endif
37301 +skip_tx:
37302 +       return num_tx;
37303 +}
37304 +
37305 +static int
37306 +dpaa2_vlan_stripping_set(struct rte_eth_dev *dev, int on)
37307 +{
37308 +       int ret;
37309 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37310 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
37311 +
37312 +       PMD_INIT_FUNC_TRACE();
37313 +
37314 +       if (dpni == NULL) {
37315 +               PMD_DRV_LOG(ERR, "dpni is NULL");
37316 +               return -1;
37317 +       }
37318 +
37319 +       ret = dpni_set_vlan_removal(dpni, CMD_PRI_LOW, priv->token, on);
37320 +       if (ret < 0)
37321 +               PMD_DRV_LOG(ERR, "Unable to dpni_set_vlan_removal hwid =%d",
37322 +                           priv->hw_id);
37323 +       return ret;
37324 +}
37325 +
37326 +static int
37327 +dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
37328 +{
37329 +       int ret;
37330 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37331 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
37332 +
37333 +       if (dpni == NULL) {
37334 +               PMD_DRV_LOG(ERR, "dpni is NULL");
37335 +               return -1;
37336 +       }
37337 +
37338 +       if (on)
37339 +               ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, priv->token, vlan_id);
37340 +       else
37341 +               ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW, priv->token, vlan_id);
37342 +
37343 +       if (ret < 0)
37344 +               PMD_DRV_LOG(ERR, "ret = %d Unable to add/rem vlan %d  hwid =%d",
37345 +                           ret, vlan_id, priv->hw_id);
37346 +
37347 +       /*todo this should on global basis */
37348 +/*     ret = dpni_set_vlan_filters(dpni, CMD_PRI_LOW, priv->token, on);
37349 +       if (ret < 0)
37350 +               PMD_DRV_LOG(ERR, "Unable to set vlan filter");
37351 +*/     return ret;
37352 +}
37353 +
37354 +static void
37355 +dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
37356 +{
37357 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37358 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
37359 +       int ret;
37360 +
37361 +       if (mask & ETH_VLAN_FILTER_MASK) {
37362 +               if (dev->data->dev_conf.rxmode.hw_vlan_filter)
37363 +                       ret = dpni_set_vlan_filters(dpni, CMD_PRI_LOW, priv->token, TRUE);
37364 +               else
37365 +                       ret = dpni_set_vlan_filters(dpni, CMD_PRI_LOW, priv->token, FALSE);
37366 +               if (ret < 0)
37367 +                       PMD_DRV_LOG(ERR, "ret = %d Unable to set vlan filter", ret);
37368 +       }
37369 +
37370 +       if (mask & ETH_VLAN_STRIP_MASK) {
37371 +               /* Enable or disable VLAN stripping */
37372 +               if (dev->data->dev_conf.rxmode.hw_vlan_strip)
37373 +                       dpaa2_vlan_stripping_set(dev, TRUE);
37374 +               else
37375 +                       dpaa2_vlan_stripping_set(dev, FALSE);
37376 +       }
37377 +
37378 +       if (mask & ETH_VLAN_EXTEND_MASK) {
37379 +               PMD_INIT_FUNC_TRACE();
37380 +/*             if (dev->data->dev_conf.rxmode.hw_vlan_extend)
37381 +                       i40e_vsi_config_double_vlan(vsi, TRUE);
37382 +               else
37383 +                       i40e_vsi_config_double_vlan(vsi, FALSE);
37384 +*/     }
37385 +}
37386 +
37387 +static void
37388 +dpaa2_eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
37389 +{
37390 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37391 +
37392 +       dev_info->driver_name = drivername;
37393 +       dev_info->if_index = priv->hw_id;
37394 +       dev_info->max_mac_addrs = priv->max_unicast_filters;
37395 +       dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
37396 +       dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
37397 +       dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
37398 +       dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
37399 +       dev_info->pci_dev = dev->pci_dev;
37400 +/*     dev_info->rx_offload_capa =
37401 +               DEV_RX_OFFLOAD_IPV4_CKSUM |
37402 +               DEV_RX_OFFLOAD_UDP_CKSUM  |
37403 +               DEV_RX_OFFLOAD_TCP_CKSUM;
37404 +       dev_info->tx_offload_capa =
37405 +               DEV_TX_OFFLOAD_IPV4_CKSUM  |
37406 +               DEV_TX_OFFLOAD_UDP_CKSUM   |
37407 +               DEV_TX_OFFLOAD_TCP_CKSUM   |
37408 +               DEV_TX_OFFLOAD_SCTP_CKSUM;
37409 +*/
37410 +}
37411 +
37412 +static int
37413 +dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
37414 +{
37415 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37416 +       uint8_t tc_idx;
37417 +       uint16_t dist_idx;
37418 +       uint32_t vq_id;
37419 +       struct dpaa2_queue *mc_q, *mcq;
37420 +       uint32_t tot_queues;
37421 +       int i;
37422 +       struct dpaa2_queue *dpaa2_q;
37423 +
37424 +       tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
37425 +       mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
37426 +                         RTE_CACHE_LINE_SIZE);
37427 +       if (!mc_q) {
37428 +               PMD_DRV_LOG(ERR, "malloc failed for rx/tx queues\n");
37429 +               return -1;
37430 +       }
37431 +
37432 +       for (i = 0; i < priv->nb_rx_queues; i++) {
37433 +               mc_q->dev = dev;
37434 +               priv->rx_vq[i] = mc_q++;
37435 +               dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
37436 +               dpaa2_q->q_storage = rte_malloc("dq_storage",
37437 +                       sizeof(struct queue_storage_info_t),
37438 +                       RTE_CACHE_LINE_SIZE);
37439 +               if (!dpaa2_q->q_storage)
37440 +                       goto fail;
37441 +
37442 +               memset(dpaa2_q->q_storage, 0, sizeof(struct queue_storage_info_t));
37443 +       }
37444 +
37445 +       for (i = 0; i < priv->nb_tx_queues; i++) {
37446 +               mc_q->dev = dev;
37447 +               mc_q->flow_id = DPNI_NEW_FLOW_ID;
37448 +               priv->tx_vq[i] = mc_q++;
37449 +       }
37450 +
37451 +       vq_id = 0;
37452 +       for (tc_idx = 0; tc_idx < priv->num_tc; tc_idx++) {
37453 +               for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[tc_idx]; dist_idx++) {
37454 +                       mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
37455 +                       mcq->tc_index = tc_idx;
37456 +                       mcq->flow_id = dist_idx;
37457 +                       vq_id++;
37458 +               }
37459 +       }
37460 +
37461 +       return 0;
37462 +fail:
37463 +        i -= 1;
37464 +       while (i >= 0) {
37465 +               dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
37466 +               rte_free(dpaa2_q->q_storage);
37467 +       }
37468 +       return -1;
37469 +}
37470 +
37471 +static void dpaa2_distset_to_dpkg_profile_cfg(
37472 +               uint32_t req_dist_set,
37473 +               struct dpkg_profile_cfg *kg_cfg)
37474 +{
37475 +       uint32_t loop = 0, i = 0, dist_field = 0;
37476 +       int l2_configured = 0, l3_configured = 0;
37477 +       int l4_configured = 0, sctp_configured = 0;
37478 +
37479 +       memset(kg_cfg, 0, sizeof(struct dpkg_profile_cfg));
37480 +       while (req_dist_set) {
37481 +               if (req_dist_set % 2 != 0) {
37482 +                       dist_field = 1U << loop;
37483 +                       switch (dist_field) {
37484 +                       case ETH_RSS_L2_PAYLOAD:
37485 +
37486 +                               if (l2_configured)
37487 +                                       break;
37488 +                               l2_configured = 1;
37489 +
37490 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37491 +                                       NET_PROT_ETH;
37492 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37493 +                                       NH_FLD_ETH_TYPE;
37494 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37495 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37496 +                                       DPKG_FULL_FIELD;
37497 +                               i++;
37498 +                       break;
37499 +
37500 +                       case ETH_RSS_IPV4:
37501 +                       case ETH_RSS_FRAG_IPV4:
37502 +                       case ETH_RSS_NONFRAG_IPV4_OTHER:
37503 +                       case ETH_RSS_IPV6:
37504 +                       case ETH_RSS_FRAG_IPV6:
37505 +                       case ETH_RSS_NONFRAG_IPV6_OTHER:
37506 +                       case ETH_RSS_IPV6_EX:
37507 +
37508 +                               if (l3_configured)
37509 +                                       break;
37510 +                               l3_configured = 1;
37511 +
37512 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37513 +                                       NET_PROT_IP;
37514 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37515 +                                       NH_FLD_IP_SRC;
37516 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37517 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37518 +                                       DPKG_FULL_FIELD;
37519 +                               i++;
37520 +
37521 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37522 +                                       NET_PROT_IP;
37523 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37524 +                                       NH_FLD_IP_DST;
37525 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37526 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37527 +                                       DPKG_FULL_FIELD;
37528 +                               i++;
37529 +
37530 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37531 +                                       NET_PROT_IP;
37532 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37533 +                                       NH_FLD_IP_PROTO;
37534 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37535 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37536 +                                       DPKG_FULL_FIELD;
37537 +                               kg_cfg->num_extracts++;
37538 +                               i++;
37539 +                       break;
37540 +
37541 +                       case ETH_RSS_NONFRAG_IPV4_TCP:
37542 +                       case ETH_RSS_NONFRAG_IPV6_TCP:
37543 +                       case ETH_RSS_NONFRAG_IPV4_UDP:
37544 +                       case ETH_RSS_NONFRAG_IPV6_UDP:
37545 +
37546 +                               if (l4_configured)
37547 +                                       break;
37548 +                               l4_configured = 1;
37549 +
37550 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37551 +                                       NET_PROT_TCP;
37552 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37553 +                                       NH_FLD_TCP_PORT_SRC;
37554 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37555 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37556 +                                       DPKG_FULL_FIELD;
37557 +                               i++;
37558 +
37559 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37560 +                                       NET_PROT_TCP;
37561 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37562 +                                       NH_FLD_TCP_PORT_SRC;
37563 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37564 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37565 +                                       DPKG_FULL_FIELD;
37566 +                               i++;
37567 +                               break;
37568 +
37569 +                       case ETH_RSS_NONFRAG_IPV4_SCTP:
37570 +                       case ETH_RSS_NONFRAG_IPV6_SCTP:
37571 +
37572 +                               if (sctp_configured)
37573 +                                       break;
37574 +                               sctp_configured = 1;
37575 +
37576 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37577 +                                       NET_PROT_SCTP;
37578 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37579 +                                       NH_FLD_SCTP_PORT_SRC;
37580 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37581 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37582 +                                       DPKG_FULL_FIELD;
37583 +                               i++;
37584 +
37585 +                               kg_cfg->extracts[i].extract.from_hdr.prot =
37586 +                                       NET_PROT_SCTP;
37587 +                               kg_cfg->extracts[i].extract.from_hdr.field =
37588 +                                       NH_FLD_SCTP_PORT_DST;
37589 +                               kg_cfg->extracts[i].type = DPKG_EXTRACT_FROM_HDR;
37590 +                               kg_cfg->extracts[i].extract.from_hdr.type =
37591 +                                       DPKG_FULL_FIELD;
37592 +                               i++;
37593 +                               break;
37594 +
37595 +                       default:
37596 +                               PMD_DRV_LOG(WARNING, "Bad flow distribution option %x\n", dist_field);
37597 +                       }
37598 +               }
37599 +               req_dist_set = req_dist_set >> 1;
37600 +               loop++;
37601 +       }
37602 +       kg_cfg->num_extracts = i;
37603 +}
37604 +
37605 +static int dpaa2_setup_flow_distribution(struct rte_eth_dev *eth_dev,
37606 +                                        uint32_t req_dist_set)
37607 +{
37608 +       struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
37609 +       struct fsl_mc_io *dpni = priv->hw;
37610 +       struct dpni_rx_tc_dist_cfg tc_cfg;
37611 +       struct dpkg_profile_cfg kg_cfg;
37612 +       void *p_params;
37613 +       int ret, tc_index = 0;
37614 +
37615 +       p_params = rte_malloc(
37616 +               NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
37617 +       if (!p_params) {
37618 +               PMD_DRV_LOG(ERR, "Memory unavaialble\n");
37619 +               return -ENOMEM;
37620 +       }
37621 +       memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
37622 +       memset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));
37623 +
37624 +       dpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);
37625 +       tc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));
37626 +       tc_cfg.dist_size = eth_dev->data->nb_rx_queues;
37627 +       tc_cfg.dist_mode = DPNI_DIST_MODE_HASH;
37628 +
37629 +       ret = dpni_prepare_key_cfg(&kg_cfg, p_params);
37630 +       if (ret) {
37631 +               PMD_DRV_LOG(ERR, "Unable to prepare extract parameters\n");
37632 +               rte_free(p_params);
37633 +               return ret;
37634 +       }
37635 +
37636 +       ret = dpni_set_rx_tc_dist(dpni, CMD_PRI_LOW, priv->token, tc_index,
37637 +                                 &tc_cfg);
37638 +       rte_free(p_params);
37639 +       if (ret) {
37640 +               PMD_DRV_LOG(ERR, "Setting distribution for Rx failed with"
37641 +                       "err code: %d\n", ret);
37642 +               return ret;
37643 +       }
37644 +
37645 +       return 0;
37646 +}
37647 +
37648 +static int
37649 +dpaa2_remove_flow_distribution(struct rte_eth_dev *eth_dev, uint8_t tc_index)
37650 +{
37651 +       struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
37652 +       struct fsl_mc_io *dpni = priv->hw;
37653 +       struct dpni_rx_tc_dist_cfg tc_cfg;
37654 +       struct dpkg_profile_cfg kg_cfg;
37655 +       void *p_params;
37656 +       int ret;
37657 +
37658 +       p_params = rte_malloc(
37659 +               NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
37660 +       if (!p_params) {
37661 +               PMD_DRV_LOG(ERR, "Memory unavaialble\n");
37662 +               return -ENOMEM;
37663 +       }
37664 +       memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
37665 +       memset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));
37666 +
37667 +       tc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));
37668 +       tc_cfg.dist_size = 0;
37669 +       tc_cfg.dist_mode = DPNI_DIST_MODE_NONE;
37670 +
37671 +       ret = dpni_prepare_key_cfg(&kg_cfg, p_params);
37672 +       if (ret) {
37673 +               PMD_DRV_LOG(ERR, "Unable to prepare extract parameters\n");
37674 +               rte_free(p_params);
37675 +               return ret;
37676 +       }
37677 +
37678 +       ret = dpni_set_rx_tc_dist(dpni, CMD_PRI_LOW, priv->token, tc_index,
37679 +                                 &tc_cfg);
37680 +       rte_free(p_params);
37681 +       if (ret) {
37682 +               PMD_DRV_LOG(ERR, "Setting distribution for Rx failed with"
37683 +                       "err code: %d\n", ret);
37684 +               return ret;
37685 +       }
37686 +       return ret;
37687 +}
37688 +
37689 +static int
37690 +dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage)
37691 +{
37692 +       int i = 0;
37693 +
37694 +       for (i = 0; i < NUM_DQS_PER_QUEUE; i++) {
37695 +               q_storage->dq_storage[i] = rte_malloc(NULL,
37696 +               NUM_MAX_RECV_FRAMES * sizeof(struct qbman_result),
37697 +               RTE_CACHE_LINE_SIZE);
37698 +               if (!q_storage->dq_storage[i])
37699 +                       goto fail;
37700 +               /*setting toggle for initial condition*/
37701 +               q_storage->toggle = -1;
37702 +       }
37703 +       return 0;
37704 +fail:
37705 +       i -= 1;
37706 +       while (i >= 0)
37707 +               rte_free(q_storage->dq_storage[i]);
37708 +
37709 +       return -1;
37710 +}
37711 +
37712 +static int
37713 +dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
37714 +{
37715 +       struct rte_eth_dev_data *data = dev->data;
37716 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37717 +       struct rte_eth_conf *eth_conf = &data->dev_conf;
37718 +       struct dpaa2_queue *dpaa2_q;
37719 +       int i, ret;
37720 +
37721 +       for (i = 0; i < data->nb_rx_queues; i++) {
37722 +                data->rx_queues[i] = priv->rx_vq[i];
37723 +                dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
37724 +                if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
37725 +                        return -1;
37726 +       }
37727 +
37728 +       for (i = 0; i < data->nb_tx_queues; i++) {
37729 +                data->tx_queues[i] = priv->tx_vq[i];
37730 +                dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
37731 +                dpaa2_q->cscn = rte_malloc(NULL, sizeof(struct qbman_result), 16);
37732 +                if (!dpaa2_q->cscn)
37733 +                        goto fail_tx_queue;
37734 +       }
37735 +
37736 +       /* Check for correct configuration */
37737 +       if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
37738 +           data->nb_rx_queues > 1) {
37739 +               PMD_DRV_LOG(ERR, "Distribution is not enabled, "
37740 +                       "but Rx queues more than 1\n");
37741 +               return -1;
37742 +       }
37743 +
37744 +       if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
37745 +               /* Return in case number of Rx queues is 1 */
37746 +               if (data->nb_rx_queues == 1)
37747 +                       return 0;
37748 +               ret = dpaa2_setup_flow_distribution(dev,
37749 +                                                   eth_conf->rx_adv_conf.rss_conf.rss_hf);
37750 +               if (ret) {
37751 +                       PMD_DRV_LOG(ERR, "dpaa2_setup_flow_distribution failed\n");
37752 +                       return ret;
37753 +               }
37754 +       }
37755 +
37756 +       return 0;
37757 + fail_tx_queue:
37758 +       i -= 1;
37759 +       while (i >= 0) {
37760 +               dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
37761 +               rte_free(dpaa2_q->cscn);
37762 +       }
37763 +       return -1;
37764 +}
37765 +
37766 +static int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
37767 +                               void *blist)
37768 +{
37769 +       /* Function to attach a DPNI with a buffer pool list. Buffer pool list
37770 +        * handle is passed in blist.
37771 +        */
37772 +       int32_t retcode;
37773 +       struct fsl_mc_io *dpni = priv->hw;
37774 +       struct dpni_pools_cfg bpool_cfg;
37775 +       struct dpaa2_bp_list *bp_list = (struct dpaa2_bp_list *)blist;
37776 +       struct dpni_buffer_layout layout;
37777 +       int tot_size;
37778 +
37779 +       /* ... rx buffer layout .
37780 +       Check alignment for buffer layouts first*/
37781 +
37782 +       /* ... rx buffer layout ... */
37783 +       tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM;
37784 +       tot_size = RTE_ALIGN_CEIL(tot_size,
37785 +                                      DPAA2_PACKET_LAYOUT_ALIGN);
37786 +
37787 +       memset(&layout, 0, sizeof(struct dpni_buffer_layout));
37788 +       layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
37789 +
37790 +       layout.data_head_room = tot_size - DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION;
37791 +       retcode = dpni_set_rx_buffer_layout(dpni, CMD_PRI_LOW, priv->token,
37792 +                                           &layout);
37793 +       if (retcode) {
37794 +               PMD_DRV_LOG(ERR, "Err(%d) in setting rx buffer layout\n", retcode);
37795 +               return retcode;
37796 +       }
37797 +
37798 +       /*Attach buffer pool to the network interface as described by the user*/
37799 +       bpool_cfg.num_dpbp = 1;
37800 +       bpool_cfg.pools[0].dpbp_id = bp_list->buf_pool.dpbp_node->dpbp_id;
37801 +       bpool_cfg.pools[0].backup_pool = 0;
37802 +       bpool_cfg.pools[0].buffer_size =
37803 +               RTE_ALIGN_CEIL(bp_list->buf_pool.size,
37804 +                                   256 /*DPAA2_PACKET_LAYOUT_ALIGN*/);
37805 +
37806 +       retcode = dpni_set_pools(dpni, CMD_PRI_LOW, priv->token, &bpool_cfg);
37807 +       if (retcode != 0) {
37808 +               PMD_DRV_LOG(ERR, "Error in attaching the buffer pool list"
37809 +                               "bpid = %d Error code = %d\n",
37810 +                               bpool_cfg.pools[0].dpbp_id, retcode);
37811 +               return retcode;
37812 +       }
37813 +
37814 +       priv->bp_list = bp_list;
37815 +       return 0;
37816 +}
37817 +
37818 +/* Function to setup RX flow information. It contains traffic class ID,
37819 + * flow ID, destination configuration etc.
37820 + */
37821 +static int
37822 +dpaa2_rx_queue_setup(struct rte_eth_dev *dev,
37823 +                    uint16_t rx_queue_id,
37824 +                       uint16_t nb_rx_desc __rte_unused,
37825 +                       unsigned int socket_id __rte_unused,
37826 +                       const struct rte_eth_rxconf *rx_conf __rte_unused,
37827 +                       struct rte_mempool *mb_pool)
37828 +{
37829 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37830 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
37831 +       struct dpaa2_queue *dpaa2_q;
37832 +       struct dpni_queue_cfg cfg;
37833 +       uint8_t tc_id, flow_id;
37834 +       uint32_t bpid;
37835 +       int ret;
37836 +
37837 +       PMD_DRV_LOG(INFO, "dev =%p, queue =%d, pool = %p, conf =%p",
37838 +                   dev, rx_queue_id, mb_pool, rx_conf);
37839 +
37840 +       if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
37841 +               RTE_VERIFY(mb_pool->pool_data);
37842 +               bpid = mempool_to_bpid(mb_pool);
37843 +               ret = dpaa2_attach_bp_list(priv,
37844 +                                  bpid_info[bpid].bp_list);
37845 +               if (ret)
37846 +                       return ret;
37847 +       }
37848 +       dpaa2_q = (struct dpaa2_queue *)dev->data->rx_queues[rx_queue_id];
37849 +
37850 +       /*Get the tc id and flow id from given VQ id*/
37851 +       tc_id = rx_queue_id / MAX_DIST_PER_TC;
37852 +       flow_id = rx_queue_id % MAX_DIST_PER_TC;
37853 +       memset(&cfg, 0, sizeof(struct dpni_queue_cfg));
37854 +
37855 +       cfg.options = cfg.options | DPNI_QUEUE_OPT_USER_CTX;
37856 +
37857 +#ifdef DPAA2_STASHING
37858 +       cfg.options = cfg.options | DPNI_QUEUE_OPT_FLC;
37859 +#endif
37860 +
37861 +       cfg.user_ctx = (uint64_t)(dpaa2_q);
37862 +#ifdef DPAA2_STASHING
37863 +       cfg.flc_cfg.flc_type = DPNI_FLC_STASH;
37864 +       cfg.flc_cfg.frame_data_size = DPNI_STASH_SIZE_64B;
37865 +       /* Enabling Annotation stashing */
37866 +       cfg.options |= DPNI_FLC_STASH_FRAME_ANNOTATION;
37867 +       cfg.flc_cfg.options = DPNI_FLC_STASH_FRAME_ANNOTATION;
37868 +#endif
37869 +       ret = dpni_set_rx_flow(dpni, CMD_PRI_LOW, priv->token,
37870 +                              tc_id, flow_id, &cfg);
37871 +       if (ret) {
37872 +               PMD_DRV_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
37873 +               return -1;
37874 +       }
37875 +       return 0;
37876 +}
37877 +
37878 +static int
37879 +dpaa2_tx_queue_setup(struct rte_eth_dev *dev,
37880 +                    uint16_t tx_queue_id,
37881 +                       uint16_t nb_tx_desc __rte_unused,
37882 +                       unsigned int socket_id __rte_unused,
37883 +                       const struct rte_eth_txconf *tx_conf __rte_unused)
37884 +{
37885 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
37886 +       struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
37887 +               dev->data->tx_queues[tx_queue_id];
37888 +       struct fsl_mc_io *dpni = priv->hw;
37889 +       struct dpni_tx_flow_cfg cfg;
37890 +       struct dpni_tx_conf_cfg tx_conf_cfg;
37891 +#ifdef DPAA2_CGR_SUPPORT
37892 +       struct dpni_congestion_notification_cfg cong_notif_cfg;
37893 +#endif
37894 +       uint32_t tc_idx;
37895 +       int ret;
37896 +
37897 +       PMD_INIT_FUNC_TRACE();
37898 +
37899 +       /* Return if queue already configured */
37900 +       if (dpaa2_q->flow_id != DPNI_NEW_FLOW_ID)
37901 +               return 0;
37902 +
37903 +       memset(&cfg, 0, sizeof(struct dpni_tx_flow_cfg));
37904 +       cfg.l3_chksum_gen = 1;
37905 +       cfg.options |= DPNI_TX_FLOW_OPT_L3_CHKSUM_GEN;
37906 +       cfg.l4_chksum_gen = 1;
37907 +       cfg.options = DPNI_TX_FLOW_OPT_L4_CHKSUM_GEN;
37908 +       memset(&tx_conf_cfg, 0, sizeof(struct dpni_tx_conf_cfg));
37909 +       tx_conf_cfg.errors_only = TRUE;
37910 +
37911 +       /*
37912 +       if (action & DPAA2BUF_TX_CONF_REQUIRED) {
37913 +               cfg.options = DPNI_TX_FLOW_OPT_TX_CONF_ERROR;
37914 +               cfg.use_common_tx_conf_queue =
37915 +                               ((action & DPAA2BUF_TX_CONF_ERR_ON_COMMON_Q) ?
37916 +                                                               TRUE : FALSE);
37917 +               tx_conf_cfg.errors_only = FALSE;
37918 +       }*/
37919 +
37920 +       if (priv->num_tc == 1)
37921 +               tc_idx = 0;
37922 +       else
37923 +               tc_idx = tx_queue_id;
37924 +
37925 +       ret = dpni_set_tx_flow(dpni, CMD_PRI_LOW, priv->token,
37926 +                              &(dpaa2_q->flow_id), &cfg);
37927 +       if (ret) {
37928 +               PMD_DRV_LOG(ERR, "Error in setting the tx flow:"
37929 +                                       "ErrorCode = %x\n", ret);
37930 +                       return -1;
37931 +       }
37932 +       /*Set tx-conf and error configuration*/
37933 +       ret = dpni_set_tx_conf(dpni, CMD_PRI_LOW, priv->token,
37934 +                              dpaa2_q->flow_id, &tx_conf_cfg);
37935 +       if (ret) {
37936 +               PMD_DRV_LOG(ERR, "Error in setting tx conf settings: "
37937 +                                       "ErrorCode = %x", ret);
37938 +               return -1;
37939 +       }
37940 +
37941 +       if (tx_queue_id == 0) {
37942 +               /*Set tx-conf and error configuration*/
37943 +               ret = dpni_set_tx_conf(dpni, CMD_PRI_LOW, priv->token,
37944 +                                      DPNI_COMMON_TX_CONF, &tx_conf_cfg);
37945 +               if (ret) {
37946 +                       PMD_DRV_LOG(ERR, "Error in setting tx conf settings: "
37947 +                                               "ErrorCode = %x", ret);
37948 +                       return -1;
37949 +               }
37950 +       }
37951 +       dpaa2_q->tc_index = tc_idx;
37952 +
37953 +#ifdef DPAA2_CGR_SUPPORT
37954 +       cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
37955 +       /*Notify about congestion when the queue size is 128 frames with each \
37956 +         frame 64 bytes size*/
37957 +       cong_notif_cfg.threshold_entry = CONG_ENTER_THRESHOLD;
37958 +       /*Notify that the queue is not congested when the number of frames in \
37959 +         the queue is below this thershold.
37960 +         TODO: Check if this value is the optimum value for better performance*/
37961 +       cong_notif_cfg.threshold_exit = CONG_EXIT_THRESHOLD;
37962 +       cong_notif_cfg.message_ctx = 0;
37963 +       cong_notif_cfg.message_iova = (uint64_t)dpaa2_q->cscn;
37964 +       cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
37965 +       cong_notif_cfg.options = DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
37966 +               DPNI_CONG_OPT_WRITE_MEM_ON_EXIT | DPNI_CONG_OPT_COHERENT_WRITE;
37967 +
37968 +       ret = dpni_set_tx_tc_congestion_notification(dpni, CMD_PRI_LOW,
37969 +                                                    priv->token,
37970 +                                                    tc_idx, &cong_notif_cfg);
37971 +       if (ret) {
37972 +               PMD_DRV_LOG(ERR, "Error in setting tx congestion notification "
37973 +                           "settings: ErrorCode = %x", ret);
37974 +               return -1;
37975 +       }
37976 +#endif
37977 +       return 0;
37978 +}
37979 +
37980 +void
37981 +dpaa2_rx_queue_release(void *q)
37982 +{
37983 +       printf("\n(%s) called for 1=%p\n", __func__, q);
37984 +       return;
37985 +}
37986 +
37987 +void
37988 +dpaa2_tx_queue_release(void *q)
37989 +{
37990 +       printf("\n(%s) called for 1=%p\n", __func__, q);
37991 +       return;
37992 +}
37993 +
37994 +static const uint32_t *
37995 +dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
37996 +{
37997 +       static const uint32_t ptypes[] = {
37998 +               /*todo -= add more types */
37999 +               RTE_PTYPE_L2_ETHER,
38000 +               RTE_PTYPE_L3_IPV4,
38001 +               RTE_PTYPE_L3_IPV4_EXT,
38002 +               RTE_PTYPE_L3_IPV6,
38003 +               RTE_PTYPE_L3_IPV6_EXT,
38004 +               RTE_PTYPE_L4_TCP,
38005 +               RTE_PTYPE_L4_UDP,
38006 +               RTE_PTYPE_L4_SCTP,
38007 +               RTE_PTYPE_L4_ICMP,
38008 +               RTE_PTYPE_UNKNOWN
38009 +       };
38010 +
38011 +       if (dev->rx_pkt_burst == eth_dpaa2_prefetch_rx ||
38012 +           dev->rx_pkt_burst == eth_dpaa2_rx)
38013 +               return ptypes;
38014 +       return NULL;
38015 +}
38016 +
38017 +static int
38018 +dpaa2_dev_start(struct rte_eth_dev *dev)
38019 +{
38020 +       struct rte_eth_dev_data *data = dev->data;
38021 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38022 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38023 +       struct dpni_queue_attr cfg;
38024 +       uint16_t qdid;
38025 +       struct dpaa2_queue *dpaa2_q;
38026 +       int ret, i, mask = 0;
38027 +
38028 +       PMD_INIT_FUNC_TRACE();
38029 +
38030 +       dev->data->dev_link.link_status = 1;
38031 +
38032 +       ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
38033 +       if (ret) {
38034 +               PMD_DRV_LOG(ERR, "Failure %d in enabling dpni %d device\n",
38035 +                           ret, priv->hw_id);
38036 +               return ret;
38037 +       }
38038 +
38039 +       ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token, &qdid);
38040 +       if (ret) {
38041 +               PMD_DRV_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
38042 +               return ret;
38043 +       }
38044 +       priv->qdid = qdid;
38045 +
38046 +       for (i = 0; i < data->nb_rx_queues; i++) {
38047 +               dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
38048 +               ret = dpni_get_rx_flow(dpni, CMD_PRI_LOW, priv->token,
38049 +                                      dpaa2_q->tc_index, dpaa2_q->flow_id, &cfg);
38050 +               if (ret) {
38051 +                       PMD_DRV_LOG(ERR, "Error to get flow "
38052 +                               "information Error code = %d\n", ret);
38053 +                       return ret;
38054 +               }
38055 +               dpaa2_q->fqid = cfg.fqid;
38056 +       }
38057 +       /*
38058 +        * VLAN Offload Settings
38059 +        */
38060 +       if (priv->options & DPNI_OPT_VLAN_FILTER)
38061 +               mask = ETH_VLAN_FILTER_MASK;
38062 +
38063 +       if (priv->options & DPNI_OPT_VLAN_MANIPULATION)
38064 +               mask = ETH_VLAN_STRIP_MASK;
38065 +
38066 +       if (mask)
38067 +               dpaa2_vlan_offload_set(dev, mask);
38068 +
38069 +       return 0;
38070 +}
38071 +
38072 +/*********************************************************************
38073 + *
38074 + *  This routine disables all traffic on the adapter by issuing a
38075 + *  global reset on the MAC.
38076 + *
38077 + **********************************************************************/
38078 +static void
38079 +dpaa2_dev_stop(struct rte_eth_dev *dev)
38080 +{
38081 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38082 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38083 +       int ret;
38084 +       struct rte_eth_link link;
38085 +
38086 +       dev->data->dev_link.link_status = 0;
38087 +
38088 +       ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
38089 +       if (ret) {
38090 +               PMD_DRV_LOG(ERR, "Failure in disabling dpni %d device\n", priv->hw_id);
38091 +               return;
38092 +       }
38093 +
38094 +       /* clear the recorded link status */
38095 +       memset(&link, 0, sizeof(link));
38096 +       rte_dpni_dev_atomic_write_link_status(dev, &link);
38097 +}
38098 +
38099 +static void
38100 +dpaa2_dev_close(struct rte_eth_dev *dev)
38101 +{
38102 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38103 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38104 +       int ret;
38105 +       struct rte_eth_link link;
38106 +
38107 +       /*Function is reverse of dpaa2_dev_init.
38108 +        * It does the following:
38109 +        * 1. Detach a DPNI from attached resources i.e. buffer pools, dpbp_id.
38110 +        * 2. Close the DPNI device
38111 +        * 3. Free the allocated reqources.
38112 +        */
38113 +
38114 +       /* Clean the device first */
38115 +       ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
38116 +       if (ret) {
38117 +               PMD_DRV_LOG(ERR, "Failure cleaning dpni device with"
38118 +                       "error code %d\n", ret);
38119 +               return;
38120 +       }
38121 +
38122 +       /*Close the device at underlying layer*/
38123 +       ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
38124 +       if (ret) {
38125 +               PMD_DRV_LOG(ERR, "Failure closing dpni device with"
38126 +                       "error code %d\n", ret);
38127 +               return;
38128 +       }
38129 +
38130 +       /*Free the allocated memory for ethernet private data and dpni*/
38131 +       priv->hw = NULL;
38132 +       free(dpni);
38133 +
38134 +       memset(&link, 0, sizeof(link));
38135 +       rte_dpni_dev_atomic_write_link_status(dev, &link);
38136 +}
38137 +
38138 +static void
38139 +dpaa2_dev_promiscuous_enable(
38140 +               struct rte_eth_dev *dev)
38141 +{
38142 +       int ret;
38143 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38144 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38145 +
38146 +       if (dpni == NULL) {
38147 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38148 +               return;
38149 +       }
38150 +
38151 +       ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, TRUE);
38152 +       if (ret < 0)
38153 +               PMD_DRV_LOG(ERR, "Unable to enable promiscuous mode");
38154 +       return;
38155 +}
38156 +
38157 +static void
38158 +dpaa2_dev_promiscuous_disable(
38159 +               struct rte_eth_dev *dev)
38160 +{
38161 +       int ret;
38162 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38163 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38164 +
38165 +       if (dpni == NULL) {
38166 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38167 +               return;
38168 +       }
38169 +
38170 +       ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, FALSE);
38171 +       if (ret < 0)
38172 +               PMD_DRV_LOG(ERR, "Unable to disable promiscuous mode");
38173 +       return;
38174 +}
38175 +
38176 +static void
38177 +dpaa2_dev_allmulticast_enable(
38178 +               struct rte_eth_dev *dev)
38179 +{
38180 +       int ret;
38181 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38182 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38183 +
38184 +       if (dpni == NULL) {
38185 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38186 +               return;
38187 +       }
38188 +
38189 +       ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
38190 +       if (ret < 0)
38191 +               PMD_DRV_LOG(ERR, "Unable to enable promiscuous mode");
38192 +       return;
38193 +}
38194 +
38195 +static void
38196 +dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
38197 +{
38198 +       int ret;
38199 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38200 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38201 +
38202 +       if (dpni == NULL) {
38203 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38204 +               return;
38205 +       }
38206 +
38207 +       ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
38208 +       if (ret < 0)
38209 +               PMD_DRV_LOG(ERR, "Unable to enable promiscuous mode");
38210 +       return;
38211 +}
38212 +
38213 +static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
38214 +{
38215 +       int ret;
38216 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38217 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38218 +       uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
38219 +
38220 +       if (dpni == NULL) {
38221 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38222 +               return -EINVAL;
38223 +       }
38224 +
38225 +       /* check that mtu is within the allowed range */
38226 +       if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
38227 +               return -EINVAL;
38228 +
38229 +       /* Set the Max Rx frame length as 'mtu' +
38230 +        * Maximum Ethernet header length */
38231 +       ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
38232 +                                       mtu + ETH_VLAN_HLEN);
38233 +       if (ret) {
38234 +               PMD_DRV_LOG(ERR, "setting the max frame length failed");
38235 +               return -1;
38236 +       }
38237 +       if (priv->options & DPNI_OPT_IPF) {
38238 +               ret = dpni_set_mtu(dpni, CMD_PRI_LOW, priv->token, mtu);
38239 +               if (ret) {
38240 +                       PMD_DRV_LOG(ERR, "Setting the MTU failed");
38241 +                       return -1;
38242 +               }
38243 +       }
38244 +
38245 +       PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
38246 +       return 0;
38247 +}
38248 +
38249 +static int
38250 +dpaa2_flow_ctrl_set(struct rte_eth_dev *dev  __rte_unused,
38251 +                       struct rte_eth_fc_conf *fc_conf  __rte_unused)
38252 +{
38253 +       return 0;
38254 +}
38255 +static void
38256 +dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
38257 +                      struct ether_addr *addr,
38258 +                __rte_unused uint32_t index,
38259 +                __rte_unused uint32_t pool)
38260 +{
38261 +       int ret;
38262 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38263 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38264 +
38265 +       if (dpni == NULL) {
38266 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38267 +               return;
38268 +       }
38269 +
38270 +       ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
38271 +                               priv->token, addr->addr_bytes);
38272 +       if (ret) {
38273 +               PMD_DRV_LOG(ERR, "Adding the MAC ADDR failed");
38274 +       }
38275 +
38276 +       return;
38277 +}
38278 +
38279 +static void
38280 +dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
38281 +                         uint32_t index)
38282 +{
38283 +       int ret;
38284 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38285 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38286 +       struct rte_eth_dev_data *data = dev->data;
38287 +       struct ether_addr *macaddr;
38288 +
38289 +       macaddr = &data->mac_addrs[index];
38290 +
38291 +       if (dpni == NULL) {
38292 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38293 +               return;
38294 +       }
38295 +
38296 +       ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
38297 +                                  priv->token, macaddr->addr_bytes);
38298 +       if (ret) {
38299 +               PMD_DRV_LOG(ERR, "Removing the MAC ADDR failed");
38300 +       }
38301 +
38302 +       return;
38303 +}
38304 +
38305 +static void
38306 +dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
38307 +                      struct ether_addr *addr)
38308 +{
38309 +       int ret;
38310 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38311 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38312 +
38313 +       if (dpni == NULL) {
38314 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38315 +               return;
38316 +       }
38317 +
38318 +       ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
38319 +                                       priv->token, addr->addr_bytes);
38320 +
38321 +       if (ret) {
38322 +               PMD_DRV_LOG(ERR, "Setting the MAC ADDR failed");
38323 +       }
38324 +
38325 +       return;
38326 +}
38327 +
38328 +int dpaa2_dev_get_mac_addr(struct rte_eth_dev *dev,
38329 +                          struct ether_addr *addr)
38330 +{
38331 +       int ret;
38332 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38333 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38334 +
38335 +       if (dpni == NULL) {
38336 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38337 +               return -EINVAL;
38338 +       }
38339 +
38340 +       ret = dpni_get_primary_mac_addr(dpni, CMD_PRI_LOW,
38341 +                                       priv->token, addr->addr_bytes);
38342 +
38343 +       if (ret) {
38344 +               PMD_DRV_LOG(ERR, "Getting the MAC ADDR failed");
38345 +       }
38346 +
38347 +       return ret;
38348 +}
38349 +
38350 +/*int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
38351 +                          uint32_t cmd_flags,
38352 +                          uint16_t token,
38353 +                          int unicast,
38354 +                          int multicast)
38355 +
38356 +int dpni_set_vlan_insertion(struct fsl_mc_io *mc_io,
38357 +                           uint32_t cmd_flags,
38358 +                           uint16_t token,
38359 +                           int en)
38360 +
38361 +dpni_set_errors_behavior
38362 +
38363 +int dpni_get_l3_chksum_validation(struct fsl_mc_io *mc_io,
38364 +                                 uint32_t cmd_flags,
38365 +                                 uint16_t token,
38366 +                                 int *en)
38367 +
38368 +int dpni_set_l3_chksum_validation(struct fsl_mc_io *mc_io,
38369 +                                 uint32_t cmd_flags,
38370 +                                 uint16_t token,
38371 +                                 int en)
38372 +
38373 +int dpni_get_l4_chksum_validation(struct fsl_mc_io *mc_io,
38374 +                                 uint32_t cmd_flags,
38375 +                                 uint16_t token,
38376 +                                 int *en)
38377 +
38378 +int dpni_set_l4_chksum_validation(struct fsl_mc_io *mc_io,
38379 +                                 uint32_t cmd_flags,
38380 +                                 uint16_t token,
38381 +                                 int en)
38382 +
38383 +*/
38384 +
38385 +static int dpaa2_timestamp_enable(struct rte_eth_dev *dev)
38386 +{
38387 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38388 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38389 +
38390 +       struct dpni_buffer_layout layout;
38391 +       int ret;
38392 +
38393 +       layout.options = DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
38394 +       layout.pass_timestamp = TRUE;
38395 +
38396 +       ret = dpni_set_rx_buffer_layout(dpni, CMD_PRI_LOW, priv->token, &layout);
38397 +       if (ret) {
38398 +               PMD_DRV_LOG(ERR, "Enabling timestamp for Rx failed with"
38399 +                       "err code: %d", ret);
38400 +               return ret;
38401 +       }
38402 +
38403 +       ret = dpni_set_tx_buffer_layout(dpni, CMD_PRI_LOW, priv->token, &layout);
38404 +       if (ret) {
38405 +               PMD_DRV_LOG(ERR, "Enabling timestamp failed for Tx with"
38406 +                       "err code: %d", ret);
38407 +               return ret;
38408 +       }
38409 +
38410 +       ret = dpni_set_tx_conf_buffer_layout(dpni, CMD_PRI_LOW,
38411 +                                            priv->token, &layout);
38412 +       if (ret) {
38413 +               PMD_DRV_LOG(ERR, "Enabling timestamp failed for Tx-conf with"
38414 +                       "err code: %d", ret);
38415 +               return ret;
38416 +       }
38417 +
38418 +       return 0;
38419 +}
38420 +
38421 +static int dpaa2_timestamp_disable(struct rte_eth_dev *dev)
38422 +{
38423 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38424 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38425 +       struct dpni_buffer_layout layout;
38426 +       int ret;
38427 +
38428 +       layout.options = DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
38429 +       layout.pass_timestamp = FALSE;
38430 +
38431 +       ret = dpni_set_rx_buffer_layout(dpni, CMD_PRI_LOW, priv->token, &layout);
38432 +       if (ret) {
38433 +               PMD_DRV_LOG(ERR, "Disabling timestamp failed for Rx with"
38434 +                       "err code: %d", ret);
38435 +               return ret;
38436 +       }
38437 +
38438 +       ret = dpni_set_tx_buffer_layout(dpni, CMD_PRI_LOW, priv->token, &layout);
38439 +       if (ret) {
38440 +               PMD_DRV_LOG(ERR, "Disabling timestamp failed for Tx with"
38441 +                       "err code: %d", ret);
38442 +               return ret;
38443 +       }
38444 +
38445 +       ret = dpni_set_tx_conf_buffer_layout(dpni, CMD_PRI_LOW,
38446 +                                            priv->token, &layout);
38447 +       if (ret) {
38448 +               PMD_DRV_LOG(ERR, "Disabling timestamp failed for Tx-conf with"
38449 +                       "err code: %d", ret);
38450 +               return ret;
38451 +       }
38452 +
38453 +       return ret;
38454 +}
38455 +
38456 +/* return 0 means link status changed, -1 means not changed */
38457 +static int
38458 +dpaa2_dev_get_link_info(struct rte_eth_dev *dev,
38459 +                       int wait_to_complete __rte_unused)
38460 +{
38461 +       int ret;
38462 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38463 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38464 +       struct rte_eth_link link, old;
38465 +       struct dpni_link_state state = {0};
38466 +
38467 +       if (dpni == NULL) {
38468 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38469 +               return 0;
38470 +       }
38471 +       memset(&old, 0, sizeof(old));
38472 +       rte_dpni_dev_atomic_read_link_status(dev, &old);
38473 +
38474 +       ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
38475 +       if (ret < 0) {
38476 +               PMD_DRV_LOG(ERR, "dpni_get_link_state");
38477 +               return 0;
38478 +       }
38479 +
38480 +       if (state.up == 0) {
38481 +               rte_dpni_dev_atomic_write_link_status(dev, &link);
38482 +               if (state.up == old.link_status)
38483 +                       return -1;
38484 +               return 0;
38485 +       }
38486 +       link.link_status = state.up;
38487 +       link.link_speed = state.rate;
38488 +
38489 +       if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
38490 +               link.link_duplex = ETH_LINK_HALF_DUPLEX;
38491 +       else
38492 +               link.link_duplex = ETH_LINK_FULL_DUPLEX;
38493 +
38494 +       rte_dpni_dev_atomic_write_link_status(dev, &link);
38495 +
38496 +       if (link.link_status == old.link_status)
38497 +               return -1;
38498 +
38499 +       return 0;
38500 +}
38501 +
38502 +static
38503 +void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
38504 +                        struct rte_eth_stats *stats)
38505 +{
38506 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38507 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38508 +
38509 +       int32_t  retcode;
38510 +       uint64_t value;
38511 +
38512 +       if (dpni == NULL) {
38513 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38514 +               return;
38515 +       }
38516 +
38517 +       if (!stats) {
38518 +               PMD_DRV_LOG(ERR, "stats is NULL");
38519 +               return;
38520 +       }
38521 +
38522 +       retcode = dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38523 +                                  DPNI_CNT_ING_FRAME, &value);
38524 +       if (retcode)
38525 +               goto error;
38526 +       stats->ipackets = value;
38527 +       retcode =  dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38528 +                                   DPNI_CNT_ING_BYTE, &value);
38529 +       if (retcode)
38530 +               goto error;
38531 +       stats->ibytes = value;
38532 +       retcode =  dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38533 +                                   DPNI_CNT_ING_FRAME_DROP, &value);
38534 +       if (retcode)
38535 +               goto error;
38536 +       stats->ierrors = value;
38537 +       retcode =  dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38538 +                                   DPNI_CNT_ING_FRAME_DISCARD, &value);
38539 +       if (retcode)
38540 +               goto error;
38541 +       stats->ierrors = stats->ierrors + value;
38542 +       retcode =  dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38543 +                                   DPNI_CNT_EGR_FRAME, &value);
38544 +       if (retcode)
38545 +               goto error;
38546 +       stats->opackets = value;
38547 +       dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38548 +                        DPNI_CNT_EGR_BYTE, &value);
38549 +       if (retcode)
38550 +               goto error;
38551 +       stats->obytes = value;
38552 +       retcode =  dpni_get_counter(dpni, CMD_PRI_LOW, priv->token,
38553 +                                   DPNI_CNT_EGR_FRAME_DISCARD, &value);
38554 +       if (retcode)
38555 +               goto error;
38556 +       stats->oerrors = value;
38557 +
38558 +       return;
38559 +
38560 +error:
38561 +       PMD_DRV_LOG(ERR, "Operation not completed:Error Code = %d\n", retcode);
38562 +       return;
38563 +};
38564 +
38565 +static
38566 +void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
38567 +{
38568 +       struct dpaa2_dev_priv *priv = dev->data->dev_private;
38569 +       struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
38570 +
38571 +       int32_t  retcode;
38572 +
38573 +       if (dpni == NULL) {
38574 +               PMD_DRV_LOG(ERR, "dpni is NULL");
38575 +               return;
38576 +       }
38577 +
38578 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38579 +                                   DPNI_CNT_ING_FRAME, 0);
38580 +       if (retcode)
38581 +               goto error;
38582 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38583 +                                   DPNI_CNT_ING_BYTE, 0);
38584 +       if (retcode)
38585 +               goto error;
38586 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38587 +                                   DPNI_CNT_ING_BCAST_FRAME, 0);
38588 +       if (retcode)
38589 +               goto error;
38590 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38591 +                                   DPNI_CNT_ING_BCAST_BYTES, 0);
38592 +       if (retcode)
38593 +               goto error;
38594 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38595 +                                   DPNI_CNT_ING_MCAST_FRAME, 0);
38596 +       if (retcode)
38597 +               goto error;
38598 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38599 +                                   DPNI_CNT_ING_MCAST_BYTE, 0);
38600 +       if (retcode)
38601 +               goto error;
38602 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38603 +                                   DPNI_CNT_ING_FRAME_DROP, 0);
38604 +       if (retcode)
38605 +               goto error;
38606 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38607 +                                   DPNI_CNT_ING_FRAME_DISCARD, 0);
38608 +       if (retcode)
38609 +               goto error;
38610 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38611 +                                   DPNI_CNT_EGR_FRAME, 0);
38612 +       if (retcode)
38613 +               goto error;
38614 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38615 +                                   DPNI_CNT_EGR_BYTE, 0);
38616 +       if (retcode)
38617 +               goto error;
38618 +       retcode =  dpni_set_counter(dpni, CMD_PRI_LOW, priv->token,
38619 +                                   DPNI_CNT_EGR_FRAME_DISCARD, 0);
38620 +       if (retcode)
38621 +               goto error;
38622 +
38623 +       return;
38624 +
38625 +error:
38626 +       PMD_DRV_LOG(ERR, "Operation not completed:Error Code = %d\n", retcode);
38627 +       return;
38628 +};
38629 +
38630 +static struct eth_dev_ops ops = {
38631 +       .dev_configure        = dpaa2_eth_dev_configure,
38632 +       .dev_start            = dpaa2_dev_start,
38633 +       .dev_stop             = dpaa2_dev_stop,
38634 +       .dev_close            = dpaa2_dev_close,
38635 +       .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
38636 +       .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
38637 +       .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
38638 +       .allmulticast_disable = dpaa2_dev_allmulticast_disable,
38639 +       .dev_set_link_up      = NULL,
38640 +       .dev_set_link_down    = NULL,
38641 +       .link_update          = dpaa2_dev_get_link_info,
38642 +       .stats_get            = dpaa2_dev_stats_get,
38643 +       .stats_reset          = dpaa2_dev_stats_reset,
38644 +       .dev_infos_get        = dpaa2_eth_dev_info,
38645 +       .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
38646 +       .mtu_set              = dpaa2_dev_mtu_set,
38647 +       .vlan_filter_set      = dpaa2_vlan_filter_set,
38648 +       .vlan_tpid_set        = NULL,
38649 +       .vlan_offload_set     = dpaa2_vlan_offload_set,
38650 +       .vlan_strip_queue_set = NULL,
38651 +       .vlan_pvid_set        = NULL,
38652 +       .rx_queue_setup       = dpaa2_rx_queue_setup,
38653 +       .rx_queue_release      = dpaa2_rx_queue_release,
38654 +       .tx_queue_setup       = dpaa2_tx_queue_setup,
38655 +       .tx_queue_release      = dpaa2_tx_queue_release,
38656 +       .dev_led_on           = NULL,
38657 +       .dev_led_off          = NULL,
38658 +       .set_queue_rate_limit = NULL,
38659 +       .flow_ctrl_get        = NULL,
38660 +       .flow_ctrl_set        = dpaa2_flow_ctrl_set,
38661 +       .priority_flow_ctrl_set = NULL,
38662 +       .mac_addr_add         = dpaa2_dev_add_mac_addr,
38663 +       .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
38664 +       .rxq_info_get         = NULL,
38665 +       .txq_info_get         = NULL,
38666 +       .timesync_enable      = dpaa2_timestamp_enable,
38667 +       .timesync_disable     = dpaa2_timestamp_disable,
38668 +       .mac_addr_set         = dpaa2_dev_set_mac_addr,
38669 +};
38670 +
38671 +static int
38672 +dpaa2_dev_init(struct rte_eth_dev *eth_dev)
38673 +{
38674 +       struct rte_eth_dev_data *data = eth_dev->data;
38675 +       struct fsl_mc_io *dpni_dev;
38676 +       struct dpni_attr attr;
38677 +       struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
38678 +       struct dpni_buffer_layout layout;
38679 +       int i, ret, hw_id = eth_dev->pci_dev->addr.devid;
38680 +       struct dpni_extended_cfg *ext_cfg = NULL;
38681 +       int tot_size;
38682 +
38683 +       PMD_INIT_FUNC_TRACE();
38684 +
38685 +       dpni_dev = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
38686 +       if (!dpni_dev) {
38687 +               PMD_DRV_LOG(ERR, "malloc failed for dpni device\n");
38688 +               return -1;
38689 +       }
38690 +
38691 +       dpni_dev->regs = mcp_ptr_list[0];
38692 +       ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
38693 +       if (ret) {
38694 +               PMD_DRV_LOG(ERR, "Failure in opening dpni@%d device with"
38695 +                       "error code %d\n", hw_id, ret);
38696 +               return -1;
38697 +       }
38698 +
38699 +       /* Clean the device first */
38700 +       ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
38701 +       if (ret) {
38702 +               PMD_DRV_LOG(ERR, "Failure cleaning dpni@%d device with"
38703 +                       "error code %d\n", hw_id, ret);
38704 +               return -1;
38705 +       }
38706 +
38707 +       ext_cfg = (struct dpni_extended_cfg *)rte_malloc(NULL, 256,
38708 +                                                       RTE_CACHE_LINE_SIZE);
38709 +       if (!ext_cfg) {
38710 +               PMD_DRV_LOG(ERR, "No data memory\n");
38711 +               return -1;
38712 +       }
38713 +       attr.ext_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(ext_cfg));
38714 +
38715 +       ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
38716 +       if (ret) {
38717 +               PMD_DRV_LOG(ERR, "Failure in getting dpni@%d attribute, "
38718 +                       "error code %d\n", hw_id, ret);
38719 +               return -1;
38720 +       }
38721 +
38722 +       priv->num_tc = attr.max_tcs;
38723 +       for (i = 0; i < attr.max_tcs; i++) {
38724 +               priv->num_dist_per_tc[i] = ext_cfg->tc_cfg[i].max_dist;
38725 +               priv->nb_rx_queues += priv->num_dist_per_tc[i];
38726 +               break;
38727 +       }
38728 +       if (attr.max_tcs == 1)
38729 +               priv->nb_tx_queues = attr.max_senders;
38730 +       else
38731 +               priv->nb_tx_queues = attr.max_tcs;
38732 +       PMD_DRV_LOG(INFO, "num_tc %d", priv->num_tc);
38733 +       PMD_DRV_LOG(INFO, "nb_rx_queues %d", priv->nb_rx_queues);
38734 +
38735 +       eth_dev->data->nb_rx_queues = priv->nb_rx_queues;
38736 +       eth_dev->data->nb_tx_queues = priv->nb_tx_queues;
38737 +
38738 +       priv->hw = dpni_dev;
38739 +       priv->hw_id = hw_id;
38740 +       priv->options = attr.options;
38741 +
38742 +       priv->max_unicast_filters = attr.max_unicast_filters;
38743 +       priv->max_multicast_filters = attr.max_multicast_filters;
38744 +
38745 +       if (attr.options & DPNI_OPT_VLAN_FILTER)
38746 +               priv->max_vlan_filters = attr.max_vlan_filters;
38747 +       else
38748 +               priv->max_vlan_filters = 0;
38749 +
38750 +       ret = dpaa2_alloc_rx_tx_queues(eth_dev);
38751 +       if (ret) {
38752 +               PMD_DRV_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
38753 +               return -1;
38754 +       }
38755 +
38756 +       data->mac_addrs = (struct ether_addr *)malloc(sizeof(struct ether_addr));
38757 +
38758 +       /* Allocate memory for storing MAC addresses */
38759 +       eth_dev->data->mac_addrs = rte_zmalloc("dpni",
38760 +               ETHER_ADDR_LEN * attr.max_unicast_filters, 0);
38761 +       if (eth_dev->data->mac_addrs == NULL) {
38762 +               PMD_DRV_LOG(ERR, "Failed to allocate %d bytes needed to "
38763 +                                               "store MAC addresses",
38764 +                               ETHER_ADDR_LEN * attr.max_unicast_filters);
38765 +               return -ENOMEM;
38766 +       }
38767 +
38768 +       ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
38769 +                                       priv->token,
38770 +                               (uint8_t *)(data->mac_addrs[0].addr_bytes));
38771 +       if (ret) {
38772 +               PMD_DRV_LOG(ERR, "DPNI get mac address failed:"
38773 +                                       " Error Code = %d\n", ret);
38774 +               return -1;
38775 +       }
38776 +
38777 +       PMD_DRV_LOG(INFO, "Adding Broadcast Address...");
38778 +       memset(data->mac_addrs[1].addr_bytes, 0xff, ETH_ADDR_LEN);
38779 +       ret = dpni_add_mac_addr(dpni_dev, CMD_PRI_LOW,
38780 +                               priv->token,
38781 +                               (uint8_t *)(data->mac_addrs[1].addr_bytes));
38782 +       if (ret) {
38783 +               PMD_DRV_LOG(ERR, "DPNI set broadcast mac address failed:"
38784 +                                       " Error Code = %0x\n", ret);
38785 +               return -1;
38786 +       }
38787 +
38788 +       /* ... rx buffer layout ... */
38789 +       tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM;
38790 +       tot_size = RTE_ALIGN_CEIL(tot_size,
38791 +                                      DPAA2_PACKET_LAYOUT_ALIGN);
38792 +
38793 +       memset(&layout, 0, sizeof(struct dpni_buffer_layout));
38794 +       layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
38795 +                               DPNI_BUF_LAYOUT_OPT_TIMESTAMP |
38796 +                               DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
38797 +                               DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
38798 +                               DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
38799 +
38800 +       layout.pass_frame_status = 1;
38801 +       layout.data_head_room = tot_size
38802 +               - DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION;
38803 +       layout.private_data_size = DPAA2_FD_PTA_SIZE;
38804 +       layout.pass_timestamp = 1;
38805 +       layout.pass_parser_result = 1;
38806 +       PMD_DRV_LOG(INFO, "Tot_size = %d, head room = %d, private = %d",
38807 +                       tot_size, layout.data_head_room, layout.private_data_size);
38808 +       ret = dpni_set_rx_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
38809 +                                       &layout);
38810 +       if (ret) {
38811 +               PMD_DRV_LOG(ERR, "Err(%d) in setting rx buffer layout\n", ret);
38812 +               return -1;
38813 +       }
38814 +
38815 +       /* ... tx buffer layout ... */
38816 +       memset(&layout, 0, sizeof(struct dpni_buffer_layout));
38817 +       layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
38818 +                               DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
38819 +       layout.pass_frame_status = 1;
38820 +       layout.pass_timestamp = 1;
38821 +       ret = dpni_set_tx_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, &layout);
38822 +       if (ret) {
38823 +               PMD_DRV_LOG(ERR, "Error (%d) in setting tx buffer layout\n", ret);
38824 +               return -1;
38825 +       }
38826 +
38827 +       /* ... tx-conf and error buffer layout ... */
38828 +       memset(&layout, 0, sizeof(struct dpni_buffer_layout));
38829 +       layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
38830 +                               DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
38831 +       layout.pass_frame_status = 1;
38832 +       layout.pass_timestamp = 1;
38833 +       ret = dpni_set_tx_conf_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, &layout);
38834 +       if (ret) {
38835 +               PMD_DRV_LOG(ERR, "Error (%d) in setting tx-conf buffer layout\n", ret);
38836 +               return -1;
38837 +       }
38838 +
38839 +       /* TODO - Set the MTU if required */
38840 +
38841 +       eth_dev->dev_ops = &ops;
38842 +       eth_dev->rx_pkt_burst = eth_dpaa2_prefetch_rx;/*eth_dpaa2_rx;*/
38843 +       eth_dev->tx_pkt_burst = eth_dpaa2_tx;
38844 +
38845 +       rte_free(ext_cfg);
38846 +
38847 +       return 0;
38848 +}
38849 +
38850 +static struct eth_driver rte_dpaa2_dpni = {
38851 +       {
38852 +               .name = "rte_dpaa2_dpni",
38853 +               .id_table = pci_id_dpaa2_map,
38854 +       },
38855 +       .eth_dev_init = dpaa2_dev_init,
38856 +       .dev_private_size = sizeof(struct dpaa2_dev_priv),
38857 +};
38858 +
38859 +static int
38860 +rte_pmd_dpaa2_devinit(
38861 +               const char *name __rte_unused,
38862 +               const char *params __rte_unused)
38863 +{
38864 +       PMD_DRV_LOG(INFO, "Initializing dpaa2_pmd for %s\n", name);
38865 +       rte_eth_driver_register(&rte_dpaa2_dpni);
38866 +
38867 +       return 0;
38868 +}
38869 +
38870 +static struct rte_driver pmd_dpaa2_drv = {
38871 +       .name = "dpaa2_pmd",
38872 +       .type = PMD_PDEV,
38873 +       .init = rte_pmd_dpaa2_devinit,
38874 +};
38875 +
38876 +PMD_REGISTER_DRIVER(pmd_dpaa2_drv, dpaa2);
38877 diff --git a/drivers/net/dpaa2/rte_eth_dpni_annot.h b/drivers/net/dpaa2/rte_eth_dpni_annot.h
38878 new file mode 100644
38879 index 0000000..0c3ae82
38880 --- /dev/null
38881 +++ b/drivers/net/dpaa2/rte_eth_dpni_annot.h
38882 @@ -0,0 +1,310 @@
38883 +/*-
38884 + *   BSD LICENSE
38885 + *
38886 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
38887 + *
38888 + *   Redistribution and use in source and binary forms, with or without
38889 + *   modification, are permitted provided that the following conditions
38890 + *   are met:
38891 + *
38892 + *     * Redistributions of source code must retain the above copyright
38893 + *       notice, this list of conditions and the following disclaimer.
38894 + *     * Redistributions in binary form must reproduce the above copyright
38895 + *       notice, this list of conditions and the following disclaimer in
38896 + *       the documentation and/or other materials provided with the
38897 + *       distribution.
38898 + *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
38899 + *       contributors may be used to endorse or promote products derived
38900 + *       from this software without specific prior written permission.
38901 + *
38902 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38903 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38904 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38905 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38906 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
38907 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
38908 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
38909 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
38910 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38911 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38912 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38913 + */
38914 +
38915 +/**
38916 + * @file
38917 + *
38918 + * DPNI packet parse results - implementation internal
38919 + */
38920 +
38921 +#ifndef RTE_ETH_DPNI_ANNOT_H_
38922 +#define RTE_ETH_DPNI_ANNOT_H_
38923 +
38924 +#ifdef __cplusplus
38925 +extern "C" {
38926 +#endif
38927 +
38928 +/* Annotation valid bits in FD FRC */
38929 +#define DPAA2_FD_FRC_FASV             0x8000
38930 +#define DPAA2_FD_FRC_FAEADV         0x4000
38931 +#define DPAA2_FD_FRC_FAPRV           0x2000
38932 +#define DPAA2_FD_FRC_FAIADV         0x1000
38933 +#define DPAA2_FD_FRC_FASWOV         0x0800
38934 +#define DPAA2_FD_FRC_FAICFDV       0x0400
38935 +
38936 +/* Annotation bits in FD CTRL */
38937 +#define DPAA2_FD_CTRL_ASAL           0x00020000      /* ASAL = 128 */
38938 +#define DPAA2_FD_CTRL_PTA             0x00800000
38939 +#define DPAA2_FD_CTRL_PTV1           0x00400000
38940 +
38941 +/* Frame annotation status */
38942 +struct dpaa2_fas {
38943 +       uint8_t reserved;
38944 +       uint8_t ppid;
38945 +       __le16 ifpid;
38946 +       __le32 status;
38947 +} __packed;
38948 +
38949 +/**
38950 + * Internal Packet annotation header
38951 + */
38952 +struct pkt_annotation {
38953 +       /**<    word1: Frame Annotation Status (8 bytes)*/
38954 +       uint64_t word1;
38955 +       /**<    word2: Time Stamp (8 bytes)*/
38956 +       uint64_t word2;
38957 +       /**<    word3: Next Hdr + FAF Extension + FAF (2 + 2 + 4 bytes)*/
38958 +       uint64_t word3;
38959 +       /**<    word4: Frame Annotation Flags-FAF (8 bytes) */
38960 +       uint64_t word4;
38961 +       /**<    word5:
38962 +               ShimOffset_1 + ShimOffset_2 + IPPIDOffset + EthOffset +
38963 +               LLC+SNAPOffset + VLANTCIOffset_1 + VLANTCIOffset_n +
38964 +               LastETypeOffset (1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 bytes)
38965 +       */
38966 +       uint64_t word5;
38967 +       /**<    word6:
38968 +               PPPoEOffset + MPLSOffset_1 + MPLSOffset_n + ARPorIPOffset_1
38969 +               + IPOffset_norMInEncapO + GREOffset + L4Offset +
38970 +               GTPorESPorIPSecOffset(1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 bytes)
38971 +       */
38972 +       uint64_t word6;
38973 +       /**<    word7:
38974 +               RoutingHdrOfset1 + RoutingHdrOfset2 + NxtHdrOffset + IPv6FragOffset +
38975 +               GrossRunningSum + RunningSum(1 + 1 + 1 + 1 + 2 + 2 bytes)
38976 +       */
38977 +       uint64_t word7;
38978 +       /**<    word8:
38979 +               ParseErrorcode + Soft Parsing Context (1 + 7 bytes)
38980 +       */
38981 +       uint64_t word8; /**< Layer 4 length */
38982 +};
38983 +
38984 +/**
38985 + * Internal Macros to get/set Packet annotation header
38986 + */
38987 +
38988 +/** General Macro to define a particular bit position*/
38989 +#define BIT_POS(x)                     ((uint64_t)1 << ((x)))
38990 +/** Set a bit in the variable */
38991 +#define BIT_SET_AT_POS(var, pos)       (var |= pos)
38992 +/** Reset the bit in the variable */
38993 +#define BIT_RESET_AT_POS(var, pos)     (var &= ~(pos))
38994 +/** Check the bit is set in the variable */
38995 +#define BIT_ISSET_AT_POS(var, pos)     ((var & pos) ? 1 : 0)
38996 +/**
38997 + * Macrso to define bit position in word3
38998 + */
38999 +#define NEXT_HDR(var)                  ((uint64_t)var & 0xFFFF000000000000)
39000 +#define FAF_EXTN_IPV6_ROUTE_HDR_PRESENT(var)   BIT_POS(16)
39001 +#define FAF_EXTN_RESERVED(var)         ((uint64_t)var & 0x00007FFF00000000)
39002 +#define FAF_USER_DEFINED_RESERVED(var) ((uint64_t)var & 0x00000000FF000000)
39003 +#define SHIM_SHELL_SOFT_PARSING_ERRROR         BIT_POS(23)
39004 +#define PARSING_ERROR                          BIT_POS(22)
39005 +#define L2_ETH_MAC_PRESENT                     BIT_POS(21)
39006 +#define L2_ETH_MAC_UNICAST                     BIT_POS(20)
39007 +#define L2_ETH_MAC_MULTICAST                   BIT_POS(19)
39008 +#define L2_ETH_MAC_BROADCAST                   BIT_POS(18)
39009 +#define L2_ETH_FRAME_IS_BPDU                   BIT_POS(17)
39010 +#define L2_ETH_FCOE_PRESENT                    BIT_POS(16)
39011 +#define L2_ETH_FIP_PRESENT                     BIT_POS(15)
39012 +#define L2_ETH_PARSING_ERROR                   BIT_POS(14)
39013 +#define L2_LLC_SNAP_PRESENT                    BIT_POS(13)
39014 +#define L2_UNKNOWN_LLC_OUI                     BIT_POS(12)
39015 +#define L2_LLC_SNAP_ERROR                      BIT_POS(11)
39016 +#define L2_VLAN_1_PRESENT                      BIT_POS(10)
39017 +#define L2_VLAN_N_PRESENT                      BIT_POS(9)
39018 +#define L2_VLAN_CFI_BIT_PRESENT                        BIT_POS(8)
39019 +#define L2_VLAN_PARSING_ERROR                  BIT_POS(7)
39020 +#define L2_PPPOE_PPP_PRESENT                   BIT_POS(6)
39021 +#define L2_PPPOE_PPP_PARSING_ERROR             BIT_POS(5)
39022 +#define L2_MPLS_1_PRESENT                      BIT_POS(4)
39023 +#define L2_MPLS_N_PRESENT                      BIT_POS(3)
39024 +#define L2_MPLS_PARSING_ERROR                  BIT_POS(2)
39025 +#define L2_ARP_PRESENT                         BIT_POS(1)
39026 +#define L2_ARP_PARSING_ERROR                   BIT_POS(0)
39027 +/**
39028 + * Macrso to define bit position in word4
39029 + */
39030 +#define L2_UNKNOWN_PROTOCOL                    BIT_POS(63)
39031 +#define L2_SOFT_PARSING_ERROR                  BIT_POS(62)
39032 +#define L3_IPV4_1_PRESENT                      BIT_POS(61)
39033 +#define L3_IPV4_1_UNICAST                      BIT_POS(60)
39034 +#define L3_IPV4_1_MULTICAST                    BIT_POS(59)
39035 +#define L3_IPV4_1_BROADCAST                    BIT_POS(58)
39036 +#define L3_IPV4_N_PRESENT                      BIT_POS(57)
39037 +#define L3_IPV4_N_UNICAST                      BIT_POS(56)
39038 +#define L3_IPV4_N_MULTICAST                    BIT_POS(55)
39039 +#define L3_IPV4_N_BROADCAST                    BIT_POS(54)
39040 +#define L3_IPV6_1_PRESENT                      BIT_POS(53)
39041 +#define L3_IPV6_1_UNICAST                      BIT_POS(52)
39042 +#define L3_IPV6_1_MULTICAST                    BIT_POS(51)
39043 +#define L3_IPV6_N_PRESENT                      BIT_POS(50)
39044 +#define L3_IPV6_N_UNICAST                      BIT_POS(49)
39045 +#define L3_IPV6_N_MULTICAST                    BIT_POS(48)
39046 +#define L3_IP_1_OPT_PRESENT                    BIT_POS(47)
39047 +#define L3_IP_1_UNKNOWN_PROTOCOL               BIT_POS(46)
39048 +#define L3_IP_1_MORE_FRAGMENT                  BIT_POS(45)
39049 +#define L3_IP_1_FIRST_FRAGMENT                 BIT_POS(44)
39050 +#define L3_IP_1_PARSING_ERROR                  BIT_POS(43)
39051 +#define L3_IP_N_OPT_PRESENT                    BIT_POS(42)
39052 +#define L3_IP_N_UNKNOWN_PROTOCOL               BIT_POS(41)
39053 +#define L3_IP_N_MORE_FRAGMENT                  BIT_POS(40)
39054 +#define L3_IP_N_FIRST_FRAGMENT                 BIT_POS(39)
39055 +#define L3_PROTO_ICMP_PRESENT                  BIT_POS(38)
39056 +#define L3_PROTO_IGMP_PRESENT                  BIT_POS(37)
39057 +#define L3_PROTO_ICMPV6_PRESENT                        BIT_POS(36)
39058 +#define L3_PROTO_UDP_LIGHT_PRESENT             BIT_POS(35)
39059 +#define L3_IP_N_PARSING_ERROR                  BIT_POS(34)
39060 +#define L3_MIN_ENCAP_PRESENT                   BIT_POS(33)
39061 +#define L3_MIN_ENCAP_SBIT_PRESENT              BIT_POS(32)
39062 +#define L3_MIN_ENCAP_PARSING_ERROR             BIT_POS(31)
39063 +#define L3_PROTO_GRE_PRESENT                   BIT_POS(30)
39064 +#define L3_PROTO_GRE_RBIT_PRESENT              BIT_POS(29)
39065 +#define L3_PROTO_GRE_PARSING_ERROR             BIT_POS(28)
39066 +#define L3_IP_UNKNOWN_PROTOCOL                 BIT_POS(27)
39067 +#define L3_SOFT_PARSING_ERROR                  BIT_POS(26)
39068 +#define L3_PROTO_UDP_PRESENT                   BIT_POS(25)
39069 +#define L3_PROTO_UDP_PARSING_ERROR             BIT_POS(24)
39070 +#define L3_PROTO_TCP_PRESENT                   BIT_POS(23)
39071 +#define L3_PROTO_TCP_OPT_PRESENT               BIT_POS(22)
39072 +#define L3_PROTO_TCP_CTRL_BIT_6_TO_11_PRESENT  BIT_POS(21)
39073 +#define L3_PROTO_TCP_CTRL_BIT_3_TO_5_PRESENT   BIT_POS(20)
39074 +#define L3_PROTO_TCP_PARSING_ERROR             BIT_POS(19)
39075 +#define L3_PROTO_IPSEC_PRESENT                 BIT_POS(18)
39076 +#define L3_PROTO_IPSEC_ESP_PRESENT             BIT_POS(17)
39077 +#define L3_PROTO_IPSEC_AH_PRESENT              BIT_POS(16)
39078 +#define L3_PROTO_IPSEC_PARSING_ERROR           BIT_POS(15)
39079 +#define L3_PROTO_SCTP_PRESENT                  BIT_POS(14)
39080 +#define L3_PROTO_SCTP_PARSING_ERROR            BIT_POS(13)
39081 +#define L3_PROTO_DCCP_PRESENT                  BIT_POS(12)
39082 +#define L3_PROTO_DCCP_PARSING_ERROR            BIT_POS(11)
39083 +#define L4_UNKNOWN_PROTOCOL                    BIT_POS(10)
39084 +#define L4_SOFT_PARSING_ERROR                  BIT_POS(9)
39085 +#define L3_PROTO_GTP_PRESENT                   BIT_POS(8)
39086 +#define L3_PROTO_GTP_PARSING_ERROR             BIT_POS(7)
39087 +#define L3_PROTO_ESP_PRESENT                   BIT_POS(6)
39088 +#define L3_PROTO_ESP_PARSING_ERROR             BIT_POS(5)
39089 +#define L3_PROTO_ISCSI_PRESENT                 BIT_POS(4)
39090 +#define L3_PROTO_CAPWAN__CTRL_PRESENT          BIT_POS(3)
39091 +#define L3_PROTO_CAPWAN__DATA_PRESENT          BIT_POS(2)
39092 +#define L5_SOFT_PARSING_ERROR                  BIT_POS(1)
39093 +#define L3_IPV6_ROUTE_HDR_PRESENT              BIT_POS(0)
39094 +
39095 +/**
39096 + * Macros to get values in word5
39097 + */
39098 +#define SHIM_OFFSET_1(var)             ((uint64_t)var & 0xFF00000000000000)
39099 +#define SHIM_OFFSET_2(var)             ((uint64_t)var & 0x00FF000000000000)
39100 +#define IP_PID_OFFSET(var)             ((uint64_t)var & 0x0000FF0000000000)
39101 +#define ETH_OFFSET(var)                        ((uint64_t)var & 0x000000FF00000000)
39102 +#define LLC_SNAP_OFFSET(var)           ((uint64_t)var & 0x00000000FF000000)
39103 +#define VLAN_TCI_OFFSET_1(var)         ((uint64_t)var & 0x0000000000FF0000)
39104 +#define VLAN_TCI_OFFSET_N(var)         ((uint64_t)var & 0x000000000000FF00)
39105 +#define LAST_ETYPE_OFFSET(var)         ((uint64_t)var & 0x00000000000000FF)
39106 +
39107 +/**
39108 + * Macros to get values in word6
39109 + */
39110 +#define PPPOE_OFFSET(var)              ((uint64_t)var & 0xFF00000000000000)
39111 +#define MPLS_OFFSET_1(var)             ((uint64_t)var & 0x00FF000000000000)
39112 +#define MPLS_OFFSET_N(var)             ((uint64_t)var & 0x0000FF0000000000)
39113 +#define ARP_OR_IP_OFFSET_1(var)                ((uint64_t)var & 0x000000FF00000000)
39114 +#define IP_N_OR_MIN_ENCAP_OFFSET(var)  ((uint64_t)var & 0x00000000FF000000)
39115 +#define GRE_OFFSET(var)                        ((uint64_t)var & 0x0000000000FF0000)
39116 +#define L4_OFFSET(var)                 ((uint64_t)var & 0x000000000000FF00)
39117 +#define GTP_OR_ESP_OR_IPSEC_OFFSET(var)        ((uint64_t)var & 0x00000000000000FF)
39118 +
39119 +/**
39120 + * Macros to get values in word7
39121 + */
39122 +#define IPV6_ROUTING_HDR_OFFSET_1(var) ((uint64_t)var & 0xFF00000000000000)
39123 +#define IPV6_ROUTING_HDR_OFFSET_2(var) ((uint64_t)var & 0x00FF000000000000)
39124 +#define NEXT_HDR_OFFSET(var)           ((uint64_t)var & 0x0000FF0000000000)
39125 +#define IPV6_FRAG_OFFSET(var)          ((uint64_t)var & 0x000000FF00000000)
39126 +#define GROSS_RUNNING_SUM(var)         ((uint64_t)var & 0x00000000FFFF0000)
39127 +#define RUNNING_SUM(var)               ((uint64_t)var & 0x000000000000FFFF)
39128 +
39129 +/**
39130 + * Macros to get values in word8
39131 + */
39132 +#define PARSE_ERROR_CODE(var)          ((uint64_t)var & 0xFF00000000000000)
39133 +#define SOFT_PARSING_CONTEXT(var)      ((uint64_t)var & 0x00FFFFFFFFFFFFFF)
39134 +
39135 +/* Debug frame, otherwise supposed to be discarded */
39136 +#define DPAA2_ETH_FAS_DISC           0x80000000
39137 +/* MACSEC frame */
39138 +#define DPAA2_ETH_FAS_MS               0x40000000
39139 +#define DPAA2_ETH_FAS_PTP             0x08000000
39140 +/* Ethernet multicast frame */
39141 +#define DPAA2_ETH_FAS_MC               0x04000000
39142 +/* Ethernet broadcast frame */
39143 +#define DPAA2_ETH_FAS_BC               0x02000000
39144 +#define DPAA2_ETH_FAS_KSE             0x00040000
39145 +#define DPAA2_ETH_FAS_EOFHE         0x00020000
39146 +#define DPAA2_ETH_FAS_MNLE           0x00010000
39147 +#define DPAA2_ETH_FAS_TIDE           0x00008000
39148 +#define DPAA2_ETH_FAS_PIEE           0x00004000
39149 +/* Frame length error */
39150 +#define DPAA2_ETH_FAS_FLE             0x00002000
39151 +/* Frame physical error; our favourite pastime */
39152 +#define DPAA2_ETH_FAS_FPE             0x00001000
39153 +#define DPAA2_ETH_FAS_PTE             0x00000080
39154 +#define DPAA2_ETH_FAS_ISP             0x00000040
39155 +#define DPAA2_ETH_FAS_PHE             0x00000020
39156 +#define DPAA2_ETH_FAS_BLE             0x00000010
39157 +/* L3 csum validation performed */
39158 +#define DPAA2_ETH_FAS_L3CV           0x00000008
39159 +/* L3 csum error */
39160 +#define DPAA2_ETH_FAS_L3CE           0x00000004
39161 +/* L4 csum validation performed */
39162 +#define DPAA2_ETH_FAS_L4CV           0x00000002
39163 +/* L4 csum error */
39164 +#define DPAA2_ETH_FAS_L4CE           0x00000001
39165 +
39166 +/* These bits always signal errors */
39167 +#define DPAA2_ETH_RX_ERR_MASK     (DPAA2_ETH_FAS_KSE      | \
39168 +                                        DPAA2_ETH_FAS_EOFHE    | \
39169 +                                        DPAA2_ETH_FAS_MNLE     | \
39170 +                                        DPAA2_ETH_FAS_TIDE     | \
39171 +                                        DPAA2_ETH_FAS_PIEE     | \
39172 +                                        DPAA2_ETH_FAS_FLE      | \
39173 +                                        DPAA2_ETH_FAS_FPE      | \
39174 +                                        DPAA2_ETH_FAS_PTE      | \
39175 +                                        DPAA2_ETH_FAS_ISP      | \
39176 +                                        DPAA2_ETH_FAS_PHE      | \
39177 +                                        DPAA2_ETH_FAS_BLE      | \
39178 +                                        DPAA2_ETH_FAS_L3CE     | \
39179 +                                        DPAA2_ETH_FAS_L4CE)
39180 +/* Unsupported features in the ingress */
39181 +#define DPAA2_ETH_RX_UNSUPP_MASK       DPAA2_ETH_FAS_MS
39182 +/* Tx errors */
39183 +#define DPAA2_ETH_TXCONF_ERR_MASK       (DPAA2_ETH_FAS_KSE      | \
39184 +                                        DPAA2_ETH_FAS_EOFHE    | \
39185 +                                        DPAA2_ETH_FAS_MNLE     | \
39186 +                                        DPAA2_ETH_FAS_TIDE)
39187 +
39188 +#ifdef __cplusplus
39189 +}
39190 +#endif
39191 +
39192 +#endif
39193 diff --git a/lib/librte_eal/common/eal_private.h b/lib/librte_eal/common/eal_private.h
39194 index 857dc3e..3dc9544 100644
39195 --- a/lib/librte_eal/common/eal_private.h
39196 +++ b/lib/librte_eal/common/eal_private.h
39197 @@ -325,4 +325,11 @@ int rte_eal_hugepage_init(void);
39198   */
39199  int rte_eal_hugepage_attach(void);
39200
39201 +#ifdef RTE_LIBRTE_DPAA2_PMD
39202 +/**
39203 + * Initialize any soc init related functions if any before thread creation
39204 +  */
39205 +int rte_eal_soc_pre_init(void);
39206 +#endif
39207 +
39208  #endif /* _EAL_PRIVATE_H_ */
39209 diff --git a/lib/librte_eal/linuxapp/eal/Makefile b/lib/librte_eal/linuxapp/eal/Makefile
39210 index 182729c..ed5be74 100644
39211 --- a/lib/librte_eal/linuxapp/eal/Makefile
39212 +++ b/lib/librte_eal/linuxapp/eal/Makefile
39213 @@ -76,6 +76,10 @@ SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_lcore.c
39214  SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_timer.c
39215  SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_interrupts.c
39216  SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_alarm.c
39217 +ifeq ($(CONFIG_RTE_LIBRTE_DPAA2_PMD),y)
39218 +SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_soc.c
39219 +SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_vfio_fsl_mc.c
39220 +endif
39221  ifeq ($(CONFIG_RTE_LIBRTE_IVSHMEM),y)
39222  SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_ivshmem.c
39223  endif
39224 diff --git a/lib/librte_eal/linuxapp/eal/eal.c b/lib/librte_eal/linuxapp/eal/eal.c
39225 index 3fb2188..832c252 100644
39226 --- a/lib/librte_eal/linuxapp/eal/eal.c
39227 +++ b/lib/librte_eal/linuxapp/eal/eal.c
39228 @@ -814,6 +814,11 @@ rte_eal_init(int argc, char **argv)
39229         if (rte_eal_tailqs_init() < 0)
39230                 rte_panic("Cannot init tail queues for objects\n");
39231
39232 +#ifdef RTE_LIBRTE_DPAA2_PMD
39233 +       if (rte_eal_soc_pre_init() < 0)
39234 +               rte_panic("Cannot pre init soc\n");
39235 +#endif
39236 +
39237  #ifdef RTE_LIBRTE_IVSHMEM
39238         if (rte_eal_ivshmem_obj_init() < 0)
39239                 rte_panic("Cannot init IVSHMEM objects\n");
39240 diff --git a/lib/librte_eal/linuxapp/eal/eal_soc.c b/lib/librte_eal/linuxapp/eal/eal_soc.c
39241 new file mode 100644
39242 index 0000000..1595f68
39243 --- /dev/null
39244 +++ b/lib/librte_eal/linuxapp/eal/eal_soc.c
39245 @@ -0,0 +1,67 @@
39246 +/*-
39247 + *   BSD LICENSE
39248 + *
39249 + *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
39250 + *
39251 + *   Redistribution and use in source and binary forms, with or without
39252 + *   modification, are permitted provided that the following conditions
39253 + *   are met:
39254 + *
39255 + *     * Redistributions of source code must retain the above copyright
39256 + *       notice, this list of conditions and the following disclaimer.
39257 + *     * Redistributions in binary form must reproduce the above copyright
39258 + *       notice, this list of conditions and the following disclaimer in
39259 + *       the documentation and/or other materials provided with the
39260 + *       distribution.
39261 + *     * Neither the name of Freescale Semiconductor, Inc or the names of its
39262 + *       contributors may be used to endorse or promote products derived
39263 + *       from this software without specific prior written permission.
39264 + *
39265 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
39266 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39267 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
39268 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39269 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39270 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
39271 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39272 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
39273 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39274 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39275 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39276 + */
39277 +
39278 +#include <unistd.h>
39279 +#include <limits.h>
39280 +#include <string.h>
39281 +#include <dirent.h>
39282 +
39283 +#include <rte_log.h>
39284 +#include <rte_eal.h>
39285 +#include <rte_lcore.h>
39286 +#include <rte_common.h>
39287 +#include <rte_string_fns.h>
39288 +#include <rte_debug.h>
39289 +#include "eal_private.h"
39290 +
39291 +#ifdef RTE_LIBRTE_DPAA2_PMD
39292 +#include "eal_vfio_fsl_mc.h"
39293 +#endif
39294 +
39295 +#if (defined RTE_LIBRTE_DPAA_PMD)
39296 +extern int usdpaa_pre_rte_eal_init(void);
39297 +#endif
39298 +
39299 +/* Initialize any soc init related functions if any before thread creation*/
39300 +int
39301 +rte_eal_soc_pre_init(void)
39302 +{
39303 +#ifdef RTE_LIBRTE_DPAA2_PMD
39304 +       if (rte_eal_dpaa2_init() < 0)
39305 +               RTE_LOG(WARNING, EAL, "Cannot init FSL_MC SCAN\n");
39306 +#endif
39307 +#if (defined RTE_LIBRTE_DPAA_PMD)
39308 +       if (usdpaa_pre_rte_eal_init())
39309 +               RTE_LOG(WARNING, EAL, "Cannot init FSL_DPAA \n");
39310 +#endif
39311 +       return 0;
39312 +}
39313 diff --git a/lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.c b/lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.c
39314 new file mode 100644
39315 index 0000000..0ddaef9
39316 --- /dev/null
39317 +++ b/lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.c
39318 @@ -0,0 +1,650 @@
39319 +/*-
39320 + *   BSD LICENSE
39321 + *
39322 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
39323 + *
39324 + *   Redistribution and use in source and binary forms, with or without
39325 + *   modification, are permitted provided that the following conditions
39326 + *   are met:
39327 + *
39328 + *     * Redistributions of source code must retain the above copyright
39329 + *       notice, this list of conditions and the following disclaimer.
39330 + *     * Redistributions in binary form must reproduce the above copyright
39331 + *       notice, this list of conditions and the following disclaimer in
39332 + *       the documentation and/or other materials provided with the
39333 + *       distribution.
39334 + *     * Neither the name of Freescale Semiconductor nor the names of its
39335 + *       contributors may be used to endorse or promote products derived
39336 + *       from this software without specific prior written permission.
39337 + *
39338 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
39339 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39340 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
39341 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39342 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39343 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
39344 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39345 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
39346 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39347 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39348 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39349 + */
39350 +
39351 +#include <unistd.h>
39352 +#include <stdio.h>
39353 +#include <sys/types.h>
39354 +#include <string.h>
39355 +#include <stdlib.h>
39356 +#include <fcntl.h>
39357 +#include <errno.h>
39358 +#include <sys/ioctl.h>
39359 +#include <sys/stat.h>
39360 +#include <sys/types.h>
39361 +#include <sys/mman.h>
39362 +#include <sys/vfs.h>
39363 +#include <libgen.h>
39364 +#include <dirent.h>
39365 +
39366 +#include "rte_pci.h"
39367 +#include "eal_vfio.h"
39368 +
39369 +#include <rte_log.h>
39370 +
39371 +#include "eal_vfio_fsl_mc.h"
39372 +
39373 +#include "rte_pci_dev_ids.h"
39374 +#include "eal_filesystem.h"
39375 +#include "eal_private.h"
39376 +
39377 +#ifndef VFIO_MAX_GROUPS
39378 +#define VFIO_MAX_GROUPS 64
39379 +#endif
39380 +
39381 +/* #define DPAA2_STAGE2_STASHING */
39382 +
39383 +/** Pathname of FSL-MC devices directory. */
39384 +#define SYSFS_FSL_MC_DEVICES "/sys/bus/fsl-mc/devices"
39385 +
39386 +/* Number of VFIO containers & groups with in */
39387 +static struct fsl_vfio_group vfio_groups[VFIO_MAX_GRP];
39388 +static struct fsl_vfio_container vfio_containers[VFIO_MAX_CONTAINERS];
39389 +static char *ls2bus_container;
39390 +static int container_device_fd;
39391 +static uint32_t *msi_intr_vaddr;
39392 +void *(*mcp_ptr_list);
39393 +static uint32_t mcp_id;
39394 +
39395 +static int vfio_connect_container(struct fsl_vfio_group *vfio_group)
39396 +{
39397 +       struct fsl_vfio_container *container;
39398 +       int i, fd, ret;
39399 +
39400 +       /* Try connecting to vfio container already created */
39401 +       for (i = 0; i < VFIO_MAX_CONTAINERS; i++) {
39402 +               container = &vfio_containers[i];
39403 +               if (!ioctl(vfio_group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) {
39404 +                       RTE_LOG(ERR, EAL, "Container pre-exists with FD[0x%x]"
39405 +                                       " for this group\n", container->fd);
39406 +                       vfio_group->container = container;
39407 +                       return 0;
39408 +               }
39409 +       }
39410 +
39411 +       /* Opens main vfio file descriptor which represents the "container" */
39412 +       fd = open("/dev/vfio/vfio", O_RDWR);
39413 +       if (fd < 0) {
39414 +               RTE_LOG(ERR, EAL, "vfio: failed to open /dev/vfio/vfio\n");
39415 +               return -errno;
39416 +       }
39417 +
39418 +       ret = ioctl(fd, VFIO_GET_API_VERSION);
39419 +       if (ret != VFIO_API_VERSION) {
39420 +               RTE_LOG(ERR, EAL, "vfio: supported vfio version: %d, "
39421 +                       "reported version: %d", VFIO_API_VERSION, ret);
39422 +               close(fd);
39423 +               return -EINVAL;
39424 +       }
39425 +#ifndef DPAA2_STAGE2_STASHING
39426 +       /* Check whether support for SMMU type IOMMU prresent or not */
39427 +       if (ioctl(fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) {
39428 +               /* Connect group to container */
39429 +               ret = ioctl(vfio_group->fd, VFIO_GROUP_SET_CONTAINER, &fd);
39430 +               if (ret) {
39431 +                       RTE_LOG(ERR, EAL, "vfio: failed to set group container:\n");
39432 +                       close(fd);
39433 +                       return -errno;
39434 +               }
39435 +
39436 +               ret = ioctl(fd, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU);
39437 +               if (ret) {
39438 +                       RTE_LOG(ERR, EAL, "vfio: failed to set iommu for container:\n");
39439 +                       close(fd);
39440 +                       return -errno;
39441 +               }
39442 +       } else {
39443 +               RTE_LOG(ERR, EAL, "vfio error: No supported IOMMU\n");
39444 +               close(fd);
39445 +               return -EINVAL;
39446 +       }
39447 +#else
39448 +       /* Check whether support for SMMU type IOMMU stage 2 present or not */
39449 +       if (ioctl(fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_NESTING_IOMMU)) {
39450 +               /* Connect group to container */
39451 +               ret = ioctl(vfio_group->fd, VFIO_GROUP_SET_CONTAINER, &fd);
39452 +               if (ret) {
39453 +                       RTE_LOG(ERR, EAL, "vfio: failed to set group container:\n");
39454 +                       close(fd);
39455 +                       return -errno;
39456 +               }
39457 +
39458 +               ret = ioctl(fd, VFIO_SET_IOMMU, VFIO_TYPE1_NESTING_IOMMU);
39459 +               if (ret) {
39460 +                       RTE_LOG(ERR, EAL, "vfio: failed to set iommu-2 for container:\n");
39461 +                       close(fd);
39462 +                       return -errno;
39463 +               }
39464 +       } else {
39465 +               RTE_LOG(ERR, EAL, "vfio error: No supported IOMMU-2\n");
39466 +               close(fd);
39467 +               return -EINVAL;
39468 +       }
39469 +#endif
39470 +       container = NULL;
39471 +       for (i = 0; i < VFIO_MAX_CONTAINERS; i++) {
39472 +               if (vfio_containers[i].used)
39473 +                       continue;
39474 +               RTE_LOG(ERR, EAL, "DPAA2-Unused container at index %d\n", i);
39475 +               container = &vfio_containers[i];
39476 +       }
39477 +       if (!container) {
39478 +               RTE_LOG(ERR, EAL, "vfio error: No Free Container Found\n");
39479 +               close(fd);
39480 +               return -ENOMEM;
39481 +       }
39482 +
39483 +       container->used = 1;
39484 +       container->fd = fd;
39485 +       container->group_list[container->index] = vfio_group;
39486 +       vfio_group->container = container;
39487 +       container->index++;
39488 +       return 0;
39489 +}
39490 +
39491 +static int vfio_map_irq_region(struct fsl_vfio_group *group)
39492 +{
39493 +       int ret;
39494 +       unsigned long *vaddr = NULL;
39495 +       struct vfio_iommu_type1_dma_map map = {
39496 +               .argsz = sizeof(map),
39497 +               .flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE,
39498 +               .vaddr = 0x6030000,
39499 +               .iova = 0x6030000,
39500 +               .size = 0x1000,
39501 +       };
39502 +
39503 +       vaddr = (unsigned long *)mmap(NULL, 0x1000, PROT_WRITE |
39504 +               PROT_READ, MAP_SHARED, container_device_fd, 0x6030000);
39505 +       if (vaddr == MAP_FAILED) {
39506 +               RTE_LOG(ERR, EAL, " mapping GITS region (errno = %d)", errno);
39507 +               return -errno;
39508 +       }
39509 +
39510 +       msi_intr_vaddr = (uint32_t *)((char *)(vaddr) + 64);
39511 +       map.vaddr = (unsigned long)vaddr;
39512 +       ret = ioctl(group->container->fd, VFIO_IOMMU_MAP_DMA, &map);
39513 +       if (ret == 0)
39514 +               return 0;
39515 +
39516 +       RTE_LOG(ERR, EAL, "vfio_map_irq_region fails (errno = %d)", errno);
39517 +       return -errno;
39518 +}
39519 +
39520 +int vfio_dmamap_mem_region(uint64_t vaddr,
39521 +                          uint64_t iova,
39522 +                          uint64_t size)
39523 +{
39524 +       struct fsl_vfio_group *group;
39525 +       struct vfio_iommu_type1_dma_map dma_map = {
39526 +               .argsz = sizeof(dma_map),
39527 +               .flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE,
39528 +       };
39529 +
39530 +       dma_map.vaddr = vaddr;
39531 +       dma_map.size = size;
39532 +       dma_map.iova = iova;
39533 +
39534 +       /* SET DMA MAP for IOMMU */
39535 +       group = &vfio_groups[0];
39536 +       if (ioctl(group->container->fd, VFIO_IOMMU_MAP_DMA, &dma_map)) {
39537 +               RTE_LOG(ERR, EAL, "SWP: VFIO_IOMMU_MAP_DMA API Error %d.\n", errno);
39538 +               return -1;
39539 +       }
39540 +       return 0;
39541 +}
39542 +
39543 +static int32_t setup_dmamap(void)
39544 +{
39545 +       int ret;
39546 +       struct fsl_vfio_group *group;
39547 +       struct vfio_iommu_type1_dma_map dma_map = {
39548 +               .argsz = sizeof(struct vfio_iommu_type1_dma_map),
39549 +               .flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE,
39550 +       };
39551 +
39552 +       int i;
39553 +       const struct rte_memseg *memseg;
39554 +
39555 +       for (i = 0; i < RTE_MAX_MEMSEG; i++) {
39556 +               memseg = rte_eal_get_physmem_layout();
39557 +               if (memseg == NULL) {
39558 +                       RTE_LOG(ERR, EAL,
39559 +                               "\nError Cannot get physical layout\n");
39560 +                       return -ENODEV;
39561 +               }
39562 +
39563 +               if (memseg[i].addr == NULL && memseg[i].len == 0) {
39564 +                       break;
39565 +               }
39566 +
39567 +               dma_map.size = memseg[i].len;
39568 +               dma_map.vaddr = memseg[i].addr_64;
39569 +#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
39570 +               dma_map.iova = memseg[i].phys_addr;
39571 +#else
39572 +               dma_map.iova = dma_map.vaddr;
39573 +#endif
39574 +
39575 +               /* SET DMA MAP for IOMMU */
39576 +               group = &vfio_groups[0];
39577 +
39578 +               printf("-->Initial SHM Virtual ADDR %llX\n", dma_map.vaddr);
39579 +               printf("-----> DMA size 0x%llX\n", dma_map.size);
39580 +               ret = ioctl(group->container->fd, VFIO_IOMMU_MAP_DMA, &dma_map);
39581 +               if (ret) {
39582 +                       RTE_LOG(ERR, EAL,
39583 +                               "\nErr: VFIO_IOMMU_MAP_DMA API Error %d.\n",
39584 +                               errno);
39585 +                       return ret;
39586 +               }
39587 +               printf("-----> dma_map.vaddr = 0x%llX\n", dma_map.vaddr);
39588 +       }
39589 +
39590 +       /* TODO - This is a W.A. as VFIO currently does not add the mapping of
39591 +           the interrupt region to SMMU. This should be removed once the
39592 +           support is added in the Kernel.
39593 +        */
39594 +       vfio_map_irq_region(group);
39595 +
39596 +       return 0;
39597 +}
39598 +
39599 +static int vfio_set_group(struct fsl_vfio_group *group, int groupid)
39600 +{
39601 +       char path[PATH_MAX];
39602 +       struct vfio_group_status status = { .argsz = sizeof(status) };
39603 +
39604 +       /* Open the VFIO file corresponding to the IOMMU group */
39605 +       snprintf(path, sizeof(path), "/dev/vfio/%d", groupid);
39606 +
39607 +       group->fd = open(path, O_RDWR);
39608 +       if (group->fd < 0) {
39609 +               RTE_LOG(ERR, EAL, "vfio: error opening %s\n", path);
39610 +               return -1;
39611 +       }
39612 +
39613 +       /* Test & Verify that group is VIABLE & AVAILABLE */
39614 +       if (ioctl(group->fd, VFIO_GROUP_GET_STATUS, &status)) {
39615 +               RTE_LOG(ERR, EAL, "vfio: error getting group status\n");
39616 +               close(group->fd);
39617 +               return -1;
39618 +       }
39619 +       if (!(status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
39620 +               RTE_LOG(ERR, EAL, "vfio: group not viable\n");
39621 +               close(group->fd);
39622 +               return -1;
39623 +       }
39624 +       /* Since Group is VIABLE, Store the groupid */
39625 +       group->groupid = groupid;
39626 +
39627 +       /* Now connect this IOMMU group to given container */
39628 +       if (vfio_connect_container(group)) {
39629 +               RTE_LOG(ERR, EAL,
39630 +                       "vfio: error sonnecting container with group %d\n",
39631 +                       groupid);
39632 +               close(group->fd);
39633 +               return -1;
39634 +       }
39635 +
39636 +       return 0;
39637 +}
39638 +
39639 +static int32_t setup_vfio_grp(char  *vfio_container)
39640 +{
39641 +       char path[PATH_MAX];
39642 +       char iommu_group_path[PATH_MAX], *group_name;
39643 +       struct fsl_vfio_group *group = NULL;
39644 +       struct stat st;
39645 +       int groupid;
39646 +       int ret, len, i;
39647 +
39648 +       printf("\tProcessing Container = %s\n", vfio_container);
39649 +       sprintf(path, "/sys/bus/fsl-mc/devices/%s", vfio_container);
39650 +       /* Check whether ls-container exists or not */
39651 +       printf("\tcontainer device path = %s\n", path);
39652 +       if (stat(path, &st) < 0) {
39653 +               RTE_LOG(ERR, EAL, "vfio: Error (%d) getting FSL-MC device (%s)\n",
39654 +                       errno,  path);
39655 +               return -errno;
39656 +       }
39657 +
39658 +       /* DPRC container exists. NOw checkout the IOMMU Group */
39659 +       strncat(path, "/iommu_group", sizeof(path) - strlen(path) - 1);
39660 +
39661 +       len = readlink(path, iommu_group_path, PATH_MAX);
39662 +       if (len == -1) {
39663 +               RTE_LOG(ERR, EAL, "\tvfio: error no iommu_group for device\n");
39664 +               RTE_LOG(ERR, EAL, "\t%s: len = %d, errno = %d\n",
39665 +                       path, len, errno);
39666 +               return -errno;
39667 +       }
39668 +
39669 +       iommu_group_path[len] = 0;
39670 +       group_name = basename(iommu_group_path);
39671 +       if (sscanf(group_name, "%d", &groupid) != 1) {
39672 +               RTE_LOG(ERR, EAL, "\tvfio: error reading %s: %m\n", path);
39673 +               return -errno;
39674 +       }
39675 +
39676 +       RTE_LOG(INFO, EAL, "\tvfio: iommu group id = %d\n", groupid);
39677 +
39678 +       /* Check if group already exists */
39679 +       for (i = 0; i < VFIO_MAX_GRP; i++) {
39680 +               group = &vfio_groups[i];
39681 +               if (group->groupid == groupid) {
39682 +                       RTE_LOG(ERR, EAL, "groupid already exists %d\n", groupid);
39683 +                       return 0;
39684 +               }
39685 +       }
39686 +
39687 +       if (vfio_set_group(group, groupid)) {
39688 +               RTE_LOG(ERR, EAL, "group setup failure - %d\n", groupid);
39689 +               return -ENODEV;
39690 +       }
39691 +
39692 +       /* Get Device information */
39693 +       ret = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, vfio_container);
39694 +       if (ret < 0) {
39695 +               RTE_LOG(ERR, EAL, "\tvfio: error getting device %s fd from group %d\n",
39696 +                       vfio_container, group->groupid);
39697 +               return ret;
39698 +       }
39699 +       container_device_fd = ret;
39700 +       RTE_LOG(INFO, EAL, "vfio: Container FD is [0x%X]\n", container_device_fd);
39701 +       /* Set up SMMU */
39702 +       ret = setup_dmamap();
39703 +       if (ret) {
39704 +               RTE_LOG(ERR, EAL, ": Setting dma map\n");
39705 +               return ret;
39706 +       }
39707 +
39708 +       return 0;
39709 +}
39710 +
39711 +static int64_t vfio_map_mcp_obj(struct fsl_vfio_group *group, char *mcp_obj)
39712 +{
39713 +       int64_t v_addr = (int64_t)MAP_FAILED;
39714 +       int32_t ret, mc_fd;
39715 +
39716 +       struct vfio_device_info d_info = { .argsz = sizeof(d_info) };
39717 +       struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
39718 +
39719 +       /* getting the mcp object's fd*/
39720 +       mc_fd = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, mcp_obj);
39721 +       if (mc_fd < 0) {
39722 +               RTE_LOG(ERR, EAL, "vfio: error getting device %s fd from group %d\n",
39723 +                       mcp_obj, group->fd);
39724 +               return v_addr;
39725 +       }
39726 +
39727 +       /* getting device info*/
39728 +       ret = ioctl(mc_fd, VFIO_DEVICE_GET_INFO, &d_info);
39729 +       if (ret < 0) {
39730 +               RTE_LOG(ERR, EAL, "vfio: error getting DEVICE_INFO\n");
39731 +               goto MC_FAILURE;
39732 +       }
39733 +
39734 +       /* getting device region info*/
39735 +       ret = ioctl(mc_fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
39736 +       if (ret < 0) {
39737 +               RTE_LOG(ERR, EAL, "vfio: error getting REGION_INFO\n");
39738 +               goto MC_FAILURE;
39739 +       }
39740 +
39741 +       RTE_LOG(INFO, EAL, "region offset = %llx  , region size = %llx\n",
39742 +               reg_info.offset, reg_info.size);
39743 +
39744 +       v_addr = (uint64_t)mmap(NULL, reg_info.size,
39745 +               PROT_WRITE | PROT_READ, MAP_SHARED,
39746 +               mc_fd, reg_info.offset);
39747 +
39748 +MC_FAILURE:
39749 +       close(mc_fd);
39750 +
39751 +       return v_addr;
39752 +}
39753 +
39754 +/* Following function shall fetch total available list of MC devices
39755 + * from VFIO container & populate private list of devices and other
39756 + * data structures
39757 + */
39758 +static int vfio_process_group_devices(void)
39759 +{
39760 +       struct fsl_vfio_device *vdev;
39761 +       struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
39762 +       char *temp_obj, *object_type, *mcp_obj, *dev_name;
39763 +       int32_t object_id, i, dev_fd, ret;
39764 +       DIR *d;
39765 +       struct dirent *dir;
39766 +       char path[PATH_MAX];
39767 +       int64_t v_addr;
39768 +       int ndev_count;
39769 +       struct fsl_vfio_group *group = &vfio_groups[0];
39770 +
39771 +       sprintf(path, "/sys/kernel/iommu_groups/%d/devices", group->groupid);
39772 +
39773 +       d = opendir(path);
39774 +       if (!d) {
39775 +               RTE_LOG(ERR, EAL, "Unable to open directory %s\n", path);
39776 +               return -1;
39777 +       }
39778 +
39779 +       /*Counting the number of devices in a group and getting the mcp ID*/
39780 +       ndev_count = 0;
39781 +       mcp_obj = NULL;
39782 +       while ((dir = readdir(d)) != NULL) {
39783 +               if (dir->d_type == DT_LNK) {
39784 +                       ndev_count++;
39785 +                       if (!strncmp("dpmcp", dir->d_name, 5)) {
39786 +                               if (mcp_obj)
39787 +                                       free(mcp_obj);
39788 +                               mcp_obj = malloc(sizeof(dir->d_name));
39789 +                               if (!mcp_obj) {
39790 +                                       RTE_LOG(ERR, EAL,
39791 +                                               "Unable to allocate memory\n");
39792 +                                       return -ENOMEM;
39793 +                               }
39794 +                               strcpy(mcp_obj, dir->d_name);
39795 +                               temp_obj = strtok(dir->d_name, ".");
39796 +                               temp_obj = strtok(NULL, ".");
39797 +                               sscanf(temp_obj, "%d", &mcp_id);
39798 +                       }
39799 +               }
39800 +       }
39801 +       closedir(d);
39802 +
39803 +       if (!mcp_obj) {
39804 +               RTE_LOG(ERR, EAL, "MCP Object not Found\n");
39805 +               return -ENODEV;
39806 +       }
39807 +       RTE_LOG(INFO, EAL, "Total devices in conatiner = %d, MCP ID = %d\n",
39808 +               ndev_count, mcp_id);
39809 +
39810 +       /* Allocate the memory depends upon number of objects in a group*/
39811 +       group->vfio_device = (struct fsl_vfio_device *)malloc(ndev_count * sizeof(struct fsl_vfio_device));
39812 +       if (!(group->vfio_device)) {
39813 +               RTE_LOG(ERR, EAL, "Unable to allocate memory\n");
39814 +               free(mcp_obj);
39815 +               return -ENOMEM;
39816 +       }
39817 +
39818 +       /* Allocate memory for MC Portal list */
39819 +       mcp_ptr_list = malloc(sizeof(void *) * 1);
39820 +       if (!mcp_ptr_list) {
39821 +               RTE_LOG(ERR, EAL, "NO Memory!\n");
39822 +               free(mcp_obj);
39823 +               goto FAILURE;
39824 +       }
39825 +
39826 +       v_addr = vfio_map_mcp_obj(group, mcp_obj);
39827 +       free(mcp_obj);
39828 +       if (v_addr == (int64_t)MAP_FAILED) {
39829 +               RTE_LOG(ERR, EAL, "mapping region (errno = %d)\n", errno);
39830 +               goto FAILURE;
39831 +       }
39832 +
39833 +       RTE_LOG(INFO, EAL, "MC has VIR_ADD = 0x%ld\n", v_addr);
39834 +
39835 +       mcp_ptr_list[0] = (void *)v_addr;
39836 +
39837 +       d = opendir(path);
39838 +       if (!d) {
39839 +               RTE_LOG(ERR, EAL, "Directory %s not able to open\n", path);
39840 +               goto FAILURE;
39841 +       }
39842 +
39843 +       i = 0;
39844 +       printf("\nDPAA2 - Parsing MC Device Objects:\n");
39845 +       /* Parsing each object and initiating them*/
39846 +       while ((dir = readdir(d)) != NULL) {
39847 +               if (dir->d_type != DT_LNK)
39848 +                       continue;
39849 +               if (!strncmp("dprc", dir->d_name, 4) || !strncmp("dpmcp", dir->d_name, 5))
39850 +                       continue;
39851 +               dev_name = malloc(sizeof(dir->d_name));
39852 +               if (!dev_name) {
39853 +                       RTE_LOG(ERR, EAL, "Unable to allocate memory\n");
39854 +                       goto FAILURE;
39855 +               }
39856 +               strcpy(dev_name, dir->d_name);
39857 +               object_type = strtok(dir->d_name, ".");
39858 +               temp_obj = strtok(NULL, ".");
39859 +               sscanf(temp_obj, "%d", &object_id);
39860 +               RTE_LOG(INFO, EAL, "%s ", dev_name);
39861 +
39862 +               /* getting the device fd*/
39863 +               dev_fd = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, dev_name);
39864 +               if (dev_fd < 0) {
39865 +                       RTE_LOG(ERR, EAL, "vfio getting device %s fd from group %d\n",
39866 +                               dev_name, group->fd);
39867 +                       free(dev_name);
39868 +                       goto FAILURE;
39869 +               }
39870 +
39871 +               free(dev_name);
39872 +               vdev = &group->vfio_device[group->object_index++];
39873 +               vdev->fd = dev_fd;
39874 +               vdev->index = i;
39875 +               i++;
39876 +               /* Get Device inofrmation */
39877 +               if (ioctl(vdev->fd, VFIO_DEVICE_GET_INFO, &device_info)) {
39878 +                       RTE_LOG(ERR, EAL, "VFIO_DEVICE_FSL_MC_GET_INFO failed\n");
39879 +                       goto FAILURE;
39880 +               }
39881 +
39882 +               if (!strcmp(object_type, "dpni") ||
39883 +                   !strcmp(object_type, "dpseci")) {
39884 +                       struct rte_pci_device *dev;
39885 +
39886 +                       dev = malloc(sizeof(struct rte_pci_device));
39887 +                       if (dev == NULL) {
39888 +                               return -1;
39889 +                       }
39890 +                       memset(dev, 0, sizeof(*dev));
39891 +                       /* store hw_id of dpni/dpseci device */
39892 +                       dev->addr.devid = object_id;
39893 +                       dev->id.vendor_id = FSL_VENDOR_ID;
39894 +                       dev->id.device_id = (strcmp(object_type, "dpseci")) ?
39895 +                                       FSL_MC_DPNI_DEVID : FSL_MC_DPSECI_DEVID;
39896 +
39897 +                       TAILQ_INSERT_TAIL(&pci_device_list, dev, next);
39898 +               }
39899 +
39900 +               if (!strcmp(object_type, "dpio")) {
39901 +                       dpaa2_create_dpio_device(vdev, &device_info, object_id);
39902 +               }
39903 +
39904 +               if (!strcmp(object_type, "dpbp")) {
39905 +                       dpaa2_create_dpbp_device(object_id);
39906 +               }
39907 +       }
39908 +       closedir(d);
39909 +
39910 +       ret = dpaa2_affine_qbman_swp();
39911 +       if (ret)
39912 +               RTE_LOG(ERR, EAL, "%s(): Err in affining qbman swp\n", __func__);
39913 +
39914 +       return 0;
39915 +
39916 +FAILURE:
39917 +       free(group->vfio_device);
39918 +       group->vfio_device = NULL;
39919 +       return -1;
39920 +}
39921 +
39922 +/*
39923 + * Scan the content of the PCI bus, and the devices in the devices
39924 + * list
39925 + */
39926 +static int
39927 +fsl_mc_scan(void)
39928 +{
39929 +       char path[PATH_MAX];
39930 +       struct stat st;
39931 +
39932 +       ls2bus_container = getenv("DPRC");
39933 +
39934 +       if (ls2bus_container == NULL) {
39935 +               RTE_LOG(WARNING, EAL, "vfio container not set in env DPRC\n");
39936 +               return -1;
39937 +       }
39938 +
39939 +       snprintf(path, sizeof(path), "%s/%s", SYSFS_FSL_MC_DEVICES,
39940 +                ls2bus_container);
39941 +       /* Check whether LS-Container exists or not */
39942 +       RTE_LOG(INFO, EAL, "\tcontainer device path = %s\n", path);
39943 +       if (stat(path, &st) < 0) {
39944 +               RTE_LOG(ERR, EAL, "vfio:fsl-mc device does not exists\n");
39945 +               return -1;
39946 +       }
39947 +       return 0;
39948 +}
39949 +
39950 +/* Init the FSL-MC- LS2 EAL subsystem */
39951 +int
39952 +rte_eal_dpaa2_init(void)
39953 +{
39954 +       if (fsl_mc_scan() < 0)
39955 +               return -1;
39956 +
39957 +#ifdef VFIO_PRESENT
39958 +       if (setup_vfio_grp(ls2bus_container)) {
39959 +               RTE_LOG(ERR, EAL, "setup_vfio_grp\n");
39960 +               return -1;
39961 +       }
39962 +       if (vfio_process_group_devices()) {
39963 +               RTE_LOG(ERR, EAL, "vfio_process_group_devices\n");
39964 +               return -1;
39965 +       }
39966 +#endif
39967 +       return 0;
39968 +}
39969 diff --git a/lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.h b/lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.h
39970 new file mode 100644
39971 index 0000000..cf2bd38
39972 --- /dev/null
39973 +++ b/lib/librte_eal/linuxapp/eal/eal_vfio_fsl_mc.h
39974 @@ -0,0 +1,98 @@
39975 +/*-
39976 + *   BSD LICENSE
39977 + *
39978 + *   Copyright (c) 2014 Freescale Semiconductor, Inc. All rights reserved.
39979 + *
39980 + *   Redistribution and use in source and binary forms, with or without
39981 + *   modification, are permitted provided that the following conditions
39982 + *   are met:
39983 + *
39984 + *     * Redistributions of source code must retain the above copyright
39985 + *       notice, this list of conditions and the following disclaimer.
39986 + *     * Redistributions in binary form must reproduce the above copyright
39987 + *       notice, this list of conditions and the following disclaimer in
39988 + *       the documentation and/or other materials provided with the
39989 + *       distribution.
39990 + *     * Neither the name of Freescale Semiconductor nor the names of its
39991 + *       contributors may be used to endorse or promote products derived
39992 + *       from this software without specific prior written permission.
39993 + *
39994 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
39995 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39996 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
39997 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39998 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39999 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40000 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
40001 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
40002 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40003 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40004 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40005 + */
40006 +
40007 +#ifndef _EAL_VFIO_FSL_MC_H_
40008 +#define _EAL_VFIO_FSL_MC_H_
40009 +
40010 +#include <rte_memory.h>
40011 +#include <rte_atomic.h>
40012 +#include "eal_vfio.h"
40013 +
40014 +#define FSL_VENDOR_ID          0x1957
40015 +#define FSL_MC_DPNI_DEVID      7
40016 +#define FSL_MC_DPSECI_DEVID    3
40017 +
40018 +#define VFIO_MAX_GRP           1
40019 +#define VFIO_MAX_CONTAINERS    1
40020 +
40021 +#define DPAA2_MBUF_HW_ANNOTATION       64
40022 +#define DPAA2_FD_PTA_SIZE              64
40023 +
40024 +#if (DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) > RTE_PKTMBUF_HEADROOM
40025 +#error "Annotation requirement is more than RTE_PKTMBUF_HEADROOM"
40026 +#endif
40027 +
40028 +/* we will re-use the HEADROOM for annotation in RX */
40029 +#define DPAA2_HW_BUF_RESERVE   0
40030 +#define DPAA2_PACKET_LAYOUT_ALIGN      64 /*changing from 256 */
40031 +
40032 +typedef struct fsl_vfio_device {
40033 +       int fd; /* fsl_mc root container device ?? */
40034 +       int index; /*index of child object */
40035 +       struct fsl_vfio_device *child; /* Child object */
40036 +} fsl_vfio_device;
40037 +
40038 +typedef struct fsl_vfio_group {
40039 +       int fd; /* /dev/vfio/"groupid" */
40040 +       int groupid;
40041 +       struct fsl_vfio_container *container;
40042 +       int object_index;
40043 +       struct fsl_vfio_device *vfio_device;
40044 +} fsl_vfio_group;
40045 +
40046 +typedef struct fsl_vfio_container {
40047 +       int fd; /* /dev/vfio/vfio */
40048 +       int used;
40049 +       int index; /* index in group list */
40050 +       struct fsl_vfio_group *group_list[VFIO_MAX_GRP];
40051 +} fsl_vfio_container;
40052 +
40053 +int vfio_dmamap_mem_region(
40054 +       uint64_t vaddr,
40055 +       uint64_t iova,
40056 +       uint64_t size);
40057 +
40058 +/* initialize the NXP/FSL dpaa2 accelerators */
40059 +int rte_eal_dpaa2_init(void);
40060 +
40061 +int dpaa2_create_dpio_device(struct fsl_vfio_device *vdev,
40062 +                            struct vfio_device_info *obj_info,
40063 +                       int object_id);
40064 +
40065 +int dpaa2_create_dpbp_device(int dpbp_id);
40066 +
40067 +int dpaa2_affine_qbman_swp(void);
40068 +
40069 +int dpaa2_affine_qbman_swp_sec(void);
40070 +
40071 +#endif
40072 +
40073 diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
40074 index 059ad9e..d620ad1 100644
40075 --- a/lib/librte_mempool/rte_mempool.h
40076 +++ b/lib/librte_mempool/rte_mempool.h
40077 @@ -262,6 +262,14 @@ struct rte_mempool {
40078  #define MEMPOOL_F_POOL_CREATED   0x0010 /**< Internal: pool is created. */
40079  #define MEMPOOL_F_NO_PHYS_CONTIG 0x0020 /**< Don't need physically contiguous objs. */
40080
40081 +#ifdef RTE_LIBRTE_DPAA2_PMD
40082 +/* TODO: This should be removed once mempool integration is complete. Primary
40083 + * reason for this is identification of DPAA1/2 memory pool for forwarding
40084 + * case
40085 + */
40086 +#define MEMPOOL_F_HW_PKT_POOL   0x0080
40087 +#endif
40088 +
40089  /**
40090   * @internal When debug is enabled, store some statistics.
40091   *
40092 diff --git a/mk/rte.app.mk b/mk/rte.app.mk
40093 index eb28e11..11ae122 100644
40094 --- a/mk/rte.app.mk
40095 +++ b/mk/rte.app.mk
40096 @@ -101,6 +101,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_CFGFILE)        += -lrte_cfgfile
40097
40098  _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND)       += -lrte_pmd_bond
40099  _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_XENVIRT)    += -lrte_pmd_xenvirt -lxenstore
40100 +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD)     += -lrte_pmd_dpaa2
40101
40102  ifeq ($(CONFIG_RTE_BUILD_SHARED_LIB),n)
40103  # plugins (link only if static libraries)
40104 --
40105 2.5.0
40106