drivers/crypto/qat/qat_adf/qat_algs.h

   1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
   2  * Copyright(c) 2015-2018 Intel Corporation
   3  */
   4 #ifndef _ICP_QAT_ALGS_H_
   5 #define _ICP_QAT_ALGS_H_
   6 #include <rte_memory.h>
   7 #include <rte_crypto.h>
   8 #include "icp_qat_hw.h"
   9 #include "icp_qat_fw.h"
  10 #include "icp_qat_fw_la.h"
  11 #include "../qat_crypto.h"
  12
  13 /*
  14  * Key Modifier (KM) value used in KASUMI algorithm in F9 mode to XOR
  15  * Integrity Key (IK)
  16  */
  17 #define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
  18
  19 #define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
  20
  21 /* 3DES key sizes */
  22 #define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
  23 #define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
  24
  25 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
  26         ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
  27                                         ICP_QAT_HW_CIPHER_NO_CONVERT, \
  28                                         ICP_QAT_HW_CIPHER_ENCRYPT)
  29
  30 #define QAT_AES_HW_CONFIG_CBC_DEC(alg) \
  31         ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
  32                                         ICP_QAT_HW_CIPHER_KEY_CONVERT, \
  33                                         ICP_QAT_HW_CIPHER_DECRYPT)
  34
  35 struct qat_alg_buf {
  36         uint32_t len;
  37         uint32_t resrvd;
  38         uint64_t addr;
  39 } __rte_packed;
  40
  41 enum qat_crypto_proto_flag {
  42         QAT_CRYPTO_PROTO_FLAG_NONE = 0,
  43         QAT_CRYPTO_PROTO_FLAG_CCM = 1,
  44         QAT_CRYPTO_PROTO_FLAG_GCM = 2,
  45         QAT_CRYPTO_PROTO_FLAG_SNOW3G = 3,
  46         QAT_CRYPTO_PROTO_FLAG_ZUC = 4
  47 };
  48
  49 /*
  50  * Maximum number of SGL entries
  51  */
  52 #define QAT_SGL_MAX_NUMBER      16
  53
  54 struct qat_alg_buf_list {
  55         uint64_t resrvd;
  56         uint32_t num_bufs;
  57         uint32_t num_mapped_bufs;
  58         struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
  59 } __rte_packed __rte_cache_aligned;
  60
  61 struct qat_crypto_op_cookie {
  62         struct qat_alg_buf_list qat_sgl_list_src;
  63         struct qat_alg_buf_list qat_sgl_list_dst;
  64         rte_iova_t qat_sgl_src_phys_addr;
  65         rte_iova_t qat_sgl_dst_phys_addr;
  66 };
  67
  68 /* Common content descriptor */
  69 struct qat_alg_cd {
  70         struct icp_qat_hw_cipher_algo_blk cipher;
  71         struct icp_qat_hw_auth_algo_blk hash;
  72 } __rte_packed __rte_cache_aligned;
  73
  74 struct qat_session {
  75         enum icp_qat_fw_la_cmd_id qat_cmd;
  76         enum icp_qat_hw_cipher_algo qat_cipher_alg;
  77         enum icp_qat_hw_cipher_dir qat_dir;
  78         enum icp_qat_hw_cipher_mode qat_mode;
  79         enum icp_qat_hw_auth_algo qat_hash_alg;
  80         enum icp_qat_hw_auth_op auth_op;
  81         void *bpi_ctx;
  82         struct qat_alg_cd cd;
  83         uint8_t *cd_cur_ptr;
  84         rte_iova_t cd_paddr;
  85         struct icp_qat_fw_la_bulk_req fw_req;
  86         uint8_t aad_len;
  87         struct qat_crypto_instance *inst;
  88         struct {
  89                 uint16_t offset;
  90                 uint16_t length;
  91         } cipher_iv;
  92         struct {
  93                 uint16_t offset;
  94                 uint16_t length;
  95         } auth_iv;
  96         uint16_t digest_length;
  97         rte_spinlock_t lock;    /* protects this struct */
  98         enum qat_device_gen min_qat_dev_gen;
  99 };
 100
 101 int qat_get_inter_state_size(enum icp_qat_hw_auth_algo qat_hash_alg);
 102
 103 int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cd,
 104                                                 uint8_t *enckey,
 105                                                 uint32_t enckeylen);
 106
 107 int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 108                                                 uint8_t *authkey,
 109                                                 uint32_t authkeylen,
 110                                                 uint32_t aad_length,
 111                                                 uint32_t digestsize,
 112                                                 unsigned int operation);
 113
 114 void qat_alg_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,
 115                                         enum qat_crypto_proto_flag proto_flags);
 116
 117 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 118 int qat_alg_validate_aes_docsisbpi_key(int key_len,
 119                                         enum icp_qat_hw_cipher_algo *alg);
 120 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 121 int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 122 int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 123 int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 124 int qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg);
 125 int qat_alg_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 126 #endif