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34 #ifndef _HSI_STRUCT_DEF_DPDK_
35 #define _HSI_STRUCT_DEF_DPDK_
36 /* HSI and HWRM Specification 1.8.2 */
37 #define HWRM_VERSION_MAJOR 1
38 #define HWRM_VERSION_MINOR 8
39 #define HWRM_VERSION_UPDATE 2
41 #define HWRM_VERSION_RSVD 0 /* non-zero means beta version */
43 #define HWRM_VERSION_STR "1.8.2.0"
45 * Following is the signature for HWRM message field that indicates not
46 * applicable (All F's). Need to cast it the size of the field if needed.
48 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
49 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
50 #define HWRM_MAX_RESP_LEN (280) /* hwrm_selftest_qlist */
51 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
52 #define HW_HASH_KEY_SIZE 40
53 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
54 #define HWRM_ROCE_SP_HSI_VERSION_MAJOR 1
55 #define HWRM_ROCE_SP_HSI_VERSION_MINOR 8
56 #define HWRM_ROCE_SP_HSI_VERSION_UPDATE 2
61 #define HWRM_VER_GET (UINT32_C(0x0))
62 #define HWRM_FUNC_BUF_UNRGTR (UINT32_C(0xe))
63 #define HWRM_FUNC_VF_CFG (UINT32_C(0xf))
64 /* Reserved for future use */
65 #define RESERVED1 (UINT32_C(0x10))
66 #define HWRM_FUNC_RESET (UINT32_C(0x11))
67 #define HWRM_FUNC_GETFID (UINT32_C(0x12))
68 #define HWRM_FUNC_VF_ALLOC (UINT32_C(0x13))
69 #define HWRM_FUNC_VF_FREE (UINT32_C(0x14))
70 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
71 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
72 #define HWRM_FUNC_CFG (UINT32_C(0x17))
73 #define HWRM_FUNC_QSTATS (UINT32_C(0x18))
74 #define HWRM_FUNC_CLR_STATS (UINT32_C(0x19))
75 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
76 #define HWRM_FUNC_VF_RESC_FREE (UINT32_C(0x1b))
77 #define HWRM_FUNC_VF_VNIC_IDS_QUERY (UINT32_C(0x1c))
78 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
79 #define HWRM_FUNC_DRV_QVER (UINT32_C(0x1e))
80 #define HWRM_FUNC_BUF_RGTR (UINT32_C(0x1f))
81 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
82 #define HWRM_PORT_MAC_CFG (UINT32_C(0x21))
83 #define HWRM_PORT_QSTATS (UINT32_C(0x23))
84 #define HWRM_PORT_LPBK_QSTATS (UINT32_C(0x24))
85 #define HWRM_PORT_CLR_STATS (UINT32_C(0x25))
86 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
87 #define HWRM_PORT_MAC_QCFG (UINT32_C(0x28))
88 #define HWRM_PORT_PHY_QCAPS (UINT32_C(0x2a))
89 #define HWRM_PORT_LED_CFG (UINT32_C(0x2d))
90 #define HWRM_PORT_LED_QCFG (UINT32_C(0x2e))
91 #define HWRM_PORT_LED_QCAPS (UINT32_C(0x2f))
92 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
93 #define HWRM_QUEUE_QCFG (UINT32_C(0x31))
94 #define HWRM_QUEUE_CFG (UINT32_C(0x32))
95 #define HWRM_FUNC_VLAN_CFG (UINT32_C(0x33))
96 #define HWRM_FUNC_VLAN_QCFG (UINT32_C(0x34))
97 #define HWRM_QUEUE_PFCENABLE_QCFG (UINT32_C(0x35))
98 #define HWRM_QUEUE_PFCENABLE_CFG (UINT32_C(0x36))
99 #define HWRM_QUEUE_PRI2COS_QCFG (UINT32_C(0x37))
100 #define HWRM_QUEUE_PRI2COS_CFG (UINT32_C(0x38))
101 #define HWRM_QUEUE_COS2BW_QCFG (UINT32_C(0x39))
102 #define HWRM_QUEUE_COS2BW_CFG (UINT32_C(0x3a))
103 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
104 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
105 #define HWRM_VNIC_FREE (UINT32_C(0x41))
106 #define HWRM_VNIC_CFG (UINT32_C(0x42))
107 #define HWRM_VNIC_QCFG (UINT32_C(0x43))
108 #define HWRM_VNIC_TPA_CFG (UINT32_C(0x44))
109 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
110 #define HWRM_VNIC_RSS_QCFG (UINT32_C(0x47))
111 #define HWRM_VNIC_PLCMODES_CFG (UINT32_C(0x48))
112 #define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
113 #define HWRM_VNIC_QCAPS (UINT32_C(0x4a))
114 #define HWRM_RING_ALLOC (UINT32_C(0x50))
115 #define HWRM_RING_FREE (UINT32_C(0x51))
116 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
117 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS (UINT32_C(0x53))
118 #define HWRM_RING_RESET (UINT32_C(0x5e))
119 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
120 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
121 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
122 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
123 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
124 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
125 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
126 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
127 /* Reserved for future use */
128 #define HWRM_CFA_VLAN_ANTISPOOF_CFG (UINT32_C(0x94))
129 #define HWRM_CFA_TUNNEL_FILTER_ALLOC (UINT32_C(0x95))
130 #define HWRM_CFA_TUNNEL_FILTER_FREE (UINT32_C(0x96))
131 #define HWRM_CFA_NTUPLE_FILTER_ALLOC (UINT32_C(0x99))
132 #define HWRM_CFA_NTUPLE_FILTER_FREE (UINT32_C(0x9a))
133 #define HWRM_CFA_NTUPLE_FILTER_CFG (UINT32_C(0x9b))
134 #define HWRM_CFA_EM_FLOW_ALLOC (UINT32_C(0x9c))
135 #define HWRM_CFA_EM_FLOW_FREE (UINT32_C(0x9d))
136 #define HWRM_CFA_EM_FLOW_CFG (UINT32_C(0x9e))
137 #define HWRM_TUNNEL_DST_PORT_QUERY (UINT32_C(0xa0))
138 #define HWRM_TUNNEL_DST_PORT_ALLOC (UINT32_C(0xa1))
139 #define HWRM_TUNNEL_DST_PORT_FREE (UINT32_C(0xa2))
140 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
141 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
142 #define HWRM_STAT_CTX_QUERY (UINT32_C(0xb2))
143 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
144 #define HWRM_FW_RESET (UINT32_C(0xc0))
145 #define HWRM_FW_QSTATUS (UINT32_C(0xc1))
146 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
147 #define HWRM_REJECT_FWD_RESP (UINT32_C(0xd1))
148 #define HWRM_FWD_RESP (UINT32_C(0xd2))
149 #define HWRM_FWD_ASYNC_EVENT_CMPL (UINT32_C(0xd3))
150 #define HWRM_TEMP_MONITOR_QUERY (UINT32_C(0xe0))
151 #define HWRM_WOL_FILTER_ALLOC (UINT32_C(0xf0))
152 #define HWRM_WOL_FILTER_FREE (UINT32_C(0xf1))
153 #define HWRM_WOL_FILTER_QCFG (UINT32_C(0xf2))
154 #define HWRM_WOL_REASON_QCFG (UINT32_C(0xf3))
155 #define HWRM_DBG_DUMP (UINT32_C(0xff14))
156 #define HWRM_NVM_VALIDATE_OPTION (UINT32_C(0xffef))
157 #define HWRM_NVM_FLUSH (UINT32_C(0xfff0))
158 #define HWRM_NVM_GET_VARIABLE (UINT32_C(0xfff1))
159 #define HWRM_NVM_SET_VARIABLE (UINT32_C(0xfff2))
160 #define HWRM_NVM_INSTALL_UPDATE (UINT32_C(0xfff3))
161 #define HWRM_NVM_MODIFY (UINT32_C(0xfff4))
162 #define HWRM_NVM_VERIFY_UPDATE (UINT32_C(0xfff5))
163 #define HWRM_NVM_GET_DEV_INFO (UINT32_C(0xfff6))
164 #define HWRM_NVM_ERASE_DIR_ENTRY (UINT32_C(0xfff7))
165 #define HWRM_NVM_MOD_DIR_ENTRY (UINT32_C(0xfff8))
166 #define HWRM_NVM_FIND_DIR_ENTRY (UINT32_C(0xfff9))
167 #define HWRM_NVM_GET_DIR_ENTRIES (UINT32_C(0xfffa))
168 #define HWRM_NVM_GET_DIR_INFO (UINT32_C(0xfffb))
169 #define HWRM_NVM_RAW_DUMP (UINT32_C(0xfffc))
170 #define HWRM_NVM_READ (UINT32_C(0xfffd))
171 #define HWRM_NVM_WRITE (UINT32_C(0xfffe))
172 #define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
175 * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
176 * specification describes the data structures used in Ethernet packet or RDMA
177 * message data transfers as well as an abstract interface for managing Ethernet
178 * NIC hardware resources.
180 /* Ethernet Data path Host Structures */
182 * Description: The following three sections document the host structures used
183 * between device and software drivers for communicating Ethernet packets.
185 /* BD Ring Structures */
187 * Description: This structure is used to inform the NIC of a location for and
188 * an aggregation buffer that will be used for packet data that is received. An
189 * aggregation buffer creates a different kind of completion operation for a
190 * packet where a variable number of BDs may be used to place the packet in the
191 * host. RX Rings that have aggregation buffers are known as aggregation rings
192 * and must contain only aggregation buffers.
194 /* Short TX BD (16 bytes) */
198 * All bits in this field must be valid on the first BD of a
199 * packet. Only the packet_end bit must be valid for the
200 * remaining BDs of a packet.
202 /* This value identifies the type of buffer descriptor. */
203 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
204 #define TX_BD_SHORT_TYPE_SFT 0
206 * Indicates that this BD is 16B long and is
207 * used for normal L2 packet transmission.
209 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
211 * If set to 1, the packet ends with the data in the buffer
212 * pointed to by this descriptor. This flag must be valid on
215 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
217 * If set to 1, the device will not generate a completion for
218 * this transmit packet unless there is an error in it's
219 * processing. If this bit is set to 0, then the packet will be
220 * completed normally. This bit must be valid only on the first
223 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
225 * This value indicates how many 16B BD locations are consumed
226 * in the ring by this packet. A value of 1 indicates that this
227 * BD is the only BD (and that the it is a short BD). A value of
228 * 3 indicates either 3 short BDs or 1 long BD and one short BD
229 * in the packet. A value of 0 indicates that there are 32 BD
230 * locations in the packet (the maximum). This field is valid
231 * only on the first BD of a packet.
233 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
234 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
236 * This value is a hint for the length of the entire packet. It
237 * is used by the chip to optimize internal processing. The
238 * packet will be dropped if the hint is too short. This field
239 * is valid only on the first BD of a packet.
241 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
242 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
243 /* indicates packet length < 512B */
244 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
245 /* indicates 512 <= packet length < 1KB */
246 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
247 /* indicates 1KB <= packet length < 2KB */
248 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
249 /* indicates packet length >= 2KB */
250 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
251 #define TX_BD_SHORT_FLAGS_LHINT_LAST \
252 TX_BD_SHORT_FLAGS_LHINT_GTE2K
254 * If set to 1, the device immediately updates the Send Consumer
255 * Index after the buffer associated with this descriptor has
256 * been transferred via DMA to NIC memory from host memory. An
257 * interrupt may or may not be generated according to the state
258 * of the interrupt avoidance mechanisms. If this bit is set to
259 * 0, then the Consumer Index is only updated as soon as one of
260 * the host interrupt coalescing conditions has been met. This
261 * bit must be valid on the first BD of a packet.
263 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
265 * All bits in this field must be valid on the first BD of a
266 * packet. Only the packet_end bit must be valid for the
267 * remaining BDs of a packet.
269 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
270 #define TX_BD_SHORT_FLAGS_SFT 6
273 * This is the length of the host physical buffer this BD
274 * describes in bytes. This field must be valid on all BDs of a
279 * The opaque data field is pass through to the completion and
280 * can be used for any data that the driver wants to associate
281 * with the transmit BD. This field must be valid on the first
286 * This is the host physical address for the portion of the
287 * packet described by this TX BD. This value must be valid on
288 * all BDs of a packet.
290 } __attribute__((packed));
292 /* Long TX BD (32 bytes split to 2 16-byte struct) */
296 * All bits in this field must be valid on the first BD of a
297 * packet. Only the packet_end bit must be valid for the
298 * remaining BDs of a packet.
300 /* This value identifies the type of buffer descriptor. */
301 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
302 #define TX_BD_LONG_TYPE_SFT 0
304 * Indicates that this BD is 32B long and is
305 * used for normal L2 packet transmission.
307 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
309 * If set to 1, the packet ends with the data in the buffer
310 * pointed to by this descriptor. This flag must be valid on
313 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
315 * If set to 1, the device will not generate a completion for
316 * this transmit packet unless there is an error in it's
317 * processing. If this bit is set to 0, then the packet will be
318 * completed normally. This bit must be valid only on the first
321 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
323 * This value indicates how many 16B BD locations are consumed
324 * in the ring by this packet. A value of 1 indicates that this
325 * BD is the only BD (and that the it is a short BD). A value of
326 * 3 indicates either 3 short BDs or 1 long BD and one short BD
327 * in the packet. A value of 0 indicates that there are 32 BD
328 * locations in the packet (the maximum). This field is valid
329 * only on the first BD of a packet.
331 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
332 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
334 * This value is a hint for the length of the entire packet. It
335 * is used by the chip to optimize internal processing. The
336 * packet will be dropped if the hint is too short. This field
337 * is valid only on the first BD of a packet.
339 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
340 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
341 /* indicates packet length < 512B */
342 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
343 /* indicates 512 <= packet length < 1KB */
344 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
345 /* indicates 1KB <= packet length < 2KB */
346 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
347 /* indicates packet length >= 2KB */
348 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
349 #define TX_BD_LONG_FLAGS_LHINT_LAST \
350 TX_BD_LONG_FLAGS_LHINT_GTE2K
352 * If set to 1, the device immediately updates the Send Consumer
353 * Index after the buffer associated with this descriptor has
354 * been transferred via DMA to NIC memory from host memory. An
355 * interrupt may or may not be generated according to the state
356 * of the interrupt avoidance mechanisms. If this bit is set to
357 * 0, then the Consumer Index is only updated as soon as one of
358 * the host interrupt coalescing conditions has been met. This
359 * bit must be valid on the first BD of a packet.
361 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
363 * All bits in this field must be valid on the first BD of a
364 * packet. Only the packet_end bit must be valid for the
365 * remaining BDs of a packet.
367 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
368 #define TX_BD_LONG_FLAGS_SFT 6
371 * This is the length of the host physical buffer this BD
372 * describes in bytes. This field must be valid on all BDs of a
377 * The opaque data field is pass through to the completion and
378 * can be used for any data that the driver wants to associate
379 * with the transmit BD. This field must be valid on the first
384 * This is the host physical address for the portion of the
385 * packet described by this TX BD. This value must be valid on
386 * all BDs of a packet.
388 } __attribute__((packed));
390 /* last 16 bytes of Long TX BD */
391 struct tx_bd_long_hi {
394 * All bits in this field must be valid on the first BD of a
395 * packet. Their value on other BDs of the packet will be
399 * If set to 1, the controller replaces the TCP/UPD checksum
400 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
401 * checksum field of the encapsulated TCP/UDP packets with the
402 * hardware calculated TCP/UDP checksum for the packet
403 * associated with this descriptor. The flag is ignored if the
404 * LSO flag is set. This bit must be valid on the first BD of a
407 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
409 * If set to 1, the controller replaces the IP checksum of the
410 * normal packets, or the inner IP checksum of the encapsulated
411 * packets with the hardware calculated IP checksum for the
412 * packet associated with this descriptor. This bit must be
413 * valid on the first BD of a packet.
415 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
417 * If set to 1, the controller will not append an Ethernet CRC
418 * to the end of the frame. This bit must be valid on the first
419 * BD of a packet. Packet must be 64B or longer when this flag
420 * is set. It is not useful to use this bit with any form of TX
421 * offload such as CSO or LSO. The intent is that the packet
422 * from the host already has a valid Ethernet CRC on the packet.
424 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
426 * If set to 1, the device will record the time at which the
427 * packet was actually transmitted at the TX MAC. This bit must
428 * be valid on the first BD of a packet.
430 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
432 * If set to 1, The controller replaces the tunnel IP checksum
433 * field with hardware calculated IP checksum for the IP header
434 * of the packet associated with this descriptor. For outer UDP
435 * checksum, global outer UDP checksum TE_NIC register needs to
436 * be enabled. If the global outer UDP checksum TE_NIC register
437 * bit is set, outer UDP checksum will be calculated for the
438 * following cases: 1. Packets with tcp_udp_chksum flag set to
439 * offload checksum for inner packet AND the inner packet is
440 * TCP/UDP. If the inner packet is ICMP for example (non-
441 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
442 * checksum will not be calculated. 2. Packets with lso flag set
443 * which implies inner TCP checksum calculation as part of LSO
446 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
448 * If set to 1, the device will treat this packet with LSO(Large
449 * Send Offload) processing for both normal or encapsulated
450 * packets, which is a form of TCP segmentation. When this bit
451 * is 1, the hdr_size and mss fields must be valid. The driver
452 * doesn't need to set t_ip_chksum, ip_chksum, and
453 * tcp_udp_chksum flags since the controller will replace the
454 * appropriate checksum fields for segmented packets. When this
455 * bit is 1, the hdr_size and mss fields must be valid.
457 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
459 * If set to zero when LSO is '1', then the IPID will be treated
460 * as a 16b number and will be wrapped if it exceeds a value of
461 * 0xffff. If set to one when LSO is '1', then the IPID will be
462 * treated as a 15b number and will be wrapped if it exceeds a
465 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
467 * If set to zero when LSO is '1', then the IPID of the tunnel
468 * IP header will not be modified during LSO operations. If set
469 * to one when LSO is '1', then the IPID of the tunnel IP header
470 * will be incremented for each subsequent segment of an LSO
471 * operation. The flag is ignored if the LSO packet is a normal
472 * (non-tunneled) TCP packet.
474 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
476 * If set to '1', then the RoCE ICRC will be appended to the
477 * packet. Packet must be a valid RoCE format packet.
479 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
481 * If set to '1', then the FCoE CRC will be appended to the
482 * packet. Packet must be a valid FCoE format packet.
484 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
487 * When LSO is '1', this field must contain the offset of the
488 * TCP payload from the beginning of the packet in as 16b words.
489 * In case of encapsulated/tunneling packet, this field contains
490 * the offset of the inner TCP payload from beginning of the
491 * packet as 16-bit words. This value must be valid on the first
494 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
495 #define TX_BD_LONG_HDR_SIZE_SFT 0
498 * This is the MSS value that will be used to do the LSO
499 * processing. The value is the length in bytes of the TCP
500 * payload for each segment generated by the LSO operation. This
501 * value must be valid on the first BD of a packet.
503 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
504 #define TX_BD_LONG_MSS_SFT 0
508 * This value selects a CFA action to perform on the packet. Set
509 * this value to zero if no CFA action is desired. This value
510 * must be valid on the first BD of a packet.
514 * This value is action meta-data that defines CFA edit
515 * operations that are done in addition to any action editing.
517 /* When key=1, This is the VLAN tag VID value. */
518 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
519 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
520 /* When key=1, This is the VLAN tag DE value. */
521 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
522 /* When key=1, This is the VLAN tag PRI value. */
523 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
524 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
525 /* When key=1, This is the VLAN tag TPID select value. */
526 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
527 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
529 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
531 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
533 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
535 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
537 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
538 /* Value programmed in CFA VLANTPID register. */
539 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
540 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
541 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
542 /* When key=1, This is the VLAN tag TPID select value. */
543 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
544 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
546 * This field identifies the type of edit to be performed on the
547 * packet. This value must be valid on the first BD of a packet.
549 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
550 #define TX_BD_LONG_CFA_META_KEY_SFT 28
552 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
554 * - meta[17:16] - TPID select value (0 =
555 * 0x8100). - meta[15:12] - PRI/DE value. -
556 * meta[11:0] - VID value.
558 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
559 #define TX_BD_LONG_CFA_META_KEY_LAST \
560 TX_BD_LONG_CFA_META_KEY_VLAN_TAG
561 } __attribute__((packed));
563 /* RX Producer Packet BD (16 bytes) */
564 struct rx_prod_pkt_bd {
566 /* This value identifies the type of buffer descriptor. */
567 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
568 #define RX_PROD_PKT_BD_TYPE_SFT 0
570 * Indicates that this BD is 16B long and is an
571 * RX Producer (ie. empty) buffer descriptor.
573 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
575 * If set to 1, the packet will be placed at the address plus
576 * 2B. The 2 Bytes of padding will be written as zero.
579 * This is intended to be used when the host buffer is cache-
580 * line aligned to produce packets that are easy to parse in
581 * host memory while still allowing writes to be cache line
584 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
586 * If set to 1, the packet write will be padded out to the
587 * nearest cache-line with zero value padding.
590 * If receive buffers start/end on cache-line boundaries, this
591 * feature will ensure that all data writes on the PCI bus
592 * start/end on cache line boundaries.
594 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
596 * This value is the number of additional buffers in the ring
597 * that describe the buffer space to be consumed for the this
598 * packet. If the value is zero, then the packet must fit within
599 * the space described by this BD. If this value is 1 or more,
600 * it indicates how many additional "buffer" BDs are in the ring
601 * immediately following this BD to be used for the same network
602 * packet. Even if the packet to be placed does not need all the
603 * additional buffers, they will be consumed anyway.
605 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
606 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
607 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
608 #define RX_PROD_PKT_BD_FLAGS_SFT 6
611 * This is the length in Bytes of the host physical buffer where
612 * data for the packet may be placed in host memory.
615 * While this is a Byte resolution value, it is often
616 * advantageous to ensure that the buffers provided end on a
621 * The opaque data field is pass through to the completion and
622 * can be used for any data that the driver wants to associate
623 * with this receive buffer set.
627 * This is the host physical address where data for the packet
628 * may by placed in host memory.
631 * While this is a Byte resolution value, it is often
632 * advantageous to ensure that the buffers provide start on a
635 } __attribute__((packed));
637 /* Completion Ring Structures */
638 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
639 /* Base Completion Record (16 bytes) */
644 * This field indicates the exact type of the completion. By
645 * convention, the LSB identifies the length of the record in
646 * 16B units. Even values indicate 16B records. Odd values
647 * indicate 32B records.
649 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
650 #define CMPL_BASE_TYPE_SFT 0
651 /* TX L2 completion: Completion of TX packet. Length = 16B */
652 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
654 * RX L2 completion: Completion of and L2 RX
655 * packet. Length = 32B
657 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
659 * RX Aggregation Buffer completion : Completion
660 * of an L2 aggregation buffer in support of
661 * TPA, HDS, or Jumbo packet completion. Length
664 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
666 * RX L2 TPA Start Completion: Completion at the
667 * beginning of a TPA operation. Length = 32B
669 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
671 * RX L2 TPA End Completion: Completion at the
672 * end of a TPA operation. Length = 32B
674 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
676 * Statistics Ejection Completion: Completion of
677 * statistics data ejection buffer. Length = 16B
679 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
680 /* HWRM Command Completion: Completion of an HWRM command. */
681 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
682 /* Forwarded HWRM Request */
683 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
684 /* Forwarded HWRM Response */
685 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
686 /* HWRM Asynchronous Event Information */
687 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
688 /* CQ Notification */
689 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
690 /* SRQ Threshold Event */
691 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
692 /* DBQ Threshold Event */
693 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
694 /* QP Async Notification */
695 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
696 /* Function Async Notification */
697 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
706 * This value is written by the NIC such that it will be
707 * different for each pass through the completion queue. The
708 * even passes will write 1. The odd passes will write 0.
710 #define CMPL_BASE_V UINT32_C(0x1)
712 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
713 #define CMPL_BASE_INFO3_SFT 1
716 } __attribute__((packed));
718 /* TX Completion Record (16 bytes) */
722 * This field indicates the exact type of the completion. By
723 * convention, the LSB identifies the length of the record in
724 * 16B units. Even values indicate 16B records. Odd values
725 * indicate 32B records.
727 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
728 #define TX_CMPL_TYPE_SFT 0
729 /* TX L2 completion: Completion of TX packet. Length = 16B */
730 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
732 * When this bit is '1', it indicates a packet that has an error
733 * of some type. Type of error is indicated in error_flags.
735 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
737 * When this bit is '1', it indicates that the packet completed
738 * was transmitted using the push acceleration data provided by
739 * the driver. When this bit is '0', it indicates that the
740 * packet had not push acceleration data written or was executed
741 * as a normal packet even though push data was provided.
743 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
744 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
745 #define TX_CMPL_FLAGS_SFT 6
747 /* unused1 is 16 b */
750 * This is a copy of the opaque field from the first TX BD of
751 * this transmitted packet.
755 * This value is written by the NIC such that it will be
756 * different for each pass through the completion queue. The
757 * even passes will write 1. The odd passes will write 0.
759 #define TX_CMPL_V UINT32_C(0x1)
761 * This error indicates that there was some sort of problem with
762 * the BDs for the packet.
764 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
765 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
767 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
768 /* Bad Format: BDs were not formatted correctly. */
769 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
770 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
771 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
773 * When this bit is '1', it indicates that the length of the
774 * packet was zero. No packet was transmitted.
776 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
778 * When this bit is '1', it indicates that the packet was longer
779 * than the programmed limit in TDI. No packet was transmitted.
781 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
783 * When this bit is '1', it indicates that one or more of the
784 * BDs associated with this packet generated a PCI error. This
785 * probably means the address was not valid.
787 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
789 * When this bit is '1', it indicates that the packet was longer
790 * than indicated by the hint. No packet was transmitted.
792 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
794 * When this bit is '1', it indicates that the packet was
795 * dropped due to Poison TLP error on one or more of the TLPs in
796 * the PXP completion.
798 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
799 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
800 #define TX_CMPL_ERRORS_SFT 1
802 /* unused2 is 16 b */
804 /* unused3 is 32 b */
805 } __attribute__((packed));
807 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
811 * This field indicates the exact type of the completion. By
812 * convention, the LSB identifies the length of the record in
813 * 16B units. Even values indicate 16B records. Odd values
814 * indicate 32B records.
816 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
817 #define RX_PKT_CMPL_TYPE_SFT 0
819 * RX L2 completion: Completion of and L2 RX
820 * packet. Length = 32B
822 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
824 * When this bit is '1', it indicates a packet that has an error
825 * of some type. Type of error is indicated in error_flags.
827 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
828 /* This field indicates how the packet was placed in the buffer. */
829 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
830 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
831 /* Normal: Packet was placed using normal algorithm. */
832 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
833 /* Jumbo: Packet was placed using jumbo algorithm. */
834 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
836 * Header/Data Separation: Packet was placed
837 * using Header/Data separation algorithm. The
838 * separation location is indicated by the itype
841 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
842 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
843 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
844 /* This bit is '1' if the RSS field in this completion is valid. */
845 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
847 #define RX_PKT_CMPL_FLAGS_UNUSED UINT32_C(0x800)
849 * This value indicates what the inner packet determined for the
852 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
853 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
854 /* Not Known: Indicates that the packet type was not known. */
855 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
857 * IP Packet: Indicates that the packet was an
858 * IP packet, but further classification was not
861 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
863 * TCP Packet: Indicates that the packet was IP
864 * and TCP. This indicates that the
865 * payload_offset field is valid.
867 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
869 * UDP Packet: Indicates that the packet was IP
870 * and UDP. This indicates that the
871 * payload_offset field is valid.
873 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
875 * FCoE Packet: Indicates that the packet was
876 * recognized as a FCoE. This also indicates
877 * that the payload_offset field is valid.
879 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
881 * RoCE Packet: Indicates that the packet was
882 * recognized as a RoCE. This also indicates
883 * that the payload_offset field is valid.
885 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
887 * ICMP Packet: Indicates that the packet was
888 * recognized as ICMP. This indicates that the
889 * payload_offset field is valid.
891 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
893 * PtP packet wo/timestamp: Indicates that the
894 * packet was recognized as a PtP packet.
896 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
898 * PtP packet w/timestamp: Indicates that the
899 * packet was recognized as a PtP packet and
900 * that a timestamp was taken for the packet.
902 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
903 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
904 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
905 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
906 #define RX_PKT_CMPL_FLAGS_SFT 6
909 * This is the length of the data for the packet stored in the
910 * buffer(s) identified by the opaque value. This includes the
911 * packet BD and any associated buffer BDs. This does not
912 * include the the length of any data places in aggregation BDs.
916 * This is a copy of the opaque field from the RX BD this
917 * completion corresponds to.
922 * This value is written by the NIC such that it will be
923 * different for each pass through the completion queue. The
924 * even passes will write 1. The odd passes will write 0.
926 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
928 * This value is the number of aggregation buffers that follow
929 * this entry in the completion ring that are a part of this
930 * packet. If the value is zero, then the packet is completely
931 * contained in the buffer space provided for the packet in the
934 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
935 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
937 uint8_t rss_hash_type;
939 * This is the RSS hash type for the packet. The value is packed
940 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
941 * . The value of tuple_extrac_op provides the information about
942 * what fields the hash was computed on. * 0: The RSS hash was
943 * computed over source IP address, destination IP address,
944 * source port, and destination port of inner IP and TCP or UDP
945 * headers. Note: For non-tunneled packets, the packet headers
946 * are considered inner packet headers for the RSS hash
947 * computation purpose. * 1: The RSS hash was computed over
948 * source IP address and destination IP address of inner IP
949 * header. Note: For non-tunneled packets, the packet headers
950 * are considered inner packet headers for the RSS hash
951 * computation purpose. * 2: The RSS hash was computed over
952 * source IP address, destination IP address, source port, and
953 * destination port of IP and TCP or UDP headers of outer tunnel
954 * headers. Note: For non-tunneled packets, this value is not
955 * applicable. * 3: The RSS hash was computed over source IP
956 * address and destination IP address of IP header of outer
957 * tunnel headers. Note: For non-tunneled packets, this value is
958 * not applicable. Note that 4-tuples values listed above are
959 * applicable for layer 4 protocols supported and enabled for
960 * RSS in the hardware, HWRM firmware, and drivers. For example,
961 * if RSS hash is supported and enabled for TCP traffic only,
962 * then the values of tuple_extract_op corresponding to 4-tuples
963 * are only valid for TCP traffic.
965 uint8_t payload_offset;
967 * This value indicates the offset in bytes from the beginning
968 * of the packet where the inner payload starts. This value is
969 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
970 * indicates that header is 256B into the packet.
976 * This value is the RSS hash value calculated for the packet
977 * based on the mode bits and key value in the VNIC.
979 } __attribute__((packed));
981 /* last 16 bytes of RX Packet Completion Record */
982 struct rx_pkt_cmpl_hi {
985 * This indicates that the ip checksum was calculated for the
986 * inner packet and that the ip_cs_error field indicates if
987 * there was an error.
989 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
991 * This indicates that the TCP, UDP or ICMP checksum was
992 * calculated for the inner packet and that the l4_cs_error
993 * field indicates if there was an error.
995 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
997 * This indicates that the ip checksum was calculated for the
998 * tunnel header and that the t_ip_cs_error field indicates if
999 * there was an error.
1001 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1003 * This indicates that the UDP checksum was calculated for the
1004 * tunnel packet and that the t_l4_cs_error field indicates if
1005 * there was an error.
1007 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1008 /* This value indicates what format the metadata field is. */
1009 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1010 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
1011 /* No metadata informtaion. Value is zero. */
1012 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1014 * The metadata field contains the VLAN tag and
1015 * TPID value. - metadata[11:0] contains the
1016 * vlan VID value. - metadata[12] contains the
1017 * vlan DE value. - metadata[15:13] contains the
1018 * vlan PRI value. - metadata[31:16] contains
1019 * the vlan TPID value.
1021 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1022 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
1023 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
1025 * This field indicates the IP type for the inner-most IP
1026 * header. A value of '0' indicates IPv4. A value of '1'
1027 * indicates IPv6. This value is only valid if itype indicates a
1028 * packet with an IP header.
1030 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1033 * This is data from the CFA block as indicated by the
1034 * meta_format field.
1036 /* When meta_format=1, this value is the VLAN VID. */
1037 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1038 #define RX_PKT_CMPL_METADATA_VID_SFT 0
1039 /* When meta_format=1, this value is the VLAN DE. */
1040 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
1041 /* When meta_format=1, this value is the VLAN PRI. */
1042 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1043 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
1044 /* When meta_format=1, this value is the VLAN TPID. */
1045 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1046 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
1049 * This value is written by the NIC such that it will be
1050 * different for each pass through the completion queue. The
1051 * even passes will write 1. The odd passes will write 0.
1053 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
1055 * This error indicates that there was some sort of problem with
1056 * the BDs for the packet that was found after part of the
1057 * packet was already placed. The packet should be treated as
1060 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1061 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1062 /* No buffer error */
1063 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
1065 * Did Not Fit: Packet did not fit into packet
1066 * buffer provided. For regular placement, this
1067 * means the packet did not fit in the buffer
1068 * provided. For HDS and jumbo placement, this
1069 * means that the packet could not be placed
1070 * into 7 physical buffers or less.
1072 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
1073 (UINT32_C(0x1) << 1)
1075 * Not On Chip: All BDs needed for the packet
1076 * were not on-chip when the packet arrived.
1078 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1079 (UINT32_C(0x2) << 1)
1080 /* Bad Format: BDs were not formatted correctly. */
1081 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
1082 (UINT32_C(0x3) << 1)
1083 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1084 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1085 /* This indicates that there was an error in the IP header checksum. */
1086 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1088 * This indicates that there was an error in the TCP, UDP or
1091 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1093 * This indicates that there was an error in the tunnel IP
1096 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1098 * This indicates that there was an error in the tunnel UDP
1101 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1103 * This indicates that there was a CRC error on either an FCoE
1104 * or RoCE packet. The itype indicates the packet type.
1106 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1108 * This indicates that there was an error in the tunnel portion
1109 * of the packet when this field is non-zero.
1111 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1112 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1114 * No additional error occurred on the tunnel
1115 * portion of the packet of the packet does not
1118 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1120 * Indicates that IP header version does not
1121 * match expectation from L2 Ethertype for IPv4
1122 * and IPv6 in the tunnel header.
1124 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
1125 (UINT32_C(0x1) << 9)
1127 * Indicates that header length is out of range
1128 * in the tunnel header. Valid for IPv4.
1130 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
1131 (UINT32_C(0x2) << 9)
1133 * Indicates that the physical packet is shorter
1134 * than that claimed by the PPPoE header length
1135 * for a tunnel PPPoE packet.
1137 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
1138 (UINT32_C(0x3) << 9)
1140 * Indicates that physical packet is shorter
1141 * than that claimed by the tunnel l3 header
1142 * length. Valid for IPv4, or IPv6 tunnel packet
1145 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1146 (UINT32_C(0x4) << 9)
1148 * Indicates that the physical packet is shorter
1149 * than that claimed by the tunnel UDP header
1150 * length for a tunnel UDP packet that is not
1153 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1154 (UINT32_C(0x5) << 9)
1156 * indicates that the IPv4 TTL or IPv6 hop limit
1157 * check have failed (e.g. TTL = 0) in the
1158 * tunnel header. Valid for IPv4, and IPv6.
1160 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1161 (UINT32_C(0x6) << 9)
1162 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1163 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1165 * This indicates that there was an error in the inner portion
1166 * of the packet when this field is non-zero.
1168 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1169 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1171 * No additional error occurred on the tunnel
1172 * portion of the packet of the packet does not
1175 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1177 * Indicates that IP header version does not
1178 * match expectation from L2 Ethertype for IPv4
1179 * and IPv6 or that option other than VFT was
1180 * parsed on FCoE packet.
1182 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1183 (UINT32_C(0x1) << 12)
1185 * indicates that header length is out of range.
1186 * Valid for IPv4 and RoCE
1188 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1189 (UINT32_C(0x2) << 12)
1191 * indicates that the IPv4 TTL or IPv6 hop limit
1192 * check have failed (e.g. TTL = 0). Valid for
1195 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1197 * Indicates that physical packet is shorter
1198 * than that claimed by the l3 header length.
1199 * Valid for IPv4, IPv6 packet or RoCE packets.
1201 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1202 (UINT32_C(0x4) << 12)
1204 * Indicates that the physical packet is shorter
1205 * than that claimed by the UDP header length
1206 * for a UDP packet that is not fragmented.
1208 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1209 (UINT32_C(0x5) << 12)
1211 * Indicates that TCP header length > IP
1212 * payload. Valid for TCP packets only.
1214 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1215 (UINT32_C(0x6) << 12)
1216 /* Indicates that TCP header length < 5. Valid for TCP. */
1217 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1218 (UINT32_C(0x7) << 12)
1220 * Indicates that TCP option headers result in a
1221 * TCP header size that does not match data
1222 * offset in TCP header. Valid for TCP.
1224 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1225 (UINT32_C(0x8) << 12)
1226 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1227 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1228 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1229 #define RX_PKT_CMPL_ERRORS_SFT 1
1232 * This field identifies the CFA action rule that was used for
1237 * This value holds the reordering sequence number for the
1238 * packet. If the reordering sequence is not valid, then this
1239 * value is zero. The reordering domain for the packet is in the
1240 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1241 * value contain the ordering domain value for the packet.
1243 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1244 #define RX_PKT_CMPL_REORDER_SFT 0
1245 } __attribute__((packed));
1247 /* RX L2 TPA Start Completion Record (32 bytes split to 2 16-byte struct) */
1248 struct rx_tpa_start_cmpl {
1249 uint16_t flags_type;
1251 * This field indicates the exact type of the completion. By
1252 * convention, the LSB identifies the length of the record in
1253 * 16B units. Even values indicate 16B records. Odd values
1254 * indicate 32B records.
1256 #define RX_TPA_START_CMPL_TYPE_MASK UINT32_C(0x3f)
1257 #define RX_TPA_START_CMPL_TYPE_SFT 0
1259 * RX L2 TPA Start Completion: Completion at the
1260 * beginning of a TPA operation. Length = 32B
1262 #define RX_TPA_START_CMPL_TYPE_RX_TPA_START UINT32_C(0x13)
1263 /* This bit will always be '0' for TPA start completions. */
1264 #define RX_TPA_START_CMPL_FLAGS_ERROR UINT32_C(0x40)
1265 /* This field indicates how the packet was placed in the buffer. */
1266 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1267 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_SFT 7
1269 * Jumbo: TPA Packet was placed using jumbo
1270 * algorithm. This means that the first buffer
1271 * will be filled with data before moving to
1272 * aggregation buffers. Each aggregation buffer
1273 * will be filled before moving to the next
1274 * aggregation buffer.
1276 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1278 * Header/Data Separation: Packet was placed
1279 * using Header/Data separation algorithm. The
1280 * separation location is indicated by the itype
1283 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1285 * GRO/Jumbo: Packet will be placed using
1286 * GRO/Jumbo where the first packet is filled
1287 * with data. Subsequent packets will be placed
1288 * such that any one packet does not span two
1289 * aggregation buffers unless it starts at the
1290 * beginning of an aggregation buffer.
1292 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_JUMBO \
1293 (UINT32_C(0x5) << 7)
1295 * GRO/Header-Data Separation: Packet will be
1296 * placed using GRO/HDS where the header is in
1297 * the first packet. Payload of each packet will
1298 * be placed such that any one packet does not
1299 * span two aggregation buffers unless it starts
1300 * at the beginning of an aggregation buffer.
1302 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1303 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_LAST \
1304 RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS
1305 /* This bit is '1' if the RSS field in this completion is valid. */
1306 #define RX_TPA_START_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
1308 #define RX_TPA_START_CMPL_FLAGS_UNUSED UINT32_C(0x800)
1310 * This value indicates what the inner packet determined for the
1313 #define RX_TPA_START_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1314 #define RX_TPA_START_CMPL_FLAGS_ITYPE_SFT 12
1315 /* TCP Packet: Indicates that the packet was IP and TCP. */
1316 #define RX_TPA_START_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
1317 #define RX_TPA_START_CMPL_FLAGS_ITYPE_LAST \
1318 RX_TPA_START_CMPL_FLAGS_ITYPE_TCP
1319 #define RX_TPA_START_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1320 #define RX_TPA_START_CMPL_FLAGS_SFT 6
1323 * This value indicates the amount of packet data written to the
1324 * buffer the opaque field in this completion corresponds to.
1328 * This is a copy of the opaque field from the RX BD this
1329 * completion corresponds to.
1332 /* unused1 is 7 b */
1334 * This value is written by the NIC such that it will be
1335 * different for each pass through the completion queue. The
1336 * even passes will write 1. The odd passes will write 0.
1338 #define RX_TPA_START_CMPL_V1 UINT32_C(0x1)
1339 /* unused1 is 7 b */
1340 uint8_t rss_hash_type;
1342 * This is the RSS hash type for the packet. The value is packed
1343 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
1344 * . The value of tuple_extrac_op provides the information about
1345 * what fields the hash was computed on. * 0: The RSS hash was
1346 * computed over source IP address, destination IP address,
1347 * source port, and destination port of inner IP and TCP or UDP
1348 * headers. Note: For non-tunneled packets, the packet headers
1349 * are considered inner packet headers for the RSS hash
1350 * computation purpose. * 1: The RSS hash was computed over
1351 * source IP address and destination IP address of inner IP
1352 * header. Note: For non-tunneled packets, the packet headers
1353 * are considered inner packet headers for the RSS hash
1354 * computation purpose. * 2: The RSS hash was computed over
1355 * source IP address, destination IP address, source port, and
1356 * destination port of IP and TCP or UDP headers of outer tunnel
1357 * headers. Note: For non-tunneled packets, this value is not
1358 * applicable. * 3: The RSS hash was computed over source IP
1359 * address and destination IP address of IP header of outer
1360 * tunnel headers. Note: For non-tunneled packets, this value is
1361 * not applicable. Note that 4-tuples values listed above are
1362 * applicable for layer 4 protocols supported and enabled for
1363 * RSS in the hardware, HWRM firmware, and drivers. For example,
1364 * if RSS hash is supported and enabled for TCP traffic only,
1365 * then the values of tuple_extract_op corresponding to 4-tuples
1366 * are only valid for TCP traffic.
1370 * This is the aggregation ID that the completion is associated
1371 * with. Use this number to correlate the TPA start completion
1372 * with the TPA end completion.
1374 /* unused2 is 9 b */
1376 * This is the aggregation ID that the completion is associated
1377 * with. Use this number to correlate the TPA start completion
1378 * with the TPA end completion.
1380 #define RX_TPA_START_CMPL_AGG_ID_MASK UINT32_C(0xfe00)
1381 #define RX_TPA_START_CMPL_AGG_ID_SFT 9
1384 * This value is the RSS hash value calculated for the packet
1385 * based on the mode bits and key value in the VNIC.
1387 } __attribute__((packed));
1389 /* last 16 bytes of RX L2 TPA Start Completion Record */
1390 struct rx_tpa_start_cmpl_hi {
1393 * This indicates that the ip checksum was calculated for the
1394 * inner packet and that the sum passed for all segments
1395 * included in the aggregation.
1397 #define RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
1399 * This indicates that the TCP, UDP or ICMP checksum was
1400 * calculated for the inner packet and that the sum passed for
1401 * all segments included in the aggregation.
1403 #define RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
1405 * This indicates that the ip checksum was calculated for the
1406 * tunnel header and that the sum passed for all segments
1407 * included in the aggregation.
1409 #define RX_TPA_START_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1411 * This indicates that the UDP checksum was calculated for the
1412 * tunnel packet and that the sum passed for all segments
1413 * included in the aggregation.
1415 #define RX_TPA_START_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1416 /* This value indicates what format the metadata field is. */
1417 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1418 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
1419 /* No metadata informtaion. Value is zero. */
1420 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1422 * The metadata field contains the VLAN tag and
1423 * TPID value. - metadata[11:0] contains the
1424 * vlan VID value. - metadata[12] contains the
1425 * vlan DE value. - metadata[15:13] contains the
1426 * vlan PRI value. - metadata[31:16] contains
1427 * the vlan TPID value.
1429 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1430 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_LAST \
1431 RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN
1433 * This field indicates the IP type for the inner-most IP
1434 * header. A value of '0' indicates IPv4. A value of '1'
1437 #define RX_TPA_START_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1440 * This is data from the CFA block as indicated by the
1441 * meta_format field.
1443 /* When meta_format=1, this value is the VLAN VID. */
1444 #define RX_TPA_START_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1445 #define RX_TPA_START_CMPL_METADATA_VID_SFT 0
1446 /* When meta_format=1, this value is the VLAN DE. */
1447 #define RX_TPA_START_CMPL_METADATA_DE UINT32_C(0x1000)
1448 /* When meta_format=1, this value is the VLAN PRI. */
1449 #define RX_TPA_START_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1450 #define RX_TPA_START_CMPL_METADATA_PRI_SFT 13
1451 /* When meta_format=1, this value is the VLAN TPID. */
1452 #define RX_TPA_START_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1453 #define RX_TPA_START_CMPL_METADATA_TPID_SFT 16
1455 /* unused4 is 15 b */
1457 * This value is written by the NIC such that it will be
1458 * different for each pass through the completion queue. The
1459 * even passes will write 1. The odd passes will write 0.
1461 #define RX_TPA_START_CMPL_V2 UINT32_C(0x1)
1462 /* unused4 is 15 b */
1465 * This field identifies the CFA action rule that was used for
1468 uint32_t inner_l4_size_inner_l3_offset_inner_l2_offset_outer_l3_offset;
1470 * This is the size in bytes of the inner most L4 header. This
1471 * can be subtracted from the payload_offset to determine the
1472 * start of the inner most L4 header.
1475 * This is the offset from the beginning of the packet in bytes
1476 * for the outer L3 header. If there is no outer L3 header, then
1477 * this value is zero.
1479 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_MASK UINT32_C(0x1ff)
1480 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_SFT 0
1482 * This is the offset from the beginning of the packet in bytes
1483 * for the inner most L2 header.
1485 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_MASK UINT32_C(0x3fe00)
1486 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_SFT 9
1488 * This is the offset from the beginning of the packet in bytes
1489 * for the inner most L3 header.
1491 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_MASK UINT32_C(0x7fc0000)
1492 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_SFT 18
1494 * This is the size in bytes of the inner most L4 header. This
1495 * can be subtracted from the payload_offset to determine the
1496 * start of the inner most L4 header.
1498 #define RX_TPA_START_CMPL_INNER_L4_SIZE_MASK UINT32_C(0xf8000000)
1499 #define RX_TPA_START_CMPL_INNER_L4_SIZE_SFT 27
1500 } __attribute__((packed));
1502 /* RX TPA End Completion Record (32 bytes split to 2 16-byte struct) */
1503 struct rx_tpa_end_cmpl {
1504 uint16_t flags_type;
1506 * This field indicates the exact type of the completion. By
1507 * convention, the LSB identifies the length of the record in
1508 * 16B units. Even values indicate 16B records. Odd values
1509 * indicate 32B records.
1511 #define RX_TPA_END_CMPL_TYPE_MASK UINT32_C(0x3f)
1512 #define RX_TPA_END_CMPL_TYPE_SFT 0
1514 * RX L2 TPA End Completion: Completion at the
1515 * end of a TPA operation. Length = 32B
1517 #define RX_TPA_END_CMPL_TYPE_RX_TPA_END UINT32_C(0x15)
1519 * When this bit is '1', it indicates a packet that has an error
1520 * of some type. Type of error is indicated in error_flags.
1522 #define RX_TPA_END_CMPL_FLAGS_ERROR UINT32_C(0x40)
1523 /* This field indicates how the packet was placed in the buffer. */
1524 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1525 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_SFT 7
1527 * Jumbo: TPA Packet was placed using jumbo
1528 * algorithm. This means that the first buffer
1529 * will be filled with data before moving to
1530 * aggregation buffers. Each aggregation buffer
1531 * will be filled before moving to the next
1532 * aggregation buffer.
1534 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1536 * Header/Data Separation: Packet was placed
1537 * using Header/Data separation algorithm. The
1538 * separation location is indicated by the itype
1541 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1543 * GRO/Jumbo: Packet will be placed using
1544 * GRO/Jumbo where the first packet is filled
1545 * with data. Subsequent packets will be placed
1546 * such that any one packet does not span two
1547 * aggregation buffers unless it starts at the
1548 * beginning of an aggregation buffer.
1550 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1552 * GRO/Header-Data Separation: Packet will be
1553 * placed using GRO/HDS where the header is in
1554 * the first packet. Payload of each packet will
1555 * be placed such that any one packet does not
1556 * span two aggregation buffers unless it starts
1557 * at the beginning of an aggregation buffer.
1559 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1560 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_LAST \
1561 RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS
1563 #define RX_TPA_END_CMPL_FLAGS_UNUSED_MASK UINT32_C(0xc00)
1564 #define RX_TPA_END_CMPL_FLAGS_UNUSED_SFT 10
1566 * This value indicates what the inner packet determined for the
1567 * packet was. - 2 TCP Packet Indicates that the packet was IP
1568 * and TCP. This indicates that the ip_cs field is valid and
1569 * that the tcp_udp_cs field is valid and contains the TCP
1570 * checksum. This also indicates that the payload_offset field
1573 #define RX_TPA_END_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1574 #define RX_TPA_END_CMPL_FLAGS_ITYPE_SFT 12
1575 #define RX_TPA_END_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1576 #define RX_TPA_END_CMPL_FLAGS_SFT 6
1579 * This value is zero for TPA End completions. There is no data
1580 * in the buffer that corresponds to the opaque value in this
1585 * This is a copy of the opaque field from the RX BD this
1586 * completion corresponds to.
1588 uint8_t agg_bufs_v1;
1589 /* unused1 is 1 b */
1591 * This value is written by the NIC such that it will be
1592 * different for each pass through the completion queue. The
1593 * even passes will write 1. The odd passes will write 0.
1595 #define RX_TPA_END_CMPL_V1 UINT32_C(0x1)
1597 * This value is the number of aggregation buffers that follow
1598 * this entry in the completion ring that are a part of this
1599 * aggregation packet. If the value is zero, then the packet is
1600 * completely contained in the buffer space provided in the
1601 * aggregation start completion.
1603 #define RX_TPA_END_CMPL_AGG_BUFS_MASK UINT32_C(0x7e)
1604 #define RX_TPA_END_CMPL_AGG_BUFS_SFT 1
1605 /* unused1 is 1 b */
1607 /* This value is the number of segments in the TPA operation. */
1608 uint8_t payload_offset;
1610 * This value indicates the offset in bytes from the beginning
1611 * of the packet where the inner payload starts. This value is
1612 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
1613 * indicates an offset of 256 bytes.
1617 * This is the aggregation ID that the completion is associated
1618 * with. Use this number to correlate the TPA start completion
1619 * with the TPA end completion.
1621 /* unused2 is 1 b */
1623 * This is the aggregation ID that the completion is associated
1624 * with. Use this number to correlate the TPA start completion
1625 * with the TPA end completion.
1627 #define RX_TPA_END_CMPL_AGG_ID_MASK UINT32_C(0xfe)
1628 #define RX_TPA_END_CMPL_AGG_ID_SFT 1
1631 * For non-GRO packets, this value is the timestamp delta
1632 * between earliest and latest timestamp values for TPA packet.
1633 * If packets were not time stamped, then delta will be zero.
1634 * For GRO packets, this field is zero except for the following
1635 * sub-fields. - tsdelta[31] Timestamp present indication. When
1636 * '0', no Timestamp option is in the packet. When '1', then a
1637 * Timestamp option is present in the packet.
1639 } __attribute__((packed));
1641 /* last 16 bytes of RX TPA End Completion Record */
1642 struct rx_tpa_end_cmpl_hi {
1643 uint32_t tpa_dup_acks;
1644 /* unused3 is 28 b */
1646 * This value is the number of duplicate ACKs that have been
1647 * received as part of the TPA operation.
1649 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_MASK UINT32_C(0xf)
1650 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_SFT 0
1651 /* unused3 is 28 b */
1652 uint16_t tpa_seg_len;
1654 * This value is the valid when TPA completion is active. It
1655 * indicates the length of the longest segment of the TPA
1656 * operation for LRO mode and the length of the first segment in
1657 * GRO mode. This value may be used by GRO software to re-
1658 * construct the original packet stream from the TPA packet.
1659 * This is the length of all but the last segment for GRO. In
1660 * LRO mode this value may be used to indicate MSS size to the
1664 /* unused4 is 16 b */
1667 * This value is written by the NIC such that it will be
1668 * different for each pass through the completion queue. The
1669 * even passes will write 1. The odd passes will write 0.
1671 #define RX_TPA_END_CMPL_V2 UINT32_C(0x1)
1673 * This error indicates that there was some sort of problem with
1674 * the BDs for the packet that was found after part of the
1675 * packet was already placed. The packet should be treated as
1678 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1679 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1681 * This error occurs when there is a fatal HW
1682 * problem in the chip only. It indicates that
1683 * there were not BDs on chip but that there was
1684 * adequate reservation. provided by the TPA
1687 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1688 (UINT32_C(0x2) << 1)
1690 * This error occurs when TPA block was not
1691 * configured to reserve adequate BDs for TPA
1692 * operations on this RX ring. All data for the
1693 * TPA operation was not placed. This error can
1694 * also be generated when the number of segments
1695 * is not programmed correctly in TPA and the 33
1696 * total aggregation buffers allowed for the TPA
1697 * operation has been exceeded.
1699 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR \
1700 (UINT32_C(0x4) << 1)
1701 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_LAST \
1702 RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR
1703 #define RX_TPA_END_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1704 #define RX_TPA_END_CMPL_ERRORS_SFT 1
1706 /* unused5 is 16 b */
1707 uint32_t start_opaque;
1709 * This is the opaque value that was completed for the TPA start
1710 * completion that corresponds to this TPA end completion.
1712 } __attribute__((packed));
1714 /* HWRM Forwarded Request (16 bytes) */
1715 struct hwrm_fwd_req_cmpl {
1716 uint16_t req_len_type;
1717 /* Length of forwarded request in bytes. */
1719 * This field indicates the exact type of the completion. By
1720 * convention, the LSB identifies the length of the record in
1721 * 16B units. Even values indicate 16B records. Odd values
1722 * indicate 32B records.
1724 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1725 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1726 /* Forwarded HWRM Request */
1727 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1728 /* Length of forwarded request in bytes. */
1729 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1730 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1733 * Source ID of this request. Typically used in forwarding
1734 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1735 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1739 /* unused1 is 32 b */
1740 uint32_t req_buf_addr_v[2];
1741 /* Address of forwarded request. */
1743 * This value is written by the NIC such that it will be
1744 * different for each pass through the completion queue. The
1745 * even passes will write 1. The odd passes will write 0.
1747 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1748 /* Address of forwarded request. */
1749 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1750 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1751 } __attribute__((packed));
1753 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1754 struct hwrm_async_event_cmpl {
1756 /* unused1 is 10 b */
1758 * This field indicates the exact type of the completion. By
1759 * convention, the LSB identifies the length of the record in
1760 * 16B units. Even values indicate 16B records. Odd values
1761 * indicate 32B records.
1763 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1764 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1765 /* HWRM Asynchronous Event Information */
1766 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1767 /* unused1 is 10 b */
1769 /* Identifiers of events. */
1770 /* Link status changed */
1771 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1772 /* Link MTU changed */
1773 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1774 /* Link speed changed */
1775 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1776 /* DCB Configuration changed */
1777 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1778 /* Port connection not allowed */
1779 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1780 /* Link speed configuration was not allowed */
1781 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1783 /* Link speed configuration change */
1784 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1785 /* Port PHY configuration change */
1786 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1787 /* Function driver unloaded */
1788 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1789 /* Function driver loaded */
1790 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1791 /* Function FLR related processing has completed */
1792 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1793 /* PF driver unloaded */
1794 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1795 /* PF driver loaded */
1796 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1797 /* VF Function Level Reset (FLR) */
1798 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1799 /* VF MAC Address Change */
1800 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1801 /* PF-VF communication channel status change. */
1802 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1804 /* VF Configuration Change */
1805 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1806 /* LLFC/PFC Configuration Change */
1807 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LLFC_PFC_CHANGE UINT32_C(0x34)
1809 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1810 uint32_t event_data2;
1811 /* Event specific data */
1815 * This value is written by the NIC such that it will be
1816 * different for each pass through the completion queue. The
1817 * even passes will write 1. The odd passes will write 0.
1819 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1821 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1822 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1823 uint8_t timestamp_lo;
1824 /* 8-lsb timestamp from POR (100-msec resolution) */
1825 uint16_t timestamp_hi;
1826 /* 16-lsb timestamp from POR (100-msec resolution) */
1827 uint32_t event_data1;
1828 /* Event specific data */
1829 } __attribute__((packed));
1833 * Description: This function is called by a driver to determine the HWRM
1834 * interface version supported by the HWRM firmware, the version of HWRM
1835 * firmware implementation, the name of HWRM firmware, the versions of other
1836 * embedded firmwares, and the names of other embedded firmwares, etc. Any
1837 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
1838 * be considered an invalid version.
1840 /* Input (24 bytes) */
1841 struct hwrm_ver_get_input {
1844 * This value indicates what type of request this is. The format
1845 * for the rest of the command is determined by this field.
1849 * This value indicates the what completion ring the request
1850 * will be optionally completed on. If the value is -1, then no
1851 * CR completion will be generated. Any other value must be a
1852 * valid CR ring_id value for this function.
1855 /* This value indicates the command sequence number. */
1858 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1859 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1864 * This is the host address where the response will be written
1865 * when the request is complete. This area must be 16B aligned
1866 * and must be cleared to zero before the request is made.
1868 uint8_t hwrm_intf_maj;
1870 * This field represents the major version of HWRM interface
1871 * specification supported by the driver HWRM implementation.
1872 * The interface major version is intended to change only when
1873 * non backward compatible changes are made to the HWRM
1874 * interface specification.
1876 uint8_t hwrm_intf_min;
1878 * This field represents the minor version of HWRM interface
1879 * specification supported by the driver HWRM implementation. A
1880 * change in interface minor version is used to reflect
1881 * significant backward compatible modification to HWRM
1882 * interface specification. This can be due to addition or
1883 * removal of functionality. HWRM interface specifications with
1884 * the same major version but different minor versions are
1887 uint8_t hwrm_intf_upd;
1889 * This field represents the update version of HWRM interface
1890 * specification supported by the driver HWRM implementation.
1891 * The interface update version is used to reflect minor changes
1892 * or bug fixes to a released HWRM interface specification.
1894 uint8_t unused_0[5];
1895 } __attribute__((packed));
1897 /* Output (128 bytes) */
1898 struct hwrm_ver_get_output {
1899 uint16_t error_code;
1901 * Pass/Fail or error type Note: receiver to verify the in
1902 * parameters, and fail the call with an error when appropriate
1905 /* This field returns the type of original request. */
1907 /* This field provides original sequence number of the command. */
1910 * This field is the length of the response in bytes. The last
1911 * byte of the response is a valid flag that will read as '1'
1912 * when the command has been completely written to memory.
1914 uint8_t hwrm_intf_maj;
1916 * This field represents the major version of HWRM interface
1917 * specification supported by the HWRM implementation. The
1918 * interface major version is intended to change only when non
1919 * backward compatible changes are made to the HWRM interface
1920 * specification. A HWRM implementation that is compliant with
1921 * this specification shall provide value of 1 in this field.
1923 uint8_t hwrm_intf_min;
1925 * This field represents the minor version of HWRM interface
1926 * specification supported by the HWRM implementation. A change
1927 * in interface minor version is used to reflect significant
1928 * backward compatible modification to HWRM interface
1929 * specification. This can be due to addition or removal of
1930 * functionality. HWRM interface specifications with the same
1931 * major version but different minor versions are compatible. A
1932 * HWRM implementation that is compliant with this specification
1933 * shall provide value of 2 in this field.
1935 uint8_t hwrm_intf_upd;
1937 * This field represents the update version of HWRM interface
1938 * specification supported by the HWRM implementation. The
1939 * interface update version is used to reflect minor changes or
1940 * bug fixes to a released HWRM interface specification. A HWRM
1941 * implementation that is compliant with this specification
1942 * shall provide value of 2 in this field.
1944 uint8_t hwrm_intf_rsvd;
1945 uint8_t hwrm_fw_maj;
1947 * This field represents the major version of HWRM firmware. A
1948 * change in firmware major version represents a major firmware
1951 uint8_t hwrm_fw_min;
1953 * This field represents the minor version of HWRM firmware. A
1954 * change in firmware minor version represents significant
1955 * firmware functionality changes.
1957 uint8_t hwrm_fw_bld;
1959 * This field represents the build version of HWRM firmware. A
1960 * change in firmware build version represents bug fixes to a
1961 * released firmware.
1963 uint8_t hwrm_fw_rsvd;
1965 * This field is a reserved field. This field can be used to
1966 * represent firmware branches or customer specific releases
1967 * tied to a specific (major,minor,update) version of the HWRM
1970 uint8_t mgmt_fw_maj;
1972 * This field represents the major version of mgmt firmware. A
1973 * change in major version represents a major release.
1975 uint8_t mgmt_fw_min;
1977 * This field represents the minor version of mgmt firmware. A
1978 * change in minor version represents significant functionality
1981 uint8_t mgmt_fw_bld;
1983 * This field represents the build version of mgmt firmware. A
1984 * change in update version represents bug fixes.
1986 uint8_t mgmt_fw_rsvd;
1988 * This field is a reserved field. This field can be used to
1989 * represent firmware branches or customer specific releases
1990 * tied to a specific (major,minor,update) version
1992 uint8_t netctrl_fw_maj;
1994 * This field represents the major version of network control
1995 * firmware. A change in major version represents a major
1998 uint8_t netctrl_fw_min;
2000 * This field represents the minor version of network control
2001 * firmware. A change in minor version represents significant
2002 * functionality changes.
2004 uint8_t netctrl_fw_bld;
2006 * This field represents the build version of network control
2007 * firmware. A change in update version represents bug fixes.
2009 uint8_t netctrl_fw_rsvd;
2011 * This field is a reserved field. This field can be used to
2012 * represent firmware branches or customer specific releases
2013 * tied to a specific (major,minor,update) version
2015 uint32_t dev_caps_cfg;
2017 * This field is used to indicate device's capabilities and
2021 * If set to 1, then secure firmware update behavior is
2022 * supported. If set to 0, then secure firmware update behavior
2025 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED \
2028 * If set to 1, then firmware based DCBX agent is supported. If
2029 * set to 0, then firmware based DCBX agent capability is not
2030 * supported on this device.
2032 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED \
2035 * If set to 1, then HWRM short command format is supported. If
2036 * set to 0, then HWRM short command format is not supported.
2038 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED \
2041 * If set to 1, then HWRM short command format is required. If
2042 * set to 0, then HWRM short command format is not required.
2044 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_INPUTUIRED \
2046 uint8_t roce_fw_maj;
2048 * This field represents the major version of RoCE firmware. A
2049 * change in major version represents a major release.
2051 uint8_t roce_fw_min;
2053 * This field represents the minor version of RoCE firmware. A
2054 * change in minor version represents significant functionality
2057 uint8_t roce_fw_bld;
2059 * This field represents the build version of RoCE firmware. A
2060 * change in update version represents bug fixes.
2062 uint8_t roce_fw_rsvd;
2064 * This field is a reserved field. This field can be used to
2065 * represent firmware branches or customer specific releases
2066 * tied to a specific (major,minor,update) version
2068 char hwrm_fw_name[16];
2070 * This field represents the name of HWRM FW (ASCII chars with
2073 char mgmt_fw_name[16];
2075 * This field represents the name of mgmt FW (ASCII chars with
2078 char netctrl_fw_name[16];
2080 * This field represents the name of network control firmware
2081 * (ASCII chars with NULL at the end).
2083 uint32_t reserved2[4];
2085 * This field is reserved for future use. The responder should
2086 * set it to 0. The requester should ignore this field.
2088 char roce_fw_name[16];
2090 * This field represents the name of RoCE FW (ASCII chars with
2094 /* This field returns the chip number. */
2096 /* This field returns the revision of chip. */
2098 /* This field returns the chip metal number. */
2099 uint8_t chip_bond_id;
2100 /* This field returns the bond id of the chip. */
2101 uint8_t chip_platform_type;
2103 * This value indicates the type of platform used for chip
2107 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
2108 /* FPGA platform of the chip. */
2109 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
2110 /* Palladium platform of the chip. */
2111 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
2112 uint16_t max_req_win_len;
2114 * This field returns the maximum value of request window that
2115 * is supported by the HWRM. The request window is mapped into
2116 * device address space using MMIO.
2118 uint16_t max_resp_len;
2119 /* This field returns the maximum value of response buffer in bytes. */
2120 uint16_t def_req_timeout;
2122 * This field returns the default request timeout value in
2125 uint8_t init_pending;
2127 * This field will indicate if any subsystems is not fully
2131 * If set to 1, device is not ready. If set to 0, device is
2132 * ready to accept all HWRM commands.
2134 #define HWRM_VER_GET_OUTPUT_INIT_PENDING_DEV_NOT_RDY UINT32_C(0x1)
2139 * This field is used in Output records to indicate that the
2140 * output is completely written to RAM. This field should be
2141 * read as '1' to indicate that the output has been completely
2142 * written. When writing a command completion or response to an
2143 * internal processor, the order of writes has to be such that
2144 * this field is written last.
2146 } __attribute__((packed));
2148 /* hwrm_func_reset */
2150 * Description: This command resets a hardware function (PCIe function) and
2151 * frees any resources used by the function. This command shall be initiated by
2152 * the driver after an FLR has occurred to prepare the function for re-use. This
2153 * command may also be initiated by a driver prior to doing it's own
2154 * configuration. This command puts the function into the reset state. In the
2155 * reset state, global and port related features of the chip are not available.
2158 * Note: This command will reset a function that has already been disabled or
2159 * idled. The command returns all the resources owned by the function so a new
2160 * driver may allocate and configure resources normally.
2162 /* Input (24 bytes) */
2163 struct hwrm_func_reset_input {
2166 * This value indicates what type of request this is. The format
2167 * for the rest of the command is determined by this field.
2171 * This value indicates the what completion ring the request
2172 * will be optionally completed on. If the value is -1, then no
2173 * CR completion will be generated. Any other value must be a
2174 * valid CR ring_id value for this function.
2177 /* This value indicates the command sequence number. */
2180 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2181 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2186 * This is the host address where the response will be written
2187 * when the request is complete. This area must be 16B aligned
2188 * and must be cleared to zero before the request is made.
2191 /* This bit must be '1' for the vf_id_valid field to be configured. */
2192 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
2195 * The ID of the VF that this PF is trying to reset. Only the
2196 * parent PF shall be allowed to reset a child VF. A parent PF
2197 * driver shall use this field only when a specific child VF is
2198 * requested to be reset.
2200 uint8_t func_reset_level;
2201 /* This value indicates the level of a function reset. */
2203 * Reset the caller function and its children
2204 * VFs (if any). If no children functions exist,
2205 * then reset the caller function only.
2207 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
2208 /* Reset the caller function only */
2209 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
2211 * Reset all children VFs of the caller function
2212 * driver if the caller is a PF driver. It is an
2213 * error to specify this level by a VF driver.
2214 * It is an error to specify this level by a PF
2215 * driver with no children VFs.
2217 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2220 * Reset a specific VF of the caller function
2221 * driver if the caller is the parent PF driver.
2222 * It is an error to specify this level by a VF
2223 * driver. It is an error to specify this level
2224 * by a PF driver that is not the parent of the
2225 * VF that is being requested to reset.
2227 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
2229 } __attribute__((packed));
2231 /* Output (16 bytes) */
2232 struct hwrm_func_reset_output {
2233 uint16_t error_code;
2235 * Pass/Fail or error type Note: receiver to verify the in
2236 * parameters, and fail the call with an error when appropriate
2239 /* This field returns the type of original request. */
2241 /* This field provides original sequence number of the command. */
2244 * This field is the length of the response in bytes. The last
2245 * byte of the response is a valid flag that will read as '1'
2246 * when the command has been completely written to memory.
2254 * This field is used in Output records to indicate that the
2255 * output is completely written to RAM. This field should be
2256 * read as '1' to indicate that the output has been completely
2257 * written. When writing a command completion or response to an
2258 * internal processor, the order of writes has to be such that
2259 * this field is written last.
2261 } __attribute__((packed));
2263 /* hwrm_func_vf_cfg */
2265 * Description: This command allows configuration of a VF by its driver. If this
2266 * function is called by a PF driver, then the HWRM shall fail this command. If
2267 * guest VLAN and/or MAC address are provided in this command, then the HWRM
2268 * shall set up appropriate MAC/VLAN filters for the VF that is being
2269 * configured. A VF driver should set VF MTU/MRU using this command prior to
2270 * allocating RX VNICs or TX rings for the corresponding VF.
2272 /* Input (32 bytes) */
2273 struct hwrm_func_vf_cfg_input {
2276 * This value indicates what type of request this is. The format for the
2277 * rest of the command is determined by this field.
2281 * This value indicates the what completion ring the request will be
2282 * optionally completed on. If the value is -1, then no CR completion
2283 * will be generated. Any other value must be a valid CR ring_id value
2284 * for this function.
2287 /* This value indicates the command sequence number. */
2290 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2291 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2295 * This is the host address where the response will be written when the
2296 * request is complete. This area must be 16B aligned and must be
2297 * cleared to zero before the request is made.
2300 /* This bit must be '1' for the mtu field to be configured. */
2301 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
2302 /* This bit must be '1' for the guest_vlan field to be configured. */
2303 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN UINT32_C(0x2)
2305 * This bit must be '1' for the async_event_cr field to be configured.
2307 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4)
2308 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
2309 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x8)
2312 * The maximum transmission unit requested on the function. The HWRM
2313 * should make sure that the mtu of the function does not exceed the mtu
2314 * of the physical port that this function is associated with. In
2315 * addition to requesting mtu per function, it is possible to configure
2316 * mtu per transmit ring. By default, the mtu of each transmit ring
2317 * associated with a function is equal to the mtu of the function. The
2318 * HWRM should make sure that the mtu of each transmit ring that is
2319 * assigned to a function has a valid mtu.
2321 uint16_t guest_vlan;
2323 * The guest VLAN for the function being configured. This field's format
2324 * is same as 802.1Q Tag's Tag Control Information (TCI) format that
2325 * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
2327 uint16_t async_event_cr;
2329 * ID of the target completion ring for receiving asynchronous event
2330 * completions. If this field is not valid, then the HWRM shall use the
2331 * default completion ring of the function that is being configured as
2332 * the target completion ring for providing any asynchronous event
2333 * completions for that function. If this field is valid, then the HWRM
2334 * shall use the completion ring identified by this ID as the target
2335 * completion ring for providing any asynchronous event completions for
2336 * the function that is being configured.
2338 uint8_t dflt_mac_addr[6];
2340 * This value is the current MAC address requested by the VF driver to
2341 * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
2342 * MAC address configuration is requested by the VF driver. The parent
2343 * PF driver may reject or overwrite this MAC address.
2345 } __attribute__((packed));
2347 /* Output (16 bytes) */
2349 struct hwrm_func_vf_cfg_output {
2350 uint16_t error_code;
2352 * Pass/Fail or error type Note: receiver to verify the in parameters,
2353 * and fail the call with an error when appropriate
2356 /* This field returns the type of original request. */
2358 /* This field provides original sequence number of the command. */
2361 * This field is the length of the response in bytes. The last
2362 * byte of the response is a valid flag that will read as '1'
2363 * when the command has been completely written to memory.
2371 * This field is used in Output records to indicate that the output is
2372 * completely written to RAM. This field should be read as '1' to
2373 * indicate that the output has been completely written. When writing a
2374 * command completion or response to an internal processor, the order of
2375 * writes has to be such that this field is written last.
2377 } __attribute__((packed));
2379 /* hwrm_func_qcaps */
2381 * Description: This command returns capabilities of a function. The input FID
2382 * value is used to indicate what function is being queried. This allows a
2383 * physical function driver to query virtual functions that are children of the
2384 * physical function. The output FID value is needed to configure Rings and
2385 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
2387 /* Input (24 bytes) */
2388 struct hwrm_func_qcaps_input {
2391 * This value indicates what type of request this is. The format
2392 * for the rest of the command is determined by this field.
2396 * This value indicates the what completion ring the request
2397 * will be optionally completed on. If the value is -1, then no
2398 * CR completion will be generated. Any other value must be a
2399 * valid CR ring_id value for this function.
2402 /* This value indicates the command sequence number. */
2405 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2406 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2411 * This is the host address where the response will be written
2412 * when the request is complete. This area must be 16B aligned
2413 * and must be cleared to zero before the request is made.
2417 * Function ID of the function that is being queried. 0xFF...
2418 * (All Fs) if the query is for the requesting function.
2420 uint16_t unused_0[3];
2421 } __attribute__((packed));
2423 /* Output (80 bytes) */
2424 struct hwrm_func_qcaps_output {
2425 uint16_t error_code;
2427 * Pass/Fail or error type Note: receiver to verify the in
2428 * parameters, and fail the call with an error when appropriate
2431 /* This field returns the type of original request. */
2433 /* This field provides original sequence number of the command. */
2436 * This field is the length of the response in bytes. The last
2437 * byte of the response is a valid flag that will read as '1'
2438 * when the command has been completely written to memory.
2442 * FID value. This value is used to identify operations on the
2443 * PCI bus as belonging to a particular PCI function.
2447 * Port ID of port that this function is associated with. Valid
2448 * only for the PF. 0xFF... (All Fs) if this function is not
2449 * associated with any port. 0xFF... (All Fs) if this function
2450 * is called from a VF.
2453 /* If 1, then Push mode is supported on this function. */
2454 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2456 * If 1, then the global MSI-X auto-masking is enabled for the
2459 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2462 * If 1, then the Precision Time Protocol (PTP) processing is
2463 * supported on this function. The HWRM should enable PTP on
2464 * only a single Physical Function (PF) per port.
2466 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2468 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2469 * supported on this function.
2471 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2473 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2474 * supported on this function.
2476 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2478 * If 1, then control and configuration of WoL magic packet are
2479 * supported on this function.
2481 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED \
2484 * If 1, then control and configuration of bitmap pattern packet
2485 * are supported on this function.
2487 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2489 * If set to 1, then the control and configuration of rate limit
2490 * of an allocated TX ring on the queried function is supported.
2492 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2494 * If 1, then control and configuration of minimum and maximum
2495 * bandwidths are supported on the queried function.
2497 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2499 * If the query is for a VF, then this flag shall be ignored. If
2500 * this query is for a PF and this flag is set to 1, then the PF
2501 * has the capability to set the rate limits on the TX rings of
2502 * its children VFs. If this query is for a PF and this flag is
2503 * set to 0, then the PF does not have the capability to set the
2504 * rate limits on the TX rings of its children VFs.
2506 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED \
2509 * If the query is for a VF, then this flag shall be ignored. If
2510 * this query is for a PF and this flag is set to 1, then the PF
2511 * has the capability to set the minimum and/or maximum
2512 * bandwidths for its children VFs. If this query is for a PF
2513 * and this flag is set to 0, then the PF does not have the
2514 * capability to set the minimum or maximum bandwidths for its
2517 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2519 * Standard TX Ring mode is used for the allocation of TX ring
2520 * and underlying scheduling resources that allow bandwidth
2521 * reservation and limit settings on the queried function. If
2522 * set to 1, then standard TX ring mode is supported on the
2523 * queried function. If set to 0, then standard TX ring mode is
2524 * not available on the queried function.
2526 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_STD_TX_RING_MODE_SUPPORTED \
2528 uint8_t mac_address[6];
2530 * This value is current MAC address configured for this
2531 * function. A value of 00-00-00-00-00-00 indicates no MAC
2532 * address is currently configured.
2534 uint16_t max_rsscos_ctx;
2536 * The maximum number of RSS/COS contexts that can be allocated
2539 uint16_t max_cmpl_rings;
2541 * The maximum number of completion rings that can be allocated
2544 uint16_t max_tx_rings;
2546 * The maximum number of transmit rings that can be allocated to
2549 uint16_t max_rx_rings;
2551 * The maximum number of receive rings that can be allocated to
2554 uint16_t max_l2_ctxs;
2556 * The maximum number of L2 contexts that can be allocated to
2561 * The maximum number of VNICs that can be allocated to the
2564 uint16_t first_vf_id;
2566 * The identifier for the first VF enabled on a PF. This is
2567 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2568 * this command is called on a PF with SR-IOV disabled or on a
2573 * The maximum number of VFs that can be allocated to the
2574 * function. This is valid only on the PF with SR-IOV enabled.
2575 * 0xFF... (All Fs) if this command is called on a PF with SR-
2576 * IOV disabled or on a VF.
2578 uint16_t max_stat_ctx;
2580 * The maximum number of statistic contexts that can be
2581 * allocated to the function.
2583 uint32_t max_encap_records;
2585 * The maximum number of Encapsulation records that can be
2586 * offloaded by this function.
2588 uint32_t max_decap_records;
2590 * The maximum number of decapsulation records that can be
2591 * offloaded by this function.
2593 uint32_t max_tx_em_flows;
2595 * The maximum number of Exact Match (EM) flows that can be
2596 * offloaded by this function on the TX side.
2598 uint32_t max_tx_wm_flows;
2600 * The maximum number of Wildcard Match (WM) flows that can be
2601 * offloaded by this function on the TX side.
2603 uint32_t max_rx_em_flows;
2605 * The maximum number of Exact Match (EM) flows that can be
2606 * offloaded by this function on the RX side.
2608 uint32_t max_rx_wm_flows;
2610 * The maximum number of Wildcard Match (WM) flows that can be
2611 * offloaded by this function on the RX side.
2613 uint32_t max_mcast_filters;
2615 * The maximum number of multicast filters that can be supported
2616 * by this function on the RX side.
2618 uint32_t max_flow_id;
2620 * The maximum value of flow_id that can be supported in
2621 * completion records.
2623 uint32_t max_hw_ring_grps;
2625 * The maximum number of HW ring groups that can be supported on
2628 uint16_t max_sp_tx_rings;
2630 * The maximum number of strict priority transmit rings that can
2631 * be allocated to the function. This number indicates the
2632 * maximum number of TX rings that can be assigned strict
2633 * priorities out of the maximum number of TX rings that can be
2634 * allocated (max_tx_rings) to the function.
2639 * This field is used in Output records to indicate that the
2640 * output is completely written to RAM. This field should be
2641 * read as '1' to indicate that the output has been completely
2642 * written. When writing a command completion or response to an
2643 * internal processor, the order of writes has to be such that
2644 * this field is written last.
2646 } __attribute__((packed));
2648 /* hwrm_func_qcfg */
2650 * Description: This command returns the current configuration of a function.
2651 * The input FID value is used to indicate what function is being queried. This
2652 * allows a physical function driver to query virtual functions that are
2653 * children of the physical function. The output FID value is needed to
2654 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
2655 * the PCI bus. This command should be called by every driver after
2656 * 'hwrm_func_cfg' to get the actual number of resources allocated by the HWRM.
2657 * The values returned by hwrm_func_qcfg are the values the driver shall use.
2658 * These values may be different than what was originally requested in the
2659 * 'hwrm_func_cfg' command.
2661 /* Input (24 bytes) */
2662 struct hwrm_func_qcfg_input {
2665 * This value indicates what type of request this is. The format
2666 * for the rest of the command is determined by this field.
2670 * This value indicates the what completion ring the request
2671 * will be optionally completed on. If the value is -1, then no
2672 * CR completion will be generated. Any other value must be a
2673 * valid CR ring_id value for this function.
2676 /* This value indicates the command sequence number. */
2679 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2680 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2685 * This is the host address where the response will be written
2686 * when the request is complete. This area must be 16B aligned
2687 * and must be cleared to zero before the request is made.
2691 * Function ID of the function that is being queried. 0xFF...
2692 * (All Fs) if the query is for the requesting function.
2694 uint16_t unused_0[3];
2695 } __attribute__((packed));
2697 /* Output (72 bytes) */
2698 struct hwrm_func_qcfg_output {
2699 uint16_t error_code;
2701 * Pass/Fail or error type Note: receiver to verify the in
2702 * parameters, and fail the call with an error when appropriate
2705 /* This field returns the type of original request. */
2707 /* This field provides original sequence number of the command. */
2710 * This field is the length of the response in bytes. The last
2711 * byte of the response is a valid flag that will read as '1'
2712 * when the command has been completely written to memory.
2716 * FID value. This value is used to identify operations on the
2717 * PCI bus as belonging to a particular PCI function.
2721 * Port ID of port that this function is associated with.
2722 * 0xFF... (All Fs) if this function is not associated with any
2727 * This value is the current VLAN setting for this function. The
2728 * value of 0 for this field indicates no priority tagging or
2729 * VLAN is used. This field's format is same as 802.1Q Tag's Tag
2730 * Control Information (TCI) format that includes both Priority
2731 * Code Point (PCP) and VLAN Identifier (VID).
2735 * If 1, then magic packet based Out-Of-Box WoL is enabled on
2736 * the port associated with this function.
2738 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
2741 * If 1, then bitmap pattern based Out-Of-Box WoL packet is
2742 * enabled on the port associated with this function.
2744 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
2746 * If set to 1, then FW based DCBX agent is enabled and running
2747 * on the port associated with this function. If set to 0, then
2748 * DCBX agent is not running in the firmware.
2750 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
2753 * Standard TX Ring mode is used for the allocation of TX ring
2754 * and underlying scheduling resources that allow bandwidth
2755 * reservation and limit settings on the queried function. If
2756 * set to 1, then standard TX ring mode is enabled on the
2757 * queried function. If set to 0, then the standard TX ring mode
2758 * is disabled on the queried function. In this extended TX ring
2759 * resource mode, the minimum and maximum bandwidth settings are
2760 * not supported to allow the allocation of TX rings to span
2761 * multiple scheduler nodes.
2763 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_STD_TX_RING_MODE_ENABLED \
2766 * If set to 1 then FW based LLDP agent is enabled and running
2767 * on the port associated with this function. If set to 0 then
2768 * the LLDP agent is not running in the firmware.
2770 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_LLDP_AGENT_ENABLED UINT32_C(0x10)
2772 * If set to 1, then multi-host mode is active for this
2773 * function. If set to 0, then multi-host mode is inactive for
2774 * this function or not applicable for this device.
2776 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_MULTI_HOST UINT32_C(0x20)
2777 uint8_t mac_address[6];
2779 * This value is current MAC address configured for this
2780 * function. A value of 00-00-00-00-00-00 indicates no MAC
2781 * address is currently configured.
2785 * This value is current PCI ID of this function. If ARI is
2786 * enabled, then it is Bus Number (8b):Function Number(8b).
2787 * Otherwise, it is Bus Number (8b):Device Number (4b):Function
2790 uint16_t alloc_rsscos_ctx;
2792 * The number of RSS/COS contexts currently allocated to the
2795 uint16_t alloc_cmpl_rings;
2797 * The number of completion rings currently allocated to the
2798 * function. This does not include the rings allocated to any
2799 * children functions if any.
2801 uint16_t alloc_tx_rings;
2803 * The number of transmit rings currently allocated to the
2804 * function. This does not include the rings allocated to any
2805 * children functions if any.
2807 uint16_t alloc_rx_rings;
2809 * The number of receive rings currently allocated to the
2810 * function. This does not include the rings allocated to any
2811 * children functions if any.
2813 uint16_t alloc_l2_ctx;
2814 /* The allocated number of L2 contexts to the function. */
2815 uint16_t alloc_vnics;
2816 /* The allocated number of vnics to the function. */
2819 * The maximum transmission unit of the function. For rings
2820 * allocated on this function, this default value is used if
2821 * ring MTU is not specified.
2825 * The maximum receive unit of the function. For vnics allocated
2826 * on this function, this default value is used if vnic MRU is
2829 uint16_t stat_ctx_id;
2830 /* The statistics context assigned to a function. */
2831 uint8_t port_partition_type;
2833 * The HWRM shall return Unknown value for this field when this
2834 * command is used to query VF's configuration.
2836 /* Single physical function */
2837 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
2838 /* Multiple physical functions */
2839 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
2840 /* Network Partitioning 1.0 */
2841 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
2842 /* Network Partitioning 1.5 */
2843 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
2844 /* Network Partitioning 2.0 */
2845 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
2847 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
2848 uint8_t port_pf_cnt;
2850 * This field will indicate number of physical functions on this
2851 * port_partition. HWRM shall return unavail (i.e. value of 0)
2852 * for this field when this command is used to query VF's
2853 * configuration or from older firmware that doesn't support
2856 /* number of PFs is not available */
2857 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PF_CNT_UNAVAIL UINT32_C(0x0)
2858 uint16_t dflt_vnic_id;
2859 /* The default VNIC ID assigned to a function that is being queried. */
2860 uint16_t max_mtu_configured;
2862 * This value specifies the MAX MTU that can be configured by
2863 * host drivers. This 'max_mtu_configure' can be HW max MTU or
2864 * OEM applications specified value. Host drivers can't
2865 * configure the MTU greater than this value. Host drivers
2866 * should read this value prior to configuring the MTU. FW will
2867 * fail the host request with MTU greater than
2868 * 'max_mtu_configured'.
2872 * Minimum BW allocated for this function. The HWRM will
2873 * translate this value into byte counter and time interval used
2874 * for the scheduler inside the device. A value of 0 indicates
2875 * the minimum bandwidth is not configured.
2877 /* The bandwidth value. */
2878 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2879 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
2880 /* The granularity of the value (bits or bytes). */
2881 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE UINT32_C(0x10000000)
2882 /* Value is in bits. */
2883 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2884 /* Value is in bytes. */
2885 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES \
2886 (UINT32_C(0x1) << 28)
2887 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_LAST \
2888 FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES
2889 /* bw_value_unit is 3 b */
2890 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
2891 UINT32_C(0xe0000000)
2892 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
2893 /* Value is in Mb or MB (base 10). */
2894 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
2895 (UINT32_C(0x0) << 29)
2896 /* Value is in Kb or KB (base 10). */
2897 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_KILO \
2898 (UINT32_C(0x2) << 29)
2899 /* Value is in bits or bytes. */
2900 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_BASE \
2901 (UINT32_C(0x4) << 29)
2902 /* Value is in Gb or GB (base 10). */
2903 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
2904 (UINT32_C(0x6) << 29)
2905 /* Value is in 1/100th of a percentage of total bandwidth. */
2906 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
2907 (UINT32_C(0x1) << 29)
2909 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
2910 (UINT32_C(0x7) << 29)
2911 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
2912 FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
2915 * Maximum BW allocated for this function. The HWRM will
2916 * translate this value into byte counter and time interval used
2917 * for the scheduler inside the device. A value of 0 indicates
2918 * that the maximum bandwidth is not configured.
2920 /* The bandwidth value. */
2921 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2922 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
2923 /* The granularity of the value (bits or bytes). */
2924 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE UINT32_C(0x10000000)
2925 /* Value is in bits. */
2926 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2927 /* Value is in bytes. */
2928 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES \
2929 (UINT32_C(0x1) << 28)
2930 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_LAST \
2931 FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES
2932 /* bw_value_unit is 3 b */
2933 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
2934 UINT32_C(0xe0000000)
2935 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
2936 /* Value is in Mb or MB (base 10). */
2937 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
2938 (UINT32_C(0x0) << 29)
2939 /* Value is in Kb or KB (base 10). */
2940 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_KILO \
2941 (UINT32_C(0x2) << 29)
2942 /* Value is in bits or bytes. */
2943 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_BASE \
2944 (UINT32_C(0x4) << 29)
2945 /* Value is in Gb or GB (base 10). */
2946 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
2947 (UINT32_C(0x6) << 29)
2948 /* Value is in 1/100th of a percentage of total bandwidth. */
2949 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
2950 (UINT32_C(0x1) << 29)
2952 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
2953 (UINT32_C(0x7) << 29)
2954 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
2955 FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
2958 * This value indicates the Edge virtual bridge mode for the
2959 * domain that this function belongs to.
2961 /* No Edge Virtual Bridging (EVB) */
2962 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
2963 /* Virtual Ethernet Bridge (VEB) */
2964 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
2965 /* Virtual Ethernet Port Aggregator (VEPA) */
2966 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
2970 * The number of VFs that are allocated to the function. This is
2971 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2972 * this command is called on a PF with SR-IOV disabled or on a
2975 uint32_t alloc_mcast_filters;
2977 * The number of allocated multicast filters for this function
2980 uint32_t alloc_hw_ring_grps;
2981 /* The number of allocated HW ring groups for this function. */
2982 uint16_t alloc_sp_tx_rings;
2984 * The number of strict priority transmit rings out of currently
2985 * allocated TX rings to the function (alloc_tx_rings).
2990 * This field is used in Output records to indicate that the
2991 * output is completely written to RAM. This field should be
2992 * read as '1' to indicate that the output has been completely
2993 * written. When writing a command completion or response to an
2994 * internal processor, the order of writes has to be such that
2995 * this field is written last.
2997 } __attribute__((packed));
2999 /* hwrm_func_vlan_qcfg */
3001 * Description: This command should be called by PF driver to get the current
3002 * C-TAG, S-TAG and correcponsing PCP and TPID values configured for the
3005 /* Input (24 bytes) */
3006 struct hwrm_func_vlan_qcfg_input {
3009 * This value indicates what type of request this is. The format
3010 * for the rest of the command is determined by this field.
3014 * This value indicates the what completion ring the request
3015 * will be optionally completed on. If the value is -1, then no
3016 * CR completion will be generated. Any other value must be a
3017 * valid CR ring_id value for this function.
3020 /* This value indicates the command sequence number. */
3023 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3024 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3029 * This is the host address where the response will be written
3030 * when the request is complete. This area must be 16B aligned
3031 * and must be cleared to zero before the request is made.
3035 * Function ID of the function that is being configured. If set
3036 * to 0xFF... (All Fs), then the configuration is for the
3037 * requesting function.
3039 uint16_t unused_0[3];
3042 /* Output (40 bytes) */
3043 struct hwrm_func_vlan_qcfg_output {
3044 uint16_t error_code;
3046 * Pass/Fail or error type Note: receiver to verify the in
3047 * parameters, and fail the call with an error when appropriate
3050 /* This field returns the type of original request. */
3052 /* This field provides original sequence number of the command. */
3055 * This field is the length of the response in bytes. The last
3056 * byte of the response is a valid flag that will read as '1'
3057 * when the command has been completely written to memory.
3065 * This field is used in Output records to indicate that the
3066 * output is completely written to RAM. This field should be
3067 * read as '1' to indicate that the output has been completely
3068 * written. When writing a command completion or response to an
3069 * internal processor, the order of writes has to be such that
3070 * this field is written last.
3073 /* S-TAG VLAN identifier configured for the function. */
3075 /* S-TAG PCP value configured for the function. */
3079 * S-TAG TPID value configured for the function. This field is
3080 * specified in network byte order.
3083 /* C-TAG VLAN identifier configured for the function. */
3085 /* C-TAG PCP value configured for the function. */
3089 * C-TAG TPID value configured for the function. This field is
3090 * specified in network byte order.
3099 /* hwrm_func_vlan_cfg */
3101 * Description: This command allows PF driver to configure C-TAG, S-TAG and
3102 * corresponding PCP and TPID values for a function.
3104 /* Input (48 bytes) */
3105 struct hwrm_func_vlan_cfg_input {
3108 * This value indicates what type of request this is. The format
3109 * for the rest of the command is determined by this field.
3113 * This value indicates the what completion ring the request
3114 * will be optionally completed on. If the value is -1, then no
3115 * CR completion will be generated. Any other value must be a
3116 * valid CR ring_id value for this function.
3119 /* This value indicates the command sequence number. */
3122 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3123 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3128 * This is the host address where the response will be written
3129 * when the request is complete. This area must be 16B aligned
3130 * and must be cleared to zero before the request is made.
3134 * Function ID of the function that is being configured. If set
3135 * to 0xFF... (All Fs), then the configuration is for the
3136 * requesting function.
3141 /* This bit must be '1' for the stag_vid field to be configured. */
3142 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_VID UINT32_C(0x1)
3143 /* This bit must be '1' for the ctag_vid field to be configured. */
3144 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_VID UINT32_C(0x2)
3145 /* This bit must be '1' for the stag_pcp field to be configured. */
3146 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_PCP UINT32_C(0x4)
3147 /* This bit must be '1' for the ctag_pcp field to be configured. */
3148 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_PCP UINT32_C(0x8)
3149 /* This bit must be '1' for the stag_tpid field to be configured. */
3150 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_TPID UINT32_C(0x10)
3151 /* This bit must be '1' for the ctag_tpid field to be configured. */
3152 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_TPID UINT32_C(0x20)
3154 /* S-TAG VLAN identifier configured for the function. */
3156 /* S-TAG PCP value configured for the function. */
3160 * S-TAG TPID value configured for the function. This field is
3161 * specified in network byte order.
3164 /* C-TAG VLAN identifier configured for the function. */
3166 /* C-TAG PCP value configured for the function. */
3170 * C-TAG TPID value configured for the function. This field is
3171 * specified in network byte order.
3180 /* Output (16 bytes) */
3181 struct hwrm_func_vlan_cfg_output {
3182 uint16_t error_code;
3184 * Pass/Fail or error type Note: receiver to verify the in
3185 * parameters, and fail the call with an error when appropriate
3188 /* This field returns the type of original request. */
3190 /* This field provides original sequence number of the command. */
3193 * This field is the length of the response in bytes. The last
3194 * byte of the response is a valid flag that will read as '1'
3195 * when the command has been completely written to memory.
3203 * This field is used in Output records to indicate that the
3204 * output is completely written to RAM. This field should be
3205 * read as '1' to indicate that the output has been completely
3206 * written. When writing a command completion or response to an
3207 * internal processor, the order of writes has to be such that
3208 * this field is written last.
3214 * Description: This command allows configuration of a PF by the corresponding
3215 * PF driver. This command also allows configuration of a child VF by its parent
3216 * PF driver. The input FID value is used to indicate what function is being
3217 * configured. This allows a PF driver to configure the PF owned by itself or a
3218 * virtual function that is a child of the PF. This command allows to reserve
3219 * resources for a VF by its parent PF. To reverse the process, the command
3220 * should be called with all enables flags cleared for resources. This will free
3221 * allocated resources for the VF and return them to the resource pool. If this
3222 * command is requested by a VF driver to configure or reserve resources, then
3223 * the HWRM shall fail this command. If default MAC address and/or VLAN are
3224 * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
3225 * filters for the function that is being configured. If source properties
3226 * checks are enabled and default MAC address and/or IP address are provided in
3227 * this command, then the HWRM shall set appropriate source property checks
3228 * based on provided MAC and/or IP addresses. The parent PF driver should not
3229 * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
3230 * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
3231 * HWRM should ignore it. A function's MTU/MRU should be set prior to allocating
3232 * RX VNICs or TX rings. A PF driver calls hwrm_func_cfg to allocate resources
3233 * for itself or its children VFs. All function drivers shall call hwrm_func_cfg
3234 * to reserve resources. A request to hwrm_func_cfg may not be fully granted;
3235 * that is, a request for resources may be larger than what can be supported by
3236 * the device and the HWRM will allocate the best set of resources available,
3237 * but that may be less than requested. If all the amounts requested could not
3238 * be fulfilled, the HWRM shall allocate what it could and return a status code
3239 * of success. A function driver should call hwrm_func_qcfg immediately after
3240 * hwrm_func_cfg to determine what resources were assigned to the configured
3241 * function. A call by a PF driver to hwrm_func_cfg to allocate resources for
3242 * itself shall only allocate resources for the PF driver to use, not for its
3243 * children VFs. Likewise, a call to hwrm_func_qcfg shall return the resources
3244 * available for the PF driver to use, not what is available to its children
3247 /* Input (88 bytes) */
3248 struct hwrm_func_cfg_input {
3251 * This value indicates what type of request this is. The format
3252 * for the rest of the command is determined by this field.
3256 * This value indicates the what completion ring the request
3257 * will be optionally completed on. If the value is -1, then no
3258 * CR completion will be generated. Any other value must be a
3259 * valid CR ring_id value for this function.
3262 /* This value indicates the command sequence number. */
3265 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3266 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3271 * This is the host address where the response will be written
3272 * when the request is complete. This area must be 16B aligned
3273 * and must be cleared to zero before the request is made.
3277 * Function ID of the function that is being configured. If set
3278 * to 0xFF... (All Fs), then the the configuration is for the
3279 * requesting function.
3285 * When this bit is '1', the function is disabled with source
3286 * MAC address check. This is an anti-spoofing check. If this
3287 * flag is set, then the function shall be configured to
3288 * disallow transmission of frames with the source MAC address
3289 * that is configured for this function.
3291 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE \
3294 * When this bit is '1', the function is enabled with source MAC
3295 * address check. This is an anti-spoofing check. If this flag
3296 * is set, then the function shall be configured to allow
3297 * transmission of frames with the source MAC address that is
3298 * configured for this function.
3300 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE \
3303 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_MASK UINT32_C(0x1fc)
3304 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_SFT 2
3306 * Standard TX Ring mode is used for the allocation of TX ring
3307 * and underlying scheduling resources that allow bandwidth
3308 * reservation and limit settings on the queried function. If
3309 * set to 1, then standard TX ring mode is requested to be
3310 * enabled on the function being configured.
3312 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_ENABLE \
3315 * Standard TX Ring mode is used for the allocation of TX ring
3316 * and underlying scheduling resources that allow bandwidth
3317 * reservation and limit settings on the queried function. If
3318 * set to 1, then the standard TX ring mode is requested to be
3319 * disabled on the function being configured. In this extended
3320 * TX ring resource mode, the minimum and maximum bandwidth
3321 * settings are not supported to allow the allocation of TX
3322 * rings to span multiple scheduler nodes.
3324 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_DISABLE \
3327 * If this bit is set, virtual mac address configured in this
3328 * command will be persistent over warm boot.
3330 #define HWRM_FUNC_CFG_INPUT_FLAGS_VIRT_MAC_PERSIST UINT32_C(0x800)
3332 * This bit only applies to the VF. If this bit is set, the
3333 * statistic context counters will not be cleared when the
3334 * statistic context is freed or a function reset is called on
3335 * VF. This bit will be cleared when the PF is unloaded or a
3336 * function reset is called on the PF.
3338 #define HWRM_FUNC_CFG_INPUT_FLAGS_NO_AUTOCLEAR_STATISTIC \
3341 * This bit requests that the firmware test to see if all the
3342 * assets requested in this command (i.e. number of TX rings)
3343 * are available. The firmware will return an error if the
3344 * requested assets are not available. The firwmare will NOT
3345 * reserve the assets if they are available.
3347 #define HWRM_FUNC_CFG_INPUT_FLAGS_TX_ASSETS_TEST UINT32_C(0x2000)
3349 /* This bit must be '1' for the mtu field to be configured. */
3350 #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
3351 /* This bit must be '1' for the mru field to be configured. */
3352 #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
3354 * This bit must be '1' for the num_rsscos_ctxs field to be
3357 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS UINT32_C(0x4)
3359 * This bit must be '1' for the num_cmpl_rings field to be
3362 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS UINT32_C(0x8)
3363 /* This bit must be '1' for the num_tx_rings field to be configured. */
3364 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS UINT32_C(0x10)
3365 /* This bit must be '1' for the num_rx_rings field to be configured. */
3366 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS UINT32_C(0x20)
3367 /* This bit must be '1' for the num_l2_ctxs field to be configured. */
3368 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
3369 /* This bit must be '1' for the num_vnics field to be configured. */
3370 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS UINT32_C(0x80)
3372 * This bit must be '1' for the num_stat_ctxs field to be
3375 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS UINT32_C(0x100)
3377 * This bit must be '1' for the dflt_mac_addr field to be
3380 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x200)
3381 /* This bit must be '1' for the dflt_vlan field to be configured. */
3382 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN UINT32_C(0x400)
3383 /* This bit must be '1' for the dflt_ip_addr field to be configured. */
3384 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR UINT32_C(0x800)
3385 /* This bit must be '1' for the min_bw field to be configured. */
3386 #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW UINT32_C(0x1000)
3387 /* This bit must be '1' for the max_bw field to be configured. */
3388 #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW UINT32_C(0x2000)
3390 * This bit must be '1' for the async_event_cr field to be
3393 #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4000)
3395 * This bit must be '1' for the vlan_antispoof_mode field to be
3398 #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
3400 * This bit must be '1' for the allowed_vlan_pris field to be
3403 #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
3404 /* This bit must be '1' for the evb_mode field to be configured. */
3405 #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE UINT32_C(0x20000)
3407 * This bit must be '1' for the num_mcast_filters field to be
3410 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
3412 * This bit must be '1' for the num_hw_ring_grps field to be
3415 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
3418 * The maximum transmission unit of the function. The HWRM
3419 * should make sure that the mtu of the function does not exceed
3420 * the mtu of the physical port that this function is associated
3421 * with. In addition to configuring mtu per function, it is
3422 * possible to configure mtu per transmit ring. By default, the
3423 * mtu of each transmit ring associated with a function is equal
3424 * to the mtu of the function. The HWRM should make sure that
3425 * the mtu of each transmit ring that is assigned to a function
3430 * The maximum receive unit of the function. The HWRM should
3431 * make sure that the mru of the function does not exceed the
3432 * mru of the physical port that this function is associated
3433 * with. In addition to configuring mru per function, it is
3434 * possible to configure mru per vnic. By default, the mru of
3435 * each vnic associated with a function is equal to the mru of
3436 * the function. The HWRM should make sure that the mru of each
3437 * vnic that is assigned to a function has a valid mru.
3439 uint16_t num_rsscos_ctxs;
3440 /* The number of RSS/COS contexts requested for the function. */
3441 uint16_t num_cmpl_rings;
3443 * The number of completion rings requested for the function.
3444 * This does not include the rings allocated to any children
3447 uint16_t num_tx_rings;
3449 * The number of transmit rings requested for the function. This
3450 * does not include the rings allocated to any children
3453 uint16_t num_rx_rings;
3455 * The number of receive rings requested for the function. This
3456 * does not include the rings allocated to any children
3459 uint16_t num_l2_ctxs;
3460 /* The requested number of L2 contexts for the function. */
3462 /* The requested number of vnics for the function. */
3463 uint16_t num_stat_ctxs;
3464 /* The requested number of statistic contexts for the function. */
3465 uint16_t num_hw_ring_grps;
3467 * The number of HW ring groups that should be reserved for this
3470 uint8_t dflt_mac_addr[6];
3471 /* The default MAC address for the function being configured. */
3474 * The default VLAN for the function being configured. This
3475 * field's format is same as 802.1Q Tag's Tag Control
3476 * Information (TCI) format that includes both Priority Code
3477 * Point (PCP) and VLAN Identifier (VID).
3479 uint32_t dflt_ip_addr[4];
3481 * The default IP address for the function being configured.
3482 * This address is only used in enabling source property check.
3486 * Minimum BW allocated for this function. The HWRM will
3487 * translate this value into byte counter and time interval used
3488 * for the scheduler inside the device.
3490 /* The bandwidth value. */
3491 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
3492 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
3493 /* The granularity of the value (bits or bytes). */
3494 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE UINT32_C(0x10000000)
3495 /* Value is in bits. */
3496 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3497 /* Value is in bytes. */
3498 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3499 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_LAST \
3500 FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES
3501 /* bw_value_unit is 3 b */
3502 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MASK \
3503 UINT32_C(0xe0000000)
3504 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
3505 /* Value is in Mb or MB (base 10). */
3506 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
3507 (UINT32_C(0x0) << 29)
3508 /* Value is in Kb or KB (base 10). */
3509 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
3510 (UINT32_C(0x2) << 29)
3511 /* Value is in bits or bytes. */
3512 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
3513 (UINT32_C(0x4) << 29)
3514 /* Value is in Gb or GB (base 10). */
3515 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
3516 (UINT32_C(0x6) << 29)
3517 /* Value is in 1/100th of a percentage of total bandwidth. */
3518 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
3519 (UINT32_C(0x1) << 29)
3521 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
3522 (UINT32_C(0x7) << 29)
3523 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
3524 FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
3527 * Maximum BW allocated for this function. The HWRM will
3528 * translate this value into byte counter and time interval used
3529 * for the scheduler inside the device.
3531 /* The bandwidth value. */
3532 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
3534 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
3535 /* The granularity of the value (bits or bytes). */
3536 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
3537 /* Value is in bits. */
3538 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3539 /* Value is in bytes. */
3540 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3541 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_LAST \
3542 FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES
3543 /* bw_value_unit is 3 b */
3544 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
3545 UINT32_C(0xe0000000)
3546 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
3547 /* Value is in Mb or MB (base 10). */
3548 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
3549 (UINT32_C(0x0) << 29)
3550 /* Value is in Kb or KB (base 10). */
3551 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
3552 (UINT32_C(0x2) << 29)
3553 /* Value is in bits or bytes. */
3554 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
3555 (UINT32_C(0x4) << 29)
3556 /* Value is in Gb or GB (base 10). */
3557 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
3558 (UINT32_C(0x6) << 29)
3559 /* Value is in 1/100th of a percentage of total bandwidth. */
3560 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
3561 (UINT32_C(0x1) << 29)
3563 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
3564 (UINT32_C(0x7) << 29)
3565 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
3566 FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
3567 uint16_t async_event_cr;
3569 * ID of the target completion ring for receiving asynchronous
3570 * event completions. If this field is not valid, then the HWRM
3571 * shall use the default completion ring of the function that is
3572 * being configured as the target completion ring for providing
3573 * any asynchronous event completions for that function. If this
3574 * field is valid, then the HWRM shall use the completion ring
3575 * identified by this ID as the target completion ring for
3576 * providing any asynchronous event completions for the function
3577 * that is being configured.
3579 uint8_t vlan_antispoof_mode;
3580 /* VLAN Anti-spoofing mode. */
3581 /* No VLAN anti-spoofing checks are enabled */
3582 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
3583 /* Validate VLAN against the configured VLAN(s) */
3584 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN \
3586 /* Insert VLAN if it does not exist, otherwise discard */
3587 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE \
3590 * Insert VLAN if it does not exist, override
3594 HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN \
3596 uint8_t allowed_vlan_pris;
3598 * This bit field defines VLAN PRIs that are allowed on this
3599 * function. If nth bit is set, then VLAN PRI n is allowed on
3604 * The HWRM shall allow a PF driver to change EVB mode for the
3605 * partition it belongs to. The HWRM shall not allow a VF driver
3606 * to change the EVB mode. The HWRM shall take into account the
3607 * switching of EVB mode from one to another and reconfigure
3608 * hardware resources as appropriately. The switching from VEB
3609 * to VEPA mode requires the disabling of the loopback traffic.
3610 * Additionally, source knock outs are handled differently in
3611 * VEB and VEPA modes.
3613 /* No Edge Virtual Bridging (EVB) */
3614 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
3615 /* Virtual Ethernet Bridge (VEB) */
3616 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB UINT32_C(0x1)
3617 /* Virtual Ethernet Port Aggregator (VEPA) */
3618 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA UINT32_C(0x2)
3620 uint16_t num_mcast_filters;
3622 * The number of multicast filters that should be reserved for
3623 * this function on the RX side.
3625 } __attribute__((packed));
3627 /* Output (16 bytes) */
3628 struct hwrm_func_cfg_output {
3629 uint16_t error_code;
3631 * Pass/Fail or error type Note: receiver to verify the in
3632 * parameters, and fail the call with an error when appropriate
3635 /* This field returns the type of original request. */
3637 /* This field provides original sequence number of the command. */
3640 * This field is the length of the response in bytes. The last
3641 * byte of the response is a valid flag that will read as '1'
3642 * when the command has been completely written to memory.
3650 * This field is used in Output records to indicate that the
3651 * output is completely written to RAM. This field should be
3652 * read as '1' to indicate that the output has been completely
3653 * written. When writing a command completion or response to an
3654 * internal processor, the order of writes has to be such that
3655 * this field is written last.
3657 } __attribute__((packed));
3659 /* hwrm_func_qstats */
3661 * Description: This command returns statistics of a function. The input FID
3662 * value is used to indicate what function is being queried. This allows a
3663 * physical function driver to query virtual functions that are children of the
3664 * physical function. The HWRM shall return any unsupported counter with a value
3665 * of 0xFFFFFFFF for 32-bit counters and 0xFFFFFFFFFFFFFFFF for 64-bit counters.
3667 /* Input (24 bytes) */
3668 struct hwrm_func_qstats_input {
3671 * This value indicates what type of request this is. The format
3672 * for the rest of the command is determined by this field.
3676 * This value indicates the what completion ring the request
3677 * will be optionally completed on. If the value is -1, then no
3678 * CR completion will be generated. Any other value must be a
3679 * valid CR ring_id value for this function.
3682 /* This value indicates the command sequence number. */
3685 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3686 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3691 * This is the host address where the response will be written
3692 * when the request is complete. This area must be 16B aligned
3693 * and must be cleared to zero before the request is made.
3697 * Function ID of the function that is being queried. 0xFF...
3698 * (All Fs) if the query is for the requesting function.
3700 uint16_t unused_0[3];
3701 } __attribute__((packed));
3703 /* Output (176 bytes) */
3704 struct hwrm_func_qstats_output {
3705 uint16_t error_code;
3707 * Pass/Fail or error type Note: receiver to verify the in
3708 * parameters, and fail the call with an error when appropriate
3711 /* This field returns the type of original request. */
3713 /* This field provides original sequence number of the command. */
3716 * This field is the length of the response in bytes. The last
3717 * byte of the response is a valid flag that will read as '1'
3718 * when the command has been completely written to memory.
3720 uint64_t tx_ucast_pkts;
3721 /* Number of transmitted unicast packets on the function. */
3722 uint64_t tx_mcast_pkts;
3723 /* Number of transmitted multicast packets on the function. */
3724 uint64_t tx_bcast_pkts;
3725 /* Number of transmitted broadcast packets on the function. */
3726 uint64_t tx_err_pkts;
3728 * Number of transmitted packets that were discarded due to
3729 * internal NIC resource problems. For transmit, this can only
3730 * happen if TMP is configured to allow dropping in HOL blocking
3731 * conditions, which is not a normal configuration.
3733 uint64_t tx_drop_pkts;
3735 * Number of dropped packets on transmit path on the function.
3736 * These are packets that have been marked for drop by the TE
3737 * CFA block or are packets that exceeded the transmit MTU limit
3740 uint64_t tx_ucast_bytes;
3741 /* Number of transmitted bytes for unicast traffic on the function. */
3742 uint64_t tx_mcast_bytes;
3744 * Number of transmitted bytes for multicast traffic on the
3747 uint64_t tx_bcast_bytes;
3749 * Number of transmitted bytes for broadcast traffic on the
3752 uint64_t rx_ucast_pkts;
3753 /* Number of received unicast packets on the function. */
3754 uint64_t rx_mcast_pkts;
3755 /* Number of received multicast packets on the function. */
3756 uint64_t rx_bcast_pkts;
3757 /* Number of received broadcast packets on the function. */
3758 uint64_t rx_err_pkts;
3760 * Number of received packets that were discarded on the
3761 * function due to resource limitations. This can happen for 3
3762 * reasons. # The BD used for the packet has a bad format. #
3763 * There were no BDs available in the ring for the packet. #
3764 * There were no BDs available on-chip for the packet.
3766 uint64_t rx_drop_pkts;
3768 * Number of dropped packets on received path on the function.
3769 * These are packets that have been marked for drop by the RE
3772 uint64_t rx_ucast_bytes;
3773 /* Number of received bytes for unicast traffic on the function. */
3774 uint64_t rx_mcast_bytes;
3775 /* Number of received bytes for multicast traffic on the function. */
3776 uint64_t rx_bcast_bytes;
3777 /* Number of received bytes for broadcast traffic on the function. */
3778 uint64_t rx_agg_pkts;
3779 /* Number of aggregated unicast packets on the function. */
3780 uint64_t rx_agg_bytes;
3781 /* Number of aggregated unicast bytes on the function. */
3782 uint64_t rx_agg_events;
3783 /* Number of aggregation events on the function. */
3784 uint64_t rx_agg_aborts;
3785 /* Number of aborted aggregations on the function. */
3792 * This field is used in Output records to indicate that the
3793 * output is completely written to RAM. This field should be
3794 * read as '1' to indicate that the output has been completely
3795 * written. When writing a command completion or response to an
3796 * internal processor, the order of writes has to be such that
3797 * this field is written last.
3799 } __attribute__((packed));
3801 /* hwrm_func_clr_stats */
3803 * Description: This command clears statistics of a function. The input FID
3804 * value is used to indicate what function's statistics is being cleared. This
3805 * allows a physical function driver to clear statistics of virtual functions
3806 * that are children of the physical function.
3808 /* Input (24 bytes) */
3809 struct hwrm_func_clr_stats_input {
3812 * This value indicates what type of request this is. The format
3813 * for the rest of the command is determined by this field.
3817 * This value indicates the what completion ring the request
3818 * will be optionally completed on. If the value is -1, then no
3819 * CR completion will be generated. Any other value must be a
3820 * valid CR ring_id value for this function.
3823 /* This value indicates the command sequence number. */
3826 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3827 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3832 * This is the host address where the response will be written
3833 * when the request is complete. This area must be 16B aligned
3834 * and must be cleared to zero before the request is made.
3838 * Function ID of the function. 0xFF... (All Fs) if the query is
3839 * for the requesting function.
3841 uint16_t unused_0[3];
3842 } __attribute__((packed));
3844 /* Output (16 bytes) */
3845 struct hwrm_func_clr_stats_output {
3846 uint16_t error_code;
3848 * Pass/Fail or error type Note: receiver to verify the in
3849 * parameters, and fail the call with an error when appropriate
3852 /* This field returns the type of original request. */
3854 /* This field provides original sequence number of the command. */
3857 * This field is the length of the response in bytes. The last
3858 * byte of the response is a valid flag that will read as '1'
3859 * when the command has been completely written to memory.
3867 * This field is used in Output records to indicate that the
3868 * output is completely written to RAM. This field should be
3869 * read as '1' to indicate that the output has been completely
3870 * written. When writing a command completion or response to an
3871 * internal processor, the order of writes has to be such that
3872 * this field is written last.
3874 } __attribute__((packed));
3876 /* hwrm_func_vf_vnic_ids_query */
3877 /* Description: This command is used to query vf vnic ids. */
3878 /* Input (32 bytes) */
3879 struct hwrm_func_vf_vnic_ids_query_input {
3882 * This value indicates what type of request this is. The format
3883 * for the rest of the command is determined by this field.
3887 * This value indicates the what completion ring the request
3888 * will be optionally completed on. If the value is -1, then no
3889 * CR completion will be generated. Any other value must be a
3890 * valid CR ring_id value for this function.
3893 /* This value indicates the command sequence number. */
3896 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3897 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3902 * This is the host address where the response will be written
3903 * when the request is complete. This area must be 16B aligned
3904 * and must be cleared to zero before the request is made.
3908 * This value is used to identify a Virtual Function (VF). The
3909 * scope of VF ID is local within a PF.
3913 uint32_t max_vnic_id_cnt;
3914 /* Max number of vnic ids in vnic id table */
3915 uint64_t vnic_id_tbl_addr;
3916 /* This is the address for VF VNIC ID table */
3917 } __attribute__((packed));
3919 /* Output (16 bytes) */
3920 struct hwrm_func_vf_vnic_ids_query_output {
3921 uint16_t error_code;
3923 * Pass/Fail or error type Note: receiver to verify the in
3924 * parameters, and fail the call with an error when appropriate
3927 /* This field returns the type of original request. */
3929 /* This field provides original sequence number of the command. */
3932 * This field is the length of the response in bytes. The last
3933 * byte of the response is a valid flag that will read as '1'
3934 * when the command has been completely written to memory.
3936 uint32_t vnic_id_cnt;
3938 * Actual number of vnic ids Each VNIC ID is written as a 32-bit
3946 * This field is used in Output records to indicate that the
3947 * output is completely written to RAM. This field should be
3948 * read as '1' to indicate that the output has been completely
3949 * written. When writing a command completion or response to an
3950 * internal processor, the order of writes has to be such that
3951 * this field is written last.
3953 } __attribute__((packed));
3955 /* hwrm_func_drv_rgtr */
3957 * Description: This command is used by the function driver to register its
3958 * information with the HWRM. A function driver shall implement this command. A
3959 * function driver shall use this command during the driver initialization right
3960 * after the HWRM version discovery and default ring resources allocation.
3962 /* Input (80 bytes) */
3963 struct hwrm_func_drv_rgtr_input {
3966 * This value indicates what type of request this is. The format
3967 * for the rest of the command is determined by this field.
3971 * This value indicates the what completion ring the request
3972 * will be optionally completed on. If the value is -1, then no
3973 * CR completion will be generated. Any other value must be a
3974 * valid CR ring_id value for this function.
3977 /* This value indicates the command sequence number. */
3980 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3981 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3986 * This is the host address where the response will be written
3987 * when the request is complete. This area must be 16B aligned
3988 * and must be cleared to zero before the request is made.
3992 * When this bit is '1', the function driver is requesting all
3993 * requests from its children VF drivers to be forwarded to
3994 * itself. This flag can only be set by the PF driver. If a VF
3995 * driver sets this flag, it should be ignored by the HWRM.
3997 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3999 * When this bit is '1', the function is requesting none of the
4000 * requests from its children VF drivers to be forwarded to
4001 * itself. This flag can only be set by the PF driver. If a VF
4002 * driver sets this flag, it should be ignored by the HWRM.
4004 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4006 /* This bit must be '1' for the os_type field to be configured. */
4007 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4008 /* This bit must be '1' for the ver field to be configured. */
4009 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4010 /* This bit must be '1' for the timestamp field to be configured. */
4011 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4012 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4013 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8)
4015 * This bit must be '1' for the async_event_fwd field to be
4018 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
4021 * This value indicates the type of OS. The values are based on
4022 * CIM_OperatingSystem.mof file as published by the DMTF.
4025 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
4026 /* Other OS not listed below. */
4027 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
4029 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
4031 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
4033 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
4035 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
4037 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
4038 /* VMware ESXi OS. */
4039 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
4040 /* Microsoft Windows 8 64-bit OS. */
4041 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
4042 /* Microsoft Windows Server 2012 R2 OS. */
4043 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
4045 /* This is the major version of the driver. */
4047 /* This is the minor version of the driver. */
4049 /* This is the update version of the driver. */
4054 * This is a 32-bit timestamp provided by the driver for keep
4055 * alive. The timestamp is in multiples of 1ms.
4058 uint32_t vf_req_fwd[8];
4060 * This is a 256-bit bit mask provided by the PF driver for
4061 * letting the HWRM know what commands issued by the VF driver
4062 * to the HWRM should be forwarded to the PF driver. Nth bit
4063 * refers to the Nth req_type. Setting Nth bit to 1 indicates
4064 * that requests from the VF driver with req_type equal to N
4065 * shall be forwarded to the parent PF driver. This field is not
4066 * valid for the VF driver.
4068 uint32_t async_event_fwd[8];
4070 * This is a 256-bit bit mask provided by the function driver
4071 * (PF or VF driver) to indicate the list of asynchronous event
4072 * completions to be forwarded. Nth bit refers to the Nth
4073 * event_id. Setting Nth bit to 1 by the function driver shall
4074 * result in the HWRM forwarding asynchronous event completion
4075 * with event_id equal to N. If all bits are set to 0 (value of
4076 * 0), then the HWRM shall not forward any asynchronous event
4077 * completion to this function driver.
4079 } __attribute__((packed));
4081 /* Output (16 bytes) */
4082 struct hwrm_func_drv_rgtr_output {
4083 uint16_t error_code;
4085 * Pass/Fail or error type Note: receiver to verify the in
4086 * parameters, and fail the call with an error when appropriate
4089 /* This field returns the type of original request. */
4091 /* This field provides original sequence number of the command. */
4094 * This field is the length of the response in bytes. The last
4095 * byte of the response is a valid flag that will read as '1'
4096 * when the command has been completely written to memory.
4104 * This field is used in Output records to indicate that the
4105 * output is completely written to RAM. This field should be
4106 * read as '1' to indicate that the output has been completely
4107 * written. When writing a command completion or response to an
4108 * internal processor, the order of writes has to be such that
4109 * this field is written last.
4111 } __attribute__((packed));
4113 /* hwrm_func_drv_unrgtr */
4115 * Description: This command is used by the function driver to un register with
4116 * the HWRM. A function driver shall implement this command. A function driver
4117 * shall use this command during the driver unloading.
4119 /* Input (24 bytes) */
4120 struct hwrm_func_drv_unrgtr_input {
4123 * This value indicates what type of request this is. The format
4124 * for the rest of the command is determined by this field.
4128 * This value indicates the what completion ring the request
4129 * will be optionally completed on. If the value is -1, then no
4130 * CR completion will be generated. Any other value must be a
4131 * valid CR ring_id value for this function.
4134 /* This value indicates the command sequence number. */
4137 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4138 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4143 * This is the host address where the response will be written
4144 * when the request is complete. This area must be 16B aligned
4145 * and must be cleared to zero before the request is made.
4149 * When this bit is '1', the function driver is notifying the
4150 * HWRM to prepare for the shutdown.
4152 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4155 } __attribute__((packed));
4157 /* Output (16 bytes) */
4158 struct hwrm_func_drv_unrgtr_output {
4159 uint16_t error_code;
4161 * Pass/Fail or error type Note: receiver to verify the in
4162 * parameters, and fail the call with an error when appropriate
4165 /* This field returns the type of original request. */
4167 /* This field provides original sequence number of the command. */
4170 * This field is the length of the response in bytes. The last
4171 * byte of the response is a valid flag that will read as '1'
4172 * when the command has been completely written to memory.
4180 * This field is used in Output records to indicate that the
4181 * output is completely written to RAM. This field should be
4182 * read as '1' to indicate that the output has been completely
4183 * written. When writing a command completion or response to an
4184 * internal processor, the order of writes has to be such that
4185 * this field is written last.
4187 } __attribute__((packed));
4189 /* hwrm_func_buf_rgtr */
4191 * Description: This command is used by the PF driver to register buffers used
4192 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4193 * register buffers for each PF-VF channel. A parent PF may issue this command
4194 * per child VF. If VF ID is not valid, then this command is used to register
4195 * buffers for all children VFs of the PF.
4197 /* Input (128 bytes) */
4198 struct hwrm_func_buf_rgtr_input {
4201 * This value indicates what type of request this is. The format
4202 * for the rest of the command is determined by this field.
4206 * This value indicates the what completion ring the request
4207 * will be optionally completed on. If the value is -1, then no
4208 * CR completion will be generated. Any other value must be a
4209 * valid CR ring_id value for this function.
4212 /* This value indicates the command sequence number. */
4215 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4216 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4221 * This is the host address where the response will be written
4222 * when the request is complete. This area must be 16B aligned
4223 * and must be cleared to zero before the request is made.
4226 /* This bit must be '1' for the vf_id field to be configured. */
4227 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4228 /* This bit must be '1' for the err_buf_addr field to be configured. */
4229 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR UINT32_C(0x2)
4232 * This value is used to identify a Virtual Function (VF). The
4233 * scope of VF ID is local within a PF.
4235 uint16_t req_buf_num_pages;
4237 * This field represents the number of pages used for request
4240 uint16_t req_buf_page_size;
4241 /* This field represents the page size used for request buffer(s). */
4243 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_16B UINT32_C(0x4)
4245 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4K UINT32_C(0xc)
4247 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_8K UINT32_C(0xd)
4249 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_64K UINT32_C(0x10)
4251 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_2M UINT32_C(0x15)
4253 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4M UINT32_C(0x16)
4255 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
4256 uint16_t req_buf_len;
4257 /* The length of the request buffer per VF in bytes. */
4258 uint16_t resp_buf_len;
4259 /* The length of the response buffer in bytes. */
4262 uint64_t req_buf_page_addr[10];
4263 /* This field represents the page address of req buffer. */
4264 uint64_t error_buf_addr;
4266 * This field is used to receive the error reporting from the
4267 * chipset. Only applicable for PFs.
4269 uint64_t resp_buf_addr;
4270 /* This field is used to receive the response forwarded by the HWRM. */
4271 } __attribute__((packed));
4273 /* Output (16 bytes) */
4274 struct hwrm_func_buf_rgtr_output {
4275 uint16_t error_code;
4277 * Pass/Fail or error type Note: receiver to verify the in
4278 * parameters, and fail the call with an error when appropriate
4281 /* This field returns the type of original request. */
4283 /* This field provides original sequence number of the command. */
4286 * This field is the length of the response in bytes. The last
4287 * byte of the response is a valid flag that will read as '1'
4288 * when the command has been completely written to memory.
4296 * This field is used in Output records to indicate that the
4297 * output is completely written to RAM. This field should be
4298 * read as '1' to indicate that the output has been completely
4299 * written. When writing a command completion or response to an
4300 * internal processor, the order of writes has to be such that
4301 * this field is written last.
4303 } __attribute__((packed));
4305 /* hwrm_func_buf_unrgtr */
4307 * Description: This command is used by the PF driver to unregister buffers used
4308 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4309 * unregister buffers for PF-VF communication. A parent PF may issue this
4310 * command to unregister buffers for communication between the PF and a specific
4311 * VF. If the VF ID is not valid, then this command is used to unregister
4312 * buffers used for communications with all children VFs of the PF.
4314 /* Input (24 bytes) */
4315 struct hwrm_func_buf_unrgtr_input {
4318 * This value indicates what type of request this is. The format
4319 * for the rest of the command is determined by this field.
4323 * This value indicates the what completion ring the request
4324 * will be optionally completed on. If the value is -1, then no
4325 * CR completion will be generated. Any other value must be a
4326 * valid CR ring_id value for this function.
4329 /* This value indicates the command sequence number. */
4332 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4333 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4338 * This is the host address where the response will be written
4339 * when the request is complete. This area must be 16B aligned
4340 * and must be cleared to zero before the request is made.
4343 /* This bit must be '1' for the vf_id field to be configured. */
4344 #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4347 * This value is used to identify a Virtual Function (VF). The
4348 * scope of VF ID is local within a PF.
4351 } __attribute__((packed));
4353 /* Output (16 bytes) */
4354 struct hwrm_func_buf_unrgtr_output {
4355 uint16_t error_code;
4357 * Pass/Fail or error type Note: receiver to verify the in
4358 * parameters, and fail the call with an error when appropriate
4361 /* This field returns the type of original request. */
4363 /* This field provides original sequence number of the command. */
4366 * This field is the length of the response in bytes. The last
4367 * byte of the response is a valid flag that will read as '1'
4368 * when the command has been completely written to memory.
4376 * This field is used in Output records to indicate that the
4377 * output is completely written to RAM. This field should be
4378 * read as '1' to indicate that the output has been completely
4379 * written. When writing a command completion or response to an
4380 * internal processor, the order of writes has to be such that
4381 * this field is written last.
4383 } __attribute__((packed));
4385 /* hwrm_port_phy_cfg */
4387 * Description: This command configures the PHY device for the port. It allows
4388 * setting of the most generic settings for the PHY. The HWRM shall complete
4389 * this command as soon as PHY settings are configured. They may not be applied
4390 * when the command response is provided. A VF driver shall not be allowed to
4391 * configure PHY using this command. In a network partition mode, a PF driver
4392 * shall not be allowed to configure PHY using this command.
4394 /* Input (56 bytes) */
4395 struct hwrm_port_phy_cfg_input {
4398 * This value indicates what type of request this is. The format
4399 * for the rest of the command is determined by this field.
4403 * This value indicates the what completion ring the request
4404 * will be optionally completed on. If the value is -1, then no
4405 * CR completion will be generated. Any other value must be a
4406 * valid CR ring_id value for this function.
4409 /* This value indicates the command sequence number. */
4412 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4413 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4418 * This is the host address where the response will be written
4419 * when the request is complete. This area must be 16B aligned
4420 * and must be cleared to zero before the request is made.
4424 * When this bit is set to '1', the PHY for the port shall be
4425 * reset. # If this bit is set to 1, then the HWRM shall reset
4426 * the PHY after applying PHY configuration changes specified in
4427 * this command. # In order to guarantee that PHY configuration
4428 * changes specified in this command take effect, the HWRM
4429 * client should set this flag to 1. # If this bit is not set to
4430 * 1, then the HWRM may reset the PHY depending on the current
4431 * PHY configuration and settings specified in this command.
4433 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
4434 /* deprecated bit. Do not use!!! */
4435 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_DEPRECATED UINT32_C(0x2)
4437 * When this bit is set to '1', the link shall be forced to the
4438 * force_link_speed value. When this bit is set to '1', the HWRM
4439 * client should not enable any of the auto negotiation related
4440 * fields represented by auto_XXX fields in this command. When
4441 * this bit is set to '1' and the HWRM client has enabled a
4442 * auto_XXX field in this command, then the HWRM shall ignore
4443 * the enabled auto_XXX field. When this bit is set to zero, the
4444 * link shall be allowed to autoneg.
4446 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
4448 * When this bit is set to '1', the auto-negotiation process
4449 * shall be restarted on the link.
4451 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
4453 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4454 * is requested to be enabled on this link. If EEE is not
4455 * supported on this port, then this flag shall be ignored by
4458 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
4460 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4461 * is requested to be disabled on this link. If EEE is not
4462 * supported on this port, then this flag shall be ignored by
4465 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
4467 * When this bit is set to '1' and EEE is enabled on this link,
4468 * then TX LPI is requested to be enabled on the link. If EEE is
4469 * not supported on this port, then this flag shall be ignored
4470 * by the HWRM. If EEE is disabled on this port, then this flag
4471 * shall be ignored by the HWRM.
4473 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
4475 * When this bit is set to '1' and EEE is enabled on this link,
4476 * then TX LPI is requested to be disabled on the link. If EEE
4477 * is not supported on this port, then this flag shall be
4478 * ignored by the HWRM. If EEE is disabled on this port, then
4479 * this flag shall be ignored by the HWRM.
4481 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
4483 * When set to 1, then the HWRM shall enable FEC
4484 * autonegotitation on this port if supported. When set to 0,
4485 * then this flag shall be ignored. If FEC autonegotiation is
4486 * not supported, then the HWRM shall ignore this flag.
4488 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
4490 * When set to 1, then the HWRM shall disable FEC
4491 * autonegotiation on this port if supported. When set to 0,
4492 * then this flag shall be ignored. If FEC autonegotiation is
4493 * not supported, then the HWRM shall ignore this flag.
4495 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE \
4498 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
4499 * Code) on this port if supported. When set to 0, then this
4500 * flag shall be ignored. If FEC CLAUSE 74 is not supported,
4501 * then the HWRM shall ignore this flag.
4503 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE \
4506 * When set to 1, then the HWRM shall disable FEC CLAUSE 74
4507 * (Fire Code) on this port if supported. When set to 0, then
4508 * this flag shall be ignored. If FEC CLAUSE 74 is not
4509 * supported, then the HWRM shall ignore this flag.
4511 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE \
4514 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
4515 * Solomon) on this port if supported. When set to 0, then this
4516 * flag shall be ignored. If FEC CLAUSE 91 is not supported,
4517 * then the HWRM shall ignore this flag.
4519 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE \
4522 * When set to 1, then the HWRM shall disable FEC CLAUSE 91
4523 * (Reed Solomon) on this port if supported. When set to 0, then
4524 * this flag shall be ignored. If FEC CLAUSE 91 is not
4525 * supported, then the HWRM shall ignore this flag.
4527 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE \
4530 * When this bit is set to '1', the link shall be forced to be
4531 * taken down. # When this bit is set to '1", all other command
4532 * input settings related to the link speed shall be ignored.
4533 * Once the link state is forced down, it can be explicitly
4534 * cleared from that state by setting this flag to '0'. # If
4535 * this flag is set to '0', then the link shall be cleared from
4536 * forced down state if the link is in forced down state. There
4537 * may be conditions (e.g. out-of-band or sideband configuration
4538 * changes for the link) outside the scope of the HWRM
4539 * implementation that may clear forced down link state.
4541 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN UINT32_C(0x4000)
4543 /* This bit must be '1' for the auto_mode field to be configured. */
4544 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
4545 /* This bit must be '1' for the auto_duplex field to be configured. */
4546 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
4547 /* This bit must be '1' for the auto_pause field to be configured. */
4548 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
4550 * This bit must be '1' for the auto_link_speed field to be
4553 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
4555 * This bit must be '1' for the auto_link_speed_mask field to be
4558 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
4560 /* This bit must be '1' for the wirespeed field to be configured. */
4561 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
4562 /* This bit must be '1' for the lpbk field to be configured. */
4563 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
4564 /* This bit must be '1' for the preemphasis field to be configured. */
4565 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
4566 /* This bit must be '1' for the force_pause field to be configured. */
4567 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
4569 * This bit must be '1' for the eee_link_speed_mask field to be
4572 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
4574 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
4575 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
4577 /* Port ID of port that is to be configured. */
4578 uint16_t force_link_speed;
4580 * This is the speed that will be used if the force bit is '1'.
4581 * If unsupported speed is selected, an error will be generated.
4583 /* 100Mb link speed */
4584 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4585 /* 1Gb link speed */
4586 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4587 /* 2Gb link speed */
4588 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4589 /* 2.5Gb link speed */
4590 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4591 /* 10Gb link speed */
4592 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4593 /* 20Mb link speed */
4594 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4595 /* 25Gb link speed */
4596 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4597 /* 40Gb link speed */
4598 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4599 /* 50Gb link speed */
4600 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
4601 /* 100Gb link speed */
4602 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
4603 /* 10Mb link speed */
4604 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
4607 * This value is used to identify what autoneg mode is used when
4608 * the link speed is not being forced.
4611 * Disable autoneg or autoneg disabled. No
4612 * speeds are selected.
4614 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
4615 /* Select all possible speeds for autoneg mode. */
4616 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
4618 * Select only the auto_link_speed speed for
4619 * autoneg mode. This mode has been DEPRECATED.
4620 * An HWRM client should not use this mode.
4622 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
4624 * Select the auto_link_speed or any speed below
4625 * that speed for autoneg. This mode has been
4626 * DEPRECATED. An HWRM client should not use
4629 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
4631 * Select the speeds based on the corresponding
4632 * link speed mask value that is provided.
4634 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
4635 uint8_t auto_duplex;
4637 * This is the duplex setting that will be used if the
4638 * autoneg_mode is "one_speed" or "one_or_below".
4640 /* Half Duplex will be requested. */
4641 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
4642 /* Full duplex will be requested. */
4643 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
4644 /* Both Half and Full dupex will be requested. */
4645 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
4648 * This value is used to configure the pause that will be used
4649 * for autonegotiation. Add text on the usage of auto_pause and
4653 * When this bit is '1', Generation of tx pause messages has
4654 * been requested. Disabled otherwise.
4656 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
4658 * When this bit is '1', Reception of rx pause messages has been
4659 * requested. Disabled otherwise.
4661 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
4663 * When set to 1, the advertisement of pause is enabled. # When
4664 * the auto_mode is not set to none and this flag is set to 1,
4665 * then the auto_pause bits on this port are being advertised
4666 * and autoneg pause results are being interpreted. # When the
4667 * auto_mode is not set to none and this flag is set to 0, the
4668 * pause is forced as indicated in force_pause, and also
4669 * advertised as auto_pause bits, but the autoneg results are
4670 * not interpreted since the pause configuration is being
4671 * forced. # When the auto_mode is set to none and this flag is
4672 * set to 1, auto_pause bits should be ignored and should be set
4675 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
4677 uint16_t auto_link_speed;
4679 * This is the speed that will be used if the autoneg_mode is
4680 * "one_speed" or "one_or_below". If an unsupported speed is
4681 * selected, an error will be generated.
4683 /* 100Mb link speed */
4684 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
4685 /* 1Gb link speed */
4686 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
4687 /* 2Gb link speed */
4688 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
4689 /* 2.5Gb link speed */
4690 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
4691 /* 10Gb link speed */
4692 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
4693 /* 20Mb link speed */
4694 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
4695 /* 25Gb link speed */
4696 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
4697 /* 40Gb link speed */
4698 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
4699 /* 50Gb link speed */
4700 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
4701 /* 100Gb link speed */
4702 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
4703 /* 10Mb link speed */
4704 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
4705 uint16_t auto_link_speed_mask;
4707 * This is a mask of link speeds that will be used if
4708 * autoneg_mode is "mask". If unsupported speed is enabled an
4709 * error will be generated.
4711 /* 100Mb link speed (Half-duplex) */
4712 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
4714 /* 100Mb link speed (Full-duplex) */
4715 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
4717 /* 1Gb link speed (Half-duplex) */
4718 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
4720 /* 1Gb link speed (Full-duplex) */
4721 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
4723 /* 2Gb link speed */
4724 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
4726 /* 2.5Gb link speed */
4727 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
4729 /* 10Gb link speed */
4730 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4731 /* 20Gb link speed */
4732 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
4733 /* 25Gb link speed */
4734 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
4736 /* 40Gb link speed */
4737 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
4739 /* 50Gb link speed */
4740 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
4742 /* 100Gb link speed */
4743 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
4745 /* 10Mb link speed (Half-duplex) */
4746 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
4748 /* 10Mb link speed (Full-duplex) */
4749 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
4752 /* This value controls the wirespeed feature. */
4753 /* Wirespeed feature is disabled. */
4754 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
4755 /* Wirespeed feature is enabled. */
4756 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1)
4758 /* This value controls the loopback setting for the PHY. */
4759 /* No loopback is selected. Normal operation. */
4760 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
4762 * The HW will be configured with local loopback
4763 * such that host data is sent back to the host
4764 * without modification.
4766 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
4768 * The HW will be configured with remote
4769 * loopback such that port logic will send
4770 * packets back out the transmitter that are
4773 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
4774 uint8_t force_pause;
4776 * This value is used to configure the pause that will be used
4780 * When this bit is '1', Generation of tx pause messages is
4781 * supported. Disabled otherwise.
4783 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
4785 * When this bit is '1', Reception of rx pause messages is
4786 * supported. Disabled otherwise.
4788 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
4790 uint32_t preemphasis;
4792 * This value controls the pre-emphasis to be used for the link.
4793 * Driver should not set this value (use enable.preemphasis = 0)
4794 * unless driver is sure of setting. Normally HWRM FW will
4795 * determine proper pre-emphasis.
4797 uint16_t eee_link_speed_mask;
4799 * Setting for link speed mask that is used to advertise speeds
4800 * during autonegotiation when EEE is enabled. This field is
4801 * valid only when EEE is enabled. The speeds specified in this
4802 * field shall be a subset of speeds specified in
4803 * auto_link_speed_mask. If EEE is enabled,then at least one
4804 * speed shall be provided in this mask.
4807 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
4808 /* 100Mb link speed (Full-duplex) */
4809 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
4811 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
4812 /* 1Gb link speed (Full-duplex) */
4813 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
4815 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
4817 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
4818 /* 10Gb link speed */
4819 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4822 uint32_t tx_lpi_timer;
4825 * Reuested setting of TX LPI timer in microseconds. This field
4826 * is valid only when EEE is enabled and TX LPI is enabled.
4828 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
4829 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
4830 } __attribute__((packed));
4832 /* Output (16 bytes) */
4833 struct hwrm_port_phy_cfg_output {
4834 uint16_t error_code;
4836 * Pass/Fail or error type Note: receiver to verify the in
4837 * parameters, and fail the call with an error when appropriate
4840 /* This field returns the type of original request. */
4842 /* This field provides original sequence number of the command. */
4845 * This field is the length of the response in bytes. The last
4846 * byte of the response is a valid flag that will read as '1'
4847 * when the command has been completely written to memory.
4855 * This field is used in Output records to indicate that the
4856 * output is completely written to RAM. This field should be
4857 * read as '1' to indicate that the output has been completely
4858 * written. When writing a command completion or response to an
4859 * internal processor, the order of writes has to be such that
4860 * this field is written last.
4862 } __attribute__((packed));
4864 /* hwrm_port_phy_qcfg */
4865 /* Description: This command queries the PHY configuration for the port. */
4866 /* Input (24 bytes) */
4867 struct hwrm_port_phy_qcfg_input {
4870 * This value indicates what type of request this is. The format
4871 * for the rest of the command is determined by this field.
4875 * This value indicates the what completion ring the request
4876 * will be optionally completed on. If the value is -1, then no
4877 * CR completion will be generated. Any other value must be a
4878 * valid CR ring_id value for this function.
4881 /* This value indicates the command sequence number. */
4884 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4885 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4890 * This is the host address where the response will be written
4891 * when the request is complete. This area must be 16B aligned
4892 * and must be cleared to zero before the request is made.
4895 /* Port ID of port that is to be queried. */
4896 uint16_t unused_0[3];
4897 } __attribute__((packed));
4899 /* Output (96 bytes) */
4900 struct hwrm_port_phy_qcfg_output {
4901 uint16_t error_code;
4903 * Pass/Fail or error type Note: receiver to verify the in
4904 * parameters, and fail the call with an error when appropriate
4907 /* This field returns the type of original request. */
4909 /* This field provides original sequence number of the command. */
4912 * This field is the length of the response in bytes. The last
4913 * byte of the response is a valid flag that will read as '1'
4914 * when the command has been completely written to memory.
4917 /* This value indicates the current link status. */
4918 /* There is no link or cable detected. */
4919 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
4920 /* There is no link, but a cable has been detected. */
4921 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
4922 /* There is a link. */
4923 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
4925 uint16_t link_speed;
4926 /* This value indicates the current link speed of the connection. */
4927 /* 100Mb link speed */
4928 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
4929 /* 1Gb link speed */
4930 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
4931 /* 2Gb link speed */
4932 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
4933 /* 2.5Gb link speed */
4934 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
4935 /* 10Gb link speed */
4936 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
4937 /* 20Mb link speed */
4938 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
4939 /* 25Gb link speed */
4940 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
4941 /* 40Gb link speed */
4942 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
4943 /* 50Gb link speed */
4944 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
4945 /* 100Gb link speed */
4946 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
4947 /* 10Mb link speed */
4948 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
4950 /* This value is indicates the duplex of the current connection. */
4951 /* Half Duplex connection. */
4952 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_HALF UINT32_C(0x0)
4953 /* Full duplex connection. */
4954 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_FULL UINT32_C(0x1)
4957 * This value is used to indicate the current pause
4958 * configuration. When autoneg is enabled, this value represents
4959 * the autoneg results of pause configuration.
4962 * When this bit is '1', Generation of tx pause messages is
4963 * supported. Disabled otherwise.
4965 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
4967 * When this bit is '1', Reception of rx pause messages is
4968 * supported. Disabled otherwise.
4970 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
4971 uint16_t support_speeds;
4973 * The supported speeds for the port. This is a bit mask. For
4974 * each speed that is supported, the corrresponding bit will be
4977 /* 100Mb link speed (Half-duplex) */
4978 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
4979 /* 100Mb link speed (Full-duplex) */
4980 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
4981 /* 1Gb link speed (Half-duplex) */
4982 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
4983 /* 1Gb link speed (Full-duplex) */
4984 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
4985 /* 2Gb link speed */
4986 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
4987 /* 2.5Gb link speed */
4988 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
4989 /* 10Gb link speed */
4990 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
4991 /* 20Gb link speed */
4992 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
4993 /* 25Gb link speed */
4994 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
4995 /* 40Gb link speed */
4996 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
4997 /* 50Gb link speed */
4998 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
4999 /* 100Gb link speed */
5000 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
5001 /* 10Mb link speed (Half-duplex) */
5002 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
5003 /* 10Mb link speed (Full-duplex) */
5004 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
5005 uint16_t force_link_speed;
5007 * Current setting of forced link speed. When the link speed is
5008 * not being forced, this value shall be set to 0.
5010 /* 100Mb link speed */
5011 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
5012 /* 1Gb link speed */
5013 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
5014 /* 2Gb link speed */
5015 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
5016 /* 2.5Gb link speed */
5017 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
5018 /* 10Gb link speed */
5019 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
5020 /* 20Mb link speed */
5021 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
5022 /* 25Gb link speed */
5023 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
5024 /* 40Gb link speed */
5025 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
5026 /* 50Gb link speed */
5027 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
5028 /* 100Gb link speed */
5029 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
5030 /* 10Mb link speed */
5031 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
5033 /* Current setting of auto negotiation mode. */
5035 * Disable autoneg or autoneg disabled. No
5036 * speeds are selected.
5038 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
5039 /* Select all possible speeds for autoneg mode. */
5040 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
5042 * Select only the auto_link_speed speed for
5043 * autoneg mode. This mode has been DEPRECATED.
5044 * An HWRM client should not use this mode.
5046 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
5048 * Select the auto_link_speed or any speed below
5049 * that speed for autoneg. This mode has been
5050 * DEPRECATED. An HWRM client should not use
5053 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
5055 * Select the speeds based on the corresponding
5056 * link speed mask value that is provided.
5058 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
5061 * Current setting of pause autonegotiation. Move autoneg_pause
5065 * When this bit is '1', Generation of tx pause messages has
5066 * been requested. Disabled otherwise.
5068 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
5070 * When this bit is '1', Reception of rx pause messages has been
5071 * requested. Disabled otherwise.
5073 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
5075 * When set to 1, the advertisement of pause is enabled. # When
5076 * the auto_mode is not set to none and this flag is set to 1,
5077 * then the auto_pause bits on this port are being advertised
5078 * and autoneg pause results are being interpreted. # When the
5079 * auto_mode is not set to none and this flag is set to 0, the
5080 * pause is forced as indicated in force_pause, and also
5081 * advertised as auto_pause bits, but the autoneg results are
5082 * not interpreted since the pause configuration is being
5083 * forced. # When the auto_mode is set to none and this flag is
5084 * set to 1, auto_pause bits should be ignored and should be set
5087 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
5088 uint16_t auto_link_speed;
5090 * Current setting for auto_link_speed. This field is only valid
5091 * when auto_mode is set to "one_speed" or "one_or_below".
5093 /* 100Mb link speed */
5094 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
5095 /* 1Gb link speed */
5096 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
5097 /* 2Gb link speed */
5098 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
5099 /* 2.5Gb link speed */
5100 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
5101 /* 10Gb link speed */
5102 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
5103 /* 20Mb link speed */
5104 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
5105 /* 25Gb link speed */
5106 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
5107 /* 40Gb link speed */
5108 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
5109 /* 50Gb link speed */
5110 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
5111 /* 100Gb link speed */
5112 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
5113 /* 10Mb link speed */
5114 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
5115 uint16_t auto_link_speed_mask;
5117 * Current setting for auto_link_speed_mask that is used to
5118 * advertise speeds during autonegotiation. This field is only
5119 * valid when auto_mode is set to "mask". The speeds specified
5120 * in this field shall be a subset of supported speeds on this
5123 /* 100Mb link speed (Half-duplex) */
5124 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
5126 /* 100Mb link speed (Full-duplex) */
5127 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
5129 /* 1Gb link speed (Half-duplex) */
5130 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
5132 /* 1Gb link speed (Full-duplex) */
5133 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
5134 /* 2Gb link speed */
5135 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
5137 /* 2.5Gb link speed */
5138 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
5140 /* 10Gb link speed */
5141 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
5143 /* 20Gb link speed */
5144 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
5146 /* 25Gb link speed */
5147 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
5149 /* 40Gb link speed */
5150 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
5152 /* 50Gb link speed */
5153 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
5155 /* 100Gb link speed */
5156 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
5158 /* 10Mb link speed (Half-duplex) */
5159 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
5161 /* 10Mb link speed (Full-duplex) */
5162 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
5165 /* Current setting for wirespeed. */
5166 /* Wirespeed feature is disabled. */
5167 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
5168 /* Wirespeed feature is enabled. */
5169 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1)
5171 /* Current setting for loopback. */
5172 /* No loopback is selected. Normal operation. */
5173 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
5175 * The HW will be configured with local loopback
5176 * such that host data is sent back to the host
5177 * without modification.
5179 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
5181 * The HW will be configured with remote
5182 * loopback such that port logic will send
5183 * packets back out the transmitter that are
5186 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
5187 uint8_t force_pause;
5189 * Current setting of forced pause. When the pause configuration
5190 * is not being forced, then this value shall be set to 0.
5193 * When this bit is '1', Generation of tx pause messages is
5194 * supported. Disabled otherwise.
5196 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
5198 * When this bit is '1', Reception of rx pause messages is
5199 * supported. Disabled otherwise.
5201 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
5202 uint8_t module_status;
5204 * This value indicates the current status of the optics module
5207 /* Module is inserted and accepted */
5208 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
5209 /* Module is rejected and transmit side Laser is disabled. */
5210 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
5211 /* Module mismatch warning. */
5212 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
5213 /* Module is rejected and powered down. */
5214 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
5215 /* Module is not inserted. */
5216 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
5218 /* Module status is not applicable. */
5219 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
5221 uint32_t preemphasis;
5222 /* Current setting for preemphasis. */
5224 /* This field represents the major version of the PHY. */
5226 /* This field represents the minor version of the PHY. */
5228 /* This field represents the build version of the PHY. */
5230 /* This value represents a PHY type. */
5232 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
5234 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
5235 /* BASE-KR4 (Deprecated) */
5236 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
5238 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
5240 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
5241 /* BASE-KR2 (Deprecated) */
5242 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
5244 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
5246 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
5248 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
5249 /* EEE capable BASE-T */
5250 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
5251 /* SGMII connected external PHY */
5252 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
5253 /* 25G_BASECR_CA_L */
5254 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L UINT32_C(0xb)
5255 /* 25G_BASECR_CA_S */
5256 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S UINT32_C(0xc)
5257 /* 25G_BASECR_CA_N */
5258 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N UINT32_C(0xd)
5260 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR UINT32_C(0xe)
5262 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4 UINT32_C(0xf)
5264 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4 UINT32_C(0x10)
5266 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4 UINT32_C(0x11)
5268 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4 UINT32_C(0x12)
5270 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10 UINT32_C(0x13)
5272 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4 UINT32_C(0x14)
5274 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4 UINT32_C(0x15)
5276 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4 UINT32_C(0x16)
5278 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4 UINT32_C(0x17)
5279 /* 40G_ACTIVE_CABLE */
5280 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE \
5282 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASET UINT32_C(0x19)
5284 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASESX UINT32_C(0x1a)
5286 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASECX UINT32_C(0x1b)
5288 /* This value represents a media type. */
5290 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
5292 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
5293 /* Direct Attached Copper */
5294 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
5296 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
5297 uint8_t xcvr_pkg_type;
5298 /* This value represents a transceiver type. */
5299 /* PHY and MAC are in the same package */
5300 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
5302 /* PHY and MAC are in different packages */
5303 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
5305 uint8_t eee_config_phy_addr;
5307 * This field represents flags related to EEE configuration.
5308 * These EEE configuration flags are valid only when the
5309 * auto_mode is not set to none (in other words autonegotiation
5312 /* This field represents PHY address. */
5313 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
5314 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
5316 * When set to 1, Energy Efficient Ethernet (EEE) mode is
5317 * enabled. Speeds for autoneg with EEE mode enabled are based
5318 * on eee_link_speed_mask.
5320 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
5322 * This flag is valid only when eee_enabled is set to 1. # If
5323 * eee_enabled is set to 0, then EEE mode is disabled and this
5324 * flag shall be ignored. # If eee_enabled is set to 1 and this
5325 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5326 * is enabled and in use. # If eee_enabled is set to 1 and this
5327 * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
5328 * is enabled but is currently not in use.
5330 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
5332 * This flag is valid only when eee_enabled is set to 1. # If
5333 * eee_enabled is set to 0, then EEE mode is disabled and this
5334 * flag shall be ignored. # If eee_enabled is set to 1 and this
5335 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5336 * is enabled and TX LPI is enabled. # If eee_enabled is set to
5337 * 1 and this flag is set to 0, then Energy Efficient Ethernet
5338 * (EEE) mode is enabled but TX LPI is disabled.
5340 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
5342 * This field represents flags related to EEE configuration.
5343 * These EEE configuration flags are valid only when the
5344 * auto_mode is not set to none (in other words autonegotiation
5347 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
5348 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
5349 uint8_t parallel_detect;
5350 /* Reserved field, set to 0 */
5352 * When set to 1, the parallel detection is used to determine
5353 * the speed of the link partner. Parallel detection is used
5354 * when a autonegotiation capable device is connected to a link
5355 * parter that is not capable of autonegotiation.
5357 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
5358 /* Reserved field, set to 0 */
5359 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
5360 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
5361 uint16_t link_partner_adv_speeds;
5363 * The advertised speeds for the port by the link partner. Each
5364 * advertised speed will be set to '1'.
5366 /* 100Mb link speed (Half-duplex) */
5367 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
5369 /* 100Mb link speed (Full-duplex) */
5370 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
5372 /* 1Gb link speed (Half-duplex) */
5373 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
5375 /* 1Gb link speed (Full-duplex) */
5376 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
5378 /* 2Gb link speed */
5379 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
5381 /* 2.5Gb link speed */
5382 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
5384 /* 10Gb link speed */
5385 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
5387 /* 20Gb link speed */
5388 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
5390 /* 25Gb link speed */
5391 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
5393 /* 40Gb link speed */
5394 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
5396 /* 50Gb link speed */
5397 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
5399 /* 100Gb link speed */
5400 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
5402 /* 10Mb link speed (Half-duplex) */
5403 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
5405 /* 10Mb link speed (Full-duplex) */
5406 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
5408 uint8_t link_partner_adv_auto_mode;
5410 * The advertised autoneg for the port by the link partner. This
5411 * field is deprecated and should be set to 0.
5414 * Disable autoneg or autoneg disabled. No
5415 * speeds are selected.
5417 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
5419 /* Select all possible speeds for autoneg mode. */
5421 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
5424 * Select only the auto_link_speed speed for
5425 * autoneg mode. This mode has been DEPRECATED.
5426 * An HWRM client should not use this mode.
5429 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
5432 * Select the auto_link_speed or any speed below
5433 * that speed for autoneg. This mode has been
5434 * DEPRECATED. An HWRM client should not use
5438 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
5441 * Select the speeds based on the corresponding
5442 * link speed mask value that is provided.
5445 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
5447 uint8_t link_partner_adv_pause;
5448 /* The advertised pause settings on the port by the link partner. */
5450 * When this bit is '1', Generation of tx pause messages is
5451 * supported. Disabled otherwise.
5453 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
5456 * When this bit is '1', Reception of rx pause messages is
5457 * supported. Disabled otherwise.
5459 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
5461 uint16_t adv_eee_link_speed_mask;
5463 * Current setting for link speed mask that is used to advertise
5464 * speeds during autonegotiation when EEE is enabled. This field
5465 * is valid only when eee_enabled flags is set to 1. The speeds
5466 * specified in this field shall be a subset of speeds specified
5467 * in auto_link_speed_mask.
5470 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5472 /* 100Mb link speed (Full-duplex) */
5473 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
5476 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5478 /* 1Gb link speed (Full-duplex) */
5479 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
5482 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5485 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5487 /* 10Gb link speed */
5488 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
5490 uint16_t link_partner_adv_eee_link_speed_mask;
5492 * Current setting for link speed mask that is advertised by the
5493 * link partner when EEE is enabled. This field is valid only
5494 * when eee_enabled flags is set to 1.
5498 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5500 /* 100Mb link speed (Full-duplex) */
5502 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
5506 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5508 /* 1Gb link speed (Full-duplex) */
5510 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
5514 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5518 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5520 /* 10Gb link speed */
5522 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
5524 uint32_t xcvr_identifier_type_tx_lpi_timer;
5525 /* This value represents transceiver identifier type. */
5527 * Current setting of TX LPI timer in microseconds. This field
5528 * is valid only when_eee_enabled flag is set to 1 and
5529 * tx_lpi_enabled is set to 1.
5531 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
5532 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
5533 /* This value represents transceiver identifier type. */
5534 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
5535 UINT32_C(0xff000000)
5536 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
5538 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
5539 (UINT32_C(0x0) << 24)
5540 /* SFP/SFP+/SFP28 */
5541 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
5542 (UINT32_C(0x3) << 24)
5544 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
5545 (UINT32_C(0xc) << 24)
5547 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
5548 (UINT32_C(0xd) << 24)
5550 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
5551 (UINT32_C(0x11) << 24)
5554 * This value represents the current configuration of Forward
5555 * Error Correction (FEC) on the port.
5558 * When set to 1, then FEC is not supported on this port. If
5559 * this flag is set to 1, then all other FEC configuration flags
5560 * shall be ignored. When set to 0, then FEC is supported as
5561 * indicated by other configuration flags. If no cable is
5562 * attached and the HWRM does not yet know the FEC capability,
5563 * then the HWRM shall set this flag to 1 when reporting FEC
5566 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
5569 * When set to 1, then FEC autonegotiation is supported on this
5570 * port. When set to 0, then FEC autonegotiation is not
5571 * supported on this port.
5573 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \
5576 * When set to 1, then FEC autonegotiation is enabled on this
5577 * port. When set to 0, then FEC autonegotiation is disabled if
5578 * supported. This flag should be ignored if FEC autonegotiation
5579 * is not supported on this port.
5581 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
5584 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
5585 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5586 * not supported on this port.
5588 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
5591 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
5592 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5593 * disabled if supported. This flag should be ignored if FEC
5594 * CLAUSE 74 is not supported on this port.
5596 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
5599 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
5600 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5601 * Solomon) is not supported on this port.
5603 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
5606 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
5607 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5608 * Solomon) is disabled if supported. This flag should be
5609 * ignored if FEC CLAUSE 91 is not supported on this port.
5611 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \
5613 uint8_t duplex_state;
5615 * This value is indicates the duplex of the current connection
5618 /* Half Duplex connection. */
5619 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_STATE_HALF UINT32_C(0x0)
5620 /* Full duplex connection. */
5621 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_STATE_FULL UINT32_C(0x1)
5623 char phy_vendor_name[16];
5625 * Up to 16 bytes of null padded ASCII string representing PHY
5626 * vendor. If the string is set to null, then the vendor name is
5629 char phy_vendor_partnumber[16];
5631 * Up to 16 bytes of null padded ASCII string that identifies
5632 * vendor specific part number of the PHY. If the string is set
5633 * to null, then the vendor specific part number is not
5642 * This field is used in Output records to indicate that the
5643 * output is completely written to RAM. This field should be
5644 * read as '1' to indicate that the output has been completely
5645 * written. When writing a command completion or response to an
5646 * internal processor, the order of writes has to be such that
5647 * this field is written last.
5649 } __attribute__((packed));
5651 /* hwrm_port_qstats */
5652 /* Description: This function returns per port Ethernet statistics. */
5653 /* Input (40 bytes) */
5654 struct hwrm_port_qstats_input {
5657 * This value indicates what type of request this is. The format
5658 * for the rest of the command is determined by this field.
5662 * This value indicates the what completion ring the request
5663 * will be optionally completed on. If the value is -1, then no
5664 * CR completion will be generated. Any other value must be a
5665 * valid CR ring_id value for this function.
5668 /* This value indicates the command sequence number. */
5671 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5672 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5677 * This is the host address where the response will be written
5678 * when the request is complete. This area must be 16B aligned
5679 * and must be cleared to zero before the request is made.
5682 /* Port ID of port that is being queried. */
5685 uint8_t unused_2[3];
5687 uint64_t tx_stat_host_addr;
5688 /* This is the host address where Tx port statistics will be stored */
5689 uint64_t rx_stat_host_addr;
5690 /* This is the host address where Rx port statistics will be stored */
5691 } __attribute__((packed));
5693 /* Output (16 bytes) */
5694 struct hwrm_port_qstats_output {
5695 uint16_t error_code;
5697 * Pass/Fail or error type Note: receiver to verify the in
5698 * parameters, and fail the call with an error when appropriate
5701 /* This field returns the type of original request. */
5703 /* This field provides original sequence number of the command. */
5706 * This field is the length of the response in bytes. The last
5707 * byte of the response is a valid flag that will read as '1'
5708 * when the command has been completely written to memory.
5710 uint16_t tx_stat_size;
5711 /* The size of TX port statistics block in bytes. */
5712 uint16_t rx_stat_size;
5713 /* The size of RX port statistics block in bytes. */
5719 * This field is used in Output records to indicate that the
5720 * output is completely written to RAM. This field should be
5721 * read as '1' to indicate that the output has been completely
5722 * written. When writing a command completion or response to an
5723 * internal processor, the order of writes has to be such that
5724 * this field is written last.
5726 } __attribute__((packed));
5728 /* hwrm_port_clr_stats */
5730 * Description: This function clears per port statistics. The HWRM shall not
5731 * allow a VF driver to clear port statistics. The HWRM shall not allow a PF
5732 * driver to clear port statistics in a partitioning mode. The HWRM may allow a
5733 * PF driver to clear port statistics in the non-partitioning mode.
5735 /* Input (24 bytes) */
5736 struct hwrm_port_clr_stats_input {
5739 * This value indicates what type of request this is. The format
5740 * for the rest of the command is determined by this field.
5744 * This value indicates the what completion ring the request
5745 * will be optionally completed on. If the value is -1, then no
5746 * CR completion will be generated. Any other value must be a
5747 * valid CR ring_id value for this function.
5750 /* This value indicates the command sequence number. */
5753 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5754 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5759 * This is the host address where the response will be written
5760 * when the request is complete. This area must be 16B aligned
5761 * and must be cleared to zero before the request is made.
5764 /* Port ID of port that is being queried. */
5765 uint16_t unused_0[3];
5766 } __attribute__((packed));
5768 /* Output (16 bytes) */
5769 struct hwrm_port_clr_stats_output {
5770 uint16_t error_code;
5772 * Pass/Fail or error type Note: receiver to verify the in
5773 * parameters, and fail the call with an error when appropriate
5776 /* This field returns the type of original request. */
5778 /* This field provides original sequence number of the command. */
5781 * This field is the length of the response in bytes. The last
5782 * byte of the response is a valid flag that will read as '1'
5783 * when the command has been completely written to memory.
5791 * This field is used in Output records to indicate that the
5792 * output is completely written to RAM. This field should be
5793 * read as '1' to indicate that the output has been completely
5794 * written. When writing a command completion or response to an
5795 * internal processor, the order of writes has to be such that
5796 * this field is written last.
5798 } __attribute__((packed));
5800 /* hwrm_port_led_cfg */
5802 * Description: This function is used to configure LEDs on a given port. Each
5803 * port has individual set of LEDs associated with it. These LEDs are used for
5804 * speed/link configuration as well as activity indicator configuration. Up to
5805 * three LEDs can be configured, one for activity and two for speeds.
5807 /* Input (64 bytes) */
5808 struct hwrm_port_led_cfg_input {
5811 * This value indicates what type of request this is. The format
5812 * for the rest of the command is determined by this field.
5816 * This value indicates the what completion ring the request
5817 * will be optionally completed on. If the value is -1, then no
5818 * CR completion will be generated. Any other value must be a
5819 * valid CR ring_id value for this function.
5822 /* This value indicates the command sequence number. */
5825 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5826 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5831 * This is the host address where the response will be written
5832 * when the request is complete. This area must be 16B aligned
5833 * and must be cleared to zero before the request is made.
5836 /* This bit must be '1' for the led0_id field to be configured. */
5837 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID UINT32_C(0x1)
5838 /* This bit must be '1' for the led0_state field to be configured. */
5839 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE UINT32_C(0x2)
5840 /* This bit must be '1' for the led0_color field to be configured. */
5841 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_COLOR UINT32_C(0x4)
5843 * This bit must be '1' for the led0_blink_on field to be
5846 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON UINT32_C(0x8)
5848 * This bit must be '1' for the led0_blink_off field to be
5851 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF UINT32_C(0x10)
5853 * This bit must be '1' for the led0_group_id field to be
5856 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID UINT32_C(0x20)
5857 /* This bit must be '1' for the led1_id field to be configured. */
5858 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_ID UINT32_C(0x40)
5859 /* This bit must be '1' for the led1_state field to be configured. */
5860 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_STATE UINT32_C(0x80)
5861 /* This bit must be '1' for the led1_color field to be configured. */
5862 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_COLOR UINT32_C(0x100)
5864 * This bit must be '1' for the led1_blink_on field to be
5867 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_ON UINT32_C(0x200)
5869 * This bit must be '1' for the led1_blink_off field to be
5872 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_OFF UINT32_C(0x400)
5874 * This bit must be '1' for the led1_group_id field to be
5877 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_GROUP_ID UINT32_C(0x800)
5878 /* This bit must be '1' for the led2_id field to be configured. */
5879 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_ID UINT32_C(0x1000)
5880 /* This bit must be '1' for the led2_state field to be configured. */
5881 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_STATE UINT32_C(0x2000)
5882 /* This bit must be '1' for the led2_color field to be configured. */
5883 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_COLOR UINT32_C(0x4000)
5885 * This bit must be '1' for the led2_blink_on field to be
5888 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_ON UINT32_C(0x8000)
5890 * This bit must be '1' for the led2_blink_off field to be
5893 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_OFF UINT32_C(0x10000)
5895 * This bit must be '1' for the led2_group_id field to be
5898 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_GROUP_ID UINT32_C(0x20000)
5899 /* This bit must be '1' for the led3_id field to be configured. */
5900 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_ID UINT32_C(0x40000)
5901 /* This bit must be '1' for the led3_state field to be configured. */
5902 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_STATE UINT32_C(0x80000)
5903 /* This bit must be '1' for the led3_color field to be configured. */
5904 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_COLOR UINT32_C(0x100000)
5906 * This bit must be '1' for the led3_blink_on field to be
5909 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_ON UINT32_C(0x200000)
5911 * This bit must be '1' for the led3_blink_off field to be
5914 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_OFF \
5917 * This bit must be '1' for the led3_group_id field to be
5920 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_GROUP_ID UINT32_C(0x800000)
5922 /* Port ID of port whose LEDs are configured. */
5925 * The number of LEDs that are being configured. Up to 4 LEDs
5926 * can be configured with this command.
5929 /* Reserved field. */
5931 /* An identifier for the LED #0. */
5933 /* The requested state of the LED #0. */
5934 /* Default state of the LED */
5935 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
5937 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_OFF UINT32_C(0x1)
5939 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_ON UINT32_C(0x2)
5941 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINK UINT32_C(0x3)
5942 /* Blink Alternately */
5943 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
5945 /* The requested color of LED #0. */
5947 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
5949 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_AMBER UINT32_C(0x1)
5951 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREEN UINT32_C(0x2)
5952 /* Green or Amber */
5953 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
5955 uint16_t led0_blink_on;
5957 * If the LED #0 state is "blink" or "blinkalt", then this field
5958 * represents the requested time in milliseconds to keep LED on
5961 uint16_t led0_blink_off;
5963 * If the LED #0 state is "blink" or "blinkalt", then this field
5964 * represents the requested time in milliseconds to keep LED off
5967 uint8_t led0_group_id;
5969 * An identifier for the group of LEDs that LED #0 belongs to.
5970 * If set to 0, then the LED #0 shall not be grouped and shall
5971 * be treated as an individual resource. For all other non-zero
5972 * values of this field, LED #0 shall be grouped together with
5973 * the LEDs with the same group ID value.
5976 /* Reserved field. */
5978 /* An identifier for the LED #1. */
5980 /* The requested state of the LED #1. */
5981 /* Default state of the LED */
5982 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
5984 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_OFF UINT32_C(0x1)
5986 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_ON UINT32_C(0x2)
5988 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINK UINT32_C(0x3)
5989 /* Blink Alternately */
5990 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
5992 /* The requested color of LED #1. */
5994 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
5996 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_AMBER UINT32_C(0x1)
5998 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREEN UINT32_C(0x2)
5999 /* Green or Amber */
6000 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6002 uint16_t led1_blink_on;
6004 * If the LED #1 state is "blink" or "blinkalt", then this field
6005 * represents the requested time in milliseconds to keep LED on
6008 uint16_t led1_blink_off;
6010 * If the LED #1 state is "blink" or "blinkalt", then this field
6011 * represents the requested time in milliseconds to keep LED off
6014 uint8_t led1_group_id;
6016 * An identifier for the group of LEDs that LED #1 belongs to.
6017 * If set to 0, then the LED #1 shall not be grouped and shall
6018 * be treated as an individual resource. For all other non-zero
6019 * values of this field, LED #1 shall be grouped together with
6020 * the LEDs with the same group ID value.
6023 /* Reserved field. */
6025 /* An identifier for the LED #2. */
6027 /* The requested state of the LED #2. */
6028 /* Default state of the LED */
6029 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6031 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_OFF UINT32_C(0x1)
6033 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_ON UINT32_C(0x2)
6035 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINK UINT32_C(0x3)
6036 /* Blink Alternately */
6037 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6039 /* The requested color of LED #2. */
6041 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6043 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6045 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6046 /* Green or Amber */
6047 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6049 uint16_t led2_blink_on;
6051 * If the LED #2 state is "blink" or "blinkalt", then this field
6052 * represents the requested time in milliseconds to keep LED on
6055 uint16_t led2_blink_off;
6057 * If the LED #2 state is "blink" or "blinkalt", then this field
6058 * represents the requested time in milliseconds to keep LED off
6061 uint8_t led2_group_id;
6063 * An identifier for the group of LEDs that LED #2 belongs to.
6064 * If set to 0, then the LED #2 shall not be grouped and shall
6065 * be treated as an individual resource. For all other non-zero
6066 * values of this field, LED #2 shall be grouped together with
6067 * the LEDs with the same group ID value.
6070 /* Reserved field. */
6072 /* An identifier for the LED #3. */
6074 /* The requested state of the LED #3. */
6075 /* Default state of the LED */
6076 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6078 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_OFF UINT32_C(0x1)
6080 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_ON UINT32_C(0x2)
6082 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINK UINT32_C(0x3)
6083 /* Blink Alternately */
6084 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6086 /* The requested color of LED #3. */
6088 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6090 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6092 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6093 /* Green or Amber */
6094 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6096 uint16_t led3_blink_on;
6098 * If the LED #3 state is "blink" or "blinkalt", then this field
6099 * represents the requested time in milliseconds to keep LED on
6102 uint16_t led3_blink_off;
6104 * If the LED #3 state is "blink" or "blinkalt", then this field
6105 * represents the requested time in milliseconds to keep LED off
6108 uint8_t led3_group_id;
6110 * An identifier for the group of LEDs that LED #3 belongs to.
6111 * If set to 0, then the LED #3 shall not be grouped and shall
6112 * be treated as an individual resource. For all other non-zero
6113 * values of this field, LED #3 shall be grouped together with
6114 * the LEDs with the same group ID value.
6117 /* Reserved field. */
6118 } __attribute__((packed));
6120 /* Output (16 bytes) */
6121 struct hwrm_port_led_cfg_output {
6122 uint16_t error_code;
6124 * Pass/Fail or error type Note: receiver to verify the in
6125 * parameters, and fail the call with an error when appropriate
6128 /* This field returns the type of original request. */
6130 /* This field provides original sequence number of the command. */
6133 * This field is the length of the response in bytes. The last
6134 * byte of the response is a valid flag that will read as '1'
6135 * when the command has been completely written to memory.
6143 * This field is used in Output records to indicate that the
6144 * output is completely written to RAM. This field should be
6145 * read as '1' to indicate that the output has been completely
6146 * written. When writing a command completion or response to an
6147 * internal processor, the order of writes has to be such that
6148 * this field is written last.
6150 } __attribute__((packed));
6152 /* hwrm_port_led_qcfg */
6154 * Description: This function is used to query configuration of LEDs on a given
6155 * port. Each port has individual set of LEDs associated with it. These LEDs are
6156 * used for speed/link configuration as well as activity indicator
6157 * configuration. Up to three LEDs can be configured, one for activity and two
6160 /* Input (24 bytes) */
6161 struct hwrm_port_led_qcfg_input {
6164 * This value indicates what type of request this is. The format
6165 * for the rest of the command is determined by this field.
6169 * This value indicates the what completion ring the request
6170 * will be optionally completed on. If the value is -1, then no
6171 * CR completion will be generated. Any other value must be a
6172 * valid CR ring_id value for this function.
6175 /* This value indicates the command sequence number. */
6178 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6179 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6184 * This is the host address where the response will be written
6185 * when the request is complete. This area must be 16B aligned
6186 * and must be cleared to zero before the request is made.
6189 /* Port ID of port whose LED configuration is being queried. */
6190 uint16_t unused_0[3];
6191 } __attribute__((packed));
6193 /* Output (56 bytes) */
6194 struct hwrm_port_led_qcfg_output {
6195 uint16_t error_code;
6197 * Pass/Fail or error type Note: receiver to verify the in
6198 * parameters, and fail the call with an error when appropriate
6201 /* This field returns the type of original request. */
6203 /* This field provides original sequence number of the command. */
6206 * This field is the length of the response in bytes. The last
6207 * byte of the response is a valid flag that will read as '1'
6208 * when the command has been completely written to memory.
6212 * The number of LEDs that are configured on this port. Up to 4
6213 * LEDs can be returned in the response.
6216 /* An identifier for the LED #0. */
6218 /* The type of LED #0. */
6220 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6222 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6224 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6226 /* The current state of the LED #0. */
6227 /* Default state of the LED */
6228 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
6230 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_OFF UINT32_C(0x1)
6232 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_ON UINT32_C(0x2)
6234 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINK UINT32_C(0x3)
6235 /* Blink Alternately */
6236 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
6238 /* The color of LED #0. */
6240 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
6242 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_AMBER UINT32_C(0x1)
6244 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREEN UINT32_C(0x2)
6245 /* Green or Amber */
6246 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
6248 uint16_t led0_blink_on;
6250 * If the LED #0 state is "blink" or "blinkalt", then this field
6251 * represents the requested time in milliseconds to keep LED on
6254 uint16_t led0_blink_off;
6256 * If the LED #0 state is "blink" or "blinkalt", then this field
6257 * represents the requested time in milliseconds to keep LED off
6260 uint8_t led0_group_id;
6262 * An identifier for the group of LEDs that LED #0 belongs to.
6263 * If set to 0, then the LED #0 is not grouped. For all other
6264 * non-zero values of this field, LED #0 is grouped together
6265 * with the LEDs with the same group ID value.
6268 /* An identifier for the LED #1. */
6270 /* The type of LED #1. */
6272 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6274 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6276 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6278 /* The current state of the LED #1. */
6279 /* Default state of the LED */
6280 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
6282 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_OFF UINT32_C(0x1)
6284 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_ON UINT32_C(0x2)
6286 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINK UINT32_C(0x3)
6287 /* Blink Alternately */
6288 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
6290 /* The color of LED #1. */
6292 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
6294 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_AMBER UINT32_C(0x1)
6296 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREEN UINT32_C(0x2)
6297 /* Green or Amber */
6298 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6300 uint16_t led1_blink_on;
6302 * If the LED #1 state is "blink" or "blinkalt", then this field
6303 * represents the requested time in milliseconds to keep LED on
6306 uint16_t led1_blink_off;
6308 * If the LED #1 state is "blink" or "blinkalt", then this field
6309 * represents the requested time in milliseconds to keep LED off
6312 uint8_t led1_group_id;
6314 * An identifier for the group of LEDs that LED #1 belongs to.
6315 * If set to 0, then the LED #1 is not grouped. For all other
6316 * non-zero values of this field, LED #1 is grouped together
6317 * with the LEDs with the same group ID value.
6320 /* An identifier for the LED #2. */
6322 /* The type of LED #2. */
6324 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6326 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6328 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6330 /* The current state of the LED #2. */
6331 /* Default state of the LED */
6332 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6334 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_OFF UINT32_C(0x1)
6336 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_ON UINT32_C(0x2)
6338 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINK UINT32_C(0x3)
6339 /* Blink Alternately */
6340 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6342 /* The color of LED #2. */
6344 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6346 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6348 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6349 /* Green or Amber */
6350 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6352 uint16_t led2_blink_on;
6354 * If the LED #2 state is "blink" or "blinkalt", then this field
6355 * represents the requested time in milliseconds to keep LED on
6358 uint16_t led2_blink_off;
6360 * If the LED #2 state is "blink" or "blinkalt", then this field
6361 * represents the requested time in milliseconds to keep LED off
6364 uint8_t led2_group_id;
6366 * An identifier for the group of LEDs that LED #2 belongs to.
6367 * If set to 0, then the LED #2 is not grouped. For all other
6368 * non-zero values of this field, LED #2 is grouped together
6369 * with the LEDs with the same group ID value.
6372 /* An identifier for the LED #3. */
6374 /* The type of LED #3. */
6376 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6378 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6380 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6382 /* The current state of the LED #3. */
6383 /* Default state of the LED */
6384 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6386 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_OFF UINT32_C(0x1)
6388 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_ON UINT32_C(0x2)
6390 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINK UINT32_C(0x3)
6391 /* Blink Alternately */
6392 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6394 /* The color of LED #3. */
6396 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6398 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6400 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6401 /* Green or Amber */
6402 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6404 uint16_t led3_blink_on;
6406 * If the LED #3 state is "blink" or "blinkalt", then this field
6407 * represents the requested time in milliseconds to keep LED on
6410 uint16_t led3_blink_off;
6412 * If the LED #3 state is "blink" or "blinkalt", then this field
6413 * represents the requested time in milliseconds to keep LED off
6416 uint8_t led3_group_id;
6418 * An identifier for the group of LEDs that LED #3 belongs to.
6419 * If set to 0, then the LED #3 is not grouped. For all other
6420 * non-zero values of this field, LED #3 is grouped together
6421 * with the LEDs with the same group ID value.
6430 * This field is used in Output records to indicate that the
6431 * output is completely written to RAM. This field should be
6432 * read as '1' to indicate that the output has been completely
6433 * written. When writing a command completion or response to an
6434 * internal processor, the order of writes has to be such that
6435 * this field is written last.
6437 } __attribute__((packed));
6439 /* hwrm_port_led_qcaps */
6441 * Description: This function is used to query capabilities of LEDs on a given
6442 * port. Each port has individual set of LEDs associated with it. These LEDs are
6443 * used for speed/link configuration as well as activity indicator
6446 /* Input (24 bytes) */
6447 struct hwrm_port_led_qcaps_input {
6450 * This value indicates what type of request this is. The format
6451 * for the rest of the command is determined by this field.
6455 * This value indicates the what completion ring the request
6456 * will be optionally completed on. If the value is -1, then no
6457 * CR completion will be generated. Any other value must be a
6458 * valid CR ring_id value for this function.
6461 /* This value indicates the command sequence number. */
6464 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6465 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6470 * This is the host address where the response will be written
6471 * when the request is complete. This area must be 16B aligned
6472 * and must be cleared to zero before the request is made.
6475 /* Port ID of port whose LED configuration is being queried. */
6476 uint16_t unused_0[3];
6477 } __attribute__((packed));
6479 /* Output (48 bytes) */
6480 struct hwrm_port_led_qcaps_output {
6481 uint16_t error_code;
6483 * Pass/Fail or error type Note: receiver to verify the in
6484 * parameters, and fail the call with an error when appropriate
6487 /* This field returns the type of original request. */
6489 /* This field provides original sequence number of the command. */
6492 * This field is the length of the response in bytes. The last
6493 * byte of the response is a valid flag that will read as '1'
6494 * when the command has been completely written to memory.
6498 * The number of LEDs that are configured on this port. Up to 4
6499 * LEDs can be returned in the response.
6501 uint8_t unused_0[3];
6502 /* Reserved for future use. */
6504 /* An identifier for the LED #0. */
6506 /* The type of LED #0. */
6508 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6510 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6512 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6513 uint8_t led0_group_id;
6515 * An identifier for the group of LEDs that LED #0 belongs to.
6516 * If set to 0, then the LED #0 cannot be grouped. For all other
6517 * non-zero values of this field, LED #0 is grouped together
6518 * with the LEDs with the same group ID value.
6521 uint16_t led0_state_caps;
6522 /* The states supported by LED #0. */
6524 * If set to 1, this LED is enabled. If set to 0, this LED is
6527 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ENABLED UINT32_C(0x1)
6529 * If set to 1, off state is supported on this LED. If set to 0,
6530 * off state is not supported on this LED.
6532 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_OFF_SUPPORTED \
6535 * If set to 1, on state is supported on this LED. If set to 0,
6536 * on state is not supported on this LED.
6538 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ON_SUPPORTED \
6541 * If set to 1, blink state is supported on this LED. If set to
6542 * 0, blink state is not supported on this LED.
6544 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_SUPPORTED \
6547 * If set to 1, blink_alt state is supported on this LED. If set
6548 * to 0, blink_alt state is not supported on this LED.
6550 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED \
6552 uint16_t led0_color_caps;
6553 /* The colors supported by LED #0. */
6555 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_RSVD UINT32_C(0x1)
6557 * If set to 1, Amber color is supported on this LED. If set to
6558 * 0, Amber color is not supported on this LED.
6560 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_AMBER_SUPPORTED \
6563 * If set to 1, Green color is supported on this LED. If set to
6564 * 0, Green color is not supported on this LED.
6566 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_GREEN_SUPPORTED \
6569 /* An identifier for the LED #1. */
6571 /* The type of LED #1. */
6573 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6575 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6577 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6578 uint8_t led1_group_id;
6580 * An identifier for the group of LEDs that LED #1 belongs to.
6581 * If set to 0, then the LED #0 cannot be grouped. For all other
6582 * non-zero values of this field, LED #0 is grouped together
6583 * with the LEDs with the same group ID value.
6586 uint16_t led1_state_caps;
6587 /* The states supported by LED #1. */
6589 * If set to 1, this LED is enabled. If set to 0, this LED is
6592 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ENABLED UINT32_C(0x1)
6594 * If set to 1, off state is supported on this LED. If set to 0,
6595 * off state is not supported on this LED.
6597 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_OFF_SUPPORTED \
6600 * If set to 1, on state is supported on this LED. If set to 0,
6601 * on state is not supported on this LED.
6603 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ON_SUPPORTED \
6606 * If set to 1, blink state is supported on this LED. If set to
6607 * 0, blink state is not supported on this LED.
6609 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_SUPPORTED \
6612 * If set to 1, blink_alt state is supported on this LED. If set
6613 * to 0, blink_alt state is not supported on this LED.
6615 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED \
6617 uint16_t led1_color_caps;
6618 /* The colors supported by LED #1. */
6620 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_RSVD UINT32_C(0x1)
6622 * If set to 1, Amber color is supported on this LED. If set to
6623 * 0, Amber color is not supported on this LED.
6625 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_AMBER_SUPPORTED \
6628 * If set to 1, Green color is supported on this LED. If set to
6629 * 0, Green color is not supported on this LED.
6631 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_GREEN_SUPPORTED \
6634 /* An identifier for the LED #2. */
6636 /* The type of LED #2. */
6638 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6640 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6642 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6643 uint8_t led2_group_id;
6645 * An identifier for the group of LEDs that LED #0 belongs to.
6646 * If set to 0, then the LED #0 cannot be grouped. For all other
6647 * non-zero values of this field, LED #0 is grouped together
6648 * with the LEDs with the same group ID value.
6651 uint16_t led2_state_caps;
6652 /* The states supported by LED #2. */
6654 * If set to 1, this LED is enabled. If set to 0, this LED is
6657 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ENABLED UINT32_C(0x1)
6659 * If set to 1, off state is supported on this LED. If set to 0,
6660 * off state is not supported on this LED.
6662 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_OFF_SUPPORTED \
6665 * If set to 1, on state is supported on this LED. If set to 0,
6666 * on state is not supported on this LED.
6668 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ON_SUPPORTED \
6671 * If set to 1, blink state is supported on this LED. If set to
6672 * 0, blink state is not supported on this LED.
6674 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_SUPPORTED \
6677 * If set to 1, blink_alt state is supported on this LED. If set
6678 * to 0, blink_alt state is not supported on this LED.
6680 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED \
6682 uint16_t led2_color_caps;
6683 /* The colors supported by LED #2. */
6685 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_RSVD UINT32_C(0x1)
6687 * If set to 1, Amber color is supported on this LED. If set to
6688 * 0, Amber color is not supported on this LED.
6690 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_AMBER_SUPPORTED \
6693 * If set to 1, Green color is supported on this LED. If set to
6694 * 0, Green color is not supported on this LED.
6696 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_GREEN_SUPPORTED \
6699 /* An identifier for the LED #3. */
6701 /* The type of LED #3. */
6703 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6705 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6707 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6708 uint8_t led3_group_id;
6710 * An identifier for the group of LEDs that LED #3 belongs to.
6711 * If set to 0, then the LED #0 cannot be grouped. For all other
6712 * non-zero values of this field, LED #0 is grouped together
6713 * with the LEDs with the same group ID value.
6716 uint16_t led3_state_caps;
6717 /* The states supported by LED #3. */
6719 * If set to 1, this LED is enabled. If set to 0, this LED is
6722 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ENABLED UINT32_C(0x1)
6724 * If set to 1, off state is supported on this LED. If set to 0,
6725 * off state is not supported on this LED.
6727 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_OFF_SUPPORTED \
6730 * If set to 1, on state is supported on this LED. If set to 0,
6731 * on state is not supported on this LED.
6733 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ON_SUPPORTED \
6736 * If set to 1, blink state is supported on this LED. If set to
6737 * 0, blink state is not supported on this LED.
6739 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_SUPPORTED \
6742 * If set to 1, blink_alt state is supported on this LED. If set
6743 * to 0, blink_alt state is not supported on this LED.
6745 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED \
6747 uint16_t led3_color_caps;
6748 /* The colors supported by LED #3. */
6750 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_RSVD UINT32_C(0x1)
6752 * If set to 1, Amber color is supported on this LED. If set to
6753 * 0, Amber color is not supported on this LED.
6755 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_AMBER_SUPPORTED \
6758 * If set to 1, Green color is supported on this LED. If set to
6759 * 0, Green color is not supported on this LED.
6761 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_GREEN_SUPPORTED \
6768 * This field is used in Output records to indicate that the
6769 * output is completely written to RAM. This field should be
6770 * read as '1' to indicate that the output has been completely
6771 * written. When writing a command completion or response to an
6772 * internal processor, the order of writes has to be such that
6773 * this field is written last.
6775 } __attribute__((packed));
6777 /* hwrm_queue_qportcfg */
6779 * Description: This function is called by a driver to query queue configuration
6780 * of a port. # The HWRM shall at least advertise one queue with lossy service
6781 * profile. # The driver shall use this command to query queue ids before
6782 * configuring or using any queues. # If a service profile is not set for a
6783 * queue, then the driver shall not use that queue without configuring a service
6784 * profile for it. # If the driver is not allowed to configure service profiles,
6785 * then the driver shall only use queues for which service profiles are pre-
6788 /* Input (24 bytes) */
6789 struct hwrm_queue_qportcfg_input {
6792 * This value indicates what type of request this is. The format
6793 * for the rest of the command is determined by this field.
6797 * This value indicates the what completion ring the request
6798 * will be optionally completed on. If the value is -1, then no
6799 * CR completion will be generated. Any other value must be a
6800 * valid CR ring_id value for this function.
6803 /* This value indicates the command sequence number. */
6806 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6807 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6812 * This is the host address where the response will be written
6813 * when the request is complete. This area must be 16B aligned
6814 * and must be cleared to zero before the request is made.
6818 * Enumeration denoting the RX, TX type of the resource. This
6819 * enumeration is used for resources that are similar for both
6820 * TX and RX paths of the chip.
6822 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
6824 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
6826 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
6827 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
6828 QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
6831 * Port ID of port for which the queue configuration is being
6832 * queried. This field is only required when sent by IPC.
6835 } __attribute__((packed));
6837 /* Output (32 bytes) */
6838 struct hwrm_queue_qportcfg_output {
6839 uint16_t error_code;
6841 * Pass/Fail or error type Note: receiver to verify the in
6842 * parameters, and fail the call with an error when appropriate
6845 /* This field returns the type of original request. */
6847 /* This field provides original sequence number of the command. */
6850 * This field is the length of the response in bytes. The last
6851 * byte of the response is a valid flag that will read as '1'
6852 * when the command has been completely written to memory.
6854 uint8_t max_configurable_queues;
6856 * The maximum number of queues that can be configured on this
6857 * port. Valid values range from 1 through 8.
6859 uint8_t max_configurable_lossless_queues;
6861 * The maximum number of lossless queues that can be configured
6862 * on this port. Valid values range from 0 through 8.
6864 uint8_t queue_cfg_allowed;
6866 * Bitmask indicating which queues can be configured by the
6867 * hwrm_queue_cfg command. Each bit represents a specific queue
6868 * where bit 0 represents queue 0 and bit 7 represents queue 7.
6869 * # A value of 0 indicates that the queue is not configurable
6870 * by the hwrm_queue_cfg command. # A value of 1 indicates that
6871 * the queue is configurable. # A hwrm_queue_cfg command shall
6872 * return error when trying to configure a queue not
6875 uint8_t queue_cfg_info;
6876 /* Information about queue configuration. */
6878 * If this flag is set to '1', then the queues are configured
6879 * asymmetrically on TX and RX sides. If this flag is set to
6880 * '0', then the queues are configured symmetrically on TX and
6881 * RX sides. For symmetric configuration, the queue
6882 * configuration including queue ids and service profiles on the
6883 * TX side is the same as the corresponding queue configuration
6886 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG UINT32_C(0x1)
6887 uint8_t queue_pfcenable_cfg_allowed;
6889 * Bitmask indicating which queues can be configured by the
6890 * hwrm_queue_pfcenable_cfg command. Each bit represents a
6891 * specific priority where bit 0 represents priority 0 and bit 7
6892 * represents priority 7. # A value of 0 indicates that the
6893 * priority is not configurable by the hwrm_queue_pfcenable_cfg
6894 * command. # A value of 1 indicates that the priority is
6895 * configurable. # A hwrm_queue_pfcenable_cfg command shall
6896 * return error when trying to configure a priority that is not
6899 uint8_t queue_pri2cos_cfg_allowed;
6901 * Bitmask indicating which queues can be configured by the
6902 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6903 * specific queue where bit 0 represents queue 0 and bit 7
6904 * represents queue 7. # A value of 0 indicates that the queue
6905 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6906 * A value of 1 indicates that the queue is configurable. # A
6907 * hwrm_queue_pri2cos_cfg command shall return error when trying
6908 * to configure a queue that is not configurable.
6910 uint8_t queue_cos2bw_cfg_allowed;
6912 * Bitmask indicating which queues can be configured by the
6913 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6914 * specific queue where bit 0 represents queue 0 and bit 7
6915 * represents queue 7. # A value of 0 indicates that the queue
6916 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6917 * A value of 1 indicates that the queue is configurable. # A
6918 * hwrm_queue_pri2cos_cfg command shall return error when trying
6919 * to configure a queue not configurable.
6923 * ID of CoS Queue 0. FF - Invalid id # This ID can be used on
6924 * any subsequent call to an hwrm command that takes a queue id.
6925 * # IDs must always be queried by this command before any use
6926 * by the driver or software. # Any driver or software should
6927 * not make any assumptions about queue IDs. # A value of 0xff
6928 * indicates that the queue is not available. # Available queues
6929 * may not be in sequential order.
6931 uint8_t queue_id0_service_profile;
6932 /* This value is applicable to CoS queues only. */
6933 /* Lossy (best-effort) */
6934 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
6937 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
6940 * Set to 0xFF... (All Fs) if there is no
6941 * service profile specified
6943 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
6947 * ID of CoS Queue 1. FF - Invalid id # This ID can be used on
6948 * any subsequent call to an hwrm command that takes a queue id.
6949 * # IDs must always be queried by this command before any use
6950 * by the driver or software. # Any driver or software should
6951 * not make any assumptions about queue IDs. # A value of 0xff
6952 * indicates that the queue is not available. # Available queues
6953 * may not be in sequential order.
6955 uint8_t queue_id1_service_profile;
6956 /* This value is applicable to CoS queues only. */
6957 /* Lossy (best-effort) */
6958 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
6961 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
6964 * Set to 0xFF... (All Fs) if there is no
6965 * service profile specified
6967 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
6971 * ID of CoS Queue 2. FF - Invalid id # This ID can be used on
6972 * any subsequent call to an hwrm command that takes a queue id.
6973 * # IDs must always be queried by this command before any use
6974 * by the driver or software. # Any driver or software should
6975 * not make any assumptions about queue IDs. # A value of 0xff
6976 * indicates that the queue is not available. # Available queues
6977 * may not be in sequential order.
6979 uint8_t queue_id2_service_profile;
6980 /* This value is applicable to CoS queues only. */
6981 /* Lossy (best-effort) */
6982 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
6985 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
6988 * Set to 0xFF... (All Fs) if there is no
6989 * service profile specified
6991 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
6995 * ID of CoS Queue 3. FF - Invalid id # This ID can be used on
6996 * any subsequent call to an hwrm command that takes a queue id.
6997 * # IDs must always be queried by this command before any use
6998 * by the driver or software. # Any driver or software should
6999 * not make any assumptions about queue IDs. # A value of 0xff
7000 * indicates that the queue is not available. # Available queues
7001 * may not be in sequential order.
7003 uint8_t queue_id3_service_profile;
7004 /* This value is applicable to CoS queues only. */
7005 /* Lossy (best-effort) */
7006 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
7009 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
7012 * Set to 0xFF... (All Fs) if there is no
7013 * service profile specified
7015 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
7019 * ID of CoS Queue 4. FF - Invalid id # This ID can be used on
7020 * any subsequent call to an hwrm command that takes a queue id.
7021 * # IDs must always be queried by this command before any use
7022 * by the driver or software. # Any driver or software should
7023 * not make any assumptions about queue IDs. # A value of 0xff
7024 * indicates that the queue is not available. # Available queues
7025 * may not be in sequential order.
7027 uint8_t queue_id4_service_profile;
7028 /* This value is applicable to CoS queues only. */
7029 /* Lossy (best-effort) */
7030 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
7033 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
7036 * Set to 0xFF... (All Fs) if there is no
7037 * service profile specified
7039 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
7043 * ID of CoS Queue 5. FF - Invalid id # This ID can be used on
7044 * any subsequent call to an hwrm command that takes a queue id.
7045 * # IDs must always be queried by this command before any use
7046 * by the driver or software. # Any driver or software should
7047 * not make any assumptions about queue IDs. # A value of 0xff
7048 * indicates that the queue is not available. # Available queues
7049 * may not be in sequential order.
7051 uint8_t queue_id5_service_profile;
7052 /* This value is applicable to CoS queues only. */
7053 /* Lossy (best-effort) */
7054 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
7057 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
7060 * Set to 0xFF... (All Fs) if there is no
7061 * service profile specified
7063 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
7067 * ID of CoS Queue 6. FF - Invalid id # This ID can be used on
7068 * any subsequent call to an hwrm command that takes a queue id.
7069 * # IDs must always be queried by this command before any use
7070 * by the driver or software. # Any driver or software should
7071 * not make any assumptions about queue IDs. # A value of 0xff
7072 * indicates that the queue is not available. # Available queues
7073 * may not be in sequential order.
7075 uint8_t queue_id6_service_profile;
7076 /* This value is applicable to CoS queues only. */
7077 /* Lossy (best-effort) */
7078 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
7081 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
7084 * Set to 0xFF... (All Fs) if there is no
7085 * service profile specified
7087 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
7091 * ID of CoS Queue 7. FF - Invalid id # This ID can be used on
7092 * any subsequent call to an hwrm command that takes a queue id.
7093 * # IDs must always be queried by this command before any use
7094 * by the driver or software. # Any driver or software should
7095 * not make any assumptions about queue IDs. # A value of 0xff
7096 * indicates that the queue is not available. # Available queues
7097 * may not be in sequential order.
7099 uint8_t queue_id7_service_profile;
7100 /* This value is applicable to CoS queues only. */
7101 /* Lossy (best-effort) */
7102 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
7105 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
7108 * Set to 0xFF... (All Fs) if there is no
7109 * service profile specified
7111 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
7115 * This field is used in Output records to indicate that the
7116 * output is completely written to RAM. This field should be
7117 * read as '1' to indicate that the output has been completely
7118 * written. When writing a command completion or response to an
7119 * internal processor, the order of writes has to be such that
7120 * this field is written last.
7122 } __attribute__((packed));
7124 /* hwrm_vnic_alloc */
7126 * Description: This VNIC is a resource in the RX side of the chip that is used
7127 * to represent a virtual host "interface". # At the time of VNIC allocation or
7128 * configuration, the function can specify whether it wants the requested VNIC
7129 * to be the default VNIC for the function or not. # If a function requests
7130 * allocation of a VNIC for the first time and a VNIC is successfully allocated
7131 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
7132 * for that function. # The default VNIC shall be used for the default action
7133 * for a partition or function. # For each VNIC allocated on a function, a
7134 * mapping on the RX side to map the allocated VNIC to source virtual interface
7135 * shall be performed by the HWRM. This should be hidden to the function driver
7136 * requesting the VNIC allocation. This enables broadcast/multicast replication
7137 * with source knockout. # If multicast replication with source knockout is
7138 * enabled, then the internal VNIC to SVIF mapping data structures shall be
7139 * programmed at the time of VNIC allocation.
7141 /* Input (24 bytes) */
7142 struct hwrm_vnic_alloc_input {
7145 * This value indicates what type of request this is. The format
7146 * for the rest of the command is determined by this field.
7150 * This value indicates the what completion ring the request
7151 * will be optionally completed on. If the value is -1, then no
7152 * CR completion will be generated. Any other value must be a
7153 * valid CR ring_id value for this function.
7156 /* This value indicates the command sequence number. */
7159 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7160 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7165 * This is the host address where the response will be written
7166 * when the request is complete. This area must be 16B aligned
7167 * and must be cleared to zero before the request is made.
7171 * When this bit is '1', this VNIC is requested to be the
7172 * default VNIC for this function.
7174 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7176 } __attribute__((packed));
7178 /* Output (16 bytes) */
7179 struct hwrm_vnic_alloc_output {
7180 uint16_t error_code;
7182 * Pass/Fail or error type Note: receiver to verify the in
7183 * parameters, and fail the call with an error when appropriate
7186 /* This field returns the type of original request. */
7188 /* This field provides original sequence number of the command. */
7191 * This field is the length of the response in bytes. The last
7192 * byte of the response is a valid flag that will read as '1'
7193 * when the command has been completely written to memory.
7196 /* Logical vnic ID */
7202 * This field is used in Output records to indicate that the
7203 * output is completely written to RAM. This field should be
7204 * read as '1' to indicate that the output has been completely
7205 * written. When writing a command completion or response to an
7206 * internal processor, the order of writes has to be such that
7207 * this field is written last.
7209 } __attribute__((packed));
7211 /* hwrm_vnic_free */
7213 * Description: Free a VNIC resource. Idle any resources associated with the
7214 * VNIC as well as the VNIC. Reset and release all resources associated with the
7217 /* Input (24 bytes) */
7218 struct hwrm_vnic_free_input {
7221 * This value indicates what type of request this is. The format
7222 * for the rest of the command is determined by this field.
7226 * This value indicates the what completion ring the request
7227 * will be optionally completed on. If the value is -1, then no
7228 * CR completion will be generated. Any other value must be a
7229 * valid CR ring_id value for this function.
7232 /* This value indicates the command sequence number. */
7235 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7236 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7241 * This is the host address where the response will be written
7242 * when the request is complete. This area must be 16B aligned
7243 * and must be cleared to zero before the request is made.
7246 /* Logical vnic ID */
7248 } __attribute__((packed));
7250 /* Output (16 bytes) */
7251 struct hwrm_vnic_free_output {
7252 uint16_t error_code;
7254 * Pass/Fail or error type Note: receiver to verify the in
7255 * parameters, and fail the call with an error when appropriate
7258 /* This field returns the type of original request. */
7260 /* This field provides original sequence number of the command. */
7263 * This field is the length of the response in bytes. The last
7264 * byte of the response is a valid flag that will read as '1'
7265 * when the command has been completely written to memory.
7273 * This field is used in Output records to indicate that the
7274 * output is completely written to RAM. This field should be
7275 * read as '1' to indicate that the output has been completely
7276 * written. When writing a command completion or response to an
7277 * internal processor, the order of writes has to be such that
7278 * this field is written last.
7280 } __attribute__((packed));
7283 /* Description: Configure the RX VNIC structure. */
7284 /* Input (40 bytes) */
7285 struct hwrm_vnic_cfg_input {
7288 * This value indicates what type of request this is. The format
7289 * for the rest of the command is determined by this field.
7293 * This value indicates the what completion ring the request
7294 * will be optionally completed on. If the value is -1, then no
7295 * CR completion will be generated. Any other value must be a
7296 * valid CR ring_id value for this function.
7299 /* This value indicates the command sequence number. */
7302 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7303 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7308 * This is the host address where the response will be written
7309 * when the request is complete. This area must be 16B aligned
7310 * and must be cleared to zero before the request is made.
7314 * When this bit is '1', the VNIC is requested to be the default
7315 * VNIC for the function.
7317 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7319 * When this bit is '1', the VNIC is being configured to strip
7320 * VLAN in the RX path. If set to '0', then VLAN stripping is
7321 * disabled on this VNIC.
7323 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7325 * When this bit is '1', the VNIC is being configured to buffer
7326 * receive packets in the hardware until the host posts new
7327 * receive buffers. If set to '0', then bd_stall is being
7328 * configured to be disabled on this VNIC.
7330 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7332 * When this bit is '1', the VNIC is being configured to receive
7333 * both RoCE and non-RoCE traffic. If set to '0', then this VNIC
7334 * is not configured to be operating in dual VNIC mode.
7336 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7338 * When this flag is set to '1', the VNIC is requested to be
7339 * configured to receive only RoCE traffic. If this flag is set
7340 * to '0', then this flag shall be ignored by the HWRM. If
7341 * roce_dual_vnic_mode flag is set to '1', then the HWRM client
7342 * shall not set this flag to '1'.
7344 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7346 * When a VNIC uses one destination ring group for certain
7347 * application (e.g. Receive Flow Steering) where exact match is
7348 * used to direct packets to a VNIC with one destination ring
7349 * group only, there is no need to configure RSS indirection
7350 * table for that VNIC as only one destination ring group is
7351 * used. This flag is used to enable a mode where RSS is enabled
7352 * in the VNIC using a RSS context for computing RSS hash but
7353 * the RSS indirection table is not configured using
7354 * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver
7355 * should not program RSS indirection table for the RSS context
7356 * that is used for computing RSS hash only.
7358 #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7360 * When this bit is '1', the VNIC is being configured to receive
7361 * both RoCE and non-RoCE traffic, but forward only the RoCE
7362 * traffic further. Also, RoCE traffic can be mirrored to L2
7365 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE \
7369 * This bit must be '1' for the dflt_ring_grp field to be
7372 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
7373 /* This bit must be '1' for the rss_rule field to be configured. */
7374 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
7375 /* This bit must be '1' for the cos_rule field to be configured. */
7376 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
7377 /* This bit must be '1' for the lb_rule field to be configured. */
7378 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
7379 /* This bit must be '1' for the mru field to be configured. */
7380 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
7382 /* Logical vnic ID */
7383 uint16_t dflt_ring_grp;
7385 * Default Completion ring for the VNIC. This ring will be
7386 * chosen if packet does not match any RSS rules and if there is
7391 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7392 * there is no RSS rule.
7396 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7397 * there is no COS rule.
7401 * RSS ID for load balancing rule/table structure. 0xFF... (All
7402 * Fs) if there is no LB rule.
7406 * The maximum receive unit of the vnic. Each vnic is associated
7407 * with a function. The vnic mru value overwrites the mru
7408 * setting of the associated function. The HWRM shall make sure
7409 * that vnic mru does not exceed the mru of the port the
7410 * function is associated with.
7413 } __attribute__((packed));
7415 /* Output (16 bytes) */
7416 struct hwrm_vnic_cfg_output {
7417 uint16_t error_code;
7419 * Pass/Fail or error type Note: receiver to verify the in
7420 * parameters, and fail the call with an error when appropriate
7423 /* This field returns the type of original request. */
7425 /* This field provides original sequence number of the command. */
7428 * This field is the length of the response in bytes. The last
7429 * byte of the response is a valid flag that will read as '1'
7430 * when the command has been completely written to memory.
7438 * This field is used in Output records to indicate that the
7439 * output is completely written to RAM. This field should be
7440 * read as '1' to indicate that the output has been completely
7441 * written. When writing a command completion or response to an
7442 * internal processor, the order of writes has to be such that
7443 * this field is written last.
7445 } __attribute__((packed));
7447 /* hwrm_vnic_qcfg */
7449 * Description: Query the RX VNIC structure. This function can be used by a PF
7450 * driver to query its own VNIC resource or VNIC resource of its child VF. This
7451 * function can also be used by a VF driver to query its own VNIC resource.
7453 /* Input (32 bytes) */
7454 struct hwrm_vnic_qcfg_input {
7457 * This value indicates what type of request this is. The format
7458 * for the rest of the command is determined by this field.
7462 * This value indicates the what completion ring the request
7463 * will be optionally completed on. If the value is -1, then no
7464 * CR completion will be generated. Any other value must be a
7465 * valid CR ring_id value for this function.
7468 /* This value indicates the command sequence number. */
7471 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7472 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7477 * This is the host address where the response will be written
7478 * when the request is complete. This area must be 16B aligned
7479 * and must be cleared to zero before the request is made.
7482 /* This bit must be '1' for the vf_id_valid field to be configured. */
7483 #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
7485 /* Logical vnic ID */
7487 /* ID of Virtual Function whose VNIC resource is being queried. */
7488 uint16_t unused_0[3];
7489 } __attribute__((packed));
7491 /* Output (32 bytes) */
7492 struct hwrm_vnic_qcfg_output {
7493 uint16_t error_code;
7495 * Pass/Fail or error type Note: receiver to verify the in
7496 * parameters, and fail the call with an error when appropriate
7499 /* This field returns the type of original request. */
7501 /* This field provides original sequence number of the command. */
7504 * This field is the length of the response in bytes. The last
7505 * byte of the response is a valid flag that will read as '1'
7506 * when the command has been completely written to memory.
7508 uint16_t dflt_ring_grp;
7509 /* Default Completion ring for the VNIC. */
7512 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7513 * there is no RSS rule.
7517 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7518 * there is no COS rule.
7522 * RSS ID for load balancing rule/table structure. 0xFF... (All
7523 * Fs) if there is no LB rule.
7526 /* The maximum receive unit of the vnic. */
7531 * When this bit is '1', the VNIC is the default VNIC for the
7534 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT UINT32_C(0x1)
7536 * When this bit is '1', the VNIC is configured to strip VLAN in
7537 * the RX path. If set to '0', then VLAN stripping is disabled
7540 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7542 * When this bit is '1', the VNIC is configured to buffer
7543 * receive packets in the hardware until the host posts new
7544 * receive buffers. If set to '0', then bd_stall is disabled on
7547 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7549 * When this bit is '1', the VNIC is configured to receive both
7550 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is
7551 * not configured to operate in dual VNIC mode.
7553 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7555 * When this flag is set to '1', the VNIC is configured to
7556 * receive only RoCE traffic. When this flag is set to '0', the
7557 * VNIC is not configured to receive only RoCE traffic. If
7558 * roce_dual_vnic_mode flag and this flag both are set to '1',
7559 * then it is an invalid configuration of the VNIC. The HWRM
7560 * should not allow that type of mis-configuration by HWRM
7563 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7565 * When a VNIC uses one destination ring group for certain
7566 * application (e.g. Receive Flow Steering) where exact match is
7567 * used to direct packets to a VNIC with one destination ring
7568 * group only, there is no need to configure RSS indirection
7569 * table for that VNIC as only one destination ring group is
7570 * used. When this bit is set to '1', then the VNIC is enabled
7571 * in a mode where RSS is enabled in the VNIC using a RSS
7572 * context for computing RSS hash but the RSS indirection table
7573 * is not configured.
7575 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7577 * When this bit is '1', the VNIC is configured to receive both
7578 * RoCE and non-RoCE traffic, but forward only RoCE traffic
7579 * further. Also RoCE traffic can be mirrored to L2 driver.
7581 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE \
7589 * This field is used in Output records to indicate that the
7590 * output is completely written to RAM. This field should be
7591 * read as '1' to indicate that the output has been completely
7592 * written. When writing a command completion or response to an
7593 * internal processor, the order of writes has to be such that
7594 * this field is written last.
7596 } __attribute__((packed));
7599 /* hwrm_vnic_tpa_cfg */
7600 /* Description: This function is used to enable/configure TPA on the VNIC. */
7601 /* Input (40 bytes) */
7602 struct hwrm_vnic_tpa_cfg_input {
7605 * This value indicates what type of request this is. The format
7606 * for the rest of the command is determined by this field.
7610 * This value indicates the what completion ring the request
7611 * will be optionally completed on. If the value is -1, then no
7612 * CR completion will be generated. Any other value must be a
7613 * valid CR ring_id value for this function.
7616 /* This value indicates the command sequence number. */
7619 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7620 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7625 * This is the host address where the response will be written
7626 * when the request is complete. This area must be 16B aligned
7627 * and must be cleared to zero before the request is made.
7631 * When this bit is '1', the VNIC shall be configured to perform
7632 * transparent packet aggregation (TPA) of non-tunneled TCP
7635 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA UINT32_C(0x1)
7637 * When this bit is '1', the VNIC shall be configured to perform
7638 * transparent packet aggregation (TPA) of tunneled TCP packets.
7640 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
7642 * When this bit is '1', the VNIC shall be configured to perform
7643 * transparent packet aggregation (TPA) according to Windows
7644 * Receive Segment Coalescing (RSC) rules.
7646 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
7648 * When this bit is '1', the VNIC shall be configured to perform
7649 * transparent packet aggregation (TPA) according to Linux
7650 * Generic Receive Offload (GRO) rules.
7652 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO UINT32_C(0x8)
7654 * When this bit is '1', the VNIC shall be configured to perform
7655 * transparent packet aggregation (TPA) for TCP packets with IP
7656 * ECN set to non-zero.
7658 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
7660 * When this bit is '1', the VNIC shall be configured to perform
7661 * transparent packet aggregation (TPA) for GRE tunneled TCP
7662 * packets only if all packets have the same GRE sequence.
7664 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ \
7667 * When this bit is '1' and the GRO mode is enabled, the VNIC
7668 * shall be configured to perform transparent packet aggregation
7669 * (TPA) for TCP/IPv4 packets with consecutively increasing
7670 * IPIDs. In other words, the last packet that is being
7671 * aggregated to an already existing aggregation context shall
7672 * have IPID 1 more than the IPID of the last packet that was
7673 * aggregated in that aggregation context.
7675 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
7677 * When this bit is '1' and the GRO mode is enabled, the VNIC
7678 * shall be configured to perform transparent packet aggregation
7679 * (TPA) for TCP packets with the same TTL (IPv4) or Hop limit
7682 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
7684 /* This bit must be '1' for the max_agg_segs field to be configured. */
7685 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS UINT32_C(0x1)
7686 /* This bit must be '1' for the max_aggs field to be configured. */
7687 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS UINT32_C(0x2)
7689 * This bit must be '1' for the max_agg_timer field to be
7692 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER UINT32_C(0x4)
7693 /* This bit must be '1' for the min_agg_len field to be configured. */
7694 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN UINT32_C(0x8)
7696 /* Logical vnic ID */
7697 uint16_t max_agg_segs;
7699 * This is the maximum number of TCP segments that can be
7700 * aggregated (unit is Log2). Max value is 31.
7703 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
7705 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
7707 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
7709 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
7710 /* Any segment size larger than this is not valid */
7711 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
7714 * This is the maximum number of aggregations this VNIC is
7715 * allowed (unit is Log2). Max value is 7
7718 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_1 UINT32_C(0x0)
7719 /* 2 aggregations */
7720 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_2 UINT32_C(0x1)
7721 /* 4 aggregations */
7722 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_4 UINT32_C(0x2)
7723 /* 8 aggregations */
7724 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_8 UINT32_C(0x3)
7725 /* 16 aggregations */
7726 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_16 UINT32_C(0x4)
7727 /* Any aggregation size larger than this is not valid */
7728 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX UINT32_C(0x7)
7731 uint32_t max_agg_timer;
7733 * This is the maximum amount of time allowed for an aggregation
7734 * context to complete after it was initiated.
7736 uint32_t min_agg_len;
7738 * This is the minimum amount of payload length required to
7739 * start an aggregation context.
7741 } __attribute__((packed));
7743 /* Output (16 bytes) */
7744 struct hwrm_vnic_tpa_cfg_output {
7745 uint16_t error_code;
7747 * Pass/Fail or error type Note: receiver to verify the in
7748 * parameters, and fail the call with an error when appropriate
7751 /* This field returns the type of original request. */
7753 /* This field provides original sequence number of the command. */
7756 * This field is the length of the response in bytes. The last
7757 * byte of the response is a valid flag that will read as '1'
7758 * when the command has been completely written to memory.
7766 * This field is used in Output records to indicate that the
7767 * output is completely written to RAM. This field should be
7768 * read as '1' to indicate that the output has been completely
7769 * written. When writing a command completion or response to an
7770 * internal processor, the order of writes has to be such that
7771 * this field is written last.
7773 } __attribute__((packed));
7775 /* hwrm_vnic_rss_cfg */
7776 /* Description: This function is used to enable RSS configuration. */
7777 /* Input (48 bytes) */
7778 struct hwrm_vnic_rss_cfg_input {
7781 * This value indicates what type of request this is. The format
7782 * for the rest of the command is determined by this field.
7786 * This value indicates the what completion ring the request
7787 * will be optionally completed on. If the value is -1, then no
7788 * CR completion will be generated. Any other value must be a
7789 * valid CR ring_id value for this function.
7792 /* This value indicates the command sequence number. */
7795 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7796 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7801 * This is the host address where the response will be written
7802 * when the request is complete. This area must be 16B aligned
7803 * and must be cleared to zero before the request is made.
7807 * When this bit is '1', the RSS hash shall be computed over
7808 * source and destination IPv4 addresses of IPv4 packets.
7810 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
7812 * When this bit is '1', the RSS hash shall be computed over
7813 * source/destination IPv4 addresses and source/destination
7814 * ports of TCP/IPv4 packets.
7816 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
7818 * When this bit is '1', the RSS hash shall be computed over
7819 * source/destination IPv4 addresses and source/destination
7820 * ports of UDP/IPv4 packets.
7822 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
7824 * When this bit is '1', the RSS hash shall be computed over
7825 * source and destination IPv4 addresses of IPv6 packets.
7827 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
7829 * When this bit is '1', the RSS hash shall be computed over
7830 * source/destination IPv6 addresses and source/destination
7831 * ports of TCP/IPv6 packets.
7833 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
7835 * When this bit is '1', the RSS hash shall be computed over
7836 * source/destination IPv6 addresses and source/destination
7837 * ports of UDP/IPv6 packets.
7839 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
7841 uint64_t ring_grp_tbl_addr;
7842 /* This is the address for rss ring group table */
7843 uint64_t hash_key_tbl_addr;
7844 /* This is the address for rss hash key table */
7845 uint16_t rss_ctx_idx;
7846 /* Index to the rss indirection table. */
7847 uint16_t unused_1[3];
7848 } __attribute__((packed));
7850 /* Output (16 bytes) */
7851 struct hwrm_vnic_rss_cfg_output {
7852 uint16_t error_code;
7854 * Pass/Fail or error type Note: receiver to verify the in
7855 * parameters, and fail the call with an error when appropriate
7858 /* This field returns the type of original request. */
7860 /* This field provides original sequence number of the command. */
7863 * This field is the length of the response in bytes. The last
7864 * byte of the response is a valid flag that will read as '1'
7865 * when the command has been completely written to memory.
7873 * This field is used in Output records to indicate that the
7874 * output is completely written to RAM. This field should be
7875 * read as '1' to indicate that the output has been completely
7876 * written. When writing a command completion or response to an
7877 * internal processor, the order of writes has to be such that
7878 * this field is written last.
7880 } __attribute__((packed));
7882 /* hwrm_vnic_plcmodes_cfg */
7884 * Description: This function can be used to set placement mode configuration of
7887 /* Input (40 bytes) */
7888 struct hwrm_vnic_plcmodes_cfg_input {
7891 * This value indicates what type of request this is. The format for the
7892 * rest of the command is determined by this field.
7896 * This value indicates the what completion ring the request will be
7897 * optionally completed on. If the value is -1, then no CR completion
7898 * will be generated. Any other value must be a valid CR ring_id value
7899 * for this function.
7902 /* This value indicates the command sequence number. */
7905 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7906 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7910 * This is the host address where the response will be written when the
7911 * request is complete. This area must be 16B aligned and must be
7912 * cleared to zero before the request is made.
7916 * When this bit is '1', the VNIC shall be configured to use regular
7917 * placement algorithm. By default, the regular placement algorithm
7918 * shall be enabled on the VNIC.
7920 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT \
7923 * When this bit is '1', the VNIC shall be configured use the jumbo
7924 * placement algorithm.
7926 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT \
7929 * When this bit is '1', the VNIC shall be configured to enable Header-
7930 * Data split for IPv4 packets according to the following rules: # If
7931 * the packet is identified as TCP/IPv4, then the packet is split at the
7932 * beginning of the TCP payload. # If the packet is identified as
7933 * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
7934 * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
7935 * the packet is split at the beginning of the upper layer protocol
7936 * header carried in the IPv4 packet.
7938 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
7940 * When this bit is '1', the VNIC shall be configured to enable Header-
7941 * Data split for IPv6 packets according to the following rules: # If
7942 * the packet is identified as TCP/IPv6, then the packet is split at the
7943 * beginning of the TCP payload. # If the packet is identified as
7944 * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
7945 * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
7946 * the packet is split at the beginning of the upper layer protocol
7947 * header carried in the IPv6 packet.
7949 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
7951 * When this bit is '1', the VNIC shall be configured to enable Header-
7952 * Data split for FCoE packets at the beginning of FC payload.
7954 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
7956 * When this bit is '1', the VNIC shall be configured to enable Header-
7957 * Data split for RoCE packets at the beginning of RoCE payload (after
7960 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
7963 * This bit must be '1' for the jumbo_thresh_valid field to be
7966 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID \
7969 * This bit must be '1' for the hds_offset_valid field to be configured.
7971 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID \
7974 * This bit must be '1' for the hds_threshold_valid field to be
7977 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID \
7980 /* Logical vnic ID */
7981 uint16_t jumbo_thresh;
7983 * When jumbo placement algorithm is enabled, this value is used to
7984 * determine the threshold for jumbo placement. Packets with length
7985 * larger than this value will be placed according to the jumbo
7986 * placement algorithm.
7988 uint16_t hds_offset;
7990 * This value is used to determine the offset into packet buffer where
7991 * the split data (payload) will be placed according to one of of HDS
7992 * placement algorithm. The lengths of packet buffers provided for split
7993 * data shall be larger than this value.
7995 uint16_t hds_threshold;
7997 * When one of the HDS placement algorithm is enabled, this value is
7998 * used to determine the threshold for HDS placement. Packets with
7999 * length larger than this value will be placed according to the HDS
8000 * placement algorithm. This value shall be in multiple of 4 bytes.
8002 uint16_t unused_0[3];
8003 } __attribute__((packed));
8005 /* Output (16 bytes) */
8006 struct hwrm_vnic_plcmodes_cfg_output {
8007 uint16_t error_code;
8009 * Pass/Fail or error type Note: receiver to verify the in parameters,
8010 * and fail the call with an error when appropriate
8013 /* This field returns the type of original request. */
8015 /* This field provides original sequence number of the command. */
8018 * This field is the length of the response in bytes. The last byte of
8019 * the response is a valid flag that will read as '1' when the command
8020 * has been completely written to memory.
8028 * This field is used in Output records to indicate that the output is
8029 * completely written to RAM. This field should be read as '1' to
8030 * indicate that the output has been completely written. When writing a
8031 * command completion or response to an internal processor, the order of
8032 * writes has to be such that this field is written last.
8034 } __attribute__((packed));
8036 /* hwrm_vnic_plcmodes_qcfg */
8038 * Description: This function can be used to query placement mode configuration
8041 /* Input (24 bytes) */
8042 struct hwrm_vnic_plcmodes_qcfg_input {
8045 * This value indicates what type of request this is. The format for the
8046 * rest of the command is determined by this field.
8050 * This value indicates the what completion ring the request will be
8051 * optionally completed on. If the value is -1, then no CR completion
8052 * will be generated. Any other value must be a valid CR ring_id value
8053 * for this function.
8056 /* This value indicates the command sequence number. */
8059 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8060 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8064 * This is the host address where the response will be written when the
8065 * request is complete. This area must be 16B aligned and must be
8066 * cleared to zero before the request is made.
8069 /* Logical vnic ID */
8071 } __attribute__((packed));
8073 /* Output (24 bytes) */
8074 struct hwrm_vnic_plcmodes_qcfg_output {
8075 uint16_t error_code;
8077 * Pass/Fail or error type Note: receiver to verify the in parameters,
8078 * and fail the call with an error when appropriate
8081 /* This field returns the type of original request. */
8083 /* This field provides original sequence number of the command. */
8086 * This field is the length of the response in bytes. The last byte of
8087 * the response is a valid flag that will read as '1' when the command
8088 * has been completely written to memory.
8092 * When this bit is '1', the VNIC is configured to use regular placement
8095 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT \
8098 * When this bit is '1', the VNIC is configured to use the jumbo
8099 * placement algorithm.
8101 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT \
8104 * When this bit is '1', the VNIC is configured to enable Header-Data
8105 * split for IPv4 packets.
8107 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
8109 * When this bit is '1', the VNIC is configured to enable Header-Data
8110 * split for IPv6 packets.
8112 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
8114 * When this bit is '1', the VNIC is configured to enable Header-Data
8115 * split for FCoE packets.
8117 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
8119 * When this bit is '1', the VNIC is configured to enable Header-Data
8120 * split for RoCE packets.
8122 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
8124 * When this bit is '1', the VNIC is configured to be the default VNIC
8125 * of the requesting function.
8127 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC UINT32_C(0x40)
8128 uint16_t jumbo_thresh;
8130 * When jumbo placement algorithm is enabled, this value is used to
8131 * determine the threshold for jumbo placement. Packets with length
8132 * larger than this value will be placed according to the jumbo
8133 * placement algorithm.
8135 uint16_t hds_offset;
8137 * This value is used to determine the offset into packet buffer where
8138 * the split data (payload) will be placed according to one of of HDS
8139 * placement algorithm. The lengths of packet buffers provided for split
8140 * data shall be larger than this value.
8142 uint16_t hds_threshold;
8144 * When one of the HDS placement algorithm is enabled, this value is
8145 * used to determine the threshold for HDS placement. Packets with
8146 * length larger than this value will be placed according to the HDS
8147 * placement algorithm. This value shall be in multiple of 4 bytes.
8156 * This field is used in Output records to indicate that the output is
8157 * completely written to RAM. This field should be read as '1' to
8158 * indicate that the output has been completely written. When writing a
8159 * command completion or response to an internal processor, the order of
8160 * writes has to be such that this field is written last.
8162 } __attribute__((packed));
8164 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
8165 /* Description: This function is used to allocate COS/Load Balance context. */
8166 /* Input (16 bytes) */
8167 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
8170 * This value indicates what type of request this is. The format
8171 * for the rest of the command is determined by this field.
8175 * This value indicates the what completion ring the request
8176 * will be optionally completed on. If the value is -1, then no
8177 * CR completion will be generated. Any other value must be a
8178 * valid CR ring_id value for this function.
8181 /* This value indicates the command sequence number. */
8184 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8185 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8190 * This is the host address where the response will be written
8191 * when the request is complete. This area must be 16B aligned
8192 * and must be cleared to zero before the request is made.
8194 } __attribute__((packed));
8196 /* Output (16 bytes) */
8197 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
8198 uint16_t error_code;
8200 * Pass/Fail or error type Note: receiver to verify the in
8201 * parameters, and fail the call with an error when appropriate
8204 /* This field returns the type of original request. */
8206 /* This field provides original sequence number of the command. */
8209 * This field is the length of the response in bytes. The last
8210 * byte of the response is a valid flag that will read as '1'
8211 * when the command has been completely written to memory.
8213 uint16_t rss_cos_lb_ctx_id;
8214 /* rss_cos_lb_ctx_id is 16 b */
8222 * This field is used in Output records to indicate that the
8223 * output is completely written to RAM. This field should be
8224 * read as '1' to indicate that the output has been completely
8225 * written. When writing a command completion or response to an
8226 * internal processor, the order of writes has to be such that
8227 * this field is written last.
8229 } __attribute__((packed));
8231 /* hwrm_vnic_rss_cos_lb_ctx_free */
8232 /* Description: This function can be used to free COS/Load Balance context. */
8233 /* Input (24 bytes) */
8234 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
8237 * This value indicates what type of request this is. The format
8238 * for the rest of the command is determined by this field.
8242 * This value indicates the what completion ring the request
8243 * will be optionally completed on. If the value is -1, then no
8244 * CR completion will be generated. Any other value must be a
8245 * valid CR ring_id value for this function.
8248 /* This value indicates the command sequence number. */
8251 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8252 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8257 * This is the host address where the response will be written
8258 * when the request is complete. This area must be 16B aligned
8259 * and must be cleared to zero before the request is made.
8261 uint16_t rss_cos_lb_ctx_id;
8262 /* rss_cos_lb_ctx_id is 16 b */
8263 uint16_t unused_0[3];
8264 } __attribute__((packed));
8266 /* Output (16 bytes) */
8267 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
8268 uint16_t error_code;
8270 * Pass/Fail or error type Note: receiver to verify the in
8271 * parameters, and fail the call with an error when appropriate
8274 /* This field returns the type of original request. */
8276 /* This field provides original sequence number of the command. */
8279 * This field is the length of the response in bytes. The last
8280 * byte of the response is a valid flag that will read as '1'
8281 * when the command has been completely written to memory.
8289 * This field is used in Output records to indicate that the
8290 * output is completely written to RAM. This field should be
8291 * read as '1' to indicate that the output has been completely
8292 * written. When writing a command completion or response to an
8293 * internal processor, the order of writes has to be such that
8294 * this field is written last.
8296 } __attribute__((packed));
8298 /* hwrm_ring_alloc */
8300 * Description: This command allocates and does basic preparation for a ring.
8302 /* Input (80 bytes) */
8303 struct hwrm_ring_alloc_input {
8306 * This value indicates what type of request this is. The format
8307 * for the rest of the command is determined by this field.
8311 * This value indicates the what completion ring the request
8312 * will be optionally completed on. If the value is -1, then no
8313 * CR completion will be generated. Any other value must be a
8314 * valid CR ring_id value for this function.
8317 /* This value indicates the command sequence number. */
8320 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8321 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8326 * This is the host address where the response will be written
8327 * when the request is complete. This area must be 16B aligned
8328 * and must be cleared to zero before the request is made.
8331 /* This bit must be '1' for the Reserved1 field to be configured. */
8332 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
8333 /* This bit must be '1' for the ring_arb_cfg field to be configured. */
8334 #define HWRM_RING_ALLOC_INPUT_ENABLES_RING_ARB_CFG UINT32_C(0x2)
8335 /* This bit must be '1' for the Reserved3 field to be configured. */
8336 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
8338 * This bit must be '1' for the stat_ctx_id_valid field to be
8341 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
8342 /* This bit must be '1' for the Reserved4 field to be configured. */
8343 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
8344 /* This bit must be '1' for the max_bw_valid field to be configured. */
8345 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
8348 /* L2 Completion Ring (CR) */
8349 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8351 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
8353 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
8354 /* RoCE Notification Completion Ring (ROCE_CR) */
8355 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8358 uint64_t page_tbl_addr;
8359 /* This value is a pointer to the page table for the Ring. */
8361 /* First Byte Offset of the first entry in the first page. */
8364 * Actual page size in 2^page_size. The supported range is
8365 * increments in powers of 2 from 16 bytes to 1GB. - 4 = 16 B
8366 * Page size is 16 B. - 12 = 4 KB Page size is 4 KB. - 13 = 8 KB
8367 * Page size is 8 KB. - 16 = 64 KB Page size is 64 KB. - 21 = 2
8368 * MB Page size is 2 MB. - 22 = 4 MB Page size is 4 MB. - 30 = 1
8369 * GB Page size is 1 GB.
8371 uint8_t page_tbl_depth;
8373 * This value indicates the depth of page table. For this
8374 * version of the specification, value other than 0 or 1 shall
8375 * be considered as an invalid value. When the page_tbl_depth =
8376 * 0, then it is treated as a special case with the following.
8377 * 1. FBO and page size fields are not valid. 2. page_tbl_addr
8378 * is the physical address of the first element of the ring.
8384 * Number of 16B units in the ring. Minimum size for a ring is
8387 uint16_t logical_id;
8389 * Logical ring number for the ring to be allocated. This value
8390 * determines the position in the doorbell area where the update
8391 * to the ring will be made. For completion rings, this value is
8392 * also the MSI-X vector number for the function the completion
8393 * ring is associated with.
8395 uint16_t cmpl_ring_id;
8397 * This field is used only when ring_type is a TX ring. This
8398 * value indicates what completion ring the TX ring is
8403 * This field is used only when ring_type is a TX ring. This
8404 * value indicates what CoS queue the TX ring is associated
8410 /* This field is reserved for the future use. It shall be set to 0. */
8411 uint16_t ring_arb_cfg;
8413 * This field is used only when ring_type is a TX ring. This
8414 * field is used to configure arbitration related parameters for
8417 /* Arbitration policy used for the ring. */
8418 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK UINT32_C(0xf)
8419 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0
8421 * Use strict priority for the TX ring. Priority
8422 * value is specified in arb_policy_param
8424 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
8425 (UINT32_C(0x1) << 0)
8427 * Use weighted fair queue arbitration for the
8428 * TX ring. Weight is specified in
8431 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
8432 (UINT32_C(0x2) << 0)
8433 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
8434 RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ
8435 /* Reserved field. */
8436 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0)
8437 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4
8439 * Arbitration policy specific parameter. # For strict priority
8440 * arbitration policy, this field represents a priority value.
8441 * If set to 0, then the priority is not specified and the HWRM
8442 * is allowed to select any priority for this TX ring. # For
8443 * weighted fair queue arbitration policy, this field represents
8444 * a weight value. If set to 0, then the weight is not specified
8445 * and the HWRM is allowed to select any weight for this TX
8448 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \
8450 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
8454 /* This field is reserved for the future use. It shall be set to 0. */
8455 uint32_t stat_ctx_id;
8457 * This field is used only when ring_type is a TX ring. This
8458 * input indicates what statistics context this ring should be
8462 /* This field is reserved for the future use. It shall be set to 0. */
8465 * This field is used only when ring_type is a TX ring to
8466 * specify maximum BW allocated to the TX ring. The HWRM will
8467 * translate this value into byte counter and time interval used
8468 * for this ring inside the device.
8470 /* The bandwidth value. */
8471 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
8472 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0
8473 /* The granularity of the value (bits or bytes). */
8474 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
8475 /* Value is in bits. */
8476 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
8477 /* Value is in bytes. */
8478 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
8479 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_LAST \
8480 RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES
8481 /* bw_value_unit is 3 b */
8482 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
8483 UINT32_C(0xe0000000)
8484 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
8485 /* Value is in Mb or MB (base 10). */
8486 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
8487 (UINT32_C(0x0) << 29)
8488 /* Value is in Kb or KB (base 10). */
8489 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
8490 (UINT32_C(0x2) << 29)
8491 /* Value is in bits or bytes. */
8492 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
8493 (UINT32_C(0x4) << 29)
8494 /* Value is in Gb or GB (base 10). */
8495 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
8496 (UINT32_C(0x6) << 29)
8497 /* Value is in 1/100th of a percentage of total bandwidth. */
8498 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
8499 (UINT32_C(0x1) << 29)
8501 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
8502 (UINT32_C(0x7) << 29)
8503 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
8504 RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
8507 * This field is used only when ring_type is a Completion ring.
8508 * This value indicates what interrupt mode should be used on
8509 * this completion ring. Note: In the legacy interrupt mode, no
8510 * more than 16 completion rings are allowed.
8513 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0)
8515 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1)
8517 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2)
8518 /* No Interrupt - Polled mode */
8519 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3)
8520 uint8_t unused_8[3];
8521 } __attribute__((packed));
8523 /* Output (16 bytes) */
8524 struct hwrm_ring_alloc_output {
8525 uint16_t error_code;
8527 * Pass/Fail or error type Note: receiver to verify the in
8528 * parameters, and fail the call with an error when appropriate
8531 /* This field returns the type of original request. */
8533 /* This field provides original sequence number of the command. */
8536 * This field is the length of the response in bytes. The last
8537 * byte of the response is a valid flag that will read as '1'
8538 * when the command has been completely written to memory.
8542 * Physical number of ring allocated. This value shall be unique
8545 uint16_t logical_ring_id;
8546 /* Logical number of ring allocated. */
8552 * This field is used in Output records to indicate that the
8553 * output is completely written to RAM. This field should be
8554 * read as '1' to indicate that the output has been completely
8555 * written. When writing a command completion or response to an
8556 * internal processor, the order of writes has to be such that
8557 * this field is written last.
8559 } __attribute__((packed));
8561 /* hwrm_ring_free */
8563 * Description: This command is used to free a ring and associated resources.
8564 * With QoS and DCBx agents, it is possible the traffic classes will be moved
8565 * from one CoS queue to another. When this occurs, the driver shall call
8566 * 'hwrm_ring_free' to free the allocated rings and then call 'hwrm_ring_alloc'
8567 * to re-allocate each ring and assign it to a new CoS queue. hwrm_ring_free
8568 * shall be called on a ring only after it has been idle for 500ms or more and
8569 * no frames have been posted to the ring during this time. All frames queued
8570 * for transmission shall be completed and at least 500ms time elapsed from the
8571 * last completion before calling this command.
8573 /* Input (24 bytes) */
8574 struct hwrm_ring_free_input {
8577 * This value indicates what type of request this is. The format
8578 * for the rest of the command is determined by this field.
8582 * This value indicates the what completion ring the request
8583 * will be optionally completed on. If the value is -1, then no
8584 * CR completion will be generated. Any other value must be a
8585 * valid CR ring_id value for this function.
8588 /* This value indicates the command sequence number. */
8591 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8592 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8597 * This is the host address where the response will be written
8598 * when the request is complete. This area must be 16B aligned
8599 * and must be cleared to zero before the request is made.
8603 /* L2 Completion Ring (CR) */
8604 #define HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8606 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
8608 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
8609 /* RoCE Notification Completion Ring (ROCE_CR) */
8610 #define HWRM_RING_FREE_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8613 /* Physical number of ring allocated. */
8615 } __attribute__((packed));
8617 /* Output (16 bytes) */
8618 struct hwrm_ring_free_output {
8619 uint16_t error_code;
8621 * Pass/Fail or error type Note: receiver to verify the in
8622 * parameters, and fail the call with an error when appropriate
8625 /* This field returns the type of original request. */
8627 /* This field provides original sequence number of the command. */
8630 * This field is the length of the response in bytes. The last
8631 * byte of the response is a valid flag that will read as '1'
8632 * when the command has been completely written to memory.
8640 * This field is used in Output records to indicate that the
8641 * output is completely written to RAM. This field should be
8642 * read as '1' to indicate that the output has been completely
8643 * written. When writing a command completion or response to an
8644 * internal processor, the order of writes has to be such that
8645 * this field is written last.
8647 } __attribute__((packed));
8649 /* hwrm_ring_grp_alloc */
8651 * Description: This API allocates and does basic preparation for a ring group.
8653 /* Input (24 bytes) */
8654 struct hwrm_ring_grp_alloc_input {
8657 * This value indicates what type of request this is. The format
8658 * for the rest of the command is determined by this field.
8662 * This value indicates the what completion ring the request
8663 * will be optionally completed on. If the value is -1, then no
8664 * CR completion will be generated. Any other value must be a
8665 * valid CR ring_id value for this function.
8668 /* This value indicates the command sequence number. */
8671 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8672 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8677 * This is the host address where the response will be written
8678 * when the request is complete. This area must be 16B aligned
8679 * and must be cleared to zero before the request is made.
8682 /* This value identifies the CR associated with the ring group. */
8684 /* This value identifies the main RR associated with the ring group. */
8687 * This value identifies the aggregation RR associated with the
8688 * ring group. If this value is 0xFF... (All Fs), then no
8689 * Aggregation ring will be set.
8693 * This value identifies the statistics context associated with
8696 } __attribute__((packed));
8698 /* Output (16 bytes) */
8699 struct hwrm_ring_grp_alloc_output {
8700 uint16_t error_code;
8702 * Pass/Fail or error type Note: receiver to verify the in
8703 * parameters, and fail the call with an error when appropriate
8706 /* This field returns the type of original request. */
8708 /* This field provides original sequence number of the command. */
8711 * This field is the length of the response in bytes. The last
8712 * byte of the response is a valid flag that will read as '1'
8713 * when the command has been completely written to memory.
8715 uint32_t ring_group_id;
8717 * This is the ring group ID value. Use this value to program
8718 * the default ring group for the VNIC or as table entries in an
8726 * This field is used in Output records to indicate that the
8727 * output is completely written to RAM. This field should be
8728 * read as '1' to indicate that the output has been completely
8729 * written. When writing a command completion or response to an
8730 * internal processor, the order of writes has to be such that
8731 * this field is written last.
8733 } __attribute__((packed));
8735 /* hwrm_ring_grp_free */
8737 * Description: This API frees a ring group and associated resources. # If a
8738 * ring in the ring group is reset or free, then the associated rings in the
8739 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
8740 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
8741 * a part of executing this command, the HWRM shall reset all associated ring
8744 /* Input (24 bytes) */
8745 struct hwrm_ring_grp_free_input {
8748 * This value indicates what type of request this is. The format
8749 * for the rest of the command is determined by this field.
8753 * This value indicates the what completion ring the request
8754 * will be optionally completed on. If the value is -1, then no
8755 * CR completion will be generated. Any other value must be a
8756 * valid CR ring_id value for this function.
8759 /* This value indicates the command sequence number. */
8762 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8763 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8768 * This is the host address where the response will be written
8769 * when the request is complete. This area must be 16B aligned
8770 * and must be cleared to zero before the request is made.
8772 uint32_t ring_group_id;
8773 /* This is the ring group ID value. */
8775 } __attribute__((packed));
8777 /* Output (16 bytes) */
8778 struct hwrm_ring_grp_free_output {
8779 uint16_t error_code;
8781 * Pass/Fail or error type Note: receiver to verify the in
8782 * parameters, and fail the call with an error when appropriate
8785 /* This field returns the type of original request. */
8787 /* This field provides original sequence number of the command. */
8790 * This field is the length of the response in bytes. The last
8791 * byte of the response is a valid flag that will read as '1'
8792 * when the command has been completely written to memory.
8800 * This field is used in Output records to indicate that the
8801 * output is completely written to RAM. This field should be
8802 * read as '1' to indicate that the output has been completely
8803 * written. When writing a command completion or response to an
8804 * internal processor, the order of writes has to be such that
8805 * this field is written last.
8807 } __attribute__((packed));
8809 /* hwrm_cfa_l2_filter_alloc */
8811 * Description: An L2 filter is a filter resource that is used to identify a
8812 * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
8813 * encapsulated packets include both outer L2 header and/or inner l2 header of
8814 * encapsulated packet. The L2 filter resource covers the following OS specific
8815 * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
8816 * of individual multicast filters # All multicast enable/disable filter #
8817 * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
8818 * physical function) # All multicast enable/disable (per function) # Unicast
8819 * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
8820 * enable/disable (per physical function) # List of individual multicast filters
8821 * (Driver needs to advertise the maximum number of filters supported) # All
8822 * multicast enable/disable per physical function # Unicast filters per vnic #
8823 * Promiscuous mode per PF Implementation notes on the use of VNIC in this
8824 * command: # By default, these filters belong to default vnic for the function.
8825 * # Once these filters are set up, only destination VNIC can be modified. # If
8826 * the destination VNIC is not specified in this command, then the HWRM shall
8827 * only create an l2 context id. HWRM Implementation notes for multicast
8828 * filters: # The hwrm_filter_alloc command can be used to set up multicast
8829 * filters (perfect match or partial match). Each individual function driver can
8830 * set up multicast filters independently. # The HWRM needs to keep track of
8831 * multicast filters set up by function drivers and maintain multicast group
8832 * replication records to enable a subset of functions to receive traffic for a
8833 * specific multicast address. # When a specific multicast filter cannot be set,
8834 * the HWRM shall return an error. In this error case, the driver should fall
8835 * back to using one general filter (rather than specific) for all multicast
8836 * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
8837 * source knockout per multicast group record. Examples of setting unicast
8838 * filters: For a unicast MAC based filter, one can use a combination of the
8839 * fields and masks provided in this command to set up the filter. Below are
8840 * some examples: # MAC + no VLAN filter: This filter is used to identify
8841 * traffic that does not contain any VLAN tags and matches destination (or
8842 * source) MAC address. This filter can be set up by setting only l2_addr field
8843 * to be a valid field. All other fields are not valid. The following value is
8844 * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
8845 * to identify traffic that carries single VLAN tag and matches (destination or
8846 * source) MAC address. This filter can be set up by setting only l2_addr and
8847 * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
8848 * following values are set for those two valid fields. l2_addr = MAC,
8849 * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
8850 * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
8851 * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
8852 * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
8853 * All other fields are not valid. The following value are set for l2_addr and
8854 * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
8855 * filter is used to identify traffic that contains zero or 1 VLAN tag and
8856 * matches destination (or source) MAC address. This filter can be set up by
8857 * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
8858 * other fields are not valid. The following value are set for l2_addr,
8859 * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
8860 * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
8861 * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
8862 * fields are not valid. The following values are set for those three valid
8863 * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
8865 /* Input (96 bytes) */
8866 struct hwrm_cfa_l2_filter_alloc_input {
8869 * This value indicates what type of request this is. The format
8870 * for the rest of the command is determined by this field.
8874 * This value indicates the what completion ring the request
8875 * will be optionally completed on. If the value is -1, then no
8876 * CR completion will be generated. Any other value must be a
8877 * valid CR ring_id value for this function.
8880 /* This value indicates the command sequence number. */
8883 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8884 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8889 * This is the host address where the response will be written
8890 * when the request is complete. This area must be 16B aligned
8891 * and must be cleared to zero before the request is made.
8895 * Enumeration denoting the RX, TX type of the resource. This
8896 * enumeration is used for resources that are similar for both
8897 * TX and RX paths of the chip.
8899 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
8901 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
8902 (UINT32_C(0x0) << 0)
8904 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
8905 (UINT32_C(0x1) << 0)
8906 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
8907 CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
8909 * Setting of this flag indicates the applicability to the
8912 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2)
8914 * Setting of this flag indicates drop action. If this flag is
8915 * not set, then it should be considered accept action.
8917 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4)
8919 * If this flag is set, all t_l2_* fields are invalid and they
8920 * should not be specified. If this flag is set, then l2_*
8921 * fields refer to fields of outermost L2 header.
8923 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
8925 /* This bit must be '1' for the l2_addr field to be configured. */
8926 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
8927 /* This bit must be '1' for the l2_addr_mask field to be configured. */
8928 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
8930 /* This bit must be '1' for the l2_ovlan field to be configured. */
8931 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
8933 * This bit must be '1' for the l2_ovlan_mask field to be
8936 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
8938 /* This bit must be '1' for the l2_ivlan field to be configured. */
8939 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
8941 * This bit must be '1' for the l2_ivlan_mask field to be
8944 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
8946 /* This bit must be '1' for the t_l2_addr field to be configured. */
8947 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
8949 * This bit must be '1' for the t_l2_addr_mask field to be
8952 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
8954 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
8955 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
8958 * This bit must be '1' for the t_l2_ovlan_mask field to be
8961 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
8963 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
8964 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
8967 * This bit must be '1' for the t_l2_ivlan_mask field to be
8970 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
8972 /* This bit must be '1' for the src_type field to be configured. */
8973 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
8974 /* This bit must be '1' for the src_id field to be configured. */
8975 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
8976 /* This bit must be '1' for the tunnel_type field to be configured. */
8977 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
8979 /* This bit must be '1' for the dst_id field to be configured. */
8980 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
8982 * This bit must be '1' for the mirror_vnic_id field to be
8985 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
8989 * This value sets the match value for the L2 MAC address.
8990 * Destination MAC address for RX path. Source MAC address for
8995 uint8_t l2_addr_mask[6];
8997 * This value sets the mask value for the L2 address. A value of
8998 * 0 will mask the corresponding bit from compare.
9001 /* This value sets VLAN ID value for outer VLAN. */
9002 uint16_t l2_ovlan_mask;
9004 * This value sets the mask value for the ovlan id. A value of 0
9005 * will mask the corresponding bit from compare.
9008 /* This value sets VLAN ID value for inner VLAN. */
9009 uint16_t l2_ivlan_mask;
9011 * This value sets the mask value for the ivlan id. A value of 0
9012 * will mask the corresponding bit from compare.
9016 uint8_t t_l2_addr[6];
9018 * This value sets the match value for the tunnel L2 MAC
9019 * address. Destination MAC address for RX path. Source MAC
9020 * address for TX path.
9024 uint8_t t_l2_addr_mask[6];
9026 * This value sets the mask value for the tunnel L2 address. A
9027 * value of 0 will mask the corresponding bit from compare.
9029 uint16_t t_l2_ovlan;
9030 /* This value sets VLAN ID value for tunnel outer VLAN. */
9031 uint16_t t_l2_ovlan_mask;
9033 * This value sets the mask value for the tunnel ovlan id. A
9034 * value of 0 will mask the corresponding bit from compare.
9036 uint16_t t_l2_ivlan;
9037 /* This value sets VLAN ID value for tunnel inner VLAN. */
9038 uint16_t t_l2_ivlan_mask;
9040 * This value sets the mask value for the tunnel ivlan id. A
9041 * value of 0 will mask the corresponding bit from compare.
9044 /* This value identifies the type of source of the packet. */
9046 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0)
9047 /* Physical function */
9048 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1)
9049 /* Virtual function */
9050 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2)
9051 /* Virtual NIC of a function */
9052 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3)
9053 /* Embedded processor for CFA management */
9054 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4)
9055 /* Embedded processor for OOB management */
9056 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5)
9057 /* Embedded processor for RoCE */
9058 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6)
9059 /* Embedded processor for network proxy functions */
9060 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7)
9064 * This value is the id of the source. For a network port, it
9065 * represents port_id. For a physical function, it represents
9066 * fid. For a virtual function, it represents vf_id. For a vnic,
9067 * it represents vnic_id. For embedded processors, this id is
9068 * not valid. Notes: 1. The function ID is implied if it src_id
9069 * is not provided for a src_type that is either
9071 uint8_t tunnel_type;
9074 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9076 /* Virtual eXtensible Local Area Network (VXLAN) */
9077 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9080 * Network Virtualization Generic Routing
9081 * Encapsulation (NVGRE)
9083 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9086 * Generic Routing Encapsulation (GRE) inside
9089 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
9091 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
9092 /* Generic Network Virtualization Encapsulation (Geneve) */
9093 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
9094 /* Multi-Protocol Lable Switching (MPLS) */
9095 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
9096 /* Stateless Transport Tunnel (STT) */
9097 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9099 * Generic Routing Encapsulation (GRE) inside IP
9102 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
9104 * IPV4 over virtual eXtensible Local Area
9105 * Network (IPV4oVXLAN)
9107 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 \
9109 /* Any tunneled traffic */
9110 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9115 * If set, this value shall represent the Logical VNIC ID of the
9116 * destination VNIC for the RX path and network port id of the
9117 * destination port for the TX path.
9119 uint16_t mirror_vnic_id;
9120 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9123 * This hint is provided to help in placing the filter in the
9127 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9129 /* Above the given filter */
9130 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
9132 /* Below the given filter */
9133 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
9135 /* As high as possible */
9136 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
9137 /* As low as possible */
9138 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4)
9141 uint64_t l2_filter_id_hint;
9143 * This is the ID of the filter that goes along with the
9144 * pri_hint. This field is valid only for the following values.
9145 * 1 - Above the given filter 2 - Below the given filter
9147 } __attribute__((packed));
9149 /* Output (24 bytes) */
9150 struct hwrm_cfa_l2_filter_alloc_output {
9151 uint16_t error_code;
9153 * Pass/Fail or error type Note: receiver to verify the in
9154 * parameters, and fail the call with an error when appropriate
9157 /* This field returns the type of original request. */
9159 /* This field provides original sequence number of the command. */
9162 * This field is the length of the response in bytes. The last
9163 * byte of the response is a valid flag that will read as '1'
9164 * when the command has been completely written to memory.
9166 uint64_t l2_filter_id;
9168 * This value identifies a set of CFA data structures used for
9173 * This is the ID of the flow associated with this filter. This
9174 * value shall be used to match and associate the flow
9175 * identifier returned in completion records. A value of
9176 * 0xFFFFFFFF shall indicate no flow id.
9183 * This field is used in Output records to indicate that the
9184 * output is completely written to RAM. This field should be
9185 * read as '1' to indicate that the output has been completely
9186 * written. When writing a command completion or response to an
9187 * internal processor, the order of writes has to be such that
9188 * this field is written last.
9190 } __attribute__((packed));
9192 /* hwrm_cfa_l2_filter_free */
9194 * Description: Free a L2 filter. The HWRM shall free all associated filter
9195 * resources with the L2 filter.
9197 /* Input (24 bytes) */
9198 struct hwrm_cfa_l2_filter_free_input {
9201 * This value indicates what type of request this is. The format
9202 * for the rest of the command is determined by this field.
9206 * This value indicates the what completion ring the request
9207 * will be optionally completed on. If the value is -1, then no
9208 * CR completion will be generated. Any other value must be a
9209 * valid CR ring_id value for this function.
9212 /* This value indicates the command sequence number. */
9215 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9216 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9221 * This is the host address where the response will be written
9222 * when the request is complete. This area must be 16B aligned
9223 * and must be cleared to zero before the request is made.
9225 uint64_t l2_filter_id;
9227 * This value identifies a set of CFA data structures used for
9230 } __attribute__((packed));
9232 /* Output (16 bytes) */
9233 struct hwrm_cfa_l2_filter_free_output {
9234 uint16_t error_code;
9236 * Pass/Fail or error type Note: receiver to verify the in
9237 * parameters, and fail the call with an error when appropriate
9240 /* This field returns the type of original request. */
9242 /* This field provides original sequence number of the command. */
9245 * This field is the length of the response in bytes. The last
9246 * byte of the response is a valid flag that will read as '1'
9247 * when the command has been completely written to memory.
9255 * This field is used in Output records to indicate that the
9256 * output is completely written to RAM. This field should be
9257 * read as '1' to indicate that the output has been completely
9258 * written. When writing a command completion or response to an
9259 * internal processor, the order of writes has to be such that
9260 * this field is written last.
9262 } __attribute__((packed));
9264 /* hwrm_cfa_l2_filter_cfg */
9265 /* Description: Change the configuration of an existing L2 filter */
9266 /* Input (40 bytes) */
9267 struct hwrm_cfa_l2_filter_cfg_input {
9270 * This value indicates what type of request this is. The format
9271 * for the rest of the command is determined by this field.
9275 * This value indicates the what completion ring the request
9276 * will be optionally completed on. If the value is -1, then no
9277 * CR completion will be generated. Any other value must be a
9278 * valid CR ring_id value for this function.
9281 /* This value indicates the command sequence number. */
9284 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9285 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9290 * This is the host address where the response will be written
9291 * when the request is complete. This area must be 16B aligned
9292 * and must be cleared to zero before the request is made.
9296 * Enumeration denoting the RX, TX type of the resource. This
9297 * enumeration is used for resources that are similar for both
9298 * TX and RX paths of the chip.
9300 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9302 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX \
9303 (UINT32_C(0x0) << 0)
9305 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX \
9306 (UINT32_C(0x1) << 0)
9307 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
9308 CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
9310 * Setting of this flag indicates drop action. If this flag is
9311 * not set, then it should be considered accept action.
9313 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2)
9315 /* This bit must be '1' for the dst_id field to be configured. */
9316 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1)
9318 * This bit must be '1' for the new_mirror_vnic_id field to be
9321 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
9323 uint64_t l2_filter_id;
9325 * This value identifies a set of CFA data structures used for
9330 * If set, this value shall represent the Logical VNIC ID of the
9331 * destination VNIC for the RX path and network port id of the
9332 * destination port for the TX path.
9334 uint32_t new_mirror_vnic_id;
9335 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
9336 } __attribute__((packed));
9338 /* Output (16 bytes) */
9339 struct hwrm_cfa_l2_filter_cfg_output {
9340 uint16_t error_code;
9342 * Pass/Fail or error type Note: receiver to verify the in
9343 * parameters, and fail the call with an error when appropriate
9346 /* This field returns the type of original request. */
9348 /* This field provides original sequence number of the command. */
9351 * This field is the length of the response in bytes. The last
9352 * byte of the response is a valid flag that will read as '1'
9353 * when the command has been completely written to memory.
9361 * This field is used in Output records to indicate that the
9362 * output is completely written to RAM. This field should be
9363 * read as '1' to indicate that the output has been completely
9364 * written. When writing a command completion or response to an
9365 * internal processor, the order of writes has to be such that
9366 * this field is written last.
9368 } __attribute__((packed));
9370 /* hwrm_cfa_l2_set_rx_mask */
9371 /* Description: This command will set rx mask of the function. */
9372 /* Input (56 bytes) */
9373 struct hwrm_cfa_l2_set_rx_mask_input {
9376 * This value indicates what type of request this is. The format
9377 * for the rest of the command is determined by this field.
9381 * This value indicates the what completion ring the request
9382 * will be optionally completed on. If the value is -1, then no
9383 * CR completion will be generated. Any other value must be a
9384 * valid CR ring_id value for this function.
9387 /* This value indicates the command sequence number. */
9390 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9391 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9396 * This is the host address where the response will be written
9397 * when the request is complete. This area must be 16B aligned
9398 * and must be cleared to zero before the request is made.
9403 /* Reserved for future use. */
9404 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
9406 * When this bit is '1', the function is requested to accept
9407 * multi-cast packets specified by the multicast addr table.
9409 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
9411 * When this bit is '1', the function is requested to accept all
9412 * multi-cast packets.
9414 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
9416 * When this bit is '1', the function is requested to accept
9417 * broadcast packets.
9419 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
9421 * When this bit is '1', the function is requested to be put in
9422 * the promiscuous mode. The HWRM should accept any function to
9423 * set up promiscuous mode. The HWRM shall follow the semantics
9424 * below for the promiscuous mode support. # When partitioning
9425 * is not enabled on a port (i.e. single PF on the port), then
9426 * the PF shall be allowed to be in the promiscuous mode. When
9427 * the PF is in the promiscuous mode, then it shall receive all
9428 * host bound traffic on that port. # When partitioning is
9429 * enabled on a port (i.e. multiple PFs per port) and a PF on
9430 * that port is in the promiscuous mode, then the PF receives
9431 * all traffic within that partition as identified by a unique
9432 * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
9433 * for the PF is specified, then the setting of promiscuous mode
9434 * on that PF shall result in the PF receiving all host bound
9435 * traffic with matching outer VLAN. # A VF shall can be set in
9436 * the promiscuous mode. In the promiscuous mode, the VF does
9437 * not receive any traffic unless a unique outer VLAN for the VF
9438 * is specified. If a unique outer VLAN for the VF is specified,
9439 * then the setting of promiscuous mode on that VF shall result
9440 * in the VF receiving all host bound traffic with the matching
9441 * outer VLAN. # The HWRM shall allow the setting of promiscuous
9442 * mode on a function independently from the promiscuous mode
9443 * settings on other functions.
9445 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
9447 * If this flag is set, the corresponding RX filters shall be
9448 * set up to cover multicast/broadcast filters for the outermost
9449 * Layer 2 destination MAC address field.
9451 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
9453 * If this flag is set, the corresponding RX filters shall be
9454 * set up to cover multicast/broadcast filters for the VLAN-
9455 * tagged packets that match the TPID and VID fields of VLAN
9456 * tags in the VLAN tag table specified in this command.
9458 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40)
9460 * If this flag is set, the corresponding RX filters shall be
9461 * set up to cover multicast/broadcast filters for non-VLAN
9462 * tagged packets and VLAN-tagged packets that match the TPID
9463 * and VID fields of VLAN tags in the VLAN tag table specified
9466 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80)
9468 * If this flag is set, the corresponding RX filters shall be
9469 * set up to cover multicast/broadcast filters for non-VLAN
9470 * tagged packets and VLAN-tagged packets matching any VLAN tag.
9471 * If this flag is set, then the HWRM shall ignore VLAN tags
9472 * specified in vlan_tag_tbl. If none of vlanonly, vlan_nonvlan,
9473 * and anyvlan_nonvlan flags is set, then the HWRM shall ignore
9474 * VLAN tags specified in vlan_tag_tbl. The HWRM client shall
9475 * set at most one flag out of vlanonly, vlan_nonvlan, and
9478 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN \
9480 uint64_t mc_tbl_addr;
9481 /* This is the address for mcast address tbl. */
9482 uint32_t num_mc_entries;
9484 * This value indicates how many entries in mc_tbl are valid.
9485 * Each entry is 6 bytes.
9488 uint64_t vlan_tag_tbl_addr;
9490 * This is the address for VLAN tag table. Each VLAN entry in
9491 * the table is 4 bytes of a VLAN tag including TPID, PCP, DEI,
9492 * and VID fields in network byte order.
9494 uint32_t num_vlan_tags;
9496 * This value indicates how many entries in vlan_tag_tbl are
9497 * valid. Each entry is 4 bytes.
9500 } __attribute__((packed));
9502 /* Output (16 bytes) */
9503 struct hwrm_cfa_l2_set_rx_mask_output {
9504 uint16_t error_code;
9506 * Pass/Fail or error type Note: receiver to verify the in
9507 * parameters, and fail the call with an error when appropriate
9510 /* This field returns the type of original request. */
9512 /* This field provides original sequence number of the command. */
9515 * This field is the length of the response in bytes. The last
9516 * byte of the response is a valid flag that will read as '1'
9517 * when the command has been completely written to memory.
9525 * This field is used in Output records to indicate that the
9526 * output is completely written to RAM. This field should be
9527 * read as '1' to indicate that the output has been completely
9528 * written. When writing a command completion or response to an
9529 * internal processor, the order of writes has to be such that
9530 * this field is written last.
9532 } __attribute__((packed));
9534 /* Command specific Error Codes (8 bytes) */
9535 struct hwrm_cfa_l2_set_rx_mask_cmd_err {
9538 * command specific error codes that goes to the cmd_err field
9539 * in Common HWRM Error Response.
9542 #define HWRM_CFA_L2_SET_RX_MASK_CMD_ERR_CODE_UNKNOWN UINT32_C(0x0)
9544 * Unable to complete operation due to conflict
9545 * with Ntuple Filter
9548 HWRM_CFA_L2_SET_RX_MASK_CMD_ERR_CODE_NTUPLE_FILTER_CONFLICT_ERR \
9550 uint8_t unused_0[7];
9551 } __attribute__((packed));
9553 /* hwrm_cfa_vlan_antispoof_cfg */
9554 /* Description: Configures vlan anti-spoof filters for VF. */
9555 /* Input (32 bytes) */
9556 struct hwrm_cfa_vlan_antispoof_cfg_input {
9559 * This value indicates what type of request this is. The format for the
9560 * rest of the command is determined by this field.
9564 * This value indicates the what completion ring the request will be
9565 * optionally completed on. If the value is -1, then no CR completion
9566 * will be generated. Any other value must be a valid CR ring_id value
9567 * for this function.
9570 /* This value indicates the command sequence number. */
9573 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9574 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9578 * This is the host address where the response will be written when the
9579 * request is complete. This area must be 16B aligned and must be
9580 * cleared to zero before the request is made.
9584 * Function ID of the function that is being configured. Only valid for
9585 * a VF FID configured by the PF.
9589 uint32_t num_vlan_entries;
9590 /* Number of VLAN entries in the vlan_tag_mask_tbl. */
9591 uint64_t vlan_tag_mask_tbl_addr;
9593 * The vlan_tag_mask_tbl_addr is the DMA address of the VLAN antispoof
9594 * table. Each table entry contains the 16-bit TPID (0x8100 or 0x88a8
9595 * only), 16-bit VLAN ID, and a 16-bit mask, all in network order to
9596 * match hwrm_cfa_l2_set_rx_mask. For an individual VLAN entry, the mask
9597 * value should be 0xfff for the 12-bit VLAN ID.
9601 /* Output (16 bytes) */
9602 struct hwrm_cfa_vlan_antispoof_cfg_output {
9603 uint16_t error_code;
9605 * Pass/Fail or error type Note: receiver to verify the in parameters,
9606 * and fail the call with an error when appropriate
9609 /* This field returns the type of original request. */
9611 /* This field provides original sequence number of the command. */
9614 * This field is the length of the response in bytes. The last byte of
9615 * the response is a valid flag that will read as '1' when the command
9616 * has been completely written to memory.
9624 * This field is used in Output records to indicate that the output is
9625 * completely written to RAM. This field should be read as '1' to
9626 * indicate that the output has been completely written. When writing a
9627 * command completion or response to an internal processor, the order of
9628 * writes has to be such that this field is written last.
9632 /* hwrm_cfa_ntuple_filter_alloc */
9634 * Description: This is a ntuple filter that uses fields from L4/L3 header and
9635 * optionally fields from L2. The ntuple filters apply to receive traffic only.
9636 * All L2/L3/L4 header fields are specified in network byte order. These filters
9637 * can be used for Receive Flow Steering (RFS). # For ethertype value, only
9638 * 0x0800 (IPv4) and 0x86dd (IPv6) shall be supported for ntuple filters. # If a
9639 * field specified in this command is not enabled as a valid field, then that
9640 * field shall not be used in matching packet header fields against this filter.
9642 /* Input (128 bytes) */
9643 struct hwrm_cfa_ntuple_filter_alloc_input {
9646 * This value indicates what type of request this is. The format
9647 * for the rest of the command is determined by this field.
9651 * This value indicates the what completion ring the request
9652 * will be optionally completed on. If the value is -1, then no
9653 * CR completion will be generated. Any other value must be a
9654 * valid CR ring_id value for this function.
9657 /* This value indicates the command sequence number. */
9660 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9661 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9666 * This is the host address where the response will be written
9667 * when the request is complete. This area must be 16B aligned
9668 * and must be cleared to zero before the request is made.
9672 * Setting of this flag indicates the applicability to the
9675 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
9678 * Setting of this flag indicates drop action. If this flag is
9679 * not set, then it should be considered accept action.
9681 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x2)
9683 * Setting of this flag indicates that a meter is expected to be
9684 * attached to this flow. This hint can be used when choosing
9685 * the action record format required for the flow.
9687 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_METER UINT32_C(0x4)
9689 /* This bit must be '1' for the l2_filter_id field to be configured. */
9690 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID \
9692 /* This bit must be '1' for the ethertype field to be configured. */
9693 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE \
9695 /* This bit must be '1' for the tunnel_type field to be configured. */
9696 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
9698 /* This bit must be '1' for the src_macaddr field to be configured. */
9699 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR \
9701 /* This bit must be '1' for the ipaddr_type field to be configured. */
9702 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IPADDR_TYPE \
9704 /* This bit must be '1' for the src_ipaddr field to be configured. */
9705 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR \
9708 * This bit must be '1' for the src_ipaddr_mask field to be
9711 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK \
9713 /* This bit must be '1' for the dst_ipaddr field to be configured. */
9714 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR \
9717 * This bit must be '1' for the dst_ipaddr_mask field to be
9720 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK \
9722 /* This bit must be '1' for the ip_protocol field to be configured. */
9723 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL \
9725 /* This bit must be '1' for the src_port field to be configured. */
9726 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT \
9729 * This bit must be '1' for the src_port_mask field to be
9732 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK \
9734 /* This bit must be '1' for the dst_port field to be configured. */
9735 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT \
9738 * This bit must be '1' for the dst_port_mask field to be
9741 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK \
9743 /* This bit must be '1' for the pri_hint field to be configured. */
9744 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_PRI_HINT \
9747 * This bit must be '1' for the ntuple_filter_id field to be
9750 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_NTUPLE_FILTER_ID \
9752 /* This bit must be '1' for the dst_id field to be configured. */
9753 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
9756 * This bit must be '1' for the mirror_vnic_id field to be
9759 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
9761 /* This bit must be '1' for the dst_macaddr field to be configured. */
9762 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR \
9764 uint64_t l2_filter_id;
9766 * This value identifies a set of CFA data structures used for
9769 uint8_t src_macaddr[6];
9771 * This value indicates the source MAC address in the Ethernet
9775 /* This value indicates the ethertype in the Ethernet header. */
9776 uint8_t ip_addr_type;
9778 * This value indicates the type of IP address. 4 - IPv4 6 -
9779 * IPv6 All others are invalid.
9782 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN \
9785 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 \
9788 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \
9790 uint8_t ip_protocol;
9792 * The value of protocol filed in IP header. Applies to UDP and
9793 * TCP traffic. 6 - TCP 17 - UDP
9796 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN \
9799 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP \
9802 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP \
9806 * If set, this value shall represent the Logical VNIC ID of the
9807 * destination VNIC for the RX path and network port id of the
9808 * destination port for the TX path.
9810 uint16_t mirror_vnic_id;
9811 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9812 uint8_t tunnel_type;
9814 * This value indicates the tunnel type for this filter. If this
9815 * field is not specified, then the filter shall apply to both
9816 * non-tunneled and tunneled packets. If this field conflicts
9817 * with the tunnel_type specified in the l2_filter_id, then the
9818 * HWRM shall return an error for this command.
9821 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9823 /* Virtual eXtensible Local Area Network (VXLAN) */
9824 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9827 * Network Virtualization Generic Routing
9828 * Encapsulation (NVGRE)
9830 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9833 * Generic Routing Encapsulation (GRE) inside
9836 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
9839 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
9841 /* Generic Network Virtualization Encapsulation (Geneve) */
9842 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
9844 /* Multi-Protocol Lable Switching (MPLS) */
9845 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
9847 /* Stateless Transport Tunnel (STT) */
9848 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9850 * Generic Routing Encapsulation (GRE) inside IP
9853 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
9855 /* Any tunneled traffic */
9856 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9860 * This hint is provided to help in placing the filter in the
9864 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9866 /* Above the given filter */
9867 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE UINT32_C(0x1)
9868 /* Below the given filter */
9869 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_BELOW UINT32_C(0x2)
9870 /* As high as possible */
9871 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_HIGHEST \
9873 /* As low as possible */
9874 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_LOWEST UINT32_C(0x4)
9875 uint32_t src_ipaddr[4];
9877 * The value of source IP address to be used in filtering. For
9878 * IPv4, first four bytes represent the IP address.
9880 uint32_t src_ipaddr_mask[4];
9882 * The value of source IP address mask to be used in filtering.
9883 * For IPv4, first four bytes represent the IP address mask.
9885 uint32_t dst_ipaddr[4];
9887 * The value of destination IP address to be used in filtering.
9888 * For IPv4, first four bytes represent the IP address.
9890 uint32_t dst_ipaddr_mask[4];
9892 * The value of destination IP address mask to be used in
9893 * filtering. For IPv4, first four bytes represent the IP
9898 * The value of source port to be used in filtering. Applies to
9899 * UDP and TCP traffic.
9901 uint16_t src_port_mask;
9903 * The value of source port mask to be used in filtering.
9904 * Applies to UDP and TCP traffic.
9908 * The value of destination port to be used in filtering.
9909 * Applies to UDP and TCP traffic.
9911 uint16_t dst_port_mask;
9913 * The value of destination port mask to be used in filtering.
9914 * Applies to UDP and TCP traffic.
9916 uint64_t ntuple_filter_id_hint;
9917 /* This is the ID of the filter that goes along with the pri_hint. */
9918 } __attribute__((packed));
9920 /* Output (24 bytes) */
9921 struct hwrm_cfa_ntuple_filter_alloc_output {
9922 uint16_t error_code;
9924 * Pass/Fail or error type Note: receiver to verify the in
9925 * parameters, and fail the call with an error when appropriate
9928 /* This field returns the type of original request. */
9930 /* This field provides original sequence number of the command. */
9933 * This field is the length of the response in bytes. The last
9934 * byte of the response is a valid flag that will read as '1'
9935 * when the command has been completely written to memory.
9937 uint64_t ntuple_filter_id;
9938 /* This value is an opaque id into CFA data structures. */
9941 * This is the ID of the flow associated with this filter. This
9942 * value shall be used to match and associate the flow
9943 * identifier returned in completion records. A value of
9944 * 0xFFFFFFFF shall indicate no flow id.
9951 * This field is used in Output records to indicate that the
9952 * output is completely written to RAM. This field should be
9953 * read as '1' to indicate that the output has been completely
9954 * written. When writing a command completion or response to an
9955 * internal processor, the order of writes has to be such that
9956 * this field is written last.
9958 } __attribute__((packed));
9960 /* Command specific Error Codes (8 bytes) */
9961 struct hwrm_cfa_ntuple_filter_alloc_cmd_err {
9964 * command specific error codes that goes to the cmd_err field
9965 * in Common HWRM Error Response.
9968 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_UNKNOWN UINT32_C(0x0)
9970 * Unable to complete operation due to conflict
9974 HWRM_CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_RX_MASK_VLAN_CONFLICT_ERR \
9976 uint8_t unused_0[7];
9977 } __attribute__((packed));
9979 /* hwrm_cfa_ntuple_filter_free */
9980 /* Description: Free an ntuple filter */
9981 /* Input (24 bytes) */
9982 struct hwrm_cfa_ntuple_filter_free_input {
9985 * This value indicates what type of request this is. The format
9986 * for the rest of the command is determined by this field.
9990 * This value indicates the what completion ring the request
9991 * will be optionally completed on. If the value is -1, then no
9992 * CR completion will be generated. Any other value must be a
9993 * valid CR ring_id value for this function.
9996 /* This value indicates the command sequence number. */
9999 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10000 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10003 uint64_t resp_addr;
10005 * This is the host address where the response will be written
10006 * when the request is complete. This area must be 16B aligned
10007 * and must be cleared to zero before the request is made.
10009 uint64_t ntuple_filter_id;
10010 /* This value is an opaque id into CFA data structures. */
10011 } __attribute__((packed));
10013 /* Output (16 bytes) */
10014 struct hwrm_cfa_ntuple_filter_free_output {
10015 uint16_t error_code;
10017 * Pass/Fail or error type Note: receiver to verify the in
10018 * parameters, and fail the call with an error when appropriate
10021 /* This field returns the type of original request. */
10023 /* This field provides original sequence number of the command. */
10026 * This field is the length of the response in bytes. The last
10027 * byte of the response is a valid flag that will read as '1'
10028 * when the command has been completely written to memory.
10036 * This field is used in Output records to indicate that the
10037 * output is completely written to RAM. This field should be
10038 * read as '1' to indicate that the output has been completely
10039 * written. When writing a command completion or response to an
10040 * internal processor, the order of writes has to be such that
10041 * this field is written last.
10043 } __attribute__((packed));
10045 /* hwrm_cfa_ntuple_filter_cfg */
10047 * Description: Configure an ntuple filter with a new destination VNIC and/or
10050 /* Input (48 bytes) */
10051 struct hwrm_cfa_ntuple_filter_cfg_input {
10054 * This value indicates what type of request this is. The format
10055 * for the rest of the command is determined by this field.
10057 uint16_t cmpl_ring;
10059 * This value indicates the what completion ring the request
10060 * will be optionally completed on. If the value is -1, then no
10061 * CR completion will be generated. Any other value must be a
10062 * valid CR ring_id value for this function.
10065 /* This value indicates the command sequence number. */
10066 uint16_t target_id;
10068 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10069 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10072 uint64_t resp_addr;
10074 * This is the host address where the response will be written
10075 * when the request is complete. This area must be 16B aligned
10076 * and must be cleared to zero before the request is made.
10079 /* This bit must be '1' for the new_dst_id field to be configured. */
10080 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_DST_ID \
10083 * This bit must be '1' for the new_mirror_vnic_id field to be
10086 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10089 * This bit must be '1' for the new_meter_instance_id field to
10092 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10095 uint64_t ntuple_filter_id;
10096 /* This value is an opaque id into CFA data structures. */
10097 uint32_t new_dst_id;
10099 * If set, this value shall represent the new Logical VNIC ID of
10100 * the destination VNIC for the RX path and new network port id
10101 * of the destination port for the TX path.
10103 uint32_t new_mirror_vnic_id;
10104 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10105 uint16_t new_meter_instance_id;
10107 * New meter to attach to the flow. Specifying the invalid
10108 * instance ID is used to remove any existing meter from the
10112 * A value of 0xfff is considered invalid and
10113 * implies the instance is not configured.
10115 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10117 uint16_t unused_1[3];
10118 } __attribute__((packed));
10120 /* Output (16 bytes) */
10121 struct hwrm_cfa_ntuple_filter_cfg_output {
10122 uint16_t error_code;
10124 * Pass/Fail or error type Note: receiver to verify the in
10125 * parameters, and fail the call with an error when appropriate
10128 /* This field returns the type of original request. */
10130 /* This field provides original sequence number of the command. */
10133 * This field is the length of the response in bytes. The last
10134 * byte of the response is a valid flag that will read as '1'
10135 * when the command has been completely written to memory.
10143 * This field is used in Output records to indicate that the
10144 * output is completely written to RAM. This field should be
10145 * read as '1' to indicate that the output has been completely
10146 * written. When writing a command completion or response to an
10147 * internal processor, the order of writes has to be such that
10148 * this field is written last.
10150 } __attribute__((packed));
10152 /* hwrm_cfa_em_flow_alloc */
10154 * Description: This is a generic Exact Match (EM) flow that uses fields from
10155 * L4/L3/L2 headers. The EM flows apply to transmit and receive traffic. All
10156 * L2/L3/L4 header fields are specified in network byte order. For each EM flow,
10157 * there is an associated set of actions specified. For tunneled packets, all
10158 * L2/L3/L4 fields specified are fields of inner headers unless otherwise
10159 * specified. # If a field specified in this command is not enabled as a valid
10160 * field, then that field shall not be used in matching packet header fields
10161 * against this EM flow entry.
10163 /* Input (112 bytes) */
10164 struct hwrm_cfa_em_flow_alloc_input {
10167 * This value indicates what type of request this is. The format
10168 * for the rest of the command is determined by this field.
10170 uint16_t cmpl_ring;
10172 * This value indicates the what completion ring the request
10173 * will be optionally completed on. If the value is -1, then no
10174 * CR completion will be generated. Any other value must be a
10175 * valid CR ring_id value for this function.
10178 /* This value indicates the command sequence number. */
10179 uint16_t target_id;
10181 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10182 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10185 uint64_t resp_addr;
10187 * This is the host address where the response will be written
10188 * when the request is complete. This area must be 16B aligned
10189 * and must be cleared to zero before the request is made.
10193 * Enumeration denoting the RX, TX type of the resource. This
10194 * enumeration is used for resources that are similar for both
10195 * TX and RX paths of the chip.
10197 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
10199 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_TX \
10200 (UINT32_C(0x0) << 0)
10202 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX \
10203 (UINT32_C(0x1) << 0)
10204 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_LAST \
10205 CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX
10207 * Setting of this flag indicates enabling of a byte counter for
10210 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_BYTE_CTR UINT32_C(0x2)
10212 * Setting of this flag indicates enabling of a packet counter
10213 * for a given flow.
10215 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PKT_CTR UINT32_C(0x4)
10217 * Setting of this flag indicates de-capsulation action for the
10220 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DECAP UINT32_C(0x8)
10222 * Setting of this flag indicates encapsulation action for the
10225 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_ENCAP UINT32_C(0x10)
10227 * Setting of this flag indicates drop action. If this flag is
10228 * not set, then it should be considered accept action.
10230 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x20)
10232 * Setting of this flag indicates that a meter is expected to be
10233 * attached to this flow. This hint can be used when choosing
10234 * the action record format required for the flow.
10236 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_METER UINT32_C(0x40)
10238 /* This bit must be '1' for the l2_filter_id field to be configured. */
10239 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
10240 /* This bit must be '1' for the tunnel_type field to be configured. */
10241 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x2)
10242 /* This bit must be '1' for the tunnel_id field to be configured. */
10243 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_ID UINT32_C(0x4)
10244 /* This bit must be '1' for the src_macaddr field to be configured. */
10245 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR UINT32_C(0x8)
10246 /* This bit must be '1' for the dst_macaddr field to be configured. */
10247 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR UINT32_C(0x10)
10248 /* This bit must be '1' for the ovlan_vid field to be configured. */
10249 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID UINT32_C(0x20)
10250 /* This bit must be '1' for the ivlan_vid field to be configured. */
10251 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IVLAN_VID UINT32_C(0x40)
10252 /* This bit must be '1' for the ethertype field to be configured. */
10253 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE UINT32_C(0x80)
10254 /* This bit must be '1' for the src_ipaddr field to be configured. */
10255 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR UINT32_C(0x100)
10256 /* This bit must be '1' for the dst_ipaddr field to be configured. */
10257 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR UINT32_C(0x200)
10258 /* This bit must be '1' for the ipaddr_type field to be configured. */
10259 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IPADDR_TYPE UINT32_C(0x400)
10260 /* This bit must be '1' for the ip_protocol field to be configured. */
10261 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL UINT32_C(0x800)
10262 /* This bit must be '1' for the src_port field to be configured. */
10263 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT UINT32_C(0x1000)
10264 /* This bit must be '1' for the dst_port field to be configured. */
10265 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT UINT32_C(0x2000)
10266 /* This bit must be '1' for the dst_id field to be configured. */
10267 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x4000)
10269 * This bit must be '1' for the mirror_vnic_id field to be
10272 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
10275 * This bit must be '1' for the encap_record_id field to be
10278 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ENCAP_RECORD_ID \
10281 * This bit must be '1' for the meter_instance_id field to be
10284 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_METER_INSTANCE_ID \
10286 uint64_t l2_filter_id;
10288 * This value identifies a set of CFA data structures used for
10291 uint8_t tunnel_type;
10294 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
10296 /* Virtual eXtensible Local Area Network (VXLAN) */
10297 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10299 * Network Virtualization Generic Routing
10300 * Encapsulation (NVGRE)
10302 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
10304 * Generic Routing Encapsulation (GRE) inside
10307 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
10309 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
10310 /* Generic Network Virtualization Encapsulation (Geneve) */
10311 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
10312 /* Multi-Protocol Lable Switching (MPLS) */
10313 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
10314 /* Stateless Transport Tunnel (STT) */
10315 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
10317 * Generic Routing Encapsulation (GRE) inside IP
10320 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
10322 * IPV4 over virtual eXtensible Local Area
10323 * Network (IPV4oVXLAN)
10325 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 UINT32_C(0x9)
10326 /* Any tunneled traffic */
10327 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
10331 uint32_t tunnel_id;
10333 * Tunnel identifier. Virtual Network Identifier (VNI). Only
10334 * valid with tunnel_types VXLAN, NVGRE, and Geneve. Only lower
10335 * 24-bits of VNI field are used in setting up the filter.
10337 uint8_t src_macaddr[6];
10339 * This value indicates the source MAC address in the Ethernet
10342 uint16_t meter_instance_id;
10343 /* The meter instance to attach to the flow. */
10345 * A value of 0xfff is considered invalid and
10346 * implies the instance is not configured.
10348 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_METER_INSTANCE_ID_INVALID \
10350 uint8_t dst_macaddr[6];
10352 * This value indicates the destination MAC address in the
10355 uint16_t ovlan_vid;
10357 * This value indicates the VLAN ID of the outer VLAN tag in the
10360 uint16_t ivlan_vid;
10362 * This value indicates the VLAN ID of the inner VLAN tag in the
10365 uint16_t ethertype;
10366 /* This value indicates the ethertype in the Ethernet header. */
10367 uint8_t ip_addr_type;
10369 * This value indicates the type of IP address. 4 - IPv4 6 -
10370 * IPv6 All others are invalid.
10373 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN UINT32_C(0x0)
10375 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 UINT32_C(0x4)
10377 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 UINT32_C(0x6)
10378 uint8_t ip_protocol;
10380 * The value of protocol filed in IP header. Applies to UDP and
10381 * TCP traffic. 6 - TCP 17 - UDP
10384 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN UINT32_C(0x0)
10386 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_TCP UINT32_C(0x6)
10388 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UDP UINT32_C(0x11)
10391 uint32_t src_ipaddr[4];
10393 * The value of source IP address to be used in filtering. For
10394 * IPv4, first four bytes represent the IP address.
10396 uint32_t dst_ipaddr[4];
10398 * big_endian = True The value of destination IP address to be
10399 * used in filtering. For IPv4, first four bytes represent the
10404 * The value of source port to be used in filtering. Applies to
10405 * UDP and TCP traffic.
10409 * The value of destination port to be used in filtering.
10410 * Applies to UDP and TCP traffic.
10414 * If set, this value shall represent the Logical VNIC ID of the
10415 * destination VNIC for the RX path and network port id of the
10416 * destination port for the TX path.
10418 uint16_t mirror_vnic_id;
10419 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
10420 uint32_t encap_record_id;
10421 /* Logical ID of the encapsulation record. */
10423 } __attribute__((packed));
10425 /* Output (24 bytes) */
10426 struct hwrm_cfa_em_flow_alloc_output {
10427 uint16_t error_code;
10429 * Pass/Fail or error type Note: receiver to verify the in
10430 * parameters, and fail the call with an error when appropriate
10433 /* This field returns the type of original request. */
10435 /* This field provides original sequence number of the command. */
10438 * This field is the length of the response in bytes. The last
10439 * byte of the response is a valid flag that will read as '1'
10440 * when the command has been completely written to memory.
10442 uint64_t em_filter_id;
10443 /* This value is an opaque id into CFA data structures. */
10446 * This is the ID of the flow associated with this filter. This
10447 * value shall be used to match and associate the flow
10448 * identifier returned in completion records. A value of
10449 * 0xFFFFFFFF shall indicate no flow id.
10456 * This field is used in Output records to indicate that the
10457 * output is completely written to RAM. This field should be
10458 * read as '1' to indicate that the output has been completely
10459 * written. When writing a command completion or response to an
10460 * internal processor, the order of writes has to be such that
10461 * this field is written last.
10463 } __attribute__((packed));
10465 /* hwrm_cfa_em_flow_free */
10466 /* Description: Free an EM flow table entry */
10467 /* Input (24 bytes) */
10468 struct hwrm_cfa_em_flow_free_input {
10471 * This value indicates what type of request this is. The format
10472 * for the rest of the command is determined by this field.
10474 uint16_t cmpl_ring;
10476 * This value indicates the what completion ring the request
10477 * will be optionally completed on. If the value is -1, then no
10478 * CR completion will be generated. Any other value must be a
10479 * valid CR ring_id value for this function.
10482 /* This value indicates the command sequence number. */
10483 uint16_t target_id;
10485 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10486 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10489 uint64_t resp_addr;
10491 * This is the host address where the response will be written
10492 * when the request is complete. This area must be 16B aligned
10493 * and must be cleared to zero before the request is made.
10495 uint64_t em_filter_id;
10496 /* This value is an opaque id into CFA data structures. */
10497 } __attribute__((packed));
10499 /* Output (16 bytes) */
10500 struct hwrm_cfa_em_flow_free_output {
10501 uint16_t error_code;
10503 * Pass/Fail or error type Note: receiver to verify the in
10504 * parameters, and fail the call with an error when appropriate
10507 /* This field returns the type of original request. */
10509 /* This field provides original sequence number of the command. */
10512 * This field is the length of the response in bytes. The last
10513 * byte of the response is a valid flag that will read as '1'
10514 * when the command has been completely written to memory.
10522 * This field is used in Output records to indicate that the
10523 * output is completely written to RAM. This field should be
10524 * read as '1' to indicate that the output has been completely
10525 * written. When writing a command completion or response to an
10526 * internal processor, the order of writes has to be such that
10527 * this field is written last.
10529 } __attribute__((packed));
10531 /* hwrm_cfa_em_flow_cfg */
10533 * Description: Configure an EM flow with a new destination VNIC and/or meter.
10535 /* Input (48 bytes) */
10536 struct hwrm_cfa_em_flow_cfg_input {
10539 * This value indicates what type of request this is. The format
10540 * for the rest of the command is determined by this field.
10542 uint16_t cmpl_ring;
10544 * This value indicates the what completion ring the request
10545 * will be optionally completed on. If the value is -1, then no
10546 * CR completion will be generated. Any other value must be a
10547 * valid CR ring_id value for this function.
10550 /* This value indicates the command sequence number. */
10551 uint16_t target_id;
10553 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10554 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10557 uint64_t resp_addr;
10559 * This is the host address where the response will be written
10560 * when the request is complete. This area must be 16B aligned
10561 * and must be cleared to zero before the request is made.
10564 /* This bit must be '1' for the new_dst_id field to be configured. */
10565 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_DST_ID UINT32_C(0x1)
10567 * This bit must be '1' for the new_mirror_vnic_id field to be
10570 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10573 * This bit must be '1' for the new_meter_instance_id field to
10576 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10579 uint64_t em_filter_id;
10580 /* This value is an opaque id into CFA data structures. */
10581 uint32_t new_dst_id;
10583 * If set, this value shall represent the new Logical VNIC ID of
10584 * the destination VNIC for the RX path and network port id of
10585 * the destination port for the TX path.
10587 uint32_t new_mirror_vnic_id;
10588 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10589 uint16_t new_meter_instance_id;
10591 * New meter to attach to the flow. Specifying the invalid
10592 * instance ID is used to remove any existing meter from the
10596 * A value of 0xfff is considered invalid and
10597 * implies the instance is not configured.
10599 #define HWRM_CFA_EM_FLOW_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10601 uint16_t unused_1[3];
10602 } __attribute__((packed));
10604 /* Output (16 bytes) */
10605 struct hwrm_cfa_em_flow_cfg_output {
10606 uint16_t error_code;
10608 * Pass/Fail or error type Note: receiver to verify the in
10609 * parameters, and fail the call with an error when appropriate
10612 /* This field returns the type of original request. */
10614 /* This field provides original sequence number of the command. */
10617 * This field is the length of the response in bytes. The last
10618 * byte of the response is a valid flag that will read as '1'
10619 * when the command has been completely written to memory.
10627 * This field is used in Output records to indicate that the
10628 * output is completely written to RAM. This field should be
10629 * read as '1' to indicate that the output has been completely
10630 * written. When writing a command completion or response to an
10631 * internal processor, the order of writes has to be such that
10632 * this field is written last.
10634 } __attribute__((packed));
10636 /* hwrm_tunnel_dst_port_query */
10638 * Description: This function is called by a driver to query tunnel type
10639 * specific destination port configuration.
10641 /* Input (24 bytes) */
10642 struct hwrm_tunnel_dst_port_query_input {
10645 * This value indicates what type of request this is. The format
10646 * for the rest of the command is determined by this field.
10648 uint16_t cmpl_ring;
10650 * This value indicates the what completion ring the request
10651 * will be optionally completed on. If the value is -1, then no
10652 * CR completion will be generated. Any other value must be a
10653 * valid CR ring_id value for this function.
10656 /* This value indicates the command sequence number. */
10657 uint16_t target_id;
10659 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10660 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10663 uint64_t resp_addr;
10665 * This is the host address where the response will be written
10666 * when the request is complete. This area must be 16B aligned
10667 * and must be cleared to zero before the request is made.
10669 uint8_t tunnel_type;
10671 /* Virtual eXtensible Local Area Network (VXLAN) */
10672 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN \
10674 /* Generic Network Virtualization Encapsulation (Geneve) */
10675 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_GENEVE \
10678 * IPV4 over virtual eXtensible Local Area
10679 * Network (IPV4oVXLAN)
10681 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN_V4 \
10683 uint8_t unused_0[7];
10684 } __attribute__((packed));
10686 /* Output (16 bytes) */
10687 struct hwrm_tunnel_dst_port_query_output {
10688 uint16_t error_code;
10690 * Pass/Fail or error type Note: receiver to verify the in
10691 * parameters, and fail the call with an error when appropriate
10694 /* This field returns the type of original request. */
10696 /* This field provides original sequence number of the command. */
10699 * This field is the length of the response in bytes. The last
10700 * byte of the response is a valid flag that will read as '1'
10701 * when the command has been completely written to memory.
10703 uint16_t tunnel_dst_port_id;
10705 * This field represents the identifier of L4 destination port
10706 * used for the given tunnel type. This field is valid for
10707 * specific tunnel types that use layer 4 (e.g. UDP) transports
10710 uint16_t tunnel_dst_port_val;
10712 * This field represents the value of L4 destination port
10713 * identified by tunnel_dst_port_id. This field is valid for
10714 * specific tunnel types that use layer 4 (e.g. UDP) transports
10715 * for tunneling. This field is in network byte order. A value
10716 * of 0 means that the destination port is not configured.
10723 * This field is used in Output records to indicate that the
10724 * output is completely written to RAM. This field should be
10725 * read as '1' to indicate that the output has been completely
10726 * written. When writing a command completion or response to an
10727 * internal processor, the order of writes has to be such that
10728 * this field is written last.
10730 } __attribute__((packed));
10732 /* hwrm_tunnel_dst_port_alloc */
10734 * Description: This function is called by a driver to allocate l4 destination
10735 * port for a specific tunnel type. The destination port value is provided in
10736 * the input. If the HWRM supports only one global destination port for a tunnel
10737 * type, then the HWRM shall keep track of its usage as described below. # The
10738 * first caller that allocates a destination port shall always succeed and the
10739 * HWRM shall save the destination port configuration for that tunnel type and
10740 * increment the usage count to 1. # Subsequent callers allocating the same
10741 * destination port for that tunnel type shall succeed and the HWRM shall
10742 * increment the usage count for that port for each subsequent caller that
10743 * succeeds. # Any subsequent caller trying to allocate a different destination
10744 * port for that tunnel type shall fail until the usage count for the original
10745 * destination port goes to zero. # A caller that frees a port will cause the
10746 * usage count for that port to decrement.
10748 /* Input (24 bytes) */
10749 struct hwrm_tunnel_dst_port_alloc_input {
10752 * This value indicates what type of request this is. The format
10753 * for the rest of the command is determined by this field.
10755 uint16_t cmpl_ring;
10757 * This value indicates the what completion ring the request
10758 * will be optionally completed on. If the value is -1, then no
10759 * CR completion will be generated. Any other value must be a
10760 * valid CR ring_id value for this function.
10763 /* This value indicates the command sequence number. */
10764 uint16_t target_id;
10766 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10767 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10770 uint64_t resp_addr;
10772 * This is the host address where the response will be written
10773 * when the request is complete. This area must be 16B aligned
10774 * and must be cleared to zero before the request is made.
10776 uint8_t tunnel_type;
10778 /* Virtual eXtensible Local Area Network (VXLAN) */
10779 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10780 /* Generic Network Virtualization Encapsulation (Geneve) */
10781 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
10784 * IPV4 over virtual eXtensible Local Area
10785 * Network (IPV4oVXLAN)
10787 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 \
10790 uint16_t tunnel_dst_port_val;
10792 * This field represents the value of L4 destination port used
10793 * for the given tunnel type. This field is valid for specific
10794 * tunnel types that use layer 4 (e.g. UDP) transports for
10795 * tunneling. This field is in network byte order. A value of 0
10796 * shall fail the command.
10799 } __attribute__((packed));
10801 /* Output (16 bytes) */
10802 struct hwrm_tunnel_dst_port_alloc_output {
10803 uint16_t error_code;
10805 * Pass/Fail or error type Note: receiver to verify the in
10806 * parameters, and fail the call with an error when appropriate
10809 /* This field returns the type of original request. */
10811 /* This field provides original sequence number of the command. */
10814 * This field is the length of the response in bytes. The last
10815 * byte of the response is a valid flag that will read as '1'
10816 * when the command has been completely written to memory.
10818 uint16_t tunnel_dst_port_id;
10820 * Identifier of a tunnel L4 destination port value. Only
10821 * applies to tunnel types that has l4 destination port
10831 * This field is used in Output records to indicate that the
10832 * output is completely written to RAM. This field should be
10833 * read as '1' to indicate that the output has been completely
10834 * written. When writing a command completion or response to an
10835 * internal processor, the order of writes has to be such that
10836 * this field is written last.
10838 } __attribute__((packed));
10840 /* hwrm_tunnel_dst_port_free */
10842 * Description: This function is called by a driver to free l4 destination port
10843 * for a specific tunnel type.
10845 /* Input (24 bytes) */
10846 struct hwrm_tunnel_dst_port_free_input {
10849 * This value indicates what type of request this is. The format
10850 * for the rest of the command is determined by this field.
10852 uint16_t cmpl_ring;
10854 * This value indicates the what completion ring the request
10855 * will be optionally completed on. If the value is -1, then no
10856 * CR completion will be generated. Any other value must be a
10857 * valid CR ring_id value for this function.
10860 /* This value indicates the command sequence number. */
10861 uint16_t target_id;
10863 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10864 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10867 uint64_t resp_addr;
10869 * This is the host address where the response will be written
10870 * when the request is complete. This area must be 16B aligned
10871 * and must be cleared to zero before the request is made.
10873 uint8_t tunnel_type;
10875 /* Virtual eXtensible Local Area Network (VXLAN) */
10876 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10877 /* Generic Network Virtualization Encapsulation (Geneve) */
10878 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
10880 * IPV4 over virtual eXtensible Local Area
10881 * Network (IPV4oVXLAN)
10883 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN_V4 \
10886 uint16_t tunnel_dst_port_id;
10888 * Identifier of a tunnel L4 destination port value. Only
10889 * applies to tunnel types that has l4 destination port
10893 } __attribute__((packed));
10895 /* Output (16 bytes) */
10896 struct hwrm_tunnel_dst_port_free_output {
10897 uint16_t error_code;
10899 * Pass/Fail or error type Note: receiver to verify the in
10900 * parameters, and fail the call with an error when appropriate
10903 /* This field returns the type of original request. */
10905 /* This field provides original sequence number of the command. */
10908 * This field is the length of the response in bytes. The last
10909 * byte of the response is a valid flag that will read as '1'
10910 * when the command has been completely written to memory.
10918 * This field is used in Output records to indicate that the
10919 * output is completely written to RAM. This field should be
10920 * read as '1' to indicate that the output has been completely
10921 * written. When writing a command completion or response to an
10922 * internal processor, the order of writes has to be such that
10923 * this field is written last.
10925 } __attribute__((packed));
10927 /* hwrm_stat_ctx_alloc */
10929 * Description: This command allocates and does basic preparation for a stat
10932 /* Input (32 bytes) */
10933 struct hwrm_stat_ctx_alloc_input {
10936 * This value indicates what type of request this is. The format
10937 * for the rest of the command is determined by this field.
10939 uint16_t cmpl_ring;
10941 * This value indicates the what completion ring the request
10942 * will be optionally completed on. If the value is -1, then no
10943 * CR completion will be generated. Any other value must be a
10944 * valid CR ring_id value for this function.
10947 /* This value indicates the command sequence number. */
10948 uint16_t target_id;
10950 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10951 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10954 uint64_t resp_addr;
10956 * This is the host address where the response will be written
10957 * when the request is complete. This area must be 16B aligned
10958 * and must be cleared to zero before the request is made.
10960 uint64_t stats_dma_addr;
10961 /* This is the address for statistic block. */
10962 uint32_t update_period_ms;
10964 * The statistic block update period in ms. e.g. 250ms, 500ms,
10965 * 750ms, 1000ms. If update_period_ms is 0, then the stats
10966 * update shall be never done and the DMA address shall not be
10967 * used. In this case, the stat block can only be read by
10968 * hwrm_stat_ctx_query command.
10970 uint8_t stat_ctx_flags;
10972 * This field is used to specify statistics context specific
10973 * configuration flags.
10976 * When this bit is set to '1', the statistics context shall be
10977 * allocated for RoCE traffic only. In this case, traffic other
10978 * than offloaded RoCE traffic shall not be included in this
10979 * statistic context. When this bit is set to '0', the
10980 * statistics context shall be used for the network traffic
10981 * other than offloaded RoCE traffic.
10983 #define HWRM_STAT_CTX_ALLOC_INPUT_STAT_CTX_FLAGS_ROCE UINT32_C(0x1)
10984 uint8_t unused_0[3];
10985 } __attribute__((packed));
10987 /* Output (16 bytes) */
10988 struct hwrm_stat_ctx_alloc_output {
10989 uint16_t error_code;
10991 * Pass/Fail or error type Note: receiver to verify the in
10992 * parameters, and fail the call with an error when appropriate
10995 /* This field returns the type of original request. */
10997 /* This field provides original sequence number of the command. */
11000 * This field is the length of the response in bytes. The last
11001 * byte of the response is a valid flag that will read as '1'
11002 * when the command has been completely written to memory.
11004 uint32_t stat_ctx_id;
11005 /* This is the statistics context ID value. */
11011 * This field is used in Output records to indicate that the
11012 * output is completely written to RAM. This field should be
11013 * read as '1' to indicate that the output has been completely
11014 * written. When writing a command completion or response to an
11015 * internal processor, the order of writes has to be such that
11016 * this field is written last.
11018 } __attribute__((packed));
11020 /* hwrm_stat_ctx_free */
11021 /* Description: This command is used to free a stat context. */
11022 /* Input (24 bytes) */
11023 struct hwrm_stat_ctx_free_input {
11026 * This value indicates what type of request this is. The format
11027 * for the rest of the command is determined by this field.
11029 uint16_t cmpl_ring;
11031 * This value indicates the what completion ring the request
11032 * will be optionally completed on. If the value is -1, then no
11033 * CR completion will be generated. Any other value must be a
11034 * valid CR ring_id value for this function.
11037 /* This value indicates the command sequence number. */
11038 uint16_t target_id;
11040 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11041 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11044 uint64_t resp_addr;
11046 * This is the host address where the response will be written
11047 * when the request is complete. This area must be 16B aligned
11048 * and must be cleared to zero before the request is made.
11050 uint32_t stat_ctx_id;
11051 /* ID of the statistics context that is being queried. */
11053 } __attribute__((packed));
11055 /* Output (16 bytes) */
11056 struct hwrm_stat_ctx_free_output {
11057 uint16_t error_code;
11059 * Pass/Fail or error type Note: receiver to verify the in
11060 * parameters, and fail the call with an error when appropriate
11063 /* This field returns the type of original request. */
11065 /* This field provides original sequence number of the command. */
11068 * This field is the length of the response in bytes. The last
11069 * byte of the response is a valid flag that will read as '1'
11070 * when the command has been completely written to memory.
11072 uint32_t stat_ctx_id;
11073 /* This is the statistics context ID value. */
11079 * This field is used in Output records to indicate that the
11080 * output is completely written to RAM. This field should be
11081 * read as '1' to indicate that the output has been completely
11082 * written. When writing a command completion or response to an
11083 * internal processor, the order of writes has to be such that
11084 * this field is written last.
11086 } __attribute__((packed));
11088 /* hwrm_stat_ctx_query */
11089 /* Description: This command returns statistics of a context. */
11090 /* Input (24 bytes) */
11091 struct hwrm_stat_ctx_query_input {
11094 * This value indicates what type of request this is. The format for the
11095 * rest of the command is determined by this field.
11097 uint16_t cmpl_ring;
11099 * This value indicates the what completion ring the request will be
11100 * optionally completed on. If the value is -1, then no CR completion
11101 * will be generated. Any other value must be a valid CR ring_id value
11102 * for this function.
11105 /* This value indicates the command sequence number. */
11106 uint16_t target_id;
11108 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11109 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11111 uint64_t resp_addr;
11113 * This is the host address where the response will be written when the
11114 * request is complete. This area must be 16B aligned and must be
11115 * cleared to zero before the request is made.
11117 uint32_t stat_ctx_id;
11118 /* ID of the statistics context that is being queried. */
11120 } __attribute__((packed));
11122 /* Output (176 bytes) */
11123 struct hwrm_stat_ctx_query_output {
11124 uint16_t error_code;
11126 * Pass/Fail or error type Note: receiver to verify the in parameters,
11127 * and fail the call with an error when appropriate
11130 /* This field returns the type of original request. */
11132 /* This field provides original sequence number of the command. */
11135 * This field is the length of the response in bytes. The last byte of
11136 * the response is a valid flag that will read as '1' when the command
11137 * has been completely written to memory.
11139 uint64_t tx_ucast_pkts;
11140 /* Number of transmitted unicast packets */
11141 uint64_t tx_mcast_pkts;
11142 /* Number of transmitted multicast packets */
11143 uint64_t tx_bcast_pkts;
11144 /* Number of transmitted broadcast packets */
11145 uint64_t tx_err_pkts;
11146 /* Number of transmitted packets with error */
11147 uint64_t tx_drop_pkts;
11148 /* Number of dropped packets on transmit path */
11149 uint64_t tx_ucast_bytes;
11150 /* Number of transmitted bytes for unicast traffic */
11151 uint64_t tx_mcast_bytes;
11152 /* Number of transmitted bytes for multicast traffic */
11153 uint64_t tx_bcast_bytes;
11154 /* Number of transmitted bytes for broadcast traffic */
11155 uint64_t rx_ucast_pkts;
11156 /* Number of received unicast packets */
11157 uint64_t rx_mcast_pkts;
11158 /* Number of received multicast packets */
11159 uint64_t rx_bcast_pkts;
11160 /* Number of received broadcast packets */
11161 uint64_t rx_err_pkts;
11162 /* Number of received packets with error */
11163 uint64_t rx_drop_pkts;
11164 /* Number of dropped packets on received path */
11165 uint64_t rx_ucast_bytes;
11166 /* Number of received bytes for unicast traffic */
11167 uint64_t rx_mcast_bytes;
11168 /* Number of received bytes for multicast traffic */
11169 uint64_t rx_bcast_bytes;
11170 /* Number of received bytes for broadcast traffic */
11171 uint64_t rx_agg_pkts;
11172 /* Number of aggregated unicast packets */
11173 uint64_t rx_agg_bytes;
11174 /* Number of aggregated unicast bytes */
11175 uint64_t rx_agg_events;
11176 /* Number of aggregation events */
11177 uint64_t rx_agg_aborts;
11178 /* Number of aborted aggregations */
11185 * This field is used in Output records to indicate that the output is
11186 * completely written to RAM. This field should be read as '1' to
11187 * indicate that the output has been completely written. When writing a
11188 * command completion or response to an internal processor, the order of
11189 * writes has to be such that this field is written last.
11191 } __attribute__((packed));
11193 /* hwrm_stat_ctx_clr_stats */
11194 /* Description: This command clears statistics of a context. */
11195 /* Input (24 bytes) */
11196 struct hwrm_stat_ctx_clr_stats_input {
11199 * This value indicates what type of request this is. The format
11200 * for the rest of the command is determined by this field.
11202 uint16_t cmpl_ring;
11204 * This value indicates the what completion ring the request
11205 * will be optionally completed on. If the value is -1, then no
11206 * CR completion will be generated. Any other value must be a
11207 * valid CR ring_id value for this function.
11210 /* This value indicates the command sequence number. */
11211 uint16_t target_id;
11213 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11214 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11217 uint64_t resp_addr;
11219 * This is the host address where the response will be written
11220 * when the request is complete. This area must be 16B aligned
11221 * and must be cleared to zero before the request is made.
11223 uint32_t stat_ctx_id;
11224 /* ID of the statistics context that is being queried. */
11226 } __attribute__((packed));
11228 /* Output (16 bytes) */
11229 struct hwrm_stat_ctx_clr_stats_output {
11230 uint16_t error_code;
11232 * Pass/Fail or error type Note: receiver to verify the in
11233 * parameters, and fail the call with an error when appropriate
11236 /* This field returns the type of original request. */
11238 /* This field provides original sequence number of the command. */
11241 * This field is the length of the response in bytes. The last
11242 * byte of the response is a valid flag that will read as '1'
11243 * when the command has been completely written to memory.
11251 * This field is used in Output records to indicate that the
11252 * output is completely written to RAM. This field should be
11253 * read as '1' to indicate that the output has been completely
11254 * written. When writing a command completion or response to an
11255 * internal processor, the order of writes has to be such that
11256 * this field is written last.
11258 } __attribute__((packed));
11260 /* hwrm_exec_fwd_resp */
11262 * Description: This command is used to send an encapsulated request to the
11263 * HWRM. This command instructs the HWRM to execute the request and forward the
11264 * response of the encapsulated request to the location specified in the
11265 * original request that is encapsulated. The target id of this command shall be
11266 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11267 * acknowledge the receipt of the encapsulated request and forwarding of the
11270 /* Input (128 bytes) */
11271 struct hwrm_exec_fwd_resp_input {
11274 * This value indicates what type of request this is. The format
11275 * for the rest of the command is determined by this field.
11277 uint16_t cmpl_ring;
11279 * This value indicates the what completion ring the request
11280 * will be optionally completed on. If the value is -1, then no
11281 * CR completion will be generated. Any other value must be a
11282 * valid CR ring_id value for this function.
11285 /* This value indicates the command sequence number. */
11286 uint16_t target_id;
11288 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11289 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11292 uint64_t resp_addr;
11294 * This is the host address where the response will be written
11295 * when the request is complete. This area must be 16B aligned
11296 * and must be cleared to zero before the request is made.
11298 uint32_t encap_request[26];
11300 * This is an encapsulated request. This request should be
11301 * executed by the HWRM and the response should be provided in
11302 * the response buffer inside the encapsulated request.
11304 uint16_t encap_resp_target_id;
11306 * This value indicates the target id of the response to the
11307 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11308 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11311 uint16_t unused_0[3];
11312 } __attribute__((packed));
11314 /* Output (16 bytes) */
11315 struct hwrm_exec_fwd_resp_output {
11316 uint16_t error_code;
11318 * Pass/Fail or error type Note: receiver to verify the in
11319 * parameters, and fail the call with an error when appropriate
11322 /* This field returns the type of original request. */
11324 /* This field provides original sequence number of the command. */
11327 * This field is the length of the response in bytes. The last
11328 * byte of the response is a valid flag that will read as '1'
11329 * when the command has been completely written to memory.
11337 * This field is used in Output records to indicate that the
11338 * output is completely written to RAM. This field should be
11339 * read as '1' to indicate that the output has been completely
11340 * written. When writing a command completion or response to an
11341 * internal processor, the order of writes has to be such that
11342 * this field is written last.
11344 } __attribute__((packed));
11346 /* hwrm_reject_fwd_resp */
11348 * Description: This command is used to send an encapsulated request to the
11349 * HWRM. This command instructs the HWRM to reject the request and forward the
11350 * error response of the encapsulated request to the location specified in the
11351 * original request that is encapsulated. The target id of this command shall be
11352 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11353 * acknowledge the receipt of the encapsulated request and forwarding of the
11356 /* Input (128 bytes) */
11357 struct hwrm_reject_fwd_resp_input {
11360 * This value indicates what type of request this is. The format
11361 * for the rest of the command is determined by this field.
11363 uint16_t cmpl_ring;
11365 * This value indicates the what completion ring the request
11366 * will be optionally completed on. If the value is -1, then no
11367 * CR completion will be generated. Any other value must be a
11368 * valid CR ring_id value for this function.
11371 /* This value indicates the command sequence number. */
11372 uint16_t target_id;
11374 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11375 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11378 uint64_t resp_addr;
11380 * This is the host address where the response will be written
11381 * when the request is complete. This area must be 16B aligned
11382 * and must be cleared to zero before the request is made.
11384 uint32_t encap_request[26];
11386 * This is an encapsulated request. This request should be
11387 * rejected by the HWRM and the error response should be
11388 * provided in the response buffer inside the encapsulated
11391 uint16_t encap_resp_target_id;
11393 * This value indicates the target id of the response to the
11394 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11395 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11398 uint16_t unused_0[3];
11399 } __attribute__((packed));
11401 /* Output (16 bytes) */
11402 struct hwrm_reject_fwd_resp_output {
11403 uint16_t error_code;
11405 * Pass/Fail or error type Note: receiver to verify the in
11406 * parameters, and fail the call with an error when appropriate
11409 /* This field returns the type of original request. */
11411 /* This field provides original sequence number of the command. */
11414 * This field is the length of the response in bytes. The last
11415 * byte of the response is a valid flag that will read as '1'
11416 * when the command has been completely written to memory.
11424 * This field is used in Output records to indicate that the
11425 * output is completely written to RAM. This field should be
11426 * read as '1' to indicate that the output has been completely
11427 * written. When writing a command completion or response to an
11428 * internal processor, the order of writes has to be such that
11429 * this field is written last.
11431 } __attribute__((packed));
11433 /* hwrm_nvm_get_dir_entries */
11434 /* Input (24 bytes) */
11435 struct hwrm_nvm_get_dir_entries_input {
11437 uint16_t cmpl_ring;
11439 uint16_t target_id;
11440 uint64_t resp_addr;
11441 uint64_t host_dest_addr;
11442 } __attribute__((packed));
11444 /* Output (16 bytes) */
11445 struct hwrm_nvm_get_dir_entries_output {
11446 uint16_t error_code;
11455 } __attribute__((packed));
11458 /* hwrm_nvm_erase_dir_entry */
11459 /* Input (24 bytes) */
11460 struct hwrm_nvm_erase_dir_entry_input {
11462 uint16_t cmpl_ring;
11464 uint16_t target_id;
11465 uint64_t resp_addr;
11467 uint16_t unused_0[3];
11470 /* Output (16 bytes) */
11471 struct hwrm_nvm_erase_dir_entry_output {
11472 uint16_t error_code;
11483 /* hwrm_nvm_get_dir_info */
11484 /* Input (16 bytes) */
11485 struct hwrm_nvm_get_dir_info_input {
11487 uint16_t cmpl_ring;
11489 uint16_t target_id;
11490 uint64_t resp_addr;
11491 } __attribute__((packed));
11493 /* Output (24 bytes) */
11494 struct hwrm_nvm_get_dir_info_output {
11495 uint16_t error_code;
11497 * Pass/Fail or error type Note: receiver to verify the in
11498 * parameters, and fail the call with an error when appropriate
11501 /* This field returns the type of original request. */
11503 /* This field provides original sequence number of the command. */
11506 * This field is the length of the response in bytes. The last
11507 * byte of the response is a valid flag that will read as '1'
11508 * when the command has been completely written to memory.
11511 /* Number of directory entries in the directory. */
11512 uint32_t entry_length;
11513 /* Size of each directory entry, in bytes. */
11520 * This field is used in Output records to indicate that the
11521 * output is completely written to RAM. This field should be
11522 * read as '1' to indicate that the output has been completely
11523 * written. When writing a command completion or response to an
11524 * internal processor, the order of writes has to be such that
11525 * this field is written last.
11527 } __attribute__((packed));
11529 /* hwrm_nvm_write */
11531 * Note: Write to the allocated NVRAM of an item referenced by an existing
11534 /* Input (48 bytes) */
11535 struct hwrm_nvm_write_input {
11538 * This value indicates what type of request this is. The format
11539 * for the rest of the command is determined by this field.
11541 uint16_t cmpl_ring;
11543 * This value indicates the what completion ring the request
11544 * will be optionally completed on. If the value is -1, then no
11545 * CR completion will be generated. Any other value must be a
11546 * valid CR ring_id value for this function.
11549 /* This value indicates the command sequence number. */
11550 uint16_t target_id;
11552 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11553 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11556 uint64_t resp_addr;
11558 * This is the host address where the response will be written
11559 * when the request is complete. This area must be 16B aligned
11560 * and must be cleared to zero before the request is made.
11562 uint64_t host_src_addr;
11563 /* 64-bit Host Source Address. This is where the source data is. */
11566 * The Directory Entry Type (valid values are defined in the
11567 * bnxnvm_directory_type enum defined in the file
11570 uint16_t dir_ordinal;
11572 * Directory ordinal. The 0-based instance of the combined
11573 * Directory Entry Type and Extension.
11577 * The Directory Entry Extension flags (see BNX_DIR_EXT_* in the
11578 * file bnxnvm_defs.h).
11582 * Directory Entry Attribute flags (see BNX_DIR_ATTR_* in the
11583 * file bnxnvm_defs.h).
11585 uint32_t dir_data_length;
11587 * Length of data to write, in bytes. May be less than or equal
11588 * to the allocated size for the directory entry. The data
11589 * length stored in the directory entry will be updated to
11590 * reflect this value once the write is complete.
11596 * When this bit is '1', the original active image will not be
11597 * removed. TBD: what purpose is this?
11599 #define HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG UINT32_C(0x1)
11600 uint32_t dir_item_length;
11602 * The requested length of the allocated NVM for the item, in
11603 * bytes. This value may be greater than or equal to the
11604 * specified data length (dir_data_length). If this value is
11605 * less than the specified data length, it will be ignored. The
11606 * response will contain the actual allocated item length, which
11607 * may be greater than the requested item length. The purpose
11608 * for allocating more than the required number of bytes for an
11609 * item's data is to pre-allocate extra storage (padding) to
11610 * accommodate the potential future growth of an item (e.g.
11611 * upgraded firmware with a size increase, log growth, expanded
11612 * configuration data).
11615 } __attribute__((packed));
11617 /* Output (16 bytes) */
11618 struct hwrm_nvm_write_output {
11619 uint16_t error_code;
11621 * Pass/Fail or error type Note: receiver to verify the in
11622 * parameters, and fail the call with an error when appropriate
11625 /* This field returns the type of original request. */
11627 /* This field provides original sequence number of the command. */
11630 * This field is the length of the response in bytes. The last
11631 * byte of the response is a valid flag that will read as '1'
11632 * when the command has been completely written to memory.
11634 uint32_t dir_item_length;
11636 * Length of the allocated NVM for the item, in bytes. The value
11637 * may be greater than or equal to the specified data length or
11638 * the requested item length. The actual item length used when
11639 * creating a new directory entry will be a multiple of an NVM
11643 /* The directory index of the created or modified item. */
11647 * This field is used in Output records to indicate that the
11648 * output is completely written to RAM. This field should be
11649 * read as '1' to indicate that the output has been completely
11650 * written. When writing a command completion or response to an
11651 * internal processor, the order of writes has to be such that
11652 * this field is written last.
11654 } __attribute__((packed));
11656 /* hwrm_nvm_read */
11658 * Note: Read the contents of an NVRAM item as referenced (indexed) by an
11659 * existing directory entry.
11661 /* Input (40 bytes) */
11662 struct hwrm_nvm_read_input {
11665 * This value indicates what type of request this is. The format
11666 * for the rest of the command is determined by this field.
11668 uint16_t cmpl_ring;
11670 * This value indicates the what completion ring the request
11671 * will be optionally completed on. If the value is -1, then no
11672 * CR completion will be generated. Any other value must be a
11673 * valid CR ring_id value for this function.
11676 /* This value indicates the command sequence number. */
11677 uint16_t target_id;
11679 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11680 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11683 uint64_t resp_addr;
11685 * This is the host address where the response will be written
11686 * when the request is complete. This area must be 16B aligned
11687 * and must be cleared to zero before the request is made.
11689 uint64_t host_dest_addr;
11691 * 64-bit Host Destination Address. This is the host address
11692 * where the data will be written to.
11695 /* The 0-based index of the directory entry. */
11699 /* The NVRAM byte-offset to read from. */
11701 /* The length of the data to be read, in bytes. */
11703 } __attribute__((packed));
11705 /* Output (16 bytes) */
11706 struct hwrm_nvm_read_output {
11707 uint16_t error_code;
11709 * Pass/Fail or error type Note: receiver to verify the in
11710 * parameters, and fail the call with an error when appropriate
11713 /* This field returns the type of original request. */
11715 /* This field provides original sequence number of the command. */
11718 * This field is the length of the response in bytes. The last
11719 * byte of the response is a valid flag that will read as '1'
11720 * when the command has been completely written to memory.
11728 * This field is used in Output records to indicate that the
11729 * output is completely written to RAM. This field should be
11730 * read as '1' to indicate that the output has been completely
11731 * written. When writing a command completion or response to an
11732 * internal processor, the order of writes has to be such that
11733 * this field is written last.
11735 } __attribute__((packed));
11737 /* Hardware Resource Manager Specification */
11738 /* Description: This structure is used to specify port description. */
11740 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
11741 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
11742 * processors inside the chip. This firmware service is vital part of the chip.
11743 * The chip can not be used by a driver or HWRM client without the HWRM.
11745 /* Input (16 bytes) */
11749 * This value indicates what type of request this is. The format
11750 * for the rest of the command is determined by this field.
11752 uint16_t cmpl_ring;
11754 * This value indicates the what completion ring the request
11755 * will be optionally completed on. If the value is -1, then no
11756 * CR completion will be generated. Any other value must be a
11757 * valid CR ring_id value for this function.
11760 /* This value indicates the command sequence number. */
11761 uint16_t target_id;
11763 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11764 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11767 uint64_t resp_addr;
11769 * This is the host address where the response will be written
11770 * when the request is complete. This area must be 16B aligned
11771 * and must be cleared to zero before the request is made.
11773 } __attribute__((packed));
11775 /* Output (8 bytes) */
11777 uint16_t error_code;
11779 * Pass/Fail or error type Note: receiver to verify the in
11780 * parameters, and fail the call with an error when appropriate
11783 /* This field returns the type of original request. */
11785 /* This field provides original sequence number of the command. */
11788 * This field is the length of the response in bytes. The last
11789 * byte of the response is a valid flag that will read as '1'
11790 * when the command has been completely written to memory.
11792 } __attribute__((packed));
11794 /* Short Command Structure (16 bytes) */
11795 struct hwrm_short_input {
11798 * This field indicates the type of request in the request
11799 * buffer. The format for the rest of the command (request) is
11800 * determined by this field.
11802 uint16_t signature;
11804 * This field indicates a signature that is used to identify
11805 * short form of the command listed here. This field shall be
11806 * set to 17185 (0x4321).
11808 /* Signature indicating this is a short form of HWRM command */
11809 #define HWRM_SHORT_REQ_SIGNATURE_SHORT_CMD UINT32_C(0x4321)
11811 /* Reserved for future use. */
11813 /* This value indicates the length of the request. */
11816 * This is the host address where the request was written. This
11817 * area must be 16B aligned.
11819 } __attribute__((packed));
11821 #define HWRM_GET_HWRM_ERROR_CODE(arg) \
11823 typeof(arg) x = (arg); \
11824 ((x) == 0xf ? "HWRM_ERROR" : \
11825 ((x) == 0xffff ? "CMD_NOT_SUPPORTED" : \
11826 ((x) == 0xfffe ? "UNKNOWN_ERR" : \
11827 ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR" : \
11828 ((x) == 0x5 ? "INVALID_FLAGS" : \
11829 ((x) == 0x6 ? "INVALID_ENABLES" : \
11830 ((x) == 0x0 ? "SUCCESS" : \
11831 ((x) == 0x1 ? "FAIL" : \
11832 ((x) == 0x2 ? "INVALID_PARAMS" : \
11833 ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED" : \
11834 "Unknown error_code")))))))))) \
11837 /* Return Codes (8 bytes) */
11839 uint16_t error_code;
11840 /* These are numbers assigned to return/error codes. */
11841 /* Request was successfully executed by the HWRM. */
11842 #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
11843 /* THe HWRM failed to execute the request. */
11844 #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
11846 * The request contains invalid argument(s) or
11847 * input parameters.
11849 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
11851 * The requester is not allowed to access the
11852 * requested resource. This error code shall be
11853 * provided in a response to a request to query
11854 * or modify an existing resource that is not
11855 * accessible by the requester.
11857 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
11859 * The HWRM is unable to allocate the requested
11860 * resource. This code only applies to requests
11861 * for HWRM resource allocations.
11863 #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
11864 /* Invalid combination of flags is specified in the request. */
11865 #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
11867 * Invalid combination of enables fields is
11868 * specified in the request.
11870 #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
11872 * Generic HWRM execution error that represents
11873 * an internal error.
11875 #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
11876 /* Unknown error */
11877 #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
11878 /* Unsupported or invalid command */
11879 #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
11880 uint16_t unused_0[3];
11881 } __attribute__((packed));
11883 /* Output (16 bytes) */
11884 struct hwrm_err_output {
11885 uint16_t error_code;
11887 * Pass/Fail or error type Note: receiver to verify the in
11888 * parameters, and fail the call with an error when appropriate
11891 /* This field returns the type of original request. */
11893 /* This field provides original sequence number of the command. */
11896 * This field is the length of the response in bytes. The last
11897 * byte of the response is a valid flag that will read as '1'
11898 * when the command has been completely written to memory.
11901 /* debug info for this error response. */
11903 /* debug info for this error response. */
11906 * In the case of an error response, command specific error code
11907 * is returned in this field.
11911 * This field is used in Output records to indicate that the
11912 * output is completely written to RAM. This field should be
11913 * read as '1' to indicate that the output has been completely
11914 * written. When writing a command completion or response to an
11915 * internal processor, the order of writes has to be such that
11916 * this field is written last.
11918 } __attribute__((packed));
11920 /* Port Tx Statistics Formats (408 bytes) */
11921 struct tx_port_stats {
11922 uint64_t tx_64b_frames;
11923 /* Total Number of 64 Bytes frames transmitted */
11924 uint64_t tx_65b_127b_frames;
11925 /* Total Number of 65-127 Bytes frames transmitted */
11926 uint64_t tx_128b_255b_frames;
11927 /* Total Number of 128-255 Bytes frames transmitted */
11928 uint64_t tx_256b_511b_frames;
11929 /* Total Number of 256-511 Bytes frames transmitted */
11930 uint64_t tx_512b_1023b_frames;
11931 /* Total Number of 512-1023 Bytes frames transmitted */
11932 uint64_t tx_1024b_1518_frames;
11933 /* Total Number of 1024-1518 Bytes frames transmitted */
11934 uint64_t tx_good_vlan_frames;
11936 * Total Number of each good VLAN (exludes FCS errors) frame
11937 * transmitted which is 1519 to 1522 bytes in length inclusive
11938 * (excluding framing bits but including FCS bytes).
11940 uint64_t tx_1519b_2047_frames;
11941 /* Total Number of 1519-2047 Bytes frames transmitted */
11942 uint64_t tx_2048b_4095b_frames;
11943 /* Total Number of 2048-4095 Bytes frames transmitted */
11944 uint64_t tx_4096b_9216b_frames;
11945 /* Total Number of 4096-9216 Bytes frames transmitted */
11946 uint64_t tx_9217b_16383b_frames;
11947 /* Total Number of 9217-16383 Bytes frames transmitted */
11948 uint64_t tx_good_frames;
11949 /* Total Number of good frames transmitted */
11950 uint64_t tx_total_frames;
11951 /* Total Number of frames transmitted */
11952 uint64_t tx_ucast_frames;
11953 /* Total number of unicast frames transmitted */
11954 uint64_t tx_mcast_frames;
11955 /* Total number of multicast frames transmitted */
11956 uint64_t tx_bcast_frames;
11957 /* Total number of broadcast frames transmitted */
11958 uint64_t tx_pause_frames;
11959 /* Total number of PAUSE control frames transmitted */
11960 uint64_t tx_pfc_frames;
11961 /* Total number of PFC/per-priority PAUSE control frames transmitted */
11962 uint64_t tx_jabber_frames;
11963 /* Total number of jabber frames transmitted */
11964 uint64_t tx_fcs_err_frames;
11965 /* Total number of frames transmitted with FCS error */
11966 uint64_t tx_control_frames;
11967 /* Total number of control frames transmitted */
11968 uint64_t tx_oversz_frames;
11969 /* Total number of over-sized frames transmitted */
11970 uint64_t tx_single_dfrl_frames;
11971 /* Total number of frames with single deferral */
11972 uint64_t tx_multi_dfrl_frames;
11973 /* Total number of frames with multiple deferrals */
11974 uint64_t tx_single_coll_frames;
11975 /* Total number of frames with single collision */
11976 uint64_t tx_multi_coll_frames;
11977 /* Total number of frames with multiple collisions */
11978 uint64_t tx_late_coll_frames;
11979 /* Total number of frames with late collisions */
11980 uint64_t tx_excessive_coll_frames;
11981 /* Total number of frames with excessive collisions */
11982 uint64_t tx_frag_frames;
11983 /* Total number of fragmented frames transmitted */
11985 /* Total number of transmit errors */
11986 uint64_t tx_tagged_frames;
11987 /* Total number of single VLAN tagged frames transmitted */
11988 uint64_t tx_dbl_tagged_frames;
11989 /* Total number of double VLAN tagged frames transmitted */
11990 uint64_t tx_runt_frames;
11991 /* Total number of runt frames transmitted */
11992 uint64_t tx_fifo_underruns;
11993 /* Total number of TX FIFO under runs */
11994 uint64_t tx_pfc_ena_frames_pri0;
11996 * Total number of PFC frames with PFC enabled bit for Pri 0
11999 uint64_t tx_pfc_ena_frames_pri1;
12001 * Total number of PFC frames with PFC enabled bit for Pri 1
12004 uint64_t tx_pfc_ena_frames_pri2;
12006 * Total number of PFC frames with PFC enabled bit for Pri 2
12009 uint64_t tx_pfc_ena_frames_pri3;
12011 * Total number of PFC frames with PFC enabled bit for Pri 3
12014 uint64_t tx_pfc_ena_frames_pri4;
12016 * Total number of PFC frames with PFC enabled bit for Pri 4
12019 uint64_t tx_pfc_ena_frames_pri5;
12021 * Total number of PFC frames with PFC enabled bit for Pri 5
12024 uint64_t tx_pfc_ena_frames_pri6;
12026 * Total number of PFC frames with PFC enabled bit for Pri 6
12029 uint64_t tx_pfc_ena_frames_pri7;
12031 * Total number of PFC frames with PFC enabled bit for Pri 7
12034 uint64_t tx_eee_lpi_events;
12035 /* Total number of EEE LPI Events on TX */
12036 uint64_t tx_eee_lpi_duration;
12037 /* EEE LPI Duration Counter on TX */
12038 uint64_t tx_llfc_logical_msgs;
12040 * Total number of Link Level Flow Control (LLFC) messages
12043 uint64_t tx_hcfc_msgs;
12044 /* Total number of HCFC messages transmitted */
12045 uint64_t tx_total_collisions;
12046 /* Total number of TX collisions */
12048 /* Total number of transmitted bytes */
12049 uint64_t tx_xthol_frames;
12050 /* Total number of end-to-end HOL frames */
12051 uint64_t tx_stat_discard;
12052 /* Total Tx Drops per Port reported by STATS block */
12053 uint64_t tx_stat_error;
12054 /* Total Tx Error Drops per Port reported by STATS block */
12055 } __attribute__((packed));
12057 /* Port Rx Statistics Formats (528 bytes) */
12058 struct rx_port_stats {
12059 uint64_t rx_64b_frames;
12060 /* Total Number of 64 Bytes frames received */
12061 uint64_t rx_65b_127b_frames;
12062 /* Total Number of 65-127 Bytes frames received */
12063 uint64_t rx_128b_255b_frames;
12064 /* Total Number of 128-255 Bytes frames received */
12065 uint64_t rx_256b_511b_frames;
12066 /* Total Number of 256-511 Bytes frames received */
12067 uint64_t rx_512b_1023b_frames;
12068 /* Total Number of 512-1023 Bytes frames received */
12069 uint64_t rx_1024b_1518_frames;
12070 /* Total Number of 1024-1518 Bytes frames received */
12071 uint64_t rx_good_vlan_frames;
12073 * Total Number of each good VLAN (exludes FCS errors) frame
12074 * received which is 1519 to 1522 bytes in length inclusive
12075 * (excluding framing bits but including FCS bytes).
12077 uint64_t rx_1519b_2047b_frames;
12078 /* Total Number of 1519-2047 Bytes frames received */
12079 uint64_t rx_2048b_4095b_frames;
12080 /* Total Number of 2048-4095 Bytes frames received */
12081 uint64_t rx_4096b_9216b_frames;
12082 /* Total Number of 4096-9216 Bytes frames received */
12083 uint64_t rx_9217b_16383b_frames;
12084 /* Total Number of 9217-16383 Bytes frames received */
12085 uint64_t rx_total_frames;
12086 /* Total number of frames received */
12087 uint64_t rx_ucast_frames;
12088 /* Total number of unicast frames received */
12089 uint64_t rx_mcast_frames;
12090 /* Total number of multicast frames received */
12091 uint64_t rx_bcast_frames;
12092 /* Total number of broadcast frames received */
12093 uint64_t rx_fcs_err_frames;
12094 /* Total number of received frames with FCS error */
12095 uint64_t rx_ctrl_frames;
12096 /* Total number of control frames received */
12097 uint64_t rx_pause_frames;
12098 /* Total number of PAUSE frames received */
12099 uint64_t rx_pfc_frames;
12100 /* Total number of PFC frames received */
12101 uint64_t rx_unsupported_opcode_frames;
12102 /* Total number of frames received with an unsupported opcode */
12103 uint64_t rx_unsupported_da_pausepfc_frames;
12105 * Total number of frames received with an unsupported DA for
12108 uint64_t rx_wrong_sa_frames;
12109 /* Total number of frames received with an unsupported SA */
12110 uint64_t rx_align_err_frames;
12111 /* Total number of received packets with alignment error */
12112 uint64_t rx_oor_len_frames;
12113 /* Total number of received frames with out-of-range length */
12114 uint64_t rx_code_err_frames;
12115 /* Total number of received frames with error termination */
12116 uint64_t rx_false_carrier_frames;
12118 * Total number of received frames with a false carrier is
12119 * detected during idle, as defined by RX_ER samples active and
12120 * RXD is 0xE. The event is reported along with the statistics
12121 * generated on the next received frame. Only one false carrier
12122 * condition can be detected and logged between frames. Carrier
12123 * event, valid for 10M/100M speed modes only.
12125 uint64_t rx_ovrsz_frames;
12126 /* Total number of over-sized frames received */
12127 uint64_t rx_jbr_frames;
12128 /* Total number of jabber packets received */
12129 uint64_t rx_mtu_err_frames;
12130 /* Total number of received frames with MTU error */
12131 uint64_t rx_match_crc_frames;
12132 /* Total number of received frames with CRC match */
12133 uint64_t rx_promiscuous_frames;
12134 /* Total number of frames received promiscuously */
12135 uint64_t rx_tagged_frames;
12136 /* Total number of received frames with one or two VLAN tags */
12137 uint64_t rx_double_tagged_frames;
12138 /* Total number of received frames with two VLAN tags */
12139 uint64_t rx_trunc_frames;
12140 /* Total number of truncated frames received */
12141 uint64_t rx_good_frames;
12142 /* Total number of good frames (without errors) received */
12143 uint64_t rx_pfc_xon2xoff_frames_pri0;
12145 * Total number of received PFC frames with transition from XON
12148 uint64_t rx_pfc_xon2xoff_frames_pri1;
12150 * Total number of received PFC frames with transition from XON
12153 uint64_t rx_pfc_xon2xoff_frames_pri2;
12155 * Total number of received PFC frames with transition from XON
12158 uint64_t rx_pfc_xon2xoff_frames_pri3;
12160 * Total number of received PFC frames with transition from XON
12163 uint64_t rx_pfc_xon2xoff_frames_pri4;
12165 * Total number of received PFC frames with transition from XON
12168 uint64_t rx_pfc_xon2xoff_frames_pri5;
12170 * Total number of received PFC frames with transition from XON
12173 uint64_t rx_pfc_xon2xoff_frames_pri6;
12175 * Total number of received PFC frames with transition from XON
12178 uint64_t rx_pfc_xon2xoff_frames_pri7;
12180 * Total number of received PFC frames with transition from XON
12183 uint64_t rx_pfc_ena_frames_pri0;
12185 * Total number of received PFC frames with PFC enabled bit for
12188 uint64_t rx_pfc_ena_frames_pri1;
12190 * Total number of received PFC frames with PFC enabled bit for
12193 uint64_t rx_pfc_ena_frames_pri2;
12195 * Total number of received PFC frames with PFC enabled bit for
12198 uint64_t rx_pfc_ena_frames_pri3;
12200 * Total number of received PFC frames with PFC enabled bit for
12203 uint64_t rx_pfc_ena_frames_pri4;
12205 * Total number of received PFC frames with PFC enabled bit for
12208 uint64_t rx_pfc_ena_frames_pri5;
12210 * Total number of received PFC frames with PFC enabled bit for
12213 uint64_t rx_pfc_ena_frames_pri6;
12215 * Total number of received PFC frames with PFC enabled bit for
12218 uint64_t rx_pfc_ena_frames_pri7;
12220 * Total number of received PFC frames with PFC enabled bit for
12223 uint64_t rx_sch_crc_err_frames;
12224 /* Total Number of frames received with SCH CRC error */
12225 uint64_t rx_undrsz_frames;
12226 /* Total Number of under-sized frames received */
12227 uint64_t rx_frag_frames;
12228 /* Total Number of fragmented frames received */
12229 uint64_t rx_eee_lpi_events;
12230 /* Total number of RX EEE LPI Events */
12231 uint64_t rx_eee_lpi_duration;
12232 /* EEE LPI Duration Counter on RX */
12233 uint64_t rx_llfc_physical_msgs;
12235 * Total number of physical type Link Level Flow Control (LLFC)
12236 * messages received
12238 uint64_t rx_llfc_logical_msgs;
12240 * Total number of logical type Link Level Flow Control (LLFC)
12241 * messages received
12243 uint64_t rx_llfc_msgs_with_crc_err;
12245 * Total number of logical type Link Level Flow Control (LLFC)
12246 * messages received with CRC error
12248 uint64_t rx_hcfc_msgs;
12249 /* Total number of HCFC messages received */
12250 uint64_t rx_hcfc_msgs_with_crc_err;
12251 /* Total number of HCFC messages received with CRC error */
12253 /* Total number of received bytes */
12254 uint64_t rx_runt_bytes;
12255 /* Total number of bytes received in runt frames */
12256 uint64_t rx_runt_frames;
12257 /* Total number of runt frames received */
12258 uint64_t rx_stat_discard;
12259 /* Total Rx Discards per Port reported by STATS block */
12260 uint64_t rx_stat_err;
12261 /* Total Rx Error Drops per Port reported by STATS block */
12262 } __attribute__((packed));
12264 /* Periodic Statistics Context DMA to host (160 bytes) */
12266 * per-context HW statistics -- chip view
12269 struct ctx_hw_stats64 {
12270 uint64_t rx_ucast_pkts;
12271 uint64_t rx_mcast_pkts;
12272 uint64_t rx_bcast_pkts;
12273 uint64_t rx_drop_pkts;
12274 uint64_t rx_discard_pkts;
12275 uint64_t rx_ucast_bytes;
12276 uint64_t rx_mcast_bytes;
12277 uint64_t rx_bcast_bytes;
12279 uint64_t tx_ucast_pkts;
12280 uint64_t tx_mcast_pkts;
12281 uint64_t tx_bcast_pkts;
12282 uint64_t tx_drop_pkts;
12283 uint64_t tx_discard_pkts;
12284 uint64_t tx_ucast_bytes;
12285 uint64_t tx_mcast_bytes;
12286 uint64_t tx_bcast_bytes;
12289 uint64_t tpa_bytes;
12290 uint64_t tpa_events;
12291 uint64_t tpa_aborts;
12292 } __attribute__((packed));
12294 #endif /* _HSI_STRUCT_DEF_DPDK_ */