2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
49 #include "enic_compat.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
59 #include "vnic_intr.h"
62 static inline int enic_is_sriov_vf(struct enic *enic)
64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
67 static int is_zero_addr(uint8_t *addr)
69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
72 static int is_mcast_addr(uint8_t *addr)
77 static int is_eth_addr_valid(uint8_t *addr)
79 return !is_mcast_addr(addr) && !is_zero_addr(addr);
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
87 if (!rq || !rq->mbuf_ring) {
88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
92 for (i = 0; i < rq->ring.desc_count; i++) {
93 if (rq->mbuf_ring[i]) {
94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95 rq->mbuf_ring[i] = NULL;
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
109 rte_pktmbuf_free_seg(mbuf);
113 static void enic_log_q_error(struct enic *enic)
118 for (i = 0; i < enic->wq_count; i++) {
119 error_status = vnic_wq_error_status(&enic->wq[i]);
121 dev_err(enic, "WQ[%d] error_status %d\n", i,
125 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126 if (!enic->rq[i].in_use)
128 error_status = vnic_rq_error_status(&enic->rq[i]);
130 dev_err(enic, "RQ[%d] error_status %d\n", i,
135 static void enic_clear_soft_stats(struct enic *enic)
137 struct enic_soft_stats *soft_stats = &enic->soft_stats;
138 rte_atomic64_clear(&soft_stats->rx_nombuf);
139 rte_atomic64_clear(&soft_stats->rx_packet_errors);
142 static void enic_init_soft_stats(struct enic *enic)
144 struct enic_soft_stats *soft_stats = &enic->soft_stats;
145 rte_atomic64_init(&soft_stats->rx_nombuf);
146 rte_atomic64_init(&soft_stats->rx_packet_errors);
147 enic_clear_soft_stats(enic);
150 void enic_dev_stats_clear(struct enic *enic)
152 if (vnic_dev_stats_clear(enic->vdev))
153 dev_err(enic, "Error in clearing stats\n");
154 enic_clear_soft_stats(enic);
157 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
159 struct vnic_stats *stats;
160 struct enic_soft_stats *soft_stats = &enic->soft_stats;
161 int64_t rx_truncated;
162 uint64_t rx_packet_errors;
164 if (vnic_dev_stats_dump(enic->vdev, &stats)) {
165 dev_err(enic, "Error in getting stats\n");
169 /* The number of truncated packets can only be calculated by
170 * subtracting a hardware counter from error packets received by
171 * the driver. Note: this causes transient inaccuracies in the
172 * ipackets count. Also, the length of truncated packets are
173 * counted in ibytes even though truncated packets are dropped
174 * which can make ibytes be slightly higher than it should be.
176 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
177 rx_truncated = rx_packet_errors - stats->rx.rx_errors;
179 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
180 r_stats->opackets = stats->tx.tx_frames_ok;
182 r_stats->ibytes = stats->rx.rx_bytes_ok;
183 r_stats->obytes = stats->tx.tx_bytes_ok;
185 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
186 r_stats->oerrors = stats->tx.tx_errors;
188 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
190 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
193 void enic_del_mac_address(struct enic *enic)
195 if (vnic_dev_del_addr(enic->vdev, enic->mac_addr))
196 dev_err(enic, "del mac addr failed\n");
199 void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
203 if (!is_eth_addr_valid(mac_addr)) {
204 dev_err(enic, "invalid mac address\n");
208 err = vnic_dev_del_addr(enic->vdev, enic->mac_addr);
210 dev_err(enic, "del mac addr failed\n");
214 ether_addr_copy((struct ether_addr *)mac_addr,
215 (struct ether_addr *)enic->mac_addr);
217 err = vnic_dev_add_addr(enic->vdev, mac_addr);
219 dev_err(enic, "add mac addr failed\n");
225 enic_free_rq_buf(struct rte_mbuf **mbuf)
230 rte_pktmbuf_free(*mbuf);
234 void enic_init_vnic_resources(struct enic *enic)
236 unsigned int error_interrupt_enable = 1;
237 unsigned int error_interrupt_offset = 0;
238 unsigned int index = 0;
240 struct vnic_rq *data_rq;
242 for (index = 0; index < enic->rq_count; index++) {
243 cq_idx = enic_cq_rq(enic, enic_sop_rq(index));
245 vnic_rq_init(&enic->rq[enic_sop_rq(index)],
247 error_interrupt_enable,
248 error_interrupt_offset);
250 data_rq = &enic->rq[enic_data_rq(index)];
252 vnic_rq_init(data_rq,
254 error_interrupt_enable,
255 error_interrupt_offset);
257 vnic_cq_init(&enic->cq[cq_idx],
258 0 /* flow_control_enable */,
259 1 /* color_enable */,
262 1 /* cq_tail_color */,
263 0 /* interrupt_enable */,
264 1 /* cq_entry_enable */,
265 0 /* cq_message_enable */,
266 0 /* interrupt offset */,
267 0 /* cq_message_addr */);
270 for (index = 0; index < enic->wq_count; index++) {
271 vnic_wq_init(&enic->wq[index],
272 enic_cq_wq(enic, index),
273 error_interrupt_enable,
274 error_interrupt_offset);
276 cq_idx = enic_cq_wq(enic, index);
277 vnic_cq_init(&enic->cq[cq_idx],
278 0 /* flow_control_enable */,
279 1 /* color_enable */,
282 1 /* cq_tail_color */,
283 0 /* interrupt_enable */,
284 0 /* cq_entry_enable */,
285 1 /* cq_message_enable */,
286 0 /* interrupt offset */,
287 (u64)enic->wq[index].cqmsg_rz->phys_addr);
290 vnic_intr_init(&enic->intr,
291 enic->config.intr_timer_usec,
292 enic->config.intr_timer_type,
293 /*mask_on_assertion*/1);
298 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
301 struct rq_enet_desc *rqd = rq->ring.descs;
308 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
309 rq->ring.desc_count);
311 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
312 mb = rte_mbuf_raw_alloc(rq->mp);
314 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
315 (unsigned)rq->index);
319 mb->data_off = RTE_PKTMBUF_HEADROOM;
320 dma_addr = (dma_addr_t)(mb->buf_physaddr
321 + RTE_PKTMBUF_HEADROOM);
322 rq_enet_desc_enc(rqd, dma_addr,
323 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
324 : RQ_ENET_TYPE_NOT_SOP),
325 mb->buf_len - RTE_PKTMBUF_HEADROOM);
326 rq->mbuf_ring[i] = mb;
329 /* make sure all prior writes are complete before doing the PIO write */
332 /* Post all but the last buffer to VIC. */
333 rq->posted_index = rq->ring.desc_count - 1;
337 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
338 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
339 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
340 iowrite32(0, &rq->ctrl->fetch_index);
348 enic_alloc_consistent(void *priv, size_t size,
349 dma_addr_t *dma_handle, u8 *name)
352 const struct rte_memzone *rz;
354 struct enic *enic = (struct enic *)priv;
355 struct enic_memzone_entry *mze;
357 rz = rte_memzone_reserve_aligned((const char *)name,
358 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
360 pr_err("%s : Failed to allocate memory requested for %s\n",
366 *dma_handle = (dma_addr_t)rz->phys_addr;
368 mze = rte_malloc("enic memzone entry",
369 sizeof(struct enic_memzone_entry), 0);
372 pr_err("%s : Failed to allocate memory for memzone list\n",
374 rte_memzone_free(rz);
379 rte_spinlock_lock(&enic->memzone_list_lock);
380 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
381 rte_spinlock_unlock(&enic->memzone_list_lock);
387 enic_free_consistent(void *priv,
388 __rte_unused size_t size,
390 dma_addr_t dma_handle)
392 struct enic_memzone_entry *mze;
393 struct enic *enic = (struct enic *)priv;
395 rte_spinlock_lock(&enic->memzone_list_lock);
396 LIST_FOREACH(mze, &enic->memzone_list, entries) {
397 if (mze->rz->addr == vaddr &&
398 mze->rz->phys_addr == dma_handle)
402 rte_spinlock_unlock(&enic->memzone_list_lock);
404 "Tried to free memory, but couldn't find it in the memzone list\n");
407 LIST_REMOVE(mze, entries);
408 rte_spinlock_unlock(&enic->memzone_list_lock);
409 rte_memzone_free(mze->rz);
414 enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
417 struct enic *enic = pmd_priv((struct rte_eth_dev *)arg);
419 vnic_intr_return_all_credits(&enic->intr);
421 enic_log_q_error(enic);
424 int enic_enable(struct enic *enic)
428 struct rte_eth_dev *eth_dev = enic->rte_dev;
430 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
431 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
432 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
434 if (enic_clsf_init(enic))
435 dev_warning(enic, "Init of hash table for clsf failed."\
436 "Flow director feature will not work\n");
438 for (index = 0; index < enic->rq_count; index++) {
439 err = enic_alloc_rx_queue_mbufs(enic,
440 &enic->rq[enic_sop_rq(index)]);
442 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
445 err = enic_alloc_rx_queue_mbufs(enic,
446 &enic->rq[enic_data_rq(index)]);
448 /* release the allocated mbufs for the sop rq*/
449 enic_rxmbuf_queue_release(enic,
450 &enic->rq[enic_sop_rq(index)]);
452 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
457 for (index = 0; index < enic->wq_count; index++)
458 enic_start_wq(enic, index);
459 for (index = 0; index < enic->rq_count; index++)
460 enic_start_rq(enic, index);
462 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
464 vnic_dev_enable_wait(enic->vdev);
466 /* Register and enable error interrupt */
467 rte_intr_callback_register(&(enic->pdev->intr_handle),
468 enic_intr_handler, (void *)enic->rte_dev);
470 rte_intr_enable(&(enic->pdev->intr_handle));
471 vnic_intr_unmask(&enic->intr);
476 int enic_alloc_intr_resources(struct enic *enic)
480 dev_info(enic, "vNIC resources used: "\
481 "wq %d rq %d cq %d intr %d\n",
482 enic->wq_count, enic_vnic_rq_count(enic),
483 enic->cq_count, enic->intr_count);
485 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
487 enic_free_vnic_resources(enic);
492 void enic_free_rq(void *rxq)
494 struct vnic_rq *rq_sop, *rq_data;
500 rq_sop = (struct vnic_rq *)rxq;
501 enic = vnic_dev_priv(rq_sop->vdev);
502 rq_data = &enic->rq[rq_sop->data_queue_idx];
504 enic_rxmbuf_queue_release(enic, rq_sop);
506 enic_rxmbuf_queue_release(enic, rq_data);
508 rte_free(rq_sop->mbuf_ring);
510 rte_free(rq_data->mbuf_ring);
512 rq_sop->mbuf_ring = NULL;
513 rq_data->mbuf_ring = NULL;
515 vnic_rq_free(rq_sop);
517 vnic_rq_free(rq_data);
519 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
522 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
524 struct rte_eth_dev *eth_dev = enic->rte_dev;
525 vnic_wq_enable(&enic->wq[queue_idx]);
526 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
529 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
531 struct rte_eth_dev *eth_dev = enic->rte_dev;
534 ret = vnic_wq_disable(&enic->wq[queue_idx]);
538 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
542 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
544 struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
545 struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
546 struct rte_eth_dev *eth_dev = enic->rte_dev;
549 vnic_rq_enable(rq_data);
551 vnic_rq_enable(rq_sop);
552 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
555 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
557 int ret1 = 0, ret2 = 0;
558 struct rte_eth_dev *eth_dev = enic->rte_dev;
559 struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
560 struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
562 ret2 = vnic_rq_disable(rq_sop);
565 ret1 = vnic_rq_disable(rq_data);
572 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
576 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
577 unsigned int socket_id, struct rte_mempool *mp,
578 uint16_t nb_desc, uint16_t free_thresh)
581 uint16_t sop_queue_idx = enic_sop_rq(queue_idx);
582 uint16_t data_queue_idx = enic_data_rq(queue_idx);
583 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
584 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
585 unsigned int mbuf_size, mbufs_per_pkt;
586 unsigned int nb_sop_desc, nb_data_desc;
587 uint16_t min_sop, max_sop, min_data, max_data;
590 rq_sop->data_queue_idx = data_queue_idx;
592 rq_data->data_queue_idx = 0;
593 rq_sop->socket_id = socket_id;
595 rq_data->socket_id = socket_id;
598 rq_sop->rx_free_thresh = free_thresh;
599 rq_data->rx_free_thresh = free_thresh;
600 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
603 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
604 RTE_PKTMBUF_HEADROOM);
606 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
607 dev_info(enic, "Scatter rx mode enabled\n");
608 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
609 mbufs_per_pkt = ((enic->config.mtu + ETHER_HDR_LEN + 4) +
610 (mbuf_size - 1)) / mbuf_size;
612 dev_info(enic, "Scatter rx mode disabled\n");
616 if (mbufs_per_pkt > 1) {
617 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
618 rq_sop->data_queue_enable = 1;
621 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
623 rq_sop->data_queue_enable = 0;
627 /* number of descriptors have to be a multiple of 32 */
628 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
629 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
631 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
632 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
634 if (mbufs_per_pkt > 1) {
636 max_sop = ((enic->config.rq_desc_count /
637 (mbufs_per_pkt - 1)) & ~0x1F);
638 min_data = min_sop * (mbufs_per_pkt - 1);
639 max_data = enic->config.rq_desc_count;
642 max_sop = enic->config.rq_desc_count;
647 if (nb_desc < (min_sop + min_data)) {
649 "Number of rx descs too low, adjusting to minimum\n");
650 nb_sop_desc = min_sop;
651 nb_data_desc = min_data;
652 } else if (nb_desc > (max_sop + max_data)) {
654 "Number of rx_descs too high, adjusting to maximum\n");
655 nb_sop_desc = max_sop;
656 nb_data_desc = max_data;
658 if (mbufs_per_pkt > 1) {
659 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
660 enic->config.mtu, mbuf_size, min_sop + min_data,
663 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
664 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
666 /* Allocate sop queue resources */
667 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
668 nb_sop_desc, sizeof(struct rq_enet_desc));
670 dev_err(enic, "error in allocation of sop rq\n");
673 nb_sop_desc = rq_sop->ring.desc_count;
675 if (rq_data->in_use) {
676 /* Allocate data queue resources */
677 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
679 sizeof(struct rq_enet_desc));
681 dev_err(enic, "error in allocation of data rq\n");
682 goto err_free_rq_sop;
684 nb_data_desc = rq_data->ring.desc_count;
686 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
687 socket_id, nb_sop_desc + nb_data_desc,
688 sizeof(struct cq_enet_rq_desc));
690 dev_err(enic, "error in allocation of cq for rq\n");
691 goto err_free_rq_data;
694 /* Allocate the mbuf rings */
695 rq_sop->mbuf_ring = (struct rte_mbuf **)
696 rte_zmalloc_socket("rq->mbuf_ring",
697 sizeof(struct rte_mbuf *) * nb_sop_desc,
698 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
699 if (rq_sop->mbuf_ring == NULL)
702 if (rq_data->in_use) {
703 rq_data->mbuf_ring = (struct rte_mbuf **)
704 rte_zmalloc_socket("rq->mbuf_ring",
705 sizeof(struct rte_mbuf *) * nb_data_desc,
706 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
707 if (rq_data->mbuf_ring == NULL)
708 goto err_free_sop_mbuf;
714 rte_free(rq_sop->mbuf_ring);
716 /* cleanup on error */
717 vnic_cq_free(&enic->cq[queue_idx]);
720 vnic_rq_free(rq_data);
722 vnic_rq_free(rq_sop);
727 void enic_free_wq(void *txq)
735 wq = (struct vnic_wq *)txq;
736 enic = vnic_dev_priv(wq->vdev);
737 rte_memzone_free(wq->cqmsg_rz);
739 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
742 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
743 unsigned int socket_id, uint16_t nb_desc)
746 struct vnic_wq *wq = &enic->wq[queue_idx];
747 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
751 wq->socket_id = socket_id;
753 if (nb_desc > enic->config.wq_desc_count) {
755 "WQ %d - number of tx desc in cmd line (%d)"\
756 "is greater than that in the UCSM/CIMC adapter"\
757 "policy. Applying the value in the adapter "\
759 queue_idx, nb_desc, enic->config.wq_desc_count);
760 } else if (nb_desc != enic->config.wq_desc_count) {
761 enic->config.wq_desc_count = nb_desc;
763 "TX Queues - effective number of descs:%d\n",
768 /* Allocate queue resources */
769 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
770 enic->config.wq_desc_count,
771 sizeof(struct wq_enet_desc));
773 dev_err(enic, "error in allocation of wq\n");
777 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
778 socket_id, enic->config.wq_desc_count,
779 sizeof(struct cq_enet_wq_desc));
782 dev_err(enic, "error in allocation of cq for wq\n");
785 /* setup up CQ message */
786 snprintf((char *)name, sizeof(name),
787 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
790 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
800 int enic_disable(struct enic *enic)
805 vnic_intr_mask(&enic->intr);
806 (void)vnic_intr_masked(&enic->intr); /* flush write */
808 vnic_dev_disable(enic->vdev);
810 enic_clsf_destroy(enic);
812 if (!enic_is_sriov_vf(enic))
813 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
815 for (i = 0; i < enic->wq_count; i++) {
816 err = vnic_wq_disable(&enic->wq[i]);
820 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
821 if (enic->rq[i].in_use) {
822 err = vnic_rq_disable(&enic->rq[i]);
828 vnic_dev_set_reset_flag(enic->vdev, 1);
829 vnic_dev_notify_unset(enic->vdev);
831 for (i = 0; i < enic->wq_count; i++)
832 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
834 for (i = 0; i < enic_vnic_rq_count(enic); i++)
835 if (enic->rq[i].in_use)
836 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
837 for (i = 0; i < enic->cq_count; i++)
838 vnic_cq_clean(&enic->cq[i]);
839 vnic_intr_clean(&enic->intr);
844 static int enic_dev_wait(struct vnic_dev *vdev,
845 int (*start)(struct vnic_dev *, int),
846 int (*finished)(struct vnic_dev *, int *),
853 err = start(vdev, arg);
857 /* Wait for func to complete...2 seconds max */
858 for (i = 0; i < 2000; i++) {
859 err = finished(vdev, &done);
869 static int enic_dev_open(struct enic *enic)
873 err = enic_dev_wait(enic->vdev, vnic_dev_open,
874 vnic_dev_open_done, 0);
876 dev_err(enic_get_dev(enic),
877 "vNIC device open failed, err %d\n", err);
882 static int enic_set_rsskey(struct enic *enic)
884 dma_addr_t rss_key_buf_pa;
885 union vnic_rss_key *rss_key_buf_va = NULL;
886 static union vnic_rss_key rss_key = {
888 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
889 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
890 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
891 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
897 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
898 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
899 &rss_key_buf_pa, name);
903 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
905 err = enic_set_rss_key(enic,
907 sizeof(union vnic_rss_key));
909 enic_free_consistent(enic, sizeof(union vnic_rss_key),
910 rss_key_buf_va, rss_key_buf_pa);
915 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
917 dma_addr_t rss_cpu_buf_pa;
918 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
923 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
924 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
925 &rss_cpu_buf_pa, name);
929 for (i = 0; i < (1 << rss_hash_bits); i++)
930 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
931 enic_sop_rq(i % enic->rq_count);
933 err = enic_set_rss_cpu(enic,
935 sizeof(union vnic_rss_cpu));
937 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
938 rss_cpu_buf_va, rss_cpu_buf_pa);
943 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
944 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
946 const u8 tso_ipid_split_en = 0;
949 /* Enable VLAN tag stripping */
951 err = enic_set_nic_cfg(enic,
952 rss_default_cpu, rss_hash_type,
953 rss_hash_bits, rss_base_cpu,
954 rss_enable, tso_ipid_split_en,
955 enic->ig_vlan_strip_en);
960 int enic_set_rss_nic_cfg(struct enic *enic)
962 const u8 rss_default_cpu = 0;
963 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
964 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
965 NIC_CFG_RSS_HASH_TYPE_IPV6 |
966 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
967 const u8 rss_hash_bits = 7;
968 const u8 rss_base_cpu = 0;
969 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
972 if (!enic_set_rsskey(enic)) {
973 if (enic_set_rsscpu(enic, rss_hash_bits)) {
975 dev_warning(enic, "RSS disabled, "\
976 "Failed to set RSS cpu indirection table.");
981 "RSS disabled, Failed to set RSS key.\n");
985 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
986 rss_hash_bits, rss_base_cpu, rss_enable);
989 int enic_setup_finish(struct enic *enic)
993 enic_init_soft_stats(enic);
995 ret = enic_set_rss_nic_cfg(enic);
997 dev_err(enic, "Failed to config nic, aborting.\n");
1002 vnic_dev_packet_filter(enic->vdev,
1015 void enic_add_packet_filter(struct enic *enic)
1017 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1018 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1019 enic->promisc, enic->allmulti);
1022 int enic_get_link_status(struct enic *enic)
1024 return vnic_dev_link_status(enic->vdev);
1027 static void enic_dev_deinit(struct enic *enic)
1029 struct rte_eth_dev *eth_dev = enic->rte_dev;
1031 rte_free(eth_dev->data->mac_addrs);
1035 int enic_set_vnic_res(struct enic *enic)
1037 struct rte_eth_dev *eth_dev = enic->rte_dev;
1040 /* With Rx scatter support, two RQs are now used per RQ used by
1043 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1044 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1045 eth_dev->data->nb_rx_queues,
1046 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1049 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1050 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1051 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1055 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1056 eth_dev->data->nb_tx_queues)) {
1057 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1058 (eth_dev->data->nb_rx_queues +
1059 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1064 enic->rq_count = eth_dev->data->nb_rx_queues;
1065 enic->wq_count = eth_dev->data->nb_tx_queues;
1066 enic->cq_count = enic->rq_count + enic->wq_count;
1072 /* The Cisco NIC can send and receive packets up to a max packet size
1073 * determined by the NIC type and firmware. There is also an MTU
1074 * configured into the NIC via the CIMC/UCSM management interface
1075 * which can be overridden by this function (up to the max packet size).
1076 * Depending on the network setup, doing so may cause packet drops
1077 * and unexpected behavior.
1079 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1081 uint16_t old_mtu; /* previous setting */
1082 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1083 struct rte_eth_dev *eth_dev = enic->rte_dev;
1085 old_mtu = eth_dev->data->mtu;
1086 config_mtu = enic->config.mtu;
1088 /* only works with Rx scatter disabled */
1089 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter)
1092 if (new_mtu > enic->max_mtu) {
1094 "MTU not updated: requested (%u) greater than max (%u)\n",
1095 new_mtu, enic->max_mtu);
1098 if (new_mtu < ENIC_MIN_MTU) {
1100 "MTU not updated: requested (%u) less than min (%u)\n",
1101 new_mtu, ENIC_MIN_MTU);
1104 if (new_mtu > config_mtu)
1106 "MTU (%u) is greater than value configured in NIC (%u)\n",
1107 new_mtu, config_mtu);
1109 /* update the mtu */
1110 eth_dev->data->mtu = new_mtu;
1112 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1116 static int enic_dev_init(struct enic *enic)
1119 struct rte_eth_dev *eth_dev = enic->rte_dev;
1121 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1123 /* Get vNIC configuration
1125 err = enic_get_vnic_config(enic);
1127 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1131 /* Get available resource counts */
1132 enic_get_res_counts(enic);
1133 if (enic->conf_rq_count == 1) {
1134 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1135 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1136 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1140 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN, 0);
1141 if (!eth_dev->data->mac_addrs) {
1142 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1145 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1146 ð_dev->data->mac_addrs[0]);
1148 vnic_dev_set_reset_flag(enic->vdev, 0);
1154 int enic_probe(struct enic *enic)
1156 struct rte_pci_device *pdev = enic->pdev;
1159 dev_debug(enic, " Initializing ENIC PMD\n");
1161 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1162 enic->bar0.len = pdev->mem_resource[0].len;
1164 /* Register vNIC device */
1165 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1167 dev_err(enic, "vNIC registration failed, aborting\n");
1171 LIST_INIT(&enic->memzone_list);
1172 rte_spinlock_init(&enic->memzone_list_lock);
1174 vnic_register_cbacks(enic->vdev,
1175 enic_alloc_consistent,
1176 enic_free_consistent);
1178 /* Issue device open to get device in known state */
1179 err = enic_dev_open(enic);
1181 dev_err(enic, "vNIC dev open failed, aborting\n");
1182 goto err_out_unregister;
1185 /* Set ingress vlan rewrite mode before vnic initialization */
1186 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1187 IG_VLAN_REWRITE_MODE_PASS_THRU);
1190 "Failed to set ingress vlan rewrite mode, aborting.\n");
1191 goto err_out_dev_close;
1194 /* Issue device init to initialize the vnic-to-switch link.
1195 * We'll start with carrier off and wait for link UP
1196 * notification later to turn on carrier. We don't need
1197 * to wait here for the vnic-to-switch link initialization
1198 * to complete; link UP notification is the indication that
1199 * the process is complete.
1202 err = vnic_dev_init(enic->vdev, 0);
1204 dev_err(enic, "vNIC dev init failed, aborting\n");
1205 goto err_out_dev_close;
1208 err = enic_dev_init(enic);
1210 dev_err(enic, "Device initialization failed, aborting\n");
1211 goto err_out_dev_close;
1217 vnic_dev_close(enic->vdev);
1219 vnic_dev_unregister(enic->vdev);
1224 void enic_remove(struct enic *enic)
1226 enic_dev_deinit(enic);
1227 vnic_dev_close(enic->vdev);
1228 vnic_dev_unregister(enic->vdev);