1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
55 static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
56 IXGBE_MVALS_INIT(_X550EM_a)
60 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
61 * @hw: pointer to hardware structure
62 * @map: pointer to u8 arr for returning map
64 * Read the rtrup2tc HW register and resolve its content into map
66 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
68 if (hw->mac.ops.get_rtrup2tc)
69 hw->mac.ops.get_rtrup2tc(hw, map);
73 * ixgbe_init_shared_code - Initialize the shared code
74 * @hw: pointer to hardware structure
76 * This will assign function pointers and assign the MAC type and PHY code.
77 * Does not touch the hardware. This function must be called prior to any
78 * other function in the shared code. The ixgbe_hw structure should be
79 * memset to 0 prior to calling this function. The following fields in
80 * hw structure should be filled in prior to calling this function:
81 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
82 * subsystem_vendor_id, and revision_id
84 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
88 DEBUGFUNC("ixgbe_init_shared_code");
93 ixgbe_set_mac_type(hw);
95 switch (hw->mac.type) {
96 case ixgbe_mac_82598EB:
97 status = ixgbe_init_ops_82598(hw);
99 case ixgbe_mac_82599EB:
100 status = ixgbe_init_ops_82599(hw);
103 status = ixgbe_init_ops_X540(hw);
106 status = ixgbe_init_ops_X550(hw);
108 case ixgbe_mac_X550EM_x:
109 status = ixgbe_init_ops_X550EM_x(hw);
111 case ixgbe_mac_X550EM_a:
112 status = ixgbe_init_ops_X550EM_a(hw);
114 case ixgbe_mac_82599_vf:
115 case ixgbe_mac_X540_vf:
116 case ixgbe_mac_X550_vf:
117 case ixgbe_mac_X550EM_x_vf:
118 case ixgbe_mac_X550EM_a_vf:
119 status = ixgbe_init_ops_vf(hw);
122 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
131 * ixgbe_set_mac_type - Sets MAC type
132 * @hw: pointer to the HW structure
134 * This function sets the mac type of the adapter based on the
135 * vendor ID and device ID stored in the hw structure.
137 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
139 s32 ret_val = IXGBE_SUCCESS;
141 DEBUGFUNC("ixgbe_set_mac_type\n");
143 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
144 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
145 "Unsupported vendor id: %x", hw->vendor_id);
146 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
149 hw->mvals = ixgbe_mvals_base;
151 switch (hw->device_id) {
152 case IXGBE_DEV_ID_82598:
153 case IXGBE_DEV_ID_82598_BX:
154 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
155 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
156 case IXGBE_DEV_ID_82598AT:
157 case IXGBE_DEV_ID_82598AT2:
158 case IXGBE_DEV_ID_82598EB_CX4:
159 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
160 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
161 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
162 case IXGBE_DEV_ID_82598EB_XF_LR:
163 case IXGBE_DEV_ID_82598EB_SFP_LOM:
164 hw->mac.type = ixgbe_mac_82598EB;
166 case IXGBE_DEV_ID_82599_KX4:
167 case IXGBE_DEV_ID_82599_KX4_MEZZ:
168 case IXGBE_DEV_ID_82599_XAUI_LOM:
169 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
170 case IXGBE_DEV_ID_82599_KR:
171 case IXGBE_DEV_ID_82599_SFP:
172 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
173 case IXGBE_DEV_ID_82599_SFP_FCOE:
174 case IXGBE_DEV_ID_82599_SFP_EM:
175 case IXGBE_DEV_ID_82599_SFP_SF2:
176 case IXGBE_DEV_ID_82599_SFP_SF_QP:
177 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
178 case IXGBE_DEV_ID_82599EN_SFP:
179 case IXGBE_DEV_ID_82599_CX4:
180 case IXGBE_DEV_ID_82599_LS:
181 case IXGBE_DEV_ID_82599_BYPASS:
182 case IXGBE_DEV_ID_82599_T3_LOM:
183 hw->mac.type = ixgbe_mac_82599EB;
185 case IXGBE_DEV_ID_82599_VF:
186 case IXGBE_DEV_ID_82599_VF_HV:
187 hw->mac.type = ixgbe_mac_82599_vf;
189 case IXGBE_DEV_ID_X540_VF:
190 case IXGBE_DEV_ID_X540_VF_HV:
191 hw->mac.type = ixgbe_mac_X540_vf;
192 hw->mvals = ixgbe_mvals_X540;
194 case IXGBE_DEV_ID_X540T:
195 case IXGBE_DEV_ID_X540T1:
196 case IXGBE_DEV_ID_X540_BYPASS:
197 hw->mac.type = ixgbe_mac_X540;
198 hw->mvals = ixgbe_mvals_X540;
200 case IXGBE_DEV_ID_X550T:
201 case IXGBE_DEV_ID_X550T1:
202 hw->mac.type = ixgbe_mac_X550;
203 hw->mvals = ixgbe_mvals_X550;
205 case IXGBE_DEV_ID_X550EM_X_KX4:
206 case IXGBE_DEV_ID_X550EM_X_KR:
207 case IXGBE_DEV_ID_X550EM_X_10G_T:
208 case IXGBE_DEV_ID_X550EM_X_1G_T:
209 case IXGBE_DEV_ID_X550EM_X_SFP:
210 hw->mac.type = ixgbe_mac_X550EM_x;
211 hw->mvals = ixgbe_mvals_X550EM_x;
213 case IXGBE_DEV_ID_X550EM_A_KR:
214 case IXGBE_DEV_ID_X550EM_A_KR_L:
215 case IXGBE_DEV_ID_X550EM_A_SFP_N:
216 case IXGBE_DEV_ID_X550EM_A_SGMII:
217 case IXGBE_DEV_ID_X550EM_A_SGMII_L:
218 case IXGBE_DEV_ID_X550EM_A_1G_T:
219 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
220 case IXGBE_DEV_ID_X550EM_A_10G_T:
221 case IXGBE_DEV_ID_X550EM_A_QSFP:
222 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
223 case IXGBE_DEV_ID_X550EM_A_SFP:
224 hw->mac.type = ixgbe_mac_X550EM_a;
225 hw->mvals = ixgbe_mvals_X550EM_a;
227 case IXGBE_DEV_ID_X550_VF:
228 case IXGBE_DEV_ID_X550_VF_HV:
229 hw->mac.type = ixgbe_mac_X550_vf;
230 hw->mvals = ixgbe_mvals_X550;
232 case IXGBE_DEV_ID_X550EM_X_VF:
233 case IXGBE_DEV_ID_X550EM_X_VF_HV:
234 hw->mac.type = ixgbe_mac_X550EM_x_vf;
235 hw->mvals = ixgbe_mvals_X550EM_x;
237 case IXGBE_DEV_ID_X550EM_A_VF:
238 case IXGBE_DEV_ID_X550EM_A_VF_HV:
239 hw->mac.type = ixgbe_mac_X550EM_a_vf;
240 hw->mvals = ixgbe_mvals_X550EM_a;
243 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
244 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
245 "Unsupported device id: %x",
250 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
251 hw->mac.type, ret_val);
256 * ixgbe_init_hw - Initialize the hardware
257 * @hw: pointer to hardware structure
259 * Initialize the hardware by resetting and then starting the hardware
261 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
263 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
264 IXGBE_NOT_IMPLEMENTED);
268 * ixgbe_reset_hw - Performs a hardware reset
269 * @hw: pointer to hardware structure
271 * Resets the hardware by resetting the transmit and receive units, masks and
272 * clears all interrupts, performs a PHY reset, and performs a MAC reset
274 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
276 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
277 IXGBE_NOT_IMPLEMENTED);
281 * ixgbe_start_hw - Prepares hardware for Rx/Tx
282 * @hw: pointer to hardware structure
284 * Starts the hardware by filling the bus info structure and media type,
285 * clears all on chip counters, initializes receive address registers,
286 * multicast table, VLAN filter table, calls routine to setup link and
287 * flow control settings, and leaves transmit and receive units disabled
290 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
292 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
293 IXGBE_NOT_IMPLEMENTED);
297 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
298 * which is disabled by default in ixgbe_start_hw();
300 * @hw: pointer to hardware structure
302 * Enable relaxed ordering;
304 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
306 if (hw->mac.ops.enable_relaxed_ordering)
307 hw->mac.ops.enable_relaxed_ordering(hw);
311 * ixgbe_clear_hw_cntrs - Clear hardware counters
312 * @hw: pointer to hardware structure
314 * Clears all hardware statistics counters by reading them from the hardware
315 * Statistics counters are clear on read.
317 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
319 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
320 IXGBE_NOT_IMPLEMENTED);
324 * ixgbe_get_media_type - Get media type
325 * @hw: pointer to hardware structure
327 * Returns the media type (fiber, copper, backplane)
329 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
331 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
332 ixgbe_media_type_unknown);
336 * ixgbe_get_mac_addr - Get MAC address
337 * @hw: pointer to hardware structure
338 * @mac_addr: Adapter MAC address
340 * Reads the adapter's MAC address from the first Receive Address Register
341 * (RAR0) A reset of the adapter must have been performed prior to calling
342 * this function in order for the MAC address to have been loaded from the
345 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
347 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
348 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
352 * ixgbe_get_san_mac_addr - Get SAN MAC address
353 * @hw: pointer to hardware structure
354 * @san_mac_addr: SAN MAC address
356 * Reads the SAN MAC address from the EEPROM, if it's available. This is
357 * per-port, so set_lan_id() must be called before reading the addresses.
359 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
361 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
362 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
366 * ixgbe_set_san_mac_addr - Write a SAN MAC address
367 * @hw: pointer to hardware structure
368 * @san_mac_addr: SAN MAC address
370 * Writes A SAN MAC address to the EEPROM.
372 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
374 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
375 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
379 * ixgbe_get_device_caps - Get additional device capabilities
380 * @hw: pointer to hardware structure
381 * @device_caps: the EEPROM word for device capabilities
383 * Reads the extra device capabilities from the EEPROM
385 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
387 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
388 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
392 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
393 * @hw: pointer to hardware structure
394 * @wwnn_prefix: the alternative WWNN prefix
395 * @wwpn_prefix: the alternative WWPN prefix
397 * This function will read the EEPROM from the alternative SAN MAC address
398 * block to check the support for the alternative WWNN/WWPN prefix support.
400 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
403 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
404 (hw, wwnn_prefix, wwpn_prefix),
405 IXGBE_NOT_IMPLEMENTED);
409 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
410 * @hw: pointer to hardware structure
411 * @bs: the fcoe boot status
413 * This function will read the FCOE boot status from the iSCSI FCOE block
415 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
417 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
419 IXGBE_NOT_IMPLEMENTED);
423 * ixgbe_get_bus_info - Set PCI bus info
424 * @hw: pointer to hardware structure
426 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
428 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
430 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
431 IXGBE_NOT_IMPLEMENTED);
435 * ixgbe_get_num_of_tx_queues - Get Tx queues
436 * @hw: pointer to hardware structure
438 * Returns the number of transmit queues for the given adapter.
440 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
442 return hw->mac.max_tx_queues;
446 * ixgbe_get_num_of_rx_queues - Get Rx queues
447 * @hw: pointer to hardware structure
449 * Returns the number of receive queues for the given adapter.
451 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
453 return hw->mac.max_rx_queues;
457 * ixgbe_stop_adapter - Disable Rx/Tx units
458 * @hw: pointer to hardware structure
460 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
461 * disables transmit and receive units. The adapter_stopped flag is used by
462 * the shared code and drivers to determine if the adapter is in a stopped
463 * state and should not touch the hardware.
465 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
467 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
468 IXGBE_NOT_IMPLEMENTED);
472 * ixgbe_read_pba_string - Reads part number string from EEPROM
473 * @hw: pointer to hardware structure
474 * @pba_num: stores the part number string from the EEPROM
475 * @pba_num_size: part number string buffer length
477 * Reads the part number string from the EEPROM.
479 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
481 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
485 * ixgbe_read_pba_num - Reads part number from EEPROM
486 * @hw: pointer to hardware structure
487 * @pba_num: stores the part number from the EEPROM
489 * Reads the part number from the EEPROM.
491 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
493 return ixgbe_read_pba_num_generic(hw, pba_num);
497 * ixgbe_identify_phy - Get PHY type
498 * @hw: pointer to hardware structure
500 * Determines the physical layer module found on the current adapter.
502 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
504 s32 status = IXGBE_SUCCESS;
506 if (hw->phy.type == ixgbe_phy_unknown) {
507 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
508 IXGBE_NOT_IMPLEMENTED);
515 * ixgbe_reset_phy - Perform a PHY reset
516 * @hw: pointer to hardware structure
518 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
520 s32 status = IXGBE_SUCCESS;
522 if (hw->phy.type == ixgbe_phy_unknown) {
523 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
524 status = IXGBE_ERR_PHY;
527 if (status == IXGBE_SUCCESS) {
528 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
529 IXGBE_NOT_IMPLEMENTED);
535 * ixgbe_get_phy_firmware_version -
536 * @hw: pointer to hardware structure
537 * @firmware_version: pointer to firmware version
539 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
541 s32 status = IXGBE_SUCCESS;
543 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
544 (hw, firmware_version),
545 IXGBE_NOT_IMPLEMENTED);
550 * ixgbe_read_phy_reg - Read PHY register
551 * @hw: pointer to hardware structure
552 * @reg_addr: 32 bit address of PHY register to read
553 * @phy_data: Pointer to read data from PHY register
555 * Reads a value from a specified PHY register
557 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
561 ixgbe_identify_phy(hw);
563 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
564 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
568 * ixgbe_write_phy_reg - Write PHY register
569 * @hw: pointer to hardware structure
570 * @reg_addr: 32 bit PHY register to write
571 * @phy_data: Data to write to the PHY register
573 * Writes a value to specified PHY register
575 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
579 ixgbe_identify_phy(hw);
581 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
582 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
586 * ixgbe_setup_phy_link - Restart PHY autoneg
587 * @hw: pointer to hardware structure
589 * Restart autonegotiation and PHY and waits for completion.
591 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
593 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
594 IXGBE_NOT_IMPLEMENTED);
598 * ixgbe_setup_internal_phy - Configure integrated PHY
599 * @hw: pointer to hardware structure
601 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
602 * Returns success if not implemented, since nothing needs to be done in this
605 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
607 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
612 * ixgbe_check_phy_link - Determine link and speed status
613 * @hw: pointer to hardware structure
615 * Reads a PHY register to determine if link is up and the current speed for
618 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
621 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
622 link_up), IXGBE_NOT_IMPLEMENTED);
626 * ixgbe_setup_phy_link_speed - Set auto advertise
627 * @hw: pointer to hardware structure
628 * @speed: new link speed
630 * Sets the auto advertised capabilities
632 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
633 bool autoneg_wait_to_complete)
635 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
636 autoneg_wait_to_complete),
637 IXGBE_NOT_IMPLEMENTED);
641 * ixgbe_set_phy_power - Control the phy power state
642 * @hw: pointer to hardware structure
643 * @on: true for on, false for off
645 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
647 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
648 IXGBE_NOT_IMPLEMENTED);
652 * ixgbe_check_link - Get link and speed status
653 * @hw: pointer to hardware structure
655 * Reads the links register to determine if link is up and the current speed
657 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
658 bool *link_up, bool link_up_wait_to_complete)
660 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
661 link_up, link_up_wait_to_complete),
662 IXGBE_NOT_IMPLEMENTED);
666 * ixgbe_disable_tx_laser - Disable Tx laser
667 * @hw: pointer to hardware structure
669 * If the driver needs to disable the laser on SFI optics.
671 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
673 if (hw->mac.ops.disable_tx_laser)
674 hw->mac.ops.disable_tx_laser(hw);
678 * ixgbe_enable_tx_laser - Enable Tx laser
679 * @hw: pointer to hardware structure
681 * If the driver needs to enable the laser on SFI optics.
683 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
685 if (hw->mac.ops.enable_tx_laser)
686 hw->mac.ops.enable_tx_laser(hw);
690 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
691 * @hw: pointer to hardware structure
693 * When the driver changes the link speeds that it can support then
694 * flap the tx laser to alert the link partner to start autotry
695 * process on its end.
697 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
699 if (hw->mac.ops.flap_tx_laser)
700 hw->mac.ops.flap_tx_laser(hw);
704 * ixgbe_setup_link - Set link speed
705 * @hw: pointer to hardware structure
706 * @speed: new link speed
708 * Configures link settings. Restarts the link.
709 * Performs autonegotiation if needed.
711 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
712 bool autoneg_wait_to_complete)
714 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
715 autoneg_wait_to_complete),
716 IXGBE_NOT_IMPLEMENTED);
720 * ixgbe_setup_mac_link - Set link speed
721 * @hw: pointer to hardware structure
722 * @speed: new link speed
724 * Configures link settings. Restarts the link.
725 * Performs autonegotiation if needed.
727 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
728 bool autoneg_wait_to_complete)
730 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
731 autoneg_wait_to_complete),
732 IXGBE_NOT_IMPLEMENTED);
736 * ixgbe_get_link_capabilities - Returns link capabilities
737 * @hw: pointer to hardware structure
739 * Determines the link capabilities of the current configuration.
741 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
744 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
745 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
749 * ixgbe_led_on - Turn on LEDs
750 * @hw: pointer to hardware structure
751 * @index: led number to turn on
753 * Turns on the software controllable LEDs.
755 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
757 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
758 IXGBE_NOT_IMPLEMENTED);
762 * ixgbe_led_off - Turn off LEDs
763 * @hw: pointer to hardware structure
764 * @index: led number to turn off
766 * Turns off the software controllable LEDs.
768 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
770 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
771 IXGBE_NOT_IMPLEMENTED);
775 * ixgbe_blink_led_start - Blink LEDs
776 * @hw: pointer to hardware structure
777 * @index: led number to blink
779 * Blink LED based on index.
781 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
783 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
784 IXGBE_NOT_IMPLEMENTED);
788 * ixgbe_blink_led_stop - Stop blinking LEDs
789 * @hw: pointer to hardware structure
791 * Stop blinking LED based on index.
793 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
795 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
796 IXGBE_NOT_IMPLEMENTED);
800 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
801 * @hw: pointer to hardware structure
803 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
804 * ixgbe_hw struct in order to set up EEPROM access.
806 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
808 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
809 IXGBE_NOT_IMPLEMENTED);
814 * ixgbe_write_eeprom - Write word to EEPROM
815 * @hw: pointer to hardware structure
816 * @offset: offset within the EEPROM to be written to
817 * @data: 16 bit word to be written to the EEPROM
819 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
820 * called after this function, the EEPROM will most likely contain an
823 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
825 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
826 IXGBE_NOT_IMPLEMENTED);
830 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
831 * @hw: pointer to hardware structure
832 * @offset: offset within the EEPROM to be written to
833 * @data: 16 bit word(s) to be written to the EEPROM
834 * @words: number of words
836 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
837 * called after this function, the EEPROM will most likely contain an
840 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
843 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
844 (hw, offset, words, data),
845 IXGBE_NOT_IMPLEMENTED);
849 * ixgbe_read_eeprom - Read word from EEPROM
850 * @hw: pointer to hardware structure
851 * @offset: offset within the EEPROM to be read
852 * @data: read 16 bit value from EEPROM
854 * Reads 16 bit value from EEPROM
856 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
858 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
859 IXGBE_NOT_IMPLEMENTED);
863 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
864 * @hw: pointer to hardware structure
865 * @offset: offset within the EEPROM to be read
866 * @data: read 16 bit word(s) from EEPROM
867 * @words: number of words
869 * Reads 16 bit word(s) from EEPROM
871 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
872 u16 words, u16 *data)
874 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
875 (hw, offset, words, data),
876 IXGBE_NOT_IMPLEMENTED);
880 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
881 * @hw: pointer to hardware structure
882 * @checksum_val: calculated checksum
884 * Performs checksum calculation and validates the EEPROM checksum
886 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
888 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
889 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
893 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
894 * @hw: pointer to hardware structure
896 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
898 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
899 IXGBE_NOT_IMPLEMENTED);
903 * ixgbe_insert_mac_addr - Find a RAR for this mac address
904 * @hw: pointer to hardware structure
905 * @addr: Address to put into receive address register
906 * @vmdq: VMDq pool to assign
908 * Puts an ethernet address into a receive address register, or
909 * finds the rar that it is aleady in; adds to the pool list
911 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
913 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
915 IXGBE_NOT_IMPLEMENTED);
919 * ixgbe_set_rar - Set Rx address register
920 * @hw: pointer to hardware structure
921 * @index: Receive address register to write
922 * @addr: Address to put into receive address register
924 * @enable_addr: set flag that address is active
926 * Puts an ethernet address into a receive address register.
928 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
931 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
932 enable_addr), IXGBE_NOT_IMPLEMENTED);
936 * ixgbe_clear_rar - Clear Rx address register
937 * @hw: pointer to hardware structure
938 * @index: Receive address register to write
940 * Puts an ethernet address into a receive address register.
942 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
944 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
945 IXGBE_NOT_IMPLEMENTED);
949 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
950 * @hw: pointer to hardware structure
951 * @rar: receive address register index to associate with VMDq index
952 * @vmdq: VMDq set or pool index
954 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
956 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
957 IXGBE_NOT_IMPLEMENTED);
962 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
963 * @hw: pointer to hardware structure
964 * @vmdq: VMDq default pool index
966 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
968 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
969 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
973 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
974 * @hw: pointer to hardware structure
975 * @rar: receive address register index to disassociate with VMDq index
976 * @vmdq: VMDq set or pool index
978 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
980 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
981 IXGBE_NOT_IMPLEMENTED);
985 * ixgbe_init_rx_addrs - Initializes receive address filters.
986 * @hw: pointer to hardware structure
988 * Places the MAC address in receive address register 0 and clears the rest
989 * of the receive address registers. Clears the multicast table. Assumes
990 * the receiver is in reset when the routine is called.
992 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
994 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
995 IXGBE_NOT_IMPLEMENTED);
999 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
1000 * @hw: pointer to hardware structure
1002 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
1004 return hw->mac.num_rar_entries;
1008 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
1009 * @hw: pointer to hardware structure
1010 * @addr_list: the list of new multicast addresses
1011 * @addr_count: number of addresses
1012 * @func: iterator function to walk the multicast address list
1014 * The given list replaces any existing list. Clears the secondary addrs from
1015 * receive address registers. Uses unused receive address registers for the
1016 * first secondary addresses, and falls back to promiscuous mode as needed.
1018 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
1019 u32 addr_count, ixgbe_mc_addr_itr func)
1021 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
1022 addr_list, addr_count, func),
1023 IXGBE_NOT_IMPLEMENTED);
1027 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
1028 * @hw: pointer to hardware structure
1029 * @mc_addr_list: the list of new multicast addresses
1030 * @mc_addr_count: number of addresses
1031 * @func: iterator function to walk the multicast address list
1033 * The given list replaces any existing list. Clears the MC addrs from receive
1034 * address registers and the multicast table. Uses unused receive address
1035 * registers for the first multicast addresses, and hashes the rest into the
1038 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1039 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1042 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1043 mc_addr_list, mc_addr_count, func, clear),
1044 IXGBE_NOT_IMPLEMENTED);
1048 * ixgbe_enable_mc - Enable multicast address in RAR
1049 * @hw: pointer to hardware structure
1051 * Enables multicast address in RAR and the use of the multicast hash table.
1053 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1055 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1056 IXGBE_NOT_IMPLEMENTED);
1060 * ixgbe_disable_mc - Disable multicast address in RAR
1061 * @hw: pointer to hardware structure
1063 * Disables multicast address in RAR and the use of the multicast hash table.
1065 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1067 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1068 IXGBE_NOT_IMPLEMENTED);
1072 * ixgbe_clear_vfta - Clear VLAN filter table
1073 * @hw: pointer to hardware structure
1075 * Clears the VLAN filer table, and the VMDq index associated with the filter
1077 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1079 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1080 IXGBE_NOT_IMPLEMENTED);
1084 * ixgbe_set_vfta - Set VLAN filter table
1085 * @hw: pointer to hardware structure
1086 * @vlan: VLAN id to write to VLAN filter
1087 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1088 * @vlan_on: boolean flag to turn on/off VLAN
1089 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1091 * Turn on/off specified VLAN in the VLAN filter table.
1093 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1096 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1097 vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED);
1101 * ixgbe_set_vlvf - Set VLAN Pool Filter
1102 * @hw: pointer to hardware structure
1103 * @vlan: VLAN id to write to VLAN filter
1104 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1105 * @vlan_on: boolean flag to turn on/off VLAN in VLVF
1106 * @vfta_delta: pointer to the difference between the current value of VFTA
1107 * and the desired value
1108 * @vfta: the desired value of the VFTA
1109 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1111 * Turn on/off specified bit in VLVF table.
1113 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1114 u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
1116 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1117 vlan_on, vfta_delta, vfta, vlvf_bypass),
1118 IXGBE_NOT_IMPLEMENTED);
1122 * ixgbe_fc_enable - Enable flow control
1123 * @hw: pointer to hardware structure
1125 * Configures the flow control settings based on SW configuration.
1127 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1129 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1130 IXGBE_NOT_IMPLEMENTED);
1134 * ixgbe_setup_fc - Set up flow control
1135 * @hw: pointer to hardware structure
1137 * Called at init time to set up flow control.
1139 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1141 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1142 IXGBE_NOT_IMPLEMENTED);
1146 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1147 * @hw: pointer to hardware structure
1148 * @maj: driver major number to be sent to firmware
1149 * @min: driver minor number to be sent to firmware
1150 * @build: driver build number to be sent to firmware
1151 * @ver: driver version number to be sent to firmware
1153 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1156 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1157 build, ver), IXGBE_NOT_IMPLEMENTED);
1162 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1163 * @hw: pointer to hardware structure
1165 * Updates the temperatures in mac.thermal_sensor_data
1167 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1169 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1170 IXGBE_NOT_IMPLEMENTED);
1174 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1175 * @hw: pointer to hardware structure
1177 * Inits the thermal sensor thresholds according to the NVM map
1179 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1181 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1182 IXGBE_NOT_IMPLEMENTED);
1186 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1187 * @hw: pointer to hardware structure
1189 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1190 * When disabling dmac, dmac enable dmac bit is cleared.
1192 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1194 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1195 IXGBE_NOT_IMPLEMENTED);
1199 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1200 * @hw: pointer to hardware structure
1202 * Disables dmac, updates per TC settings, and then enable dmac.
1204 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1206 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1207 IXGBE_NOT_IMPLEMENTED);
1211 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1212 * @hw: pointer to hardware structure
1214 * Configure DMA coalescing threshold per TC and set high priority bit for
1215 * FCOE TC. The dmac enable bit must be cleared before configuring.
1217 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1219 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1220 IXGBE_NOT_IMPLEMENTED);
1224 * ixgbe_setup_eee - Enable/disable EEE support
1225 * @hw: pointer to the HW structure
1226 * @enable_eee: boolean flag to enable EEE
1228 * Enable/disable EEE based on enable_ee flag.
1229 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1233 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1235 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1236 IXGBE_NOT_IMPLEMENTED);
1240 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1241 * @hw: pointer to hardware structure
1242 * @enbale: enable or disable source address pruning
1243 * @pool: Rx pool - Rx pool to toggle source address pruning
1245 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1248 if (hw->mac.ops.set_source_address_pruning)
1249 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1253 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1254 * @hw: pointer to hardware structure
1255 * @enable: enable or disable switch for Ethertype anti-spoofing
1256 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1259 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1261 if (hw->mac.ops.set_ethertype_anti_spoofing)
1262 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1266 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1267 * @hw: pointer to hardware structure
1268 * @reg_addr: 32 bit address of PHY register to read
1269 * @device_type: type of device you want to communicate with
1270 * @phy_data: Pointer to read data from PHY register
1272 * Reads a value from a specified PHY register
1274 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1275 u32 device_type, u32 *phy_data)
1277 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1278 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1282 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1283 * @hw: pointer to hardware structure
1284 * @reg_addr: 32 bit PHY register to write
1285 * @device_type: type of device you want to communicate with
1286 * @phy_data: Data to write to the PHY register
1288 * Writes a value to specified PHY register
1290 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1291 u32 device_type, u32 phy_data)
1293 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1294 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1298 * ixgbe_disable_mdd - Disable malicious driver detection
1299 * @hw: pointer to hardware structure
1302 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1304 if (hw->mac.ops.disable_mdd)
1305 hw->mac.ops.disable_mdd(hw);
1309 * ixgbe_enable_mdd - Enable malicious driver detection
1310 * @hw: pointer to hardware structure
1313 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1315 if (hw->mac.ops.enable_mdd)
1316 hw->mac.ops.enable_mdd(hw);
1320 * ixgbe_mdd_event - Handle malicious driver detection event
1321 * @hw: pointer to hardware structure
1322 * @vf_bitmap: vf bitmap of malicious vfs
1325 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1327 if (hw->mac.ops.mdd_event)
1328 hw->mac.ops.mdd_event(hw, vf_bitmap);
1332 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1334 * @hw: pointer to hardware structure
1338 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1340 if (hw->mac.ops.restore_mdd_vf)
1341 hw->mac.ops.restore_mdd_vf(hw, vf);
1345 * ixgbe_enter_lplu - Transition to low power states
1346 * @hw: pointer to hardware structure
1348 * Configures Low Power Link Up on transition to low power states
1349 * (from D0 to non-D0).
1351 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1353 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1354 IXGBE_NOT_IMPLEMENTED);
1358 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1359 * @hw: pointer to hardware structure
1361 * Handle external Base T PHY interrupt. If high temperature
1362 * failure alarm then return error, else if link status change
1363 * then setup internal/external PHY link
1365 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1366 * failure alarm, else return PHY access status.
1368 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1370 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1371 IXGBE_NOT_IMPLEMENTED);
1375 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1376 * @hw: pointer to hardware structure
1377 * @reg: analog register to read
1380 * Performs write operation to analog register specified.
1382 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1384 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1385 val), IXGBE_NOT_IMPLEMENTED);
1389 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1390 * @hw: pointer to hardware structure
1391 * @reg: analog register to write
1392 * @val: value to write
1394 * Performs write operation to Atlas analog register specified.
1396 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1398 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1399 val), IXGBE_NOT_IMPLEMENTED);
1403 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1404 * @hw: pointer to hardware structure
1406 * Initializes the Unicast Table Arrays to zero on device load. This
1407 * is part of the Rx init addr execution path.
1409 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1411 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1412 IXGBE_NOT_IMPLEMENTED);
1416 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1417 * @hw: pointer to hardware structure
1418 * @byte_offset: byte offset to read
1419 * @dev_addr: I2C bus address to read from
1422 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1424 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1427 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1428 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1432 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1433 * @hw: pointer to hardware structure
1434 * @byte_offset: byte offset to read
1435 * @dev_addr: I2C bus address to read from
1438 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1440 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1441 u8 dev_addr, u8 *data)
1443 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1444 (hw, byte_offset, dev_addr, data),
1445 IXGBE_NOT_IMPLEMENTED);
1449 * ixgbe_read_link - Perform read operation on link device
1450 * @hw: pointer to the hardware structure
1451 * @addr: bus address to read from
1452 * @reg: device register to read from
1453 * @val: pointer to location to receive read value
1455 * Returns an error code on error.
1457 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1459 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1460 reg, val), IXGBE_NOT_IMPLEMENTED);
1464 * ixgbe_read_link_unlocked - Perform read operation on link device
1465 * @hw: pointer to the hardware structure
1466 * @addr: bus address to read from
1467 * @reg: device register to read from
1468 * @val: pointer to location to receive read value
1470 * Returns an error code on error.
1472 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1474 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
1475 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1479 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1480 * @hw: pointer to hardware structure
1481 * @byte_offset: byte offset to write
1482 * @dev_addr: I2C bus address to write to
1483 * @data: value to write
1485 * Performs byte write operation to SFP module's EEPROM over I2C interface
1486 * at a specified device address.
1488 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1491 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1492 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1496 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1497 * @hw: pointer to hardware structure
1498 * @byte_offset: byte offset to write
1499 * @dev_addr: I2C bus address to write to
1500 * @data: value to write
1502 * Performs byte write operation to SFP module's EEPROM over I2C interface
1503 * at a specified device address.
1505 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1506 u8 dev_addr, u8 data)
1508 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1509 (hw, byte_offset, dev_addr, data),
1510 IXGBE_NOT_IMPLEMENTED);
1514 * ixgbe_write_link - Perform write operation on link device
1515 * @hw: pointer to the hardware structure
1516 * @addr: bus address to write to
1517 * @reg: device register to write to
1518 * @val: value to write
1520 * Returns an error code on error.
1522 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1524 return ixgbe_call_func(hw, hw->link.ops.write_link,
1525 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1529 * ixgbe_write_link_unlocked - Perform write operation on link device
1530 * @hw: pointer to the hardware structure
1531 * @addr: bus address to write to
1532 * @reg: device register to write to
1533 * @val: value to write
1535 * Returns an error code on error.
1537 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1539 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1540 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1544 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1545 * @hw: pointer to hardware structure
1546 * @byte_offset: EEPROM byte offset to write
1547 * @eeprom_data: value to write
1549 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1551 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1552 u8 byte_offset, u8 eeprom_data)
1554 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1555 (hw, byte_offset, eeprom_data),
1556 IXGBE_NOT_IMPLEMENTED);
1560 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1561 * @hw: pointer to hardware structure
1562 * @byte_offset: EEPROM byte offset to read
1563 * @eeprom_data: value read
1565 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1567 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1569 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1570 (hw, byte_offset, eeprom_data),
1571 IXGBE_NOT_IMPLEMENTED);
1575 * ixgbe_get_supported_physical_layer - Returns physical layer type
1576 * @hw: pointer to hardware structure
1578 * Determines physical layer capabilities of the current configuration.
1580 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1582 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1583 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1587 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1588 * @hw: pointer to hardware structure
1589 * @regval: bitfield to write to the Rx DMA register
1591 * Enables the Rx DMA unit of the device.
1593 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1595 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1596 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1600 * ixgbe_disable_sec_rx_path - Stops the receive data path
1601 * @hw: pointer to hardware structure
1603 * Stops the receive data path.
1605 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1607 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1608 (hw), IXGBE_NOT_IMPLEMENTED);
1612 * ixgbe_enable_sec_rx_path - Enables the receive data path
1613 * @hw: pointer to hardware structure
1615 * Enables the receive data path.
1617 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1619 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1620 (hw), IXGBE_NOT_IMPLEMENTED);
1624 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1625 * @hw: pointer to hardware structure
1626 * @mask: Mask to specify which semaphore to acquire
1628 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1629 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1631 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1633 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1634 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1638 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1639 * @hw: pointer to hardware structure
1640 * @mask: Mask to specify which semaphore to release
1642 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1643 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1645 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1647 if (hw->mac.ops.release_swfw_sync)
1648 hw->mac.ops.release_swfw_sync(hw, mask);
1652 * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
1653 * @hw: pointer to hardware structure
1655 * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
1656 * Regardless of whether is succeeds or not it then release the semaphore.
1657 * This is function is called to recover from catastrophic failures that
1658 * may have left the semaphore locked.
1660 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
1662 if (hw->mac.ops.init_swfw_sync)
1663 hw->mac.ops.init_swfw_sync(hw);
1667 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1669 if (hw->mac.ops.disable_rx)
1670 hw->mac.ops.disable_rx(hw);
1673 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1675 if (hw->mac.ops.enable_rx)
1676 hw->mac.ops.enable_rx(hw);
1680 * ixgbe_set_rate_select_speed - Set module link speed
1681 * @hw: pointer to hardware structure
1682 * @speed: link speed to set
1684 * Set module link speed via the rate select.
1686 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1688 if (hw->mac.ops.set_rate_select_speed)
1689 hw->mac.ops.set_rate_select_speed(hw, speed);