4 * Copyright (C) Cavium Inc. 2017. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Cavium networks nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 #include <rte_alarm.h>
40 #include <rte_branch_prediction.h>
41 #include <rte_debug.h>
42 #include <rte_devargs.h>
44 #include <rte_kvargs.h>
45 #include <rte_malloc.h>
46 #include <rte_prefetch.h>
47 #include <rte_bus_vdev.h>
49 #include "octeontx_ethdev.h"
50 #include "octeontx_rxtx.h"
51 #include "octeontx_logs.h"
53 struct octeontx_vdev_init_params {
58 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
60 enum octeontx_link_speed {
61 OCTEONTX_LINK_SPEED_SGMII,
62 OCTEONTX_LINK_SPEED_XAUI,
63 OCTEONTX_LINK_SPEED_RXAUI,
64 OCTEONTX_LINK_SPEED_10G_R,
65 OCTEONTX_LINK_SPEED_40G_R,
66 OCTEONTX_LINK_SPEED_RESERVE1,
67 OCTEONTX_LINK_SPEED_QSGMII,
68 OCTEONTX_LINK_SPEED_RESERVE2
71 /* Parse integer from integer argument */
73 parse_integer_arg(const char *key __rte_unused,
74 const char *value, void *extra_args)
76 int *i = (int *)extra_args;
80 octeontx_log_err("argument has to be positive.");
88 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
89 struct rte_vdev_device *dev)
91 struct rte_kvargs *kvlist = NULL;
94 static const char * const octeontx_vdev_valid_params[] = {
95 OCTEONTX_VDEV_NR_PORT_ARG,
99 const char *input_args = rte_vdev_device_args(dev);
105 kvlist = rte_kvargs_parse(input_args,
106 octeontx_vdev_valid_params);
110 ret = rte_kvargs_process(kvlist,
111 OCTEONTX_VDEV_NR_PORT_ARG,
119 rte_kvargs_free(kvlist);
124 octeontx_port_open(struct octeontx_nic *nic)
126 octeontx_mbox_bgx_port_conf_t bgx_port_conf;
130 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
131 PMD_INIT_FUNC_TRACE();
133 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
135 octeontx_log_err("failed to open port %d", res);
139 nic->node = bgx_port_conf.node;
140 nic->port_ena = bgx_port_conf.enable;
141 nic->base_ichan = bgx_port_conf.base_chan;
142 nic->base_ochan = bgx_port_conf.base_chan;
143 nic->num_ichans = bgx_port_conf.num_chans;
144 nic->num_ochans = bgx_port_conf.num_chans;
145 nic->mtu = bgx_port_conf.mtu;
146 nic->bpen = bgx_port_conf.bpen;
147 nic->fcs_strip = bgx_port_conf.fcs_strip;
148 nic->bcast_mode = bgx_port_conf.bcast_mode;
149 nic->mcast_mode = bgx_port_conf.mcast_mode;
150 nic->speed = bgx_port_conf.mode;
152 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
154 octeontx_log_dbg("port opened %d", nic->port_id);
159 octeontx_port_close(struct octeontx_nic *nic)
161 PMD_INIT_FUNC_TRACE();
163 octeontx_bgx_port_close(nic->port_id);
164 octeontx_log_dbg("port closed %d", nic->port_id);
168 octeontx_port_start(struct octeontx_nic *nic)
170 PMD_INIT_FUNC_TRACE();
172 return octeontx_bgx_port_start(nic->port_id);
176 octeontx_port_stop(struct octeontx_nic *nic)
178 PMD_INIT_FUNC_TRACE();
180 return octeontx_bgx_port_stop(nic->port_id);
184 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
186 struct rte_eth_dev *dev;
190 PMD_INIT_FUNC_TRACE();
193 res = octeontx_bgx_port_promisc_set(nic->port_id, en);
195 octeontx_log_err("failed to set promiscuous mode %d",
198 /* Set proper flag for the mode */
199 dev->data->promiscuous = (en != 0) ? 1 : 0;
201 octeontx_log_dbg("port %d : promiscuous mode %s",
202 nic->port_id, en ? "set" : "unset");
206 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
208 octeontx_mbox_bgx_port_stats_t bgx_stats;
211 PMD_INIT_FUNC_TRACE();
213 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
215 octeontx_log_err("failed to get port stats %d", nic->port_id);
219 stats->ipackets = bgx_stats.rx_packets;
220 stats->ibytes = bgx_stats.rx_bytes;
221 stats->imissed = bgx_stats.rx_dropped;
222 stats->ierrors = bgx_stats.rx_errors;
223 stats->opackets = bgx_stats.tx_packets;
224 stats->obytes = bgx_stats.tx_bytes;
225 stats->oerrors = bgx_stats.tx_errors;
227 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
228 nic->port_id, stats->ipackets, stats->opackets);
234 octeontx_port_stats_clr(struct octeontx_nic *nic)
236 PMD_INIT_FUNC_TRACE();
238 octeontx_bgx_port_stats_clr(nic->port_id);
242 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
243 struct rte_event_dev_info *info)
245 memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
246 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
248 dev_conf->nb_event_ports = info->max_event_ports;
249 dev_conf->nb_event_queues = info->max_event_queues;
251 dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
252 dev_conf->nb_event_port_dequeue_depth =
253 info->max_event_port_dequeue_depth;
254 dev_conf->nb_event_port_enqueue_depth =
255 info->max_event_port_enqueue_depth;
256 dev_conf->nb_event_port_enqueue_depth =
257 info->max_event_port_enqueue_depth;
258 dev_conf->nb_events_limit =
259 info->max_num_events;
263 octeontx_dev_configure(struct rte_eth_dev *dev)
265 struct rte_eth_dev_data *data = dev->data;
266 struct rte_eth_conf *conf = &data->dev_conf;
267 struct rte_eth_rxmode *rxmode = &conf->rxmode;
268 struct rte_eth_txmode *txmode = &conf->txmode;
269 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
272 PMD_INIT_FUNC_TRACE();
275 if (!rte_eal_has_hugepages()) {
276 octeontx_log_err("huge page is not configured");
280 if (txmode->mq_mode) {
281 octeontx_log_err("tx mq_mode DCB or VMDq not supported");
285 if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
286 rxmode->mq_mode != ETH_MQ_RX_RSS) {
287 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
291 if (!rxmode->hw_strip_crc) {
292 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
293 rxmode->hw_strip_crc = 1;
296 if (rxmode->hw_ip_checksum) {
297 PMD_INIT_LOG(NOTICE, "rxcksum not supported");
298 rxmode->hw_ip_checksum = 0;
301 if (rxmode->split_hdr_size) {
302 octeontx_log_err("rxmode does not support split header");
306 if (rxmode->hw_vlan_filter) {
307 octeontx_log_err("VLAN filter not supported");
311 if (rxmode->hw_vlan_extend) {
312 octeontx_log_err("VLAN extended not supported");
316 if (rxmode->enable_lro) {
317 octeontx_log_err("LRO not supported");
321 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
322 octeontx_log_err("setting link speed/duplex not supported");
326 if (conf->dcb_capability_en) {
327 octeontx_log_err("DCB enable not supported");
331 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
332 octeontx_log_err("flow director not supported");
336 nic->num_tx_queues = dev->data->nb_tx_queues;
338 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
342 octeontx_log_err("failed to open channel %d no-of-txq %d",
343 nic->base_ochan, nic->num_tx_queues);
347 nic->pki.classifier_enable = false;
348 nic->pki.hash_enable = true;
349 nic->pki.initialized = false;
355 octeontx_dev_close(struct rte_eth_dev *dev)
357 struct octeontx_txq *txq = NULL;
358 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
362 PMD_INIT_FUNC_TRACE();
364 rte_event_dev_close(nic->evdev);
366 ret = octeontx_pko_channel_close(nic->base_ochan);
368 octeontx_log_err("failed to close channel %d VF%d %d %d",
369 nic->base_ochan, nic->port_id, nic->num_tx_queues,
372 /* Free txq resources for this port */
373 for (i = 0; i < nic->num_tx_queues; i++) {
374 txq = dev->data->tx_queues[i];
381 dev->tx_pkt_burst = NULL;
382 dev->rx_pkt_burst = NULL;
386 octeontx_dev_start(struct rte_eth_dev *dev)
388 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
393 PMD_INIT_FUNC_TRACE();
397 dev->tx_pkt_burst = octeontx_xmit_pkts;
398 ret = octeontx_pko_channel_start(nic->base_ochan);
400 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
401 nic->port_id, nic->num_tx_queues, nic->base_ochan,
409 dev->rx_pkt_burst = octeontx_recv_pkts;
410 ret = octeontx_pki_port_start(nic->port_id);
412 octeontx_log_err("fail to start Rx on port %d", nic->port_id);
413 goto channel_stop_error;
419 ret = octeontx_port_start(nic);
421 octeontx_log_err("failed start port %d", ret);
422 goto pki_port_stop_error;
425 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
426 nic->base_ochan, nic->num_tx_queues, nic->port_id);
428 ret = rte_event_dev_start(nic->evdev);
430 octeontx_log_err("failed to start evdev: ret (%d)", ret);
431 goto pki_port_stop_error;
438 octeontx_pki_port_stop(nic->port_id);
440 octeontx_pko_channel_stop(nic->base_ochan);
446 octeontx_dev_stop(struct rte_eth_dev *dev)
448 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
451 PMD_INIT_FUNC_TRACE();
453 rte_event_dev_stop(nic->evdev);
455 ret = octeontx_port_stop(nic);
457 octeontx_log_err("failed to req stop port %d res=%d",
462 ret = octeontx_pki_port_stop(nic->port_id);
464 octeontx_log_err("failed to stop pki port %d res=%d",
469 ret = octeontx_pko_channel_stop(nic->base_ochan);
471 octeontx_log_err("failed to stop channel %d VF%d %d %d",
472 nic->base_ochan, nic->port_id, nic->num_tx_queues,
479 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
481 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
483 PMD_INIT_FUNC_TRACE();
484 octeontx_port_promisc_set(nic, 1);
488 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
490 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
492 PMD_INIT_FUNC_TRACE();
493 octeontx_port_promisc_set(nic, 0);
497 octeontx_atomic_write_link_status(struct rte_eth_dev *dev,
498 struct rte_eth_link *link)
500 struct rte_eth_link *dst = &dev->data->dev_link;
501 struct rte_eth_link *src = link;
503 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
504 *(uint64_t *)src) == 0)
511 octeontx_port_link_status(struct octeontx_nic *nic)
515 PMD_INIT_FUNC_TRACE();
516 res = octeontx_bgx_port_link_status(nic->port_id);
518 octeontx_log_err("failed to get port %d link status",
523 nic->link_up = (uint8_t)res;
524 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
530 * Return 0 means link status changed, -1 means not changed
533 octeontx_dev_link_update(struct rte_eth_dev *dev,
534 int wait_to_complete __rte_unused)
536 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
537 struct rte_eth_link link;
540 PMD_INIT_FUNC_TRACE();
542 res = octeontx_port_link_status(nic);
544 octeontx_log_err("failed to request link status %d", res);
548 link.link_status = nic->link_up;
550 switch (nic->speed) {
551 case OCTEONTX_LINK_SPEED_SGMII:
552 link.link_speed = ETH_SPEED_NUM_1G;
555 case OCTEONTX_LINK_SPEED_XAUI:
556 link.link_speed = ETH_SPEED_NUM_10G;
559 case OCTEONTX_LINK_SPEED_RXAUI:
560 case OCTEONTX_LINK_SPEED_10G_R:
561 link.link_speed = ETH_SPEED_NUM_10G;
563 case OCTEONTX_LINK_SPEED_QSGMII:
564 link.link_speed = ETH_SPEED_NUM_5G;
566 case OCTEONTX_LINK_SPEED_40G_R:
567 link.link_speed = ETH_SPEED_NUM_40G;
570 case OCTEONTX_LINK_SPEED_RESERVE1:
571 case OCTEONTX_LINK_SPEED_RESERVE2:
573 link.link_speed = ETH_SPEED_NUM_NONE;
574 octeontx_log_err("incorrect link speed %d", nic->speed);
578 link.link_duplex = ETH_LINK_FULL_DUPLEX;
579 link.link_autoneg = ETH_LINK_AUTONEG;
581 return octeontx_atomic_write_link_status(dev, &link);
585 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
587 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
589 PMD_INIT_FUNC_TRACE();
590 return octeontx_port_stats(nic, stats);
594 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
596 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
598 PMD_INIT_FUNC_TRACE();
599 octeontx_port_stats_clr(nic);
603 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
604 struct ether_addr *addr)
606 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
609 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
611 octeontx_log_err("failed to set MAC address on port %d",
616 octeontx_dev_info(struct rte_eth_dev *dev,
617 struct rte_eth_dev_info *dev_info)
621 /* Autonegotiation may be disabled */
622 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
623 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
624 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
627 dev_info->driver_name = RTE_STR(rte_octeontx_pmd);
628 dev_info->max_mac_addrs = 1;
629 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
630 dev_info->max_rx_queues = 1;
631 dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
632 dev_info->min_rx_bufsize = 0;
633 dev_info->pci_dev = NULL;
635 dev_info->default_rxconf = (struct rte_eth_rxconf) {
640 dev_info->default_txconf = (struct rte_eth_txconf) {
643 ETH_TXQ_FLAGS_NOMULTSEGS |
644 ETH_TXQ_FLAGS_NOOFFLOADS |
645 ETH_TXQ_FLAGS_NOXSUMS,
648 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE;
652 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
654 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
655 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
656 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
660 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
663 struct octeontx_txq *txq;
666 PMD_INIT_FUNC_TRACE();
668 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
671 txq = dev->data->tx_queues[qidx];
673 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
675 sizeof(octeontx_dq_t),
677 octeontx_dq_info_getter);
683 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
687 (void)octeontx_port_stop(nic);
688 octeontx_pko_channel_stop(nic->base_ochan);
689 octeontx_pko_channel_close(nic->base_ochan);
690 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
695 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
697 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
699 PMD_INIT_FUNC_TRACE();
700 qidx = qidx % PKO_VF_NUM_DQ;
701 return octeontx_vf_start_tx_queue(dev, nic, qidx);
705 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
711 PMD_INIT_FUNC_TRACE();
713 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
716 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
721 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
723 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
725 PMD_INIT_FUNC_TRACE();
726 qidx = qidx % PKO_VF_NUM_DQ;
728 return octeontx_vf_stop_tx_queue(dev, nic, qidx);
732 octeontx_dev_tx_queue_release(void *tx_queue)
734 struct octeontx_txq *txq = tx_queue;
737 PMD_INIT_FUNC_TRACE();
740 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
742 octeontx_log_err("failed stop tx_queue(%d)\n",
750 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
751 uint16_t nb_desc, unsigned int socket_id,
752 const struct rte_eth_txconf *tx_conf)
754 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
755 struct octeontx_txq *txq = NULL;
759 RTE_SET_USED(nb_desc);
760 RTE_SET_USED(socket_id);
761 RTE_SET_USED(tx_conf);
763 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
765 /* Socket id check */
766 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
767 socket_id != (unsigned int)nic->node)
768 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
769 socket_id, nic->node);
771 /* Free memory prior to re-allocation if needed. */
772 if (dev->data->tx_queues[qidx] != NULL) {
773 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
775 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
776 dev->data->tx_queues[qidx] = NULL;
779 /* Allocating tx queue data structure */
780 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
781 RTE_CACHE_LINE_SIZE, nic->node);
783 octeontx_log_err("failed to allocate txq=%d", qidx);
789 txq->queue_id = dq_num;
790 dev->data->tx_queues[qidx] = txq;
791 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
793 res = octeontx_pko_channel_query_dqs(nic->base_ochan,
795 sizeof(octeontx_dq_t),
797 octeontx_dq_info_getter);
803 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
804 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
806 txq->dq.fc_status_va);
818 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
819 uint16_t nb_desc, unsigned int socket_id,
820 const struct rte_eth_rxconf *rx_conf,
821 struct rte_mempool *mb_pool)
823 struct octeontx_nic *nic = octeontx_pmd_priv(dev);
824 struct rte_mempool_ops *mp_ops = NULL;
825 struct octeontx_rxq *rxq = NULL;
826 pki_pktbuf_cfg_t pktbuf_conf;
827 pki_hash_cfg_t pki_hash;
828 pki_qos_cfg_t pki_qos;
832 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
833 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
835 RTE_SET_USED(nb_desc);
837 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
838 memset(&pki_hash, 0, sizeof(pki_hash));
839 memset(&pki_qos, 0, sizeof(pki_qos));
841 mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
842 if (strcmp(mp_ops->name, "octeontx_fpavf")) {
843 octeontx_log_err("failed to find octeontx_fpavf mempool");
847 /* Handle forbidden configurations */
848 if (nic->pki.classifier_enable) {
849 octeontx_log_err("cannot setup queue %d. "
850 "Classifier option unsupported", qidx);
856 /* Rx deferred start is not supported */
857 if (rx_conf->rx_deferred_start) {
858 octeontx_log_err("rx deferred start not supported");
862 /* Verify queue index */
863 if (qidx >= dev->data->nb_rx_queues) {
864 octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
865 qidx, (dev->data->nb_rx_queues - 1));
869 /* Socket id check */
870 if (socket_id != (unsigned int)SOCKET_ID_ANY &&
871 socket_id != (unsigned int)nic->node)
872 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
873 socket_id, nic->node);
875 /* Allocating rx queue data structure */
876 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
877 RTE_CACHE_LINE_SIZE, nic->node);
879 octeontx_log_err("failed to allocate rxq=%d", qidx);
883 if (!nic->pki.initialized) {
884 pktbuf_conf.port_type = 0;
885 pki_hash.port_type = 0;
886 pki_qos.port_type = 0;
888 pktbuf_conf.mmask.f_wqe_skip = 1;
889 pktbuf_conf.mmask.f_first_skip = 1;
890 pktbuf_conf.mmask.f_later_skip = 1;
891 pktbuf_conf.mmask.f_mbuff_size = 1;
892 pktbuf_conf.mmask.f_cache_mode = 1;
894 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
895 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
896 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
897 pktbuf_conf.mbuff_size = (mb_pool->elt_size -
898 RTE_PKTMBUF_HEADROOM -
899 rte_pktmbuf_priv_size(mb_pool) -
900 sizeof(struct rte_mbuf));
902 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
904 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
906 octeontx_log_err("fail to configure pktbuf for port %d",
911 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
912 "\tmbuf_size:\t0x%0x\n"
913 "\twqe_skip:\t0x%0x\n"
914 "\tfirst_skip:\t0x%0x\n"
915 "\tlater_skip:\t0x%0x\n"
916 "\tcache_mode:\t%s\n",
918 pktbuf_conf.mbuff_size,
919 pktbuf_conf.wqe_skip,
920 pktbuf_conf.first_skip,
921 pktbuf_conf.later_skip,
922 (pktbuf_conf.cache_mode ==
925 (pktbuf_conf.cache_mode ==
928 (pktbuf_conf.cache_mode ==
929 PKI_OPC_MODE_STF1_STT) ?
930 "STF1_STT" : "STF2_STT");
932 if (nic->pki.hash_enable) {
933 pki_hash.tag_dlc = 1;
934 pki_hash.tag_slc = 1;
935 pki_hash.tag_dlf = 1;
936 pki_hash.tag_slf = 1;
937 pki_hash.tag_prt = 1;
938 octeontx_pki_port_hash_config(port, &pki_hash);
941 pool = (uintptr_t)mb_pool->pool_id;
943 /* Get the gpool Id */
944 gaura = octeontx_fpa_bufpool_gpool(pool);
946 pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
947 pki_qos.num_entry = 1;
948 pki_qos.drop_policy = 0;
949 pki_qos.tag_type = 0L;
950 pki_qos.qos_entry[0].port_add = 0;
951 pki_qos.qos_entry[0].gaura = gaura;
952 pki_qos.qos_entry[0].ggrp_ok = ev_queues;
953 pki_qos.qos_entry[0].ggrp_bad = ev_queues;
954 pki_qos.qos_entry[0].grptag_bad = 0;
955 pki_qos.qos_entry[0].grptag_ok = 0;
957 ret = octeontx_pki_port_create_qos(port, &pki_qos);
959 octeontx_log_err("failed to create QOS port=%d, q=%d",
964 nic->pki.initialized = true;
967 rxq->port_id = nic->port_id;
969 rxq->queue_id = qidx;
970 rxq->evdev = nic->evdev;
971 rxq->ev_queues = ev_queues;
972 rxq->ev_ports = ev_ports;
974 dev->data->rx_queues[qidx] = rxq;
975 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
980 octeontx_dev_rx_queue_release(void *rxq)
985 static const uint32_t *
986 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
988 static const uint32_t ptypes[] = {
990 RTE_PTYPE_L3_IPV4_EXT,
992 RTE_PTYPE_L3_IPV6_EXT,
999 if (dev->rx_pkt_burst == octeontx_recv_pkts)
1005 /* Initialize and register driver with DPDK Application */
1006 static const struct eth_dev_ops octeontx_dev_ops = {
1007 .dev_configure = octeontx_dev_configure,
1008 .dev_infos_get = octeontx_dev_info,
1009 .dev_close = octeontx_dev_close,
1010 .dev_start = octeontx_dev_start,
1011 .dev_stop = octeontx_dev_stop,
1012 .promiscuous_enable = octeontx_dev_promisc_enable,
1013 .promiscuous_disable = octeontx_dev_promisc_disable,
1014 .link_update = octeontx_dev_link_update,
1015 .stats_get = octeontx_dev_stats_get,
1016 .stats_reset = octeontx_dev_stats_reset,
1017 .mac_addr_set = octeontx_dev_default_mac_addr_set,
1018 .tx_queue_start = octeontx_dev_tx_queue_start,
1019 .tx_queue_stop = octeontx_dev_tx_queue_stop,
1020 .tx_queue_setup = octeontx_dev_tx_queue_setup,
1021 .tx_queue_release = octeontx_dev_tx_queue_release,
1022 .rx_queue_setup = octeontx_dev_rx_queue_setup,
1023 .rx_queue_release = octeontx_dev_rx_queue_release,
1024 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1027 /* Create Ethdev interface per BGX LMAC ports */
1029 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1033 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1034 struct octeontx_nic *nic = NULL;
1035 struct rte_eth_dev *eth_dev = NULL;
1036 struct rte_eth_dev_data *data = NULL;
1037 const char *name = rte_vdev_device_name(dev);
1039 PMD_INIT_FUNC_TRACE();
1041 sprintf(octtx_name, "%s_%d", name, port);
1042 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1043 eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1044 if (eth_dev == NULL)
1047 eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1048 eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1052 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id);
1054 octeontx_log_err("failed to allocate devdata");
1059 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1061 octeontx_log_err("failed to allocate nic structure");
1066 nic->port_id = port;
1069 res = octeontx_port_open(nic);
1073 /* Rx side port configuration */
1074 res = octeontx_pki_port_open(port);
1076 octeontx_log_err("failed to open PKI port %d", port);
1081 /* Reserve an ethdev entry */
1082 eth_dev = rte_eth_dev_allocate(octtx_name);
1083 if (eth_dev == NULL) {
1084 octeontx_log_err("failed to allocate rte_eth_dev");
1089 eth_dev->device = &dev->device;
1090 eth_dev->intr_handle = NULL;
1091 eth_dev->data->kdrv = RTE_KDRV_NONE;
1092 eth_dev->data->numa_node = dev->device.numa_node;
1094 rte_memcpy(data, (eth_dev)->data, sizeof(*data));
1095 data->dev_private = nic;
1097 data->port_id = eth_dev->data->port_id;
1098 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name);
1103 data->dev_link.link_status = ETH_LINK_DOWN;
1104 data->dev_started = 0;
1105 data->promiscuous = 0;
1106 data->all_multicast = 0;
1107 data->scattered_rx = 0;
1109 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1111 if (data->mac_addrs == NULL) {
1112 octeontx_log_err("failed to allocate memory for mac_addrs");
1117 eth_dev->data = data;
1118 eth_dev->dev_ops = &octeontx_dev_ops;
1120 /* Finally save ethdev pointer to the NIC structure */
1123 if (nic->port_id != data->port_id) {
1124 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1125 data->port_id, nic->port_id);
1130 /* Update port_id mac to eth_dev */
1131 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1133 PMD_INIT_LOG(DEBUG, "ethdev info: ");
1134 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1135 nic->port_id, nic->port_ena,
1136 nic->base_ochan, nic->num_ochans,
1137 nic->num_tx_queues);
1138 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1140 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1141 [(nic->base_ochan >> 4) & 0xF] = data->port_id;
1143 return data->port_id;
1147 octeontx_port_close(nic);
1149 if (eth_dev != NULL) {
1150 rte_free(eth_dev->data->mac_addrs);
1153 rte_eth_dev_release_port(eth_dev);
1159 /* Un initialize octeontx device */
1161 octeontx_remove(struct rte_vdev_device *dev)
1163 char octtx_name[OCTEONTX_MAX_NAME_LEN];
1164 struct rte_eth_dev *eth_dev = NULL;
1165 struct octeontx_nic *nic = NULL;
1171 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1172 sprintf(octtx_name, "eth_octeontx_%d", i);
1174 /* reserve an ethdev entry */
1175 eth_dev = rte_eth_dev_allocated(octtx_name);
1176 if (eth_dev == NULL)
1179 nic = octeontx_pmd_priv(eth_dev);
1180 rte_event_dev_stop(nic->evdev);
1181 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1183 rte_free(eth_dev->data->mac_addrs);
1184 rte_free(eth_dev->data->dev_private);
1185 rte_free(eth_dev->data);
1186 rte_eth_dev_release_port(eth_dev);
1187 rte_event_dev_close(nic->evdev);
1190 /* Free FC resource */
1191 octeontx_pko_fc_free();
1196 /* Initialize octeontx device */
1198 octeontx_probe(struct rte_vdev_device *dev)
1200 const char *dev_name;
1201 static int probe_once;
1202 uint8_t socket_id, qlist;
1203 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1204 struct rte_event_dev_config dev_conf;
1205 const char *eventdev_name = "event_octeontx";
1206 struct rte_event_dev_info info;
1208 struct octeontx_vdev_init_params init_params = {
1209 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1212 dev_name = rte_vdev_device_name(dev);
1213 res = octeontx_parse_vdev_init_params(&init_params, dev);
1217 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1218 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1219 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1223 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1225 socket_id = rte_socket_id();
1227 tx_vfcnt = octeontx_pko_vf_count();
1229 if (tx_vfcnt < init_params.nr_port) {
1230 octeontx_log_err("not enough PKO (%d) for port number (%d)",
1231 tx_vfcnt, init_params.nr_port);
1234 evdev = rte_event_dev_get_dev_id(eventdev_name);
1236 octeontx_log_err("eventdev %s not found", eventdev_name);
1240 res = rte_event_dev_info_get(evdev, &info);
1242 octeontx_log_err("failed to eventdev info %d", res);
1246 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1247 info.max_event_queues, info.max_event_ports);
1249 if (octeontx_pko_init_fc(tx_vfcnt))
1252 devconf_set_default_sane_values(&dev_conf, &info);
1253 res = rte_event_dev_configure(evdev, &dev_conf);
1257 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1259 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1262 octeontx_log_err("too few event ports (%d) for event_q(%d)",
1268 /* Enable all queues available */
1269 for (i = 0; i < qnum; i++) {
1270 res = rte_event_queue_setup(evdev, i, NULL);
1272 octeontx_log_err("failed to setup event_q(%d): res %d",
1278 /* Enable all ports available */
1279 for (i = 0; i < pnum; i++) {
1280 res = rte_event_port_setup(evdev, i, NULL);
1283 octeontx_log_err("failed to setup ev port(%d) res=%d",
1290 * Do 1:1 links for ports & queues. All queues would be mapped to
1291 * one port. If there are more ports than queues, then some ports
1292 * won't be linked to any queue.
1294 for (i = 0; i < qnum; i++) {
1295 /* Link one queue to one event port */
1297 res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1300 octeontx_log_err("failed to link port (%d): res=%d",
1306 /* Create ethdev interface */
1307 for (i = 0; i < init_params.nr_port; i++) {
1308 port_id = octeontx_create(dev, i, evdev, socket_id);
1310 octeontx_log_err("failed to create device %s",
1316 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1321 octeontx_log_err("interface %s not supported", dev_name);
1322 octeontx_remove(dev);
1331 octeontx_pko_fc_free();
1335 static struct rte_vdev_driver octeontx_pmd_drv = {
1336 .probe = octeontx_probe,
1337 .remove = octeontx_remove,
1340 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1341 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1342 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");