2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
34 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
38 __in uint32_t mcdi_cap,
39 __out uint32_t *maskp)
44 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
45 mask |= (1 << EFX_PHY_CAP_10HDX);
46 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
47 mask |= (1 << EFX_PHY_CAP_10FDX);
48 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
49 mask |= (1 << EFX_PHY_CAP_100HDX);
50 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
51 mask |= (1 << EFX_PHY_CAP_100FDX);
52 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
53 mask |= (1 << EFX_PHY_CAP_1000HDX);
54 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
55 mask |= (1 << EFX_PHY_CAP_1000FDX);
56 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
57 mask |= (1 << EFX_PHY_CAP_10000FDX);
58 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
59 mask |= (1 << EFX_PHY_CAP_40000FDX);
60 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
61 mask |= (1 << EFX_PHY_CAP_PAUSE);
62 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
63 mask |= (1 << EFX_PHY_CAP_ASYM);
64 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
65 mask |= (1 << EFX_PHY_CAP_AN);
71 mcdi_phy_decode_link_mode(
73 __in uint32_t link_flags,
74 __in unsigned int speed,
75 __in unsigned int fcntl,
76 __out efx_link_mode_t *link_modep,
77 __out unsigned int *fcntlp)
79 boolean_t fd = !!(link_flags &
80 (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
81 boolean_t up = !!(link_flags &
82 (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
87 *link_modep = EFX_LINK_DOWN;
88 else if (speed == 40000 && fd)
89 *link_modep = EFX_LINK_40000FDX;
90 else if (speed == 10000 && fd)
91 *link_modep = EFX_LINK_10000FDX;
92 else if (speed == 1000)
93 *link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX;
94 else if (speed == 100)
95 *link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX;
97 *link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX;
99 *link_modep = EFX_LINK_UNKNOWN;
101 if (fcntl == MC_CMD_FCNTL_OFF)
103 else if (fcntl == MC_CMD_FCNTL_RESPOND)
104 *fcntlp = EFX_FCNTL_RESPOND;
105 else if (fcntl == MC_CMD_FCNTL_GENERATE)
106 *fcntlp = EFX_FCNTL_GENERATE;
107 else if (fcntl == MC_CMD_FCNTL_BIDIR)
108 *fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
110 EFSYS_PROBE1(mc_pcol_error, int, fcntl);
119 __in efx_qword_t *eqp,
120 __out efx_link_mode_t *link_modep)
122 efx_port_t *epp = &(enp->en_port);
123 unsigned int link_flags;
126 efx_link_mode_t link_mode;
127 uint32_t lp_cap_mask;
130 * Convert the LINKCHANGE speed enumeration into mbit/s, in the
131 * same way as GET_LINK encodes the speed
133 switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) {
134 case MCDI_EVENT_LINKCHANGE_SPEED_100M:
137 case MCDI_EVENT_LINKCHANGE_SPEED_1G:
140 case MCDI_EVENT_LINKCHANGE_SPEED_10G:
143 case MCDI_EVENT_LINKCHANGE_SPEED_40G:
151 link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
152 mcdi_phy_decode_link_mode(enp, link_flags, speed,
153 MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
155 mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
159 * It's safe to update ep_lp_cap_mask without the driver's port lock
160 * because presumably any concurrently running efx_port_poll() is
161 * only going to arrive at the same value.
163 * ep_fcntl has two meanings. It's either the link common fcntl
164 * (if the PHY supports AN), or it's the forced link state. If
165 * the former, it's safe to update the value for the same reason as
166 * for ep_lp_cap_mask. If the latter, then just ignore the value,
167 * because we can race with efx_mac_fcntl_set().
169 epp->ep_lp_cap_mask = lp_cap_mask;
170 epp->ep_fcntl = fcntl;
172 *link_modep = link_mode;
175 __checkReturn efx_rc_t
178 __in boolean_t power)
185 /* Check if the PHY is a zombie */
186 if ((rc = ef10_phy_verify(enp)) != 0)
189 enp->en_reset_flags |= EFX_RESET_PHY;
194 EFSYS_PROBE1(fail1, efx_rc_t, rc);
199 __checkReturn efx_rc_t
202 __out ef10_link_state_t *elsp)
205 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN,
206 MC_CMD_GET_LINK_OUT_LEN);
209 req.emr_cmd = MC_CMD_GET_LINK;
210 req.emr_in_buf = payload;
211 req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
212 req.emr_out_buf = payload;
213 req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN;
215 efx_mcdi_execute(enp, &req);
217 if (req.emr_rc != 0) {
222 if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) {
227 mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
228 &elsp->els_adv_cap_mask);
229 mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
230 &elsp->els_lp_cap_mask);
232 mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
233 MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
234 MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
235 &elsp->els_link_mode, &elsp->els_fcntl);
237 #if EFSYS_OPT_LOOPBACK
238 /* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */
239 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF);
240 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA);
241 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC);
242 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII);
243 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS);
244 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI);
245 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII);
246 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII);
247 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR);
248 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI);
249 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR);
250 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR);
251 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR);
252 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR);
253 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY);
254 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS);
255 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS);
256 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD);
258 elsp->els_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE);
259 #endif /* EFSYS_OPT_LOOPBACK */
261 elsp->els_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0;
268 EFSYS_PROBE1(fail1, efx_rc_t, rc);
273 __checkReturn efx_rc_t
274 ef10_phy_reconfigure(
277 efx_port_t *epp = &(enp->en_port);
279 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_LINK_IN_LEN,
280 MC_CMD_SET_LINK_OUT_LEN);
282 unsigned int led_mode;
287 if ((rc = efx_mcdi_link_control_supported(enp, &supported)) != 0)
289 if (supported == B_FALSE)
292 req.emr_cmd = MC_CMD_SET_LINK;
293 req.emr_in_buf = payload;
294 req.emr_in_length = MC_CMD_SET_LINK_IN_LEN;
295 req.emr_out_buf = payload;
296 req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN;
298 cap_mask = epp->ep_adv_cap_mask;
299 MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP,
300 PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1,
301 PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1,
302 PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1,
303 PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1,
304 PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1,
305 PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1,
306 PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1,
307 PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1,
308 PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1,
309 PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);
310 /* Too many fields for for POPULATE macros, so insert this afterwards */
311 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
312 PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1);
314 #if EFSYS_OPT_LOOPBACK
315 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
316 epp->ep_loopback_type);
317 switch (epp->ep_loopback_link_mode) {
318 case EFX_LINK_100FDX:
321 case EFX_LINK_1000FDX:
324 case EFX_LINK_10000FDX:
327 case EFX_LINK_40000FDX:
334 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE);
336 #endif /* EFSYS_OPT_LOOPBACK */
337 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
339 #if EFSYS_OPT_PHY_FLAGS
340 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
342 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
343 #endif /* EFSYS_OPT_PHY_FLAGS */
345 efx_mcdi_execute(enp, &req);
347 if (req.emr_rc != 0) {
352 /* And set the blink mode */
353 (void) memset(payload, 0, sizeof (payload));
354 req.emr_cmd = MC_CMD_SET_ID_LED;
355 req.emr_in_buf = payload;
356 req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN;
357 req.emr_out_buf = payload;
358 req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN;
360 #if EFSYS_OPT_PHY_LED_CONTROL
361 switch (epp->ep_phy_led_mode) {
362 case EFX_PHY_LED_DEFAULT:
363 led_mode = MC_CMD_LED_DEFAULT;
365 case EFX_PHY_LED_OFF:
366 led_mode = MC_CMD_LED_OFF;
369 led_mode = MC_CMD_LED_ON;
373 led_mode = MC_CMD_LED_DEFAULT;
376 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode);
378 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT);
379 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
381 efx_mcdi_execute(enp, &req);
383 if (req.emr_rc != 0) {
395 EFSYS_PROBE1(fail1, efx_rc_t, rc);
400 __checkReturn efx_rc_t
405 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_STATE_IN_LEN,
406 MC_CMD_GET_PHY_STATE_OUT_LEN);
410 req.emr_cmd = MC_CMD_GET_PHY_STATE;
411 req.emr_in_buf = payload;
412 req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN;
413 req.emr_out_buf = payload;
414 req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN;
416 efx_mcdi_execute(enp, &req);
418 if (req.emr_rc != 0) {
423 if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) {
428 state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE);
429 if (state != MC_CMD_PHY_STATE_OK) {
430 if (state != MC_CMD_PHY_STATE_ZOMBIE)
431 EFSYS_PROBE1(mc_pcol_error, int, state);
443 EFSYS_PROBE1(fail1, efx_rc_t, rc);
448 __checkReturn efx_rc_t
451 __out uint32_t *ouip)
453 _NOTE(ARGUNUSED(enp, ouip))
458 #if EFSYS_OPT_PHY_STATS
460 __checkReturn efx_rc_t
461 ef10_phy_stats_update(
463 __in efsys_mem_t *esmp,
464 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat)
466 /* TBD: no stats support in firmware yet */
467 _NOTE(ARGUNUSED(enp, esmp))
468 memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat));
473 #endif /* EFSYS_OPT_PHY_STATS */
477 __checkReturn efx_rc_t
478 ef10_bist_enable_offline(
483 if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0)
489 EFSYS_PROBE1(fail1, efx_rc_t, rc);
494 __checkReturn efx_rc_t
497 __in efx_bist_type_t type)
501 if ((rc = efx_mcdi_bist_start(enp, type)) != 0)
507 EFSYS_PROBE1(fail1, efx_rc_t, rc);
512 __checkReturn efx_rc_t
515 __in efx_bist_type_t type,
516 __out efx_bist_result_t *resultp,
517 __out_opt __drv_when(count > 0, __notnull)
518 uint32_t *value_maskp,
519 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
520 unsigned long *valuesp,
524 * MCDI_CTL_SDU_LEN_MAX_V1 is large enough cover all BIST results,
525 * whilst not wasting stack.
527 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_POLL_BIST_IN_LEN,
528 MCDI_CTL_SDU_LEN_MAX_V1);
529 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
531 uint32_t value_mask = 0;
535 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_LEN <=
536 MCDI_CTL_SDU_LEN_MAX_V1);
537 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_SFT9001_LEN <=
538 MCDI_CTL_SDU_LEN_MAX_V1);
539 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MRSFP_LEN <=
540 MCDI_CTL_SDU_LEN_MAX_V1);
541 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MEM_LEN <=
542 MCDI_CTL_SDU_LEN_MAX_V1);
544 _NOTE(ARGUNUSED(type))
546 req.emr_cmd = MC_CMD_POLL_BIST;
547 req.emr_in_buf = payload;
548 req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;
549 req.emr_out_buf = payload;
550 req.emr_out_length = MCDI_CTL_SDU_LEN_MAX_V1;
552 efx_mcdi_execute(enp, &req);
554 if (req.emr_rc != 0) {
559 if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {
565 (void) memset(valuesp, '\0', count * sizeof (unsigned long));
567 result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);
569 if (result == MC_CMD_POLL_BIST_FAILED &&
570 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN &&
571 count > EFX_BIST_MEM_ECC_FATAL) {
572 if (valuesp != NULL) {
573 valuesp[EFX_BIST_MEM_TEST] =
574 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST);
575 valuesp[EFX_BIST_MEM_ADDR] =
576 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR);
577 valuesp[EFX_BIST_MEM_BUS] =
578 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS);
579 valuesp[EFX_BIST_MEM_EXPECT] =
580 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT);
581 valuesp[EFX_BIST_MEM_ACTUAL] =
582 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL);
583 valuesp[EFX_BIST_MEM_ECC] =
584 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC);
585 valuesp[EFX_BIST_MEM_ECC_PARITY] =
586 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY);
587 valuesp[EFX_BIST_MEM_ECC_FATAL] =
588 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL);
590 value_mask |= (1 << EFX_BIST_MEM_TEST) |
591 (1 << EFX_BIST_MEM_ADDR) |
592 (1 << EFX_BIST_MEM_BUS) |
593 (1 << EFX_BIST_MEM_EXPECT) |
594 (1 << EFX_BIST_MEM_ACTUAL) |
595 (1 << EFX_BIST_MEM_ECC) |
596 (1 << EFX_BIST_MEM_ECC_PARITY) |
597 (1 << EFX_BIST_MEM_ECC_FATAL);
598 } else if (result == MC_CMD_POLL_BIST_FAILED &&
599 encp->enc_phy_type == EFX_PHY_XFI_FARMI &&
600 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&
601 count > EFX_BIST_FAULT_CODE) {
603 valuesp[EFX_BIST_FAULT_CODE] =
604 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);
605 value_mask |= 1 << EFX_BIST_FAULT_CODE;
608 if (value_maskp != NULL)
609 *value_maskp = value_mask;
611 EFSYS_ASSERT(resultp != NULL);
612 if (result == MC_CMD_POLL_BIST_RUNNING)
613 *resultp = EFX_BIST_RESULT_RUNNING;
614 else if (result == MC_CMD_POLL_BIST_PASSED)
615 *resultp = EFX_BIST_RESULT_PASSED;
617 *resultp = EFX_BIST_RESULT_FAILED;
624 EFSYS_PROBE1(fail1, efx_rc_t, rc);
632 __in efx_bist_type_t type)
634 /* There is no way to stop BIST on EF10. */
635 _NOTE(ARGUNUSED(enp, type))
638 #endif /* EFSYS_OPT_BIST */
640 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */