drivers/net/sfc/sfc_rx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #include <rte_mempool.h>
  11
  12 #include "efx.h"
  13
  14 #include "sfc.h"
  15 #include "sfc_debug.h"
  16 #include "sfc_log.h"
  17 #include "sfc_ev.h"
  18 #include "sfc_rx.h"
  19 #include "sfc_kvargs.h"
  20 #include "sfc_tweak.h"
  21
  22 /*
  23  * Maximum number of Rx queue flush attempt in the case of failure or
  24  * flush timeout
  25  */
  26 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
  27
  28 /*
  29  * Time to wait between event queue polling attempts when waiting for Rx
  30  * queue flush done or failed events.
  31  */
  32 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
  33
  34 /*
  35  * Maximum number of event queue polling attempts when waiting for Rx queue
  36  * flush done or failed events. It defines Rx queue flush attempt timeout
  37  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
  38  */
  39 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
  40
  41 void
  42 sfc_rx_qflush_done(struct sfc_rxq *rxq)
  43 {
  44         rxq->state |= SFC_RXQ_FLUSHED;
  45         rxq->state &= ~SFC_RXQ_FLUSHING;
  46 }
  47
  48 void
  49 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
  50 {
  51         rxq->state |= SFC_RXQ_FLUSH_FAILED;
  52         rxq->state &= ~SFC_RXQ_FLUSHING;
  53 }
  54
  55 static void
  56 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
  57 {
  58         unsigned int free_space;
  59         unsigned int bulks;
  60         void *objs[SFC_RX_REFILL_BULK];
  61         efsys_dma_addr_t addr[RTE_DIM(objs)];
  62         unsigned int added = rxq->added;
  63         unsigned int id;
  64         unsigned int i;
  65         struct sfc_efx_rx_sw_desc *rxd;
  66         struct rte_mbuf *m;
  67         uint16_t port_id = rxq->dp.dpq.port_id;
  68
  69         free_space = rxq->max_fill_level - (added - rxq->completed);
  70
  71         if (free_space < rxq->refill_threshold)
  72                 return;
  73
  74         bulks = free_space / RTE_DIM(objs);
  75         /* refill_threshold guarantees that bulks is positive */
  76         SFC_ASSERT(bulks > 0);
  77
  78         id = added & rxq->ptr_mask;
  79         do {
  80                 if (unlikely(rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
  81                                                   RTE_DIM(objs)) < 0)) {
  82                         /*
  83                          * It is hardly a safe way to increment counter
  84                          * from different contexts, but all PMDs do it.
  85                          */
  86                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
  87                                 RTE_DIM(objs);
  88                         /* Return if we have posted nothing yet */
  89                         if (added == rxq->added)
  90                                 return;
  91                         /* Push posted */
  92                         break;
  93                 }
  94
  95                 for (i = 0; i < RTE_DIM(objs);
  96                      ++i, id = (id + 1) & rxq->ptr_mask) {
  97                         m = objs[i];
  98
  99                         MBUF_RAW_ALLOC_CHECK(m);
 100
 101                         rxd = &rxq->sw_desc[id];
 102                         rxd->mbuf = m;
 103
 104                         m->data_off = RTE_PKTMBUF_HEADROOM;
 105                         m->port = port_id;
 106
 107                         addr[i] = rte_pktmbuf_iova(m);
 108                 }
 109
 110                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
 111                              RTE_DIM(objs), rxq->completed, added);
 112                 added += RTE_DIM(objs);
 113         } while (--bulks > 0);
 114
 115         SFC_ASSERT(added != rxq->added);
 116         rxq->added = added;
 117         efx_rx_qpush(rxq->common, added, &rxq->pushed);
 118 }
 119
 120 static uint64_t
 121 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
 122 {
 123         uint64_t mbuf_flags = 0;
 124
 125         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
 126         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
 127                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
 128                 break;
 129         case EFX_PKT_IPV4:
 130                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
 131                 break;
 132         default:
 133                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
 134                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
 135                            PKT_RX_IP_CKSUM_UNKNOWN);
 136                 break;
 137         }
 138
 139         switch ((desc_flags &
 140                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
 141         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
 142         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
 143                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
 144                 break;
 145         case EFX_PKT_TCP:
 146         case EFX_PKT_UDP:
 147                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
 148                 break;
 149         default:
 150                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
 151                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
 152                            PKT_RX_L4_CKSUM_UNKNOWN);
 153                 break;
 154         }
 155
 156         return mbuf_flags;
 157 }
 158
 159 static uint32_t
 160 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
 161 {
 162         return RTE_PTYPE_L2_ETHER |
 163                 ((desc_flags & EFX_PKT_IPV4) ?
 164                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
 165                 ((desc_flags & EFX_PKT_IPV6) ?
 166                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
 167                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
 168                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
 169 }
 170
 171 static const uint32_t *
 172 sfc_efx_supported_ptypes_get(__rte_unused uint32_t tunnel_encaps)
 173 {
 174         static const uint32_t ptypes[] = {
 175                 RTE_PTYPE_L2_ETHER,
 176                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 177                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 178                 RTE_PTYPE_L4_TCP,
 179                 RTE_PTYPE_L4_UDP,
 180                 RTE_PTYPE_UNKNOWN
 181         };
 182
 183         return ptypes;
 184 }
 185
 186 static void
 187 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
 188                         struct rte_mbuf *m)
 189 {
 190         uint8_t *mbuf_data;
 191
 192
 193         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
 194                 return;
 195
 196         mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
 197
 198         if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
 199                 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
 200                                                       EFX_RX_HASHALG_TOEPLITZ,
 201                                                       mbuf_data);
 202
 203                 m->ol_flags |= PKT_RX_RSS_HASH;
 204         }
 205 }
 206
 207 static uint16_t
 208 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 209 {
 210         struct sfc_dp_rxq *dp_rxq = rx_queue;
 211         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 212         unsigned int completed;
 213         unsigned int prefix_size = rxq->prefix_size;
 214         unsigned int done_pkts = 0;
 215         boolean_t discard_next = B_FALSE;
 216         struct rte_mbuf *scatter_pkt = NULL;
 217
 218         if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
 219                 return 0;
 220
 221         sfc_ev_qpoll(rxq->evq);
 222
 223         completed = rxq->completed;
 224         while (completed != rxq->pending && done_pkts < nb_pkts) {
 225                 unsigned int id;
 226                 struct sfc_efx_rx_sw_desc *rxd;
 227                 struct rte_mbuf *m;
 228                 unsigned int seg_len;
 229                 unsigned int desc_flags;
 230
 231                 id = completed++ & rxq->ptr_mask;
 232                 rxd = &rxq->sw_desc[id];
 233                 m = rxd->mbuf;
 234                 desc_flags = rxd->flags;
 235
 236                 if (discard_next)
 237                         goto discard;
 238
 239                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
 240                         goto discard;
 241
 242                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
 243                         uint16_t tmp_size;
 244                         int rc __rte_unused;
 245
 246                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
 247                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
 248                         SFC_ASSERT(rc == 0);
 249                         seg_len = tmp_size;
 250                 } else {
 251                         seg_len = rxd->size - prefix_size;
 252                 }
 253
 254                 rte_pktmbuf_data_len(m) = seg_len;
 255                 rte_pktmbuf_pkt_len(m) = seg_len;
 256
 257                 if (scatter_pkt != NULL) {
 258                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
 259                                 rte_pktmbuf_free(scatter_pkt);
 260                                 goto discard;
 261                         }
 262                         /* The packet to deliver */
 263                         m = scatter_pkt;
 264                 }
 265
 266                 if (desc_flags & EFX_PKT_CONT) {
 267                         /* The packet is scattered, more fragments to come */
 268                         scatter_pkt = m;
 269                         /* Further fragments have no prefix */
 270                         prefix_size = 0;
 271                         continue;
 272                 }
 273
 274                 /* Scattered packet is done */
 275                 scatter_pkt = NULL;
 276                 /* The first fragment of the packet has prefix */
 277                 prefix_size = rxq->prefix_size;
 278
 279                 m->ol_flags =
 280                         sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
 281                 m->packet_type =
 282                         sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
 283
 284                 /*
 285                  * Extract RSS hash from the packet prefix and
 286                  * set the corresponding field (if needed and possible)
 287                  */
 288                 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
 289
 290                 m->data_off += prefix_size;
 291
 292                 *rx_pkts++ = m;
 293                 done_pkts++;
 294                 continue;
 295
 296 discard:
 297                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
 298                 rte_mbuf_raw_free(m);
 299                 rxd->mbuf = NULL;
 300         }
 301
 302         /* pending is only moved when entire packet is received */
 303         SFC_ASSERT(scatter_pkt == NULL);
 304
 305         rxq->completed = completed;
 306
 307         sfc_efx_rx_qrefill(rxq);
 308
 309         return done_pkts;
 310 }
 311
 312 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
 313 static unsigned int
 314 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
 315 {
 316         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 317
 318         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
 319                 return 0;
 320
 321         sfc_ev_qpoll(rxq->evq);
 322
 323         return rxq->pending - rxq->completed;
 324 }
 325
 326 static sfc_dp_rx_qdesc_status_t sfc_efx_rx_qdesc_status;
 327 static int
 328 sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
 329 {
 330         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 331
 332         if (unlikely(offset > rxq->ptr_mask))
 333                 return -EINVAL;
 334
 335         /*
 336          * Poll EvQ to derive up-to-date 'rxq->pending' figure;
 337          * it is required for the queue to be running, but the
 338          * check is omitted because API design assumes that it
 339          * is the duty of the caller to satisfy all conditions
 340          */
 341         SFC_ASSERT((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) ==
 342                    SFC_EFX_RXQ_FLAG_RUNNING);
 343         sfc_ev_qpoll(rxq->evq);
 344
 345         /*
 346          * There is a handful of reserved entries in the ring,
 347          * but an explicit check whether the offset points to
 348          * a reserved entry is neglected since the two checks
 349          * below rely on the figures which take the HW limits
 350          * into account and thus if an entry is reserved, the
 351          * checks will fail and UNAVAIL code will be returned
 352          */
 353
 354         if (offset < (rxq->pending - rxq->completed))
 355                 return RTE_ETH_RX_DESC_DONE;
 356
 357         if (offset < (rxq->added - rxq->completed))
 358                 return RTE_ETH_RX_DESC_AVAIL;
 359
 360         return RTE_ETH_RX_DESC_UNAVAIL;
 361 }
 362
 363 boolean_t
 364 sfc_rx_check_scatter(size_t pdu, size_t rx_buf_size, uint32_t rx_prefix_size,
 365                      boolean_t rx_scatter_enabled, const char **error)
 366 {
 367         if ((rx_buf_size < pdu + rx_prefix_size) && !rx_scatter_enabled) {
 368                 *error = "Rx scatter is disabled and RxQ mbuf pool object size is too small";
 369                 return B_FALSE;
 370         }
 371
 372         return B_TRUE;
 373 }
 374
 375 struct sfc_rxq *
 376 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 377 {
 378         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 379         struct rte_eth_dev *eth_dev;
 380         struct sfc_adapter *sa;
 381         struct sfc_rxq *rxq;
 382
 383         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 384         eth_dev = &rte_eth_devices[dpq->port_id];
 385
 386         sa = eth_dev->data->dev_private;
 387
 388         SFC_ASSERT(dpq->queue_id < sa->rxq_count);
 389         rxq = sa->rxq_info[dpq->queue_id].rxq;
 390
 391         SFC_ASSERT(rxq != NULL);
 392         return rxq;
 393 }
 394
 395 static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings;
 396 static int
 397 sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc,
 398                           __rte_unused struct rte_mempool *mb_pool,
 399                           unsigned int *rxq_entries,
 400                           unsigned int *evq_entries,
 401                           unsigned int *rxq_max_fill_level)
 402 {
 403         *rxq_entries = nb_rx_desc;
 404         *evq_entries = nb_rx_desc;
 405         *rxq_max_fill_level = EFX_RXQ_LIMIT(*rxq_entries);
 406         return 0;
 407 }
 408
 409 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
 410 static int
 411 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
 412                    const struct rte_pci_addr *pci_addr, int socket_id,
 413                    const struct sfc_dp_rx_qcreate_info *info,
 414                    struct sfc_dp_rxq **dp_rxqp)
 415 {
 416         struct sfc_efx_rxq *rxq;
 417         int rc;
 418
 419         rc = ENOMEM;
 420         rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
 421                                  RTE_CACHE_LINE_SIZE, socket_id);
 422         if (rxq == NULL)
 423                 goto fail_rxq_alloc;
 424
 425         sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
 426
 427         rc = ENOMEM;
 428         rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
 429                                          info->rxq_entries,
 430                                          sizeof(*rxq->sw_desc),
 431                                          RTE_CACHE_LINE_SIZE, socket_id);
 432         if (rxq->sw_desc == NULL)
 433                 goto fail_desc_alloc;
 434
 435         /* efx datapath is bound to efx control path */
 436         rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
 437         if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
 438                 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
 439         rxq->ptr_mask = info->rxq_entries - 1;
 440         rxq->batch_max = info->batch_max;
 441         rxq->prefix_size = info->prefix_size;
 442         rxq->max_fill_level = info->max_fill_level;
 443         rxq->refill_threshold = info->refill_threshold;
 444         rxq->buf_size = info->buf_size;
 445         rxq->refill_mb_pool = info->refill_mb_pool;
 446
 447         *dp_rxqp = &rxq->dp;
 448         return 0;
 449
 450 fail_desc_alloc:
 451         rte_free(rxq);
 452
 453 fail_rxq_alloc:
 454         return rc;
 455 }
 456
 457 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
 458 static void
 459 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
 460 {
 461         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 462
 463         rte_free(rxq->sw_desc);
 464         rte_free(rxq);
 465 }
 466
 467 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
 468 static int
 469 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
 470                   __rte_unused unsigned int evq_read_ptr)
 471 {
 472         /* libefx-based datapath is specific to libefx-based PMD */
 473         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 474         struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
 475
 476         rxq->common = crxq->common;
 477
 478         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
 479
 480         sfc_efx_rx_qrefill(rxq);
 481
 482         rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
 483
 484         return 0;
 485 }
 486
 487 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
 488 static void
 489 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
 490                  __rte_unused unsigned int *evq_read_ptr)
 491 {
 492         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 493
 494         rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
 495
 496         /* libefx-based datapath is bound to libefx-based PMD and uses
 497          * event queue structure directly. So, there is no necessity to
 498          * return EvQ read pointer.
 499          */
 500 }
 501
 502 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
 503 static void
 504 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
 505 {
 506         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 507         unsigned int i;
 508         struct sfc_efx_rx_sw_desc *rxd;
 509
 510         for (i = rxq->completed; i != rxq->added; ++i) {
 511                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
 512                 rte_mbuf_raw_free(rxd->mbuf);
 513                 rxd->mbuf = NULL;
 514                 /* Packed stream relies on 0 in inactive SW desc.
 515                  * Rx queue stop is not performance critical, so
 516                  * there is no harm to do it always.
 517                  */
 518                 rxd->flags = 0;
 519                 rxd->size = 0;
 520         }
 521
 522         rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
 523 }
 524
 525 struct sfc_dp_rx sfc_efx_rx = {
 526         .dp = {
 527                 .name           = SFC_KVARG_DATAPATH_EFX,
 528                 .type           = SFC_DP_RX,
 529                 .hw_fw_caps     = 0,
 530         },
 531         .features               = SFC_DP_RX_FEAT_SCATTER |
 532                                   SFC_DP_RX_FEAT_CHECKSUM,
 533         .qsize_up_rings         = sfc_efx_rx_qsize_up_rings,
 534         .qcreate                = sfc_efx_rx_qcreate,
 535         .qdestroy               = sfc_efx_rx_qdestroy,
 536         .qstart                 = sfc_efx_rx_qstart,
 537         .qstop                  = sfc_efx_rx_qstop,
 538         .qpurge                 = sfc_efx_rx_qpurge,
 539         .supported_ptypes_get   = sfc_efx_supported_ptypes_get,
 540         .qdesc_npending         = sfc_efx_rx_qdesc_npending,
 541         .qdesc_status           = sfc_efx_rx_qdesc_status,
 542         .pkt_burst              = sfc_efx_recv_pkts,
 543 };
 544
 545 unsigned int
 546 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
 547 {
 548         struct sfc_rxq *rxq;
 549
 550         SFC_ASSERT(sw_index < sa->rxq_count);
 551         rxq = sa->rxq_info[sw_index].rxq;
 552
 553         if (rxq == NULL || (rxq->state & SFC_RXQ_STARTED) == 0)
 554                 return 0;
 555
 556         return sa->dp_rx->qdesc_npending(rxq->dp);
 557 }
 558
 559 int
 560 sfc_rx_qdesc_done(struct sfc_dp_rxq *dp_rxq, unsigned int offset)
 561 {
 562         struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq);
 563
 564         return offset < rxq->evq->sa->dp_rx->qdesc_npending(dp_rxq);
 565 }
 566
 567 static void
 568 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
 569 {
 570         struct sfc_rxq *rxq;
 571         unsigned int retry_count;
 572         unsigned int wait_count;
 573         int rc;
 574
 575         rxq = sa->rxq_info[sw_index].rxq;
 576         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
 577
 578         /*
 579          * Retry Rx queue flushing in the case of flush failed or
 580          * timeout. In the worst case it can delay for 6 seconds.
 581          */
 582         for (retry_count = 0;
 583              ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
 584              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
 585              ++retry_count) {
 586                 rc = efx_rx_qflush(rxq->common);
 587                 if (rc != 0) {
 588                         rxq->state |= (rc == EALREADY) ?
 589                                 SFC_RXQ_FLUSHED : SFC_RXQ_FLUSH_FAILED;
 590                         break;
 591                 }
 592                 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
 593                 rxq->state |= SFC_RXQ_FLUSHING;
 594
 595                 /*
 596                  * Wait for Rx queue flush done or failed event at least
 597                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
 598                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
 599                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
 600                  */
 601                 wait_count = 0;
 602                 do {
 603                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
 604                         sfc_ev_qpoll(rxq->evq);
 605                 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
 606                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
 607
 608                 if (rxq->state & SFC_RXQ_FLUSHING)
 609                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
 610
 611                 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
 612                         sfc_err(sa, "RxQ %u flush failed", sw_index);
 613
 614                 if (rxq->state & SFC_RXQ_FLUSHED)
 615                         sfc_notice(sa, "RxQ %u flushed", sw_index);
 616         }
 617
 618         sa->dp_rx->qpurge(rxq->dp);
 619 }
 620
 621 static int
 622 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
 623 {
 624         struct sfc_rss *rss = &sa->rss;
 625         boolean_t need_rss = (rss->channels > 0) ? B_TRUE : B_FALSE;
 626         struct sfc_port *port = &sa->port;
 627         int rc;
 628
 629         /*
 630          * If promiscuous or all-multicast mode has been requested, setting
 631          * filter for the default Rx queue might fail, in particular, while
 632          * running over PCI function which is not a member of corresponding
 633          * privilege groups; if this occurs, few iterations will be made to
 634          * repeat this step without promiscuous and all-multicast flags set
 635          */
 636 retry:
 637         rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, need_rss);
 638         if (rc == 0)
 639                 return 0;
 640         else if (rc != EOPNOTSUPP)
 641                 return rc;
 642
 643         if (port->promisc) {
 644                 sfc_warn(sa, "promiscuous mode has been requested, "
 645                              "but the HW rejects it");
 646                 sfc_warn(sa, "promiscuous mode will be disabled");
 647
 648                 port->promisc = B_FALSE;
 649                 rc = sfc_set_rx_mode(sa);
 650                 if (rc != 0)
 651                         return rc;
 652
 653                 goto retry;
 654         }
 655
 656         if (port->allmulti) {
 657                 sfc_warn(sa, "all-multicast mode has been requested, "
 658                              "but the HW rejects it");
 659                 sfc_warn(sa, "all-multicast mode will be disabled");
 660
 661                 port->allmulti = B_FALSE;
 662                 rc = sfc_set_rx_mode(sa);
 663                 if (rc != 0)
 664                         return rc;
 665
 666                 goto retry;
 667         }
 668
 669         return rc;
 670 }
 671
 672 int
 673 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
 674 {
 675         struct sfc_port *port = &sa->port;
 676         struct sfc_rxq_info *rxq_info;
 677         struct sfc_rxq *rxq;
 678         struct sfc_evq *evq;
 679         int rc;
 680
 681         sfc_log_init(sa, "sw_index=%u", sw_index);
 682
 683         SFC_ASSERT(sw_index < sa->rxq_count);
 684
 685         rxq_info = &sa->rxq_info[sw_index];
 686         rxq = rxq_info->rxq;
 687         SFC_ASSERT(rxq != NULL);
 688         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
 689
 690         evq = rxq->evq;
 691
 692         rc = sfc_ev_qstart(evq, sfc_evq_index_by_rxq_sw_index(sa, sw_index));
 693         if (rc != 0)
 694                 goto fail_ev_qstart;
 695
 696         switch (rxq_info->type) {
 697         case EFX_RXQ_TYPE_DEFAULT:
 698                 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
 699                         &rxq->mem, rxq_info->entries, 0 /* not used on EF10 */,
 700                         rxq_info->type_flags, evq->common, &rxq->common);
 701                 break;
 702         case EFX_RXQ_TYPE_ES_SUPER_BUFFER: {
 703                 struct rte_mempool *mp = rxq->refill_mb_pool;
 704                 struct rte_mempool_info mp_info;
 705
 706                 rc = rte_mempool_ops_get_info(mp, &mp_info);
 707                 if (rc != 0) {
 708                         /* Positive errno is used in the driver */
 709                         rc = -rc;
 710                         goto fail_mp_get_info;
 711                 }
 712                 if (mp_info.contig_block_size <= 0) {
 713                         rc = EINVAL;
 714                         goto fail_bad_contig_block_size;
 715                 }
 716                 rc = efx_rx_qcreate_es_super_buffer(sa->nic, rxq->hw_index, 0,
 717                         mp_info.contig_block_size, rxq->buf_size,
 718                         mp->header_size + mp->elt_size + mp->trailer_size,
 719                         sa->rxd_wait_timeout_ns,
 720                         &rxq->mem, rxq_info->entries, rxq_info->type_flags,
 721                         evq->common, &rxq->common);
 722                 break;
 723         }
 724         default:
 725                 rc = ENOTSUP;
 726         }
 727         if (rc != 0)
 728                 goto fail_rx_qcreate;
 729
 730         efx_rx_qenable(rxq->common);
 731
 732         rc = sa->dp_rx->qstart(rxq->dp, evq->read_ptr);
 733         if (rc != 0)
 734                 goto fail_dp_qstart;
 735
 736         rxq->state |= SFC_RXQ_STARTED;
 737
 738         if ((sw_index == 0) && !port->isolated) {
 739                 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
 740                 if (rc != 0)
 741                         goto fail_mac_filter_default_rxq_set;
 742         }
 743
 744         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 745         sa->eth_dev->data->rx_queue_state[sw_index] =
 746                 RTE_ETH_QUEUE_STATE_STARTED;
 747
 748         return 0;
 749
 750 fail_mac_filter_default_rxq_set:
 751         sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
 752
 753 fail_dp_qstart:
 754         sfc_rx_qflush(sa, sw_index);
 755
 756 fail_rx_qcreate:
 757 fail_bad_contig_block_size:
 758 fail_mp_get_info:
 759         sfc_ev_qstop(evq);
 760
 761 fail_ev_qstart:
 762         return rc;
 763 }
 764
 765 void
 766 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
 767 {
 768         struct sfc_rxq_info *rxq_info;
 769         struct sfc_rxq *rxq;
 770
 771         sfc_log_init(sa, "sw_index=%u", sw_index);
 772
 773         SFC_ASSERT(sw_index < sa->rxq_count);
 774
 775         rxq_info = &sa->rxq_info[sw_index];
 776         rxq = rxq_info->rxq;
 777
 778         if (rxq == NULL || rxq->state == SFC_RXQ_INITIALIZED)
 779                 return;
 780         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
 781
 782         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 783         sa->eth_dev->data->rx_queue_state[sw_index] =
 784                 RTE_ETH_QUEUE_STATE_STOPPED;
 785
 786         sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
 787
 788         if (sw_index == 0)
 789                 efx_mac_filter_default_rxq_clear(sa->nic);
 790
 791         sfc_rx_qflush(sa, sw_index);
 792
 793         rxq->state = SFC_RXQ_INITIALIZED;
 794
 795         efx_rx_qdestroy(rxq->common);
 796
 797         sfc_ev_qstop(rxq->evq);
 798 }
 799
 800 uint64_t
 801 sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa)
 802 {
 803         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 804         uint64_t caps = 0;
 805
 806         caps |= DEV_RX_OFFLOAD_JUMBO_FRAME;
 807
 808         if (sa->dp_rx->features & SFC_DP_RX_FEAT_CHECKSUM) {
 809                 caps |= DEV_RX_OFFLOAD_IPV4_CKSUM;
 810                 caps |= DEV_RX_OFFLOAD_UDP_CKSUM;
 811                 caps |= DEV_RX_OFFLOAD_TCP_CKSUM;
 812         }
 813
 814         if (encp->enc_tunnel_encapsulations_supported &&
 815             (sa->dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
 816                 caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 817
 818         return caps;
 819 }
 820
 821 uint64_t
 822 sfc_rx_get_queue_offload_caps(struct sfc_adapter *sa)
 823 {
 824         uint64_t caps = 0;
 825
 826         if (sa->dp_rx->features & SFC_DP_RX_FEAT_SCATTER)
 827                 caps |= DEV_RX_OFFLOAD_SCATTER;
 828
 829         return caps;
 830 }
 831
 832 static int
 833 sfc_rx_qcheck_conf(struct sfc_adapter *sa, unsigned int rxq_max_fill_level,
 834                    const struct rte_eth_rxconf *rx_conf,
 835                    __rte_unused uint64_t offloads)
 836 {
 837         int rc = 0;
 838
 839         if (rx_conf->rx_thresh.pthresh != 0 ||
 840             rx_conf->rx_thresh.hthresh != 0 ||
 841             rx_conf->rx_thresh.wthresh != 0) {
 842                 sfc_warn(sa,
 843                         "RxQ prefetch/host/writeback thresholds are not supported");
 844         }
 845
 846         if (rx_conf->rx_free_thresh > rxq_max_fill_level) {
 847                 sfc_err(sa,
 848                         "RxQ free threshold too large: %u vs maximum %u",
 849                         rx_conf->rx_free_thresh, rxq_max_fill_level);
 850                 rc = EINVAL;
 851         }
 852
 853         if (rx_conf->rx_drop_en == 0) {
 854                 sfc_err(sa, "RxQ drop disable is not supported");
 855                 rc = EINVAL;
 856         }
 857
 858         return rc;
 859 }
 860
 861 static unsigned int
 862 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
 863 {
 864         uint32_t data_off;
 865         uint32_t order;
 866
 867         /* The mbuf object itself is always cache line aligned */
 868         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
 869
 870         /* Data offset from mbuf object start */
 871         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
 872                 RTE_PKTMBUF_HEADROOM;
 873
 874         order = MIN(order, rte_bsf32(data_off));
 875
 876         return 1u << order;
 877 }
 878
 879 static uint16_t
 880 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
 881 {
 882         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 883         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
 884         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
 885         uint16_t buf_size;
 886         unsigned int buf_aligned;
 887         unsigned int start_alignment;
 888         unsigned int end_padding_alignment;
 889
 890         /* Below it is assumed that both alignments are power of 2 */
 891         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
 892         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
 893
 894         /*
 895          * mbuf is always cache line aligned, double-check
 896          * that it meets rx buffer start alignment requirements.
 897          */
 898
 899         /* Start from mbuf pool data room size */
 900         buf_size = rte_pktmbuf_data_room_size(mb_pool);
 901
 902         /* Remove headroom */
 903         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
 904                 sfc_err(sa,
 905                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
 906                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
 907                 return 0;
 908         }
 909         buf_size -= RTE_PKTMBUF_HEADROOM;
 910
 911         /* Calculate guaranteed data start alignment */
 912         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
 913
 914         /* Reserve space for start alignment */
 915         if (buf_aligned < nic_align_start) {
 916                 start_alignment = nic_align_start - buf_aligned;
 917                 if (buf_size <= start_alignment) {
 918                         sfc_err(sa,
 919                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
 920                                 mb_pool->name,
 921                                 rte_pktmbuf_data_room_size(mb_pool),
 922                                 RTE_PKTMBUF_HEADROOM, start_alignment);
 923                         return 0;
 924                 }
 925                 buf_aligned = nic_align_start;
 926                 buf_size -= start_alignment;
 927         } else {
 928                 start_alignment = 0;
 929         }
 930
 931         /* Make sure that end padding does not write beyond the buffer */
 932         if (buf_aligned < nic_align_end) {
 933                 /*
 934                  * Estimate space which can be lost. If guarnteed buffer
 935                  * size is odd, lost space is (nic_align_end - 1). More
 936                  * accurate formula is below.
 937                  */
 938                 end_padding_alignment = nic_align_end -
 939                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
 940                 if (buf_size <= end_padding_alignment) {
 941                         sfc_err(sa,
 942                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
 943                                 mb_pool->name,
 944                                 rte_pktmbuf_data_room_size(mb_pool),
 945                                 RTE_PKTMBUF_HEADROOM, start_alignment,
 946                                 end_padding_alignment);
 947                         return 0;
 948                 }
 949                 buf_size -= end_padding_alignment;
 950         } else {
 951                 /*
 952                  * Start is aligned the same or better than end,
 953                  * just align length.
 954                  */
 955                 buf_size = P2ALIGN(buf_size, nic_align_end);
 956         }
 957
 958         return buf_size;
 959 }
 960
 961 int
 962 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
 963              uint16_t nb_rx_desc, unsigned int socket_id,
 964              const struct rte_eth_rxconf *rx_conf,
 965              struct rte_mempool *mb_pool)
 966 {
 967         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 968         struct sfc_rss *rss = &sa->rss;
 969         int rc;
 970         unsigned int rxq_entries;
 971         unsigned int evq_entries;
 972         unsigned int rxq_max_fill_level;
 973         uint64_t offloads;
 974         uint16_t buf_size;
 975         struct sfc_rxq_info *rxq_info;
 976         struct sfc_evq *evq;
 977         struct sfc_rxq *rxq;
 978         struct sfc_dp_rx_qcreate_info info;
 979         const char *error;
 980
 981         rc = sa->dp_rx->qsize_up_rings(nb_rx_desc, mb_pool, &rxq_entries,
 982                                        &evq_entries, &rxq_max_fill_level);
 983         if (rc != 0)
 984                 goto fail_size_up_rings;
 985         SFC_ASSERT(rxq_entries >= EFX_RXQ_MINNDESCS);
 986         SFC_ASSERT(rxq_entries <= EFX_RXQ_MAXNDESCS);
 987         SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc);
 988
 989         offloads = rx_conf->offloads |
 990                 sa->eth_dev->data->dev_conf.rxmode.offloads;
 991         rc = sfc_rx_qcheck_conf(sa, rxq_max_fill_level, rx_conf, offloads);
 992         if (rc != 0)
 993                 goto fail_bad_conf;
 994
 995         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
 996         if (buf_size == 0) {
 997                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
 998                         sw_index);
 999                 rc = EINVAL;
1000                 goto fail_bad_conf;
1001         }
1002
1003         if (!sfc_rx_check_scatter(sa->port.pdu, buf_size,
1004                                   encp->enc_rx_prefix_size,
1005                                   (offloads & DEV_RX_OFFLOAD_SCATTER),
1006                                   &error)) {
1007                 sfc_err(sa, "RxQ %u MTU check failed: %s", sw_index, error);
1008                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
1009                         "PDU size %u plus Rx prefix %u bytes",
1010                         sw_index, buf_size, (unsigned int)sa->port.pdu,
1011                         encp->enc_rx_prefix_size);
1012                 rc = EINVAL;
1013                 goto fail_bad_conf;
1014         }
1015
1016         SFC_ASSERT(sw_index < sa->rxq_count);
1017         rxq_info = &sa->rxq_info[sw_index];
1018
1019         SFC_ASSERT(rxq_entries <= rxq_info->max_entries);
1020         rxq_info->entries = rxq_entries;
1021
1022         if (sa->dp_rx->dp.hw_fw_caps & SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER)
1023                 rxq_info->type = EFX_RXQ_TYPE_ES_SUPER_BUFFER;
1024         else
1025                 rxq_info->type = EFX_RXQ_TYPE_DEFAULT;
1026
1027         rxq_info->type_flags =
1028                 (offloads & DEV_RX_OFFLOAD_SCATTER) ?
1029                 EFX_RXQ_FLAG_SCATTER : EFX_RXQ_FLAG_NONE;
1030
1031         if ((encp->enc_tunnel_encapsulations_supported != 0) &&
1032             (sa->dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
1033                 rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
1034
1035         rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
1036                           evq_entries, socket_id, &evq);
1037         if (rc != 0)
1038                 goto fail_ev_qinit;
1039
1040         rc = ENOMEM;
1041         rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
1042                                  socket_id);
1043         if (rxq == NULL)
1044                 goto fail_rxq_alloc;
1045
1046         rxq_info->rxq = rxq;
1047
1048         rxq->evq = evq;
1049         rxq->hw_index = sw_index;
1050         rxq->refill_threshold =
1051                 RTE_MAX(rx_conf->rx_free_thresh, SFC_RX_REFILL_BULK);
1052         rxq->refill_mb_pool = mb_pool;
1053         rxq->buf_size = buf_size;
1054
1055         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
1056                            socket_id, &rxq->mem);
1057         if (rc != 0)
1058                 goto fail_dma_alloc;
1059
1060         memset(&info, 0, sizeof(info));
1061         info.refill_mb_pool = rxq->refill_mb_pool;
1062         info.max_fill_level = rxq_max_fill_level;
1063         info.refill_threshold = rxq->refill_threshold;
1064         info.buf_size = buf_size;
1065         info.batch_max = encp->enc_rx_batch_max;
1066         info.prefix_size = encp->enc_rx_prefix_size;
1067
1068         if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0)
1069                 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
1070
1071         info.rxq_entries = rxq_info->entries;
1072         info.rxq_hw_ring = rxq->mem.esm_base;
1073         info.evq_entries = evq_entries;
1074         info.evq_hw_ring = evq->mem.esm_base;
1075         info.hw_index = rxq->hw_index;
1076         info.mem_bar = sa->mem_bar.esb_base;
1077         info.vi_window_shift = encp->enc_vi_window_shift;
1078
1079         rc = sa->dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
1080                                 &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
1081                                 socket_id, &info, &rxq->dp);
1082         if (rc != 0)
1083                 goto fail_dp_rx_qcreate;
1084
1085         evq->dp_rxq = rxq->dp;
1086
1087         rxq->state = SFC_RXQ_INITIALIZED;
1088
1089         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
1090
1091         return 0;
1092
1093 fail_dp_rx_qcreate:
1094         sfc_dma_free(sa, &rxq->mem);
1095
1096 fail_dma_alloc:
1097         rxq_info->rxq = NULL;
1098         rte_free(rxq);
1099
1100 fail_rxq_alloc:
1101         sfc_ev_qfini(evq);
1102
1103 fail_ev_qinit:
1104         rxq_info->entries = 0;
1105
1106 fail_bad_conf:
1107 fail_size_up_rings:
1108         sfc_log_init(sa, "failed %d", rc);
1109         return rc;
1110 }
1111
1112 void
1113 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
1114 {
1115         struct sfc_rxq_info *rxq_info;
1116         struct sfc_rxq *rxq;
1117
1118         SFC_ASSERT(sw_index < sa->rxq_count);
1119         sa->eth_dev->data->rx_queues[sw_index] = NULL;
1120
1121         rxq_info = &sa->rxq_info[sw_index];
1122
1123         rxq = rxq_info->rxq;
1124         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
1125
1126         sa->dp_rx->qdestroy(rxq->dp);
1127         rxq->dp = NULL;
1128
1129         rxq_info->rxq = NULL;
1130         rxq_info->entries = 0;
1131
1132         sfc_dma_free(sa, &rxq->mem);
1133
1134         sfc_ev_qfini(rxq->evq);
1135         rxq->evq = NULL;
1136
1137         rte_free(rxq);
1138 }
1139
1140 /*
1141  * Mapping between RTE RSS hash functions and their EFX counterparts.
1142  */
1143 static const struct sfc_rss_hf_rte_to_efx sfc_rss_hf_map[] = {
1144         { ETH_RSS_NONFRAG_IPV4_TCP,
1145           EFX_RX_HASH(IPV4_TCP, 4TUPLE) },
1146         { ETH_RSS_NONFRAG_IPV4_UDP,
1147           EFX_RX_HASH(IPV4_UDP, 4TUPLE) },
1148         { ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX,
1149           EFX_RX_HASH(IPV6_TCP, 4TUPLE) },
1150         { ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_UDP_EX,
1151           EFX_RX_HASH(IPV6_UDP, 4TUPLE) },
1152         { ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER,
1153           EFX_RX_HASH(IPV4_TCP, 2TUPLE) | EFX_RX_HASH(IPV4_UDP, 2TUPLE) |
1154           EFX_RX_HASH(IPV4, 2TUPLE) },
1155         { ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_OTHER |
1156           ETH_RSS_IPV6_EX,
1157           EFX_RX_HASH(IPV6_TCP, 2TUPLE) | EFX_RX_HASH(IPV6_UDP, 2TUPLE) |
1158           EFX_RX_HASH(IPV6, 2TUPLE) }
1159 };
1160
1161 static efx_rx_hash_type_t
1162 sfc_rx_hash_types_mask_supp(efx_rx_hash_type_t hash_type,
1163                             unsigned int *hash_type_flags_supported,
1164                             unsigned int nb_hash_type_flags_supported)
1165 {
1166         efx_rx_hash_type_t hash_type_masked = 0;
1167         unsigned int i, j;
1168
1169         for (i = 0; i < nb_hash_type_flags_supported; ++i) {
1170                 unsigned int class_tuple_lbn[] = {
1171                         EFX_RX_CLASS_IPV4_TCP_LBN,
1172                         EFX_RX_CLASS_IPV4_UDP_LBN,
1173                         EFX_RX_CLASS_IPV4_LBN,
1174                         EFX_RX_CLASS_IPV6_TCP_LBN,
1175                         EFX_RX_CLASS_IPV6_UDP_LBN,
1176                         EFX_RX_CLASS_IPV6_LBN
1177                 };
1178
1179                 for (j = 0; j < RTE_DIM(class_tuple_lbn); ++j) {
1180                         unsigned int tuple_mask = EFX_RX_CLASS_HASH_4TUPLE;
1181                         unsigned int flag;
1182
1183                         tuple_mask <<= class_tuple_lbn[j];
1184                         flag = hash_type & tuple_mask;
1185
1186                         if (flag == hash_type_flags_supported[i])
1187                                 hash_type_masked |= flag;
1188                 }
1189         }
1190
1191         return hash_type_masked;
1192 }
1193
1194 int
1195 sfc_rx_hash_init(struct sfc_adapter *sa)
1196 {
1197         struct sfc_rss *rss = &sa->rss;
1198         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
1199         uint32_t alg_mask = encp->enc_rx_scale_hash_alg_mask;
1200         efx_rx_hash_alg_t alg;
1201         unsigned int flags_supp[EFX_RX_HASH_NFLAGS];
1202         unsigned int nb_flags_supp;
1203         struct sfc_rss_hf_rte_to_efx *hf_map;
1204         struct sfc_rss_hf_rte_to_efx *entry;
1205         efx_rx_hash_type_t efx_hash_types;
1206         unsigned int i;
1207         int rc;
1208
1209         if (alg_mask & (1U << EFX_RX_HASHALG_TOEPLITZ))
1210                 alg = EFX_RX_HASHALG_TOEPLITZ;
1211         else if (alg_mask & (1U << EFX_RX_HASHALG_PACKED_STREAM))
1212                 alg = EFX_RX_HASHALG_PACKED_STREAM;
1213         else
1214                 return EINVAL;
1215
1216         rc = efx_rx_scale_hash_flags_get(sa->nic, alg, flags_supp,
1217                                          RTE_DIM(flags_supp), &nb_flags_supp);
1218         if (rc != 0)
1219                 return rc;
1220
1221         hf_map = rte_calloc_socket("sfc-rss-hf-map",
1222                                    RTE_DIM(sfc_rss_hf_map),
1223                                    sizeof(*hf_map), 0, sa->socket_id);
1224         if (hf_map == NULL)
1225                 return ENOMEM;
1226
1227         entry = hf_map;
1228         efx_hash_types = 0;
1229         for (i = 0; i < RTE_DIM(sfc_rss_hf_map); ++i) {
1230                 efx_rx_hash_type_t ht;
1231
1232                 ht = sfc_rx_hash_types_mask_supp(sfc_rss_hf_map[i].efx,
1233                                                  flags_supp, nb_flags_supp);
1234                 if (ht != 0) {
1235                         entry->rte = sfc_rss_hf_map[i].rte;
1236                         entry->efx = ht;
1237                         efx_hash_types |= ht;
1238                         ++entry;
1239                 }
1240         }
1241
1242         rss->hash_alg = alg;
1243         rss->hf_map_nb_entries = (unsigned int)(entry - hf_map);
1244         rss->hf_map = hf_map;
1245         rss->hash_types = efx_hash_types;
1246
1247         return 0;
1248 }
1249
1250 void
1251 sfc_rx_hash_fini(struct sfc_adapter *sa)
1252 {
1253         struct sfc_rss *rss = &sa->rss;
1254
1255         rte_free(rss->hf_map);
1256 }
1257
1258 int
1259 sfc_rx_hf_rte_to_efx(struct sfc_adapter *sa, uint64_t rte,
1260                      efx_rx_hash_type_t *efx)
1261 {
1262         struct sfc_rss *rss = &sa->rss;
1263         efx_rx_hash_type_t hash_types = 0;
1264         unsigned int i;
1265
1266         for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1267                 uint64_t rte_mask = rss->hf_map[i].rte;
1268
1269                 if ((rte & rte_mask) != 0) {
1270                         rte &= ~rte_mask;
1271                         hash_types |= rss->hf_map[i].efx;
1272                 }
1273         }
1274
1275         if (rte != 0) {
1276                 sfc_err(sa, "unsupported hash functions requested");
1277                 return EINVAL;
1278         }
1279
1280         *efx = hash_types;
1281
1282         return 0;
1283 }
1284
1285 uint64_t
1286 sfc_rx_hf_efx_to_rte(struct sfc_adapter *sa, efx_rx_hash_type_t efx)
1287 {
1288         struct sfc_rss *rss = &sa->rss;
1289         uint64_t rte = 0;
1290         unsigned int i;
1291
1292         for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1293                 efx_rx_hash_type_t hash_type = rss->hf_map[i].efx;
1294
1295                 if ((efx & hash_type) == hash_type)
1296                         rte |= rss->hf_map[i].rte;
1297         }
1298
1299         return rte;
1300 }
1301
1302 static int
1303 sfc_rx_process_adv_conf_rss(struct sfc_adapter *sa,
1304                             struct rte_eth_rss_conf *conf)
1305 {
1306         struct sfc_rss *rss = &sa->rss;
1307         efx_rx_hash_type_t efx_hash_types = rss->hash_types;
1308         uint64_t rss_hf = sfc_rx_hf_efx_to_rte(sa, efx_hash_types);
1309         int rc;
1310
1311         if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) {
1312                 if ((conf->rss_hf != 0 && conf->rss_hf != rss_hf) ||
1313                     conf->rss_key != NULL)
1314                         return EINVAL;
1315         }
1316
1317         if (conf->rss_hf != 0) {
1318                 rc = sfc_rx_hf_rte_to_efx(sa, conf->rss_hf, &efx_hash_types);
1319                 if (rc != 0)
1320                         return rc;
1321         }
1322
1323         if (conf->rss_key != NULL) {
1324                 if (conf->rss_key_len != sizeof(rss->key)) {
1325                         sfc_err(sa, "RSS key size is wrong (should be %lu)",
1326                                 sizeof(rss->key));
1327                         return EINVAL;
1328                 }
1329                 rte_memcpy(rss->key, conf->rss_key, sizeof(rss->key));
1330         }
1331
1332         rss->hash_types = efx_hash_types;
1333
1334         return 0;
1335 }
1336
1337 static int
1338 sfc_rx_rss_config(struct sfc_adapter *sa)
1339 {
1340         struct sfc_rss *rss = &sa->rss;
1341         int rc = 0;
1342
1343         if (rss->channels > 0) {
1344                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1345                                            rss->hash_alg, rss->hash_types,
1346                                            B_TRUE);
1347                 if (rc != 0)
1348                         goto finish;
1349
1350                 rc = efx_rx_scale_key_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1351                                           rss->key, sizeof(rss->key));
1352                 if (rc != 0)
1353                         goto finish;
1354
1355                 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1356                                           rss->tbl, RTE_DIM(rss->tbl));
1357         }
1358
1359 finish:
1360         return rc;
1361 }
1362
1363 int
1364 sfc_rx_start(struct sfc_adapter *sa)
1365 {
1366         unsigned int sw_index;
1367         int rc;
1368
1369         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1370
1371         rc = efx_rx_init(sa->nic);
1372         if (rc != 0)
1373                 goto fail_rx_init;
1374
1375         rc = sfc_rx_rss_config(sa);
1376         if (rc != 0)
1377                 goto fail_rss_config;
1378
1379         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1380                 if (sa->rxq_info[sw_index].rxq != NULL &&
1381                     (!sa->rxq_info[sw_index].deferred_start ||
1382                      sa->rxq_info[sw_index].deferred_started)) {
1383                         rc = sfc_rx_qstart(sa, sw_index);
1384                         if (rc != 0)
1385                                 goto fail_rx_qstart;
1386                 }
1387         }
1388
1389         return 0;
1390
1391 fail_rx_qstart:
1392         while (sw_index-- > 0)
1393                 sfc_rx_qstop(sa, sw_index);
1394
1395 fail_rss_config:
1396         efx_rx_fini(sa->nic);
1397
1398 fail_rx_init:
1399         sfc_log_init(sa, "failed %d", rc);
1400         return rc;
1401 }
1402
1403 void
1404 sfc_rx_stop(struct sfc_adapter *sa)
1405 {
1406         unsigned int sw_index;
1407
1408         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1409
1410         sw_index = sa->rxq_count;
1411         while (sw_index-- > 0) {
1412                 if (sa->rxq_info[sw_index].rxq != NULL)
1413                         sfc_rx_qstop(sa, sw_index);
1414         }
1415
1416         efx_rx_fini(sa->nic);
1417 }
1418
1419 static int
1420 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1421 {
1422         struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
1423         unsigned int max_entries;
1424
1425         max_entries = EFX_RXQ_MAXNDESCS;
1426         SFC_ASSERT(rte_is_power_of_2(max_entries));
1427
1428         rxq_info->max_entries = max_entries;
1429
1430         return 0;
1431 }
1432
1433 static int
1434 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1435 {
1436         uint64_t offloads_supported = sfc_rx_get_dev_offload_caps(sa) |
1437                                       sfc_rx_get_queue_offload_caps(sa);
1438         struct sfc_rss *rss = &sa->rss;
1439         int rc = 0;
1440
1441         switch (rxmode->mq_mode) {
1442         case ETH_MQ_RX_NONE:
1443                 /* No special checks are required */
1444                 break;
1445         case ETH_MQ_RX_RSS:
1446                 if (rss->context_type == EFX_RX_SCALE_UNAVAILABLE) {
1447                         sfc_err(sa, "RSS is not available");
1448                         rc = EINVAL;
1449                 }
1450                 break;
1451         default:
1452                 sfc_err(sa, "Rx multi-queue mode %u not supported",
1453                         rxmode->mq_mode);
1454                 rc = EINVAL;
1455         }
1456
1457         /*
1458          * Requested offloads are validated against supported by ethdev,
1459          * so unsupported offloads cannot be added as the result of
1460          * below check.
1461          */
1462         if ((rxmode->offloads & DEV_RX_OFFLOAD_CHECKSUM) !=
1463             (offloads_supported & DEV_RX_OFFLOAD_CHECKSUM)) {
1464                 sfc_warn(sa, "Rx checksum offloads cannot be disabled - always on (IPv4/TCP/UDP)");
1465                 rxmode->offloads |= DEV_RX_OFFLOAD_CHECKSUM;
1466         }
1467
1468         if ((offloads_supported & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) &&
1469             (~rxmode->offloads & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) {
1470                 sfc_warn(sa, "Rx outer IPv4 checksum offload cannot be disabled - always on");
1471                 rxmode->offloads |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
1472         }
1473
1474         return rc;
1475 }
1476
1477 /**
1478  * Destroy excess queues that are no longer needed after reconfiguration
1479  * or complete close.
1480  */
1481 static void
1482 sfc_rx_fini_queues(struct sfc_adapter *sa, unsigned int nb_rx_queues)
1483 {
1484         int sw_index;
1485
1486         SFC_ASSERT(nb_rx_queues <= sa->rxq_count);
1487
1488         sw_index = sa->rxq_count;
1489         while (--sw_index >= (int)nb_rx_queues) {
1490                 if (sa->rxq_info[sw_index].rxq != NULL)
1491                         sfc_rx_qfini(sa, sw_index);
1492         }
1493
1494         sa->rxq_count = nb_rx_queues;
1495 }
1496
1497 /**
1498  * Initialize Rx subsystem.
1499  *
1500  * Called at device (re)configuration stage when number of receive queues is
1501  * specified together with other device level receive configuration.
1502  *
1503  * It should be used to allocate NUMA-unaware resources.
1504  */
1505 int
1506 sfc_rx_configure(struct sfc_adapter *sa)
1507 {
1508         struct sfc_rss *rss = &sa->rss;
1509         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1510         const unsigned int nb_rx_queues = sa->eth_dev->data->nb_rx_queues;
1511         int rc;
1512
1513         sfc_log_init(sa, "nb_rx_queues=%u (old %u)",
1514                      nb_rx_queues, sa->rxq_count);
1515
1516         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1517         if (rc != 0)
1518                 goto fail_check_mode;
1519
1520         if (nb_rx_queues == sa->rxq_count)
1521                 goto configure_rss;
1522
1523         if (sa->rxq_info == NULL) {
1524                 rc = ENOMEM;
1525                 sa->rxq_info = rte_calloc_socket("sfc-rxqs", nb_rx_queues,
1526                                                  sizeof(sa->rxq_info[0]), 0,
1527                                                  sa->socket_id);
1528                 if (sa->rxq_info == NULL)
1529                         goto fail_rxqs_alloc;
1530         } else {
1531                 struct sfc_rxq_info *new_rxq_info;
1532
1533                 if (nb_rx_queues < sa->rxq_count)
1534                         sfc_rx_fini_queues(sa, nb_rx_queues);
1535
1536                 rc = ENOMEM;
1537                 new_rxq_info =
1538                         rte_realloc(sa->rxq_info,
1539                                     nb_rx_queues * sizeof(sa->rxq_info[0]), 0);
1540                 if (new_rxq_info == NULL && nb_rx_queues > 0)
1541                         goto fail_rxqs_realloc;
1542
1543                 sa->rxq_info = new_rxq_info;
1544                 if (nb_rx_queues > sa->rxq_count)
1545                         memset(&sa->rxq_info[sa->rxq_count], 0,
1546                                (nb_rx_queues - sa->rxq_count) *
1547                                sizeof(sa->rxq_info[0]));
1548         }
1549
1550         while (sa->rxq_count < nb_rx_queues) {
1551                 rc = sfc_rx_qinit_info(sa, sa->rxq_count);
1552                 if (rc != 0)
1553                         goto fail_rx_qinit_info;
1554
1555                 sa->rxq_count++;
1556         }
1557
1558 configure_rss:
1559         rss->channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1560                          MIN(sa->rxq_count, EFX_MAXRSS) : 0;
1561
1562         if (rss->channels > 0) {
1563                 struct rte_eth_rss_conf *adv_conf_rss;
1564                 unsigned int sw_index;
1565
1566                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1567                         rss->tbl[sw_index] = sw_index % rss->channels;
1568
1569                 adv_conf_rss = &dev_conf->rx_adv_conf.rss_conf;
1570                 rc = sfc_rx_process_adv_conf_rss(sa, adv_conf_rss);
1571                 if (rc != 0)
1572                         goto fail_rx_process_adv_conf_rss;
1573         }
1574
1575         return 0;
1576
1577 fail_rx_process_adv_conf_rss:
1578 fail_rx_qinit_info:
1579 fail_rxqs_realloc:
1580 fail_rxqs_alloc:
1581         sfc_rx_close(sa);
1582
1583 fail_check_mode:
1584         sfc_log_init(sa, "failed %d", rc);
1585         return rc;
1586 }
1587
1588 /**
1589  * Shutdown Rx subsystem.
1590  *
1591  * Called at device close stage, for example, before device shutdown.
1592  */
1593 void
1594 sfc_rx_close(struct sfc_adapter *sa)
1595 {
1596         struct sfc_rss *rss = &sa->rss;
1597
1598         sfc_rx_fini_queues(sa, 0);
1599
1600         rss->channels = 0;
1601
1602         rte_free(sa->rxq_info);
1603         sa->rxq_info = NULL;
1604 }