kernel/linux/kni/ethtool/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*******************************************************************************
   3
   4   Intel(R) Gigabit Ethernet Linux driver
   5   Copyright(c) 2007-2013 Intel Corporation.
   6
   7   Contact Information:
   8   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
   9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  10
  11 *******************************************************************************/
  12
  13 #include <linux/module.h>
  14 #include <linux/types.h>
  15 #include <linux/init.h>
  16 #include <linux/vmalloc.h>
  17 #include <linux/pagemap.h>
  18 #include <linux/netdevice.h>
  19 #include <linux/tcp.h>
  20 #ifdef NETIF_F_TSO
  21 #include <net/checksum.h>
  22 #ifdef NETIF_F_TSO6
  23 #include <linux/ipv6.h>
  24 #include <net/ip6_checksum.h>
  25 #endif
  26 #endif
  27 #ifdef SIOCGMIIPHY
  28 #include <linux/mii.h>
  29 #endif
  30 #ifdef SIOCETHTOOL
  31 #include <linux/ethtool.h>
  32 #endif
  33 #include <linux/if_vlan.h>
  34 #ifdef CONFIG_PM_RUNTIME
  35 #include <linux/pm_runtime.h>
  36 #endif /* CONFIG_PM_RUNTIME */
  37
  38 #include <linux/if_bridge.h>
  39 #include "igb.h"
  40 #include "igb_vmdq.h"
  41
  42 #include <linux/uio_driver.h>
  43
  44 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  45 #define DRV_DEBUG "_debug"
  46 #else
  47 #define DRV_DEBUG
  48 #endif
  49 #define DRV_HW_PERF
  50 #define VERSION_SUFFIX
  51
  52 #define MAJ 5
  53 #define MIN 0
  54 #define BUILD 6
  55 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  56
  57 char igb_driver_name[] = "igb";
  58 char igb_driver_version[] = DRV_VERSION;
  59 static const char igb_driver_string[] =
  60                                 "Intel(R) Gigabit Ethernet Network Driver";
  61 static const char igb_copyright[] =
  62                                 "Copyright (c) 2007-2013 Intel Corporation.";
  63
  64 const struct pci_device_id igb_pci_tbl[] = {
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 100         /* required last entry */
 101         {0, }
 102 };
 103
 104 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 105 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 106 void igb_reset(struct igb_adapter *);
 107 static int igb_setup_all_tx_resources(struct igb_adapter *);
 108 static int igb_setup_all_rx_resources(struct igb_adapter *);
 109 static void igb_free_all_tx_resources(struct igb_adapter *);
 110 static void igb_free_all_rx_resources(struct igb_adapter *);
 111 static void igb_setup_mrqc(struct igb_adapter *);
 112 void igb_update_stats(struct igb_adapter *);
 113 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 114 static void __devexit igb_remove(struct pci_dev *pdev);
 115 static int igb_sw_init(struct igb_adapter *);
 116 static int igb_open(struct net_device *);
 117 static int igb_close(struct net_device *);
 118 static void igb_configure(struct igb_adapter *);
 119 static void igb_configure_tx(struct igb_adapter *);
 120 static void igb_configure_rx(struct igb_adapter *);
 121 static void igb_clean_all_tx_rings(struct igb_adapter *);
 122 static void igb_clean_all_rx_rings(struct igb_adapter *);
 123 static void igb_clean_tx_ring(struct igb_ring *);
 124 static void igb_set_rx_mode(struct net_device *);
 125 #ifdef HAVE_TIMER_SETUP
 126 static void igb_update_phy_info(struct timer_list *);
 127 static void igb_watchdog(struct timer_list *);
 128 #else
 129 static void igb_update_phy_info(unsigned long);
 130 static void igb_watchdog(unsigned long);
 131 #endif
 132 static void igb_watchdog_task(struct work_struct *);
 133 static void igb_dma_err_task(struct work_struct *);
 134 #ifdef HAVE_TIMER_SETUP
 135 static void igb_dma_err_timer(struct timer_list *);
 136 #else
 137 static void igb_dma_err_timer(unsigned long data);
 138 #endif
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static struct net_device_stats *igb_get_stats(struct net_device *);
 141 static int igb_change_mtu(struct net_device *, int);
 142 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *);
 155 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 #ifdef HAVE_VLAN_RX_REGISTER
 160 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 161 #endif
 162 #ifdef HAVE_VLAN_PROTOCOL
 163 static int igb_vlan_rx_add_vid(struct net_device *,
 164                                __be16 proto, u16);
 165 static int igb_vlan_rx_kill_vid(struct net_device *,
 166                                 __be16 proto, u16);
 167 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 168 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __always_unused __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __always_unused __be16 proto, u16);
 173 #else
 174 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 175 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 176 #endif
 177 #else
 178 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 179 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 180 #endif
 181 static void igb_restore_vlan(struct igb_adapter *);
 182 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 183 static void igb_ping_all_vfs(struct igb_adapter *);
 184 static void igb_msg_task(struct igb_adapter *);
 185 static void igb_vmm_control(struct igb_adapter *);
 186 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 187 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 188 static void igb_process_mdd_event(struct igb_adapter *);
 189 #ifdef IFLA_VF_MAX
 190 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 191 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 192 #ifdef HAVE_VF_VLAN_PROTO
 193                                 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 194 #else
 195                                 int vf, u16 vlan, u8 qos);
 196 #endif
 197 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 198 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 199                                 bool setting);
 200 #endif
 201 #ifdef HAVE_VF_MIN_MAX_TXRATE
 202 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 203 #else /* HAVE_VF_MIN_MAX_TXRATE */
 204 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 205 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 206 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 207                                  struct ifla_vf_info *ivi);
 208 static void igb_check_vf_rate_limit(struct igb_adapter *);
 209 #endif
 210 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 211 #ifdef CONFIG_PM
 212 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 213 static int igb_suspend(struct device *dev);
 214 static int igb_resume(struct device *dev);
 215 #ifdef CONFIG_PM_RUNTIME
 216 static int igb_runtime_suspend(struct device *dev);
 217 static int igb_runtime_resume(struct device *dev);
 218 static int igb_runtime_idle(struct device *dev);
 219 #endif /* CONFIG_PM_RUNTIME */
 220 static const struct dev_pm_ops igb_pm_ops = {
 221 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 222         .suspend = igb_suspend,
 223         .resume = igb_resume,
 224         .freeze = igb_suspend,
 225         .thaw = igb_resume,
 226         .poweroff = igb_suspend,
 227         .restore = igb_resume,
 228 #ifdef CONFIG_PM_RUNTIME
 229         .runtime_suspend = igb_runtime_suspend,
 230         .runtime_resume = igb_runtime_resume,
 231         .runtime_idle = igb_runtime_idle,
 232 #endif
 233 #else /* Linux >= 2.6.34 */
 234         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 235 #ifdef CONFIG_PM_RUNTIME
 236         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 237                         igb_runtime_idle)
 238 #endif /* CONFIG_PM_RUNTIME */
 239 #endif /* Linux version */
 240 };
 241 #else
 242 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 243 static int igb_resume(struct pci_dev *pdev);
 244 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 245 #endif /* CONFIG_PM */
 246 #ifndef USE_REBOOT_NOTIFIER
 247 static void igb_shutdown(struct pci_dev *);
 248 #else
 249 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 250 static struct notifier_block igb_notifier_reboot = {
 251         .notifier_call  = igb_notify_reboot,
 252         .next           = NULL,
 253         .priority       = 0
 254 };
 255 #endif
 256 #ifdef IGB_DCA
 257 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 258 static struct notifier_block dca_notifier = {
 259         .notifier_call  = igb_notify_dca,
 260         .next           = NULL,
 261         .priority       = 0
 262 };
 263 #endif
 264 #ifdef CONFIG_NET_POLL_CONTROLLER
 265 /* for netdump / net console */
 266 static void igb_netpoll(struct net_device *);
 267 #endif
 268
 269 #ifdef HAVE_PCI_ERS
 270 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 271                      pci_channel_state_t);
 272 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 273 static void igb_io_resume(struct pci_dev *);
 274
 275 static struct pci_error_handlers igb_err_handler = {
 276         .error_detected = igb_io_error_detected,
 277         .slot_reset = igb_io_slot_reset,
 278         .resume = igb_io_resume,
 279 };
 280 #endif
 281
 282 static void igb_init_fw(struct igb_adapter *adapter);
 283 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 284
 285 static struct pci_driver igb_driver = {
 286         .name     = igb_driver_name,
 287         .id_table = igb_pci_tbl,
 288         .probe    = igb_probe,
 289         .remove   = __devexit_p(igb_remove),
 290 #ifdef CONFIG_PM
 291 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 292         .driver.pm = &igb_pm_ops,
 293 #else
 294         .suspend  = igb_suspend,
 295         .resume   = igb_resume,
 296 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 297 #endif /* CONFIG_PM */
 298 #ifndef USE_REBOOT_NOTIFIER
 299         .shutdown = igb_shutdown,
 300 #endif
 301 #ifdef HAVE_PCI_ERS
 302         .err_handler = &igb_err_handler
 303 #endif
 304 };
 305
 306 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 307 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 308 //MODULE_LICENSE("GPL");
 309 //MODULE_VERSION(DRV_VERSION);
 310
 311 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 312 {
 313         struct e1000_hw *hw = &adapter->hw;
 314         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 315         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 316         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 317         u32 vfta;
 318
 319         /*
 320          * if this is the management vlan the only option is to add it in so
 321          * that the management pass through will continue to work
 322          */
 323         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 324             (vid == mng_cookie->vlan_id))
 325                 add = TRUE;
 326
 327         vfta = adapter->shadow_vfta[index];
 328
 329         if (add)
 330                 vfta |= mask;
 331         else
 332                 vfta &= ~mask;
 333
 334         e1000_write_vfta(hw, index, vfta);
 335         adapter->shadow_vfta[index] = vfta;
 336 }
 337
 338 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 339 //module_param(debug, int, 0);
 340 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 341
 342 /**
 343  * igb_init_module - Driver Registration Routine
 344  *
 345  * igb_init_module is the first routine called when the driver is
 346  * loaded. All it does is register with the PCI subsystem.
 347  **/
 348 static int __init igb_init_module(void)
 349 {
 350         int ret;
 351
 352         printk(KERN_INFO "%s - version %s\n",
 353                igb_driver_string, igb_driver_version);
 354
 355         printk(KERN_INFO "%s\n", igb_copyright);
 356 #ifdef IGB_HWMON
 357 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 358 #else
 359 #ifdef IGB_PROCFS
 360         if (igb_procfs_topdir_init())
 361                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 362 #endif /* IGB_PROCFS */
 363 #endif /* IGB_HWMON  */
 364
 365 #ifdef IGB_DCA
 366         dca_register_notify(&dca_notifier);
 367 #endif
 368         ret = pci_register_driver(&igb_driver);
 369 #ifdef USE_REBOOT_NOTIFIER
 370         if (ret >= 0) {
 371                 register_reboot_notifier(&igb_notifier_reboot);
 372         }
 373 #endif
 374         return ret;
 375 }
 376
 377 #undef module_init
 378 #define module_init(x) static int x(void)  __attribute__((__unused__));
 379 module_init(igb_init_module);
 380
 381 /**
 382  * igb_exit_module - Driver Exit Cleanup Routine
 383  *
 384  * igb_exit_module is called just before the driver is removed
 385  * from memory.
 386  **/
 387 static void __exit igb_exit_module(void)
 388 {
 389 #ifdef IGB_DCA
 390         dca_unregister_notify(&dca_notifier);
 391 #endif
 392 #ifdef USE_REBOOT_NOTIFIER
 393         unregister_reboot_notifier(&igb_notifier_reboot);
 394 #endif
 395         pci_unregister_driver(&igb_driver);
 396
 397 #ifdef IGB_HWMON
 398 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 399 #else
 400 #ifdef IGB_PROCFS
 401         igb_procfs_topdir_exit();
 402 #endif /* IGB_PROCFS */
 403 #endif /* IGB_HWMON */
 404 }
 405
 406 #undef module_exit
 407 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 408 module_exit(igb_exit_module);
 409
 410 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 411 /**
 412  * igb_cache_ring_register - Descriptor ring to register mapping
 413  * @adapter: board private structure to initialize
 414  *
 415  * Once we know the feature-set enabled for the device, we'll cache
 416  * the register offset the descriptor ring is assigned to.
 417  **/
 418 static void igb_cache_ring_register(struct igb_adapter *adapter)
 419 {
 420         int i = 0, j = 0;
 421         u32 rbase_offset = adapter->vfs_allocated_count;
 422
 423         switch (adapter->hw.mac.type) {
 424         case e1000_82576:
 425                 /* The queues are allocated for virtualization such that VF 0
 426                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 427                  * In order to avoid collision we start at the first free queue
 428                  * and continue consuming queues in the same sequence
 429                  */
 430                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 431                         for (; i < adapter->rss_queues; i++)
 432                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 433                                                                Q_IDX_82576(i);
 434                 }
 435         case e1000_82575:
 436         case e1000_82580:
 437         case e1000_i350:
 438         case e1000_i354:
 439         case e1000_i210:
 440         case e1000_i211:
 441         default:
 442                 for (; i < adapter->num_rx_queues; i++)
 443                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 444                 for (; j < adapter->num_tx_queues; j++)
 445                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 446                 break;
 447         }
 448 }
 449
 450 static void igb_configure_lli(struct igb_adapter *adapter)
 451 {
 452         struct e1000_hw *hw = &adapter->hw;
 453         u16 port;
 454
 455         /* LLI should only be enabled for MSI-X or MSI interrupts */
 456         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 457                 return;
 458
 459         if (adapter->lli_port) {
 460                 /* use filter 0 for port */
 461                 port = htons((u16)adapter->lli_port);
 462                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 463                         (port | E1000_IMIR_PORT_IM_EN));
 464                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 465                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 466         }
 467
 468         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 469                 /* use filter 1 for push flag */
 470                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 471                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 472                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 473                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 474         }
 475
 476         if (adapter->lli_size) {
 477                 /* use filter 2 for size */
 478                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 479                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 480                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 481                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 482         }
 483
 484 }
 485
 486 /**
 487  *  igb_write_ivar - configure ivar for given MSI-X vector
 488  *  @hw: pointer to the HW structure
 489  *  @msix_vector: vector number we are allocating to a given ring
 490  *  @index: row index of IVAR register to write within IVAR table
 491  *  @offset: column offset of in IVAR, should be multiple of 8
 492  *
 493  *  This function is intended to handle the writing of the IVAR register
 494  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 495  *  each containing an cause allocation for an Rx and Tx ring, and a
 496  *  variable number of rows depending on the number of queues supported.
 497  **/
 498 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 499                            int index, int offset)
 500 {
 501         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 502
 503         /* clear any bits that are currently set */
 504         ivar &= ~((u32)0xFF << offset);
 505
 506         /* write vector and valid bit */
 507         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 508
 509         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 510 }
 511
 512 #define IGB_N0_QUEUE -1
 513 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 514 {
 515         struct igb_adapter *adapter = q_vector->adapter;
 516         struct e1000_hw *hw = &adapter->hw;
 517         int rx_queue = IGB_N0_QUEUE;
 518         int tx_queue = IGB_N0_QUEUE;
 519         u32 msixbm = 0;
 520
 521         if (q_vector->rx.ring)
 522                 rx_queue = q_vector->rx.ring->reg_idx;
 523         if (q_vector->tx.ring)
 524                 tx_queue = q_vector->tx.ring->reg_idx;
 525
 526         switch (hw->mac.type) {
 527         case e1000_82575:
 528                 /* The 82575 assigns vectors using a bitmask, which matches the
 529                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 530                    or more queues to a vector, we write the appropriate bits
 531                    into the MSIXBM register for that vector. */
 532                 if (rx_queue > IGB_N0_QUEUE)
 533                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 534                 if (tx_queue > IGB_N0_QUEUE)
 535                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 536                 if (!adapter->msix_entries && msix_vector == 0)
 537                         msixbm |= E1000_EIMS_OTHER;
 538                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 539                 q_vector->eims_value = msixbm;
 540                 break;
 541         case e1000_82576:
 542                 /*
 543                  * 82576 uses a table that essentially consists of 2 columns
 544                  * with 8 rows.  The ordering is column-major so we use the
 545                  * lower 3 bits as the row index, and the 4th bit as the
 546                  * column offset.
 547                  */
 548                 if (rx_queue > IGB_N0_QUEUE)
 549                         igb_write_ivar(hw, msix_vector,
 550                                        rx_queue & 0x7,
 551                                        (rx_queue & 0x8) << 1);
 552                 if (tx_queue > IGB_N0_QUEUE)
 553                         igb_write_ivar(hw, msix_vector,
 554                                        tx_queue & 0x7,
 555                                        ((tx_queue & 0x8) << 1) + 8);
 556                 q_vector->eims_value = 1 << msix_vector;
 557                 break;
 558         case e1000_82580:
 559         case e1000_i350:
 560         case e1000_i354:
 561         case e1000_i210:
 562         case e1000_i211:
 563                 /*
 564                  * On 82580 and newer adapters the scheme is similar to 82576
 565                  * however instead of ordering column-major we have things
 566                  * ordered row-major.  So we traverse the table by using
 567                  * bit 0 as the column offset, and the remaining bits as the
 568                  * row index.
 569                  */
 570                 if (rx_queue > IGB_N0_QUEUE)
 571                         igb_write_ivar(hw, msix_vector,
 572                                        rx_queue >> 1,
 573                                        (rx_queue & 0x1) << 4);
 574                 if (tx_queue > IGB_N0_QUEUE)
 575                         igb_write_ivar(hw, msix_vector,
 576                                        tx_queue >> 1,
 577                                        ((tx_queue & 0x1) << 4) + 8);
 578                 q_vector->eims_value = 1 << msix_vector;
 579                 break;
 580         default:
 581                 BUG();
 582                 break;
 583         }
 584
 585         /* add q_vector eims value to global eims_enable_mask */
 586         adapter->eims_enable_mask |= q_vector->eims_value;
 587
 588         /* configure q_vector to set itr on first interrupt */
 589         q_vector->set_itr = 1;
 590 }
 591
 592 /**
 593  * igb_configure_msix - Configure MSI-X hardware
 594  *
 595  * igb_configure_msix sets up the hardware to properly
 596  * generate MSI-X interrupts.
 597  **/
 598 static void igb_configure_msix(struct igb_adapter *adapter)
 599 {
 600         u32 tmp;
 601         int i, vector = 0;
 602         struct e1000_hw *hw = &adapter->hw;
 603
 604         adapter->eims_enable_mask = 0;
 605
 606         /* set vector for other causes, i.e. link changes */
 607         switch (hw->mac.type) {
 608         case e1000_82575:
 609                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 610                 /* enable MSI-X PBA support*/
 611                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 612
 613                 /* Auto-Mask interrupts upon ICR read. */
 614                 tmp |= E1000_CTRL_EXT_EIAME;
 615                 tmp |= E1000_CTRL_EXT_IRCA;
 616
 617                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 618
 619                 /* enable msix_other interrupt */
 620                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 621                                       E1000_EIMS_OTHER);
 622                 adapter->eims_other = E1000_EIMS_OTHER;
 623
 624                 break;
 625
 626         case e1000_82576:
 627         case e1000_82580:
 628         case e1000_i350:
 629         case e1000_i354:
 630         case e1000_i210:
 631         case e1000_i211:
 632                 /* Turn on MSI-X capability first, or our settings
 633                  * won't stick.  And it will take days to debug. */
 634                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 635                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 636                                 E1000_GPIE_NSICR);
 637
 638                 /* enable msix_other interrupt */
 639                 adapter->eims_other = 1 << vector;
 640                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 641
 642                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 643                 break;
 644         default:
 645                 /* do nothing, since nothing else supports MSI-X */
 646                 break;
 647         } /* switch (hw->mac.type) */
 648
 649         adapter->eims_enable_mask |= adapter->eims_other;
 650
 651         for (i = 0; i < adapter->num_q_vectors; i++)
 652                 igb_assign_vector(adapter->q_vector[i], vector++);
 653
 654         E1000_WRITE_FLUSH(hw);
 655 }
 656
 657 /**
 658  * igb_request_msix - Initialize MSI-X interrupts
 659  *
 660  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 661  * kernel.
 662  **/
 663 static int igb_request_msix(struct igb_adapter *adapter)
 664 {
 665         struct net_device *netdev = adapter->netdev;
 666         struct e1000_hw *hw = &adapter->hw;
 667         int i, err = 0, vector = 0, free_vector = 0;
 668
 669         err = request_irq(adapter->msix_entries[vector].vector,
 670                           &igb_msix_other, 0, netdev->name, adapter);
 671         if (err)
 672                 goto err_out;
 673
 674         for (i = 0; i < adapter->num_q_vectors; i++) {
 675                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 676
 677                 vector++;
 678
 679                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 680
 681                 if (q_vector->rx.ring && q_vector->tx.ring)
 682                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 683                                 q_vector->rx.ring->queue_index);
 684                 else if (q_vector->tx.ring)
 685                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 686                                 q_vector->tx.ring->queue_index);
 687                 else if (q_vector->rx.ring)
 688                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 689                                 q_vector->rx.ring->queue_index);
 690                 else
 691                         sprintf(q_vector->name, "%s-unused", netdev->name);
 692
 693                 err = request_irq(adapter->msix_entries[vector].vector,
 694                                   igb_msix_ring, 0, q_vector->name,
 695                                   q_vector);
 696                 if (err)
 697                         goto err_free;
 698         }
 699
 700         igb_configure_msix(adapter);
 701         return 0;
 702
 703 err_free:
 704         /* free already assigned IRQs */
 705         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 706
 707         vector--;
 708         for (i = 0; i < vector; i++) {
 709                 free_irq(adapter->msix_entries[free_vector++].vector,
 710                          adapter->q_vector[i]);
 711         }
 712 err_out:
 713         return err;
 714 }
 715
 716 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 717 {
 718         if (adapter->msix_entries) {
 719                 pci_disable_msix(adapter->pdev);
 720                 kfree(adapter->msix_entries);
 721                 adapter->msix_entries = NULL;
 722         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 723                 pci_disable_msi(adapter->pdev);
 724         }
 725 }
 726
 727 /**
 728  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 729  * @adapter: board private structure to initialize
 730  * @v_idx: Index of vector to be freed
 731  *
 732  * This function frees the memory allocated to the q_vector.  In addition if
 733  * NAPI is enabled it will delete any references to the NAPI struct prior
 734  * to freeing the q_vector.
 735  **/
 736 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 737 {
 738         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 739
 740         if (q_vector->tx.ring)
 741                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 742
 743         if (q_vector->rx.ring)
 744                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 745
 746         adapter->q_vector[v_idx] = NULL;
 747         netif_napi_del(&q_vector->napi);
 748 #ifndef IGB_NO_LRO
 749         __skb_queue_purge(&q_vector->lrolist.active);
 750 #endif
 751         kfree(q_vector);
 752 }
 753
 754 /**
 755  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 756  * @adapter: board private structure to initialize
 757  *
 758  * This function frees the memory allocated to the q_vectors.  In addition if
 759  * NAPI is enabled it will delete any references to the NAPI struct prior
 760  * to freeing the q_vector.
 761  **/
 762 static void igb_free_q_vectors(struct igb_adapter *adapter)
 763 {
 764         int v_idx = adapter->num_q_vectors;
 765
 766         adapter->num_tx_queues = 0;
 767         adapter->num_rx_queues = 0;
 768         adapter->num_q_vectors = 0;
 769
 770         while (v_idx--)
 771                 igb_free_q_vector(adapter, v_idx);
 772 }
 773
 774 /**
 775  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 776  *
 777  * This function resets the device so that it has 0 rx queues, tx queues, and
 778  * MSI-X interrupts allocated.
 779  */
 780 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 781 {
 782         igb_free_q_vectors(adapter);
 783         igb_reset_interrupt_capability(adapter);
 784 }
 785
 786 /**
 787  * igb_process_mdd_event
 788  * @adapter - board private structure
 789  *
 790  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 791  */
 792 static void igb_process_mdd_event(struct igb_adapter *adapter)
 793 {
 794         struct e1000_hw *hw = &adapter->hw;
 795         u32 lvmmc, vfte, vfre, mdfb;
 796         u8 vf_queue;
 797
 798         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 799         vf_queue = lvmmc >> 29;
 800
 801         /* VF index cannot be bigger or equal to VFs allocated */
 802         if (vf_queue >= adapter->vfs_allocated_count)
 803                 return;
 804
 805         netdev_info(adapter->netdev,
 806                     "VF %d misbehaved. VF queues are disabled. "
 807                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 808
 809         /* Disable VFTE and VFRE related bits */
 810         vfte = E1000_READ_REG(hw, E1000_VFTE);
 811         vfte &= ~(1 << vf_queue);
 812         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 813
 814         vfre = E1000_READ_REG(hw, E1000_VFRE);
 815         vfre &= ~(1 << vf_queue);
 816         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 817
 818         /* Disable MDFB related bit. Clear on write */
 819         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 820         mdfb |= (1 << vf_queue);
 821         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 822
 823         /* Reset the specific VF */
 824         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 825 }
 826
 827 /**
 828  * igb_disable_mdd
 829  * @adapter - board private structure
 830  *
 831  * Disable MDD behavior in the HW
 832  **/
 833 static void igb_disable_mdd(struct igb_adapter *adapter)
 834 {
 835         struct e1000_hw *hw = &adapter->hw;
 836         u32 reg;
 837
 838         if ((hw->mac.type != e1000_i350) ||
 839             (hw->mac.type != e1000_i354))
 840                 return;
 841
 842         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 843         reg &= (~E1000_DTXCTL_MDP_EN);
 844         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 845 }
 846
 847 /**
 848  * igb_enable_mdd
 849  * @adapter - board private structure
 850  *
 851  * Enable the HW to detect malicious driver and sends an interrupt to
 852  * the driver.
 853  **/
 854 static void igb_enable_mdd(struct igb_adapter *adapter)
 855 {
 856         struct e1000_hw *hw = &adapter->hw;
 857         u32 reg;
 858
 859         /* Only available on i350 device */
 860         if (hw->mac.type != e1000_i350)
 861                 return;
 862
 863         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 864         reg |= E1000_DTXCTL_MDP_EN;
 865         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 866 }
 867
 868 /**
 869  * igb_reset_sriov_capability - disable SR-IOV if enabled
 870  *
 871  * Attempt to disable single root IO virtualization capabilites present in the
 872  * kernel.
 873  **/
 874 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 875 {
 876         struct pci_dev *pdev = adapter->pdev;
 877         struct e1000_hw *hw = &adapter->hw;
 878
 879         /* reclaim resources allocated to VFs */
 880         if (adapter->vf_data) {
 881                 if (!pci_vfs_assigned(pdev)) {
 882                         /*
 883                          * disable iov and allow time for transactions to
 884                          * clear
 885                          */
 886                         pci_disable_sriov(pdev);
 887                         msleep(500);
 888
 889                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 890                 } else {
 891                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 892                                         "VF(s) are assigned to guests!\n");
 893                 }
 894                 /* Disable Malicious Driver Detection */
 895                 igb_disable_mdd(adapter);
 896
 897                 /* free vf data storage */
 898                 kfree(adapter->vf_data);
 899                 adapter->vf_data = NULL;
 900
 901                 /* switch rings back to PF ownership */
 902                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 903                                 E1000_IOVCTL_REUSE_VFQ);
 904                 E1000_WRITE_FLUSH(hw);
 905                 msleep(100);
 906         }
 907
 908         adapter->vfs_allocated_count = 0;
 909 }
 910
 911 /**
 912  * igb_set_sriov_capability - setup SR-IOV if supported
 913  *
 914  * Attempt to enable single root IO virtualization capabilites present in the
 915  * kernel.
 916  **/
 917 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 918 {
 919         struct pci_dev *pdev = adapter->pdev;
 920         int old_vfs = 0;
 921         int i;
 922
 923         old_vfs = pci_num_vf(pdev);
 924         if (old_vfs) {
 925                 dev_info(pci_dev_to_dev(pdev),
 926                                 "%d pre-allocated VFs found - override "
 927                                 "max_vfs setting of %d\n", old_vfs,
 928                                 adapter->vfs_allocated_count);
 929                 adapter->vfs_allocated_count = old_vfs;
 930         }
 931         /* no VFs requested, do nothing */
 932         if (!adapter->vfs_allocated_count)
 933                 return;
 934
 935         /* allocate vf data storage */
 936         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 937                                    sizeof(struct vf_data_storage),
 938                                    GFP_KERNEL);
 939
 940         if (adapter->vf_data) {
 941                 if (!old_vfs) {
 942                         if (pci_enable_sriov(pdev,
 943                                         adapter->vfs_allocated_count))
 944                                 goto err_out;
 945                 }
 946                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 947                         igb_vf_configure(adapter, i);
 948
 949                 switch (adapter->hw.mac.type) {
 950                 case e1000_82576:
 951                 case e1000_i350:
 952                         /* Enable VM to VM loopback by default */
 953                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 954                         break;
 955                 default:
 956                         /* Currently no other hardware supports loopback */
 957                         break;
 958                 }
 959
 960                 /* DMA Coalescing is not supported in IOV mode. */
 961                 if (adapter->hw.mac.type >= e1000_i350)
 962                 adapter->dmac = IGB_DMAC_DISABLE;
 963                 if (adapter->hw.mac.type < e1000_i350)
 964                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 965                 return;
 966
 967         }
 968
 969 err_out:
 970         kfree(adapter->vf_data);
 971         adapter->vf_data = NULL;
 972         adapter->vfs_allocated_count = 0;
 973         dev_warn(pci_dev_to_dev(pdev),
 974                         "Failed to initialize SR-IOV virtualization\n");
 975 }
 976
 977 /**
 978  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 979  *
 980  * Attempt to configure interrupts using the best available
 981  * capabilities of the hardware and kernel.
 982  **/
 983 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 984 {
 985         struct pci_dev *pdev = adapter->pdev;
 986         int err;
 987         int numvecs, i;
 988
 989         if (!msix)
 990                 adapter->int_mode = IGB_INT_MODE_MSI;
 991
 992         /* Number of supported queues. */
 993         adapter->num_rx_queues = adapter->rss_queues;
 994
 995         if (adapter->vmdq_pools > 1)
 996                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
 997
 998 #ifdef HAVE_TX_MQ
 999         if (adapter->vmdq_pools)
1000                 adapter->num_tx_queues = adapter->vmdq_pools;
1001         else
1002                 adapter->num_tx_queues = adapter->num_rx_queues;
1003 #else
1004         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1005 #endif
1006
1007         switch (adapter->int_mode) {
1008         case IGB_INT_MODE_MSIX:
1009                 /* start with one vector for every rx queue */
1010                 numvecs = adapter->num_rx_queues;
1011
1012                 /* if tx handler is separate add 1 for every tx queue */
1013                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1014                         numvecs += adapter->num_tx_queues;
1015
1016                 /* store the number of vectors reserved for queues */
1017                 adapter->num_q_vectors = numvecs;
1018
1019                 /* add 1 vector for link status interrupts */
1020                 numvecs++;
1021                 adapter->msix_entries = kcalloc(numvecs,
1022                                                 sizeof(struct msix_entry),
1023                                                 GFP_KERNEL);
1024                 if (adapter->msix_entries) {
1025                         for (i = 0; i < numvecs; i++)
1026                                 adapter->msix_entries[i].entry = i;
1027
1028 #ifdef HAVE_PCI_ENABLE_MSIX
1029                         err = pci_enable_msix(pdev,
1030                                               adapter->msix_entries, numvecs);
1031 #else
1032                         err = pci_enable_msix_range(pdev,
1033                                         adapter->msix_entries,
1034                                         numvecs,
1035                                         numvecs);
1036 #endif
1037                         if (err == 0)
1038                                 break;
1039                 }
1040                 /* MSI-X failed, so fall through and try MSI */
1041                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1042                          "Falling back to MSI interrupts.\n");
1043                 igb_reset_interrupt_capability(adapter);
1044         case IGB_INT_MODE_MSI:
1045                 if (!pci_enable_msi(pdev))
1046                         adapter->flags |= IGB_FLAG_HAS_MSI;
1047                 else
1048                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1049                                  "interrupts.  Falling back to legacy "
1050                                  "interrupts.\n");
1051                 /* Fall through */
1052         case IGB_INT_MODE_LEGACY:
1053                 /* disable advanced features and set number of queues to 1 */
1054                 igb_reset_sriov_capability(adapter);
1055                 adapter->vmdq_pools = 0;
1056                 adapter->rss_queues = 1;
1057                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1058                 adapter->num_rx_queues = 1;
1059                 adapter->num_tx_queues = 1;
1060                 adapter->num_q_vectors = 1;
1061                 /* Don't do anything; this is system default */
1062                 break;
1063         }
1064 }
1065
1066 static void igb_add_ring(struct igb_ring *ring,
1067                          struct igb_ring_container *head)
1068 {
1069         head->ring = ring;
1070         head->count++;
1071 }
1072
1073 /**
1074  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1075  * @adapter: board private structure to initialize
1076  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1077  * @v_idx: index of vector in adapter struct
1078  * @txr_count: total number of Tx rings to allocate
1079  * @txr_idx: index of first Tx ring to allocate
1080  * @rxr_count: total number of Rx rings to allocate
1081  * @rxr_idx: index of first Rx ring to allocate
1082  *
1083  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1084  **/
1085 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1086                               unsigned int v_count, unsigned int v_idx,
1087                               unsigned int txr_count, unsigned int txr_idx,
1088                               unsigned int rxr_count, unsigned int rxr_idx)
1089 {
1090         struct igb_q_vector *q_vector;
1091         struct igb_ring *ring;
1092         int ring_count, size;
1093
1094         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1095         if (txr_count > 1 || rxr_count > 1)
1096                 return -ENOMEM;
1097
1098         ring_count = txr_count + rxr_count;
1099         size = sizeof(struct igb_q_vector) +
1100                (sizeof(struct igb_ring) * ring_count);
1101
1102         /* allocate q_vector and rings */
1103         q_vector = kzalloc(size, GFP_KERNEL);
1104         if (!q_vector)
1105                 return -ENOMEM;
1106
1107 #ifndef IGB_NO_LRO
1108         /* initialize LRO */
1109         __skb_queue_head_init(&q_vector->lrolist.active);
1110
1111 #endif
1112         /* initialize NAPI */
1113         netif_napi_add(adapter->netdev, &q_vector->napi,
1114                        igb_poll, 64);
1115
1116         /* tie q_vector and adapter together */
1117         adapter->q_vector[v_idx] = q_vector;
1118         q_vector->adapter = adapter;
1119
1120         /* initialize work limits */
1121         q_vector->tx.work_limit = adapter->tx_work_limit;
1122
1123         /* initialize ITR configuration */
1124         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1125         q_vector->itr_val = IGB_START_ITR;
1126
1127         /* initialize pointer to rings */
1128         ring = q_vector->ring;
1129
1130         /* initialize ITR */
1131         if (rxr_count) {
1132                 /* rx or rx/tx vector */
1133                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1134                         q_vector->itr_val = adapter->rx_itr_setting;
1135         } else {
1136                 /* tx only vector */
1137                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1138                         q_vector->itr_val = adapter->tx_itr_setting;
1139         }
1140
1141         if (txr_count) {
1142                 /* assign generic ring traits */
1143                 ring->dev = &adapter->pdev->dev;
1144                 ring->netdev = adapter->netdev;
1145
1146                 /* configure backlink on ring */
1147                 ring->q_vector = q_vector;
1148
1149                 /* update q_vector Tx values */
1150                 igb_add_ring(ring, &q_vector->tx);
1151
1152                 /* For 82575, context index must be unique per ring. */
1153                 if (adapter->hw.mac.type == e1000_82575)
1154                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1155
1156                 /* apply Tx specific ring traits */
1157                 ring->count = adapter->tx_ring_count;
1158                 ring->queue_index = txr_idx;
1159
1160                 /* assign ring to adapter */
1161                 adapter->tx_ring[txr_idx] = ring;
1162
1163                 /* push pointer to next ring */
1164                 ring++;
1165         }
1166
1167         if (rxr_count) {
1168                 /* assign generic ring traits */
1169                 ring->dev = &adapter->pdev->dev;
1170                 ring->netdev = adapter->netdev;
1171
1172                 /* configure backlink on ring */
1173                 ring->q_vector = q_vector;
1174
1175                 /* update q_vector Rx values */
1176                 igb_add_ring(ring, &q_vector->rx);
1177
1178 #ifndef HAVE_NDO_SET_FEATURES
1179                 /* enable rx checksum */
1180                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1181
1182 #endif
1183                 /* set flag indicating ring supports SCTP checksum offload */
1184                 if (adapter->hw.mac.type >= e1000_82576)
1185                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1186
1187                 if ((adapter->hw.mac.type == e1000_i350) ||
1188                     (adapter->hw.mac.type == e1000_i354))
1189                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1190
1191                 /* apply Rx specific ring traits */
1192                 ring->count = adapter->rx_ring_count;
1193                 ring->queue_index = rxr_idx;
1194
1195                 /* assign ring to adapter */
1196                 adapter->rx_ring[rxr_idx] = ring;
1197         }
1198
1199         return 0;
1200 }
1201
1202 /**
1203  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1204  * @adapter: board private structure to initialize
1205  *
1206  * We allocate one q_vector per queue interrupt.  If allocation fails we
1207  * return -ENOMEM.
1208  **/
1209 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1210 {
1211         int q_vectors = adapter->num_q_vectors;
1212         int rxr_remaining = adapter->num_rx_queues;
1213         int txr_remaining = adapter->num_tx_queues;
1214         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1215         int err;
1216
1217         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1218                 for (; rxr_remaining; v_idx++) {
1219                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1220                                                  0, 0, 1, rxr_idx);
1221
1222                         if (err)
1223                                 goto err_out;
1224
1225                         /* update counts and index */
1226                         rxr_remaining--;
1227                         rxr_idx++;
1228                 }
1229         }
1230
1231         for (; v_idx < q_vectors; v_idx++) {
1232                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1233                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1234                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1235                                          tqpv, txr_idx, rqpv, rxr_idx);
1236
1237                 if (err)
1238                         goto err_out;
1239
1240                 /* update counts and index */
1241                 rxr_remaining -= rqpv;
1242                 txr_remaining -= tqpv;
1243                 rxr_idx++;
1244                 txr_idx++;
1245         }
1246
1247         return 0;
1248
1249 err_out:
1250         adapter->num_tx_queues = 0;
1251         adapter->num_rx_queues = 0;
1252         adapter->num_q_vectors = 0;
1253
1254         while (v_idx--)
1255                 igb_free_q_vector(adapter, v_idx);
1256
1257         return -ENOMEM;
1258 }
1259
1260 /**
1261  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1262  *
1263  * This function initializes the interrupts and allocates all of the queues.
1264  **/
1265 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1266 {
1267         struct pci_dev *pdev = adapter->pdev;
1268         int err;
1269
1270         igb_set_interrupt_capability(adapter, msix);
1271
1272         err = igb_alloc_q_vectors(adapter);
1273         if (err) {
1274                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1275                 goto err_alloc_q_vectors;
1276         }
1277
1278         igb_cache_ring_register(adapter);
1279
1280         return 0;
1281
1282 err_alloc_q_vectors:
1283         igb_reset_interrupt_capability(adapter);
1284         return err;
1285 }
1286
1287 /**
1288  * igb_request_irq - initialize interrupts
1289  *
1290  * Attempts to configure interrupts using the best available
1291  * capabilities of the hardware and kernel.
1292  **/
1293 static int igb_request_irq(struct igb_adapter *adapter)
1294 {
1295         struct net_device *netdev = adapter->netdev;
1296         struct pci_dev *pdev = adapter->pdev;
1297         int err = 0;
1298
1299         if (adapter->msix_entries) {
1300                 err = igb_request_msix(adapter);
1301                 if (!err)
1302                         goto request_done;
1303                 /* fall back to MSI */
1304                 igb_free_all_tx_resources(adapter);
1305                 igb_free_all_rx_resources(adapter);
1306
1307                 igb_clear_interrupt_scheme(adapter);
1308                 igb_reset_sriov_capability(adapter);
1309                 err = igb_init_interrupt_scheme(adapter, false);
1310                 if (err)
1311                         goto request_done;
1312                 igb_setup_all_tx_resources(adapter);
1313                 igb_setup_all_rx_resources(adapter);
1314                 igb_configure(adapter);
1315         }
1316
1317         igb_assign_vector(adapter->q_vector[0], 0);
1318
1319         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1320                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1321                                   netdev->name, adapter);
1322                 if (!err)
1323                         goto request_done;
1324
1325                 /* fall back to legacy interrupts */
1326                 igb_reset_interrupt_capability(adapter);
1327                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1328         }
1329
1330         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1331                           netdev->name, adapter);
1332
1333         if (err)
1334                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1335                         err);
1336
1337 request_done:
1338         return err;
1339 }
1340
1341 static void igb_free_irq(struct igb_adapter *adapter)
1342 {
1343         if (adapter->msix_entries) {
1344                 int vector = 0, i;
1345
1346                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1347
1348                 for (i = 0; i < adapter->num_q_vectors; i++)
1349                         free_irq(adapter->msix_entries[vector++].vector,
1350                                  adapter->q_vector[i]);
1351         } else {
1352                 free_irq(adapter->pdev->irq, adapter);
1353         }
1354 }
1355
1356 /**
1357  * igb_irq_disable - Mask off interrupt generation on the NIC
1358  * @adapter: board private structure
1359  **/
1360 static void igb_irq_disable(struct igb_adapter *adapter)
1361 {
1362         struct e1000_hw *hw = &adapter->hw;
1363
1364         /*
1365          * we need to be careful when disabling interrupts.  The VFs are also
1366          * mapped into these registers and so clearing the bits can cause
1367          * issues on the VF drivers so we only need to clear what we set
1368          */
1369         if (adapter->msix_entries) {
1370                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1371                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1372                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1373                 regval = E1000_READ_REG(hw, E1000_EIAC);
1374                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1375         }
1376
1377         E1000_WRITE_REG(hw, E1000_IAM, 0);
1378         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1379         E1000_WRITE_FLUSH(hw);
1380
1381         if (adapter->msix_entries) {
1382                 int vector = 0, i;
1383
1384                 synchronize_irq(adapter->msix_entries[vector++].vector);
1385
1386                 for (i = 0; i < adapter->num_q_vectors; i++)
1387                         synchronize_irq(adapter->msix_entries[vector++].vector);
1388         } else {
1389                 synchronize_irq(adapter->pdev->irq);
1390         }
1391 }
1392
1393 /**
1394  * igb_irq_enable - Enable default interrupt generation settings
1395  * @adapter: board private structure
1396  **/
1397 static void igb_irq_enable(struct igb_adapter *adapter)
1398 {
1399         struct e1000_hw *hw = &adapter->hw;
1400
1401         if (adapter->msix_entries) {
1402                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1403                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1404                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1405                 regval = E1000_READ_REG(hw, E1000_EIAM);
1406                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1407                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1408                 if (adapter->vfs_allocated_count) {
1409                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1410                         ims |= E1000_IMS_VMMB;
1411                         if (adapter->mdd)
1412                                 if ((adapter->hw.mac.type == e1000_i350) ||
1413                                     (adapter->hw.mac.type == e1000_i354))
1414                                 ims |= E1000_IMS_MDDET;
1415                 }
1416                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1417         } else {
1418                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1419                                 E1000_IMS_DRSTA);
1420                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1421                                 E1000_IMS_DRSTA);
1422         }
1423 }
1424
1425 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1426 {
1427         struct e1000_hw *hw = &adapter->hw;
1428         u16 vid = adapter->hw.mng_cookie.vlan_id;
1429         u16 old_vid = adapter->mng_vlan_id;
1430
1431         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1432                 /* add VID to filter table */
1433                 igb_vfta_set(adapter, vid, TRUE);
1434                 adapter->mng_vlan_id = vid;
1435         } else {
1436                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1437         }
1438
1439         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1440             (vid != old_vid) &&
1441 #ifdef HAVE_VLAN_RX_REGISTER
1442             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1443 #else
1444             !test_bit(old_vid, adapter->active_vlans)) {
1445 #endif
1446                 /* remove VID from filter table */
1447                 igb_vfta_set(adapter, old_vid, FALSE);
1448         }
1449 }
1450
1451 /**
1452  * igb_release_hw_control - release control of the h/w to f/w
1453  * @adapter: address of board private structure
1454  *
1455  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1456  * For ASF and Pass Through versions of f/w this means that the
1457  * driver is no longer loaded.
1458  *
1459  **/
1460 static void igb_release_hw_control(struct igb_adapter *adapter)
1461 {
1462         struct e1000_hw *hw = &adapter->hw;
1463         u32 ctrl_ext;
1464
1465         /* Let firmware take over control of h/w */
1466         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1467         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1468                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1469 }
1470
1471 /**
1472  * igb_get_hw_control - get control of the h/w from f/w
1473  * @adapter: address of board private structure
1474  *
1475  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1476  * For ASF and Pass Through versions of f/w this means that
1477  * the driver is loaded.
1478  *
1479  **/
1480 static void igb_get_hw_control(struct igb_adapter *adapter)
1481 {
1482         struct e1000_hw *hw = &adapter->hw;
1483         u32 ctrl_ext;
1484
1485         /* Let firmware know the driver has taken over */
1486         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1487         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1488                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1489 }
1490
1491 /**
1492  * igb_configure - configure the hardware for RX and TX
1493  * @adapter: private board structure
1494  **/
1495 static void igb_configure(struct igb_adapter *adapter)
1496 {
1497         struct net_device *netdev = adapter->netdev;
1498         int i;
1499
1500         igb_get_hw_control(adapter);
1501         igb_set_rx_mode(netdev);
1502
1503         igb_restore_vlan(adapter);
1504
1505         igb_setup_tctl(adapter);
1506         igb_setup_mrqc(adapter);
1507         igb_setup_rctl(adapter);
1508
1509         igb_configure_tx(adapter);
1510         igb_configure_rx(adapter);
1511
1512         e1000_rx_fifo_flush_82575(&adapter->hw);
1513 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1514         if (adapter->num_tx_queues > 1)
1515                 netdev->features |= NETIF_F_MULTI_QUEUE;
1516         else
1517                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1518 #endif
1519
1520         /* call igb_desc_unused which always leaves
1521          * at least 1 descriptor unused to make sure
1522          * next_to_use != next_to_clean */
1523         for (i = 0; i < adapter->num_rx_queues; i++) {
1524                 struct igb_ring *ring = adapter->rx_ring[i];
1525                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1526         }
1527 }
1528
1529 /**
1530  * igb_power_up_link - Power up the phy/serdes link
1531  * @adapter: address of board private structure
1532  **/
1533 void igb_power_up_link(struct igb_adapter *adapter)
1534 {
1535         e1000_phy_hw_reset(&adapter->hw);
1536
1537         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1538                 e1000_power_up_phy(&adapter->hw);
1539         else
1540                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1541 }
1542
1543 /**
1544  * igb_power_down_link - Power down the phy/serdes link
1545  * @adapter: address of board private structure
1546  */
1547 static void igb_power_down_link(struct igb_adapter *adapter)
1548 {
1549         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1550                 e1000_power_down_phy(&adapter->hw);
1551         else
1552                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1553 }
1554
1555 /* Detect and switch function for Media Auto Sense */
1556 static void igb_check_swap_media(struct igb_adapter *adapter)
1557 {
1558         struct e1000_hw *hw = &adapter->hw;
1559         u32 ctrl_ext, connsw;
1560         bool swap_now = false;
1561         bool link;
1562
1563         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1564         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1565         link = igb_has_link(adapter);
1566         (void) link;
1567
1568         /* need to live swap if current media is copper and we have fiber/serdes
1569          * to go to.
1570          */
1571
1572         if ((hw->phy.media_type == e1000_media_type_copper) &&
1573             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1574                 swap_now = true;
1575         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1576                 /* copper signal takes time to appear */
1577                 if (adapter->copper_tries < 2) {
1578                         adapter->copper_tries++;
1579                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1580                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1581                         return;
1582                 } else {
1583                         adapter->copper_tries = 0;
1584                         if ((connsw & E1000_CONNSW_PHYSD) &&
1585                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1586                                 swap_now = true;
1587                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1588                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1589                         }
1590                 }
1591         }
1592
1593         if (swap_now) {
1594                 switch (hw->phy.media_type) {
1595                 case e1000_media_type_copper:
1596                         dev_info(pci_dev_to_dev(adapter->pdev),
1597                                  "%s:MAS: changing media to fiber/serdes\n",
1598                         adapter->netdev->name);
1599                         ctrl_ext |=
1600                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1601                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1602                         adapter->copper_tries = 0;
1603                         break;
1604                 case e1000_media_type_internal_serdes:
1605                 case e1000_media_type_fiber:
1606                         dev_info(pci_dev_to_dev(adapter->pdev),
1607                                  "%s:MAS: changing media to copper\n",
1608                                  adapter->netdev->name);
1609                         ctrl_ext &=
1610                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1611                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1612                         break;
1613                 default:
1614                         /* shouldn't get here during regular operation */
1615                         dev_err(pci_dev_to_dev(adapter->pdev),
1616                                 "%s:AMS: Invalid media type found, returning\n",
1617                                 adapter->netdev->name);
1618                         break;
1619                 }
1620                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1621         }
1622 }
1623
1624 #ifdef HAVE_I2C_SUPPORT
1625 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1626  *  @hw: pointer to hardware structure
1627  *  @i2cctl: Current value of I2CCTL register
1628  *
1629  *  Returns the I2C data bit value
1630  */
1631 static int igb_get_i2c_data(void *data)
1632 {
1633         struct igb_adapter *adapter = data;
1634         struct e1000_hw *hw = &adapter->hw;
1635         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1636
1637         return (i2cctl & E1000_I2C_DATA_IN) != 0;
1638 }
1639
1640 /* igb_set_i2c_data - Sets the I2C data bit
1641  *  @data: pointer to hardware structure
1642  *  @state: I2C data value (0 or 1) to set
1643  *
1644  *  Sets the I2C data bit
1645  */
1646 static void igb_set_i2c_data(void *data, int state)
1647 {
1648         struct igb_adapter *adapter = data;
1649         struct e1000_hw *hw = &adapter->hw;
1650         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1651
1652         if (state)
1653                 i2cctl |= E1000_I2C_DATA_OUT;
1654         else
1655                 i2cctl &= ~E1000_I2C_DATA_OUT;
1656
1657         i2cctl &= ~E1000_I2C_DATA_OE_N;
1658         i2cctl |= E1000_I2C_CLK_OE_N;
1659
1660         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1661         E1000_WRITE_FLUSH(hw);
1662
1663 }
1664
1665 /* igb_set_i2c_clk - Sets the I2C SCL clock
1666  *  @data: pointer to hardware structure
1667  *  @state: state to set clock
1668  *
1669  *  Sets the I2C clock line to state
1670  */
1671 static void igb_set_i2c_clk(void *data, int state)
1672 {
1673         struct igb_adapter *adapter = data;
1674         struct e1000_hw *hw = &adapter->hw;
1675         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1676
1677         if (state) {
1678                 i2cctl |= E1000_I2C_CLK_OUT;
1679                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1680         } else {
1681                 i2cctl &= ~E1000_I2C_CLK_OUT;
1682                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1683         }
1684         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1685         E1000_WRITE_FLUSH(hw);
1686 }
1687
1688 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1689  *  @data: pointer to hardware structure
1690  *
1691  *  Gets the I2C clock state
1692  */
1693 static int igb_get_i2c_clk(void *data)
1694 {
1695         struct igb_adapter *adapter = data;
1696         struct e1000_hw *hw = &adapter->hw;
1697         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1698
1699         return (i2cctl & E1000_I2C_CLK_IN) != 0;
1700 }
1701
1702 static const struct i2c_algo_bit_data igb_i2c_algo = {
1703         .setsda         = igb_set_i2c_data,
1704         .setscl         = igb_set_i2c_clk,
1705         .getsda         = igb_get_i2c_data,
1706         .getscl         = igb_get_i2c_clk,
1707         .udelay         = 5,
1708         .timeout        = 20,
1709 };
1710
1711 /*  igb_init_i2c - Init I2C interface
1712  *  @adapter: pointer to adapter structure
1713  *
1714  */
1715 static s32 igb_init_i2c(struct igb_adapter *adapter)
1716 {
1717         s32 status = E1000_SUCCESS;
1718
1719         /* I2C interface supported on i350 devices */
1720         if (adapter->hw.mac.type != e1000_i350)
1721                 return E1000_SUCCESS;
1722
1723         /* Initialize the i2c bus which is controlled by the registers.
1724          * This bus will use the i2c_algo_bit structue that implements
1725          * the protocol through toggling of the 4 bits in the register.
1726          */
1727         adapter->i2c_adap.owner = THIS_MODULE;
1728         adapter->i2c_algo = igb_i2c_algo;
1729         adapter->i2c_algo.data = adapter;
1730         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1731         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1732         strlcpy(adapter->i2c_adap.name, "igb BB",
1733                 sizeof(adapter->i2c_adap.name));
1734         status = i2c_bit_add_bus(&adapter->i2c_adap);
1735         return status;
1736 }
1737
1738 #endif /* HAVE_I2C_SUPPORT */
1739 /**
1740  * igb_up - Open the interface and prepare it to handle traffic
1741  * @adapter: board private structure
1742  **/
1743 int igb_up(struct igb_adapter *adapter)
1744 {
1745         struct e1000_hw *hw = &adapter->hw;
1746         int i;
1747
1748         /* hardware has been reset, we need to reload some things */
1749         igb_configure(adapter);
1750
1751         clear_bit(__IGB_DOWN, &adapter->state);
1752
1753         for (i = 0; i < adapter->num_q_vectors; i++)
1754                 napi_enable(&(adapter->q_vector[i]->napi));
1755
1756         if (adapter->msix_entries)
1757                 igb_configure_msix(adapter);
1758         else
1759                 igb_assign_vector(adapter->q_vector[0], 0);
1760
1761         igb_configure_lli(adapter);
1762
1763         /* Clear any pending interrupts. */
1764         E1000_READ_REG(hw, E1000_ICR);
1765         igb_irq_enable(adapter);
1766
1767         /* notify VFs that reset has been completed */
1768         if (adapter->vfs_allocated_count) {
1769                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1770                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1771                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1772         }
1773
1774         netif_tx_start_all_queues(adapter->netdev);
1775
1776         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1777                 schedule_work(&adapter->dma_err_task);
1778         /* start the watchdog. */
1779         hw->mac.get_link_status = 1;
1780         schedule_work(&adapter->watchdog_task);
1781
1782         if ((adapter->flags & IGB_FLAG_EEE) &&
1783             (!hw->dev_spec._82575.eee_disable))
1784                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1785
1786         return 0;
1787 }
1788
1789 void igb_down(struct igb_adapter *adapter)
1790 {
1791         struct net_device *netdev = adapter->netdev;
1792         struct e1000_hw *hw = &adapter->hw;
1793         u32 tctl, rctl;
1794         int i;
1795
1796         /* signal that we're down so the interrupt handler does not
1797          * reschedule our watchdog timer */
1798         set_bit(__IGB_DOWN, &adapter->state);
1799
1800         /* disable receives in the hardware */
1801         rctl = E1000_READ_REG(hw, E1000_RCTL);
1802         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1803         /* flush and sleep below */
1804
1805         netif_tx_stop_all_queues(netdev);
1806
1807         /* disable transmits in the hardware */
1808         tctl = E1000_READ_REG(hw, E1000_TCTL);
1809         tctl &= ~E1000_TCTL_EN;
1810         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1811         /* flush both disables and wait for them to finish */
1812         E1000_WRITE_FLUSH(hw);
1813         usleep_range(10000, 20000);
1814
1815         for (i = 0; i < adapter->num_q_vectors; i++)
1816                 napi_disable(&(adapter->q_vector[i]->napi));
1817
1818         igb_irq_disable(adapter);
1819
1820         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1821
1822         del_timer_sync(&adapter->watchdog_timer);
1823         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1824                 del_timer_sync(&adapter->dma_err_timer);
1825         del_timer_sync(&adapter->phy_info_timer);
1826
1827         netif_carrier_off(netdev);
1828
1829         /* record the stats before reset*/
1830         igb_update_stats(adapter);
1831
1832         adapter->link_speed = 0;
1833         adapter->link_duplex = 0;
1834
1835 #ifdef HAVE_PCI_ERS
1836         if (!pci_channel_offline(adapter->pdev))
1837                 igb_reset(adapter);
1838 #else
1839         igb_reset(adapter);
1840 #endif
1841         igb_clean_all_tx_rings(adapter);
1842         igb_clean_all_rx_rings(adapter);
1843 #ifdef IGB_DCA
1844         /* since we reset the hardware DCA settings were cleared */
1845         igb_setup_dca(adapter);
1846 #endif
1847 }
1848
1849 void igb_reinit_locked(struct igb_adapter *adapter)
1850 {
1851         WARN_ON(in_interrupt());
1852         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1853                 usleep_range(1000, 2000);
1854         igb_down(adapter);
1855         igb_up(adapter);
1856         clear_bit(__IGB_RESETTING, &adapter->state);
1857 }
1858
1859 /**
1860  * igb_enable_mas - Media Autosense re-enable after swap
1861  *
1862  * @adapter: adapter struct
1863  **/
1864 static s32  igb_enable_mas(struct igb_adapter *adapter)
1865 {
1866         struct e1000_hw *hw = &adapter->hw;
1867         u32 connsw;
1868         s32 ret_val = E1000_SUCCESS;
1869
1870         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1871         if (hw->phy.media_type == e1000_media_type_copper) {
1872                 /* configure for SerDes media detect */
1873                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1874                         connsw |= E1000_CONNSW_ENRGSRC;
1875                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1876                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1877                         E1000_WRITE_FLUSH(hw);
1878                 } else if (connsw & E1000_CONNSW_SERDESD) {
1879                         /* already SerDes, no need to enable anything */
1880                         return ret_val;
1881                 } else {
1882                         dev_info(pci_dev_to_dev(adapter->pdev),
1883                         "%s:MAS: Unable to configure feature, disabling..\n",
1884                         adapter->netdev->name);
1885                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1886                 }
1887         }
1888         return ret_val;
1889 }
1890
1891 void igb_reset(struct igb_adapter *adapter)
1892 {
1893         struct pci_dev *pdev = adapter->pdev;
1894         struct e1000_hw *hw = &adapter->hw;
1895         struct e1000_mac_info *mac = &hw->mac;
1896         struct e1000_fc_info *fc = &hw->fc;
1897         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1898
1899         /* Repartition Pba for greater than 9k mtu
1900          * To take effect CTRL.RST is required.
1901          */
1902         switch (mac->type) {
1903         case e1000_i350:
1904         case e1000_82580:
1905         case e1000_i354:
1906                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1907                 pba = e1000_rxpbs_adjust_82580(pba);
1908                 break;
1909         case e1000_82576:
1910                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1911                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1912                 break;
1913         case e1000_82575:
1914         case e1000_i210:
1915         case e1000_i211:
1916         default:
1917                 pba = E1000_PBA_34K;
1918                 break;
1919         }
1920
1921         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1922             (mac->type < e1000_82576)) {
1923                 /* adjust PBA for jumbo frames */
1924                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1925
1926                 /* To maintain wire speed transmits, the Tx FIFO should be
1927                  * large enough to accommodate two full transmit packets,
1928                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1929                  * the Rx FIFO should be large enough to accommodate at least
1930                  * one full receive packet and is similarly rounded up and
1931                  * expressed in KB. */
1932                 pba = E1000_READ_REG(hw, E1000_PBA);
1933                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1934                 tx_space = pba >> 16;
1935                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1936                 pba &= 0xffff;
1937                 /* the tx fifo also stores 16 bytes of information about the tx
1938                  * but don't include ethernet FCS because hardware appends it */
1939                 min_tx_space = (adapter->max_frame_size +
1940                                 sizeof(union e1000_adv_tx_desc) -
1941                                 ETH_FCS_LEN) * 2;
1942                 min_tx_space = ALIGN(min_tx_space, 1024);
1943                 min_tx_space >>= 10;
1944                 /* software strips receive CRC, so leave room for it */
1945                 min_rx_space = adapter->max_frame_size;
1946                 min_rx_space = ALIGN(min_rx_space, 1024);
1947                 min_rx_space >>= 10;
1948
1949                 /* If current Tx allocation is less than the min Tx FIFO size,
1950                  * and the min Tx FIFO size is less than the current Rx FIFO
1951                  * allocation, take space away from current Rx allocation */
1952                 if (tx_space < min_tx_space &&
1953                     ((min_tx_space - tx_space) < pba)) {
1954                         pba = pba - (min_tx_space - tx_space);
1955
1956                         /* if short on rx space, rx wins and must trump tx
1957                          * adjustment */
1958                         if (pba < min_rx_space)
1959                                 pba = min_rx_space;
1960                 }
1961                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1962         }
1963
1964         /* flow control settings */
1965         /* The high water mark must be low enough to fit one full frame
1966          * (or the size used for early receive) above it in the Rx FIFO.
1967          * Set it to the lower of:
1968          * - 90% of the Rx FIFO size, or
1969          * - the full Rx FIFO size minus one full frame */
1970         hwm = min(((pba << 10) * 9 / 10),
1971                         ((pba << 10) - 2 * adapter->max_frame_size));
1972
1973         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1974         fc->low_water = fc->high_water - 16;
1975         fc->pause_time = 0xFFFF;
1976         fc->send_xon = 1;
1977         fc->current_mode = fc->requested_mode;
1978
1979         /* disable receive for all VFs and wait one second */
1980         if (adapter->vfs_allocated_count) {
1981                 int i;
1982                 /*
1983                  * Clear all flags except indication that the PF has set
1984                  * the VF MAC addresses administratively
1985                  */
1986                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1987                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1988
1989                 /* ping all the active vfs to let them know we are going down */
1990                 igb_ping_all_vfs(adapter);
1991
1992                 /* disable transmits and receives */
1993                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1994                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1995         }
1996
1997         /* Allow time for pending master requests to run */
1998         e1000_reset_hw(hw);
1999         E1000_WRITE_REG(hw, E1000_WUC, 0);
2000
2001         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2002                 e1000_setup_init_funcs(hw, TRUE);
2003                 igb_check_options(adapter);
2004                 e1000_get_bus_info(hw);
2005                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2006         }
2007         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2008                 if (igb_enable_mas(adapter))
2009                         dev_err(pci_dev_to_dev(pdev),
2010                                 "Error enabling Media Auto Sense\n");
2011         }
2012         if (e1000_init_hw(hw))
2013                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2014
2015         /*
2016          * Flow control settings reset on hardware reset, so guarantee flow
2017          * control is off when forcing speed.
2018          */
2019         if (!hw->mac.autoneg)
2020                 e1000_force_mac_fc(hw);
2021
2022         igb_init_dmac(adapter, pba);
2023         /* Re-initialize the thermal sensor on i350 devices. */
2024         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2025                 /*
2026                  * If present, re-initialize the external thermal sensor
2027                  * interface.
2028                  */
2029                 if (adapter->ets)
2030                         e1000_set_i2c_bb(hw);
2031                 e1000_init_thermal_sensor_thresh(hw);
2032         }
2033
2034         /*Re-establish EEE setting */
2035         if (hw->phy.media_type == e1000_media_type_copper) {
2036                 switch (mac->type) {
2037                 case e1000_i350:
2038                 case e1000_i210:
2039                 case e1000_i211:
2040                         e1000_set_eee_i350(hw);
2041                         break;
2042                 case e1000_i354:
2043                         e1000_set_eee_i354(hw);
2044                         break;
2045                 default:
2046                         break;
2047                 }
2048         }
2049
2050         if (!netif_running(adapter->netdev))
2051                 igb_power_down_link(adapter);
2052
2053         igb_update_mng_vlan(adapter);
2054
2055         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2056         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2057
2058
2059 #ifdef HAVE_PTP_1588_CLOCK
2060         /* Re-enable PTP, where applicable. */
2061         igb_ptp_reset(adapter);
2062 #endif /* HAVE_PTP_1588_CLOCK */
2063
2064         e1000_get_phy_info(hw);
2065
2066         adapter->devrc++;
2067 }
2068
2069 #ifdef HAVE_NDO_SET_FEATURES
2070 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2071                                               kni_netdev_features_t features)
2072 {
2073         /*
2074          * Since there is no support for separate tx vlan accel
2075          * enabled make sure tx flag is cleared if rx is.
2076          */
2077 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2078         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2079                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2080 #else
2081         if (!(features & NETIF_F_HW_VLAN_RX))
2082                 features &= ~NETIF_F_HW_VLAN_TX;
2083 #endif
2084
2085         /* If Rx checksum is disabled, then LRO should also be disabled */
2086         if (!(features & NETIF_F_RXCSUM))
2087                 features &= ~NETIF_F_LRO;
2088
2089         return features;
2090 }
2091
2092 static int igb_set_features(struct net_device *netdev,
2093                             kni_netdev_features_t features)
2094 {
2095         u32 changed = netdev->features ^ features;
2096
2097 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2098         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2099 #else
2100         if (changed & NETIF_F_HW_VLAN_RX)
2101 #endif
2102                 igb_vlan_mode(netdev, features);
2103
2104         return 0;
2105 }
2106
2107 #ifdef NTF_SELF
2108 #ifdef USE_CONST_DEV_UC_CHAR
2109 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2110                            struct net_device *dev,
2111                            const unsigned char *addr,
2112 #ifdef HAVE_NDO_FDB_ADD_VID
2113                            u16 vid,
2114 #endif
2115                            u16 flags)
2116 #else
2117 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2118                            struct net_device *dev,
2119                            unsigned char *addr,
2120                            u16 flags)
2121 #endif
2122 {
2123         struct igb_adapter *adapter = netdev_priv(dev);
2124         struct e1000_hw *hw = &adapter->hw;
2125         int err;
2126
2127         if (!(adapter->vfs_allocated_count))
2128                 return -EOPNOTSUPP;
2129
2130         /* Hardware does not support aging addresses so if a
2131          * ndm_state is given only allow permanent addresses
2132          */
2133         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2134                 pr_info("%s: FDB only supports static addresses\n",
2135                         igb_driver_name);
2136                 return -EINVAL;
2137         }
2138
2139         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2140                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2141                                         (adapter->vfs_allocated_count + 1);
2142
2143                 if (netdev_uc_count(dev) < rar_uc_entries)
2144                         err = dev_uc_add_excl(dev, addr);
2145                 else
2146                         err = -ENOMEM;
2147         } else if (is_multicast_ether_addr(addr)) {
2148                 err = dev_mc_add_excl(dev, addr);
2149         } else {
2150                 err = -EINVAL;
2151         }
2152
2153         /* Only return duplicate errors if NLM_F_EXCL is set */
2154         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2155                 err = 0;
2156
2157         return err;
2158 }
2159
2160 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2161 #ifdef USE_CONST_DEV_UC_CHAR
2162 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2163                            struct net_device *dev,
2164                            const unsigned char *addr)
2165 #else
2166 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2167                            struct net_device *dev,
2168                            unsigned char *addr)
2169 #endif
2170 {
2171         struct igb_adapter *adapter = netdev_priv(dev);
2172         int err = -EOPNOTSUPP;
2173
2174         if (ndm->ndm_state & NUD_PERMANENT) {
2175                 pr_info("%s: FDB only supports static addresses\n",
2176                         igb_driver_name);
2177                 return -EINVAL;
2178         }
2179
2180         if (adapter->vfs_allocated_count) {
2181                 if (is_unicast_ether_addr(addr))
2182                         err = dev_uc_del(dev, addr);
2183                 else if (is_multicast_ether_addr(addr))
2184                         err = dev_mc_del(dev, addr);
2185                 else
2186                         err = -EINVAL;
2187         }
2188
2189         return err;
2190 }
2191
2192 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2193                             struct netlink_callback *cb,
2194                             struct net_device *dev,
2195                             int idx)
2196 {
2197         struct igb_adapter *adapter = netdev_priv(dev);
2198
2199         if (adapter->vfs_allocated_count)
2200                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2201
2202         return idx;
2203 }
2204 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2205
2206 #ifdef HAVE_BRIDGE_ATTRIBS
2207 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2208 static int igb_ndo_bridge_setlink(struct net_device *dev,
2209                                   struct nlmsghdr *nlh,
2210 #ifdef HAVE_NDO_BRIDGE_SETLINK_EXTACK
2211                                   u16 flags, struct netlink_ext_ack *extack)
2212 #else
2213                                   u16 flags)
2214 #endif
2215
2216 #else
2217 static int igb_ndo_bridge_setlink(struct net_device *dev,
2218                                   struct nlmsghdr *nlh)
2219 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2220 {
2221         struct igb_adapter *adapter = netdev_priv(dev);
2222         struct e1000_hw *hw = &adapter->hw;
2223         struct nlattr *attr, *br_spec;
2224         int rem;
2225
2226         if (!(adapter->vfs_allocated_count))
2227                 return -EOPNOTSUPP;
2228
2229         switch (adapter->hw.mac.type) {
2230         case e1000_82576:
2231         case e1000_i350:
2232         case e1000_i354:
2233                 break;
2234         default:
2235                 return -EOPNOTSUPP;
2236         }
2237
2238         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2239
2240         nla_for_each_nested(attr, br_spec, rem) {
2241                 __u16 mode;
2242
2243                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2244                         continue;
2245
2246                 mode = nla_get_u16(attr);
2247                 if (mode == BRIDGE_MODE_VEPA) {
2248                         e1000_vmdq_set_loopback_pf(hw, 0);
2249                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2250                 } else if (mode == BRIDGE_MODE_VEB) {
2251                         e1000_vmdq_set_loopback_pf(hw, 1);
2252                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2253                 } else
2254                         return -EINVAL;
2255
2256                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2257                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2258         }
2259
2260         return 0;
2261 }
2262
2263 #ifdef HAVE_BRIDGE_FILTER
2264 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2265 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2266                                   struct net_device *dev, u32 filter_mask,
2267                                   int nlflags)
2268 #else
2269 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2270                                   struct net_device *dev, u32 filter_mask)
2271 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2272 #else
2273 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2274                                   struct net_device *dev)
2275 #endif
2276 {
2277         struct igb_adapter *adapter = netdev_priv(dev);
2278         u16 mode;
2279
2280         if (!(adapter->vfs_allocated_count))
2281                 return -EOPNOTSUPP;
2282
2283         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2284                 mode = BRIDGE_MODE_VEB;
2285         else
2286                 mode = BRIDGE_MODE_VEPA;
2287
2288 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2289 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2290 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2291         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2292                                 nlflags, filter_mask, NULL);
2293 #else
2294         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2295 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2296 #else
2297         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2298 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2299 #else
2300         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2301 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2302 }
2303 #endif /* HAVE_BRIDGE_ATTRIBS */
2304 #endif /* NTF_SELF */
2305
2306 #endif /* HAVE_NDO_SET_FEATURES */
2307 #ifdef HAVE_NET_DEVICE_OPS
2308 static const struct net_device_ops igb_netdev_ops = {
2309         .ndo_open               = igb_open,
2310         .ndo_stop               = igb_close,
2311         .ndo_start_xmit         = igb_xmit_frame,
2312         .ndo_get_stats          = igb_get_stats,
2313         .ndo_set_rx_mode        = igb_set_rx_mode,
2314         .ndo_set_mac_address    = igb_set_mac,
2315         .ndo_change_mtu         = igb_change_mtu,
2316         .ndo_do_ioctl           = igb_ioctl,
2317         .ndo_tx_timeout         = igb_tx_timeout,
2318         .ndo_validate_addr      = eth_validate_addr,
2319         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2320         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2321 #ifdef IFLA_VF_MAX
2322         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2323         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2324 #ifdef HAVE_VF_MIN_MAX_TXRATE
2325         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2326 #else /* HAVE_VF_MIN_MAX_TXRATE */
2327         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2328 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2329         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2330 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2331         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2332 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2333 #endif /* IFLA_VF_MAX */
2334 #ifdef CONFIG_NET_POLL_CONTROLLER
2335         .ndo_poll_controller    = igb_netpoll,
2336 #endif
2337 #ifdef HAVE_NDO_SET_FEATURES
2338         .ndo_fix_features       = igb_fix_features,
2339         .ndo_set_features       = igb_set_features,
2340 #endif
2341 #ifdef HAVE_VLAN_RX_REGISTER
2342         .ndo_vlan_rx_register   = igb_vlan_mode,
2343 #endif
2344 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2345 #ifdef NTF_SELF
2346         .ndo_fdb_add            = igb_ndo_fdb_add,
2347 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2348         .ndo_fdb_del            = igb_ndo_fdb_del,
2349         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2350 #endif
2351 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2352 #ifdef HAVE_BRIDGE_ATTRIBS
2353         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2354         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2355 #endif /* HAVE_BRIDGE_ATTRIBS */
2356 #endif
2357 };
2358
2359 #ifdef CONFIG_IGB_VMDQ_NETDEV
2360 static const struct net_device_ops igb_vmdq_ops = {
2361         .ndo_open               = &igb_vmdq_open,
2362         .ndo_stop               = &igb_vmdq_close,
2363         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2364         .ndo_get_stats          = &igb_vmdq_get_stats,
2365         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2366         .ndo_validate_addr      = eth_validate_addr,
2367         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2368         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2369         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2370         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2371         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2372         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2373 };
2374
2375 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2376 #endif /* HAVE_NET_DEVICE_OPS */
2377 #ifdef CONFIG_IGB_VMDQ_NETDEV
2378 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2379 {
2380 #ifdef HAVE_NET_DEVICE_OPS
2381         vnetdev->netdev_ops = &igb_vmdq_ops;
2382 #else
2383         dev->open = &igb_vmdq_open;
2384         dev->stop = &igb_vmdq_close;
2385         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2386         dev->get_stats = &igb_vmdq_get_stats;
2387 #ifdef HAVE_SET_RX_MODE
2388         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2389 #endif
2390         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2391         dev->set_mac_address = &igb_vmdq_set_mac;
2392         dev->change_mtu = &igb_vmdq_change_mtu;
2393 #ifdef HAVE_TX_TIMEOUT
2394         dev->tx_timeout = &igb_vmdq_tx_timeout;
2395 #endif
2396 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2397         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2398         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2399         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2400 #endif
2401 #endif
2402         igb_vmdq_set_ethtool_ops(vnetdev);
2403         vnetdev->watchdog_timeo = 5 * HZ;
2404
2405 }
2406
2407 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2408 {
2409         int pool, err = 0, base_queue;
2410         struct net_device *vnetdev;
2411         struct igb_vmdq_adapter *vmdq_adapter;
2412
2413         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2414                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2415                 base_queue = pool * qpp;
2416                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2417                 if (!vnetdev) {
2418                         err = -ENOMEM;
2419                         break;
2420                 }
2421                 vmdq_adapter = netdev_priv(vnetdev);
2422                 vmdq_adapter->vnetdev = vnetdev;
2423                 vmdq_adapter->real_adapter = adapter;
2424                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2425                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2426                 igb_assign_vmdq_netdev_ops(vnetdev);
2427                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2428                          adapter->netdev->name, pool);
2429                 vnetdev->features = adapter->netdev->features;
2430 #ifdef HAVE_NETDEV_VLAN_FEATURES
2431                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2432 #endif
2433                 adapter->vmdq_netdev[pool-1] = vnetdev;
2434                 err = register_netdev(vnetdev);
2435                 if (err)
2436                         break;
2437         }
2438         return err;
2439 }
2440
2441 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2442 {
2443         int pool, err = 0;
2444
2445         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2446                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2447                 free_netdev(adapter->vmdq_netdev[pool-1]);
2448                 adapter->vmdq_netdev[pool-1] = NULL;
2449         }
2450         return err;
2451 }
2452 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2453
2454 /**
2455  * igb_set_fw_version - Configure version string for ethtool
2456  * @adapter: adapter struct
2457  *
2458  **/
2459 static void igb_set_fw_version(struct igb_adapter *adapter)
2460 {
2461         struct e1000_hw *hw = &adapter->hw;
2462         struct e1000_fw_version fw;
2463
2464         e1000_get_fw_version(hw, &fw);
2465
2466         switch (hw->mac.type) {
2467         case e1000_i210:
2468         case e1000_i211:
2469                 if (!(e1000_get_flash_presence_i210(hw))) {
2470                         snprintf(adapter->fw_version,
2471                             sizeof(adapter->fw_version),
2472                             "%2d.%2d-%d",
2473                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2474                         break;
2475                 }
2476                 /* fall through */
2477         default:
2478                 /* if option rom is valid, display its version too*/
2479                 if (fw.or_valid) {
2480                         snprintf(adapter->fw_version,
2481                             sizeof(adapter->fw_version),
2482                             "%d.%d, 0x%08x, %d.%d.%d",
2483                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2484                             fw.or_major, fw.or_build, fw.or_patch);
2485                 /* no option rom */
2486                 } else {
2487                         if (fw.etrack_id != 0X0000) {
2488                         snprintf(adapter->fw_version,
2489                             sizeof(adapter->fw_version),
2490                             "%d.%d, 0x%08x",
2491                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2492                         } else {
2493                         snprintf(adapter->fw_version,
2494                             sizeof(adapter->fw_version),
2495                             "%d.%d.%d",
2496                             fw.eep_major, fw.eep_minor, fw.eep_build);
2497                         }
2498                 }
2499                 break;
2500         }
2501
2502         return;
2503 }
2504
2505 /**
2506  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2507  *
2508  * @adapter: adapter struct
2509  **/
2510 static void igb_init_mas(struct igb_adapter *adapter)
2511 {
2512         struct e1000_hw *hw = &adapter->hw;
2513         u16 eeprom_data;
2514
2515         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2516         switch (hw->bus.func) {
2517         case E1000_FUNC_0:
2518                 if (eeprom_data & IGB_MAS_ENABLE_0)
2519                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2520                 break;
2521         case E1000_FUNC_1:
2522                 if (eeprom_data & IGB_MAS_ENABLE_1)
2523                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2524                 break;
2525         case E1000_FUNC_2:
2526                 if (eeprom_data & IGB_MAS_ENABLE_2)
2527                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2528                 break;
2529         case E1000_FUNC_3:
2530                 if (eeprom_data & IGB_MAS_ENABLE_3)
2531                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2532                 break;
2533         default:
2534                 /* Shouldn't get here */
2535                 dev_err(pci_dev_to_dev(adapter->pdev),
2536                         "%s:AMS: Invalid port configuration, returning\n",
2537                         adapter->netdev->name);
2538                 break;
2539         }
2540 }
2541
2542 /**
2543  * igb_probe - Device Initialization Routine
2544  * @pdev: PCI device information struct
2545  * @ent: entry in igb_pci_tbl
2546  *
2547  * Returns 0 on success, negative on failure
2548  *
2549  * igb_probe initializes an adapter identified by a pci_dev structure.
2550  * The OS initialization, configuring of the adapter private structure,
2551  * and a hardware reset occur.
2552  **/
2553 static int __devinit igb_probe(struct pci_dev *pdev,
2554                                const struct pci_device_id *ent)
2555 {
2556         struct net_device *netdev;
2557         struct igb_adapter *adapter;
2558         struct e1000_hw *hw;
2559         u16 eeprom_data = 0;
2560         u8 pba_str[E1000_PBANUM_LENGTH];
2561         s32 ret_val;
2562         static int global_quad_port_a; /* global quad port a indication */
2563         int i, err, pci_using_dac;
2564         static int cards_found;
2565
2566         err = pci_enable_device_mem(pdev);
2567         if (err)
2568                 return err;
2569
2570         pci_using_dac = 0;
2571         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2572         if (!err) {
2573                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2574                 if (!err)
2575                         pci_using_dac = 1;
2576         } else {
2577                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2578                 if (err) {
2579                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2580                         if (err) {
2581                                 IGB_ERR("No usable DMA configuration, "
2582                                         "aborting\n");
2583                                 goto err_dma;
2584                         }
2585                 }
2586         }
2587
2588 #ifndef HAVE_ASPM_QUIRKS
2589         /* 82575 requires that the pci-e link partner disable the L0s state */
2590         switch (pdev->device) {
2591         case E1000_DEV_ID_82575EB_COPPER:
2592         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2593         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2594                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2595         default:
2596                 break;
2597         }
2598
2599 #endif /* HAVE_ASPM_QUIRKS */
2600         err = pci_request_selected_regions(pdev,
2601                                            pci_select_bars(pdev,
2602                                                            IORESOURCE_MEM),
2603                                            igb_driver_name);
2604         if (err)
2605                 goto err_pci_reg;
2606
2607         pci_enable_pcie_error_reporting(pdev);
2608
2609         pci_set_master(pdev);
2610
2611         err = -ENOMEM;
2612 #ifdef HAVE_TX_MQ
2613         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2614                                    IGB_MAX_TX_QUEUES);
2615 #else
2616         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2617 #endif /* HAVE_TX_MQ */
2618         if (!netdev)
2619                 goto err_alloc_etherdev;
2620
2621         SET_MODULE_OWNER(netdev);
2622         SET_NETDEV_DEV(netdev, &pdev->dev);
2623
2624         pci_set_drvdata(pdev, netdev);
2625         adapter = netdev_priv(netdev);
2626         adapter->netdev = netdev;
2627         adapter->pdev = pdev;
2628         hw = &adapter->hw;
2629         hw->back = adapter;
2630         adapter->port_num = hw->bus.func;
2631         adapter->msg_enable = (1 << debug) - 1;
2632
2633 #ifdef HAVE_PCI_ERS
2634         err = pci_save_state(pdev);
2635         if (err)
2636                 goto err_ioremap;
2637 #endif
2638         err = -EIO;
2639         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2640                               pci_resource_len(pdev, 0));
2641         if (!hw->hw_addr)
2642                 goto err_ioremap;
2643
2644 #ifdef HAVE_NET_DEVICE_OPS
2645         netdev->netdev_ops = &igb_netdev_ops;
2646 #else /* HAVE_NET_DEVICE_OPS */
2647         netdev->open = &igb_open;
2648         netdev->stop = &igb_close;
2649         netdev->get_stats = &igb_get_stats;
2650 #ifdef HAVE_SET_RX_MODE
2651         netdev->set_rx_mode = &igb_set_rx_mode;
2652 #endif
2653         netdev->set_multicast_list = &igb_set_rx_mode;
2654         netdev->set_mac_address = &igb_set_mac;
2655         netdev->change_mtu = &igb_change_mtu;
2656         netdev->do_ioctl = &igb_ioctl;
2657 #ifdef HAVE_TX_TIMEOUT
2658         netdev->tx_timeout = &igb_tx_timeout;
2659 #endif
2660         netdev->vlan_rx_register = igb_vlan_mode;
2661         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2662         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2663 #ifdef CONFIG_NET_POLL_CONTROLLER
2664         netdev->poll_controller = igb_netpoll;
2665 #endif
2666         netdev->hard_start_xmit = &igb_xmit_frame;
2667 #endif /* HAVE_NET_DEVICE_OPS */
2668         igb_set_ethtool_ops(netdev);
2669 #ifdef HAVE_TX_TIMEOUT
2670         netdev->watchdog_timeo = 5 * HZ;
2671 #endif
2672
2673         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2674
2675         adapter->bd_number = cards_found;
2676
2677         /* setup the private structure */
2678         err = igb_sw_init(adapter);
2679         if (err)
2680                 goto err_sw_init;
2681
2682         e1000_get_bus_info(hw);
2683
2684         hw->phy.autoneg_wait_to_complete = FALSE;
2685         hw->mac.adaptive_ifs = FALSE;
2686
2687         /* Copper options */
2688         if (hw->phy.media_type == e1000_media_type_copper) {
2689                 hw->phy.mdix = AUTO_ALL_MODES;
2690                 hw->phy.disable_polarity_correction = FALSE;
2691                 hw->phy.ms_type = e1000_ms_hw_default;
2692         }
2693
2694         if (e1000_check_reset_block(hw))
2695                 dev_info(pci_dev_to_dev(pdev),
2696                         "PHY reset is blocked due to SOL/IDER session.\n");
2697
2698         /*
2699          * features is initialized to 0 in allocation, it might have bits
2700          * set by igb_sw_init so we should use an or instead of an
2701          * assignment.
2702          */
2703         netdev->features |= NETIF_F_SG |
2704                             NETIF_F_IP_CSUM |
2705 #ifdef NETIF_F_IPV6_CSUM
2706                             NETIF_F_IPV6_CSUM |
2707 #endif
2708 #ifdef NETIF_F_TSO
2709                             NETIF_F_TSO |
2710 #ifdef NETIF_F_TSO6
2711                             NETIF_F_TSO6 |
2712 #endif
2713 #endif /* NETIF_F_TSO */
2714 #ifdef NETIF_F_RXHASH
2715                             NETIF_F_RXHASH |
2716 #endif
2717                             NETIF_F_RXCSUM |
2718 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2719                             NETIF_F_HW_VLAN_CTAG_RX |
2720                             NETIF_F_HW_VLAN_CTAG_TX;
2721 #else
2722                             NETIF_F_HW_VLAN_RX |
2723                             NETIF_F_HW_VLAN_TX;
2724 #endif
2725
2726         if (hw->mac.type >= e1000_82576)
2727                 netdev->features |= NETIF_F_SCTP_CSUM;
2728
2729 #ifdef HAVE_NDO_SET_FEATURES
2730         /* copy netdev features into list of user selectable features */
2731         netdev->hw_features |= netdev->features;
2732 #ifndef IGB_NO_LRO
2733
2734         /* give us the option of enabling LRO later */
2735         netdev->hw_features |= NETIF_F_LRO;
2736 #endif
2737 #else
2738 #ifdef NETIF_F_GRO
2739
2740         /* this is only needed on kernels prior to 2.6.39 */
2741         netdev->features |= NETIF_F_GRO;
2742 #endif
2743 #endif
2744
2745         /* set this bit last since it cannot be part of hw_features */
2746 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2747         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2748 #else
2749         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2750 #endif
2751
2752 #ifdef HAVE_NETDEV_VLAN_FEATURES
2753         netdev->vlan_features |= NETIF_F_TSO |
2754                                  NETIF_F_TSO6 |
2755                                  NETIF_F_IP_CSUM |
2756                                  NETIF_F_IPV6_CSUM |
2757                                  NETIF_F_SG;
2758
2759 #endif
2760         if (pci_using_dac)
2761                 netdev->features |= NETIF_F_HIGHDMA;
2762
2763         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2764 #ifdef DEBUG
2765         if (adapter->dmac != IGB_DMAC_DISABLE)
2766                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2767 #endif
2768
2769         /* before reading the NVM, reset the controller to put the device in a
2770          * known good starting state */
2771         e1000_reset_hw(hw);
2772
2773         /* make sure the NVM is good */
2774         if (e1000_validate_nvm_checksum(hw) < 0) {
2775                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2776                         " Valid\n");
2777                 err = -EIO;
2778                 goto err_eeprom;
2779         }
2780
2781         /* copy the MAC address out of the NVM */
2782         if (e1000_read_mac_addr(hw))
2783                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2784         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2785 #ifdef ETHTOOL_GPERMADDR
2786         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2787
2788         if (!is_valid_ether_addr(netdev->perm_addr)) {
2789 #else
2790         if (!is_valid_ether_addr(netdev->dev_addr)) {
2791 #endif
2792                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2793                 err = -EIO;
2794                 goto err_eeprom;
2795         }
2796
2797         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2798         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2799         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2800         igb_rar_set(adapter, 0);
2801
2802         /* get firmware version for ethtool -i */
2803         igb_set_fw_version(adapter);
2804
2805         /* Check if Media Autosense is enabled */
2806         if (hw->mac.type == e1000_82580)
2807                 igb_init_mas(adapter);
2808 #ifdef HAVE_TIMER_SETUP
2809         timer_setup(&adapter->watchdog_timer, &igb_watchdog, 0);
2810         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2811                 timer_setup(&adapter->dma_err_timer, &igb_dma_err_timer, 0);
2812         timer_setup(&adapter->phy_info_timer, &igb_update_phy_info, 0);
2813 #else
2814         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2815                     (unsigned long) adapter);
2816         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2817                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2818                             (unsigned long) adapter);
2819         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2820                     (unsigned long) adapter);
2821 #endif
2822
2823         INIT_WORK(&adapter->reset_task, igb_reset_task);
2824         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2825         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2826                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2827
2828         /* Initialize link properties that are user-changeable */
2829         adapter->fc_autoneg = true;
2830         hw->mac.autoneg = true;
2831         hw->phy.autoneg_advertised = 0x2f;
2832
2833         hw->fc.requested_mode = e1000_fc_default;
2834         hw->fc.current_mode = e1000_fc_default;
2835
2836         e1000_validate_mdi_setting(hw);
2837
2838         /* By default, support wake on port A */
2839         if (hw->bus.func == 0)
2840                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2841
2842         /* Check the NVM for wake support for non-port A ports */
2843         if (hw->mac.type >= e1000_82580)
2844                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2845                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2846                                  &eeprom_data);
2847         else if (hw->bus.func == 1)
2848                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2849
2850         if (eeprom_data & IGB_EEPROM_APME)
2851                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2852
2853         /* now that we have the eeprom settings, apply the special cases where
2854          * the eeprom may be wrong or the board simply won't support wake on
2855          * lan on a particular port */
2856         switch (pdev->device) {
2857         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2858                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2859                 break;
2860         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2861         case E1000_DEV_ID_82576_FIBER:
2862         case E1000_DEV_ID_82576_SERDES:
2863                 /* Wake events only supported on port A for dual fiber
2864                  * regardless of eeprom setting */
2865                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2866                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2867                 break;
2868         case E1000_DEV_ID_82576_QUAD_COPPER:
2869         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2870                 /* if quad port adapter, disable WoL on all but port A */
2871                 if (global_quad_port_a != 0)
2872                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2873                 else
2874                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2875                 /* Reset for multiple quad port adapters */
2876                 if (++global_quad_port_a == 4)
2877                         global_quad_port_a = 0;
2878                 break;
2879         default:
2880                 /* If the device can't wake, don't set software support */
2881                 if (!device_can_wakeup(&adapter->pdev->dev))
2882                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2883                 break;
2884         }
2885
2886         /* initialize the wol settings based on the eeprom settings */
2887         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2888                 adapter->wol |= E1000_WUFC_MAG;
2889
2890         /* Some vendors want WoL disabled by default, but still supported */
2891         if ((hw->mac.type == e1000_i350) &&
2892             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2893                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2894                 adapter->wol = 0;
2895         }
2896
2897         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2898                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2899
2900         /* reset the hardware with the new settings */
2901         igb_reset(adapter);
2902         adapter->devrc = 0;
2903
2904 #ifdef HAVE_I2C_SUPPORT
2905         /* Init the I2C interface */
2906         err = igb_init_i2c(adapter);
2907         if (err) {
2908                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2909                 goto err_eeprom;
2910         }
2911 #endif /* HAVE_I2C_SUPPORT */
2912
2913         /* let the f/w know that the h/w is now under the control of the
2914          * driver. */
2915         igb_get_hw_control(adapter);
2916
2917         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2918         err = register_netdev(netdev);
2919         if (err)
2920                 goto err_register;
2921
2922 #ifdef CONFIG_IGB_VMDQ_NETDEV
2923         err = igb_init_vmdq_netdevs(adapter);
2924         if (err)
2925                 goto err_register;
2926 #endif
2927         /* carrier off reporting is important to ethtool even BEFORE open */
2928         netif_carrier_off(netdev);
2929
2930 #ifdef IGB_DCA
2931         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2932                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2933                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2934                 igb_setup_dca(adapter);
2935         }
2936
2937 #endif
2938 #ifdef HAVE_PTP_1588_CLOCK
2939         /* do hw tstamp init after resetting */
2940         igb_ptp_init(adapter);
2941 #endif /* HAVE_PTP_1588_CLOCK */
2942
2943         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2944         /* print bus type/speed/width info */
2945         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2946                  netdev->name,
2947                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2948                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2949                   (hw->mac.type == e1000_i354) ? "integrated" :
2950                                                             "unknown"),
2951                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2952                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2953                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2954                   (hw->mac.type == e1000_i354) ? "integrated" :
2955                    "unknown"));
2956         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2957         for (i = 0; i < 6; i++)
2958                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2959
2960         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2961         if (ret_val)
2962                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2963         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2964                  pba_str);
2965
2966
2967         /* Initialize the thermal sensor on i350 devices. */
2968         if (hw->mac.type == e1000_i350) {
2969                 if (hw->bus.func == 0) {
2970                         u16 ets_word;
2971
2972                         /*
2973                          * Read the NVM to determine if this i350 device
2974                          * supports an external thermal sensor.
2975                          */
2976                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2977                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2978                                 adapter->ets = true;
2979                         else
2980                                 adapter->ets = false;
2981                 }
2982 #ifdef IGB_HWMON
2983
2984                 igb_sysfs_init(adapter);
2985 #else
2986 #ifdef IGB_PROCFS
2987
2988                 igb_procfs_init(adapter);
2989 #endif /* IGB_PROCFS */
2990 #endif /* IGB_HWMON */
2991         } else {
2992                 adapter->ets = false;
2993         }
2994
2995         if (hw->phy.media_type == e1000_media_type_copper) {
2996                 switch (hw->mac.type) {
2997                 case e1000_i350:
2998                 case e1000_i210:
2999                 case e1000_i211:
3000                         /* Enable EEE for internal copper PHY devices */
3001                         err = e1000_set_eee_i350(hw);
3002                         if (!err &&
3003                             (adapter->flags & IGB_FLAG_EEE))
3004                                 adapter->eee_advert =
3005                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3006                         break;
3007                 case e1000_i354:
3008                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
3009                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3010                                 err = e1000_set_eee_i354(hw);
3011                                 if ((!err) &&
3012                                     (adapter->flags & IGB_FLAG_EEE))
3013                                         adapter->eee_advert =
3014                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3015                         }
3016                         break;
3017                 default:
3018                         break;
3019                 }
3020         }
3021
3022         /* send driver version info to firmware */
3023         if (hw->mac.type >= e1000_i350)
3024                 igb_init_fw(adapter);
3025
3026 #ifndef IGB_NO_LRO
3027         if (netdev->features & NETIF_F_LRO)
3028                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3029         else
3030                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3031 #endif
3032         dev_info(pci_dev_to_dev(pdev),
3033                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3034                  adapter->msix_entries ? "MSI-X" :
3035                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3036                  adapter->num_rx_queues, adapter->num_tx_queues);
3037
3038         cards_found++;
3039
3040         pm_runtime_put_noidle(&pdev->dev);
3041         return 0;
3042
3043 err_register:
3044         igb_release_hw_control(adapter);
3045 #ifdef HAVE_I2C_SUPPORT
3046         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3047 #endif /* HAVE_I2C_SUPPORT */
3048 err_eeprom:
3049         if (!e1000_check_reset_block(hw))
3050                 e1000_phy_hw_reset(hw);
3051
3052         if (hw->flash_address)
3053                 iounmap(hw->flash_address);
3054 err_sw_init:
3055         igb_clear_interrupt_scheme(adapter);
3056         igb_reset_sriov_capability(adapter);
3057         iounmap(hw->hw_addr);
3058 err_ioremap:
3059         free_netdev(netdev);
3060 err_alloc_etherdev:
3061         pci_release_selected_regions(pdev,
3062                                      pci_select_bars(pdev, IORESOURCE_MEM));
3063 err_pci_reg:
3064 err_dma:
3065         pci_disable_device(pdev);
3066         return err;
3067 }
3068 #ifdef HAVE_I2C_SUPPORT
3069 /*
3070  *  igb_remove_i2c - Cleanup  I2C interface
3071  *  @adapter: pointer to adapter structure
3072  *
3073  */
3074 static void igb_remove_i2c(struct igb_adapter *adapter)
3075 {
3076
3077         /* free the adapter bus structure */
3078         i2c_del_adapter(&adapter->i2c_adap);
3079 }
3080 #endif /* HAVE_I2C_SUPPORT */
3081
3082 /**
3083  * igb_remove - Device Removal Routine
3084  * @pdev: PCI device information struct
3085  *
3086  * igb_remove is called by the PCI subsystem to alert the driver
3087  * that it should release a PCI device.  The could be caused by a
3088  * Hot-Plug event, or because the driver is going to be removed from
3089  * memory.
3090  **/
3091 static void __devexit igb_remove(struct pci_dev *pdev)
3092 {
3093         struct net_device *netdev = pci_get_drvdata(pdev);
3094         struct igb_adapter *adapter = netdev_priv(netdev);
3095         struct e1000_hw *hw = &adapter->hw;
3096
3097         pm_runtime_get_noresume(&pdev->dev);
3098 #ifdef HAVE_I2C_SUPPORT
3099         igb_remove_i2c(adapter);
3100 #endif /* HAVE_I2C_SUPPORT */
3101 #ifdef HAVE_PTP_1588_CLOCK
3102         igb_ptp_stop(adapter);
3103 #endif /* HAVE_PTP_1588_CLOCK */
3104
3105         /* flush_scheduled work may reschedule our watchdog task, so
3106          * explicitly disable watchdog tasks from being rescheduled  */
3107         set_bit(__IGB_DOWN, &adapter->state);
3108         del_timer_sync(&adapter->watchdog_timer);
3109         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3110                 del_timer_sync(&adapter->dma_err_timer);
3111         del_timer_sync(&adapter->phy_info_timer);
3112
3113         flush_scheduled_work();
3114
3115 #ifdef IGB_DCA
3116         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3117                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3118                 dca_remove_requester(&pdev->dev);
3119                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3120                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3121         }
3122 #endif
3123
3124         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3125          * would have already happened in close and is redundant. */
3126         igb_release_hw_control(adapter);
3127
3128         unregister_netdev(netdev);
3129 #ifdef CONFIG_IGB_VMDQ_NETDEV
3130         igb_remove_vmdq_netdevs(adapter);
3131 #endif
3132
3133         igb_clear_interrupt_scheme(adapter);
3134         igb_reset_sriov_capability(adapter);
3135
3136         iounmap(hw->hw_addr);
3137         if (hw->flash_address)
3138                 iounmap(hw->flash_address);
3139         pci_release_selected_regions(pdev,
3140                                      pci_select_bars(pdev, IORESOURCE_MEM));
3141
3142 #ifdef IGB_HWMON
3143         igb_sysfs_exit(adapter);
3144 #else
3145 #ifdef IGB_PROCFS
3146         igb_procfs_exit(adapter);
3147 #endif /* IGB_PROCFS */
3148 #endif /* IGB_HWMON */
3149         kfree(adapter->mac_table);
3150         kfree(adapter->shadow_vfta);
3151         free_netdev(netdev);
3152
3153         pci_disable_pcie_error_reporting(pdev);
3154
3155         pci_disable_device(pdev);
3156 }
3157
3158 /**
3159  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3160  * @adapter: board private structure to initialize
3161  *
3162  * igb_sw_init initializes the Adapter private data structure.
3163  * Fields are initialized based on PCI device information and
3164  * OS network device settings (MTU size).
3165  **/
3166 static int igb_sw_init(struct igb_adapter *adapter)
3167 {
3168         struct e1000_hw *hw = &adapter->hw;
3169         struct net_device *netdev = adapter->netdev;
3170         struct pci_dev *pdev = adapter->pdev;
3171
3172         /* PCI config space info */
3173
3174         hw->vendor_id = pdev->vendor;
3175         hw->device_id = pdev->device;
3176         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3177         hw->subsystem_device_id = pdev->subsystem_device;
3178
3179         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3180
3181         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3182
3183         /* set default ring sizes */
3184         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3185         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3186
3187         /* set default work limits */
3188         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3189
3190         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3191                                               VLAN_HLEN;
3192
3193         /* Initialize the hardware-specific values */
3194         if (e1000_setup_init_funcs(hw, TRUE)) {
3195                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3196                 return -EIO;
3197         }
3198
3199         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3200                                      hw->mac.rar_entry_count,
3201                                      GFP_ATOMIC);
3202
3203         /* Setup and initialize a copy of the hw vlan table array */
3204         adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3205                                        GFP_ATOMIC);
3206 #ifdef NO_KNI
3207         /* These calls may decrease the number of queues */
3208         if (hw->mac.type < e1000_i210) {
3209                 igb_set_sriov_capability(adapter);
3210         }
3211
3212         if (igb_init_interrupt_scheme(adapter, true)) {
3213                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3214                 return -ENOMEM;
3215         }
3216
3217         /* Explicitly disable IRQ since the NIC can be in any state. */
3218         igb_irq_disable(adapter);
3219
3220         set_bit(__IGB_DOWN, &adapter->state);
3221 #endif
3222         return 0;
3223 }
3224
3225 /**
3226  * igb_open - Called when a network interface is made active
3227  * @netdev: network interface device structure
3228  *
3229  * Returns 0 on success, negative value on failure
3230  *
3231  * The open entry point is called when a network interface is made
3232  * active by the system (IFF_UP).  At this point all resources needed
3233  * for transmit and receive operations are allocated, the interrupt
3234  * handler is registered with the OS, the watchdog timer is started,
3235  * and the stack is notified that the interface is ready.
3236  **/
3237 static int __igb_open(struct net_device *netdev, bool resuming)
3238 {
3239         struct igb_adapter *adapter = netdev_priv(netdev);
3240         struct e1000_hw *hw = &adapter->hw;
3241 #ifdef CONFIG_PM_RUNTIME
3242         struct pci_dev *pdev = adapter->pdev;
3243 #endif /* CONFIG_PM_RUNTIME */
3244         int err;
3245         int i;
3246
3247         /* disallow open during test */
3248         if (test_bit(__IGB_TESTING, &adapter->state)) {
3249                 WARN_ON(resuming);
3250                 return -EBUSY;
3251         }
3252
3253 #ifdef CONFIG_PM_RUNTIME
3254         if (!resuming)
3255                 pm_runtime_get_sync(&pdev->dev);
3256 #endif /* CONFIG_PM_RUNTIME */
3257
3258         netif_carrier_off(netdev);
3259
3260         /* allocate transmit descriptors */
3261         err = igb_setup_all_tx_resources(adapter);
3262         if (err)
3263                 goto err_setup_tx;
3264
3265         /* allocate receive descriptors */
3266         err = igb_setup_all_rx_resources(adapter);
3267         if (err)
3268                 goto err_setup_rx;
3269
3270         igb_power_up_link(adapter);
3271
3272         /* before we allocate an interrupt, we must be ready to handle it.
3273          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3274          * as soon as we call pci_request_irq, so we have to setup our
3275          * clean_rx handler before we do so.  */
3276         igb_configure(adapter);
3277
3278         err = igb_request_irq(adapter);
3279         if (err)
3280                 goto err_req_irq;
3281
3282         /* Notify the stack of the actual queue counts. */
3283         netif_set_real_num_tx_queues(netdev,
3284                                      adapter->vmdq_pools ? 1 :
3285                                      adapter->num_tx_queues);
3286
3287         err = netif_set_real_num_rx_queues(netdev,
3288                                            adapter->vmdq_pools ? 1 :
3289                                            adapter->num_rx_queues);
3290         if (err)
3291                 goto err_set_queues;
3292
3293         /* From here on the code is the same as igb_up() */
3294         clear_bit(__IGB_DOWN, &adapter->state);
3295
3296         for (i = 0; i < adapter->num_q_vectors; i++)
3297                 napi_enable(&(adapter->q_vector[i]->napi));
3298         igb_configure_lli(adapter);
3299
3300         /* Clear any pending interrupts. */
3301         E1000_READ_REG(hw, E1000_ICR);
3302
3303         igb_irq_enable(adapter);
3304
3305         /* notify VFs that reset has been completed */
3306         if (adapter->vfs_allocated_count) {
3307                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3308                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3309                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3310         }
3311
3312         netif_tx_start_all_queues(netdev);
3313
3314         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3315                 schedule_work(&adapter->dma_err_task);
3316
3317         /* start the watchdog. */
3318         hw->mac.get_link_status = 1;
3319         schedule_work(&adapter->watchdog_task);
3320
3321         return E1000_SUCCESS;
3322
3323 err_set_queues:
3324         igb_free_irq(adapter);
3325 err_req_irq:
3326         igb_release_hw_control(adapter);
3327         igb_power_down_link(adapter);
3328         igb_free_all_rx_resources(adapter);
3329 err_setup_rx:
3330         igb_free_all_tx_resources(adapter);
3331 err_setup_tx:
3332         igb_reset(adapter);
3333
3334 #ifdef CONFIG_PM_RUNTIME
3335         if (!resuming)
3336                 pm_runtime_put(&pdev->dev);
3337 #endif /* CONFIG_PM_RUNTIME */
3338
3339         return err;
3340 }
3341
3342 static int igb_open(struct net_device *netdev)
3343 {
3344         return __igb_open(netdev, false);
3345 }
3346
3347 /**
3348  * igb_close - Disables a network interface
3349  * @netdev: network interface device structure
3350  *
3351  * Returns 0, this is not allowed to fail
3352  *
3353  * The close entry point is called when an interface is de-activated
3354  * by the OS.  The hardware is still under the driver's control, but
3355  * needs to be disabled.  A global MAC reset is issued to stop the
3356  * hardware, and all transmit and receive resources are freed.
3357  **/
3358 static int __igb_close(struct net_device *netdev, bool suspending)
3359 {
3360         struct igb_adapter *adapter = netdev_priv(netdev);
3361 #ifdef CONFIG_PM_RUNTIME
3362         struct pci_dev *pdev = adapter->pdev;
3363 #endif /* CONFIG_PM_RUNTIME */
3364
3365         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3366
3367 #ifdef CONFIG_PM_RUNTIME
3368         if (!suspending)
3369                 pm_runtime_get_sync(&pdev->dev);
3370 #endif /* CONFIG_PM_RUNTIME */
3371
3372         igb_down(adapter);
3373
3374         igb_release_hw_control(adapter);
3375
3376         igb_free_irq(adapter);
3377
3378         igb_free_all_tx_resources(adapter);
3379         igb_free_all_rx_resources(adapter);
3380
3381 #ifdef CONFIG_PM_RUNTIME
3382         if (!suspending)
3383                 pm_runtime_put_sync(&pdev->dev);
3384 #endif /* CONFIG_PM_RUNTIME */
3385
3386         return 0;
3387 }
3388
3389 static int igb_close(struct net_device *netdev)
3390 {
3391         return __igb_close(netdev, false);
3392 }
3393
3394 /**
3395  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3396  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3397  *
3398  * Return 0 on success, negative on failure
3399  **/
3400 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3401 {
3402         struct device *dev = tx_ring->dev;
3403         int size;
3404
3405         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3406         tx_ring->tx_buffer_info = vzalloc(size);
3407         if (!tx_ring->tx_buffer_info)
3408                 goto err;
3409
3410         /* round up to nearest 4K */
3411         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3412         tx_ring->size = ALIGN(tx_ring->size, 4096);
3413
3414         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3415                                            &tx_ring->dma, GFP_KERNEL);
3416
3417         if (!tx_ring->desc)
3418                 goto err;
3419
3420         tx_ring->next_to_use = 0;
3421         tx_ring->next_to_clean = 0;
3422
3423         return 0;
3424
3425 err:
3426         vfree(tx_ring->tx_buffer_info);
3427         dev_err(dev,
3428                 "Unable to allocate memory for the transmit descriptor ring\n");
3429         return -ENOMEM;
3430 }
3431
3432 /**
3433  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3434  *                                (Descriptors) for all queues
3435  * @adapter: board private structure
3436  *
3437  * Return 0 on success, negative on failure
3438  **/
3439 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3440 {
3441         struct pci_dev *pdev = adapter->pdev;
3442         int i, err = 0;
3443
3444         for (i = 0; i < adapter->num_tx_queues; i++) {
3445                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3446                 if (err) {
3447                         dev_err(pci_dev_to_dev(pdev),
3448                                 "Allocation for Tx Queue %u failed\n", i);
3449                         for (i--; i >= 0; i--)
3450                                 igb_free_tx_resources(adapter->tx_ring[i]);
3451                         break;
3452                 }
3453         }
3454
3455         return err;
3456 }
3457
3458 /**
3459  * igb_setup_tctl - configure the transmit control registers
3460  * @adapter: Board private structure
3461  **/
3462 void igb_setup_tctl(struct igb_adapter *adapter)
3463 {
3464         struct e1000_hw *hw = &adapter->hw;
3465         u32 tctl;
3466
3467         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3468         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3469
3470         /* Program the Transmit Control Register */
3471         tctl = E1000_READ_REG(hw, E1000_TCTL);
3472         tctl &= ~E1000_TCTL_CT;
3473         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3474                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3475
3476         e1000_config_collision_dist(hw);
3477
3478         /* Enable transmits */
3479         tctl |= E1000_TCTL_EN;
3480
3481         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3482 }
3483
3484 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3485 {
3486         struct e1000_hw *hw = &adapter->hw;
3487         switch (hw->mac.type) {
3488         case e1000_i354:
3489                 return 4;
3490         case e1000_82576:
3491                 if (adapter->msix_entries)
3492                         return 1;
3493         default:
3494                 break;
3495         }
3496
3497         return 16;
3498 }
3499
3500 /**
3501  * igb_configure_tx_ring - Configure transmit ring after Reset
3502  * @adapter: board private structure
3503  * @ring: tx ring to configure
3504  *
3505  * Configure a transmit ring after a reset.
3506  **/
3507 void igb_configure_tx_ring(struct igb_adapter *adapter,
3508                            struct igb_ring *ring)
3509 {
3510         struct e1000_hw *hw = &adapter->hw;
3511         u32 txdctl = 0;
3512         u64 tdba = ring->dma;
3513         int reg_idx = ring->reg_idx;
3514
3515         /* disable the queue */
3516         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3517         E1000_WRITE_FLUSH(hw);
3518         mdelay(10);
3519
3520         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3521                         ring->count * sizeof(union e1000_adv_tx_desc));
3522         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3523                         tdba & 0x00000000ffffffffULL);
3524         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3525
3526         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3527         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3528         writel(0, ring->tail);
3529
3530         txdctl |= IGB_TX_PTHRESH;
3531         txdctl |= IGB_TX_HTHRESH << 8;
3532         txdctl |= igb_tx_wthresh(adapter) << 16;
3533
3534         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3535         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3536 }
3537
3538 /**
3539  * igb_configure_tx - Configure transmit Unit after Reset
3540  * @adapter: board private structure
3541  *
3542  * Configure the Tx unit of the MAC after a reset.
3543  **/
3544 static void igb_configure_tx(struct igb_adapter *adapter)
3545 {
3546         int i;
3547
3548         for (i = 0; i < adapter->num_tx_queues; i++)
3549                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3550 }
3551
3552 /**
3553  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3554  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3555  *
3556  * Returns 0 on success, negative on failure
3557  **/
3558 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3559 {
3560         struct device *dev = rx_ring->dev;
3561         int size, desc_len;
3562
3563         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3564         rx_ring->rx_buffer_info = vzalloc(size);
3565         if (!rx_ring->rx_buffer_info)
3566                 goto err;
3567
3568         desc_len = sizeof(union e1000_adv_rx_desc);
3569
3570         /* Round up to nearest 4K */
3571         rx_ring->size = rx_ring->count * desc_len;
3572         rx_ring->size = ALIGN(rx_ring->size, 4096);
3573
3574         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3575                                            &rx_ring->dma, GFP_KERNEL);
3576
3577         if (!rx_ring->desc)
3578                 goto err;
3579
3580         rx_ring->next_to_alloc = 0;
3581         rx_ring->next_to_clean = 0;
3582         rx_ring->next_to_use = 0;
3583
3584         return 0;
3585
3586 err:
3587         vfree(rx_ring->rx_buffer_info);
3588         rx_ring->rx_buffer_info = NULL;
3589         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3590                 " ring\n");
3591         return -ENOMEM;
3592 }
3593
3594 /**
3595  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3596  *                                (Descriptors) for all queues
3597  * @adapter: board private structure
3598  *
3599  * Return 0 on success, negative on failure
3600  **/
3601 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3602 {
3603         struct pci_dev *pdev = adapter->pdev;
3604         int i, err = 0;
3605
3606         for (i = 0; i < adapter->num_rx_queues; i++) {
3607                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3608                 if (err) {
3609                         dev_err(pci_dev_to_dev(pdev),
3610                                 "Allocation for Rx Queue %u failed\n", i);
3611                         for (i--; i >= 0; i--)
3612                                 igb_free_rx_resources(adapter->rx_ring[i]);
3613                         break;
3614                 }
3615         }
3616
3617         return err;
3618 }
3619
3620 /**
3621  * igb_setup_mrqc - configure the multiple receive queue control registers
3622  * @adapter: Board private structure
3623  **/
3624 static void igb_setup_mrqc(struct igb_adapter *adapter)
3625 {
3626         struct e1000_hw *hw = &adapter->hw;
3627         u32 mrqc, rxcsum;
3628         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3629         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3630                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3631                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3632                                         0xFA01ACBE };
3633
3634         /* Fill out hash function seeds */
3635         for (j = 0; j < 10; j++)
3636                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3637
3638         num_rx_queues = adapter->rss_queues;
3639
3640         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3641         switch (hw->mac.type) {
3642         case e1000_82575:
3643                 if (adapter->vmdq_pools) {
3644                         shift = 2;
3645                         shift2 = 6;
3646                         break;
3647                 }
3648                 shift = 6;
3649                 break;
3650         case e1000_82576:
3651                 /* 82576 supports 2 RSS queues for SR-IOV */
3652                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3653                         shift = 3;
3654                         num_rx_queues = 2;
3655                 }
3656                 break;
3657         default:
3658                 break;
3659         }
3660
3661         /*
3662          * Populate the redirection table 4 entries at a time.  To do this
3663          * we are generating the results for n and n+2 and then interleaving
3664          * those with the results with n+1 and n+3.
3665          */
3666         for (j = 0; j < 32; j++) {
3667                 /* first pass generates n and n+2 */
3668                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3669                 u32 reta = (base & 0x07800780) >> (7 - shift);
3670
3671                 /* second pass generates n+1 and n+3 */
3672                 base += 0x00010001 * num_rx_queues;
3673                 reta |= (base & 0x07800780) << (1 + shift);
3674
3675                 /* generate 2nd table for 82575 based parts */
3676                 if (shift2)
3677                         reta |= (0x01010101 * num_rx_queues) << shift2;
3678
3679                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3680         }
3681
3682         /*
3683          * Disable raw packet checksumming so that RSS hash is placed in
3684          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3685          * offloads as they are enabled by default
3686          */
3687         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3688         rxcsum |= E1000_RXCSUM_PCSD;
3689
3690         if (adapter->hw.mac.type >= e1000_82576)
3691                 /* Enable Receive Checksum Offload for SCTP */
3692                 rxcsum |= E1000_RXCSUM_CRCOFL;
3693
3694         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3695         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3696
3697         /* Generate RSS hash based on packet types, TCP/UDP
3698          * port numbers and/or IPv4/v6 src and dst addresses
3699          */
3700         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3701                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3702                E1000_MRQC_RSS_FIELD_IPV6 |
3703                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3704                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3705
3706         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3707                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3708         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3709                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3710
3711         /* If VMDq is enabled then we set the appropriate mode for that, else
3712          * we default to RSS so that an RSS hash is calculated per packet even
3713          * if we are only using one queue */
3714         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3715                 if (hw->mac.type > e1000_82575) {
3716                         /* Set the default pool for the PF's first queue */
3717                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3718                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3719                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3720                         vtctl |= adapter->vfs_allocated_count <<
3721                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3722                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3723                 } else if (adapter->rss_queues > 1) {
3724                         /* set default queue for pool 1 to queue 2 */
3725                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3726                                         adapter->rss_queues << 7);
3727                 }
3728                 if (adapter->rss_queues > 1)
3729                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3730                 else
3731                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3732         } else {
3733                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3734         }
3735         igb_vmm_control(adapter);
3736
3737         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3738 }
3739
3740 /**
3741  * igb_setup_rctl - configure the receive control registers
3742  * @adapter: Board private structure
3743  **/
3744 void igb_setup_rctl(struct igb_adapter *adapter)
3745 {
3746         struct e1000_hw *hw = &adapter->hw;
3747         u32 rctl;
3748
3749         rctl = E1000_READ_REG(hw, E1000_RCTL);
3750
3751         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3752         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3753
3754         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3755                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3756
3757         /*
3758          * enable stripping of CRC. It's unlikely this will break BMC
3759          * redirection as it did with e1000. Newer features require
3760          * that the HW strips the CRC.
3761          */
3762         rctl |= E1000_RCTL_SECRC;
3763
3764         /* disable store bad packets and clear size bits. */
3765         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3766
3767         /* enable LPE to prevent packets larger than max_frame_size */
3768         rctl |= E1000_RCTL_LPE;
3769
3770         /* disable queue 0 to prevent tail write w/o re-config */
3771         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3772
3773         /* Attention!!!  For SR-IOV PF driver operations you must enable
3774          * queue drop for all VF and PF queues to prevent head of line blocking
3775          * if an un-trusted VF does not provide descriptors to hardware.
3776          */
3777         if (adapter->vfs_allocated_count) {
3778                 /* set all queue drop enable bits */
3779                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3780         }
3781
3782         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3783 }
3784
3785 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3786                                    int vfn)
3787 {
3788         struct e1000_hw *hw = &adapter->hw;
3789         u32 vmolr;
3790
3791         /* if it isn't the PF check to see if VFs are enabled and
3792          * increase the size to support vlan tags */
3793         if (vfn < adapter->vfs_allocated_count &&
3794             adapter->vf_data[vfn].vlans_enabled)
3795                 size += VLAN_HLEN;
3796
3797 #ifdef CONFIG_IGB_VMDQ_NETDEV
3798         if (vfn >= adapter->vfs_allocated_count) {
3799                 int queue = vfn - adapter->vfs_allocated_count;
3800                 struct igb_vmdq_adapter *vadapter;
3801
3802                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3803                 if (vadapter->vlgrp)
3804                         size += VLAN_HLEN;
3805         }
3806 #endif
3807         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3808         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3809         vmolr |= size | E1000_VMOLR_LPE;
3810         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3811
3812         return 0;
3813 }
3814
3815 /**
3816  * igb_rlpml_set - set maximum receive packet size
3817  * @adapter: board private structure
3818  *
3819  * Configure maximum receivable packet size.
3820  **/
3821 static void igb_rlpml_set(struct igb_adapter *adapter)
3822 {
3823         u32 max_frame_size = adapter->max_frame_size;
3824         struct e1000_hw *hw = &adapter->hw;
3825         u16 pf_id = adapter->vfs_allocated_count;
3826
3827         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3828                 int i;
3829                 for (i = 0; i < adapter->vmdq_pools; i++)
3830                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3831                 /*
3832                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3833                  * to our max jumbo frame size, in case we need to enable
3834                  * jumbo frames on one of the rings later.
3835                  * This will not pass over-length frames into the default
3836                  * queue because it's gated by the VMOLR.RLPML.
3837                  */
3838                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3839         }
3840         /* Set VF RLPML for the PF device. */
3841         if (adapter->vfs_allocated_count)
3842                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3843
3844         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3845 }
3846
3847 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3848                                         int vfn, bool enable)
3849 {
3850         struct e1000_hw *hw = &adapter->hw;
3851         u32 val;
3852         void __iomem *reg;
3853
3854         if (hw->mac.type < e1000_82576)
3855                 return;
3856
3857         if (hw->mac.type == e1000_i350)
3858                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3859         else
3860                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3861
3862         val = readl(reg);
3863         if (enable)
3864                 val |= E1000_VMOLR_STRVLAN;
3865         else
3866                 val &= ~(E1000_VMOLR_STRVLAN);
3867         writel(val, reg);
3868 }
3869 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3870                                  int vfn, bool aupe)
3871 {
3872         struct e1000_hw *hw = &adapter->hw;
3873         u32 vmolr;
3874
3875         /*
3876          * This register exists only on 82576 and newer so if we are older then
3877          * we should exit and do nothing
3878          */
3879         if (hw->mac.type < e1000_82576)
3880                 return;
3881
3882         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3883
3884         if (aupe)
3885                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3886         else
3887                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3888
3889         /* clear all bits that might not be set */
3890         vmolr &= ~E1000_VMOLR_RSSE;
3891
3892         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3893                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3894
3895         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3896         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3897
3898         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3899 }
3900
3901 /**
3902  * igb_configure_rx_ring - Configure a receive ring after Reset
3903  * @adapter: board private structure
3904  * @ring: receive ring to be configured
3905  *
3906  * Configure the Rx unit of the MAC after a reset.
3907  **/
3908 void igb_configure_rx_ring(struct igb_adapter *adapter,
3909                            struct igb_ring *ring)
3910 {
3911         struct e1000_hw *hw = &adapter->hw;
3912         u64 rdba = ring->dma;
3913         int reg_idx = ring->reg_idx;
3914         u32 srrctl = 0, rxdctl = 0;
3915
3916 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3917         /*
3918          * RLPML prevents us from receiving a frame larger than max_frame so
3919          * it is safe to just set the rx_buffer_len to max_frame without the
3920          * risk of an skb over panic.
3921          */
3922         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3923                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3924
3925 #endif
3926         /* disable the queue */
3927         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3928
3929         /* Set DMA base address registers */
3930         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3931                         rdba & 0x00000000ffffffffULL);
3932         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3933         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3934                        ring->count * sizeof(union e1000_adv_rx_desc));
3935
3936         /* initialize head and tail */
3937         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3938         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3939         writel(0, ring->tail);
3940
3941         /* reset next-to- use/clean to place SW in sync with hardwdare */
3942         ring->next_to_clean = 0;
3943         ring->next_to_use = 0;
3944 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3945         ring->next_to_alloc = 0;
3946
3947 #endif
3948         /* set descriptor configuration */
3949 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3950         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3951         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3952 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3953         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3954                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3955 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3956         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3957 #ifdef HAVE_PTP_1588_CLOCK
3958         if (hw->mac.type >= e1000_82580)
3959                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3960 #endif /* HAVE_PTP_1588_CLOCK */
3961         /*
3962          * We should set the drop enable bit if:
3963          *  SR-IOV is enabled
3964          *   or
3965          *  Flow Control is disabled and number of RX queues > 1
3966          *
3967          *  This allows us to avoid head of line blocking for security
3968          *  and performance reasons.
3969          */
3970         if (adapter->vfs_allocated_count ||
3971             (adapter->num_rx_queues > 1 &&
3972              (hw->fc.requested_mode == e1000_fc_none ||
3973               hw->fc.requested_mode == e1000_fc_rx_pause)))
3974                 srrctl |= E1000_SRRCTL_DROP_EN;
3975
3976         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3977
3978         /* set filtering for VMDQ pools */
3979         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3980
3981         rxdctl |= IGB_RX_PTHRESH;
3982         rxdctl |= IGB_RX_HTHRESH << 8;
3983         rxdctl |= IGB_RX_WTHRESH << 16;
3984
3985         /* enable receive descriptor fetching */
3986         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3987         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3988 }
3989
3990 /**
3991  * igb_configure_rx - Configure receive Unit after Reset
3992  * @adapter: board private structure
3993  *
3994  * Configure the Rx unit of the MAC after a reset.
3995  **/
3996 static void igb_configure_rx(struct igb_adapter *adapter)
3997 {
3998         int i;
3999
4000         /* set UTA to appropriate mode */
4001         igb_set_uta(adapter);
4002
4003         igb_full_sync_mac_table(adapter);
4004         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4005          * the Base and Length of the Rx Descriptor Ring */
4006         for (i = 0; i < adapter->num_rx_queues; i++)
4007                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
4008 }
4009
4010 /**
4011  * igb_free_tx_resources - Free Tx Resources per Queue
4012  * @tx_ring: Tx descriptor ring for a specific queue
4013  *
4014  * Free all transmit software resources
4015  **/
4016 void igb_free_tx_resources(struct igb_ring *tx_ring)
4017 {
4018         igb_clean_tx_ring(tx_ring);
4019
4020         vfree(tx_ring->tx_buffer_info);
4021         tx_ring->tx_buffer_info = NULL;
4022
4023         /* if not set, then don't free */
4024         if (!tx_ring->desc)
4025                 return;
4026
4027         dma_free_coherent(tx_ring->dev, tx_ring->size,
4028                           tx_ring->desc, tx_ring->dma);
4029
4030         tx_ring->desc = NULL;
4031 }
4032
4033 /**
4034  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4035  * @adapter: board private structure
4036  *
4037  * Free all transmit software resources
4038  **/
4039 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4040 {
4041         int i;
4042
4043         for (i = 0; i < adapter->num_tx_queues; i++)
4044                 igb_free_tx_resources(adapter->tx_ring[i]);
4045 }
4046
4047 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4048                                     struct igb_tx_buffer *tx_buffer)
4049 {
4050         if (tx_buffer->skb) {
4051                 dev_kfree_skb_any(tx_buffer->skb);
4052                 if (dma_unmap_len(tx_buffer, len))
4053                         dma_unmap_single(ring->dev,
4054                                          dma_unmap_addr(tx_buffer, dma),
4055                                          dma_unmap_len(tx_buffer, len),
4056                                          DMA_TO_DEVICE);
4057         } else if (dma_unmap_len(tx_buffer, len)) {
4058                 dma_unmap_page(ring->dev,
4059                                dma_unmap_addr(tx_buffer, dma),
4060                                dma_unmap_len(tx_buffer, len),
4061                                DMA_TO_DEVICE);
4062         }
4063         tx_buffer->next_to_watch = NULL;
4064         tx_buffer->skb = NULL;
4065         dma_unmap_len_set(tx_buffer, len, 0);
4066         /* buffer_info must be completely set up in the transmit path */
4067 }
4068
4069 /**
4070  * igb_clean_tx_ring - Free Tx Buffers
4071  * @tx_ring: ring to be cleaned
4072  **/
4073 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4074 {
4075         struct igb_tx_buffer *buffer_info;
4076         unsigned long size;
4077         u16 i;
4078
4079         if (!tx_ring->tx_buffer_info)
4080                 return;
4081         /* Free all the Tx ring sk_buffs */
4082
4083         for (i = 0; i < tx_ring->count; i++) {
4084                 buffer_info = &tx_ring->tx_buffer_info[i];
4085                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4086         }
4087
4088         netdev_tx_reset_queue(txring_txq(tx_ring));
4089
4090         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4091         memset(tx_ring->tx_buffer_info, 0, size);
4092
4093         /* Zero out the descriptor ring */
4094         memset(tx_ring->desc, 0, tx_ring->size);
4095
4096         tx_ring->next_to_use = 0;
4097         tx_ring->next_to_clean = 0;
4098 }
4099
4100 /**
4101  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4102  * @adapter: board private structure
4103  **/
4104 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4105 {
4106         int i;
4107
4108         for (i = 0; i < adapter->num_tx_queues; i++)
4109                 igb_clean_tx_ring(adapter->tx_ring[i]);
4110 }
4111
4112 /**
4113  * igb_free_rx_resources - Free Rx Resources
4114  * @rx_ring: ring to clean the resources from
4115  *
4116  * Free all receive software resources
4117  **/
4118 void igb_free_rx_resources(struct igb_ring *rx_ring)
4119 {
4120         igb_clean_rx_ring(rx_ring);
4121
4122         vfree(rx_ring->rx_buffer_info);
4123         rx_ring->rx_buffer_info = NULL;
4124
4125         /* if not set, then don't free */
4126         if (!rx_ring->desc)
4127                 return;
4128
4129         dma_free_coherent(rx_ring->dev, rx_ring->size,
4130                           rx_ring->desc, rx_ring->dma);
4131
4132         rx_ring->desc = NULL;
4133 }
4134
4135 /**
4136  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4137  * @adapter: board private structure
4138  *
4139  * Free all receive software resources
4140  **/
4141 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4142 {
4143         int i;
4144
4145         for (i = 0; i < adapter->num_rx_queues; i++)
4146                 igb_free_rx_resources(adapter->rx_ring[i]);
4147 }
4148
4149 /**
4150  * igb_clean_rx_ring - Free Rx Buffers per Queue
4151  * @rx_ring: ring to free buffers from
4152  **/
4153 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4154 {
4155         unsigned long size;
4156         u16 i;
4157
4158         if (!rx_ring->rx_buffer_info)
4159                 return;
4160
4161 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4162         if (rx_ring->skb)
4163                 dev_kfree_skb(rx_ring->skb);
4164         rx_ring->skb = NULL;
4165
4166 #endif
4167         /* Free all the Rx ring sk_buffs */
4168         for (i = 0; i < rx_ring->count; i++) {
4169                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4170 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4171                 if (buffer_info->dma) {
4172                         dma_unmap_single(rx_ring->dev,
4173                                          buffer_info->dma,
4174                                          rx_ring->rx_buffer_len,
4175                                          DMA_FROM_DEVICE);
4176                         buffer_info->dma = 0;
4177                 }
4178
4179                 if (buffer_info->skb) {
4180                         dev_kfree_skb(buffer_info->skb);
4181                         buffer_info->skb = NULL;
4182                 }
4183 #else
4184                 if (!buffer_info->page)
4185                         continue;
4186
4187                 dma_unmap_page(rx_ring->dev,
4188                                buffer_info->dma,
4189                                PAGE_SIZE,
4190                                DMA_FROM_DEVICE);
4191                 __free_page(buffer_info->page);
4192
4193                 buffer_info->page = NULL;
4194 #endif
4195         }
4196
4197         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4198         memset(rx_ring->rx_buffer_info, 0, size);
4199
4200         /* Zero out the descriptor ring */
4201         memset(rx_ring->desc, 0, rx_ring->size);
4202
4203         rx_ring->next_to_alloc = 0;
4204         rx_ring->next_to_clean = 0;
4205         rx_ring->next_to_use = 0;
4206 }
4207
4208 /**
4209  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4210  * @adapter: board private structure
4211  **/
4212 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4213 {
4214         int i;
4215
4216         for (i = 0; i < adapter->num_rx_queues; i++)
4217                 igb_clean_rx_ring(adapter->rx_ring[i]);
4218 }
4219
4220 /**
4221  * igb_set_mac - Change the Ethernet Address of the NIC
4222  * @netdev: network interface device structure
4223  * @p: pointer to an address structure
4224  *
4225  * Returns 0 on success, negative on failure
4226  **/
4227 static int igb_set_mac(struct net_device *netdev, void *p)
4228 {
4229         struct igb_adapter *adapter = netdev_priv(netdev);
4230         struct e1000_hw *hw = &adapter->hw;
4231         struct sockaddr *addr = p;
4232
4233         if (!is_valid_ether_addr(addr->sa_data))
4234                 return -EADDRNOTAVAIL;
4235
4236         igb_del_mac_filter(adapter, hw->mac.addr,
4237                            adapter->vfs_allocated_count);
4238         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4239         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4240
4241         /* set the correct pool for the new PF MAC address in entry 0 */
4242         return igb_add_mac_filter(adapter, hw->mac.addr,
4243                            adapter->vfs_allocated_count);
4244 }
4245
4246 /**
4247  * igb_write_mc_addr_list - write multicast addresses to MTA
4248  * @netdev: network interface device structure
4249  *
4250  * Writes multicast address list to the MTA hash table.
4251  * Returns: -ENOMEM on failure
4252  *                0 on no addresses written
4253  *                X on writing X addresses to MTA
4254  **/
4255 int igb_write_mc_addr_list(struct net_device *netdev)
4256 {
4257         struct igb_adapter *adapter = netdev_priv(netdev);
4258         struct e1000_hw *hw = &adapter->hw;
4259 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4260         struct netdev_hw_addr *ha;
4261 #else
4262         struct dev_mc_list *ha;
4263 #endif
4264         u8  *mta_list;
4265         int i, count;
4266 #ifdef CONFIG_IGB_VMDQ_NETDEV
4267         int vm;
4268 #endif
4269         count = netdev_mc_count(netdev);
4270 #ifdef CONFIG_IGB_VMDQ_NETDEV
4271         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4272                 if (!adapter->vmdq_netdev[vm])
4273                         break;
4274                 if (!netif_running(adapter->vmdq_netdev[vm]))
4275                         continue;
4276                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4277         }
4278 #endif
4279
4280         if (!count) {
4281                 e1000_update_mc_addr_list(hw, NULL, 0);
4282                 return 0;
4283         }
4284         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4285         if (!mta_list)
4286                 return -ENOMEM;
4287
4288         /* The shared function expects a packed array of only addresses. */
4289         i = 0;
4290         netdev_for_each_mc_addr(ha, netdev)
4291 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4292                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4293 #else
4294                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4295 #endif
4296 #ifdef CONFIG_IGB_VMDQ_NETDEV
4297         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4298                 if (!adapter->vmdq_netdev[vm])
4299                         break;
4300                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4301                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4302                         continue;
4303                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4304 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4305                         memcpy(mta_list + (i++ * ETH_ALEN),
4306                                ha->addr, ETH_ALEN);
4307 #else
4308                         memcpy(mta_list + (i++ * ETH_ALEN),
4309                                ha->dmi_addr, ETH_ALEN);
4310 #endif
4311         }
4312 #endif
4313         e1000_update_mc_addr_list(hw, mta_list, i);
4314         kfree(mta_list);
4315
4316         return count;
4317 }
4318
4319 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4320 {
4321         u32 rar_low, rar_high;
4322         struct e1000_hw *hw = &adapter->hw;
4323         u8 *addr = adapter->mac_table[index].addr;
4324         /* HW expects these in little endian so we reverse the byte order
4325          * from network order (big endian) to little endian
4326          */
4327         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4328                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4329         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4330
4331         /* Indicate to hardware the Address is Valid. */
4332         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4333                 rar_high |= E1000_RAH_AV;
4334
4335         if (hw->mac.type == e1000_82575)
4336                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4337         else
4338                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4339
4340         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4341         E1000_WRITE_FLUSH(hw);
4342         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4343         E1000_WRITE_FLUSH(hw);
4344 }
4345
4346 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4347 {
4348         struct e1000_hw *hw = &adapter->hw;
4349         int i;
4350         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4351                         igb_rar_set(adapter, i);
4352         }
4353 }
4354
4355 void igb_sync_mac_table(struct igb_adapter *adapter)
4356 {
4357         struct e1000_hw *hw = &adapter->hw;
4358         int i;
4359         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4360                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4361                         igb_rar_set(adapter, i);
4362                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4363         }
4364 }
4365
4366 int igb_available_rars(struct igb_adapter *adapter)
4367 {
4368         struct e1000_hw *hw = &adapter->hw;
4369         int i, count = 0;
4370
4371         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4372                 if (adapter->mac_table[i].state == 0)
4373                         count++;
4374         }
4375         return count;
4376 }
4377
4378 #ifdef HAVE_SET_RX_MODE
4379 /**
4380  * igb_write_uc_addr_list - write unicast addresses to RAR table
4381  * @netdev: network interface device structure
4382  *
4383  * Writes unicast address list to the RAR table.
4384  * Returns: -ENOMEM on failure/insufficient address space
4385  *                0 on no addresses written
4386  *                X on writing X addresses to the RAR table
4387  **/
4388 static int igb_write_uc_addr_list(struct net_device *netdev)
4389 {
4390         struct igb_adapter *adapter = netdev_priv(netdev);
4391         unsigned int vfn = adapter->vfs_allocated_count;
4392         int count = 0;
4393
4394         /* return ENOMEM indicating insufficient memory for addresses */
4395         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4396                 return -ENOMEM;
4397         if (!netdev_uc_empty(netdev)) {
4398 #ifdef NETDEV_HW_ADDR_T_UNICAST
4399                 struct netdev_hw_addr *ha;
4400 #else
4401                 struct dev_mc_list *ha;
4402 #endif
4403                 netdev_for_each_uc_addr(ha, netdev) {
4404 #ifdef NETDEV_HW_ADDR_T_UNICAST
4405                         igb_del_mac_filter(adapter, ha->addr, vfn);
4406                         igb_add_mac_filter(adapter, ha->addr, vfn);
4407 #else
4408                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4409                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4410 #endif
4411                         count++;
4412                 }
4413         }
4414         return count;
4415 }
4416
4417 #endif /* HAVE_SET_RX_MODE */
4418 /**
4419  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4420  * @netdev: network interface device structure
4421  *
4422  * The set_rx_mode entry point is called whenever the unicast or multicast
4423  * address lists or the network interface flags are updated.  This routine is
4424  * responsible for configuring the hardware for proper unicast, multicast,
4425  * promiscuous mode, and all-multi behavior.
4426  **/
4427 static void igb_set_rx_mode(struct net_device *netdev)
4428 {
4429         struct igb_adapter *adapter = netdev_priv(netdev);
4430         struct e1000_hw *hw = &adapter->hw;
4431         unsigned int vfn = adapter->vfs_allocated_count;
4432         u32 rctl, vmolr = 0;
4433         int count;
4434
4435         /* Check for Promiscuous and All Multicast modes */
4436         rctl = E1000_READ_REG(hw, E1000_RCTL);
4437
4438         /* clear the effected bits */
4439         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4440
4441         if (netdev->flags & IFF_PROMISC) {
4442                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4443                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4444                 /* retain VLAN HW filtering if in VT mode */
4445                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4446                         rctl |= E1000_RCTL_VFE;
4447         } else {
4448                 if (netdev->flags & IFF_ALLMULTI) {
4449                         rctl |= E1000_RCTL_MPE;
4450                         vmolr |= E1000_VMOLR_MPME;
4451                 } else {
4452                         /*
4453                          * Write addresses to the MTA, if the attempt fails
4454                          * then we should just turn on promiscuous mode so
4455                          * that we can at least receive multicast traffic
4456                          */
4457                         count = igb_write_mc_addr_list(netdev);
4458                         if (count < 0) {
4459                                 rctl |= E1000_RCTL_MPE;
4460                                 vmolr |= E1000_VMOLR_MPME;
4461                         } else if (count) {
4462                                 vmolr |= E1000_VMOLR_ROMPE;
4463                         }
4464                 }
4465 #ifdef HAVE_SET_RX_MODE
4466                 /*
4467                  * Write addresses to available RAR registers, if there is not
4468                  * sufficient space to store all the addresses then enable
4469                  * unicast promiscuous mode
4470                  */
4471                 count = igb_write_uc_addr_list(netdev);
4472                 if (count < 0) {
4473                         rctl |= E1000_RCTL_UPE;
4474                         vmolr |= E1000_VMOLR_ROPE;
4475                 }
4476 #endif /* HAVE_SET_RX_MODE */
4477                 rctl |= E1000_RCTL_VFE;
4478         }
4479         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4480
4481         /*
4482          * In order to support SR-IOV and eventually VMDq it is necessary to set
4483          * the VMOLR to enable the appropriate modes.  Without this workaround
4484          * we will have issues with VLAN tag stripping not being done for frames
4485          * that are only arriving because we are the default pool
4486          */
4487         if (hw->mac.type < e1000_82576)
4488                 return;
4489
4490         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4491                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4492         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4493         igb_restore_vf_multicasts(adapter);
4494 }
4495
4496 static void igb_check_wvbr(struct igb_adapter *adapter)
4497 {
4498         struct e1000_hw *hw = &adapter->hw;
4499         u32 wvbr = 0;
4500
4501         switch (hw->mac.type) {
4502         case e1000_82576:
4503         case e1000_i350:
4504                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4505                         return;
4506                 break;
4507         default:
4508                 break;
4509         }
4510
4511         adapter->wvbr |= wvbr;
4512 }
4513
4514 #define IGB_STAGGERED_QUEUE_OFFSET 8
4515
4516 static void igb_spoof_check(struct igb_adapter *adapter)
4517 {
4518         int j;
4519
4520         if (!adapter->wvbr)
4521                 return;
4522
4523         switch (adapter->hw.mac.type) {
4524         case e1000_82576:
4525                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4526                         if (adapter->wvbr & (1 << j) ||
4527                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4528                                 DPRINTK(DRV, WARNING,
4529                                         "Spoof event(s) detected on VF %d\n", j);
4530                                 adapter->wvbr &=
4531                                         ~((1 << j) |
4532                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4533                         }
4534                 }
4535                 break;
4536         case e1000_i350:
4537                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4538                         if (adapter->wvbr & (1 << j)) {
4539                                 DPRINTK(DRV, WARNING,
4540                                         "Spoof event(s) detected on VF %d\n", j);
4541                                 adapter->wvbr &= ~(1 << j);
4542                         }
4543                 }
4544                 break;
4545         default:
4546                 break;
4547         }
4548 }
4549
4550 /* Need to wait a few seconds after link up to get diagnostic information from
4551  * the phy */
4552 #ifdef HAVE_TIMER_SETUP
4553 static void igb_update_phy_info(struct timer_list *t)
4554 {
4555         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4556 #else
4557 static void igb_update_phy_info(unsigned long data)
4558 {
4559         struct igb_adapter *adapter = (struct igb_adapter *) data;
4560 #endif
4561         e1000_get_phy_info(&adapter->hw);
4562 }
4563
4564 /**
4565  * igb_has_link - check shared code for link and determine up/down
4566  * @adapter: pointer to driver private info
4567  **/
4568 bool igb_has_link(struct igb_adapter *adapter)
4569 {
4570         struct e1000_hw *hw = &adapter->hw;
4571         bool link_active = FALSE;
4572
4573         /* get_link_status is set on LSC (link status) interrupt or
4574          * rx sequence error interrupt.  get_link_status will stay
4575          * false until the e1000_check_for_link establishes link
4576          * for copper adapters ONLY
4577          */
4578         switch (hw->phy.media_type) {
4579         case e1000_media_type_copper:
4580                 if (!hw->mac.get_link_status)
4581                         return true;
4582         case e1000_media_type_internal_serdes:
4583                 e1000_check_for_link(hw);
4584                 link_active = !hw->mac.get_link_status;
4585                 break;
4586         case e1000_media_type_unknown:
4587         default:
4588                 break;
4589         }
4590
4591         if (((hw->mac.type == e1000_i210) ||
4592              (hw->mac.type == e1000_i211)) &&
4593              (hw->phy.id == I210_I_PHY_ID)) {
4594                 if (!netif_carrier_ok(adapter->netdev)) {
4595                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4596                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4597                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4598                         adapter->link_check_timeout = jiffies;
4599                 }
4600         }
4601
4602         return link_active;
4603 }
4604
4605 /**
4606  * igb_watchdog - Timer Call-back
4607  * @data: pointer to adapter cast into an unsigned long
4608  **/
4609 #ifdef HAVE_TIMER_SETUP
4610 static void igb_watchdog(struct timer_list *t)
4611 {
4612         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
4613 #else
4614 static void igb_watchdog(unsigned long data)
4615 {
4616         struct igb_adapter *adapter = (struct igb_adapter *)data;
4617 #endif
4618         /* Do the rest outside of interrupt context */
4619         schedule_work(&adapter->watchdog_task);
4620 }
4621
4622 static void igb_watchdog_task(struct work_struct *work)
4623 {
4624         struct igb_adapter *adapter = container_of(work,
4625                                                    struct igb_adapter,
4626                                                    watchdog_task);
4627         struct e1000_hw *hw = &adapter->hw;
4628         struct net_device *netdev = adapter->netdev;
4629         u32 link;
4630         int i;
4631         u32 thstat, ctrl_ext;
4632         u32 connsw;
4633
4634         link = igb_has_link(adapter);
4635         /* Force link down if we have fiber to swap to */
4636         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4637                 if (hw->phy.media_type == e1000_media_type_copper) {
4638                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4639                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4640                                 link = 0;
4641                 }
4642         }
4643
4644         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4645                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4646                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4647                 else
4648                         link = FALSE;
4649         }
4650
4651         if (link) {
4652                 /* Perform a reset if the media type changed. */
4653                 if (hw->dev_spec._82575.media_changed) {
4654                         hw->dev_spec._82575.media_changed = false;
4655                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4656                         igb_reset(adapter);
4657                 }
4658
4659                 /* Cancel scheduled suspend requests. */
4660                 pm_runtime_resume(netdev->dev.parent);
4661
4662                 if (!netif_carrier_ok(netdev)) {
4663                         u32 ctrl;
4664                         e1000_get_speed_and_duplex(hw,
4665                                                    &adapter->link_speed,
4666                                                    &adapter->link_duplex);
4667
4668                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4669                         /* Links status message must follow this format */
4670                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4671                                  "Flow Control: %s\n",
4672                                netdev->name,
4673                                adapter->link_speed,
4674                                adapter->link_duplex == FULL_DUPLEX ?
4675                                  "Full Duplex" : "Half Duplex",
4676                                ((ctrl & E1000_CTRL_TFCE) &&
4677                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4678                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4679                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4680                         /* adjust timeout factor according to speed/duplex */
4681                         adapter->tx_timeout_factor = 1;
4682                         switch (adapter->link_speed) {
4683                         case SPEED_10:
4684                                 adapter->tx_timeout_factor = 14;
4685                                 break;
4686                         case SPEED_100:
4687                                 /* maybe add some timeout factor ? */
4688                                 break;
4689                         default:
4690                                 break;
4691                         }
4692
4693                         netif_carrier_on(netdev);
4694                         netif_tx_wake_all_queues(netdev);
4695
4696                         igb_ping_all_vfs(adapter);
4697 #ifdef IFLA_VF_MAX
4698                         igb_check_vf_rate_limit(adapter);
4699 #endif /* IFLA_VF_MAX */
4700
4701                         /* link state has changed, schedule phy info update */
4702                         if (!test_bit(__IGB_DOWN, &adapter->state))
4703                                 mod_timer(&adapter->phy_info_timer,
4704                                           round_jiffies(jiffies + 2 * HZ));
4705                 }
4706         } else {
4707                 if (netif_carrier_ok(netdev)) {
4708                         adapter->link_speed = 0;
4709                         adapter->link_duplex = 0;
4710                         /* check for thermal sensor event on i350 */
4711                         if (hw->mac.type == e1000_i350) {
4712                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4713                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4714                                 if ((hw->phy.media_type ==
4715                                         e1000_media_type_copper) &&
4716                                         !(ctrl_ext &
4717                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4718                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4719                                                 printk(KERN_ERR "igb: %s The "
4720                                                 "network adapter was stopped "
4721                                                 "because it overheated.\n",
4722                                                 netdev->name);
4723                                         }
4724                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4725                                                 printk(KERN_INFO
4726                                                         "igb: %s The network "
4727                                                         "adapter supported "
4728                                                         "link speed "
4729                                                         "was downshifted "
4730                                                         "because it "
4731                                                         "overheated.\n",
4732                                                         netdev->name);
4733                                         }
4734                                 }
4735                         }
4736
4737                         /* Links status message must follow this format */
4738                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4739                                netdev->name);
4740                         netif_carrier_off(netdev);
4741                         netif_tx_stop_all_queues(netdev);
4742
4743                         igb_ping_all_vfs(adapter);
4744
4745                         /* link state has changed, schedule phy info update */
4746                         if (!test_bit(__IGB_DOWN, &adapter->state))
4747                                 mod_timer(&adapter->phy_info_timer,
4748                                           round_jiffies(jiffies + 2 * HZ));
4749                         /* link is down, time to check for alternate media */
4750                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4751                                 igb_check_swap_media(adapter);
4752                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4753                                         schedule_work(&adapter->reset_task);
4754                                         /* return immediately */
4755                                         return;
4756                                 }
4757                         }
4758                         pm_schedule_suspend(netdev->dev.parent,
4759                                             MSEC_PER_SEC * 5);
4760
4761                 /* also check for alternate media here */
4762                 } else if (!netif_carrier_ok(netdev) &&
4763                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4764                         hw->mac.ops.power_up_serdes(hw);
4765                         igb_check_swap_media(adapter);
4766                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4767                                 schedule_work(&adapter->reset_task);
4768                                 /* return immediately */
4769                                 return;
4770                         }
4771                 }
4772         }
4773
4774         igb_update_stats(adapter);
4775
4776         for (i = 0; i < adapter->num_tx_queues; i++) {
4777                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4778                 if (!netif_carrier_ok(netdev)) {
4779                         /* We've lost link, so the controller stops DMA,
4780                          * but we've got queued Tx work that's never going
4781                          * to get done, so reset controller to flush Tx.
4782                          * (Do the reset outside of interrupt context). */
4783                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4784                                 adapter->tx_timeout_count++;
4785                                 schedule_work(&adapter->reset_task);
4786                                 /* return immediately since reset is imminent */
4787                                 return;
4788                         }
4789                 }
4790
4791                 /* Force detection of hung controller every watchdog period */
4792                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4793         }
4794
4795         /* Cause software interrupt to ensure rx ring is cleaned */
4796         if (adapter->msix_entries) {
4797                 u32 eics = 0;
4798                 for (i = 0; i < adapter->num_q_vectors; i++)
4799                         eics |= adapter->q_vector[i]->eims_value;
4800                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4801         } else {
4802                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4803         }
4804
4805         igb_spoof_check(adapter);
4806
4807         /* Reset the timer */
4808         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4809                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4810                         mod_timer(&adapter->watchdog_timer,
4811                                   round_jiffies(jiffies +  HZ));
4812                 else
4813                         mod_timer(&adapter->watchdog_timer,
4814                                   round_jiffies(jiffies + 2 * HZ));
4815         }
4816 }
4817
4818 static void igb_dma_err_task(struct work_struct *work)
4819 {
4820         struct igb_adapter *adapter = container_of(work,
4821                                                    struct igb_adapter,
4822                                                    dma_err_task);
4823         int vf;
4824         struct e1000_hw *hw = &adapter->hw;
4825         struct net_device *netdev = adapter->netdev;
4826         u32 hgptc;
4827         u32 ciaa, ciad;
4828
4829         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4830         if (hgptc) /* If incrementing then no need for the check below */
4831                 goto dma_timer_reset;
4832         /*
4833          * Check to see if a bad DMA write target from an errant or
4834          * malicious VF has caused a PCIe error.  If so then we can
4835          * issue a VFLR to the offending VF(s) and then resume without
4836          * requesting a full slot reset.
4837          */
4838
4839         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4840                 ciaa = (vf << 16) | 0x80000000;
4841                 /* 32 bit read so align, we really want status at offset 6 */
4842                 ciaa |= PCI_COMMAND;
4843                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4844                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4845                 ciaa &= 0x7FFFFFFF;
4846                 /* disable debug mode asap after reading data */
4847                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4848                 /* Get the upper 16 bits which will be the PCI status reg */
4849                 ciad >>= 16;
4850                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4851                             PCI_STATUS_REC_TARGET_ABORT |
4852                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4853                         netdev_err(netdev, "VF %d suffered error\n", vf);
4854                         /* Issue VFLR */
4855                         ciaa = (vf << 16) | 0x80000000;
4856                         ciaa |= 0xA8;
4857                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4858                         ciad = 0x00008000;  /* VFLR */
4859                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4860                         ciaa &= 0x7FFFFFFF;
4861                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4862                 }
4863         }
4864 dma_timer_reset:
4865         /* Reset the timer */
4866         if (!test_bit(__IGB_DOWN, &adapter->state))
4867                 mod_timer(&adapter->dma_err_timer,
4868                           round_jiffies(jiffies + HZ / 10));
4869 }
4870
4871 /**
4872  * igb_dma_err_timer - Timer Call-back
4873  * @data: pointer to adapter cast into an unsigned long
4874  **/
4875 #ifdef HAVE_TIMER_SETUP
4876 static void igb_dma_err_timer(struct timer_list *t)
4877 {
4878         struct igb_adapter *adapter = from_timer(adapter, t, dma_err_timer);
4879 #else
4880 static void igb_dma_err_timer(unsigned long data)
4881 {
4882         struct igb_adapter *adapter = (struct igb_adapter *)data;
4883 #endif
4884         /* Do the rest outside of interrupt context */
4885         schedule_work(&adapter->dma_err_task);
4886 }
4887
4888 enum latency_range {
4889         lowest_latency = 0,
4890         low_latency = 1,
4891         bulk_latency = 2,
4892         latency_invalid = 255
4893 };
4894
4895 /**
4896  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4897  *
4898  *      Stores a new ITR value based on strictly on packet size.  This
4899  *      algorithm is less sophisticated than that used in igb_update_itr,
4900  *      due to the difficulty of synchronizing statistics across multiple
4901  *      receive rings.  The divisors and thresholds used by this function
4902  *      were determined based on theoretical maximum wire speed and testing
4903  *      data, in order to minimize response time while increasing bulk
4904  *      throughput.
4905  *      This functionality is controlled by the InterruptThrottleRate module
4906  *      parameter (see igb_param.c)
4907  *      NOTE:  This function is called only when operating in a multiqueue
4908  *             receive environment.
4909  * @q_vector: pointer to q_vector
4910  **/
4911 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4912 {
4913         int new_val = q_vector->itr_val;
4914         int avg_wire_size = 0;
4915         struct igb_adapter *adapter = q_vector->adapter;
4916         unsigned int packets;
4917
4918         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4919          * ints/sec - ITR timer value of 120 ticks.
4920          */
4921         switch (adapter->link_speed) {
4922         case SPEED_10:
4923         case SPEED_100:
4924                 new_val = IGB_4K_ITR;
4925                 goto set_itr_val;
4926         default:
4927                 break;
4928         }
4929
4930         packets = q_vector->rx.total_packets;
4931         if (packets)
4932                 avg_wire_size = q_vector->rx.total_bytes / packets;
4933
4934         packets = q_vector->tx.total_packets;
4935         if (packets)
4936                 avg_wire_size = max_t(u32, avg_wire_size,
4937                                       q_vector->tx.total_bytes / packets);
4938
4939         /* if avg_wire_size isn't set no work was done */
4940         if (!avg_wire_size)
4941                 goto clear_counts;
4942
4943         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4944         avg_wire_size += 24;
4945
4946         /* Don't starve jumbo frames */
4947         avg_wire_size = min(avg_wire_size, 3000);
4948
4949         /* Give a little boost to mid-size frames */
4950         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4951                 new_val = avg_wire_size / 3;
4952         else
4953                 new_val = avg_wire_size / 2;
4954
4955         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4956         if (new_val < IGB_20K_ITR &&
4957             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4958              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4959                 new_val = IGB_20K_ITR;
4960
4961 set_itr_val:
4962         if (new_val != q_vector->itr_val) {
4963                 q_vector->itr_val = new_val;
4964                 q_vector->set_itr = 1;
4965         }
4966 clear_counts:
4967         q_vector->rx.total_bytes = 0;
4968         q_vector->rx.total_packets = 0;
4969         q_vector->tx.total_bytes = 0;
4970         q_vector->tx.total_packets = 0;
4971 }
4972
4973 /**
4974  * igb_update_itr - update the dynamic ITR value based on statistics
4975  *      Stores a new ITR value based on packets and byte
4976  *      counts during the last interrupt.  The advantage of per interrupt
4977  *      computation is faster updates and more accurate ITR for the current
4978  *      traffic pattern.  Constants in this function were computed
4979  *      based on theoretical maximum wire speed and thresholds were set based
4980  *      on testing data as well as attempting to minimize response time
4981  *      while increasing bulk throughput.
4982  *      this functionality is controlled by the InterruptThrottleRate module
4983  *      parameter (see igb_param.c)
4984  *      NOTE:  These calculations are only valid when operating in a single-
4985  *             queue environment.
4986  * @q_vector: pointer to q_vector
4987  * @ring_container: ring info to update the itr for
4988  **/
4989 static void igb_update_itr(struct igb_q_vector *q_vector,
4990                            struct igb_ring_container *ring_container)
4991 {
4992         unsigned int packets = ring_container->total_packets;
4993         unsigned int bytes = ring_container->total_bytes;
4994         u8 itrval = ring_container->itr;
4995
4996         /* no packets, exit with status unchanged */
4997         if (packets == 0)
4998                 return;
4999
5000         switch (itrval) {
5001         case lowest_latency:
5002                 /* handle TSO and jumbo frames */
5003                 if (bytes/packets > 8000)
5004                         itrval = bulk_latency;
5005                 else if ((packets < 5) && (bytes > 512))
5006                         itrval = low_latency;
5007                 break;
5008         case low_latency:  /* 50 usec aka 20000 ints/s */
5009                 if (bytes > 10000) {
5010                         /* this if handles the TSO accounting */
5011                         if (bytes/packets > 8000) {
5012                                 itrval = bulk_latency;
5013                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
5014                                 itrval = bulk_latency;
5015                         } else if (packets > 35) {
5016                                 itrval = lowest_latency;
5017                         }
5018                 } else if (bytes/packets > 2000) {
5019                         itrval = bulk_latency;
5020                 } else if (packets <= 2 && bytes < 512) {
5021                         itrval = lowest_latency;
5022                 }
5023                 break;
5024         case bulk_latency: /* 250 usec aka 4000 ints/s */
5025                 if (bytes > 25000) {
5026                         if (packets > 35)
5027                                 itrval = low_latency;
5028                 } else if (bytes < 1500) {
5029                         itrval = low_latency;
5030                 }
5031                 break;
5032         }
5033
5034         /* clear work counters since we have the values we need */
5035         ring_container->total_bytes = 0;
5036         ring_container->total_packets = 0;
5037
5038         /* write updated itr to ring container */
5039         ring_container->itr = itrval;
5040 }
5041
5042 static void igb_set_itr(struct igb_q_vector *q_vector)
5043 {
5044         struct igb_adapter *adapter = q_vector->adapter;
5045         u32 new_itr = q_vector->itr_val;
5046         u8 current_itr = 0;
5047
5048         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5049         switch (adapter->link_speed) {
5050         case SPEED_10:
5051         case SPEED_100:
5052                 current_itr = 0;
5053                 new_itr = IGB_4K_ITR;
5054                 goto set_itr_now;
5055         default:
5056                 break;
5057         }
5058
5059         igb_update_itr(q_vector, &q_vector->tx);
5060         igb_update_itr(q_vector, &q_vector->rx);
5061
5062         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5063
5064         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5065         if (current_itr == lowest_latency &&
5066             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5067              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5068                 current_itr = low_latency;
5069
5070         switch (current_itr) {
5071         /* counts and packets in update_itr are dependent on these numbers */
5072         case lowest_latency:
5073                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5074                 break;
5075         case low_latency:
5076                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5077                 break;
5078         case bulk_latency:
5079                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5080                 break;
5081         default:
5082                 break;
5083         }
5084
5085 set_itr_now:
5086         if (new_itr != q_vector->itr_val) {
5087                 /* this attempts to bias the interrupt rate towards Bulk
5088                  * by adding intermediate steps when interrupt rate is
5089                  * increasing */
5090                 new_itr = new_itr > q_vector->itr_val ?
5091                              max((new_itr * q_vector->itr_val) /
5092                                  (new_itr + (q_vector->itr_val >> 2)),
5093                                  new_itr) :
5094                              new_itr;
5095                 /* Don't write the value here; it resets the adapter's
5096                  * internal timer, and causes us to delay far longer than
5097                  * we should between interrupts.  Instead, we write the ITR
5098                  * value at the beginning of the next interrupt so the timing
5099                  * ends up being correct.
5100                  */
5101                 q_vector->itr_val = new_itr;
5102                 q_vector->set_itr = 1;
5103         }
5104 }
5105
5106 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5107                      u32 type_tucmd, u32 mss_l4len_idx)
5108 {
5109         struct e1000_adv_tx_context_desc *context_desc;
5110         u16 i = tx_ring->next_to_use;
5111
5112         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5113
5114         i++;
5115         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5116
5117         /* set bits to identify this as an advanced context descriptor */
5118         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5119
5120         /* For 82575, context index must be unique per ring. */
5121         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5122                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5123
5124         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5125         context_desc->seqnum_seed       = 0;
5126         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5127         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5128 }
5129
5130 static int igb_tso(struct igb_ring *tx_ring,
5131                    struct igb_tx_buffer *first,
5132                    u8 *hdr_len)
5133 {
5134 #ifdef NETIF_F_TSO
5135         struct sk_buff *skb = first->skb;
5136         u32 vlan_macip_lens, type_tucmd;
5137         u32 mss_l4len_idx, l4len;
5138
5139         if (skb->ip_summed != CHECKSUM_PARTIAL)
5140                 return 0;
5141
5142         if (!skb_is_gso(skb))
5143 #endif /* NETIF_F_TSO */
5144                 return 0;
5145 #ifdef NETIF_F_TSO
5146
5147         if (skb_header_cloned(skb)) {
5148                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5149                 if (err)
5150                         return err;
5151         }
5152
5153         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5154         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5155
5156         if (first->protocol == __constant_htons(ETH_P_IP)) {
5157                 struct iphdr *iph = ip_hdr(skb);
5158                 iph->tot_len = 0;
5159                 iph->check = 0;
5160                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5161                                                          iph->daddr, 0,
5162                                                          IPPROTO_TCP,
5163                                                          0);
5164                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5165                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5166                                    IGB_TX_FLAGS_CSUM |
5167                                    IGB_TX_FLAGS_IPV4;
5168 #ifdef NETIF_F_TSO6
5169         } else if (skb_is_gso_v6(skb)) {
5170                 ipv6_hdr(skb)->payload_len = 0;
5171                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5172                                                        &ipv6_hdr(skb)->daddr,
5173                                                        0, IPPROTO_TCP, 0);
5174                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5175                                    IGB_TX_FLAGS_CSUM;
5176 #endif
5177         }
5178
5179         /* compute header lengths */
5180         l4len = tcp_hdrlen(skb);
5181         *hdr_len = skb_transport_offset(skb) + l4len;
5182
5183         /* update gso size and bytecount with header size */
5184         first->gso_segs = skb_shinfo(skb)->gso_segs;
5185         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5186
5187         /* MSS L4LEN IDX */
5188         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5189         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5190
5191         /* VLAN MACLEN IPLEN */
5192         vlan_macip_lens = skb_network_header_len(skb);
5193         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5194         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5195
5196         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5197
5198         return 1;
5199 #endif  /* NETIF_F_TSO */
5200 }
5201
5202 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5203 {
5204         struct sk_buff *skb = first->skb;
5205         u32 vlan_macip_lens = 0;
5206         u32 mss_l4len_idx = 0;
5207         u32 type_tucmd = 0;
5208
5209         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5210                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5211                         return;
5212         } else {
5213                 u8 nexthdr = 0;
5214                 switch (first->protocol) {
5215                 case __constant_htons(ETH_P_IP):
5216                         vlan_macip_lens |= skb_network_header_len(skb);
5217                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5218                         nexthdr = ip_hdr(skb)->protocol;
5219                         break;
5220 #ifdef NETIF_F_IPV6_CSUM
5221                 case __constant_htons(ETH_P_IPV6):
5222                         vlan_macip_lens |= skb_network_header_len(skb);
5223                         nexthdr = ipv6_hdr(skb)->nexthdr;
5224                         break;
5225 #endif
5226                 default:
5227                         if (unlikely(net_ratelimit())) {
5228                                 dev_warn(tx_ring->dev,
5229                                  "partial checksum but proto=%x!\n",
5230                                  first->protocol);
5231                         }
5232                         break;
5233                 }
5234
5235                 switch (nexthdr) {
5236                 case IPPROTO_TCP:
5237                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5238                         mss_l4len_idx = tcp_hdrlen(skb) <<
5239                                         E1000_ADVTXD_L4LEN_SHIFT;
5240                         break;
5241 #ifdef HAVE_SCTP
5242                 case IPPROTO_SCTP:
5243                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5244                         mss_l4len_idx = sizeof(struct sctphdr) <<
5245                                         E1000_ADVTXD_L4LEN_SHIFT;
5246                         break;
5247 #endif
5248                 case IPPROTO_UDP:
5249                         mss_l4len_idx = sizeof(struct udphdr) <<
5250                                         E1000_ADVTXD_L4LEN_SHIFT;
5251                         break;
5252                 default:
5253                         if (unlikely(net_ratelimit())) {
5254                                 dev_warn(tx_ring->dev,
5255                                  "partial checksum but l4 proto=%x!\n",
5256                                  nexthdr);
5257                         }
5258                         break;
5259                 }
5260
5261                 /* update TX checksum flag */
5262                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5263         }
5264
5265         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5266         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5267
5268         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5269 }
5270
5271 #define IGB_SET_FLAG(_input, _flag, _result) \
5272         ((_flag <= _result) ? \
5273          ((u32)(_input & _flag) * (_result / _flag)) : \
5274          ((u32)(_input & _flag) / (_flag / _result)))
5275
5276 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5277 {
5278         /* set type for advanced descriptor with frame checksum insertion */
5279         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5280                        E1000_ADVTXD_DCMD_DEXT |
5281                        E1000_ADVTXD_DCMD_IFCS;
5282
5283         /* set HW vlan bit if vlan is present */
5284         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5285                                  (E1000_ADVTXD_DCMD_VLE));
5286
5287         /* set segmentation bits for TSO */
5288         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5289                                  (E1000_ADVTXD_DCMD_TSE));
5290
5291         /* set timestamp bit if present */
5292         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5293                                  (E1000_ADVTXD_MAC_TSTAMP));
5294
5295         return cmd_type;
5296 }
5297
5298 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5299                                  union e1000_adv_tx_desc *tx_desc,
5300                                  u32 tx_flags, unsigned int paylen)
5301 {
5302         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5303
5304         /* 82575 requires a unique index per ring */
5305         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5306                 olinfo_status |= tx_ring->reg_idx << 4;
5307
5308         /* insert L4 checksum */
5309         olinfo_status |= IGB_SET_FLAG(tx_flags,
5310                                       IGB_TX_FLAGS_CSUM,
5311                                       (E1000_TXD_POPTS_TXSM << 8));
5312
5313         /* insert IPv4 checksum */
5314         olinfo_status |= IGB_SET_FLAG(tx_flags,
5315                                       IGB_TX_FLAGS_IPV4,
5316                                       (E1000_TXD_POPTS_IXSM << 8));
5317
5318         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5319 }
5320
5321 static void igb_tx_map(struct igb_ring *tx_ring,
5322                        struct igb_tx_buffer *first,
5323                        const u8 hdr_len)
5324 {
5325         struct sk_buff *skb = first->skb;
5326         struct igb_tx_buffer *tx_buffer;
5327         union e1000_adv_tx_desc *tx_desc;
5328         struct skb_frag_struct *frag;
5329         dma_addr_t dma;
5330         unsigned int data_len, size;
5331         u32 tx_flags = first->tx_flags;
5332         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5333         u16 i = tx_ring->next_to_use;
5334
5335         tx_desc = IGB_TX_DESC(tx_ring, i);
5336
5337         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5338
5339         size = skb_headlen(skb);
5340         data_len = skb->data_len;
5341
5342         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5343
5344         tx_buffer = first;
5345
5346         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5347                 if (dma_mapping_error(tx_ring->dev, dma))
5348                         goto dma_error;
5349
5350                 /* record length, and DMA address */
5351                 dma_unmap_len_set(tx_buffer, len, size);
5352                 dma_unmap_addr_set(tx_buffer, dma, dma);
5353
5354                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5355
5356                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5357                         tx_desc->read.cmd_type_len =
5358                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5359
5360                         i++;
5361                         tx_desc++;
5362                         if (i == tx_ring->count) {
5363                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5364                                 i = 0;
5365                         }
5366                         tx_desc->read.olinfo_status = 0;
5367
5368                         dma += IGB_MAX_DATA_PER_TXD;
5369                         size -= IGB_MAX_DATA_PER_TXD;
5370
5371                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5372                 }
5373
5374                 if (likely(!data_len))
5375                         break;
5376
5377                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5378
5379                 i++;
5380                 tx_desc++;
5381                 if (i == tx_ring->count) {
5382                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5383                         i = 0;
5384                 }
5385                 tx_desc->read.olinfo_status = 0;
5386
5387                 size = skb_frag_size(frag);
5388                 data_len -= size;
5389
5390                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5391                                        size, DMA_TO_DEVICE);
5392
5393                 tx_buffer = &tx_ring->tx_buffer_info[i];
5394         }
5395
5396         /* write last descriptor with RS and EOP bits */
5397         cmd_type |= size | IGB_TXD_DCMD;
5398         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5399
5400         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5401         /* set the timestamp */
5402         first->time_stamp = jiffies;
5403
5404         /*
5405          * Force memory writes to complete before letting h/w know there
5406          * are new descriptors to fetch.  (Only applicable for weak-ordered
5407          * memory model archs, such as IA-64).
5408          *
5409          * We also need this memory barrier to make certain all of the
5410          * status bits have been updated before next_to_watch is written.
5411          */
5412         wmb();
5413
5414         /* set next_to_watch value indicating a packet is present */
5415         first->next_to_watch = tx_desc;
5416
5417         i++;
5418         if (i == tx_ring->count)
5419                 i = 0;
5420
5421         tx_ring->next_to_use = i;
5422
5423         writel(i, tx_ring->tail);
5424
5425         /* we need this if more than one processor can write to our tail
5426          * at a time, it syncronizes IO on IA64/Altix systems */
5427         mmiowb();
5428
5429         return;
5430
5431 dma_error:
5432         dev_err(tx_ring->dev, "TX DMA map failed\n");
5433
5434         /* clear dma mappings for failed tx_buffer_info map */
5435         for (;;) {
5436                 tx_buffer = &tx_ring->tx_buffer_info[i];
5437                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5438                 if (tx_buffer == first)
5439                         break;
5440                 if (i == 0)
5441                         i = tx_ring->count;
5442                 i--;
5443         }
5444
5445         tx_ring->next_to_use = i;
5446 }
5447
5448 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5449 {
5450         struct net_device *netdev = netdev_ring(tx_ring);
5451
5452         if (netif_is_multiqueue(netdev))
5453                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5454         else
5455                 netif_stop_queue(netdev);
5456
5457         /* Herbert's original patch had:
5458          *  smp_mb__after_netif_stop_queue();
5459          * but since that doesn't exist yet, just open code it. */
5460         smp_mb();
5461
5462         /* We need to check again in a case another CPU has just
5463          * made room available. */
5464         if (igb_desc_unused(tx_ring) < size)
5465                 return -EBUSY;
5466
5467         /* A reprieve! */
5468         if (netif_is_multiqueue(netdev))
5469                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5470         else
5471                 netif_wake_queue(netdev);
5472
5473         tx_ring->tx_stats.restart_queue++;
5474
5475         return 0;
5476 }
5477
5478 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5479 {
5480         if (igb_desc_unused(tx_ring) >= size)
5481                 return 0;
5482         return __igb_maybe_stop_tx(tx_ring, size);
5483 }
5484
5485 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5486                                 struct igb_ring *tx_ring)
5487 {
5488         struct igb_tx_buffer *first;
5489         int tso;
5490         u32 tx_flags = 0;
5491 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5492         unsigned short f;
5493 #endif
5494         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5495         __be16 protocol = vlan_get_protocol(skb);
5496         u8 hdr_len = 0;
5497
5498         /*
5499          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5500          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5501          *       + 2 desc gap to keep tail from touching head,
5502          *       + 1 desc for context descriptor,
5503          * otherwise try next time
5504          */
5505 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5506         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5507                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5508 #else
5509         count += skb_shinfo(skb)->nr_frags;
5510 #endif
5511         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5512                 /* this is a hard error */
5513                 return NETDEV_TX_BUSY;
5514         }
5515
5516         /* record the location of the first descriptor for this packet */
5517         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5518         first->skb = skb;
5519         first->bytecount = skb->len;
5520         first->gso_segs = 1;
5521
5522         skb_tx_timestamp(skb);
5523
5524 #ifdef HAVE_PTP_1588_CLOCK
5525         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5526                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5527                 if (!adapter->ptp_tx_skb) {
5528                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5529                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5530
5531                         adapter->ptp_tx_skb = skb_get(skb);
5532                         adapter->ptp_tx_start = jiffies;
5533                         if (adapter->hw.mac.type == e1000_82576)
5534                                 schedule_work(&adapter->ptp_tx_work);
5535                 }
5536         }
5537 #endif /* HAVE_PTP_1588_CLOCK */
5538
5539         if (vlan_tx_tag_present(skb)) {
5540                 tx_flags |= IGB_TX_FLAGS_VLAN;
5541                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5542         }
5543
5544         /* record initial flags and protocol */
5545         first->tx_flags = tx_flags;
5546         first->protocol = protocol;
5547
5548         tso = igb_tso(tx_ring, first, &hdr_len);
5549         if (tso < 0)
5550                 goto out_drop;
5551         else if (!tso)
5552                 igb_tx_csum(tx_ring, first);
5553
5554         igb_tx_map(tx_ring, first, hdr_len);
5555
5556 #ifndef HAVE_TRANS_START_IN_QUEUE
5557         netdev_ring(tx_ring)->trans_start = jiffies;
5558
5559 #endif
5560         /* Make sure there is space in the ring for the next send. */
5561         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5562
5563         return NETDEV_TX_OK;
5564
5565 out_drop:
5566         igb_unmap_and_free_tx_resource(tx_ring, first);
5567
5568         return NETDEV_TX_OK;
5569 }
5570
5571 #ifdef HAVE_TX_MQ
5572 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5573                                                     struct sk_buff *skb)
5574 {
5575         unsigned int r_idx = skb->queue_mapping;
5576
5577         if (r_idx >= adapter->num_tx_queues)
5578                 r_idx = r_idx % adapter->num_tx_queues;
5579
5580         return adapter->tx_ring[r_idx];
5581 }
5582 #else
5583 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5584 #endif
5585
5586 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5587                                   struct net_device *netdev)
5588 {
5589         struct igb_adapter *adapter = netdev_priv(netdev);
5590
5591         if (test_bit(__IGB_DOWN, &adapter->state)) {
5592                 dev_kfree_skb_any(skb);
5593                 return NETDEV_TX_OK;
5594         }
5595
5596         if (skb->len <= 0) {
5597                 dev_kfree_skb_any(skb);
5598                 return NETDEV_TX_OK;
5599         }
5600
5601         /*
5602          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5603          * in order to meet this minimum size requirement.
5604          */
5605         if (skb->len < 17) {
5606                 if (skb_padto(skb, 17))
5607                         return NETDEV_TX_OK;
5608                 skb->len = 17;
5609         }
5610
5611         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5612 }
5613
5614 /**
5615  * igb_tx_timeout - Respond to a Tx Hang
5616  * @netdev: network interface device structure
5617  **/
5618 static void igb_tx_timeout(struct net_device *netdev)
5619 {
5620         struct igb_adapter *adapter = netdev_priv(netdev);
5621         struct e1000_hw *hw = &adapter->hw;
5622
5623         /* Do the reset outside of interrupt context */
5624         adapter->tx_timeout_count++;
5625
5626         if (hw->mac.type >= e1000_82580)
5627                 hw->dev_spec._82575.global_device_reset = true;
5628
5629         schedule_work(&adapter->reset_task);
5630         E1000_WRITE_REG(hw, E1000_EICS,
5631                         (adapter->eims_enable_mask & ~adapter->eims_other));
5632 }
5633
5634 static void igb_reset_task(struct work_struct *work)
5635 {
5636         struct igb_adapter *adapter;
5637         adapter = container_of(work, struct igb_adapter, reset_task);
5638
5639         igb_reinit_locked(adapter);
5640 }
5641
5642 /**
5643  * igb_get_stats - Get System Network Statistics
5644  * @netdev: network interface device structure
5645  *
5646  * Returns the address of the device statistics structure.
5647  * The statistics are updated here and also from the timer callback.
5648  **/
5649 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5650 {
5651         struct igb_adapter *adapter = netdev_priv(netdev);
5652
5653         if (!test_bit(__IGB_RESETTING, &adapter->state))
5654                 igb_update_stats(adapter);
5655
5656 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5657         /* only return the current stats */
5658         return &netdev->stats;
5659 #else
5660         /* only return the current stats */
5661         return &adapter->net_stats;
5662 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5663 }
5664
5665 /**
5666  * igb_change_mtu - Change the Maximum Transfer Unit
5667  * @netdev: network interface device structure
5668  * @new_mtu: new value for maximum frame size
5669  *
5670  * Returns 0 on success, negative on failure
5671  **/
5672 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5673 {
5674         struct igb_adapter *adapter = netdev_priv(netdev);
5675         struct e1000_hw *hw = &adapter->hw;
5676         struct pci_dev *pdev = adapter->pdev;
5677         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5678
5679         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5680                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5681                 return -EINVAL;
5682         }
5683
5684 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5685         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5686                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5687                 return -EINVAL;
5688         }
5689
5690         /* adjust max frame to be at least the size of a standard frame */
5691         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5692                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5693
5694         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5695                 usleep_range(1000, 2000);
5696
5697         /* igb_down has a dependency on max_frame_size */
5698         adapter->max_frame_size = max_frame;
5699
5700         if (netif_running(netdev))
5701                 igb_down(adapter);
5702
5703         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5704                 netdev->mtu, new_mtu);
5705         netdev->mtu = new_mtu;
5706         hw->dev_spec._82575.mtu = new_mtu;
5707
5708         if (netif_running(netdev))
5709                 igb_up(adapter);
5710         else
5711                 igb_reset(adapter);
5712
5713         clear_bit(__IGB_RESETTING, &adapter->state);
5714
5715         return 0;
5716 }
5717
5718 /**
5719  * igb_update_stats - Update the board statistics counters
5720  * @adapter: board private structure
5721  **/
5722
5723 void igb_update_stats(struct igb_adapter *adapter)
5724 {
5725 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5726         struct net_device_stats *net_stats = &adapter->netdev->stats;
5727 #else
5728         struct net_device_stats *net_stats = &adapter->net_stats;
5729 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5730         struct e1000_hw *hw = &adapter->hw;
5731 #ifdef HAVE_PCI_ERS
5732         struct pci_dev *pdev = adapter->pdev;
5733 #endif
5734         u32 reg, mpc;
5735         u16 phy_tmp;
5736         int i;
5737         u64 bytes, packets;
5738 #ifndef IGB_NO_LRO
5739         u32 flushed = 0, coal = 0;
5740         struct igb_q_vector *q_vector;
5741 #endif
5742
5743 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5744
5745         /*
5746          * Prevent stats update while adapter is being reset, or if the pci
5747          * connection is down.
5748          */
5749         if (adapter->link_speed == 0)
5750                 return;
5751 #ifdef HAVE_PCI_ERS
5752         if (pci_channel_offline(pdev))
5753                 return;
5754
5755 #endif
5756 #ifndef IGB_NO_LRO
5757         for (i = 0; i < adapter->num_q_vectors; i++) {
5758                 q_vector = adapter->q_vector[i];
5759                 if (!q_vector)
5760                         continue;
5761                 flushed += q_vector->lrolist.stats.flushed;
5762                 coal += q_vector->lrolist.stats.coal;
5763         }
5764         adapter->lro_stats.flushed = flushed;
5765         adapter->lro_stats.coal = coal;
5766
5767 #endif
5768         bytes = 0;
5769         packets = 0;
5770         for (i = 0; i < adapter->num_rx_queues; i++) {
5771                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5772                 struct igb_ring *ring = adapter->rx_ring[i];
5773                 ring->rx_stats.drops += rqdpc_tmp;
5774                 net_stats->rx_fifo_errors += rqdpc_tmp;
5775 #ifdef CONFIG_IGB_VMDQ_NETDEV
5776                 if (!ring->vmdq_netdev) {
5777                         bytes += ring->rx_stats.bytes;
5778                         packets += ring->rx_stats.packets;
5779                 }
5780 #else
5781                 bytes += ring->rx_stats.bytes;
5782                 packets += ring->rx_stats.packets;
5783 #endif
5784         }
5785
5786         net_stats->rx_bytes = bytes;
5787         net_stats->rx_packets = packets;
5788
5789         bytes = 0;
5790         packets = 0;
5791         for (i = 0; i < adapter->num_tx_queues; i++) {
5792                 struct igb_ring *ring = adapter->tx_ring[i];
5793 #ifdef CONFIG_IGB_VMDQ_NETDEV
5794                 if (!ring->vmdq_netdev) {
5795                         bytes += ring->tx_stats.bytes;
5796                         packets += ring->tx_stats.packets;
5797                 }
5798 #else
5799                 bytes += ring->tx_stats.bytes;
5800                 packets += ring->tx_stats.packets;
5801 #endif
5802         }
5803         net_stats->tx_bytes = bytes;
5804         net_stats->tx_packets = packets;
5805
5806         /* read stats registers */
5807         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5808         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5809         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5810         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5811         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5812         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5813         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5814
5815         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5816         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5817         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5818         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5819         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5820         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5821         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5822         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5823
5824         mpc = E1000_READ_REG(hw, E1000_MPC);
5825         adapter->stats.mpc += mpc;
5826         net_stats->rx_fifo_errors += mpc;
5827         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5828         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5829         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5830         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5831         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5832         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5833         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5834         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5835         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5836         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5837         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5838         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5839         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5840         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5841         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5842         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5843         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5844         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5845         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5846         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5847         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5848
5849         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5850         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5851         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5852         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5853         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5854         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5855
5856         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5857         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5858
5859         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5860         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5861
5862         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5863         /* read internal phy sepecific stats */
5864         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5865         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5866                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5867
5868                 /* this stat has invalid values on i210/i211 */
5869                 if ((hw->mac.type != e1000_i210) &&
5870                     (hw->mac.type != e1000_i211))
5871                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5872         }
5873         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5874         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5875
5876         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5877         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5878         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5879         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5880         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5881         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5882         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5883         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5884         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5885
5886         /* Fill out the OS statistics structure */
5887         net_stats->multicast = adapter->stats.mprc;
5888         net_stats->collisions = adapter->stats.colc;
5889
5890         /* Rx Errors */
5891
5892         /* RLEC on some newer hardware can be incorrect so build
5893          * our own version based on RUC and ROC */
5894         net_stats->rx_errors = adapter->stats.rxerrc +
5895                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5896                 adapter->stats.ruc + adapter->stats.roc +
5897                 adapter->stats.cexterr;
5898         net_stats->rx_length_errors = adapter->stats.ruc +
5899                                       adapter->stats.roc;
5900         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5901         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5902         net_stats->rx_missed_errors = adapter->stats.mpc;
5903
5904         /* Tx Errors */
5905         net_stats->tx_errors = adapter->stats.ecol +
5906                                adapter->stats.latecol;
5907         net_stats->tx_aborted_errors = adapter->stats.ecol;
5908         net_stats->tx_window_errors = adapter->stats.latecol;
5909         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5910
5911         /* Tx Dropped needs to be maintained elsewhere */
5912
5913         /* Phy Stats */
5914         if (hw->phy.media_type == e1000_media_type_copper) {
5915                 if ((adapter->link_speed == SPEED_1000) &&
5916                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5917                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5918                         adapter->phy_stats.idle_errors += phy_tmp;
5919                 }
5920         }
5921
5922         /* Management Stats */
5923         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5924         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5925         if (hw->mac.type > e1000_82580) {
5926                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5927                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5928                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5929                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5930         }
5931 }
5932
5933 static irqreturn_t igb_msix_other(int irq, void *data)
5934 {
5935         struct igb_adapter *adapter = data;
5936         struct e1000_hw *hw = &adapter->hw;
5937         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5938         /* reading ICR causes bit 31 of EICR to be cleared */
5939
5940         if (icr & E1000_ICR_DRSTA)
5941                 schedule_work(&adapter->reset_task);
5942
5943         if (icr & E1000_ICR_DOUTSYNC) {
5944                 /* HW is reporting DMA is out of sync */
5945                 adapter->stats.doosync++;
5946                 /* The DMA Out of Sync is also indication of a spoof event
5947                  * in IOV mode. Check the Wrong VM Behavior register to
5948                  * see if it is really a spoof event. */
5949                 igb_check_wvbr(adapter);
5950         }
5951
5952         /* Check for a mailbox event */
5953         if (icr & E1000_ICR_VMMB)
5954                 igb_msg_task(adapter);
5955
5956         if (icr & E1000_ICR_LSC) {
5957                 hw->mac.get_link_status = 1;
5958                 /* guard against interrupt when we're going down */
5959                 if (!test_bit(__IGB_DOWN, &adapter->state))
5960                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5961         }
5962
5963 #ifdef HAVE_PTP_1588_CLOCK
5964         if (icr & E1000_ICR_TS) {
5965                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5966
5967                 if (tsicr & E1000_TSICR_TXTS) {
5968                         /* acknowledge the interrupt */
5969                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5970                         /* retrieve hardware timestamp */
5971                         schedule_work(&adapter->ptp_tx_work);
5972                 }
5973         }
5974 #endif /* HAVE_PTP_1588_CLOCK */
5975
5976         /* Check for MDD event */
5977         if (icr & E1000_ICR_MDDET)
5978                 igb_process_mdd_event(adapter);
5979
5980         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5981
5982         return IRQ_HANDLED;
5983 }
5984
5985 static void igb_write_itr(struct igb_q_vector *q_vector)
5986 {
5987         struct igb_adapter *adapter = q_vector->adapter;
5988         u32 itr_val = q_vector->itr_val & 0x7FFC;
5989
5990         if (!q_vector->set_itr)
5991                 return;
5992
5993         if (!itr_val)
5994                 itr_val = 0x4;
5995
5996         if (adapter->hw.mac.type == e1000_82575)
5997                 itr_val |= itr_val << 16;
5998         else
5999                 itr_val |= E1000_EITR_CNT_IGNR;
6000
6001         writel(itr_val, q_vector->itr_register);
6002         q_vector->set_itr = 0;
6003 }
6004
6005 static irqreturn_t igb_msix_ring(int irq, void *data)
6006 {
6007         struct igb_q_vector *q_vector = data;
6008
6009         /* Write the ITR value calculated from the previous interrupt. */
6010         igb_write_itr(q_vector);
6011
6012         napi_schedule(&q_vector->napi);
6013
6014         return IRQ_HANDLED;
6015 }
6016
6017 #ifdef IGB_DCA
6018 static void igb_update_tx_dca(struct igb_adapter *adapter,
6019                               struct igb_ring *tx_ring,
6020                               int cpu)
6021 {
6022         struct e1000_hw *hw = &adapter->hw;
6023         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6024
6025         if (hw->mac.type != e1000_82575)
6026                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
6027
6028         /*
6029          * We can enable relaxed ordering for reads, but not writes when
6030          * DCA is enabled.  This is due to a known issue in some chipsets
6031          * which will cause the DCA tag to be cleared.
6032          */
6033         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6034                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6035                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6036
6037         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6038 }
6039
6040 static void igb_update_rx_dca(struct igb_adapter *adapter,
6041                               struct igb_ring *rx_ring,
6042                               int cpu)
6043 {
6044         struct e1000_hw *hw = &adapter->hw;
6045         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6046
6047         if (hw->mac.type != e1000_82575)
6048                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6049
6050         /*
6051          * We can enable relaxed ordering for reads, but not writes when
6052          * DCA is enabled.  This is due to a known issue in some chipsets
6053          * which will cause the DCA tag to be cleared.
6054          */
6055         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6056                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6057
6058         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6059 }
6060
6061 static void igb_update_dca(struct igb_q_vector *q_vector)
6062 {
6063         struct igb_adapter *adapter = q_vector->adapter;
6064         int cpu = get_cpu();
6065
6066         if (q_vector->cpu == cpu)
6067                 goto out_no_update;
6068
6069         if (q_vector->tx.ring)
6070                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6071
6072         if (q_vector->rx.ring)
6073                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6074
6075         q_vector->cpu = cpu;
6076 out_no_update:
6077         put_cpu();
6078 }
6079
6080 static void igb_setup_dca(struct igb_adapter *adapter)
6081 {
6082         struct e1000_hw *hw = &adapter->hw;
6083         int i;
6084
6085         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6086                 return;
6087
6088         /* Always use CB2 mode, difference is masked in the CB driver. */
6089         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6090
6091         for (i = 0; i < adapter->num_q_vectors; i++) {
6092                 adapter->q_vector[i]->cpu = -1;
6093                 igb_update_dca(adapter->q_vector[i]);
6094         }
6095 }
6096
6097 static int __igb_notify_dca(struct device *dev, void *data)
6098 {
6099         struct net_device *netdev = dev_get_drvdata(dev);
6100         struct igb_adapter *adapter = netdev_priv(netdev);
6101         struct pci_dev *pdev = adapter->pdev;
6102         struct e1000_hw *hw = &adapter->hw;
6103         unsigned long event = *(unsigned long *)data;
6104
6105         switch (event) {
6106         case DCA_PROVIDER_ADD:
6107                 /* if already enabled, don't do it again */
6108                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6109                         break;
6110                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6111                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6112                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6113                         igb_setup_dca(adapter);
6114                         break;
6115                 }
6116                 /* Fall Through since DCA is disabled. */
6117         case DCA_PROVIDER_REMOVE:
6118                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6119                         /* without this a class_device is left
6120                          * hanging around in the sysfs model */
6121                         dca_remove_requester(dev);
6122                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6123                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6124                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6125                 }
6126                 break;
6127         }
6128
6129         return E1000_SUCCESS;
6130 }
6131
6132 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6133                           void *p)
6134 {
6135         int ret_val;
6136
6137         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6138                                          __igb_notify_dca);
6139
6140         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6141 }
6142 #endif /* IGB_DCA */
6143
6144 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6145 {
6146         unsigned char mac_addr[ETH_ALEN];
6147
6148         random_ether_addr(mac_addr);
6149         igb_set_vf_mac(adapter, vf, mac_addr);
6150
6151 #ifdef IFLA_VF_MAX
6152 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6153         /* By default spoof check is enabled for all VFs */
6154         adapter->vf_data[vf].spoofchk_enabled = true;
6155 #endif
6156 #endif
6157
6158         return true;
6159 }
6160
6161 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6162 {
6163         struct e1000_hw *hw = &adapter->hw;
6164         u32 ping;
6165         int i;
6166
6167         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6168                 ping = E1000_PF_CONTROL_MSG;
6169                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6170                         ping |= E1000_VT_MSGTYPE_CTS;
6171                 e1000_write_mbx(hw, &ping, 1, i);
6172         }
6173 }
6174
6175 /**
6176  *  igb_mta_set_ - Set multicast filter table address
6177  *  @adapter: pointer to the adapter structure
6178  *  @hash_value: determines the MTA register and bit to set
6179  *
6180  *  The multicast table address is a register array of 32-bit registers.
6181  *  The hash_value is used to determine what register the bit is in, the
6182  *  current value is read, the new bit is OR'd in and the new value is
6183  *  written back into the register.
6184  **/
6185 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6186 {
6187         struct e1000_hw *hw = &adapter->hw;
6188         u32 hash_bit, hash_reg, mta;
6189
6190         /*
6191          * The MTA is a register array of 32-bit registers. It is
6192          * treated like an array of (32*mta_reg_count) bits.  We want to
6193          * set bit BitArray[hash_value]. So we figure out what register
6194          * the bit is in, read it, OR in the new bit, then write
6195          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6196          * mask to bits 31:5 of the hash value which gives us the
6197          * register we're modifying.  The hash bit within that register
6198          * is determined by the lower 5 bits of the hash value.
6199          */
6200         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6201         hash_bit = hash_value & 0x1F;
6202
6203         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6204
6205         mta |= (1 << hash_bit);
6206
6207         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6208         E1000_WRITE_FLUSH(hw);
6209 }
6210
6211 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6212 {
6213
6214         struct e1000_hw *hw = &adapter->hw;
6215         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6216         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6217
6218         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6219                             IGB_VF_FLAG_MULTI_PROMISC);
6220         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6221
6222 #ifdef IGB_ENABLE_VF_PROMISC
6223         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6224                 vmolr |= E1000_VMOLR_ROPE;
6225                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6226                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6227         }
6228 #endif
6229         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6230                 vmolr |= E1000_VMOLR_MPME;
6231                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6232                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6233         } else {
6234                 /*
6235                  * if we have hashes and we are clearing a multicast promisc
6236                  * flag we need to write the hashes to the MTA as this step
6237                  * was previously skipped
6238                  */
6239                 if (vf_data->num_vf_mc_hashes > 30) {
6240                         vmolr |= E1000_VMOLR_MPME;
6241                 } else if (vf_data->num_vf_mc_hashes) {
6242                         int j;
6243                         vmolr |= E1000_VMOLR_ROMPE;
6244                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6245                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6246                 }
6247         }
6248
6249         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6250
6251         /* there are flags left unprocessed, likely not supported */
6252         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6253                 return -EINVAL;
6254
6255         return 0;
6256
6257 }
6258
6259 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6260                                   u32 *msgbuf, u32 vf)
6261 {
6262         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6263         u16 *hash_list = (u16 *)&msgbuf[1];
6264         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6265         int i;
6266
6267         /* salt away the number of multicast addresses assigned
6268          * to this VF for later use to restore when the PF multi cast
6269          * list changes
6270          */
6271         vf_data->num_vf_mc_hashes = n;
6272
6273         /* only up to 30 hash values supported */
6274         if (n > 30)
6275                 n = 30;
6276
6277         /* store the hashes for later use */
6278         for (i = 0; i < n; i++)
6279                 vf_data->vf_mc_hashes[i] = hash_list[i];
6280
6281         /* Flush and reset the mta with the new values */
6282         igb_set_rx_mode(adapter->netdev);
6283
6284         return 0;
6285 }
6286
6287 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6288 {
6289         struct e1000_hw *hw = &adapter->hw;
6290         struct vf_data_storage *vf_data;
6291         int i, j;
6292
6293         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6294                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6295                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6296
6297                 vf_data = &adapter->vf_data[i];
6298
6299                 if ((vf_data->num_vf_mc_hashes > 30) ||
6300                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6301                         vmolr |= E1000_VMOLR_MPME;
6302                 } else if (vf_data->num_vf_mc_hashes) {
6303                         vmolr |= E1000_VMOLR_ROMPE;
6304                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6305                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6306                 }
6307                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6308         }
6309 }
6310
6311 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6312 {
6313         struct e1000_hw *hw = &adapter->hw;
6314         u32 pool_mask, reg, vid;
6315         u16 vlan_default;
6316         int i;
6317
6318         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6319
6320         /* Find the vlan filter for this id */
6321         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6322                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6323
6324                 /* remove the vf from the pool */
6325                 reg &= ~pool_mask;
6326
6327                 /* if pool is empty then remove entry from vfta */
6328                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6329                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6330                         reg = 0;
6331                         vid = reg & E1000_VLVF_VLANID_MASK;
6332                         igb_vfta_set(adapter, vid, FALSE);
6333                 }
6334
6335                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6336         }
6337
6338         adapter->vf_data[vf].vlans_enabled = 0;
6339
6340         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6341         if (vlan_default)
6342                 igb_vlvf_set(adapter, vlan_default, true, vf);
6343 }
6344
6345 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6346 {
6347         struct e1000_hw *hw = &adapter->hw;
6348         u32 reg, i;
6349
6350         /* The vlvf table only exists on 82576 hardware and newer */
6351         if (hw->mac.type < e1000_82576)
6352                 return -1;
6353
6354         /* we only need to do this if VMDq is enabled */
6355         if (!adapter->vmdq_pools)
6356                 return -1;
6357
6358         /* Find the vlan filter for this id */
6359         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6360                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6361                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6362                     vid == (reg & E1000_VLVF_VLANID_MASK))
6363                         break;
6364         }
6365
6366         if (add) {
6367                 if (i == E1000_VLVF_ARRAY_SIZE) {
6368                         /* Did not find a matching VLAN ID entry that was
6369                          * enabled.  Search for a free filter entry, i.e.
6370                          * one without the enable bit set
6371                          */
6372                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6373                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6374                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6375                                         break;
6376                         }
6377                 }
6378                 if (i < E1000_VLVF_ARRAY_SIZE) {
6379                         /* Found an enabled/available entry */
6380                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6381
6382                         /* if !enabled we need to set this up in vfta */
6383                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6384                                 /* add VID to filter table */
6385                                 igb_vfta_set(adapter, vid, TRUE);
6386                                 reg |= E1000_VLVF_VLANID_ENABLE;
6387                         }
6388                         reg &= ~E1000_VLVF_VLANID_MASK;
6389                         reg |= vid;
6390                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6391
6392                         /* do not modify RLPML for PF devices */
6393                         if (vf >= adapter->vfs_allocated_count)
6394                                 return E1000_SUCCESS;
6395
6396                         if (!adapter->vf_data[vf].vlans_enabled) {
6397                                 u32 size;
6398                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6399                                 size = reg & E1000_VMOLR_RLPML_MASK;
6400                                 size += 4;
6401                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6402                                 reg |= size;
6403                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6404                         }
6405
6406                         adapter->vf_data[vf].vlans_enabled++;
6407                 }
6408         } else {
6409                 if (i < E1000_VLVF_ARRAY_SIZE) {
6410                         /* remove vf from the pool */
6411                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6412                         /* if pool is empty then remove entry from vfta */
6413                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6414                                 reg = 0;
6415                                 igb_vfta_set(adapter, vid, FALSE);
6416                         }
6417                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6418
6419                         /* do not modify RLPML for PF devices */
6420                         if (vf >= adapter->vfs_allocated_count)
6421                                 return E1000_SUCCESS;
6422
6423                         adapter->vf_data[vf].vlans_enabled--;
6424                         if (!adapter->vf_data[vf].vlans_enabled) {
6425                                 u32 size;
6426                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6427                                 size = reg & E1000_VMOLR_RLPML_MASK;
6428                                 size -= 4;
6429                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6430                                 reg |= size;
6431                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6432                         }
6433                 }
6434         }
6435         return E1000_SUCCESS;
6436 }
6437
6438 #ifdef IFLA_VF_MAX
6439 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6440 {
6441         struct e1000_hw *hw = &adapter->hw;
6442
6443         if (vid)
6444                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6445         else
6446                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6447 }
6448
6449 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6450 #ifdef HAVE_VF_VLAN_PROTO
6451                                int vf, u16 vlan, u8 qos, __be16 vlan_proto)
6452 #else
6453                                int vf, u16 vlan, u8 qos)
6454 #endif
6455 {
6456         int err = 0;
6457         struct igb_adapter *adapter = netdev_priv(netdev);
6458
6459         /* VLAN IDs accepted range 0-4094 */
6460         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6461                 return -EINVAL;
6462
6463 #ifdef HAVE_VF_VLAN_PROTO
6464         if (vlan_proto != htons(ETH_P_8021Q))
6465                 return -EPROTONOSUPPORT;
6466 #endif
6467
6468         if (vlan || qos) {
6469                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6470                 if (err)
6471                         goto out;
6472                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6473                 igb_set_vmolr(adapter, vf, !vlan);
6474                 adapter->vf_data[vf].pf_vlan = vlan;
6475                 adapter->vf_data[vf].pf_qos = qos;
6476                 igb_set_vf_vlan_strip(adapter, vf, true);
6477                 dev_info(&adapter->pdev->dev,
6478                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6479                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6480                         dev_warn(&adapter->pdev->dev,
6481                                  "The VF VLAN has been set,"
6482                                  " but the PF device is not up.\n");
6483                         dev_warn(&adapter->pdev->dev,
6484                                  "Bring the PF device up before"
6485                                  " attempting to use the VF device.\n");
6486                 }
6487         } else {
6488                 if (adapter->vf_data[vf].pf_vlan)
6489                         dev_info(&adapter->pdev->dev,
6490                                  "Clearing VLAN on VF %d\n", vf);
6491                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6492                                    false, vf);
6493                 igb_set_vmvir(adapter, vlan, vf);
6494                 igb_set_vmolr(adapter, vf, true);
6495                 igb_set_vf_vlan_strip(adapter, vf, false);
6496                 adapter->vf_data[vf].pf_vlan = 0;
6497                 adapter->vf_data[vf].pf_qos = 0;
6498        }
6499 out:
6500        return err;
6501 }
6502
6503 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6504 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6505                                 bool setting)
6506 {
6507         struct igb_adapter *adapter = netdev_priv(netdev);
6508         struct e1000_hw *hw = &adapter->hw;
6509         u32 dtxswc, reg_offset;
6510
6511         if (!adapter->vfs_allocated_count)
6512                 return -EOPNOTSUPP;
6513
6514         if (vf >= adapter->vfs_allocated_count)
6515                 return -EINVAL;
6516
6517         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6518         dtxswc = E1000_READ_REG(hw, reg_offset);
6519         if (setting)
6520                 dtxswc |= ((1 << vf) |
6521                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6522         else
6523                 dtxswc &= ~((1 << vf) |
6524                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6525         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6526
6527         adapter->vf_data[vf].spoofchk_enabled = setting;
6528         return E1000_SUCCESS;
6529 }
6530 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6531 #endif /* IFLA_VF_MAX */
6532
6533 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6534 {
6535         struct e1000_hw *hw = &adapter->hw;
6536         int i;
6537         u32 reg;
6538
6539         /* Find the vlan filter for this id */
6540         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6541                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6542                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6543                     vid == (reg & E1000_VLVF_VLANID_MASK))
6544                         break;
6545         }
6546
6547         if (i >= E1000_VLVF_ARRAY_SIZE)
6548                 i = -1;
6549
6550         return i;
6551 }
6552
6553 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6554 {
6555         struct e1000_hw *hw = &adapter->hw;
6556         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6557         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6558         int err = 0;
6559
6560         if (vid)
6561                 igb_set_vf_vlan_strip(adapter, vf, true);
6562         else
6563                 igb_set_vf_vlan_strip(adapter, vf, false);
6564
6565         /* If in promiscuous mode we need to make sure the PF also has
6566          * the VLAN filter set.
6567          */
6568         if (add && (adapter->netdev->flags & IFF_PROMISC))
6569                 err = igb_vlvf_set(adapter, vid, add,
6570                                    adapter->vfs_allocated_count);
6571         if (err)
6572                 goto out;
6573
6574         err = igb_vlvf_set(adapter, vid, add, vf);
6575
6576         if (err)
6577                 goto out;
6578
6579         /* Go through all the checks to see if the VLAN filter should
6580          * be wiped completely.
6581          */
6582         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6583                 u32 vlvf, bits;
6584
6585                 int regndx = igb_find_vlvf_entry(adapter, vid);
6586                 if (regndx < 0)
6587                         goto out;
6588                 /* See if any other pools are set for this VLAN filter
6589                  * entry other than the PF.
6590                  */
6591                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6592                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6593                               adapter->vfs_allocated_count);
6594                 /* If the filter was removed then ensure PF pool bit
6595                  * is cleared if the PF only added itself to the pool
6596                  * because the PF is in promiscuous mode.
6597                  */
6598                 if ((vlvf & VLAN_VID_MASK) == vid &&
6599 #ifndef HAVE_VLAN_RX_REGISTER
6600                     !test_bit(vid, adapter->active_vlans) &&
6601 #endif
6602                     !bits)
6603                         igb_vlvf_set(adapter, vid, add,
6604                                      adapter->vfs_allocated_count);
6605         }
6606
6607 out:
6608         return err;
6609 }
6610
6611 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6612 {
6613         struct e1000_hw *hw = &adapter->hw;
6614
6615         /* clear flags except flag that the PF has set the MAC */
6616         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6617         adapter->vf_data[vf].last_nack = jiffies;
6618
6619         /* reset offloads to defaults */
6620         igb_set_vmolr(adapter, vf, true);
6621
6622         /* reset vlans for device */
6623         igb_clear_vf_vfta(adapter, vf);
6624 #ifdef IFLA_VF_MAX
6625         if (adapter->vf_data[vf].pf_vlan)
6626                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6627                                     adapter->vf_data[vf].pf_vlan,
6628 #ifdef HAVE_VF_VLAN_PROTO
6629                                     adapter->vf_data[vf].pf_qos,
6630                                     htons(ETH_P_8021Q));
6631 #else
6632                                     adapter->vf_data[vf].pf_qos);
6633 #endif
6634         else
6635                 igb_clear_vf_vfta(adapter, vf);
6636 #endif
6637
6638         /* reset multicast table array for vf */
6639         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6640
6641         /* Flush and reset the mta with the new values */
6642         igb_set_rx_mode(adapter->netdev);
6643
6644         /*
6645          * Reset the VFs TDWBAL and TDWBAH registers which are not
6646          * cleared by a VFLR
6647          */
6648         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6649         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6650         if (hw->mac.type == e1000_82576) {
6651                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6652                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6653         }
6654 }
6655
6656 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6657 {
6658         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6659
6660         /* generate a new mac address as we were hotplug removed/added */
6661         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6662                 random_ether_addr(vf_mac);
6663
6664         /* process remaining reset events */
6665         igb_vf_reset(adapter, vf);
6666 }
6667
6668 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6669 {
6670         struct e1000_hw *hw = &adapter->hw;
6671         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6672         u32 reg, msgbuf[3];
6673         u8 *addr = (u8 *)(&msgbuf[1]);
6674
6675         /* process all the same items cleared in a function level reset */
6676         igb_vf_reset(adapter, vf);
6677
6678         /* set vf mac address */
6679         igb_del_mac_filter(adapter, vf_mac, vf);
6680         igb_add_mac_filter(adapter, vf_mac, vf);
6681
6682         /* enable transmit and receive for vf */
6683         reg = E1000_READ_REG(hw, E1000_VFTE);
6684         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6685         reg = E1000_READ_REG(hw, E1000_VFRE);
6686         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6687
6688         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6689
6690         /* reply to reset with ack and vf mac address */
6691         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6692         memcpy(addr, vf_mac, 6);
6693         e1000_write_mbx(hw, msgbuf, 3, vf);
6694 }
6695
6696 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6697 {
6698         /*
6699          * The VF MAC Address is stored in a packed array of bytes
6700          * starting at the second 32 bit word of the msg array
6701          */
6702         unsigned char *addr = (unsigned char *)&msg[1];
6703         int err = -1;
6704
6705         if (is_valid_ether_addr(addr))
6706                 err = igb_set_vf_mac(adapter, vf, addr);
6707
6708         return err;
6709 }
6710
6711 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6712 {
6713         struct e1000_hw *hw = &adapter->hw;
6714         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6715         u32 msg = E1000_VT_MSGTYPE_NACK;
6716
6717         /* if device isn't clear to send it shouldn't be reading either */
6718         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6719             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6720                 e1000_write_mbx(hw, &msg, 1, vf);
6721                 vf_data->last_nack = jiffies;
6722         }
6723 }
6724
6725 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6726 {
6727         struct pci_dev *pdev = adapter->pdev;
6728         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6729         struct e1000_hw *hw = &adapter->hw;
6730         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6731         s32 retval;
6732
6733         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6734
6735         if (retval) {
6736                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6737                 return;
6738         }
6739
6740         /* this is a message we already processed, do nothing */
6741         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6742                 return;
6743
6744         /*
6745          * until the vf completes a reset it should not be
6746          * allowed to start any configuration.
6747          */
6748
6749         if (msgbuf[0] == E1000_VF_RESET) {
6750                 igb_vf_reset_msg(adapter, vf);
6751                 return;
6752         }
6753
6754         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6755                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6756                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6757                         e1000_write_mbx(hw, msgbuf, 1, vf);
6758                         vf_data->last_nack = jiffies;
6759                 }
6760                 return;
6761         }
6762
6763         switch ((msgbuf[0] & 0xFFFF)) {
6764         case E1000_VF_SET_MAC_ADDR:
6765                 retval = -EINVAL;
6766 #ifndef IGB_DISABLE_VF_MAC_SET
6767                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6768                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6769                 else
6770                         DPRINTK(DRV, INFO,
6771                                 "VF %d attempted to override administratively "
6772                                 "set MAC address\nReload the VF driver to "
6773                                 "resume operations\n", vf);
6774 #endif
6775                 break;
6776         case E1000_VF_SET_PROMISC:
6777                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6778                 break;
6779         case E1000_VF_SET_MULTICAST:
6780                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6781                 break;
6782         case E1000_VF_SET_LPE:
6783                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6784                 break;
6785         case E1000_VF_SET_VLAN:
6786                 retval = -1;
6787 #ifdef IFLA_VF_MAX
6788                 if (vf_data->pf_vlan)
6789                         DPRINTK(DRV, INFO,
6790                                 "VF %d attempted to override administratively "
6791                                 "set VLAN tag\nReload the VF driver to "
6792                                 "resume operations\n", vf);
6793                 else
6794 #endif
6795                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6796                 break;
6797         default:
6798                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6799                 retval = -E1000_ERR_MBX;
6800                 break;
6801         }
6802
6803         /* notify the VF of the results of what it sent us */
6804         if (retval)
6805                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6806         else
6807                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6808
6809         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6810
6811         e1000_write_mbx(hw, msgbuf, 1, vf);
6812 }
6813
6814 static void igb_msg_task(struct igb_adapter *adapter)
6815 {
6816         struct e1000_hw *hw = &adapter->hw;
6817         u32 vf;
6818
6819         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6820                 /* process any reset requests */
6821                 if (!e1000_check_for_rst(hw, vf))
6822                         igb_vf_reset_event(adapter, vf);
6823
6824                 /* process any messages pending */
6825                 if (!e1000_check_for_msg(hw, vf))
6826                         igb_rcv_msg_from_vf(adapter, vf);
6827
6828                 /* process any acks */
6829                 if (!e1000_check_for_ack(hw, vf))
6830                         igb_rcv_ack_from_vf(adapter, vf);
6831         }
6832 }
6833
6834 /**
6835  *  igb_set_uta - Set unicast filter table address
6836  *  @adapter: board private structure
6837  *
6838  *  The unicast table address is a register array of 32-bit registers.
6839  *  The table is meant to be used in a way similar to how the MTA is used
6840  *  however due to certain limitations in the hardware it is necessary to
6841  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6842  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6843  **/
6844 static void igb_set_uta(struct igb_adapter *adapter)
6845 {
6846         struct e1000_hw *hw = &adapter->hw;
6847         int i;
6848
6849         /* The UTA table only exists on 82576 hardware and newer */
6850         if (hw->mac.type < e1000_82576)
6851                 return;
6852
6853         /* we only need to do this if VMDq is enabled */
6854         if (!adapter->vmdq_pools)
6855                 return;
6856
6857         for (i = 0; i < hw->mac.uta_reg_count; i++)
6858                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6859 }
6860
6861 /**
6862  * igb_intr_msi - Interrupt Handler
6863  * @irq: interrupt number
6864  * @data: pointer to a network interface device structure
6865  **/
6866 static irqreturn_t igb_intr_msi(int irq, void *data)
6867 {
6868         struct igb_adapter *adapter = data;
6869         struct igb_q_vector *q_vector = adapter->q_vector[0];
6870         struct e1000_hw *hw = &adapter->hw;
6871         /* read ICR disables interrupts using IAM */
6872         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6873
6874         igb_write_itr(q_vector);
6875
6876         if (icr & E1000_ICR_DRSTA)
6877                 schedule_work(&adapter->reset_task);
6878
6879         if (icr & E1000_ICR_DOUTSYNC) {
6880                 /* HW is reporting DMA is out of sync */
6881                 adapter->stats.doosync++;
6882         }
6883
6884         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6885                 hw->mac.get_link_status = 1;
6886                 if (!test_bit(__IGB_DOWN, &adapter->state))
6887                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6888         }
6889
6890 #ifdef HAVE_PTP_1588_CLOCK
6891         if (icr & E1000_ICR_TS) {
6892                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6893
6894                 if (tsicr & E1000_TSICR_TXTS) {
6895                         /* acknowledge the interrupt */
6896                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6897                         /* retrieve hardware timestamp */
6898                         schedule_work(&adapter->ptp_tx_work);
6899                 }
6900         }
6901 #endif /* HAVE_PTP_1588_CLOCK */
6902
6903         napi_schedule(&q_vector->napi);
6904
6905         return IRQ_HANDLED;
6906 }
6907
6908 /**
6909  * igb_intr - Legacy Interrupt Handler
6910  * @irq: interrupt number
6911  * @data: pointer to a network interface device structure
6912  **/
6913 static irqreturn_t igb_intr(int irq, void *data)
6914 {
6915         struct igb_adapter *adapter = data;
6916         struct igb_q_vector *q_vector = adapter->q_vector[0];
6917         struct e1000_hw *hw = &adapter->hw;
6918         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6919          * need for the IMC write */
6920         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6921
6922         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6923          * not set, then the adapter didn't send an interrupt */
6924         if (!(icr & E1000_ICR_INT_ASSERTED))
6925                 return IRQ_NONE;
6926
6927         igb_write_itr(q_vector);
6928
6929         if (icr & E1000_ICR_DRSTA)
6930                 schedule_work(&adapter->reset_task);
6931
6932         if (icr & E1000_ICR_DOUTSYNC) {
6933                 /* HW is reporting DMA is out of sync */
6934                 adapter->stats.doosync++;
6935         }
6936
6937         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6938                 hw->mac.get_link_status = 1;
6939                 /* guard against interrupt when we're going down */
6940                 if (!test_bit(__IGB_DOWN, &adapter->state))
6941                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6942         }
6943
6944 #ifdef HAVE_PTP_1588_CLOCK
6945         if (icr & E1000_ICR_TS) {
6946                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6947
6948                 if (tsicr & E1000_TSICR_TXTS) {
6949                         /* acknowledge the interrupt */
6950                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6951                         /* retrieve hardware timestamp */
6952                         schedule_work(&adapter->ptp_tx_work);
6953                 }
6954         }
6955 #endif /* HAVE_PTP_1588_CLOCK */
6956
6957         napi_schedule(&q_vector->napi);
6958
6959         return IRQ_HANDLED;
6960 }
6961
6962 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6963 {
6964         struct igb_adapter *adapter = q_vector->adapter;
6965         struct e1000_hw *hw = &adapter->hw;
6966
6967         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6968             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6969                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6970                         igb_set_itr(q_vector);
6971                 else
6972                         igb_update_ring_itr(q_vector);
6973         }
6974
6975         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6976                 if (adapter->msix_entries)
6977                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6978                 else
6979                         igb_irq_enable(adapter);
6980         }
6981 }
6982
6983 /**
6984  * igb_poll - NAPI Rx polling callback
6985  * @napi: napi polling structure
6986  * @budget: count of how many packets we should handle
6987  **/
6988 static int igb_poll(struct napi_struct *napi, int budget)
6989 {
6990         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6991         bool clean_complete = true;
6992
6993 #ifdef IGB_DCA
6994         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6995                 igb_update_dca(q_vector);
6996 #endif
6997         if (q_vector->tx.ring)
6998                 clean_complete = igb_clean_tx_irq(q_vector);
6999
7000         if (q_vector->rx.ring)
7001                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
7002
7003 #ifndef HAVE_NETDEV_NAPI_LIST
7004         /* if netdev is disabled we need to stop polling */
7005         if (!netif_running(q_vector->adapter->netdev))
7006                 clean_complete = true;
7007
7008 #endif
7009         /* If all work not completed, return budget and keep polling */
7010         if (!clean_complete)
7011                 return budget;
7012
7013         /* If not enough Rx work done, exit the polling mode */
7014         napi_complete(napi);
7015         igb_ring_irq_enable(q_vector);
7016
7017         return 0;
7018 }
7019
7020 /**
7021  * igb_clean_tx_irq - Reclaim resources after transmit completes
7022  * @q_vector: pointer to q_vector containing needed info
7023  * returns TRUE if ring is completely cleaned
7024  **/
7025 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
7026 {
7027         struct igb_adapter *adapter = q_vector->adapter;
7028         struct igb_ring *tx_ring = q_vector->tx.ring;
7029         struct igb_tx_buffer *tx_buffer;
7030         union e1000_adv_tx_desc *tx_desc;
7031         unsigned int total_bytes = 0, total_packets = 0;
7032         unsigned int budget = q_vector->tx.work_limit;
7033         unsigned int i = tx_ring->next_to_clean;
7034
7035         if (test_bit(__IGB_DOWN, &adapter->state))
7036                 return true;
7037
7038         tx_buffer = &tx_ring->tx_buffer_info[i];
7039         tx_desc = IGB_TX_DESC(tx_ring, i);
7040         i -= tx_ring->count;
7041
7042         do {
7043                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7044
7045                 /* if next_to_watch is not set then there is no work pending */
7046                 if (!eop_desc)
7047                         break;
7048
7049                 /* prevent any other reads prior to eop_desc */
7050                 read_barrier_depends();
7051
7052                 /* if DD is not set pending work has not been completed */
7053                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7054                         break;
7055
7056                 /* clear next_to_watch to prevent false hangs */
7057                 tx_buffer->next_to_watch = NULL;
7058
7059                 /* update the statistics for this packet */
7060                 total_bytes += tx_buffer->bytecount;
7061                 total_packets += tx_buffer->gso_segs;
7062
7063                 /* free the skb */
7064                 dev_kfree_skb_any(tx_buffer->skb);
7065
7066                 /* unmap skb header data */
7067                 dma_unmap_single(tx_ring->dev,
7068                                  dma_unmap_addr(tx_buffer, dma),
7069                                  dma_unmap_len(tx_buffer, len),
7070                                  DMA_TO_DEVICE);
7071
7072                 /* clear tx_buffer data */
7073                 tx_buffer->skb = NULL;
7074                 dma_unmap_len_set(tx_buffer, len, 0);
7075
7076                 /* clear last DMA location and unmap remaining buffers */
7077                 while (tx_desc != eop_desc) {
7078                         tx_buffer++;
7079                         tx_desc++;
7080                         i++;
7081                         if (unlikely(!i)) {
7082                                 i -= tx_ring->count;
7083                                 tx_buffer = tx_ring->tx_buffer_info;
7084                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7085                         }
7086
7087                         /* unmap any remaining paged data */
7088                         if (dma_unmap_len(tx_buffer, len)) {
7089                                 dma_unmap_page(tx_ring->dev,
7090                                                dma_unmap_addr(tx_buffer, dma),
7091                                                dma_unmap_len(tx_buffer, len),
7092                                                DMA_TO_DEVICE);
7093                                 dma_unmap_len_set(tx_buffer, len, 0);
7094                         }
7095                 }
7096
7097                 /* move us one more past the eop_desc for start of next pkt */
7098                 tx_buffer++;
7099                 tx_desc++;
7100                 i++;
7101                 if (unlikely(!i)) {
7102                         i -= tx_ring->count;
7103                         tx_buffer = tx_ring->tx_buffer_info;
7104                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7105                 }
7106
7107                 /* issue prefetch for next Tx descriptor */
7108                 prefetch(tx_desc);
7109
7110                 /* update budget accounting */
7111                 budget--;
7112         } while (likely(budget));
7113
7114         netdev_tx_completed_queue(txring_txq(tx_ring),
7115                                   total_packets, total_bytes);
7116
7117         i += tx_ring->count;
7118         tx_ring->next_to_clean = i;
7119         tx_ring->tx_stats.bytes += total_bytes;
7120         tx_ring->tx_stats.packets += total_packets;
7121         q_vector->tx.total_bytes += total_bytes;
7122         q_vector->tx.total_packets += total_packets;
7123
7124 #ifdef DEBUG
7125         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7126             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7127 #else
7128         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7129 #endif
7130                 struct e1000_hw *hw = &adapter->hw;
7131
7132                 /* Detect a transmit hang in hardware, this serializes the
7133                  * check with the clearing of time_stamp and movement of i */
7134                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7135                 if (tx_buffer->next_to_watch &&
7136                     time_after(jiffies, tx_buffer->time_stamp +
7137                                (adapter->tx_timeout_factor * HZ))
7138                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7139                          E1000_STATUS_TXOFF)) {
7140
7141                         /* detected Tx unit hang */
7142 #ifdef DEBUG
7143                         adapter->tx_hang_detected = TRUE;
7144                         if (adapter->disable_hw_reset) {
7145                                 DPRINTK(DRV, WARNING,
7146                                         "Deactivating netdev watchdog timer\n");
7147                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7148                                         dev_put(netdev_ring(tx_ring));
7149 #ifndef HAVE_NET_DEVICE_OPS
7150                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7151 #endif
7152                         }
7153 #endif /* DEBUG */
7154                         dev_err(tx_ring->dev,
7155                                 "Detected Tx Unit Hang\n"
7156                                 "  Tx Queue             <%d>\n"
7157                                 "  TDH                  <%x>\n"
7158                                 "  TDT                  <%x>\n"
7159                                 "  next_to_use          <%x>\n"
7160                                 "  next_to_clean        <%x>\n"
7161                                 "buffer_info[next_to_clean]\n"
7162                                 "  time_stamp           <%lx>\n"
7163                                 "  next_to_watch        <%p>\n"
7164                                 "  jiffies              <%lx>\n"
7165                                 "  desc.status          <%x>\n",
7166                                 tx_ring->queue_index,
7167                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7168                                 readl(tx_ring->tail),
7169                                 tx_ring->next_to_use,
7170                                 tx_ring->next_to_clean,
7171                                 tx_buffer->time_stamp,
7172                                 tx_buffer->next_to_watch,
7173                                 jiffies,
7174                                 tx_buffer->next_to_watch->wb.status);
7175                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7176                                 netif_stop_subqueue(netdev_ring(tx_ring),
7177                                                     ring_queue_index(tx_ring));
7178                         else
7179                                 netif_stop_queue(netdev_ring(tx_ring));
7180
7181                         /* we are about to reset, no point in enabling stuff */
7182                         return true;
7183                 }
7184         }
7185
7186 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7187         if (unlikely(total_packets &&
7188                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7189                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7190                 /* Make sure that anybody stopping the queue after this
7191                  * sees the new next_to_clean.
7192                  */
7193                 smp_mb();
7194                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7195                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7196                                                      ring_queue_index(tx_ring)) &&
7197                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7198                                 netif_wake_subqueue(netdev_ring(tx_ring),
7199                                                     ring_queue_index(tx_ring));
7200                                 tx_ring->tx_stats.restart_queue++;
7201                         }
7202                 } else {
7203                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7204                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7205                                 netif_wake_queue(netdev_ring(tx_ring));
7206                                 tx_ring->tx_stats.restart_queue++;
7207                         }
7208                 }
7209         }
7210
7211         return !!budget;
7212 }
7213
7214 #ifdef HAVE_VLAN_RX_REGISTER
7215 /**
7216  * igb_receive_skb - helper function to handle rx indications
7217  * @q_vector: structure containing interrupt and ring information
7218  * @skb: packet to send up
7219  **/
7220 static void igb_receive_skb(struct igb_q_vector *q_vector,
7221                             struct sk_buff *skb)
7222 {
7223         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7224
7225         if (IGB_CB(skb)->vid) {
7226                 if (*vlgrp) {
7227                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7228                                          IGB_CB(skb)->vid, skb);
7229                 } else {
7230                         dev_kfree_skb_any(skb);
7231                 }
7232         } else {
7233                 napi_gro_receive(&q_vector->napi, skb);
7234         }
7235 }
7236
7237 #endif /* HAVE_VLAN_RX_REGISTER */
7238 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7239 /**
7240  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7241  * @rx_ring: rx descriptor ring to store buffers on
7242  * @old_buff: donor buffer to have page reused
7243  *
7244  * Synchronizes page for reuse by the adapter
7245  **/
7246 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7247                               struct igb_rx_buffer *old_buff)
7248 {
7249         struct igb_rx_buffer *new_buff;
7250         u16 nta = rx_ring->next_to_alloc;
7251
7252         new_buff = &rx_ring->rx_buffer_info[nta];
7253
7254         /* update, and store next to alloc */
7255         nta++;
7256         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7257
7258         /* transfer page from old buffer to new buffer */
7259         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7260
7261         /* sync the buffer for use by the device */
7262         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7263                                          old_buff->page_offset,
7264                                          IGB_RX_BUFSZ,
7265                                          DMA_FROM_DEVICE);
7266 }
7267
7268 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7269                                   struct page *page,
7270                                   unsigned int truesize)
7271 {
7272         /* avoid re-using remote pages */
7273         if (unlikely(page_to_nid(page) != numa_node_id()))
7274                 return false;
7275
7276 #if (PAGE_SIZE < 8192)
7277         /* if we are only owner of page we can reuse it */
7278         if (unlikely(page_count(page) != 1))
7279                 return false;
7280
7281         /* flip page offset to other buffer */
7282         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7283
7284 #else
7285         /* move offset up to the next cache line */
7286         rx_buffer->page_offset += truesize;
7287
7288         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7289                 return false;
7290 #endif
7291
7292         /* bump ref count on page before it is given to the stack */
7293         get_page(page);
7294
7295         return true;
7296 }
7297
7298 /**
7299  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7300  * @rx_ring: rx descriptor ring to transact packets on
7301  * @rx_buffer: buffer containing page to add
7302  * @rx_desc: descriptor containing length of buffer written by hardware
7303  * @skb: sk_buff to place the data into
7304  *
7305  * This function will add the data contained in rx_buffer->page to the skb.
7306  * This is done either through a direct copy if the data in the buffer is
7307  * less than the skb header size, otherwise it will just attach the page as
7308  * a frag to the skb.
7309  *
7310  * The function will then update the page offset if necessary and return
7311  * true if the buffer can be reused by the adapter.
7312  **/
7313 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7314                             struct igb_rx_buffer *rx_buffer,
7315                             union e1000_adv_rx_desc *rx_desc,
7316                             struct sk_buff *skb)
7317 {
7318         struct page *page = rx_buffer->page;
7319         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7320 #if (PAGE_SIZE < 8192)
7321         unsigned int truesize = IGB_RX_BUFSZ;
7322 #else
7323         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7324 #endif
7325
7326         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7327                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7328
7329 #ifdef HAVE_PTP_1588_CLOCK
7330                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7331                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7332                         va += IGB_TS_HDR_LEN;
7333                         size -= IGB_TS_HDR_LEN;
7334                 }
7335 #endif /* HAVE_PTP_1588_CLOCK */
7336
7337                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7338
7339                 /* we can reuse buffer as-is, just make sure it is local */
7340                 if (likely(page_to_nid(page) == numa_node_id()))
7341                         return true;
7342
7343                 /* this page cannot be reused so discard it */
7344                 put_page(page);
7345                 return false;
7346         }
7347
7348         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7349                         rx_buffer->page_offset, size, truesize);
7350
7351         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7352 }
7353
7354 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7355                                            union e1000_adv_rx_desc *rx_desc,
7356                                            struct sk_buff *skb)
7357 {
7358         struct igb_rx_buffer *rx_buffer;
7359         struct page *page;
7360
7361         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7362
7363         page = rx_buffer->page;
7364         prefetchw(page);
7365
7366         if (likely(!skb)) {
7367                 void *page_addr = page_address(page) +
7368                                   rx_buffer->page_offset;
7369
7370                 /* prefetch first cache line of first page */
7371                 prefetch(page_addr);
7372 #if L1_CACHE_BYTES < 128
7373                 prefetch(page_addr + L1_CACHE_BYTES);
7374 #endif
7375
7376                 /* allocate a skb to store the frags */
7377                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7378                                                 IGB_RX_HDR_LEN);
7379                 if (unlikely(!skb)) {
7380                         rx_ring->rx_stats.alloc_failed++;
7381                         return NULL;
7382                 }
7383
7384                 /*
7385                  * we will be copying header into skb->data in
7386                  * pskb_may_pull so it is in our interest to prefetch
7387                  * it now to avoid a possible cache miss
7388                  */
7389                 prefetchw(skb->data);
7390         }
7391
7392         /* we are reusing so sync this buffer for CPU use */
7393         dma_sync_single_range_for_cpu(rx_ring->dev,
7394                                       rx_buffer->dma,
7395                                       rx_buffer->page_offset,
7396                                       IGB_RX_BUFSZ,
7397                                       DMA_FROM_DEVICE);
7398
7399         /* pull page into skb */
7400         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7401                 /* hand second half of page back to the ring */
7402                 igb_reuse_rx_page(rx_ring, rx_buffer);
7403         } else {
7404                 /* we are not reusing the buffer so unmap it */
7405                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7406                                PAGE_SIZE, DMA_FROM_DEVICE);
7407         }
7408
7409         /* clear contents of rx_buffer */
7410         rx_buffer->page = NULL;
7411
7412         return skb;
7413 }
7414
7415 #endif
7416 static inline void igb_rx_checksum(struct igb_ring *ring,
7417                                    union e1000_adv_rx_desc *rx_desc,
7418                                    struct sk_buff *skb)
7419 {
7420         skb_checksum_none_assert(skb);
7421
7422         /* Ignore Checksum bit is set */
7423         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7424                 return;
7425
7426         /* Rx checksum disabled via ethtool */
7427         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7428                 return;
7429
7430         /* TCP/UDP checksum error bit is set */
7431         if (igb_test_staterr(rx_desc,
7432                              E1000_RXDEXT_STATERR_TCPE |
7433                              E1000_RXDEXT_STATERR_IPE)) {
7434                 /*
7435                  * work around errata with sctp packets where the TCPE aka
7436                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7437                  * packets, (aka let the stack check the crc32c)
7438                  */
7439                 if (!((skb->len == 60) &&
7440                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7441                         ring->rx_stats.csum_err++;
7442
7443                 /* let the stack verify checksum errors */
7444                 return;
7445         }
7446         /* It must be a TCP or UDP packet with a valid checksum */
7447         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7448                                       E1000_RXD_STAT_UDPCS))
7449                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7450 }
7451
7452 #ifdef NETIF_F_RXHASH
7453 static inline void igb_rx_hash(struct igb_ring *ring,
7454                                union e1000_adv_rx_desc *rx_desc,
7455                                struct sk_buff *skb)
7456 {
7457         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7458                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7459                              PKT_HASH_TYPE_L3);
7460 }
7461
7462 #endif
7463 #ifndef IGB_NO_LRO
7464 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7465 /**
7466  * igb_merge_active_tail - merge active tail into lro skb
7467  * @tail: pointer to active tail in frag_list
7468  *
7469  * This function merges the length and data of an active tail into the
7470  * skb containing the frag_list.  It resets the tail's pointer to the head,
7471  * but it leaves the heads pointer to tail intact.
7472  **/
7473 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7474 {
7475         struct sk_buff *head = IGB_CB(tail)->head;
7476
7477         if (!head)
7478                 return tail;
7479
7480         head->len += tail->len;
7481         head->data_len += tail->len;
7482         head->truesize += tail->len;
7483
7484         IGB_CB(tail)->head = NULL;
7485
7486         return head;
7487 }
7488
7489 /**
7490  * igb_add_active_tail - adds an active tail into the skb frag_list
7491  * @head: pointer to the start of the skb
7492  * @tail: pointer to active tail to add to frag_list
7493  *
7494  * This function adds an active tail to the end of the frag list.  This tail
7495  * will still be receiving data so we cannot yet ad it's stats to the main
7496  * skb.  That is done via igb_merge_active_tail.
7497  **/
7498 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7499 {
7500         struct sk_buff *old_tail = IGB_CB(head)->tail;
7501
7502         if (old_tail) {
7503                 igb_merge_active_tail(old_tail);
7504                 old_tail->next = tail;
7505         } else {
7506                 skb_shinfo(head)->frag_list = tail;
7507         }
7508
7509         IGB_CB(tail)->head = head;
7510         IGB_CB(head)->tail = tail;
7511
7512         IGB_CB(head)->append_cnt++;
7513 }
7514
7515 /**
7516  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7517  * @head: pointer to head of an active frag list
7518  *
7519  * This function will clear the frag_tail_tracker pointer on an active
7520  * frag_list and returns true if the pointer was actually set
7521  **/
7522 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7523 {
7524         struct sk_buff *tail = IGB_CB(head)->tail;
7525
7526         if (!tail)
7527                 return false;
7528
7529         igb_merge_active_tail(tail);
7530
7531         IGB_CB(head)->tail = NULL;
7532
7533         return true;
7534 }
7535
7536 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7537 /**
7538  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7539  * @adapter: board private structure
7540  * @rx_desc: pointer to the rx descriptor
7541  * @skb: pointer to the skb to be merged
7542  *
7543  **/
7544 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7545                                union e1000_adv_rx_desc *rx_desc,
7546                                struct sk_buff *skb)
7547 {
7548         struct iphdr *iph = (struct iphdr *)skb->data;
7549         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7550
7551         /* verify hardware indicates this is IPv4/TCP */
7552         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7553             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7554                 return false;
7555
7556         /* .. and LRO is enabled */
7557         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7558                 return false;
7559
7560         /* .. and we are not in promiscuous mode */
7561         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7562                 return false;
7563
7564         /* .. and the header is large enough for us to read IP/TCP fields */
7565         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7566                 return false;
7567
7568         /* .. and there are no VLANs on packet */
7569         if (skb->protocol != __constant_htons(ETH_P_IP))
7570                 return false;
7571
7572         /* .. and we are version 4 with no options */
7573         if (*(u8 *)iph != 0x45)
7574                 return false;
7575
7576         /* .. and the packet is not fragmented */
7577         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7578                 return false;
7579
7580         /* .. and that next header is TCP */
7581         if (iph->protocol != IPPROTO_TCP)
7582                 return false;
7583
7584         return true;
7585 }
7586
7587 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7588 {
7589         return (struct igb_lrohdr *)skb->data;
7590 }
7591
7592 /**
7593  * igb_lro_flush - Indicate packets to upper layer.
7594  *
7595  * Update IP and TCP header part of head skb if more than one
7596  * skb's chained and indicate packets to upper layer.
7597  **/
7598 static void igb_lro_flush(struct igb_q_vector *q_vector,
7599                           struct sk_buff *skb)
7600 {
7601         struct igb_lro_list *lrolist = &q_vector->lrolist;
7602
7603         __skb_unlink(skb, &lrolist->active);
7604
7605         if (IGB_CB(skb)->append_cnt) {
7606                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7607
7608 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7609                 /* close any active lro contexts */
7610                 igb_close_active_frag_list(skb);
7611
7612 #endif
7613                 /* incorporate ip header and re-calculate checksum */
7614                 lroh->iph.tot_len = ntohs(skb->len);
7615                 lroh->iph.check = 0;
7616
7617                 /* header length is 5 since we know no options exist */
7618                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7619
7620                 /* clear TCP checksum to indicate we are an LRO frame */
7621                 lroh->th.check = 0;
7622
7623                 /* incorporate latest timestamp into the tcp header */
7624                 if (IGB_CB(skb)->tsecr) {
7625                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7626                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7627                 }
7628 #ifdef NETIF_F_GSO
7629
7630                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7631                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7632 #endif
7633         }
7634
7635 #ifdef HAVE_VLAN_RX_REGISTER
7636         igb_receive_skb(q_vector, skb);
7637 #else
7638         napi_gro_receive(&q_vector->napi, skb);
7639 #endif
7640         lrolist->stats.flushed++;
7641 }
7642
7643 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7644 {
7645         struct igb_lro_list *lrolist = &q_vector->lrolist;
7646         struct sk_buff *skb, *tmp;
7647
7648         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7649                 igb_lro_flush(q_vector, skb);
7650 }
7651
7652 /*
7653  * igb_lro_header_ok - Main LRO function.
7654  **/
7655 static void igb_lro_header_ok(struct sk_buff *skb)
7656 {
7657         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7658         u16 opt_bytes, data_len;
7659
7660 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7661         IGB_CB(skb)->tail = NULL;
7662 #endif
7663         IGB_CB(skb)->tsecr = 0;
7664         IGB_CB(skb)->append_cnt = 0;
7665         IGB_CB(skb)->mss = 0;
7666
7667         /* ensure that the checksum is valid */
7668         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7669                 return;
7670
7671         /* If we see CE codepoint in IP header, packet is not mergeable */
7672         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7673                 return;
7674
7675         /* ensure no bits set besides ack or psh */
7676         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7677             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7678             !lroh->th.ack)
7679                 return;
7680
7681         /* store the total packet length */
7682         data_len = ntohs(lroh->iph.tot_len);
7683
7684         /* remove any padding from the end of the skb */
7685         __pskb_trim(skb, data_len);
7686
7687         /* remove header length from data length */
7688         data_len -= sizeof(struct igb_lrohdr);
7689
7690         /*
7691          * check for timestamps. Since the only option we handle are timestamps,
7692          * we only have to handle the simple case of aligned timestamps
7693          */
7694         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7695         if (opt_bytes != 0) {
7696                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7697                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7698                                         TCPOLEN_TSTAMP_ALIGNED) ||
7699                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7700                                              (TCPOPT_NOP << 16) |
7701                                              (TCPOPT_TIMESTAMP << 8) |
7702                                               TCPOLEN_TIMESTAMP)) ||
7703                     (lroh->ts[2] == 0)) {
7704                         return;
7705                 }
7706
7707                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7708                 IGB_CB(skb)->tsecr = lroh->ts[2];
7709
7710                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7711         }
7712
7713         /* record data_len as mss for the packet */
7714         IGB_CB(skb)->mss = data_len;
7715         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7716 }
7717
7718 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7719 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7720 {
7721         struct skb_shared_info *sh_info;
7722         struct skb_shared_info *new_skb_info;
7723         unsigned int data_len;
7724
7725         sh_info = skb_shinfo(lro_skb);
7726         new_skb_info = skb_shinfo(new_skb);
7727
7728         /* copy frags into the last skb */
7729         memcpy(sh_info->frags + sh_info->nr_frags,
7730                new_skb_info->frags,
7731                new_skb_info->nr_frags * sizeof(skb_frag_t));
7732
7733         /* copy size data over */
7734         sh_info->nr_frags += new_skb_info->nr_frags;
7735         data_len = IGB_CB(new_skb)->mss;
7736         lro_skb->len += data_len;
7737         lro_skb->data_len += data_len;
7738         lro_skb->truesize += data_len;
7739
7740         /* wipe record of data from new_skb */
7741         new_skb_info->nr_frags = 0;
7742         new_skb->len = new_skb->data_len = 0;
7743         dev_kfree_skb_any(new_skb);
7744 }
7745
7746 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7747 /**
7748  * igb_lro_receive - if able, queue skb into lro chain
7749  * @q_vector: structure containing interrupt and ring information
7750  * @new_skb: pointer to current skb being checked
7751  *
7752  * Checks whether the skb given is eligible for LRO and if that's
7753  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7754  * the flow doesn't exist create one.
7755  **/
7756 static void igb_lro_receive(struct igb_q_vector *q_vector,
7757                             struct sk_buff *new_skb)
7758 {
7759         struct sk_buff *lro_skb;
7760         struct igb_lro_list *lrolist = &q_vector->lrolist;
7761         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7762         __be32 saddr = lroh->iph.saddr;
7763         __be32 daddr = lroh->iph.daddr;
7764         __be32 tcp_ports = *(__be32 *)&lroh->th;
7765         u16 data_len;
7766 #ifdef HAVE_VLAN_RX_REGISTER
7767         u16 vid = IGB_CB(new_skb)->vid;
7768 #else
7769         u16 vid = new_skb->vlan_tci;
7770 #endif
7771
7772         igb_lro_header_ok(new_skb);
7773
7774         /*
7775          * we have a packet that might be eligible for LRO,
7776          * so see if it matches anything we might expect
7777          */
7778         skb_queue_walk(&lrolist->active, lro_skb) {
7779                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7780                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7781                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7782                         continue;
7783
7784 #ifdef HAVE_VLAN_RX_REGISTER
7785                 if (IGB_CB(lro_skb)->vid != vid)
7786 #else
7787                 if (lro_skb->vlan_tci != vid)
7788 #endif
7789                         continue;
7790
7791                 /* out of order packet */
7792                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7793                         igb_lro_flush(q_vector, lro_skb);
7794                         IGB_CB(new_skb)->mss = 0;
7795                         break;
7796                 }
7797
7798                 /* TCP timestamp options have changed */
7799                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7800                         igb_lro_flush(q_vector, lro_skb);
7801                         break;
7802                 }
7803
7804                 /* make sure timestamp values are increasing */
7805                 if (IGB_CB(lro_skb)->tsecr &&
7806                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7807                         igb_lro_flush(q_vector, lro_skb);
7808                         IGB_CB(new_skb)->mss = 0;
7809                         break;
7810                 }
7811
7812                 data_len = IGB_CB(new_skb)->mss;
7813
7814                 /* Check for all of the above below
7815                  *   malformed header
7816                  *   no tcp data
7817                  *   resultant packet would be too large
7818                  *   new skb is larger than our current mss
7819                  *   data would remain in header
7820                  *   we would consume more frags then the sk_buff contains
7821                  *   ack sequence numbers changed
7822                  *   window size has changed
7823                  */
7824                 if (data_len == 0 ||
7825                     data_len > IGB_CB(lro_skb)->mss ||
7826                     data_len > IGB_CB(lro_skb)->free ||
7827 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7828                     data_len != new_skb->data_len ||
7829                     skb_shinfo(new_skb)->nr_frags >=
7830                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7831 #endif
7832                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7833                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7834                         igb_lro_flush(q_vector, lro_skb);
7835                         break;
7836                 }
7837
7838                 /* Remove IP and TCP header*/
7839                 skb_pull(new_skb, new_skb->len - data_len);
7840
7841                 /* update timestamp and timestamp echo response */
7842                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7843                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7844
7845                 /* update sequence and free space */
7846                 IGB_CB(lro_skb)->next_seq += data_len;
7847                 IGB_CB(lro_skb)->free -= data_len;
7848
7849                 /* update append_cnt */
7850                 IGB_CB(lro_skb)->append_cnt++;
7851
7852 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7853                 /* if header is empty pull pages into current skb */
7854                 igb_merge_frags(lro_skb, new_skb);
7855 #else
7856                 /* chain this new skb in frag_list */
7857                 igb_add_active_tail(lro_skb, new_skb);
7858 #endif
7859
7860                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7861                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7862                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7863                         igb_lro_flush(q_vector, lro_skb);
7864                 }
7865
7866                 lrolist->stats.coal++;
7867                 return;
7868         }
7869
7870         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7871                 /* if we are at capacity flush the tail */
7872                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7873                         lro_skb = skb_peek_tail(&lrolist->active);
7874                         if (lro_skb)
7875                                 igb_lro_flush(q_vector, lro_skb);
7876                 }
7877
7878                 /* update sequence and free space */
7879                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7880                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7881
7882                 /* .. and insert at the front of the active list */
7883                 __skb_queue_head(&lrolist->active, new_skb);
7884
7885                 lrolist->stats.coal++;
7886                 return;
7887         }
7888
7889         /* packet not handled by any of the above, pass it to the stack */
7890 #ifdef HAVE_VLAN_RX_REGISTER
7891         igb_receive_skb(q_vector, new_skb);
7892 #else
7893         napi_gro_receive(&q_vector->napi, new_skb);
7894 #endif
7895 }
7896
7897 #endif /* IGB_NO_LRO */
7898 /**
7899  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7900  * @rx_ring: rx descriptor ring packet is being transacted on
7901  * @rx_desc: pointer to the EOP Rx descriptor
7902  * @skb: pointer to current skb being populated
7903  *
7904  * This function checks the ring, descriptor, and packet information in
7905  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7906  * other fields within the skb.
7907  **/
7908 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7909                                    union e1000_adv_rx_desc *rx_desc,
7910                                    struct sk_buff *skb)
7911 {
7912         struct net_device *dev = rx_ring->netdev;
7913         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7914
7915 #ifdef NETIF_F_RXHASH
7916         igb_rx_hash(rx_ring, rx_desc, skb);
7917
7918 #endif
7919         igb_rx_checksum(rx_ring, rx_desc, skb);
7920
7921     /* update packet type stats */
7922         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7923                 rx_ring->rx_stats.ipv4_packets++;
7924         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7925                 rx_ring->rx_stats.ipv4e_packets++;
7926         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7927                 rx_ring->rx_stats.ipv6_packets++;
7928         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7929                 rx_ring->rx_stats.ipv6e_packets++;
7930         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7931                 rx_ring->rx_stats.tcp_packets++;
7932         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7933                 rx_ring->rx_stats.udp_packets++;
7934         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7935                 rx_ring->rx_stats.sctp_packets++;
7936         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7937                 rx_ring->rx_stats.nfs_packets++;
7938
7939 #ifdef HAVE_PTP_1588_CLOCK
7940         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7941 #endif /* HAVE_PTP_1588_CLOCK */
7942
7943 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7944         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7945 #else
7946         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7947 #endif
7948             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7949                 u16 vid = 0;
7950                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7951                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7952                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7953                 else
7954                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7955 #ifdef HAVE_VLAN_RX_REGISTER
7956                 IGB_CB(skb)->vid = vid;
7957         } else {
7958                 IGB_CB(skb)->vid = 0;
7959 #else
7960
7961 #ifdef HAVE_VLAN_PROTOCOL
7962                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7963 #else
7964                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7965 #endif
7966
7967
7968 #endif
7969         }
7970
7971         skb_record_rx_queue(skb, rx_ring->queue_index);
7972
7973         skb->protocol = eth_type_trans(skb, dev);
7974 }
7975
7976 /**
7977  * igb_is_non_eop - process handling of non-EOP buffers
7978  * @rx_ring: Rx ring being processed
7979  * @rx_desc: Rx descriptor for current buffer
7980  *
7981  * This function updates next to clean.  If the buffer is an EOP buffer
7982  * this function exits returning false, otherwise it will place the
7983  * sk_buff in the next buffer to be chained and return true indicating
7984  * that this is in fact a non-EOP buffer.
7985  **/
7986 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7987                            union e1000_adv_rx_desc *rx_desc)
7988 {
7989         u32 ntc = rx_ring->next_to_clean + 1;
7990
7991         /* fetch, update, and store next to clean */
7992         ntc = (ntc < rx_ring->count) ? ntc : 0;
7993         rx_ring->next_to_clean = ntc;
7994
7995         prefetch(IGB_RX_DESC(rx_ring, ntc));
7996
7997         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7998                 return false;
7999
8000         return true;
8001 }
8002
8003 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8004 /* igb_clean_rx_irq -- * legacy */
8005 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8006 {
8007         struct igb_ring *rx_ring = q_vector->rx.ring;
8008         unsigned int total_bytes = 0, total_packets = 0;
8009         u16 cleaned_count = igb_desc_unused(rx_ring);
8010
8011         do {
8012                 struct igb_rx_buffer *rx_buffer;
8013                 union e1000_adv_rx_desc *rx_desc;
8014                 struct sk_buff *skb;
8015                 u16 ntc;
8016
8017                 /* return some buffers to hardware, one at a time is too slow */
8018                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8019                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8020                         cleaned_count = 0;
8021                 }
8022
8023                 ntc = rx_ring->next_to_clean;
8024                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
8025                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
8026
8027                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8028                         break;
8029
8030                 /*
8031                  * This memory barrier is needed to keep us from reading
8032                  * any other fields out of the rx_desc until we know the
8033                  * RXD_STAT_DD bit is set
8034                  */
8035                 rmb();
8036
8037                 skb = rx_buffer->skb;
8038
8039                 prefetch(skb->data);
8040
8041                 /* pull the header of the skb in */
8042                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
8043
8044                 /* clear skb reference in buffer info structure */
8045                 rx_buffer->skb = NULL;
8046
8047                 cleaned_count++;
8048
8049                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8050
8051                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8052                                  rx_ring->rx_buffer_len,
8053                                  DMA_FROM_DEVICE);
8054                 rx_buffer->dma = 0;
8055
8056                 if (igb_test_staterr(rx_desc,
8057                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8058                         dev_kfree_skb_any(skb);
8059                         continue;
8060                 }
8061
8062                 total_bytes += skb->len;
8063
8064                 /* populate checksum, timestamp, VLAN, and protocol */
8065                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8066
8067 #ifndef IGB_NO_LRO
8068                 if (igb_can_lro(rx_ring, rx_desc, skb))
8069                         igb_lro_receive(q_vector, skb);
8070                 else
8071 #endif
8072 #ifdef HAVE_VLAN_RX_REGISTER
8073                         igb_receive_skb(q_vector, skb);
8074 #else
8075                         napi_gro_receive(&q_vector->napi, skb);
8076 #endif
8077
8078 #ifndef NETIF_F_GRO
8079                 netdev_ring(rx_ring)->last_rx = jiffies;
8080
8081 #endif
8082                 /* update budget accounting */
8083                 total_packets++;
8084         } while (likely(total_packets < budget));
8085
8086         rx_ring->rx_stats.packets += total_packets;
8087         rx_ring->rx_stats.bytes += total_bytes;
8088         q_vector->rx.total_packets += total_packets;
8089         q_vector->rx.total_bytes += total_bytes;
8090
8091         if (cleaned_count)
8092                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8093
8094 #ifndef IGB_NO_LRO
8095         igb_lro_flush_all(q_vector);
8096
8097 #endif /* IGB_NO_LRO */
8098         return total_packets < budget;
8099 }
8100 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8101 /**
8102  * igb_get_headlen - determine size of header for LRO/GRO
8103  * @data: pointer to the start of the headers
8104  * @max_len: total length of section to find headers in
8105  *
8106  * This function is meant to determine the length of headers that will
8107  * be recognized by hardware for LRO, and GRO offloads.  The main
8108  * motivation of doing this is to only perform one pull for IPv4 TCP
8109  * packets so that we can do basic things like calculating the gso_size
8110  * based on the average data per packet.
8111  **/
8112 static unsigned int igb_get_headlen(unsigned char *data,
8113                                     unsigned int max_len)
8114 {
8115         union {
8116                 unsigned char *network;
8117                 /* l2 headers */
8118                 struct ethhdr *eth;
8119                 struct vlan_hdr *vlan;
8120                 /* l3 headers */
8121                 struct iphdr *ipv4;
8122                 struct ipv6hdr *ipv6;
8123         } hdr;
8124         __be16 protocol;
8125         u8 nexthdr = 0; /* default to not TCP */
8126         u8 hlen;
8127
8128         /* this should never happen, but better safe than sorry */
8129         if (max_len < ETH_HLEN)
8130                 return max_len;
8131
8132         /* initialize network frame pointer */
8133         hdr.network = data;
8134
8135         /* set first protocol and move network header forward */
8136         protocol = hdr.eth->h_proto;
8137         hdr.network += ETH_HLEN;
8138
8139         /* handle any vlan tag if present */
8140         if (protocol == __constant_htons(ETH_P_8021Q)) {
8141                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8142                         return max_len;
8143
8144                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8145                 hdr.network += VLAN_HLEN;
8146         }
8147
8148         /* handle L3 protocols */
8149         if (protocol == __constant_htons(ETH_P_IP)) {
8150                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8151                         return max_len;
8152
8153                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8154                 hlen = (hdr.network[0] & 0x0F) << 2;
8155
8156                 /* verify hlen meets minimum size requirements */
8157                 if (hlen < sizeof(struct iphdr))
8158                         return hdr.network - data;
8159
8160                 /* record next protocol if header is present */
8161                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8162                         nexthdr = hdr.ipv4->protocol;
8163 #ifdef NETIF_F_TSO6
8164         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8165                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8166                         return max_len;
8167
8168                 /* record next protocol */
8169                 nexthdr = hdr.ipv6->nexthdr;
8170                 hlen = sizeof(struct ipv6hdr);
8171 #endif /* NETIF_F_TSO6 */
8172         } else {
8173                 return hdr.network - data;
8174         }
8175
8176         /* relocate pointer to start of L4 header */
8177         hdr.network += hlen;
8178
8179         /* finally sort out TCP */
8180         if (nexthdr == IPPROTO_TCP) {
8181                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8182                         return max_len;
8183
8184                 /* access doff as a u8 to avoid unaligned access on ia64 */
8185                 hlen = (hdr.network[12] & 0xF0) >> 2;
8186
8187                 /* verify hlen meets minimum size requirements */
8188                 if (hlen < sizeof(struct tcphdr))
8189                         return hdr.network - data;
8190
8191                 hdr.network += hlen;
8192         } else if (nexthdr == IPPROTO_UDP) {
8193                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8194                         return max_len;
8195
8196                 hdr.network += sizeof(struct udphdr);
8197         }
8198
8199         /*
8200          * If everything has gone correctly hdr.network should be the
8201          * data section of the packet and will be the end of the header.
8202          * If not then it probably represents the end of the last recognized
8203          * header.
8204          */
8205         if ((hdr.network - data) < max_len)
8206                 return hdr.network - data;
8207         else
8208                 return max_len;
8209 }
8210
8211 /**
8212  * igb_pull_tail - igb specific version of skb_pull_tail
8213  * @rx_ring: rx descriptor ring packet is being transacted on
8214  * @rx_desc: pointer to the EOP Rx descriptor
8215  * @skb: pointer to current skb being adjusted
8216  *
8217  * This function is an igb specific version of __pskb_pull_tail.  The
8218  * main difference between this version and the original function is that
8219  * this function can make several assumptions about the state of things
8220  * that allow for significant optimizations versus the standard function.
8221  * As a result we can do things like drop a frag and maintain an accurate
8222  * truesize for the skb.
8223  */
8224 static void igb_pull_tail(struct igb_ring *rx_ring,
8225                           union e1000_adv_rx_desc *rx_desc,
8226                           struct sk_buff *skb)
8227 {
8228         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8229         unsigned char *va;
8230         unsigned int pull_len;
8231
8232         /*
8233          * it is valid to use page_address instead of kmap since we are
8234          * working with pages allocated out of the lomem pool per
8235          * alloc_page(GFP_ATOMIC)
8236          */
8237         va = skb_frag_address(frag);
8238
8239 #ifdef HAVE_PTP_1588_CLOCK
8240         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8241                 /* retrieve timestamp from buffer */
8242                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8243
8244                 /* update pointers to remove timestamp header */
8245                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8246                 frag->page_offset += IGB_TS_HDR_LEN;
8247                 skb->data_len -= IGB_TS_HDR_LEN;
8248                 skb->len -= IGB_TS_HDR_LEN;
8249
8250                 /* move va to start of packet data */
8251                 va += IGB_TS_HDR_LEN;
8252         }
8253 #endif /* HAVE_PTP_1588_CLOCK */
8254
8255         /*
8256          * we need the header to contain the greater of either ETH_HLEN or
8257          * 60 bytes if the skb->len is less than 60 for skb_pad.
8258          */
8259         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8260
8261         /* align pull length to size of long to optimize memcpy performance */
8262         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8263
8264         /* update all of the pointers */
8265         skb_frag_size_sub(frag, pull_len);
8266         frag->page_offset += pull_len;
8267         skb->data_len -= pull_len;
8268         skb->tail += pull_len;
8269 }
8270
8271 /**
8272  * igb_cleanup_headers - Correct corrupted or empty headers
8273  * @rx_ring: rx descriptor ring packet is being transacted on
8274  * @rx_desc: pointer to the EOP Rx descriptor
8275  * @skb: pointer to current skb being fixed
8276  *
8277  * Address the case where we are pulling data in on pages only
8278  * and as such no data is present in the skb header.
8279  *
8280  * In addition if skb is not at least 60 bytes we need to pad it so that
8281  * it is large enough to qualify as a valid Ethernet frame.
8282  *
8283  * Returns true if an error was encountered and skb was freed.
8284  **/
8285 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8286                                 union e1000_adv_rx_desc *rx_desc,
8287                                 struct sk_buff *skb)
8288 {
8289
8290         if (unlikely((igb_test_staterr(rx_desc,
8291                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8292                 struct net_device *netdev = rx_ring->netdev;
8293                 if (!(netdev->features & NETIF_F_RXALL)) {
8294                         dev_kfree_skb_any(skb);
8295                         return true;
8296                 }
8297         }
8298
8299         /* place header in linear portion of buffer */
8300         if (skb_is_nonlinear(skb))
8301                 igb_pull_tail(rx_ring, rx_desc, skb);
8302
8303         /* if skb_pad returns an error the skb was freed */
8304         if (unlikely(skb->len < 60)) {
8305                 int pad_len = 60 - skb->len;
8306
8307                 if (skb_pad(skb, pad_len))
8308                         return true;
8309                 __skb_put(skb, pad_len);
8310         }
8311
8312         return false;
8313 }
8314
8315 /* igb_clean_rx_irq -- * packet split */
8316 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8317 {
8318         struct igb_ring *rx_ring = q_vector->rx.ring;
8319         struct sk_buff *skb = rx_ring->skb;
8320         unsigned int total_bytes = 0, total_packets = 0;
8321         u16 cleaned_count = igb_desc_unused(rx_ring);
8322
8323         do {
8324                 union e1000_adv_rx_desc *rx_desc;
8325
8326                 /* return some buffers to hardware, one at a time is too slow */
8327                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8328                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8329                         cleaned_count = 0;
8330                 }
8331
8332                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8333
8334                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8335                         break;
8336
8337                 /*
8338                  * This memory barrier is needed to keep us from reading
8339                  * any other fields out of the rx_desc until we know the
8340                  * RXD_STAT_DD bit is set
8341                  */
8342                 rmb();
8343
8344                 /* retrieve a buffer from the ring */
8345                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8346
8347                 /* exit if we failed to retrieve a buffer */
8348                 if (!skb)
8349                         break;
8350
8351                 cleaned_count++;
8352
8353                 /* fetch next buffer in frame if non-eop */
8354                 if (igb_is_non_eop(rx_ring, rx_desc))
8355                         continue;
8356
8357                 /* verify the packet layout is correct */
8358                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8359                         skb = NULL;
8360                         continue;
8361                 }
8362
8363                 /* probably a little skewed due to removing CRC */
8364                 total_bytes += skb->len;
8365
8366                 /* populate checksum, timestamp, VLAN, and protocol */
8367                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8368
8369 #ifndef IGB_NO_LRO
8370                 if (igb_can_lro(rx_ring, rx_desc, skb))
8371                         igb_lro_receive(q_vector, skb);
8372                 else
8373 #endif
8374 #ifdef HAVE_VLAN_RX_REGISTER
8375                         igb_receive_skb(q_vector, skb);
8376 #else
8377                         napi_gro_receive(&q_vector->napi, skb);
8378 #endif
8379 #ifndef NETIF_F_GRO
8380
8381                 netdev_ring(rx_ring)->last_rx = jiffies;
8382 #endif
8383
8384                 /* reset skb pointer */
8385                 skb = NULL;
8386
8387                 /* update budget accounting */
8388                 total_packets++;
8389         } while (likely(total_packets < budget));
8390
8391         /* place incomplete frames back on ring for completion */
8392         rx_ring->skb = skb;
8393
8394         rx_ring->rx_stats.packets += total_packets;
8395         rx_ring->rx_stats.bytes += total_bytes;
8396         q_vector->rx.total_packets += total_packets;
8397         q_vector->rx.total_bytes += total_bytes;
8398
8399         if (cleaned_count)
8400                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8401
8402 #ifndef IGB_NO_LRO
8403         igb_lro_flush_all(q_vector);
8404
8405 #endif /* IGB_NO_LRO */
8406         return total_packets < budget;
8407 }
8408 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8409
8410 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8411 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8412                                  struct igb_rx_buffer *bi)
8413 {
8414         struct sk_buff *skb = bi->skb;
8415         dma_addr_t dma = bi->dma;
8416
8417         if (dma)
8418                 return true;
8419
8420         if (likely(!skb)) {
8421                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8422                                                 rx_ring->rx_buffer_len);
8423                 bi->skb = skb;
8424                 if (!skb) {
8425                         rx_ring->rx_stats.alloc_failed++;
8426                         return false;
8427                 }
8428
8429                 /* initialize skb for ring */
8430                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8431         }
8432
8433         dma = dma_map_single(rx_ring->dev, skb->data,
8434                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8435
8436         /* if mapping failed free memory back to system since
8437          * there isn't much point in holding memory we can't use
8438          */
8439         if (dma_mapping_error(rx_ring->dev, dma)) {
8440                 dev_kfree_skb_any(skb);
8441                 bi->skb = NULL;
8442
8443                 rx_ring->rx_stats.alloc_failed++;
8444                 return false;
8445         }
8446
8447         bi->dma = dma;
8448         return true;
8449 }
8450
8451 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8452 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8453                                   struct igb_rx_buffer *bi)
8454 {
8455         struct page *page = bi->page;
8456         dma_addr_t dma;
8457
8458         /* since we are recycling buffers we should seldom need to alloc */
8459         if (likely(page))
8460                 return true;
8461
8462         /* alloc new page for storage */
8463         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8464         if (unlikely(!page)) {
8465                 rx_ring->rx_stats.alloc_failed++;
8466                 return false;
8467         }
8468
8469         /* map page for use */
8470         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8471
8472         /*
8473          * if mapping failed free memory back to system since
8474          * there isn't much point in holding memory we can't use
8475          */
8476         if (dma_mapping_error(rx_ring->dev, dma)) {
8477                 __free_page(page);
8478
8479                 rx_ring->rx_stats.alloc_failed++;
8480                 return false;
8481         }
8482
8483         bi->dma = dma;
8484         bi->page = page;
8485         bi->page_offset = 0;
8486
8487         return true;
8488 }
8489
8490 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8491 /**
8492  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8493  * @adapter: address of board private structure
8494  **/
8495 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8496 {
8497         union e1000_adv_rx_desc *rx_desc;
8498         struct igb_rx_buffer *bi;
8499         u16 i = rx_ring->next_to_use;
8500
8501         /* nothing to do */
8502         if (!cleaned_count)
8503                 return;
8504
8505         rx_desc = IGB_RX_DESC(rx_ring, i);
8506         bi = &rx_ring->rx_buffer_info[i];
8507         i -= rx_ring->count;
8508
8509         do {
8510 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8511                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8512 #else
8513                 if (!igb_alloc_mapped_page(rx_ring, bi))
8514 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8515                         break;
8516
8517                 /*
8518                  * Refresh the desc even if buffer_addrs didn't change
8519                  * because each write-back erases this info.
8520                  */
8521 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8522                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8523 #else
8524                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8525 #endif
8526
8527                 rx_desc++;
8528                 bi++;
8529                 i++;
8530                 if (unlikely(!i)) {
8531                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8532                         bi = rx_ring->rx_buffer_info;
8533                         i -= rx_ring->count;
8534                 }
8535
8536                 /* clear the hdr_addr for the next_to_use descriptor */
8537                 rx_desc->read.hdr_addr = 0;
8538
8539                 cleaned_count--;
8540         } while (cleaned_count);
8541
8542         i += rx_ring->count;
8543
8544         if (rx_ring->next_to_use != i) {
8545                 /* record the next descriptor to use */
8546                 rx_ring->next_to_use = i;
8547
8548 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8549                 /* update next to alloc since we have filled the ring */
8550                 rx_ring->next_to_alloc = i;
8551
8552 #endif
8553                 /*
8554                  * Force memory writes to complete before letting h/w
8555                  * know there are new descriptors to fetch.  (Only
8556                  * applicable for weak-ordered memory model archs,
8557                  * such as IA-64).
8558                  */
8559                 wmb();
8560                 writel(i, rx_ring->tail);
8561         }
8562 }
8563
8564 #ifdef SIOCGMIIPHY
8565 /**
8566  * igb_mii_ioctl -
8567  * @netdev:
8568  * @ifreq:
8569  * @cmd:
8570  **/
8571 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8572 {
8573         struct igb_adapter *adapter = netdev_priv(netdev);
8574         struct mii_ioctl_data *data = if_mii(ifr);
8575
8576         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8577                 return -EOPNOTSUPP;
8578
8579         switch (cmd) {
8580         case SIOCGMIIPHY:
8581                 data->phy_id = adapter->hw.phy.addr;
8582                 break;
8583         case SIOCGMIIREG:
8584                 if (!capable(CAP_NET_ADMIN))
8585                         return -EPERM;
8586                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8587                                    &data->val_out))
8588                         return -EIO;
8589                 break;
8590         case SIOCSMIIREG:
8591         default:
8592                 return -EOPNOTSUPP;
8593         }
8594         return E1000_SUCCESS;
8595 }
8596
8597 #endif
8598 /**
8599  * igb_ioctl -
8600  * @netdev:
8601  * @ifreq:
8602  * @cmd:
8603  **/
8604 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8605 {
8606         switch (cmd) {
8607 #ifdef SIOCGMIIPHY
8608         case SIOCGMIIPHY:
8609         case SIOCGMIIREG:
8610         case SIOCSMIIREG:
8611                 return igb_mii_ioctl(netdev, ifr, cmd);
8612 #endif
8613 #ifdef HAVE_PTP_1588_CLOCK
8614         case SIOCSHWTSTAMP:
8615                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8616 #endif /* HAVE_PTP_1588_CLOCK */
8617 #ifdef ETHTOOL_OPS_COMPAT
8618         case SIOCETHTOOL:
8619                 return ethtool_ioctl(ifr);
8620 #endif
8621         default:
8622                 return -EOPNOTSUPP;
8623         }
8624 }
8625
8626 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8627 {
8628         struct igb_adapter *adapter = hw->back;
8629         u16 cap_offset;
8630
8631         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8632         if (!cap_offset)
8633                 return -E1000_ERR_CONFIG;
8634
8635         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8636
8637         return E1000_SUCCESS;
8638 }
8639
8640 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8641 {
8642         struct igb_adapter *adapter = hw->back;
8643         u16 cap_offset;
8644
8645         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8646         if (!cap_offset)
8647                 return -E1000_ERR_CONFIG;
8648
8649         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8650
8651         return E1000_SUCCESS;
8652 }
8653
8654 #ifdef HAVE_VLAN_RX_REGISTER
8655 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8656 #else
8657 void igb_vlan_mode(struct net_device *netdev, u32 features)
8658 #endif
8659 {
8660         struct igb_adapter *adapter = netdev_priv(netdev);
8661         struct e1000_hw *hw = &adapter->hw;
8662         u32 ctrl, rctl;
8663         int i;
8664 #ifdef HAVE_VLAN_RX_REGISTER
8665         bool enable = !!vlgrp;
8666
8667         igb_irq_disable(adapter);
8668
8669         adapter->vlgrp = vlgrp;
8670
8671         if (!test_bit(__IGB_DOWN, &adapter->state))
8672                 igb_irq_enable(adapter);
8673 #else
8674 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8675         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8676 #else
8677         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8678 #endif
8679 #endif
8680
8681         if (enable) {
8682                 /* enable VLAN tag insert/strip */
8683                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8684                 ctrl |= E1000_CTRL_VME;
8685                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8686
8687                 /* Disable CFI check */
8688                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8689                 rctl &= ~E1000_RCTL_CFIEN;
8690                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8691         } else {
8692                 /* disable VLAN tag insert/strip */
8693                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8694                 ctrl &= ~E1000_CTRL_VME;
8695                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8696         }
8697
8698 #ifndef CONFIG_IGB_VMDQ_NETDEV
8699         for (i = 0; i < adapter->vmdq_pools; i++) {
8700                 igb_set_vf_vlan_strip(adapter,
8701                                       adapter->vfs_allocated_count + i,
8702                                       enable);
8703         }
8704
8705 #else
8706         igb_set_vf_vlan_strip(adapter,
8707                               adapter->vfs_allocated_count,
8708                               enable);
8709
8710         for (i = 1; i < adapter->vmdq_pools; i++) {
8711 #ifdef HAVE_VLAN_RX_REGISTER
8712                 struct igb_vmdq_adapter *vadapter;
8713                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8714                 enable = !!vadapter->vlgrp;
8715 #else
8716                 struct net_device *vnetdev;
8717                 vnetdev = adapter->vmdq_netdev[i-1];
8718 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8719                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8720 #else
8721                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8722 #endif
8723 #endif
8724                 igb_set_vf_vlan_strip(adapter,
8725                                       adapter->vfs_allocated_count + i,
8726                                       enable);
8727         }
8728
8729 #endif
8730         igb_rlpml_set(adapter);
8731 }
8732
8733 #ifdef HAVE_VLAN_PROTOCOL
8734 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8735 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8736 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8737 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8738                                __always_unused __be16 proto, u16 vid)
8739 #else
8740 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8741 #endif
8742 #else
8743 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8744 #endif
8745 {
8746         struct igb_adapter *adapter = netdev_priv(netdev);
8747         int pf_id = adapter->vfs_allocated_count;
8748
8749         /* attempt to add filter to vlvf array */
8750         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8751
8752         /* add the filter since PF can receive vlans w/o entry in vlvf */
8753         igb_vfta_set(adapter, vid, TRUE);
8754 #ifndef HAVE_NETDEV_VLAN_FEATURES
8755
8756         /* Copy feature flags from netdev to the vlan netdev for this vid.
8757          * This allows things like TSO to bubble down to our vlan device.
8758          * There is no need to update netdev for vlan 0 (DCB), since it
8759          * wouldn't has v_netdev.
8760          */
8761         if (adapter->vlgrp) {
8762                 struct vlan_group *vlgrp = adapter->vlgrp;
8763                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8764                 if (v_netdev) {
8765                         v_netdev->features |= netdev->features;
8766                         vlan_group_set_device(vlgrp, vid, v_netdev);
8767                 }
8768         }
8769 #endif
8770 #ifndef HAVE_VLAN_RX_REGISTER
8771
8772         set_bit(vid, adapter->active_vlans);
8773 #endif
8774 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8775         return 0;
8776 #endif
8777 }
8778
8779 #ifdef HAVE_VLAN_PROTOCOL
8780 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8781 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8782 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8783 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8784                                 __always_unused __be16 proto, u16 vid)
8785 #else
8786 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8787 #endif
8788 #else
8789 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8790 #endif
8791 {
8792         struct igb_adapter *adapter = netdev_priv(netdev);
8793         int pf_id = adapter->vfs_allocated_count;
8794         s32 err;
8795
8796 #ifdef HAVE_VLAN_RX_REGISTER
8797         igb_irq_disable(adapter);
8798
8799         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8800
8801         if (!test_bit(__IGB_DOWN, &adapter->state))
8802                 igb_irq_enable(adapter);
8803
8804 #endif /* HAVE_VLAN_RX_REGISTER */
8805         /* remove vlan from VLVF table array */
8806         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8807
8808         /* if vid was not present in VLVF just remove it from table */
8809         if (err)
8810                 igb_vfta_set(adapter, vid, FALSE);
8811 #ifndef HAVE_VLAN_RX_REGISTER
8812
8813         clear_bit(vid, adapter->active_vlans);
8814 #endif
8815 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8816         return 0;
8817 #endif
8818 }
8819
8820 static void igb_restore_vlan(struct igb_adapter *adapter)
8821 {
8822 #ifdef HAVE_VLAN_RX_REGISTER
8823         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8824
8825         if (adapter->vlgrp) {
8826                 u16 vid;
8827                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8828                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8829                                 continue;
8830 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8831                         igb_vlan_rx_add_vid(adapter->netdev,
8832                                             htons(ETH_P_8021Q), vid);
8833 #else
8834                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8835 #endif
8836                 }
8837         }
8838 #else
8839         u16 vid;
8840
8841         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8842
8843         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8844 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8845                 igb_vlan_rx_add_vid(adapter->netdev,
8846                                     htons(ETH_P_8021Q), vid);
8847 #else
8848                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8849 #endif
8850 #endif
8851 }
8852
8853 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8854 {
8855         struct pci_dev *pdev = adapter->pdev;
8856         struct e1000_mac_info *mac = &adapter->hw.mac;
8857
8858         mac->autoneg = 0;
8859
8860         /* SerDes device's does not support 10Mbps Full/duplex
8861          * and 100Mbps Half duplex
8862          */
8863         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8864                 switch (spddplx) {
8865                 case SPEED_10 + DUPLEX_HALF:
8866                 case SPEED_10 + DUPLEX_FULL:
8867                 case SPEED_100 + DUPLEX_HALF:
8868                         dev_err(pci_dev_to_dev(pdev),
8869                                 "Unsupported Speed/Duplex configuration\n");
8870                         return -EINVAL;
8871                 default:
8872                         break;
8873                 }
8874         }
8875
8876         switch (spddplx) {
8877         case SPEED_10 + DUPLEX_HALF:
8878                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8879                 break;
8880         case SPEED_10 + DUPLEX_FULL:
8881                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8882                 break;
8883         case SPEED_100 + DUPLEX_HALF:
8884                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8885                 break;
8886         case SPEED_100 + DUPLEX_FULL:
8887                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8888                 break;
8889         case SPEED_1000 + DUPLEX_FULL:
8890                 mac->autoneg = 1;
8891                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8892                 break;
8893         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8894         default:
8895                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8896                 return -EINVAL;
8897         }
8898
8899         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8900         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8901
8902         return 0;
8903 }
8904
8905 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8906                           bool runtime)
8907 {
8908         struct net_device *netdev = pci_get_drvdata(pdev);
8909         struct igb_adapter *adapter = netdev_priv(netdev);
8910         struct e1000_hw *hw = &adapter->hw;
8911         u32 ctrl, rctl, status;
8912         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8913 #ifdef CONFIG_PM
8914         int retval = 0;
8915 #endif
8916
8917         netif_device_detach(netdev);
8918
8919         status = E1000_READ_REG(hw, E1000_STATUS);
8920         if (status & E1000_STATUS_LU)
8921                 wufc &= ~E1000_WUFC_LNKC;
8922
8923         if (netif_running(netdev))
8924                 __igb_close(netdev, true);
8925
8926         igb_clear_interrupt_scheme(adapter);
8927
8928 #ifdef CONFIG_PM
8929         retval = pci_save_state(pdev);
8930         if (retval)
8931                 return retval;
8932 #endif
8933
8934         if (wufc) {
8935                 igb_setup_rctl(adapter);
8936                 igb_set_rx_mode(netdev);
8937
8938                 /* turn on all-multi mode if wake on multicast is enabled */
8939                 if (wufc & E1000_WUFC_MC) {
8940                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8941                         rctl |= E1000_RCTL_MPE;
8942                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8943                 }
8944
8945                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8946                 /* phy power management enable */
8947                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8948                 ctrl |= E1000_CTRL_ADVD3WUC;
8949                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8950
8951                 /* Allow time for pending master requests to run */
8952                 e1000_disable_pcie_master(hw);
8953
8954                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8955                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8956         } else {
8957                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8958                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8959         }
8960
8961         *enable_wake = wufc || adapter->en_mng_pt;
8962         if (!*enable_wake)
8963                 igb_power_down_link(adapter);
8964         else
8965                 igb_power_up_link(adapter);
8966
8967         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8968          * would have already happened in close and is redundant. */
8969         igb_release_hw_control(adapter);
8970
8971         pci_disable_device(pdev);
8972
8973         return 0;
8974 }
8975
8976 #ifdef CONFIG_PM
8977 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8978 static int igb_suspend(struct device *dev)
8979 #else
8980 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8981 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8982 {
8983 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8984         struct pci_dev *pdev = to_pci_dev(dev);
8985 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8986         int retval;
8987         bool wake;
8988
8989         retval = __igb_shutdown(pdev, &wake, 0);
8990         if (retval)
8991                 return retval;
8992
8993         if (wake) {
8994                 pci_prepare_to_sleep(pdev);
8995         } else {
8996                 pci_wake_from_d3(pdev, false);
8997                 pci_set_power_state(pdev, PCI_D3hot);
8998         }
8999
9000         return 0;
9001 }
9002
9003 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9004 static int igb_resume(struct device *dev)
9005 #else
9006 static int igb_resume(struct pci_dev *pdev)
9007 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9008 {
9009 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9010         struct pci_dev *pdev = to_pci_dev(dev);
9011 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9012         struct net_device *netdev = pci_get_drvdata(pdev);
9013         struct igb_adapter *adapter = netdev_priv(netdev);
9014         struct e1000_hw *hw = &adapter->hw;
9015         u32 err;
9016
9017         pci_set_power_state(pdev, PCI_D0);
9018         pci_restore_state(pdev);
9019         pci_save_state(pdev);
9020
9021         err = pci_enable_device_mem(pdev);
9022         if (err) {
9023                 dev_err(pci_dev_to_dev(pdev),
9024                         "igb: Cannot enable PCI device from suspend\n");
9025                 return err;
9026         }
9027         pci_set_master(pdev);
9028
9029         pci_enable_wake(pdev, PCI_D3hot, 0);
9030         pci_enable_wake(pdev, PCI_D3cold, 0);
9031
9032         if (igb_init_interrupt_scheme(adapter, true)) {
9033                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
9034                 return -ENOMEM;
9035         }
9036
9037         igb_reset(adapter);
9038
9039         /* let the f/w know that the h/w is now under the control of the
9040          * driver. */
9041         igb_get_hw_control(adapter);
9042
9043         E1000_WRITE_REG(hw, E1000_WUS, ~0);
9044
9045         if (netdev->flags & IFF_UP) {
9046                 rtnl_lock();
9047                 err = __igb_open(netdev, true);
9048                 rtnl_unlock();
9049                 if (err)
9050                         return err;
9051         }
9052
9053         netif_device_attach(netdev);
9054
9055         return 0;
9056 }
9057
9058 #ifdef CONFIG_PM_RUNTIME
9059 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9060 static int igb_runtime_idle(struct device *dev)
9061 {
9062         struct pci_dev *pdev = to_pci_dev(dev);
9063         struct net_device *netdev = pci_get_drvdata(pdev);
9064         struct igb_adapter *adapter = netdev_priv(netdev);
9065
9066         if (!igb_has_link(adapter))
9067                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9068
9069         return -EBUSY;
9070 }
9071
9072 static int igb_runtime_suspend(struct device *dev)
9073 {
9074         struct pci_dev *pdev = to_pci_dev(dev);
9075         int retval;
9076         bool wake;
9077
9078         retval = __igb_shutdown(pdev, &wake, 1);
9079         if (retval)
9080                 return retval;
9081
9082         if (wake) {
9083                 pci_prepare_to_sleep(pdev);
9084         } else {
9085                 pci_wake_from_d3(pdev, false);
9086                 pci_set_power_state(pdev, PCI_D3hot);
9087         }
9088
9089         return 0;
9090 }
9091
9092 static int igb_runtime_resume(struct device *dev)
9093 {
9094         return igb_resume(dev);
9095 }
9096 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9097 #endif /* CONFIG_PM_RUNTIME */
9098 #endif /* CONFIG_PM */
9099
9100 #ifdef USE_REBOOT_NOTIFIER
9101 /* only want to do this for 2.4 kernels? */
9102 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9103                              void *p)
9104 {
9105         struct pci_dev *pdev = NULL;
9106         bool wake;
9107
9108         switch (event) {
9109         case SYS_DOWN:
9110         case SYS_HALT:
9111         case SYS_POWER_OFF:
9112                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9113                         if (pci_dev_driver(pdev) == &igb_driver) {
9114                                 __igb_shutdown(pdev, &wake, 0);
9115                                 if (event == SYS_POWER_OFF) {
9116                                         pci_wake_from_d3(pdev, wake);
9117                                         pci_set_power_state(pdev, PCI_D3hot);
9118                                 }
9119                         }
9120                 }
9121         }
9122         return NOTIFY_DONE;
9123 }
9124 #else
9125 static void igb_shutdown(struct pci_dev *pdev)
9126 {
9127         bool wake = false;
9128
9129         __igb_shutdown(pdev, &wake, 0);
9130
9131         if (system_state == SYSTEM_POWER_OFF) {
9132                 pci_wake_from_d3(pdev, wake);
9133                 pci_set_power_state(pdev, PCI_D3hot);
9134         }
9135 }
9136 #endif /* USE_REBOOT_NOTIFIER */
9137
9138 #ifdef CONFIG_NET_POLL_CONTROLLER
9139 /*
9140  * Polling 'interrupt' - used by things like netconsole to send skbs
9141  * without having to re-enable interrupts. It's not called while
9142  * the interrupt routine is executing.
9143  */
9144 static void igb_netpoll(struct net_device *netdev)
9145 {
9146         struct igb_adapter *adapter = netdev_priv(netdev);
9147         struct e1000_hw *hw = &adapter->hw;
9148         struct igb_q_vector *q_vector;
9149         int i;
9150
9151         for (i = 0; i < adapter->num_q_vectors; i++) {
9152                 q_vector = adapter->q_vector[i];
9153                 if (adapter->msix_entries)
9154                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9155                 else
9156                         igb_irq_disable(adapter);
9157                 napi_schedule(&q_vector->napi);
9158         }
9159 }
9160 #endif /* CONFIG_NET_POLL_CONTROLLER */
9161
9162 #ifdef HAVE_PCI_ERS
9163 #define E1000_DEV_ID_82576_VF 0x10CA
9164 /**
9165  * igb_io_error_detected - called when PCI error is detected
9166  * @pdev: Pointer to PCI device
9167  * @state: The current pci connection state
9168  *
9169  * This function is called after a PCI bus error affecting
9170  * this device has been detected.
9171  */
9172 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9173                                               pci_channel_state_t state)
9174 {
9175         struct net_device *netdev = pci_get_drvdata(pdev);
9176         struct igb_adapter *adapter = netdev_priv(netdev);
9177
9178 #ifdef CONFIG_PCI_IOV__UNUSED
9179         struct pci_dev *bdev, *vfdev;
9180         u32 dw0, dw1, dw2, dw3;
9181         int vf, pos;
9182         u16 req_id, pf_func;
9183
9184         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9185                 goto skip_bad_vf_detection;
9186
9187         bdev = pdev->bus->self;
9188         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9189                 bdev = bdev->bus->self;
9190
9191         if (!bdev)
9192                 goto skip_bad_vf_detection;
9193
9194         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9195         if (!pos)
9196                 goto skip_bad_vf_detection;
9197
9198         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9199         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9200         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9201         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9202
9203         req_id = dw1 >> 16;
9204         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9205         if (!(req_id & 0x0080))
9206                 goto skip_bad_vf_detection;
9207
9208         pf_func = req_id & 0x01;
9209         if ((pf_func & 1) == (pdev->devfn & 1)) {
9210
9211                 vf = (req_id & 0x7F) >> 1;
9212                 dev_err(pci_dev_to_dev(pdev),
9213                         "VF %d has caused a PCIe error\n", vf);
9214                 dev_err(pci_dev_to_dev(pdev),
9215                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9216                         "%8.8x\tdw3: %8.8x\n",
9217                         dw0, dw1, dw2, dw3);
9218
9219                 /* Find the pci device of the offending VF */
9220                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9221                                        E1000_DEV_ID_82576_VF, NULL);
9222                 while (vfdev) {
9223                         if (vfdev->devfn == (req_id & 0xFF))
9224                                 break;
9225                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9226                                                E1000_DEV_ID_82576_VF, vfdev);
9227                 }
9228                 /*
9229                  * There's a slim chance the VF could have been hot plugged,
9230                  * so if it is no longer present we don't need to issue the
9231                  * VFLR.  Just clean up the AER in that case.
9232                  */
9233                 if (vfdev) {
9234                         dev_err(pci_dev_to_dev(pdev),
9235                                 "Issuing VFLR to VF %d\n", vf);
9236                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9237                 }
9238
9239                 pci_cleanup_aer_uncorrect_error_status(pdev);
9240         }
9241
9242         /*
9243          * Even though the error may have occurred on the other port
9244          * we still need to increment the vf error reference count for
9245          * both ports because the I/O resume function will be called
9246          * for both of them.
9247          */
9248         adapter->vferr_refcount++;
9249
9250         return PCI_ERS_RESULT_RECOVERED;
9251
9252 skip_bad_vf_detection:
9253 #endif /* CONFIG_PCI_IOV */
9254
9255         netif_device_detach(netdev);
9256
9257         if (state == pci_channel_io_perm_failure)
9258                 return PCI_ERS_RESULT_DISCONNECT;
9259
9260         if (netif_running(netdev))
9261                 igb_down(adapter);
9262         pci_disable_device(pdev);
9263
9264         /* Request a slot slot reset. */
9265         return PCI_ERS_RESULT_NEED_RESET;
9266 }
9267
9268 /**
9269  * igb_io_slot_reset - called after the pci bus has been reset.
9270  * @pdev: Pointer to PCI device
9271  *
9272  * Restart the card from scratch, as if from a cold-boot. Implementation
9273  * resembles the first-half of the igb_resume routine.
9274  */
9275 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9276 {
9277         struct net_device *netdev = pci_get_drvdata(pdev);
9278         struct igb_adapter *adapter = netdev_priv(netdev);
9279         struct e1000_hw *hw = &adapter->hw;
9280         pci_ers_result_t result;
9281
9282         if (pci_enable_device_mem(pdev)) {
9283                 dev_err(pci_dev_to_dev(pdev),
9284                         "Cannot re-enable PCI device after reset.\n");
9285                 result = PCI_ERS_RESULT_DISCONNECT;
9286         } else {
9287                 pci_set_master(pdev);
9288                 pci_restore_state(pdev);
9289                 pci_save_state(pdev);
9290
9291                 pci_enable_wake(pdev, PCI_D3hot, 0);
9292                 pci_enable_wake(pdev, PCI_D3cold, 0);
9293
9294                 schedule_work(&adapter->reset_task);
9295                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9296                 result = PCI_ERS_RESULT_RECOVERED;
9297         }
9298
9299         pci_cleanup_aer_uncorrect_error_status(pdev);
9300
9301         return result;
9302 }
9303
9304 /**
9305  * igb_io_resume - called when traffic can start flowing again.
9306  * @pdev: Pointer to PCI device
9307  *
9308  * This callback is called when the error recovery driver tells us that
9309  * its OK to resume normal operation. Implementation resembles the
9310  * second-half of the igb_resume routine.
9311  */
9312 static void igb_io_resume(struct pci_dev *pdev)
9313 {
9314         struct net_device *netdev = pci_get_drvdata(pdev);
9315         struct igb_adapter *adapter = netdev_priv(netdev);
9316
9317         if (adapter->vferr_refcount) {
9318                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9319                 adapter->vferr_refcount--;
9320                 return;
9321         }
9322
9323         if (netif_running(netdev)) {
9324                 if (igb_up(adapter)) {
9325                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9326                         return;
9327                 }
9328         }
9329
9330         netif_device_attach(netdev);
9331
9332         /* let the f/w know that the h/w is now under the control of the
9333          * driver. */
9334         igb_get_hw_control(adapter);
9335 }
9336
9337 #endif /* HAVE_PCI_ERS */
9338
9339 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9340 {
9341         struct e1000_hw *hw = &adapter->hw;
9342         int i;
9343
9344         if (is_zero_ether_addr(addr))
9345                 return 0;
9346
9347         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9348                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9349                         continue;
9350                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9351                                                    IGB_MAC_STATE_IN_USE);
9352                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9353                 adapter->mac_table[i].queue = queue;
9354                 igb_sync_mac_table(adapter);
9355                 return 0;
9356         }
9357         return -ENOMEM;
9358 }
9359 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9360 {
9361         /* search table for addr, if found, set to 0 and sync */
9362         int i;
9363         struct e1000_hw *hw = &adapter->hw;
9364
9365         if (is_zero_ether_addr(addr))
9366                 return 0;
9367         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9368                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9369                     adapter->mac_table[i].queue == queue) {
9370                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9371                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9372                         adapter->mac_table[i].queue = 0;
9373                         igb_sync_mac_table(adapter);
9374                         return 0;
9375                 }
9376         }
9377         return -ENOMEM;
9378 }
9379 static int igb_set_vf_mac(struct igb_adapter *adapter,
9380                           int vf, unsigned char *mac_addr)
9381 {
9382         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9383         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9384
9385         igb_add_mac_filter(adapter, mac_addr, vf);
9386
9387         return 0;
9388 }
9389
9390 #ifdef IFLA_VF_MAX
9391 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9392 {
9393         struct igb_adapter *adapter = netdev_priv(netdev);
9394         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9395                 return -EINVAL;
9396         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9397         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9398         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9399                                       " change effective.\n");
9400         if (test_bit(__IGB_DOWN, &adapter->state)) {
9401                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9402                          " but the PF device is not up.\n");
9403                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9404                          " attempting to use the VF device.\n");
9405         }
9406         return igb_set_vf_mac(adapter, vf, mac);
9407 }
9408
9409 static int igb_link_mbps(int internal_link_speed)
9410 {
9411         switch (internal_link_speed) {
9412         case SPEED_100:
9413                 return 100;
9414         case SPEED_1000:
9415                 return 1000;
9416         case SPEED_2500:
9417                 return 2500;
9418         default:
9419                 return 0;
9420         }
9421 }
9422
9423 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9424                         int link_speed)
9425 {
9426         int rf_dec, rf_int;
9427         u32 bcnrc_val;
9428
9429         if (tx_rate != 0) {
9430                 /* Calculate the rate factor values to set */
9431                 rf_int = link_speed / tx_rate;
9432                 rf_dec = (link_speed - (rf_int * tx_rate));
9433                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9434
9435                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9436                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9437                                 E1000_RTTBCNRC_RF_INT_MASK);
9438                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9439         } else {
9440                 bcnrc_val = 0;
9441         }
9442
9443         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9444         /*
9445          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9446          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9447          */
9448         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9449         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9450 }
9451
9452 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9453 {
9454         int actual_link_speed, i;
9455         bool reset_rate = false;
9456
9457         /* VF TX rate limit was not set */
9458         if ((adapter->vf_rate_link_speed == 0) ||
9459                 (adapter->hw.mac.type != e1000_82576))
9460                 return;
9461
9462         actual_link_speed = igb_link_mbps(adapter->link_speed);
9463         if (actual_link_speed != adapter->vf_rate_link_speed) {
9464                 reset_rate = true;
9465                 adapter->vf_rate_link_speed = 0;
9466                 dev_info(&adapter->pdev->dev,
9467                 "Link speed has been changed. VF Transmit rate is disabled\n");
9468         }
9469
9470         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9471                 if (reset_rate)
9472                         adapter->vf_data[i].tx_rate = 0;
9473
9474                 igb_set_vf_rate_limit(&adapter->hw, i,
9475                         adapter->vf_data[i].tx_rate, actual_link_speed);
9476         }
9477 }
9478
9479 #ifdef HAVE_VF_MIN_MAX_TXRATE
9480 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9481                              int tx_rate)
9482 #else /* HAVE_VF_MIN_MAX_TXRATE */
9483 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9484 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9485 {
9486         struct igb_adapter *adapter = netdev_priv(netdev);
9487         struct e1000_hw *hw = &adapter->hw;
9488         int actual_link_speed;
9489
9490         if (hw->mac.type != e1000_82576)
9491                 return -EOPNOTSUPP;
9492
9493 #ifdef HAVE_VF_MIN_MAX_TXRATE
9494         if (min_tx_rate)
9495                 return -EINVAL;
9496 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9497
9498         actual_link_speed = igb_link_mbps(adapter->link_speed);
9499         if ((vf >= adapter->vfs_allocated_count) ||
9500                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9501                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9502                 return -EINVAL;
9503
9504         adapter->vf_rate_link_speed = actual_link_speed;
9505         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9506         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9507
9508         return 0;
9509 }
9510
9511 static int igb_ndo_get_vf_config(struct net_device *netdev,
9512                                  int vf, struct ifla_vf_info *ivi)
9513 {
9514         struct igb_adapter *adapter = netdev_priv(netdev);
9515         if (vf >= adapter->vfs_allocated_count)
9516                 return -EINVAL;
9517         ivi->vf = vf;
9518         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9519 #ifdef HAVE_VF_MIN_MAX_TXRATE
9520         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9521         ivi->min_tx_rate = 0;
9522 #else /* HAVE_VF_MIN_MAX_TXRATE */
9523         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9524 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9525         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9526         ivi->qos = adapter->vf_data[vf].pf_qos;
9527 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9528         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9529 #endif
9530         return 0;
9531 }
9532 #endif
9533 static void igb_vmm_control(struct igb_adapter *adapter)
9534 {
9535         struct e1000_hw *hw = &adapter->hw;
9536         int count;
9537         u32 reg;
9538
9539         switch (hw->mac.type) {
9540         case e1000_82575:
9541         default:
9542                 /* replication is not supported for 82575 */
9543                 return;
9544         case e1000_82576:
9545                 /* notify HW that the MAC is adding vlan tags */
9546                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9547                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9548                         E1000_DTXCTL_SPOOF_INT);
9549                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9550         case e1000_82580:
9551                 /* enable replication vlan tag stripping */
9552                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9553                 reg |= E1000_RPLOLR_STRVLAN;
9554                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9555         case e1000_i350:
9556         case e1000_i354:
9557                 /* none of the above registers are supported by i350 */
9558                 break;
9559         }
9560
9561         /* Enable Malicious Driver Detection */
9562         if ((adapter->vfs_allocated_count) &&
9563             (adapter->mdd)) {
9564                 if (hw->mac.type == e1000_i350)
9565                         igb_enable_mdd(adapter);
9566         }
9567
9568                 /* enable replication and loopback support */
9569                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9570                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9571                         e1000_vmdq_set_loopback_pf(hw, 1);
9572                 e1000_vmdq_set_anti_spoofing_pf(hw,
9573                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9574                         adapter->vfs_allocated_count);
9575         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9576                                       adapter->vmdq_pools);
9577 }
9578
9579 static void igb_init_fw(struct igb_adapter *adapter)
9580 {
9581         struct e1000_fw_drv_info fw_cmd;
9582         struct e1000_hw *hw = &adapter->hw;
9583         int i;
9584         u16 mask;
9585
9586         if (hw->mac.type == e1000_i210)
9587                 mask = E1000_SWFW_EEP_SM;
9588         else
9589                 mask = E1000_SWFW_PHY0_SM;
9590         /* i211 parts do not support this feature */
9591         if (hw->mac.type == e1000_i211)
9592                 hw->mac.arc_subsystem_valid = false;
9593
9594         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9595                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9596                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9597                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9598                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9599                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9600                         fw_cmd.port_num = hw->bus.func;
9601                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9602                         fw_cmd.hdr.checksum = 0;
9603                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9604                                                                    (FW_HDR_LEN +
9605                                                                     fw_cmd.hdr.buf_len));
9606                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9607                                                      sizeof(fw_cmd));
9608                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9609                                 break;
9610                 }
9611         } else
9612                 dev_warn(pci_dev_to_dev(adapter->pdev),
9613                          "Unable to get semaphore, firmware init failed.\n");
9614         hw->mac.ops.release_swfw_sync(hw, mask);
9615 }
9616
9617 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9618 {
9619         struct e1000_hw *hw = &adapter->hw;
9620         u32 dmac_thr;
9621         u16 hwm;
9622         u32 status;
9623
9624         if (hw->mac.type == e1000_i211)
9625                 return;
9626
9627         if (hw->mac.type > e1000_82580) {
9628                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9629                         u32 reg;
9630
9631                         /* force threshold to 0.  */
9632                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9633
9634                         /*
9635                          * DMA Coalescing high water mark needs to be greater
9636                          * than the Rx threshold. Set hwm to PBA - max frame
9637                          * size in 16B units, capping it at PBA - 6KB.
9638                          */
9639                         hwm = 64 * pba - adapter->max_frame_size / 16;
9640                         if (hwm < 64 * (pba - 6))
9641                                 hwm = 64 * (pba - 6);
9642                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9643                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9644                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9645                                 & E1000_FCRTC_RTH_COAL_MASK);
9646                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9647
9648                         /*
9649                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9650                          * frame size, capping it at PBA - 10KB.
9651                          */
9652                         dmac_thr = pba - adapter->max_frame_size / 512;
9653                         if (dmac_thr < pba - 10)
9654                                 dmac_thr = pba - 10;
9655                         reg = E1000_READ_REG(hw, E1000_DMACR);
9656                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9657                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9658                                 & E1000_DMACR_DMACTHR_MASK);
9659
9660                         /* transition to L0x or L1 if available..*/
9661                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9662
9663                         /* Check if status is 2.5Gb backplane connection
9664                          * before configuration of watchdog timer, which is
9665                          * in msec values in 12.8usec intervals
9666                          * watchdog timer= msec values in 32usec intervals
9667                          * for non 2.5Gb connection
9668                          */
9669                         if (hw->mac.type == e1000_i354) {
9670                                 status = E1000_READ_REG(hw, E1000_STATUS);
9671                                 if ((status & E1000_STATUS_2P5_SKU) &&
9672                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9673                                         reg |= ((adapter->dmac * 5) >> 6);
9674                                 else
9675                                         reg |= ((adapter->dmac) >> 5);
9676                         } else {
9677                                 reg |= ((adapter->dmac) >> 5);
9678                         }
9679
9680                         /*
9681                          * Disable BMC-to-OS Watchdog enable
9682                          * on devices that support OS-to-BMC
9683                          */
9684                         if (hw->mac.type != e1000_i354)
9685                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9686                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9687
9688                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9689                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9690
9691                         /* This sets the time to wait before requesting
9692                          * transition to low power state to number of usecs
9693                          * needed to receive 1 512 byte frame at gigabit
9694                          * line rate. On i350 device, time to make transition
9695                          * to Lx state is delayed by 4 usec with flush disable
9696                          * bit set to avoid losing mailbox interrupts
9697                          */
9698                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9699                         if (hw->mac.type == e1000_i350)
9700                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9701
9702                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9703                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9704                          */
9705                         if (hw->mac.type == e1000_i354) {
9706                                 status = E1000_READ_REG(hw, E1000_STATUS);
9707                                 if ((status & E1000_STATUS_2P5_SKU) &&
9708                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9709                                         reg |= 0xA;
9710                                 else
9711                                         reg |= 0x4;
9712                         } else {
9713                                 reg |= 0x4;
9714                         }
9715                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9716
9717                         /* free space in tx packet buffer to wake from DMA coal */
9718                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9719                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9720
9721                         /* make low power state decision controlled by DMA coal */
9722                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9723                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9724                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9725                 } /* endif adapter->dmac is not disabled */
9726         } else if (hw->mac.type == e1000_82580) {
9727                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9728                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9729                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9730                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9731         }
9732 }
9733
9734 #ifdef HAVE_I2C_SUPPORT
9735 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9736  *  @hw: pointer to hardware structure
9737  *  @byte_offset: byte offset to read
9738  *  @dev_addr: device address
9739  *  @data: value read
9740  *
9741  *  Performs byte read operation over I2C interface at
9742  *  a specified device address.
9743  */
9744 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9745                                 u8 dev_addr, u8 *data)
9746 {
9747         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9748         struct i2c_client *this_client = adapter->i2c_client;
9749         s32 status;
9750         u16 swfw_mask = 0;
9751
9752         if (!this_client)
9753                 return E1000_ERR_I2C;
9754
9755         swfw_mask = E1000_SWFW_PHY0_SM;
9756
9757         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9758             != E1000_SUCCESS)
9759                 return E1000_ERR_SWFW_SYNC;
9760
9761         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9762         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9763
9764         if (status < 0)
9765                 return E1000_ERR_I2C;
9766         else {
9767                 *data = status;
9768                 return E1000_SUCCESS;
9769         }
9770 }
9771
9772 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9773  *  @hw: pointer to hardware structure
9774  *  @byte_offset: byte offset to write
9775  *  @dev_addr: device address
9776  *  @data: value to write
9777  *
9778  *  Performs byte write operation over I2C interface at
9779  *  a specified device address.
9780  */
9781 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9782                                  u8 dev_addr, u8 data)
9783 {
9784         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9785         struct i2c_client *this_client = adapter->i2c_client;
9786         s32 status;
9787         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9788
9789         if (!this_client)
9790                 return E1000_ERR_I2C;
9791
9792         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9793                 return E1000_ERR_SWFW_SYNC;
9794         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9795         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9796
9797         if (status)
9798                 return E1000_ERR_I2C;
9799         else
9800                 return E1000_SUCCESS;
9801 }
9802 #endif /*  HAVE_I2C_SUPPORT */
9803 /* igb_main.c */
9804
9805
9806 /**
9807  * igb_probe - Device Initialization Routine
9808  * @pdev: PCI device information struct
9809  * @ent: entry in igb_pci_tbl
9810  *
9811  * Returns 0 on success, negative on failure
9812  *
9813  * igb_probe initializes an adapter identified by a pci_dev structure.
9814  * The OS initialization, configuring of the adapter private structure,
9815  * and a hardware reset occur.
9816  **/
9817 int igb_kni_probe(struct pci_dev *pdev,
9818                                struct net_device **lad_dev)
9819 {
9820         struct net_device *netdev;
9821         struct igb_adapter *adapter;
9822         struct e1000_hw *hw;
9823         u16 eeprom_data = 0;
9824         u8 pba_str[E1000_PBANUM_LENGTH];
9825         s32 ret_val;
9826         static int global_quad_port_a; /* global quad port a indication */
9827         int i, err, pci_using_dac = 0;
9828         static int cards_found;
9829
9830         err = pci_enable_device_mem(pdev);
9831         if (err)
9832                 return err;
9833
9834 #ifdef NO_KNI
9835         pci_using_dac = 0;
9836         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9837         if (!err) {
9838                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9839                 if (!err)
9840                         pci_using_dac = 1;
9841         } else {
9842                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9843                 if (err) {
9844                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9845                         if (err) {
9846                                 IGB_ERR("No usable DMA configuration, "
9847                                         "aborting\n");
9848                                 goto err_dma;
9849                         }
9850                 }
9851         }
9852
9853 #ifndef HAVE_ASPM_QUIRKS
9854         /* 82575 requires that the pci-e link partner disable the L0s state */
9855         switch (pdev->device) {
9856         case E1000_DEV_ID_82575EB_COPPER:
9857         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9858         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9859                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9860         default:
9861                 break;
9862         }
9863
9864 #endif /* HAVE_ASPM_QUIRKS */
9865         err = pci_request_selected_regions(pdev,
9866                                            pci_select_bars(pdev,
9867                                                            IORESOURCE_MEM),
9868                                            igb_driver_name);
9869         if (err)
9870                 goto err_pci_reg;
9871
9872         pci_enable_pcie_error_reporting(pdev);
9873
9874         pci_set_master(pdev);
9875
9876         err = -ENOMEM;
9877 #endif /* NO_KNI */
9878 #ifdef HAVE_TX_MQ
9879         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9880                                    IGB_MAX_TX_QUEUES);
9881 #else
9882         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9883 #endif /* HAVE_TX_MQ */
9884         if (!netdev)
9885                 goto err_alloc_etherdev;
9886
9887         SET_MODULE_OWNER(netdev);
9888         SET_NETDEV_DEV(netdev, &pdev->dev);
9889
9890         //pci_set_drvdata(pdev, netdev);
9891         adapter = netdev_priv(netdev);
9892         adapter->netdev = netdev;
9893         adapter->pdev = pdev;
9894         hw = &adapter->hw;
9895         hw->back = adapter;
9896         adapter->port_num = hw->bus.func;
9897         adapter->msg_enable = (1 << debug) - 1;
9898
9899 #ifdef HAVE_PCI_ERS
9900         err = pci_save_state(pdev);
9901         if (err)
9902                 goto err_ioremap;
9903 #endif
9904         err = -EIO;
9905         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9906                               pci_resource_len(pdev, 0));
9907         if (!hw->hw_addr)
9908                 goto err_ioremap;
9909
9910 #ifdef HAVE_NET_DEVICE_OPS
9911         netdev->netdev_ops = &igb_netdev_ops;
9912 #else /* HAVE_NET_DEVICE_OPS */
9913         netdev->open = &igb_open;
9914         netdev->stop = &igb_close;
9915         netdev->get_stats = &igb_get_stats;
9916 #ifdef HAVE_SET_RX_MODE
9917         netdev->set_rx_mode = &igb_set_rx_mode;
9918 #endif
9919         netdev->set_multicast_list = &igb_set_rx_mode;
9920         netdev->set_mac_address = &igb_set_mac;
9921         netdev->change_mtu = &igb_change_mtu;
9922         netdev->do_ioctl = &igb_ioctl;
9923 #ifdef HAVE_TX_TIMEOUT
9924         netdev->tx_timeout = &igb_tx_timeout;
9925 #endif
9926         netdev->vlan_rx_register = igb_vlan_mode;
9927         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9928         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9929 #ifdef CONFIG_NET_POLL_CONTROLLER
9930         netdev->poll_controller = igb_netpoll;
9931 #endif
9932         netdev->hard_start_xmit = &igb_xmit_frame;
9933 #endif /* HAVE_NET_DEVICE_OPS */
9934         igb_set_ethtool_ops(netdev);
9935 #ifdef HAVE_TX_TIMEOUT
9936         netdev->watchdog_timeo = 5 * HZ;
9937 #endif
9938
9939         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9940
9941         adapter->bd_number = cards_found;
9942
9943         /* setup the private structure */
9944         err = igb_sw_init(adapter);
9945         if (err)
9946                 goto err_sw_init;
9947
9948         e1000_get_bus_info(hw);
9949
9950         hw->phy.autoneg_wait_to_complete = FALSE;
9951         hw->mac.adaptive_ifs = FALSE;
9952
9953         /* Copper options */
9954         if (hw->phy.media_type == e1000_media_type_copper) {
9955                 hw->phy.mdix = AUTO_ALL_MODES;
9956                 hw->phy.disable_polarity_correction = FALSE;
9957                 hw->phy.ms_type = e1000_ms_hw_default;
9958         }
9959
9960         if (e1000_check_reset_block(hw))
9961                 dev_info(pci_dev_to_dev(pdev),
9962                         "PHY reset is blocked due to SOL/IDER session.\n");
9963
9964         /*
9965          * features is initialized to 0 in allocation, it might have bits
9966          * set by igb_sw_init so we should use an or instead of an
9967          * assignment.
9968          */
9969         netdev->features |= NETIF_F_SG |
9970                             NETIF_F_IP_CSUM |
9971 #ifdef NETIF_F_IPV6_CSUM
9972                             NETIF_F_IPV6_CSUM |
9973 #endif
9974 #ifdef NETIF_F_TSO
9975                             NETIF_F_TSO |
9976 #ifdef NETIF_F_TSO6
9977                             NETIF_F_TSO6 |
9978 #endif
9979 #endif /* NETIF_F_TSO */
9980 #ifdef NETIF_F_RXHASH
9981                             NETIF_F_RXHASH |
9982 #endif
9983                             NETIF_F_RXCSUM |
9984 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9985                             NETIF_F_HW_VLAN_CTAG_RX |
9986                             NETIF_F_HW_VLAN_CTAG_TX;
9987 #else
9988                             NETIF_F_HW_VLAN_RX |
9989                             NETIF_F_HW_VLAN_TX;
9990 #endif
9991
9992         if (hw->mac.type >= e1000_82576)
9993                 netdev->features |= NETIF_F_SCTP_CSUM;
9994
9995 #ifdef HAVE_NDO_SET_FEATURES
9996         /* copy netdev features into list of user selectable features */
9997         netdev->hw_features |= netdev->features;
9998 #ifndef IGB_NO_LRO
9999
10000         /* give us the option of enabling LRO later */
10001         netdev->hw_features |= NETIF_F_LRO;
10002 #endif
10003 #else
10004 #ifdef NETIF_F_GRO
10005
10006         /* this is only needed on kernels prior to 2.6.39 */
10007         netdev->features |= NETIF_F_GRO;
10008 #endif
10009 #endif
10010
10011         /* set this bit last since it cannot be part of hw_features */
10012 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
10013         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
10014 #else
10015         netdev->features |= NETIF_F_HW_VLAN_FILTER;
10016 #endif
10017
10018 #ifdef HAVE_NETDEV_VLAN_FEATURES
10019         netdev->vlan_features |= NETIF_F_TSO |
10020                                  NETIF_F_TSO6 |
10021                                  NETIF_F_IP_CSUM |
10022                                  NETIF_F_IPV6_CSUM |
10023                                  NETIF_F_SG;
10024
10025 #endif
10026         if (pci_using_dac)
10027                 netdev->features |= NETIF_F_HIGHDMA;
10028
10029 #ifdef NO_KNI
10030         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
10031 #ifdef DEBUG
10032         if (adapter->dmac != IGB_DMAC_DISABLE)
10033                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
10034 #endif
10035
10036         /* before reading the NVM, reset the controller to put the device in a
10037          * known good starting state */
10038         e1000_reset_hw(hw);
10039 #endif /* NO_KNI */
10040
10041         /* make sure the NVM is good */
10042         if (e1000_validate_nvm_checksum(hw) < 0) {
10043                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
10044                         " Valid\n");
10045                 err = -EIO;
10046                 goto err_eeprom;
10047         }
10048
10049         /* copy the MAC address out of the NVM */
10050         if (e1000_read_mac_addr(hw))
10051                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10052         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10053 #ifdef ETHTOOL_GPERMADDR
10054         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10055
10056         if (!is_valid_ether_addr(netdev->perm_addr)) {
10057 #else
10058         if (!is_valid_ether_addr(netdev->dev_addr)) {
10059 #endif
10060                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10061                 err = -EIO;
10062                 goto err_eeprom;
10063         }
10064
10065         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10066         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10067         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10068         igb_rar_set(adapter, 0);
10069
10070         /* get firmware version for ethtool -i */
10071         igb_set_fw_version(adapter);
10072
10073         /* Check if Media Autosense is enabled */
10074         if (hw->mac.type == e1000_82580)
10075                 igb_init_mas(adapter);
10076
10077 #ifdef NO_KNI
10078 #ifdef HAVE_TIMER_SETUP
10079         timer_setup(&adapter->watchdog_timer, &igb_watchdog, 0);
10080         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10081                 timer_setup(&adapter->dma_err_timer, &igb_dma_err_timer, 0);
10082         timer_setup(&adapter->phy_info_timer, &igb_update_phy_info, 0);
10083 #else
10084         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10085                     (unsigned long) adapter);
10086         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10087                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10088                             (unsigned long) adapter);
10089         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10090                     (unsigned long) adapter);
10091 #endif
10092
10093         INIT_WORK(&adapter->reset_task, igb_reset_task);
10094         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10095         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10096                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10097 #endif
10098
10099         /* Initialize link properties that are user-changeable */
10100         adapter->fc_autoneg = true;
10101         hw->mac.autoneg = true;
10102         hw->phy.autoneg_advertised = 0x2f;
10103
10104         hw->fc.requested_mode = e1000_fc_default;
10105         hw->fc.current_mode = e1000_fc_default;
10106
10107         e1000_validate_mdi_setting(hw);
10108
10109         /* By default, support wake on port A */
10110         if (hw->bus.func == 0)
10111                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10112
10113         /* Check the NVM for wake support for non-port A ports */
10114         if (hw->mac.type >= e1000_82580)
10115                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10116                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10117                                  &eeprom_data);
10118         else if (hw->bus.func == 1)
10119                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10120
10121         if (eeprom_data & IGB_EEPROM_APME)
10122                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10123
10124         /* now that we have the eeprom settings, apply the special cases where
10125          * the eeprom may be wrong or the board simply won't support wake on
10126          * lan on a particular port */
10127         switch (pdev->device) {
10128         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10129                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10130                 break;
10131         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10132         case E1000_DEV_ID_82576_FIBER:
10133         case E1000_DEV_ID_82576_SERDES:
10134                 /* Wake events only supported on port A for dual fiber
10135                  * regardless of eeprom setting */
10136                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10137                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10138                 break;
10139         case E1000_DEV_ID_82576_QUAD_COPPER:
10140         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10141                 /* if quad port adapter, disable WoL on all but port A */
10142                 if (global_quad_port_a != 0)
10143                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10144                 else
10145                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10146                 /* Reset for multiple quad port adapters */
10147                 if (++global_quad_port_a == 4)
10148                         global_quad_port_a = 0;
10149                 break;
10150         default:
10151                 /* If the device can't wake, don't set software support */
10152                 if (!device_can_wakeup(&adapter->pdev->dev))
10153                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10154                 break;
10155         }
10156
10157         /* initialize the wol settings based on the eeprom settings */
10158         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10159                 adapter->wol |= E1000_WUFC_MAG;
10160
10161         /* Some vendors want WoL disabled by default, but still supported */
10162         if ((hw->mac.type == e1000_i350) &&
10163             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10164                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10165                 adapter->wol = 0;
10166         }
10167
10168 #ifdef NO_KNI
10169         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10170                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10171
10172         /* reset the hardware with the new settings */
10173         igb_reset(adapter);
10174         adapter->devrc = 0;
10175
10176 #ifdef HAVE_I2C_SUPPORT
10177         /* Init the I2C interface */
10178         err = igb_init_i2c(adapter);
10179         if (err) {
10180                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10181                 goto err_eeprom;
10182         }
10183 #endif /* HAVE_I2C_SUPPORT */
10184
10185         /* let the f/w know that the h/w is now under the control of the
10186          * driver. */
10187         igb_get_hw_control(adapter);
10188
10189         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10190         err = register_netdev(netdev);
10191         if (err)
10192                 goto err_register;
10193
10194 #ifdef CONFIG_IGB_VMDQ_NETDEV
10195         err = igb_init_vmdq_netdevs(adapter);
10196         if (err)
10197                 goto err_register;
10198 #endif
10199         /* carrier off reporting is important to ethtool even BEFORE open */
10200         netif_carrier_off(netdev);
10201
10202 #ifdef IGB_DCA
10203         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10204                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10205                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10206                 igb_setup_dca(adapter);
10207         }
10208
10209 #endif
10210 #ifdef HAVE_PTP_1588_CLOCK
10211         /* do hw tstamp init after resetting */
10212         igb_ptp_init(adapter);
10213 #endif /* HAVE_PTP_1588_CLOCK */
10214
10215 #endif /* NO_KNI */
10216         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10217         /* print bus type/speed/width info */
10218         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10219                  netdev->name,
10220                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10221                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10222                   (hw->mac.type == e1000_i354) ? "integrated" :
10223                                                             "unknown"),
10224                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10225                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10226                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10227                   (hw->mac.type == e1000_i354) ? "integrated" :
10228                    "unknown"));
10229         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10230         for (i = 0; i < 6; i++)
10231                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10232
10233         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10234         if (ret_val)
10235                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10236         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10237                  pba_str);
10238
10239
10240         /* Initialize the thermal sensor on i350 devices. */
10241         if (hw->mac.type == e1000_i350) {
10242                 if (hw->bus.func == 0) {
10243                         u16 ets_word;
10244
10245                         /*
10246                          * Read the NVM to determine if this i350 device
10247                          * supports an external thermal sensor.
10248                          */
10249                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10250                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10251                                 adapter->ets = true;
10252                         else
10253                                 adapter->ets = false;
10254                 }
10255 #ifdef NO_KNI
10256 #ifdef IGB_HWMON
10257
10258                 igb_sysfs_init(adapter);
10259 #else
10260 #ifdef IGB_PROCFS
10261
10262                 igb_procfs_init(adapter);
10263 #endif /* IGB_PROCFS */
10264 #endif /* IGB_HWMON */
10265 #endif /* NO_KNI */
10266         } else {
10267                 adapter->ets = false;
10268         }
10269
10270         if (hw->phy.media_type == e1000_media_type_copper) {
10271                 switch (hw->mac.type) {
10272                 case e1000_i350:
10273                 case e1000_i210:
10274                 case e1000_i211:
10275                         /* Enable EEE for internal copper PHY devices */
10276                         err = e1000_set_eee_i350(hw);
10277                         if ((!err) &&
10278                             (adapter->flags & IGB_FLAG_EEE))
10279                                 adapter->eee_advert =
10280                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10281                         break;
10282                 case e1000_i354:
10283                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10284                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10285                                 err = e1000_set_eee_i354(hw);
10286                                 if ((!err) &&
10287                                     (adapter->flags & IGB_FLAG_EEE))
10288                                         adapter->eee_advert =
10289                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10290                         }
10291                         break;
10292                 default:
10293                         break;
10294                 }
10295         }
10296
10297         /* send driver version info to firmware */
10298         if (hw->mac.type >= e1000_i350)
10299                 igb_init_fw(adapter);
10300
10301 #ifndef IGB_NO_LRO
10302         if (netdev->features & NETIF_F_LRO)
10303                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10304         else
10305                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10306 #endif
10307         dev_info(pci_dev_to_dev(pdev),
10308                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10309                  adapter->msix_entries ? "MSI-X" :
10310                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10311                  adapter->num_rx_queues, adapter->num_tx_queues);
10312
10313         cards_found++;
10314         *lad_dev = netdev;
10315
10316         pm_runtime_put_noidle(&pdev->dev);
10317         return 0;
10318
10319 //err_register:
10320 //      igb_release_hw_control(adapter);
10321 #ifdef HAVE_I2C_SUPPORT
10322         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10323 #endif /* HAVE_I2C_SUPPORT */
10324 err_eeprom:
10325 //      if (!e1000_check_reset_block(hw))
10326 //              e1000_phy_hw_reset(hw);
10327
10328         if (hw->flash_address)
10329                 iounmap(hw->flash_address);
10330 err_sw_init:
10331 //      igb_clear_interrupt_scheme(adapter);
10332 //      igb_reset_sriov_capability(adapter);
10333         iounmap(hw->hw_addr);
10334 err_ioremap:
10335         free_netdev(netdev);
10336 err_alloc_etherdev:
10337 //      pci_release_selected_regions(pdev,
10338 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10339 //err_pci_reg:
10340 //err_dma:
10341         pci_disable_device(pdev);
10342         return err;
10343 }
10344
10345
10346 void igb_kni_remove(struct pci_dev *pdev)
10347 {
10348         pci_disable_device(pdev);
10349 }