1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "LICENSE.GPL".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/netdevice.h>
31 #include <linux/vmalloc.h>
34 #include <linux/ethtool.h>
35 #ifdef CONFIG_PM_RUNTIME
36 #include <linux/pm_runtime.h>
37 #endif /* CONFIG_PM_RUNTIME */
38 #include <linux/highmem.h>
41 #include "igb_regtest.h"
42 #include <linux/if_vlan.h>
44 #include <linux/mdio.h>
47 #ifdef ETHTOOL_OPS_COMPAT
48 #include "kcompat_ethtool.c"
52 char stat_string[ETH_GSTRING_LEN];
57 #define IGB_STAT(_name, _stat) { \
58 .stat_string = _name, \
59 .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
60 .stat_offset = offsetof(struct igb_adapter, _stat) \
62 static const struct igb_stats igb_gstrings_stats[] = {
63 IGB_STAT("rx_packets", stats.gprc),
64 IGB_STAT("tx_packets", stats.gptc),
65 IGB_STAT("rx_bytes", stats.gorc),
66 IGB_STAT("tx_bytes", stats.gotc),
67 IGB_STAT("rx_broadcast", stats.bprc),
68 IGB_STAT("tx_broadcast", stats.bptc),
69 IGB_STAT("rx_multicast", stats.mprc),
70 IGB_STAT("tx_multicast", stats.mptc),
71 IGB_STAT("multicast", stats.mprc),
72 IGB_STAT("collisions", stats.colc),
73 IGB_STAT("rx_crc_errors", stats.crcerrs),
74 IGB_STAT("rx_no_buffer_count", stats.rnbc),
75 IGB_STAT("rx_missed_errors", stats.mpc),
76 IGB_STAT("tx_aborted_errors", stats.ecol),
77 IGB_STAT("tx_carrier_errors", stats.tncrs),
78 IGB_STAT("tx_window_errors", stats.latecol),
79 IGB_STAT("tx_abort_late_coll", stats.latecol),
80 IGB_STAT("tx_deferred_ok", stats.dc),
81 IGB_STAT("tx_single_coll_ok", stats.scc),
82 IGB_STAT("tx_multi_coll_ok", stats.mcc),
83 IGB_STAT("tx_timeout_count", tx_timeout_count),
84 IGB_STAT("rx_long_length_errors", stats.roc),
85 IGB_STAT("rx_short_length_errors", stats.ruc),
86 IGB_STAT("rx_align_errors", stats.algnerrc),
87 IGB_STAT("tx_tcp_seg_good", stats.tsctc),
88 IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
89 IGB_STAT("rx_flow_control_xon", stats.xonrxc),
90 IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
91 IGB_STAT("tx_flow_control_xon", stats.xontxc),
92 IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
93 IGB_STAT("rx_long_byte_count", stats.gorc),
94 IGB_STAT("tx_dma_out_of_sync", stats.doosync),
96 IGB_STAT("lro_aggregated", lro_stats.coal),
97 IGB_STAT("lro_flushed", lro_stats.flushed),
99 IGB_STAT("tx_smbus", stats.mgptc),
100 IGB_STAT("rx_smbus", stats.mgprc),
101 IGB_STAT("dropped_smbus", stats.mgpdc),
102 IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
103 IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
104 IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
105 IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
106 #ifdef HAVE_PTP_1588_CLOCK
107 IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
108 IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
109 #endif /* HAVE_PTP_1588_CLOCK */
112 #define IGB_NETDEV_STAT(_net_stat) { \
113 .stat_string = #_net_stat, \
114 .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
115 .stat_offset = offsetof(struct net_device_stats, _net_stat) \
117 static const struct igb_stats igb_gstrings_net_stats[] = {
118 IGB_NETDEV_STAT(rx_errors),
119 IGB_NETDEV_STAT(tx_errors),
120 IGB_NETDEV_STAT(tx_dropped),
121 IGB_NETDEV_STAT(rx_length_errors),
122 IGB_NETDEV_STAT(rx_over_errors),
123 IGB_NETDEV_STAT(rx_frame_errors),
124 IGB_NETDEV_STAT(rx_fifo_errors),
125 IGB_NETDEV_STAT(tx_fifo_errors),
126 IGB_NETDEV_STAT(tx_heartbeat_errors)
129 #define IGB_GLOBAL_STATS_LEN ARRAY_SIZE(igb_gstrings_stats)
130 #define IGB_NETDEV_STATS_LEN ARRAY_SIZE(igb_gstrings_net_stats)
131 #define IGB_RX_QUEUE_STATS_LEN \
132 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
133 #define IGB_TX_QUEUE_STATS_LEN \
134 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))
135 #define IGB_QUEUE_STATS_LEN \
136 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
137 IGB_RX_QUEUE_STATS_LEN) + \
138 (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
139 IGB_TX_QUEUE_STATS_LEN))
140 #define IGB_STATS_LEN \
141 (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
143 #endif /* ETHTOOL_GSTATS */
145 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
146 "Register test (offline)", "Eeprom test (offline)",
147 "Interrupt test (offline)", "Loopback test (offline)",
148 "Link test (on/offline)"
150 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
151 #endif /* ETHTOOL_TEST */
153 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
155 struct igb_adapter *adapter = netdev_priv(netdev);
156 struct e1000_hw *hw = &adapter->hw;
159 if (hw->phy.media_type == e1000_media_type_copper) {
161 ecmd->supported = (SUPPORTED_10baseT_Half |
162 SUPPORTED_10baseT_Full |
163 SUPPORTED_100baseT_Half |
164 SUPPORTED_100baseT_Full |
165 SUPPORTED_1000baseT_Full|
169 ecmd->advertising = ADVERTISED_TP;
171 if (hw->mac.autoneg == 1) {
172 ecmd->advertising |= ADVERTISED_Autoneg;
173 /* the e1000 autoneg seems to match ethtool nicely */
174 ecmd->advertising |= hw->phy.autoneg_advertised;
177 ecmd->port = PORT_TP;
178 ecmd->phy_address = hw->phy.addr;
179 ecmd->transceiver = XCVR_INTERNAL;
182 ecmd->supported = (SUPPORTED_1000baseT_Full |
183 SUPPORTED_100baseT_Full |
187 if (hw->mac.type == e1000_i354)
188 ecmd->supported |= (SUPPORTED_2500baseX_Full);
190 ecmd->advertising = ADVERTISED_FIBRE;
192 switch (adapter->link_speed) {
194 ecmd->advertising = ADVERTISED_2500baseX_Full;
197 ecmd->advertising = ADVERTISED_1000baseT_Full;
200 ecmd->advertising = ADVERTISED_100baseT_Full;
206 if (hw->mac.autoneg == 1)
207 ecmd->advertising |= ADVERTISED_Autoneg;
209 ecmd->port = PORT_FIBRE;
210 ecmd->transceiver = XCVR_EXTERNAL;
213 if (hw->mac.autoneg != 1)
214 ecmd->advertising &= ~(ADVERTISED_Pause |
215 ADVERTISED_Asym_Pause);
217 if (hw->fc.requested_mode == e1000_fc_full)
218 ecmd->advertising |= ADVERTISED_Pause;
219 else if (hw->fc.requested_mode == e1000_fc_rx_pause)
220 ecmd->advertising |= (ADVERTISED_Pause |
221 ADVERTISED_Asym_Pause);
222 else if (hw->fc.requested_mode == e1000_fc_tx_pause)
223 ecmd->advertising |= ADVERTISED_Asym_Pause;
225 ecmd->advertising &= ~(ADVERTISED_Pause |
226 ADVERTISED_Asym_Pause);
228 status = E1000_READ_REG(hw, E1000_STATUS);
230 if (status & E1000_STATUS_LU) {
231 if ((hw->mac.type == e1000_i354) &&
232 (status & E1000_STATUS_2P5_SKU) &&
233 !(status & E1000_STATUS_2P5_SKU_OVER))
234 ecmd->speed = SPEED_2500;
235 else if (status & E1000_STATUS_SPEED_1000)
236 ecmd->speed = SPEED_1000;
237 else if (status & E1000_STATUS_SPEED_100)
238 ecmd->speed = SPEED_100;
240 ecmd->speed = SPEED_10;
242 if ((status & E1000_STATUS_FD) ||
243 hw->phy.media_type != e1000_media_type_copper)
244 ecmd->duplex = DUPLEX_FULL;
246 ecmd->duplex = DUPLEX_HALF;
253 if ((hw->phy.media_type == e1000_media_type_fiber) ||
255 ecmd->autoneg = AUTONEG_ENABLE;
257 ecmd->autoneg = AUTONEG_DISABLE;
260 /* MDI-X => 2; MDI =>1; Invalid =>0 */
261 if (hw->phy.media_type == e1000_media_type_copper)
262 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
265 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
267 #ifdef ETH_TP_MDI_AUTO
268 if (hw->phy.mdix == AUTO_ALL_MODES)
269 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
271 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
274 #endif /* ETH_TP_MDI_X */
278 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
280 struct igb_adapter *adapter = netdev_priv(netdev);
281 struct e1000_hw *hw = &adapter->hw;
283 if (ecmd->duplex == DUPLEX_HALF) {
284 if (!hw->dev_spec._82575.eee_disable)
285 dev_info(pci_dev_to_dev(adapter->pdev), "EEE disabled: not supported with half duplex\n");
286 hw->dev_spec._82575.eee_disable = true;
288 if (hw->dev_spec._82575.eee_disable)
289 dev_info(pci_dev_to_dev(adapter->pdev), "EEE enabled\n");
290 hw->dev_spec._82575.eee_disable = false;
293 /* When SoL/IDER sessions are active, autoneg/speed/duplex
294 * cannot be changed */
295 if (e1000_check_reset_block(hw)) {
296 dev_err(pci_dev_to_dev(adapter->pdev), "Cannot change link "
297 "characteristics when SoL/IDER is active.\n");
301 #ifdef ETH_TP_MDI_AUTO
303 * MDI setting is only allowed when autoneg enabled because
304 * some hardware doesn't allow MDI setting when speed or
307 if (ecmd->eth_tp_mdix_ctrl) {
308 if (hw->phy.media_type != e1000_media_type_copper)
311 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
312 (ecmd->autoneg != AUTONEG_ENABLE)) {
313 dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
318 #endif /* ETH_TP_MDI_AUTO */
319 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
320 usleep_range(1000, 2000);
322 if (ecmd->autoneg == AUTONEG_ENABLE) {
324 if (hw->phy.media_type == e1000_media_type_fiber) {
325 hw->phy.autoneg_advertised = ecmd->advertising |
328 switch (adapter->link_speed) {
330 hw->phy.autoneg_advertised =
331 ADVERTISED_2500baseX_Full;
334 hw->phy.autoneg_advertised =
335 ADVERTISED_1000baseT_Full;
338 hw->phy.autoneg_advertised =
339 ADVERTISED_100baseT_Full;
345 hw->phy.autoneg_advertised = ecmd->advertising |
349 ecmd->advertising = hw->phy.autoneg_advertised;
350 if (adapter->fc_autoneg)
351 hw->fc.requested_mode = e1000_fc_default;
353 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
354 clear_bit(__IGB_RESETTING, &adapter->state);
359 #ifdef ETH_TP_MDI_AUTO
360 /* MDI-X => 2; MDI => 1; Auto => 3 */
361 if (ecmd->eth_tp_mdix_ctrl) {
362 /* fix up the value for auto (3 => 0) as zero is mapped
365 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
366 hw->phy.mdix = AUTO_ALL_MODES;
368 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
371 #endif /* ETH_TP_MDI_AUTO */
373 if (netif_running(adapter->netdev)) {
379 clear_bit(__IGB_RESETTING, &adapter->state);
383 static u32 igb_get_link(struct net_device *netdev)
385 struct igb_adapter *adapter = netdev_priv(netdev);
386 struct e1000_mac_info *mac = &adapter->hw.mac;
389 * If the link is not reported up to netdev, interrupts are disabled,
390 * and so the physical link state may have changed since we last
391 * looked. Set get_link_status to make sure that the true link
392 * state is interrogated, rather than pulling a cached and possibly
393 * stale link state from the driver.
395 if (!netif_carrier_ok(netdev))
396 mac->get_link_status = 1;
398 return igb_has_link(adapter);
401 static void igb_get_pauseparam(struct net_device *netdev,
402 struct ethtool_pauseparam *pause)
404 struct igb_adapter *adapter = netdev_priv(netdev);
405 struct e1000_hw *hw = &adapter->hw;
408 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
410 if (hw->fc.current_mode == e1000_fc_rx_pause)
412 else if (hw->fc.current_mode == e1000_fc_tx_pause)
414 else if (hw->fc.current_mode == e1000_fc_full) {
420 static int igb_set_pauseparam(struct net_device *netdev,
421 struct ethtool_pauseparam *pause)
423 struct igb_adapter *adapter = netdev_priv(netdev);
424 struct e1000_hw *hw = &adapter->hw;
427 adapter->fc_autoneg = pause->autoneg;
429 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
430 usleep_range(1000, 2000);
432 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
433 hw->fc.requested_mode = e1000_fc_default;
434 if (netif_running(adapter->netdev)) {
441 if (pause->rx_pause && pause->tx_pause)
442 hw->fc.requested_mode = e1000_fc_full;
443 else if (pause->rx_pause && !pause->tx_pause)
444 hw->fc.requested_mode = e1000_fc_rx_pause;
445 else if (!pause->rx_pause && pause->tx_pause)
446 hw->fc.requested_mode = e1000_fc_tx_pause;
447 else if (!pause->rx_pause && !pause->tx_pause)
448 hw->fc.requested_mode = e1000_fc_none;
450 hw->fc.current_mode = hw->fc.requested_mode;
452 if (hw->phy.media_type == e1000_media_type_fiber) {
453 retval = hw->mac.ops.setup_link(hw);
454 /* implicit goto out */
456 retval = e1000_force_mac_fc(hw);
459 e1000_set_fc_watermarks_generic(hw);
464 clear_bit(__IGB_RESETTING, &adapter->state);
468 static u32 igb_get_msglevel(struct net_device *netdev)
470 struct igb_adapter *adapter = netdev_priv(netdev);
471 return adapter->msg_enable;
474 static void igb_set_msglevel(struct net_device *netdev, u32 data)
476 struct igb_adapter *adapter = netdev_priv(netdev);
477 adapter->msg_enable = data;
480 static int igb_get_regs_len(struct net_device *netdev)
482 #define IGB_REGS_LEN 555
483 return IGB_REGS_LEN * sizeof(u32);
486 static void igb_get_regs(struct net_device *netdev,
487 struct ethtool_regs *regs, void *p)
489 struct igb_adapter *adapter = netdev_priv(netdev);
490 struct e1000_hw *hw = &adapter->hw;
494 memset(p, 0, IGB_REGS_LEN * sizeof(u32));
496 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
498 /* General Registers */
499 regs_buff[0] = E1000_READ_REG(hw, E1000_CTRL);
500 regs_buff[1] = E1000_READ_REG(hw, E1000_STATUS);
501 regs_buff[2] = E1000_READ_REG(hw, E1000_CTRL_EXT);
502 regs_buff[3] = E1000_READ_REG(hw, E1000_MDIC);
503 regs_buff[4] = E1000_READ_REG(hw, E1000_SCTL);
504 regs_buff[5] = E1000_READ_REG(hw, E1000_CONNSW);
505 regs_buff[6] = E1000_READ_REG(hw, E1000_VET);
506 regs_buff[7] = E1000_READ_REG(hw, E1000_LEDCTL);
507 regs_buff[8] = E1000_READ_REG(hw, E1000_PBA);
508 regs_buff[9] = E1000_READ_REG(hw, E1000_PBS);
509 regs_buff[10] = E1000_READ_REG(hw, E1000_FRTIMER);
510 regs_buff[11] = E1000_READ_REG(hw, E1000_TCPTIMER);
513 regs_buff[12] = E1000_READ_REG(hw, E1000_EECD);
516 /* Reading EICS for EICR because they read the
517 * same but EICS does not clear on read */
518 regs_buff[13] = E1000_READ_REG(hw, E1000_EICS);
519 regs_buff[14] = E1000_READ_REG(hw, E1000_EICS);
520 regs_buff[15] = E1000_READ_REG(hw, E1000_EIMS);
521 regs_buff[16] = E1000_READ_REG(hw, E1000_EIMC);
522 regs_buff[17] = E1000_READ_REG(hw, E1000_EIAC);
523 regs_buff[18] = E1000_READ_REG(hw, E1000_EIAM);
524 /* Reading ICS for ICR because they read the
525 * same but ICS does not clear on read */
526 regs_buff[19] = E1000_READ_REG(hw, E1000_ICS);
527 regs_buff[20] = E1000_READ_REG(hw, E1000_ICS);
528 regs_buff[21] = E1000_READ_REG(hw, E1000_IMS);
529 regs_buff[22] = E1000_READ_REG(hw, E1000_IMC);
530 regs_buff[23] = E1000_READ_REG(hw, E1000_IAC);
531 regs_buff[24] = E1000_READ_REG(hw, E1000_IAM);
532 regs_buff[25] = E1000_READ_REG(hw, E1000_IMIRVP);
535 regs_buff[26] = E1000_READ_REG(hw, E1000_FCAL);
536 regs_buff[27] = E1000_READ_REG(hw, E1000_FCAH);
537 regs_buff[28] = E1000_READ_REG(hw, E1000_FCTTV);
538 regs_buff[29] = E1000_READ_REG(hw, E1000_FCRTL);
539 regs_buff[30] = E1000_READ_REG(hw, E1000_FCRTH);
540 regs_buff[31] = E1000_READ_REG(hw, E1000_FCRTV);
543 regs_buff[32] = E1000_READ_REG(hw, E1000_RCTL);
544 regs_buff[33] = E1000_READ_REG(hw, E1000_RXCSUM);
545 regs_buff[34] = E1000_READ_REG(hw, E1000_RLPML);
546 regs_buff[35] = E1000_READ_REG(hw, E1000_RFCTL);
547 regs_buff[36] = E1000_READ_REG(hw, E1000_MRQC);
548 regs_buff[37] = E1000_READ_REG(hw, E1000_VT_CTL);
551 regs_buff[38] = E1000_READ_REG(hw, E1000_TCTL);
552 regs_buff[39] = E1000_READ_REG(hw, E1000_TCTL_EXT);
553 regs_buff[40] = E1000_READ_REG(hw, E1000_TIPG);
554 regs_buff[41] = E1000_READ_REG(hw, E1000_DTXCTL);
557 regs_buff[42] = E1000_READ_REG(hw, E1000_WUC);
558 regs_buff[43] = E1000_READ_REG(hw, E1000_WUFC);
559 regs_buff[44] = E1000_READ_REG(hw, E1000_WUS);
560 regs_buff[45] = E1000_READ_REG(hw, E1000_IPAV);
561 regs_buff[46] = E1000_READ_REG(hw, E1000_WUPL);
564 regs_buff[47] = E1000_READ_REG(hw, E1000_PCS_CFG0);
565 regs_buff[48] = E1000_READ_REG(hw, E1000_PCS_LCTL);
566 regs_buff[49] = E1000_READ_REG(hw, E1000_PCS_LSTAT);
567 regs_buff[50] = E1000_READ_REG(hw, E1000_PCS_ANADV);
568 regs_buff[51] = E1000_READ_REG(hw, E1000_PCS_LPAB);
569 regs_buff[52] = E1000_READ_REG(hw, E1000_PCS_NPTX);
570 regs_buff[53] = E1000_READ_REG(hw, E1000_PCS_LPABNP);
573 regs_buff[54] = adapter->stats.crcerrs;
574 regs_buff[55] = adapter->stats.algnerrc;
575 regs_buff[56] = adapter->stats.symerrs;
576 regs_buff[57] = adapter->stats.rxerrc;
577 regs_buff[58] = adapter->stats.mpc;
578 regs_buff[59] = adapter->stats.scc;
579 regs_buff[60] = adapter->stats.ecol;
580 regs_buff[61] = adapter->stats.mcc;
581 regs_buff[62] = adapter->stats.latecol;
582 regs_buff[63] = adapter->stats.colc;
583 regs_buff[64] = adapter->stats.dc;
584 regs_buff[65] = adapter->stats.tncrs;
585 regs_buff[66] = adapter->stats.sec;
586 regs_buff[67] = adapter->stats.htdpmc;
587 regs_buff[68] = adapter->stats.rlec;
588 regs_buff[69] = adapter->stats.xonrxc;
589 regs_buff[70] = adapter->stats.xontxc;
590 regs_buff[71] = adapter->stats.xoffrxc;
591 regs_buff[72] = adapter->stats.xofftxc;
592 regs_buff[73] = adapter->stats.fcruc;
593 regs_buff[74] = adapter->stats.prc64;
594 regs_buff[75] = adapter->stats.prc127;
595 regs_buff[76] = adapter->stats.prc255;
596 regs_buff[77] = adapter->stats.prc511;
597 regs_buff[78] = adapter->stats.prc1023;
598 regs_buff[79] = adapter->stats.prc1522;
599 regs_buff[80] = adapter->stats.gprc;
600 regs_buff[81] = adapter->stats.bprc;
601 regs_buff[82] = adapter->stats.mprc;
602 regs_buff[83] = adapter->stats.gptc;
603 regs_buff[84] = adapter->stats.gorc;
604 regs_buff[86] = adapter->stats.gotc;
605 regs_buff[88] = adapter->stats.rnbc;
606 regs_buff[89] = adapter->stats.ruc;
607 regs_buff[90] = adapter->stats.rfc;
608 regs_buff[91] = adapter->stats.roc;
609 regs_buff[92] = adapter->stats.rjc;
610 regs_buff[93] = adapter->stats.mgprc;
611 regs_buff[94] = adapter->stats.mgpdc;
612 regs_buff[95] = adapter->stats.mgptc;
613 regs_buff[96] = adapter->stats.tor;
614 regs_buff[98] = adapter->stats.tot;
615 regs_buff[100] = adapter->stats.tpr;
616 regs_buff[101] = adapter->stats.tpt;
617 regs_buff[102] = adapter->stats.ptc64;
618 regs_buff[103] = adapter->stats.ptc127;
619 regs_buff[104] = adapter->stats.ptc255;
620 regs_buff[105] = adapter->stats.ptc511;
621 regs_buff[106] = adapter->stats.ptc1023;
622 regs_buff[107] = adapter->stats.ptc1522;
623 regs_buff[108] = adapter->stats.mptc;
624 regs_buff[109] = adapter->stats.bptc;
625 regs_buff[110] = adapter->stats.tsctc;
626 regs_buff[111] = adapter->stats.iac;
627 regs_buff[112] = adapter->stats.rpthc;
628 regs_buff[113] = adapter->stats.hgptc;
629 regs_buff[114] = adapter->stats.hgorc;
630 regs_buff[116] = adapter->stats.hgotc;
631 regs_buff[118] = adapter->stats.lenerrs;
632 regs_buff[119] = adapter->stats.scvpc;
633 regs_buff[120] = adapter->stats.hrmpc;
635 for (i = 0; i < 4; i++)
636 regs_buff[121 + i] = E1000_READ_REG(hw, E1000_SRRCTL(i));
637 for (i = 0; i < 4; i++)
638 regs_buff[125 + i] = E1000_READ_REG(hw, E1000_PSRTYPE(i));
639 for (i = 0; i < 4; i++)
640 regs_buff[129 + i] = E1000_READ_REG(hw, E1000_RDBAL(i));
641 for (i = 0; i < 4; i++)
642 regs_buff[133 + i] = E1000_READ_REG(hw, E1000_RDBAH(i));
643 for (i = 0; i < 4; i++)
644 regs_buff[137 + i] = E1000_READ_REG(hw, E1000_RDLEN(i));
645 for (i = 0; i < 4; i++)
646 regs_buff[141 + i] = E1000_READ_REG(hw, E1000_RDH(i));
647 for (i = 0; i < 4; i++)
648 regs_buff[145 + i] = E1000_READ_REG(hw, E1000_RDT(i));
649 for (i = 0; i < 4; i++)
650 regs_buff[149 + i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
652 for (i = 0; i < 10; i++)
653 regs_buff[153 + i] = E1000_READ_REG(hw, E1000_EITR(i));
654 for (i = 0; i < 8; i++)
655 regs_buff[163 + i] = E1000_READ_REG(hw, E1000_IMIR(i));
656 for (i = 0; i < 8; i++)
657 regs_buff[171 + i] = E1000_READ_REG(hw, E1000_IMIREXT(i));
658 for (i = 0; i < 16; i++)
659 regs_buff[179 + i] = E1000_READ_REG(hw, E1000_RAL(i));
660 for (i = 0; i < 16; i++)
661 regs_buff[195 + i] = E1000_READ_REG(hw, E1000_RAH(i));
663 for (i = 0; i < 4; i++)
664 regs_buff[211 + i] = E1000_READ_REG(hw, E1000_TDBAL(i));
665 for (i = 0; i < 4; i++)
666 regs_buff[215 + i] = E1000_READ_REG(hw, E1000_TDBAH(i));
667 for (i = 0; i < 4; i++)
668 regs_buff[219 + i] = E1000_READ_REG(hw, E1000_TDLEN(i));
669 for (i = 0; i < 4; i++)
670 regs_buff[223 + i] = E1000_READ_REG(hw, E1000_TDH(i));
671 for (i = 0; i < 4; i++)
672 regs_buff[227 + i] = E1000_READ_REG(hw, E1000_TDT(i));
673 for (i = 0; i < 4; i++)
674 regs_buff[231 + i] = E1000_READ_REG(hw, E1000_TXDCTL(i));
675 for (i = 0; i < 4; i++)
676 regs_buff[235 + i] = E1000_READ_REG(hw, E1000_TDWBAL(i));
677 for (i = 0; i < 4; i++)
678 regs_buff[239 + i] = E1000_READ_REG(hw, E1000_TDWBAH(i));
679 for (i = 0; i < 4; i++)
680 regs_buff[243 + i] = E1000_READ_REG(hw, E1000_DCA_TXCTRL(i));
682 for (i = 0; i < 4; i++)
683 regs_buff[247 + i] = E1000_READ_REG(hw, E1000_IP4AT_REG(i));
684 for (i = 0; i < 4; i++)
685 regs_buff[251 + i] = E1000_READ_REG(hw, E1000_IP6AT_REG(i));
686 for (i = 0; i < 32; i++)
687 regs_buff[255 + i] = E1000_READ_REG(hw, E1000_WUPM_REG(i));
688 for (i = 0; i < 128; i++)
689 regs_buff[287 + i] = E1000_READ_REG(hw, E1000_FFMT_REG(i));
690 for (i = 0; i < 128; i++)
691 regs_buff[415 + i] = E1000_READ_REG(hw, E1000_FFVT_REG(i));
692 for (i = 0; i < 4; i++)
693 regs_buff[543 + i] = E1000_READ_REG(hw, E1000_FFLT_REG(i));
695 regs_buff[547] = E1000_READ_REG(hw, E1000_TDFH);
696 regs_buff[548] = E1000_READ_REG(hw, E1000_TDFT);
697 regs_buff[549] = E1000_READ_REG(hw, E1000_TDFHS);
698 regs_buff[550] = E1000_READ_REG(hw, E1000_TDFPC);
699 if (hw->mac.type > e1000_82580) {
700 regs_buff[551] = adapter->stats.o2bgptc;
701 regs_buff[552] = adapter->stats.b2ospc;
702 regs_buff[553] = adapter->stats.o2bspc;
703 regs_buff[554] = adapter->stats.b2ogprc;
707 static int igb_get_eeprom_len(struct net_device *netdev)
709 struct igb_adapter *adapter = netdev_priv(netdev);
710 return adapter->hw.nvm.word_size * 2;
713 static int igb_get_eeprom(struct net_device *netdev,
714 struct ethtool_eeprom *eeprom, u8 *bytes)
716 struct igb_adapter *adapter = netdev_priv(netdev);
717 struct e1000_hw *hw = &adapter->hw;
719 int first_word, last_word;
723 if (eeprom->len == 0)
726 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
728 first_word = eeprom->offset >> 1;
729 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
731 eeprom_buff = kmalloc(sizeof(u16) *
732 (last_word - first_word + 1), GFP_KERNEL);
736 if (hw->nvm.type == e1000_nvm_eeprom_spi)
737 ret_val = e1000_read_nvm(hw, first_word,
738 last_word - first_word + 1,
741 for (i = 0; i < last_word - first_word + 1; i++) {
742 ret_val = e1000_read_nvm(hw, first_word + i, 1,
749 /* Device's eeprom is always little-endian, word addressable */
750 for (i = 0; i < last_word - first_word + 1; i++)
751 eeprom_buff[i] = le16_to_cpu(eeprom_buff[i]);
753 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
760 static int igb_set_eeprom(struct net_device *netdev,
761 struct ethtool_eeprom *eeprom, u8 *bytes)
763 struct igb_adapter *adapter = netdev_priv(netdev);
764 struct e1000_hw *hw = &adapter->hw;
767 int max_len, first_word, last_word, ret_val = 0;
770 if (eeprom->len == 0)
773 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
776 max_len = hw->nvm.word_size * 2;
778 first_word = eeprom->offset >> 1;
779 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
780 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
784 ptr = (void *)eeprom_buff;
786 if (eeprom->offset & 1) {
787 /* need read/modify/write of first changed EEPROM word */
788 /* only the second byte of the word is being modified */
789 ret_val = e1000_read_nvm(hw, first_word, 1,
793 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
794 /* need read/modify/write of last changed EEPROM word */
795 /* only the first byte of the word is being modified */
796 ret_val = e1000_read_nvm(hw, last_word, 1,
797 &eeprom_buff[last_word - first_word]);
800 /* Device's eeprom is always little-endian, word addressable */
801 for (i = 0; i < last_word - first_word + 1; i++)
802 le16_to_cpus(&eeprom_buff[i]);
804 memcpy(ptr, bytes, eeprom->len);
806 for (i = 0; i < last_word - first_word + 1; i++)
807 cpu_to_le16s(&eeprom_buff[i]);
809 ret_val = e1000_write_nvm(hw, first_word,
810 last_word - first_word + 1, eeprom_buff);
812 /* Update the checksum if write succeeded.
813 * and flush shadow RAM for 82573 controllers */
815 e1000_update_nvm_checksum(hw);
821 static void igb_get_drvinfo(struct net_device *netdev,
822 struct ethtool_drvinfo *drvinfo)
824 struct igb_adapter *adapter = netdev_priv(netdev);
826 strncpy(drvinfo->driver, igb_driver_name, sizeof(drvinfo->driver) - 1);
827 strncpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version) - 1);
829 strlcpy(drvinfo->fw_version, adapter->fw_version,
830 sizeof(drvinfo->fw_version));
831 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
832 sizeof(drvinfo->bus_info));
833 drvinfo->n_stats = IGB_STATS_LEN;
834 drvinfo->testinfo_len = IGB_TEST_LEN;
835 drvinfo->regdump_len = igb_get_regs_len(netdev);
836 drvinfo->eedump_len = igb_get_eeprom_len(netdev);
839 static void igb_get_ringparam(struct net_device *netdev,
840 struct ethtool_ringparam *ring)
842 struct igb_adapter *adapter = netdev_priv(netdev);
844 ring->rx_max_pending = IGB_MAX_RXD;
845 ring->tx_max_pending = IGB_MAX_TXD;
846 ring->rx_mini_max_pending = 0;
847 ring->rx_jumbo_max_pending = 0;
848 ring->rx_pending = adapter->rx_ring_count;
849 ring->tx_pending = adapter->tx_ring_count;
850 ring->rx_mini_pending = 0;
851 ring->rx_jumbo_pending = 0;
854 static int igb_set_ringparam(struct net_device *netdev,
855 struct ethtool_ringparam *ring)
857 struct igb_adapter *adapter = netdev_priv(netdev);
858 struct igb_ring *temp_ring;
860 u16 new_rx_count, new_tx_count;
862 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
865 new_rx_count = min(ring->rx_pending, (u32)IGB_MAX_RXD);
866 new_rx_count = max(new_rx_count, (u16)IGB_MIN_RXD);
867 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
869 new_tx_count = min(ring->tx_pending, (u32)IGB_MAX_TXD);
870 new_tx_count = max(new_tx_count, (u16)IGB_MIN_TXD);
871 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
873 if ((new_tx_count == adapter->tx_ring_count) &&
874 (new_rx_count == adapter->rx_ring_count)) {
879 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
880 usleep_range(1000, 2000);
882 if (!netif_running(adapter->netdev)) {
883 for (i = 0; i < adapter->num_tx_queues; i++)
884 adapter->tx_ring[i]->count = new_tx_count;
885 for (i = 0; i < adapter->num_rx_queues; i++)
886 adapter->rx_ring[i]->count = new_rx_count;
887 adapter->tx_ring_count = new_tx_count;
888 adapter->rx_ring_count = new_rx_count;
892 if (adapter->num_tx_queues > adapter->num_rx_queues)
893 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
895 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
905 * We can't just free everything and then setup again,
906 * because the ISRs in MSI-X mode get passed pointers
907 * to the tx and rx ring structs.
909 if (new_tx_count != adapter->tx_ring_count) {
910 for (i = 0; i < adapter->num_tx_queues; i++) {
911 memcpy(&temp_ring[i], adapter->tx_ring[i],
912 sizeof(struct igb_ring));
914 temp_ring[i].count = new_tx_count;
915 err = igb_setup_tx_resources(&temp_ring[i]);
919 igb_free_tx_resources(&temp_ring[i]);
925 for (i = 0; i < adapter->num_tx_queues; i++) {
926 igb_free_tx_resources(adapter->tx_ring[i]);
928 memcpy(adapter->tx_ring[i], &temp_ring[i],
929 sizeof(struct igb_ring));
932 adapter->tx_ring_count = new_tx_count;
935 if (new_rx_count != adapter->rx_ring_count) {
936 for (i = 0; i < adapter->num_rx_queues; i++) {
937 memcpy(&temp_ring[i], adapter->rx_ring[i],
938 sizeof(struct igb_ring));
940 temp_ring[i].count = new_rx_count;
941 err = igb_setup_rx_resources(&temp_ring[i]);
945 igb_free_rx_resources(&temp_ring[i]);
952 for (i = 0; i < adapter->num_rx_queues; i++) {
953 igb_free_rx_resources(adapter->rx_ring[i]);
955 memcpy(adapter->rx_ring[i], &temp_ring[i],
956 sizeof(struct igb_ring));
959 adapter->rx_ring_count = new_rx_count;
965 clear_bit(__IGB_RESETTING, &adapter->state);
968 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
969 int reg, u32 mask, u32 write)
971 struct e1000_hw *hw = &adapter->hw;
973 static const u32 _test[] =
974 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
975 for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
976 E1000_WRITE_REG(hw, reg, (_test[pat] & write));
977 val = E1000_READ_REG(hw, reg) & mask;
978 if (val != (_test[pat] & write & mask)) {
979 dev_err(pci_dev_to_dev(adapter->pdev), "pattern test reg %04X "
980 "failed: got 0x%08X expected 0x%08X\n",
981 E1000_REGISTER(hw, reg), val, (_test[pat] & write & mask));
982 *data = E1000_REGISTER(hw, reg);
990 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
991 int reg, u32 mask, u32 write)
993 struct e1000_hw *hw = &adapter->hw;
995 E1000_WRITE_REG(hw, reg, write & mask);
996 val = E1000_READ_REG(hw, reg);
997 if ((write & mask) != (val & mask)) {
998 dev_err(pci_dev_to_dev(adapter->pdev), "set/check reg %04X test failed:"
999 " got 0x%08X expected 0x%08X\n", reg,
1000 (val & mask), (write & mask));
1001 *data = E1000_REGISTER(hw, reg);
1008 #define REG_PATTERN_TEST(reg, mask, write) \
1010 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1014 #define REG_SET_AND_CHECK(reg, mask, write) \
1016 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1020 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1022 struct e1000_hw *hw = &adapter->hw;
1023 struct igb_reg_test *test;
1024 u32 value, before, after;
1027 switch (adapter->hw.mac.type) {
1030 test = reg_test_i350;
1031 toggle = 0x7FEFF3FF;
1035 test = reg_test_i210;
1036 toggle = 0x7FEFF3FF;
1039 test = reg_test_82580;
1040 toggle = 0x7FEFF3FF;
1043 test = reg_test_82576;
1044 toggle = 0x7FFFF3FF;
1047 test = reg_test_82575;
1048 toggle = 0x7FFFF3FF;
1052 /* Because the status register is such a special case,
1053 * we handle it separately from the rest of the register
1054 * tests. Some bits are read-only, some toggle, and some
1055 * are writable on newer MACs.
1057 before = E1000_READ_REG(hw, E1000_STATUS);
1058 value = (E1000_READ_REG(hw, E1000_STATUS) & toggle);
1059 E1000_WRITE_REG(hw, E1000_STATUS, toggle);
1060 after = E1000_READ_REG(hw, E1000_STATUS) & toggle;
1061 if (value != after) {
1062 dev_err(pci_dev_to_dev(adapter->pdev), "failed STATUS register test "
1063 "got: 0x%08X expected: 0x%08X\n", after, value);
1067 /* restore previous status */
1068 E1000_WRITE_REG(hw, E1000_STATUS, before);
1070 /* Perform the remainder of the register test, looping through
1071 * the test table until we either fail or reach the null entry.
1074 for (i = 0; i < test->array_len; i++) {
1075 switch (test->test_type) {
1077 REG_PATTERN_TEST(test->reg +
1078 (i * test->reg_offset),
1083 REG_SET_AND_CHECK(test->reg +
1084 (i * test->reg_offset),
1090 (adapter->hw.hw_addr + test->reg)
1091 + (i * test->reg_offset));
1094 REG_PATTERN_TEST(test->reg + (i * 4),
1098 case TABLE64_TEST_LO:
1099 REG_PATTERN_TEST(test->reg + (i * 8),
1103 case TABLE64_TEST_HI:
1104 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1117 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1121 /* Validate NVM checksum */
1122 if (e1000_validate_nvm_checksum(&adapter->hw) < 0)
1128 static irqreturn_t igb_test_intr(int irq, void *data)
1130 struct igb_adapter *adapter = (struct igb_adapter *) data;
1131 struct e1000_hw *hw = &adapter->hw;
1133 adapter->test_icr |= E1000_READ_REG(hw, E1000_ICR);
1138 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1140 struct e1000_hw *hw = &adapter->hw;
1141 struct net_device *netdev = adapter->netdev;
1142 u32 mask, ics_mask, i = 0, shared_int = TRUE;
1143 u32 irq = adapter->pdev->irq;
1147 /* Hook up test interrupt handler just for this test */
1148 if (adapter->msix_entries) {
1149 if (request_irq(adapter->msix_entries[0].vector,
1150 &igb_test_intr, 0, netdev->name, adapter)) {
1154 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1156 if (request_irq(irq,
1157 igb_test_intr, 0, netdev->name, adapter)) {
1161 } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1162 netdev->name, adapter)) {
1164 } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1165 netdev->name, adapter)) {
1169 dev_info(pci_dev_to_dev(adapter->pdev), "testing %s interrupt\n",
1170 (shared_int ? "shared" : "unshared"));
1172 /* Disable all the interrupts */
1173 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1174 E1000_WRITE_FLUSH(hw);
1175 usleep_range(10000, 20000);
1177 /* Define all writable bits for ICS */
1178 switch (hw->mac.type) {
1180 ics_mask = 0x37F47EDD;
1183 ics_mask = 0x77D4FBFD;
1186 ics_mask = 0x77DCFED5;
1190 ics_mask = 0x77DCFED5;
1194 ics_mask = 0x774CFED5;
1197 ics_mask = 0x7FFFFFFF;
1201 /* Test each interrupt */
1202 for (; i < 31; i++) {
1203 /* Interrupt to test */
1206 if (!(mask & ics_mask))
1210 /* Disable the interrupt to be reported in
1211 * the cause register and then force the same
1212 * interrupt and see if one gets posted. If
1213 * an interrupt was posted to the bus, the
1216 adapter->test_icr = 0;
1218 /* Flush any pending interrupts */
1219 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1221 E1000_WRITE_REG(hw, E1000_IMC, mask);
1222 E1000_WRITE_REG(hw, E1000_ICS, mask);
1223 E1000_WRITE_FLUSH(hw);
1224 usleep_range(10000, 20000);
1226 if (adapter->test_icr & mask) {
1232 /* Enable the interrupt to be reported in
1233 * the cause register and then force the same
1234 * interrupt and see if one gets posted. If
1235 * an interrupt was not posted to the bus, the
1238 adapter->test_icr = 0;
1240 /* Flush any pending interrupts */
1241 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1243 E1000_WRITE_REG(hw, E1000_IMS, mask);
1244 E1000_WRITE_REG(hw, E1000_ICS, mask);
1245 E1000_WRITE_FLUSH(hw);
1246 usleep_range(10000, 20000);
1248 if (!(adapter->test_icr & mask)) {
1254 /* Disable the other interrupts to be reported in
1255 * the cause register and then force the other
1256 * interrupts and see if any get posted. If
1257 * an interrupt was posted to the bus, the
1260 adapter->test_icr = 0;
1262 /* Flush any pending interrupts */
1263 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1265 E1000_WRITE_REG(hw, E1000_IMC, ~mask);
1266 E1000_WRITE_REG(hw, E1000_ICS, ~mask);
1267 E1000_WRITE_FLUSH(hw);
1268 usleep_range(10000, 20000);
1270 if (adapter->test_icr & mask) {
1277 /* Disable all the interrupts */
1278 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1279 E1000_WRITE_FLUSH(hw);
1280 usleep_range(10000, 20000);
1282 /* Unhook test interrupt handler */
1283 if (adapter->msix_entries)
1284 free_irq(adapter->msix_entries[0].vector, adapter);
1286 free_irq(irq, adapter);
1291 static void igb_free_desc_rings(struct igb_adapter *adapter)
1293 igb_free_tx_resources(&adapter->test_tx_ring);
1294 igb_free_rx_resources(&adapter->test_rx_ring);
1297 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1299 struct igb_ring *tx_ring = &adapter->test_tx_ring;
1300 struct igb_ring *rx_ring = &adapter->test_rx_ring;
1301 struct e1000_hw *hw = &adapter->hw;
1304 /* Setup Tx descriptor ring and Tx buffers */
1305 tx_ring->count = IGB_DEFAULT_TXD;
1306 tx_ring->dev = pci_dev_to_dev(adapter->pdev);
1307 tx_ring->netdev = adapter->netdev;
1308 tx_ring->reg_idx = adapter->vfs_allocated_count;
1310 if (igb_setup_tx_resources(tx_ring)) {
1315 igb_setup_tctl(adapter);
1316 igb_configure_tx_ring(adapter, tx_ring);
1318 /* Setup Rx descriptor ring and Rx buffers */
1319 rx_ring->count = IGB_DEFAULT_RXD;
1320 rx_ring->dev = pci_dev_to_dev(adapter->pdev);
1321 rx_ring->netdev = adapter->netdev;
1322 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1323 rx_ring->rx_buffer_len = IGB_RX_HDR_LEN;
1325 rx_ring->reg_idx = adapter->vfs_allocated_count;
1327 if (igb_setup_rx_resources(rx_ring)) {
1332 /* set the default queue to queue 0 of PF */
1333 E1000_WRITE_REG(hw, E1000_MRQC, adapter->vfs_allocated_count << 3);
1335 /* enable receive ring */
1336 igb_setup_rctl(adapter);
1337 igb_configure_rx_ring(adapter, rx_ring);
1339 igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1344 igb_free_desc_rings(adapter);
1348 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1350 struct e1000_hw *hw = &adapter->hw;
1352 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1353 e1000_write_phy_reg(hw, 29, 0x001F);
1354 e1000_write_phy_reg(hw, 30, 0x8FFC);
1355 e1000_write_phy_reg(hw, 29, 0x001A);
1356 e1000_write_phy_reg(hw, 30, 0x8FF0);
1359 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1361 struct e1000_hw *hw = &adapter->hw;
1364 hw->mac.autoneg = FALSE;
1366 if (hw->phy.type == e1000_phy_m88) {
1367 if (hw->phy.id != I210_I_PHY_ID) {
1368 /* Auto-MDI/MDIX Off */
1369 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1370 /* reset to update Auto-MDI/MDIX */
1371 e1000_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1373 e1000_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1375 /* force 1000, set loopback */
1376 e1000_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1377 e1000_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1380 /* enable MII loopback */
1381 if (hw->phy.type == e1000_phy_82580)
1382 e1000_write_phy_reg(hw, I82577_PHY_LBK_CTRL, 0x8041);
1385 /* force 1000, set loopback */
1386 e1000_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1388 /* Now set up the MAC to the same speed/duplex as the PHY. */
1389 ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);
1390 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1391 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1392 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1393 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1394 E1000_CTRL_FD | /* Force Duplex to FULL */
1395 E1000_CTRL_SLU); /* Set link up enable bit */
1397 if (hw->phy.type == e1000_phy_m88)
1398 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1400 E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);
1402 /* Disable the receiver on the PHY so when a cable is plugged in, the
1403 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1405 if (hw->phy.type == e1000_phy_m88)
1406 igb_phy_disable_receiver(adapter);
1412 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1414 return igb_integrated_phy_loopback(adapter);
1417 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1419 struct e1000_hw *hw = &adapter->hw;
1422 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
1424 /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1425 if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1426 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1427 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1428 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1429 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1431 /* Enable DH89xxCC MPHY for near end loopback */
1432 reg = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTL);
1433 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1434 E1000_MPHY_PCS_CLK_REG_OFFSET;
1435 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTL, reg);
1437 reg = E1000_READ_REG(hw, E1000_MPHY_DATA);
1438 reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1439 E1000_WRITE_REG(hw, E1000_MPHY_DATA, reg);
1442 reg = E1000_READ_REG(hw, E1000_RCTL);
1443 reg |= E1000_RCTL_LBM_TCVR;
1444 E1000_WRITE_REG(hw, E1000_RCTL, reg);
1446 E1000_WRITE_REG(hw, E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1448 reg = E1000_READ_REG(hw, E1000_CTRL);
1449 reg &= ~(E1000_CTRL_RFCE |
1452 reg |= E1000_CTRL_SLU |
1454 E1000_WRITE_REG(hw, E1000_CTRL, reg);
1456 /* Unset switch control to serdes energy detect */
1457 reg = E1000_READ_REG(hw, E1000_CONNSW);
1458 reg &= ~E1000_CONNSW_ENRGSRC;
1459 E1000_WRITE_REG(hw, E1000_CONNSW, reg);
1461 /* Unset sigdetect for SERDES loopback on
1462 * 82580 and newer devices
1464 if (hw->mac.type >= e1000_82580) {
1465 reg = E1000_READ_REG(hw, E1000_PCS_CFG0);
1466 reg |= E1000_PCS_CFG_IGN_SD;
1467 E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg);
1470 /* Set PCS register for forced speed */
1471 reg = E1000_READ_REG(hw, E1000_PCS_LCTL);
1472 reg &= ~E1000_PCS_LCTL_AN_ENABLE; /* Disable Autoneg*/
1473 reg |= E1000_PCS_LCTL_FLV_LINK_UP | /* Force link up */
1474 E1000_PCS_LCTL_FSV_1000 | /* Force 1000 */
1475 E1000_PCS_LCTL_FDV_FULL | /* SerDes Full duplex */
1476 E1000_PCS_LCTL_FSD | /* Force Speed */
1477 E1000_PCS_LCTL_FORCE_LINK; /* Force Link */
1478 E1000_WRITE_REG(hw, E1000_PCS_LCTL, reg);
1483 return igb_set_phy_loopback(adapter);
1486 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1488 struct e1000_hw *hw = &adapter->hw;
1492 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1493 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1494 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1495 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1498 /* Disable near end loopback on DH89xxCC */
1499 reg = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTL);
1500 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK ) |
1501 E1000_MPHY_PCS_CLK_REG_OFFSET;
1502 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTL, reg);
1504 reg = E1000_READ_REG(hw, E1000_MPHY_DATA);
1505 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1506 E1000_WRITE_REG(hw, E1000_MPHY_DATA, reg);
1509 rctl = E1000_READ_REG(hw, E1000_RCTL);
1510 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1511 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
1513 hw->mac.autoneg = TRUE;
1514 e1000_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1515 if (phy_reg & MII_CR_LOOPBACK) {
1516 phy_reg &= ~MII_CR_LOOPBACK;
1517 if (hw->phy.type == I210_I_PHY_ID)
1518 e1000_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1519 e1000_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1520 e1000_phy_commit(hw);
1523 static void igb_create_lbtest_frame(struct sk_buff *skb,
1524 unsigned int frame_size)
1526 memset(skb->data, 0xFF, frame_size);
1528 memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1529 memset(&skb->data[frame_size + 10], 0xBE, 1);
1530 memset(&skb->data[frame_size + 12], 0xAF, 1);
1533 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1534 unsigned int frame_size)
1536 unsigned char *data;
1541 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1542 data = rx_buffer->skb->data;
1544 data = kmap(rx_buffer->page);
1547 if (data[3] != 0xFF ||
1548 data[frame_size + 10] != 0xBE ||
1549 data[frame_size + 12] != 0xAF)
1552 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
1553 kunmap(rx_buffer->page);
1559 static u16 igb_clean_test_rings(struct igb_ring *rx_ring,
1560 struct igb_ring *tx_ring,
1563 union e1000_adv_rx_desc *rx_desc;
1564 struct igb_rx_buffer *rx_buffer_info;
1565 struct igb_tx_buffer *tx_buffer_info;
1566 u16 rx_ntc, tx_ntc, count = 0;
1568 /* initialize next to clean and descriptor values */
1569 rx_ntc = rx_ring->next_to_clean;
1570 tx_ntc = tx_ring->next_to_clean;
1571 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1573 while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1574 /* check rx buffer */
1575 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1577 /* sync Rx buffer for CPU read */
1578 dma_sync_single_for_cpu(rx_ring->dev,
1579 rx_buffer_info->dma,
1580 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1587 /* verify contents of skb */
1588 if (igb_check_lbtest_frame(rx_buffer_info, size))
1591 /* sync Rx buffer for device write */
1592 dma_sync_single_for_device(rx_ring->dev,
1593 rx_buffer_info->dma,
1594 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1601 /* unmap buffer on tx side */
1602 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1603 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1605 /* increment rx/tx next to clean counters */
1607 if (rx_ntc == rx_ring->count)
1610 if (tx_ntc == tx_ring->count)
1613 /* fetch next descriptor */
1614 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1617 /* re-map buffers to ring, store next to clean values */
1618 igb_alloc_rx_buffers(rx_ring, count);
1619 rx_ring->next_to_clean = rx_ntc;
1620 tx_ring->next_to_clean = tx_ntc;
1625 static int igb_run_loopback_test(struct igb_adapter *adapter)
1627 struct igb_ring *tx_ring = &adapter->test_tx_ring;
1628 struct igb_ring *rx_ring = &adapter->test_rx_ring;
1629 u16 i, j, lc, good_cnt;
1631 unsigned int size = IGB_RX_HDR_LEN;
1632 netdev_tx_t tx_ret_val;
1633 struct sk_buff *skb;
1635 /* allocate test skb */
1636 skb = alloc_skb(size, GFP_KERNEL);
1640 /* place data into test skb */
1641 igb_create_lbtest_frame(skb, size);
1645 * Calculate the loop count based on the largest descriptor ring
1646 * The idea is to wrap the largest ring a number of times using 64
1647 * send/receive pairs during each loop
1650 if (rx_ring->count <= tx_ring->count)
1651 lc = ((tx_ring->count / 64) * 2) + 1;
1653 lc = ((rx_ring->count / 64) * 2) + 1;
1655 for (j = 0; j <= lc; j++) { /* loop count loop */
1656 /* reset count of good packets */
1659 /* place 64 packets on the transmit queue*/
1660 for (i = 0; i < 64; i++) {
1662 tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1663 if (tx_ret_val == NETDEV_TX_OK)
1667 if (good_cnt != 64) {
1672 /* allow 200 milliseconds for packets to go from tx to rx */
1675 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1676 if (good_cnt != 64) {
1680 } /* end loop count loop */
1682 /* free the original skb */
1688 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1690 /* PHY loopback cannot be performed if SoL/IDER
1691 * sessions are active */
1692 if (e1000_check_reset_block(&adapter->hw)) {
1693 dev_err(pci_dev_to_dev(adapter->pdev),
1694 "Cannot do PHY loopback test "
1695 "when SoL/IDER is active.\n");
1699 if (adapter->hw.mac.type == e1000_i354) {
1700 dev_info(&adapter->pdev->dev,
1701 "Loopback test not supported on i354.\n");
1705 *data = igb_setup_desc_rings(adapter);
1708 *data = igb_setup_loopback_test(adapter);
1711 *data = igb_run_loopback_test(adapter);
1713 igb_loopback_cleanup(adapter);
1716 igb_free_desc_rings(adapter);
1721 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1728 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1730 adapter->hw.mac.serdes_has_link = FALSE;
1732 /* On some blade server designs, link establishment
1733 * could take as long as 2-3 minutes */
1735 e1000_check_for_link(&adapter->hw);
1736 if (adapter->hw.mac.serdes_has_link)
1739 } while (i++ < 3750);
1743 for (i=0; i < IGB_MAX_LINK_TRIES; i++) {
1744 link = igb_has_link(adapter);
1759 static void igb_diag_test(struct net_device *netdev,
1760 struct ethtool_test *eth_test, u64 *data)
1762 struct igb_adapter *adapter = netdev_priv(netdev);
1763 u16 autoneg_advertised;
1764 u8 forced_speed_duplex, autoneg;
1765 bool if_running = netif_running(netdev);
1767 set_bit(__IGB_TESTING, &adapter->state);
1768 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1771 /* save speed, duplex, autoneg settings */
1772 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1773 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1774 autoneg = adapter->hw.mac.autoneg;
1776 dev_info(pci_dev_to_dev(adapter->pdev), "offline testing starting\n");
1778 /* power up link for link test */
1779 igb_power_up_link(adapter);
1781 /* Link test performed before hardware reset so autoneg doesn't
1782 * interfere with test result */
1783 if (igb_link_test(adapter, &data[4]))
1784 eth_test->flags |= ETH_TEST_FL_FAILED;
1787 /* indicate we're in test mode */
1792 if (igb_reg_test(adapter, &data[0]))
1793 eth_test->flags |= ETH_TEST_FL_FAILED;
1796 if (igb_eeprom_test(adapter, &data[1]))
1797 eth_test->flags |= ETH_TEST_FL_FAILED;
1800 if (igb_intr_test(adapter, &data[2]))
1801 eth_test->flags |= ETH_TEST_FL_FAILED;
1805 /* power up link for loopback test */
1806 igb_power_up_link(adapter);
1808 if (igb_loopback_test(adapter, &data[3]))
1809 eth_test->flags |= ETH_TEST_FL_FAILED;
1811 /* restore speed, duplex, autoneg settings */
1812 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1813 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1814 adapter->hw.mac.autoneg = autoneg;
1816 /* force this routine to wait until autoneg complete/timeout */
1817 adapter->hw.phy.autoneg_wait_to_complete = TRUE;
1819 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
1821 clear_bit(__IGB_TESTING, &adapter->state);
1825 dev_info(pci_dev_to_dev(adapter->pdev), "online testing starting\n");
1827 /* PHY is powered down when interface is down */
1828 if (if_running && igb_link_test(adapter, &data[4]))
1829 eth_test->flags |= ETH_TEST_FL_FAILED;
1833 /* Online tests aren't run; pass by default */
1839 clear_bit(__IGB_TESTING, &adapter->state);
1841 msleep_interruptible(4 * 1000);
1844 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1846 struct igb_adapter *adapter = netdev_priv(netdev);
1848 wol->supported = WAKE_UCAST | WAKE_MCAST |
1849 WAKE_BCAST | WAKE_MAGIC |
1853 if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
1856 /* apply any specific unsupported masks here */
1857 switch (adapter->hw.device_id) {
1862 if (adapter->wol & E1000_WUFC_EX)
1863 wol->wolopts |= WAKE_UCAST;
1864 if (adapter->wol & E1000_WUFC_MC)
1865 wol->wolopts |= WAKE_MCAST;
1866 if (adapter->wol & E1000_WUFC_BC)
1867 wol->wolopts |= WAKE_BCAST;
1868 if (adapter->wol & E1000_WUFC_MAG)
1869 wol->wolopts |= WAKE_MAGIC;
1870 if (adapter->wol & E1000_WUFC_LNKC)
1871 wol->wolopts |= WAKE_PHY;
1874 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1876 struct igb_adapter *adapter = netdev_priv(netdev);
1878 if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
1881 if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
1882 return wol->wolopts ? -EOPNOTSUPP : 0;
1884 /* these settings will always override what we currently have */
1887 if (wol->wolopts & WAKE_UCAST)
1888 adapter->wol |= E1000_WUFC_EX;
1889 if (wol->wolopts & WAKE_MCAST)
1890 adapter->wol |= E1000_WUFC_MC;
1891 if (wol->wolopts & WAKE_BCAST)
1892 adapter->wol |= E1000_WUFC_BC;
1893 if (wol->wolopts & WAKE_MAGIC)
1894 adapter->wol |= E1000_WUFC_MAG;
1895 if (wol->wolopts & WAKE_PHY)
1896 adapter->wol |= E1000_WUFC_LNKC;
1897 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1902 /* bit defines for adapter->led_status */
1903 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
1904 static int igb_set_phys_id(struct net_device *netdev,
1905 enum ethtool_phys_id_state state)
1907 struct igb_adapter *adapter = netdev_priv(netdev);
1908 struct e1000_hw *hw = &adapter->hw;
1911 case ETHTOOL_ID_ACTIVE:
1912 e1000_blink_led(hw);
1917 case ETHTOOL_ID_OFF:
1920 case ETHTOOL_ID_INACTIVE:
1922 e1000_cleanup_led(hw);
1929 static int igb_phys_id(struct net_device *netdev, u32 data)
1931 struct igb_adapter *adapter = netdev_priv(netdev);
1932 struct e1000_hw *hw = &adapter->hw;
1933 unsigned long timeout;
1935 timeout = data * 1000;
1938 * msleep_interruptable only accepts unsigned int so we are limited
1939 * in how long a duration we can wait
1941 if (!timeout || timeout > UINT_MAX)
1944 e1000_blink_led(hw);
1945 msleep_interruptible(timeout);
1948 e1000_cleanup_led(hw);
1952 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
1954 static int igb_set_coalesce(struct net_device *netdev,
1955 struct ethtool_coalesce *ec)
1957 struct igb_adapter *adapter = netdev_priv(netdev);
1960 if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1961 ((ec->rx_coalesce_usecs > 3) &&
1962 (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1963 (ec->rx_coalesce_usecs == 2))
1965 printk("set_coalesce:invalid parameter..");
1969 if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1970 ((ec->tx_coalesce_usecs > 3) &&
1971 (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1972 (ec->tx_coalesce_usecs == 2))
1975 if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
1978 if (ec->tx_max_coalesced_frames_irq)
1979 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
1981 /* If ITR is disabled, disable DMAC */
1982 if (ec->rx_coalesce_usecs == 0) {
1983 adapter->dmac = IGB_DMAC_DISABLE;
1986 /* convert to rate of irq's per second */
1987 if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
1988 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
1990 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
1992 /* convert to rate of irq's per second */
1993 if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
1994 adapter->tx_itr_setting = adapter->rx_itr_setting;
1995 else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
1996 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
1998 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2000 for (i = 0; i < adapter->num_q_vectors; i++) {
2001 struct igb_q_vector *q_vector = adapter->q_vector[i];
2002 q_vector->tx.work_limit = adapter->tx_work_limit;
2003 if (q_vector->rx.ring)
2004 q_vector->itr_val = adapter->rx_itr_setting;
2006 q_vector->itr_val = adapter->tx_itr_setting;
2007 if (q_vector->itr_val && q_vector->itr_val <= 3)
2008 q_vector->itr_val = IGB_START_ITR;
2009 q_vector->set_itr = 1;
2015 static int igb_get_coalesce(struct net_device *netdev,
2016 struct ethtool_coalesce *ec)
2018 struct igb_adapter *adapter = netdev_priv(netdev);
2020 if (adapter->rx_itr_setting <= 3)
2021 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2023 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2025 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2027 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2028 if (adapter->tx_itr_setting <= 3)
2029 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2031 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2037 static int igb_nway_reset(struct net_device *netdev)
2039 struct igb_adapter *adapter = netdev_priv(netdev);
2040 if (netif_running(netdev))
2041 igb_reinit_locked(adapter);
2045 #ifdef HAVE_ETHTOOL_GET_SSET_COUNT
2046 static int igb_get_sset_count(struct net_device *netdev, int sset)
2050 return IGB_STATS_LEN;
2052 return IGB_TEST_LEN;
2058 static int igb_get_stats_count(struct net_device *netdev)
2060 return IGB_STATS_LEN;
2063 static int igb_diag_test_count(struct net_device *netdev)
2065 return IGB_TEST_LEN;
2069 static void igb_get_ethtool_stats(struct net_device *netdev,
2070 struct ethtool_stats *stats, u64 *data)
2072 struct igb_adapter *adapter = netdev_priv(netdev);
2073 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
2074 struct net_device_stats *net_stats = &netdev->stats;
2076 struct net_device_stats *net_stats = &adapter->net_stats;
2082 igb_update_stats(adapter);
2084 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2085 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2086 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2087 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2089 for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2090 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2091 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2092 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2094 for (j = 0; j < adapter->num_tx_queues; j++) {
2095 queue_stat = (u64 *)&adapter->tx_ring[j]->tx_stats;
2096 for (k = 0; k < IGB_TX_QUEUE_STATS_LEN; k++, i++)
2097 data[i] = queue_stat[k];
2099 for (j = 0; j < adapter->num_rx_queues; j++) {
2100 queue_stat = (u64 *)&adapter->rx_ring[j]->rx_stats;
2101 for (k = 0; k < IGB_RX_QUEUE_STATS_LEN; k++, i++)
2102 data[i] = queue_stat[k];
2106 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2108 struct igb_adapter *adapter = netdev_priv(netdev);
2112 switch (stringset) {
2114 memcpy(data, *igb_gstrings_test,
2115 IGB_TEST_LEN*ETH_GSTRING_LEN);
2118 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2119 memcpy(p, igb_gstrings_stats[i].stat_string,
2121 p += ETH_GSTRING_LEN;
2123 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2124 memcpy(p, igb_gstrings_net_stats[i].stat_string,
2126 p += ETH_GSTRING_LEN;
2128 for (i = 0; i < adapter->num_tx_queues; i++) {
2129 sprintf(p, "tx_queue_%u_packets", i);
2130 p += ETH_GSTRING_LEN;
2131 sprintf(p, "tx_queue_%u_bytes", i);
2132 p += ETH_GSTRING_LEN;
2133 sprintf(p, "tx_queue_%u_restart", i);
2134 p += ETH_GSTRING_LEN;
2136 for (i = 0; i < adapter->num_rx_queues; i++) {
2137 sprintf(p, "rx_queue_%u_packets", i);
2138 p += ETH_GSTRING_LEN;
2139 sprintf(p, "rx_queue_%u_bytes", i);
2140 p += ETH_GSTRING_LEN;
2141 sprintf(p, "rx_queue_%u_drops", i);
2142 p += ETH_GSTRING_LEN;
2143 sprintf(p, "rx_queue_%u_csum_err", i);
2144 p += ETH_GSTRING_LEN;
2145 sprintf(p, "rx_queue_%u_alloc_failed", i);
2146 p += ETH_GSTRING_LEN;
2147 sprintf(p, "rx_queue_%u_ipv4_packets", i);
2148 p += ETH_GSTRING_LEN;
2149 sprintf(p, "rx_queue_%u_ipv4e_packets", i);
2150 p += ETH_GSTRING_LEN;
2151 sprintf(p, "rx_queue_%u_ipv6_packets", i);
2152 p += ETH_GSTRING_LEN;
2153 sprintf(p, "rx_queue_%u_ipv6e_packets", i);
2154 p += ETH_GSTRING_LEN;
2155 sprintf(p, "rx_queue_%u_tcp_packets", i);
2156 p += ETH_GSTRING_LEN;
2157 sprintf(p, "rx_queue_%u_udp_packets", i);
2158 p += ETH_GSTRING_LEN;
2159 sprintf(p, "rx_queue_%u_sctp_packets", i);
2160 p += ETH_GSTRING_LEN;
2161 sprintf(p, "rx_queue_%u_nfs_packets", i);
2162 p += ETH_GSTRING_LEN;
2164 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2169 #ifdef HAVE_ETHTOOL_GET_TS_INFO
2170 static int igb_get_ts_info(struct net_device *dev,
2171 struct ethtool_ts_info *info)
2173 struct igb_adapter *adapter = netdev_priv(dev);
2175 switch (adapter->hw.mac.type) {
2176 #ifdef HAVE_PTP_1588_CLOCK
2178 info->so_timestamping =
2179 SOF_TIMESTAMPING_TX_SOFTWARE |
2180 SOF_TIMESTAMPING_RX_SOFTWARE |
2181 SOF_TIMESTAMPING_SOFTWARE;
2189 info->so_timestamping =
2190 SOF_TIMESTAMPING_TX_SOFTWARE |
2191 SOF_TIMESTAMPING_RX_SOFTWARE |
2192 SOF_TIMESTAMPING_SOFTWARE |
2193 SOF_TIMESTAMPING_TX_HARDWARE |
2194 SOF_TIMESTAMPING_RX_HARDWARE |
2195 SOF_TIMESTAMPING_RAW_HARDWARE;
2197 if (adapter->ptp_clock)
2198 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2200 info->phc_index = -1;
2203 (1 << HWTSTAMP_TX_OFF) |
2204 (1 << HWTSTAMP_TX_ON);
2206 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2208 /* 82576 does not support timestamping all packets. */
2209 if (adapter->hw.mac.type >= e1000_82580)
2210 info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2213 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2214 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2215 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2216 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2217 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2218 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2219 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2222 #endif /* HAVE_PTP_1588_CLOCK */
2227 #endif /* HAVE_ETHTOOL_GET_TS_INFO */
2229 #ifdef CONFIG_PM_RUNTIME
2230 static int igb_ethtool_begin(struct net_device *netdev)
2232 struct igb_adapter *adapter = netdev_priv(netdev);
2234 pm_runtime_get_sync(&adapter->pdev->dev);
2239 static void igb_ethtool_complete(struct net_device *netdev)
2241 struct igb_adapter *adapter = netdev_priv(netdev);
2243 pm_runtime_put(&adapter->pdev->dev);
2245 #endif /* CONFIG_PM_RUNTIME */
2247 #ifndef HAVE_NDO_SET_FEATURES
2248 static u32 igb_get_rx_csum(struct net_device *netdev)
2250 return !!(netdev->features & NETIF_F_RXCSUM);
2253 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
2255 const u32 feature_list = NETIF_F_RXCSUM;
2258 netdev->features |= feature_list;
2260 netdev->features &= ~feature_list;
2265 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
2267 struct igb_adapter *adapter = netdev_priv(netdev);
2268 #ifdef NETIF_F_IPV6_CSUM
2269 u32 feature_list = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2271 u32 feature_list = NETIF_F_IP_CSUM;
2274 if (adapter->hw.mac.type >= e1000_82576)
2275 feature_list |= NETIF_F_SCTP_CSUM;
2278 netdev->features |= feature_list;
2280 netdev->features &= ~feature_list;
2286 static int igb_set_tso(struct net_device *netdev, u32 data)
2289 const u32 feature_list = NETIF_F_TSO | NETIF_F_TSO6;
2291 const u32 feature_list = NETIF_F_TSO;
2295 netdev->features |= feature_list;
2297 netdev->features &= ~feature_list;
2299 #ifndef HAVE_NETDEV_VLAN_FEATURES
2301 struct igb_adapter *adapter = netdev_priv(netdev);
2302 struct net_device *v_netdev;
2305 /* disable TSO on all VLANs if they're present */
2306 if (!adapter->vlgrp)
2309 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
2310 v_netdev = vlan_group_get_device(adapter->vlgrp, i);
2314 v_netdev->features &= ~feature_list;
2315 vlan_group_set_device(adapter->vlgrp, i, v_netdev);
2321 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2325 #endif /* NETIF_F_TSO */
2326 #ifdef ETHTOOL_GFLAGS
2327 static int igb_set_flags(struct net_device *netdev, u32 data)
2329 u32 supported_flags = ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN |
2331 #ifndef HAVE_VLAN_RX_REGISTER
2332 u32 changed = netdev->features ^ data;
2337 supported_flags |= ETH_FLAG_LRO;
2340 * Since there is no support for separate tx vlan accel
2341 * enabled make sure tx flag is cleared if rx is.
2343 if (!(data & ETH_FLAG_RXVLAN))
2344 data &= ~ETH_FLAG_TXVLAN;
2346 rc = ethtool_op_set_flags(netdev, data, supported_flags);
2349 #ifndef HAVE_VLAN_RX_REGISTER
2351 if (changed & ETH_FLAG_RXVLAN)
2352 igb_vlan_mode(netdev, data);
2358 #endif /* ETHTOOL_GFLAGS */
2359 #endif /* HAVE_NDO_SET_FEATURES */
2360 #ifdef ETHTOOL_SADV_COAL
2361 static int igb_set_adv_coal(struct net_device *netdev, struct ethtool_value *edata)
2363 struct igb_adapter *adapter = netdev_priv(netdev);
2365 switch (edata->data) {
2366 case IGB_DMAC_DISABLE:
2367 adapter->dmac = edata->data;
2370 adapter->dmac = edata->data;
2373 adapter->dmac = edata->data;
2375 case IGB_DMAC_EN_DEFAULT:
2376 adapter->dmac = edata->data;
2379 adapter->dmac = edata->data;
2382 adapter->dmac = edata->data;
2385 adapter->dmac = edata->data;
2388 adapter->dmac = edata->data;
2391 adapter->dmac = edata->data;
2394 adapter->dmac = edata->data;
2397 adapter->dmac = edata->data;
2400 adapter->dmac = edata->data;
2403 adapter->dmac = edata->data;
2406 adapter->dmac = IGB_DMAC_DISABLE;
2407 printk("set_dmac: invalid setting, setting DMAC to %d\n",
2410 printk("%s: setting DMAC to %d\n", netdev->name, adapter->dmac);
2413 #endif /* ETHTOOL_SADV_COAL */
2414 #ifdef ETHTOOL_GADV_COAL
2415 static void igb_get_dmac(struct net_device *netdev,
2416 struct ethtool_value *edata)
2418 struct igb_adapter *adapter = netdev_priv(netdev);
2419 edata->data = adapter->dmac;
2426 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2428 struct igb_adapter *adapter = netdev_priv(netdev);
2429 struct e1000_hw *hw = &adapter->hw;
2433 if ((hw->mac.type < e1000_i350) ||
2434 (hw->phy.media_type != e1000_media_type_copper))
2437 edata->supported = (SUPPORTED_1000baseT_Full |
2438 SUPPORTED_100baseT_Full);
2440 if (!hw->dev_spec._82575.eee_disable)
2442 mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
2444 /* The IPCNFG and EEER registers are not supported on I354. */
2445 if (hw->mac.type == e1000_i354) {
2446 e1000_get_eee_status_i354(hw, (bool *)&edata->eee_active);
2450 eeer = E1000_READ_REG(hw, E1000_EEER);
2452 /* EEE status on negotiated link */
2453 if (eeer & E1000_EEER_EEE_NEG)
2454 edata->eee_active = true;
2456 if (eeer & E1000_EEER_TX_LPI_EN)
2457 edata->tx_lpi_enabled = true;
2460 /* EEE Link Partner Advertised */
2461 switch (hw->mac.type) {
2463 ret_val = e1000_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
2468 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2474 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
2475 E1000_EEE_LP_ADV_DEV_I210,
2480 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2487 edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
2489 if ((hw->mac.type == e1000_i354) &&
2490 (edata->eee_enabled))
2491 edata->tx_lpi_enabled = true;
2494 * report correct negotiated EEE status for devices that
2495 * wrongly report EEE at half-duplex
2497 if (adapter->link_duplex == HALF_DUPLEX) {
2498 edata->eee_enabled = false;
2499 edata->eee_active = false;
2500 edata->tx_lpi_enabled = false;
2501 edata->advertised &= ~edata->advertised;
2509 static int igb_set_eee(struct net_device *netdev,
2510 struct ethtool_eee *edata)
2512 struct igb_adapter *adapter = netdev_priv(netdev);
2513 struct e1000_hw *hw = &adapter->hw;
2514 struct ethtool_eee eee_curr;
2517 if ((hw->mac.type < e1000_i350) ||
2518 (hw->phy.media_type != e1000_media_type_copper))
2521 ret_val = igb_get_eee(netdev, &eee_curr);
2525 if (eee_curr.eee_enabled) {
2526 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2527 dev_err(pci_dev_to_dev(adapter->pdev),
2528 "Setting EEE tx-lpi is not supported\n");
2532 /* Tx LPI time is not implemented currently */
2533 if (edata->tx_lpi_timer) {
2534 dev_err(pci_dev_to_dev(adapter->pdev),
2535 "Setting EEE Tx LPI timer is not supported\n");
2539 if (edata->advertised &
2540 ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2541 dev_err(pci_dev_to_dev(adapter->pdev),
2542 "EEE Advertisement supports only 100Tx and or 100T full duplex\n");
2546 } else if (!edata->eee_enabled) {
2547 dev_err(pci_dev_to_dev(adapter->pdev),
2548 "Setting EEE options is not supported with EEE disabled\n");
2552 adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2554 if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
2555 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
2558 if (netif_running(netdev))
2559 igb_reinit_locked(adapter);
2566 #endif /* ETHTOOL_SEEE */
2568 #ifdef ETHTOOL_GRXRINGS
2569 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2570 struct ethtool_rxnfc *cmd)
2574 /* Report default options for RSS on igb */
2575 switch (cmd->flow_type) {
2577 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2579 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2580 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2582 case AH_ESP_V4_FLOW:
2586 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2589 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2591 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2592 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2594 case AH_ESP_V6_FLOW:
2598 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2607 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2608 #ifdef HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS
2614 struct igb_adapter *adapter = netdev_priv(dev);
2615 int ret = -EOPNOTSUPP;
2618 case ETHTOOL_GRXRINGS:
2619 cmd->data = adapter->num_rx_queues;
2623 ret = igb_get_rss_hash_opts(adapter, cmd);
2632 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2633 IGB_FLAG_RSS_FIELD_IPV6_UDP)
2634 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2635 struct ethtool_rxnfc *nfc)
2637 u32 flags = adapter->flags;
2640 * RSS does not support anything other than hashing
2641 * to queues on src and dst IPs and ports
2643 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2644 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2647 switch (nfc->flow_type) {
2650 if (!(nfc->data & RXH_IP_SRC) ||
2651 !(nfc->data & RXH_IP_DST) ||
2652 !(nfc->data & RXH_L4_B_0_1) ||
2653 !(nfc->data & RXH_L4_B_2_3))
2657 if (!(nfc->data & RXH_IP_SRC) ||
2658 !(nfc->data & RXH_IP_DST))
2660 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2662 flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2664 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2665 flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2672 if (!(nfc->data & RXH_IP_SRC) ||
2673 !(nfc->data & RXH_IP_DST))
2675 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2677 flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2679 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2680 flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2686 case AH_ESP_V4_FLOW:
2690 case AH_ESP_V6_FLOW:
2694 if (!(nfc->data & RXH_IP_SRC) ||
2695 !(nfc->data & RXH_IP_DST) ||
2696 (nfc->data & RXH_L4_B_0_1) ||
2697 (nfc->data & RXH_L4_B_2_3))
2704 /* if we changed something we need to update flags */
2705 if (flags != adapter->flags) {
2706 struct e1000_hw *hw = &adapter->hw;
2707 u32 mrqc = E1000_READ_REG(hw, E1000_MRQC);
2709 if ((flags & UDP_RSS_FLAGS) &&
2710 !(adapter->flags & UDP_RSS_FLAGS))
2711 DPRINTK(DRV, WARNING,
2712 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2714 adapter->flags = flags;
2716 /* Perform hash on these packet types */
2717 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2718 E1000_MRQC_RSS_FIELD_IPV4_TCP |
2719 E1000_MRQC_RSS_FIELD_IPV6 |
2720 E1000_MRQC_RSS_FIELD_IPV6_TCP;
2722 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2723 E1000_MRQC_RSS_FIELD_IPV6_UDP);
2725 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2726 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2728 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2729 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2731 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
2737 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2739 struct igb_adapter *adapter = netdev_priv(dev);
2740 int ret = -EOPNOTSUPP;
2744 ret = igb_set_rss_hash_opt(adapter, cmd);
2752 #endif /* ETHTOOL_GRXRINGS */
2754 static const struct ethtool_ops igb_ethtool_ops = {
2755 .get_settings = igb_get_settings,
2756 .set_settings = igb_set_settings,
2757 .get_drvinfo = igb_get_drvinfo,
2758 .get_regs_len = igb_get_regs_len,
2759 .get_regs = igb_get_regs,
2760 .get_wol = igb_get_wol,
2761 .set_wol = igb_set_wol,
2762 .get_msglevel = igb_get_msglevel,
2763 .set_msglevel = igb_set_msglevel,
2764 .nway_reset = igb_nway_reset,
2765 .get_link = igb_get_link,
2766 .get_eeprom_len = igb_get_eeprom_len,
2767 .get_eeprom = igb_get_eeprom,
2768 .set_eeprom = igb_set_eeprom,
2769 .get_ringparam = igb_get_ringparam,
2770 .set_ringparam = igb_set_ringparam,
2771 .get_pauseparam = igb_get_pauseparam,
2772 .set_pauseparam = igb_set_pauseparam,
2773 .self_test = igb_diag_test,
2774 .get_strings = igb_get_strings,
2775 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2776 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
2777 .set_phys_id = igb_set_phys_id,
2779 .phys_id = igb_phys_id,
2780 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
2781 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2782 #ifdef HAVE_ETHTOOL_GET_SSET_COUNT
2783 .get_sset_count = igb_get_sset_count,
2785 .get_stats_count = igb_get_stats_count,
2786 .self_test_count = igb_diag_test_count,
2788 .get_ethtool_stats = igb_get_ethtool_stats,
2789 #ifdef HAVE_ETHTOOL_GET_PERM_ADDR
2790 .get_perm_addr = ethtool_op_get_perm_addr,
2792 .get_coalesce = igb_get_coalesce,
2793 .set_coalesce = igb_set_coalesce,
2794 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2795 #ifdef HAVE_ETHTOOL_GET_TS_INFO
2796 .get_ts_info = igb_get_ts_info,
2797 #endif /* HAVE_ETHTOOL_GET_TS_INFO */
2798 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2799 #ifdef CONFIG_PM_RUNTIME
2800 .begin = igb_ethtool_begin,
2801 .complete = igb_ethtool_complete,
2802 #endif /* CONFIG_PM_RUNTIME */
2803 #ifndef HAVE_NDO_SET_FEATURES
2804 .get_rx_csum = igb_get_rx_csum,
2805 .set_rx_csum = igb_set_rx_csum,
2806 .get_tx_csum = ethtool_op_get_tx_csum,
2807 .set_tx_csum = igb_set_tx_csum,
2808 .get_sg = ethtool_op_get_sg,
2809 .set_sg = ethtool_op_set_sg,
2811 .get_tso = ethtool_op_get_tso,
2812 .set_tso = igb_set_tso,
2814 #ifdef ETHTOOL_GFLAGS
2815 .get_flags = ethtool_op_get_flags,
2816 .set_flags = igb_set_flags,
2817 #endif /* ETHTOOL_GFLAGS */
2818 #endif /* HAVE_NDO_SET_FEATURES */
2819 #ifdef ETHTOOL_GADV_COAL
2820 .get_advcoal = igb_get_adv_coal,
2821 .set_advcoal = igb_set_dmac_coal,
2822 #endif /* ETHTOOL_GADV_COAL */
2823 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2825 .get_eee = igb_get_eee,
2828 .set_eee = igb_set_eee,
2830 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2831 #ifdef ETHTOOL_GRXRINGS
2832 .get_rxnfc = igb_get_rxnfc,
2833 .set_rxnfc = igb_set_rxnfc,
2837 #ifdef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2838 static const struct ethtool_ops_ext igb_ethtool_ops_ext = {
2839 .size = sizeof(struct ethtool_ops_ext),
2840 .get_ts_info = igb_get_ts_info,
2841 .set_phys_id = igb_set_phys_id,
2842 .get_eee = igb_get_eee,
2843 .set_eee = igb_set_eee,
2846 void igb_set_ethtool_ops(struct net_device *netdev)
2848 SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2849 set_ethtool_ops_ext(netdev, &igb_ethtool_ops_ext);
2852 void igb_set_ethtool_ops(struct net_device *netdev)
2854 /* have to "undeclare" const on this struct to remove warnings */
2855 SET_ETHTOOL_OPS(netdev, (struct ethtool_ops *)&igb_ethtool_ops);
2857 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2858 #endif /* SIOCETHTOOL */