1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "LICENSE.GPL".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/netdevice.h>
31 #include <linux/vmalloc.h>
34 #include <linux/ethtool.h>
35 #ifdef CONFIG_PM_RUNTIME
36 #include <linux/pm_runtime.h>
37 #endif /* CONFIG_PM_RUNTIME */
38 #include <linux/highmem.h>
41 #include "igb_regtest.h"
42 #include <linux/if_vlan.h>
44 #include <linux/mdio.h>
47 #ifdef ETHTOOL_OPS_COMPAT
48 #include "kcompat_ethtool.c"
52 char stat_string[ETH_GSTRING_LEN];
57 #define IGB_STAT(_name, _stat) { \
58 .stat_string = _name, \
59 .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
60 .stat_offset = offsetof(struct igb_adapter, _stat) \
62 static const struct igb_stats igb_gstrings_stats[] = {
63 IGB_STAT("rx_packets", stats.gprc),
64 IGB_STAT("tx_packets", stats.gptc),
65 IGB_STAT("rx_bytes", stats.gorc),
66 IGB_STAT("tx_bytes", stats.gotc),
67 IGB_STAT("rx_broadcast", stats.bprc),
68 IGB_STAT("tx_broadcast", stats.bptc),
69 IGB_STAT("rx_multicast", stats.mprc),
70 IGB_STAT("tx_multicast", stats.mptc),
71 IGB_STAT("multicast", stats.mprc),
72 IGB_STAT("collisions", stats.colc),
73 IGB_STAT("rx_crc_errors", stats.crcerrs),
74 IGB_STAT("rx_no_buffer_count", stats.rnbc),
75 IGB_STAT("rx_missed_errors", stats.mpc),
76 IGB_STAT("tx_aborted_errors", stats.ecol),
77 IGB_STAT("tx_carrier_errors", stats.tncrs),
78 IGB_STAT("tx_window_errors", stats.latecol),
79 IGB_STAT("tx_abort_late_coll", stats.latecol),
80 IGB_STAT("tx_deferred_ok", stats.dc),
81 IGB_STAT("tx_single_coll_ok", stats.scc),
82 IGB_STAT("tx_multi_coll_ok", stats.mcc),
83 IGB_STAT("tx_timeout_count", tx_timeout_count),
84 IGB_STAT("rx_long_length_errors", stats.roc),
85 IGB_STAT("rx_short_length_errors", stats.ruc),
86 IGB_STAT("rx_align_errors", stats.algnerrc),
87 IGB_STAT("tx_tcp_seg_good", stats.tsctc),
88 IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
89 IGB_STAT("rx_flow_control_xon", stats.xonrxc),
90 IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
91 IGB_STAT("tx_flow_control_xon", stats.xontxc),
92 IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
93 IGB_STAT("rx_long_byte_count", stats.gorc),
94 IGB_STAT("tx_dma_out_of_sync", stats.doosync),
96 IGB_STAT("lro_aggregated", lro_stats.coal),
97 IGB_STAT("lro_flushed", lro_stats.flushed),
99 IGB_STAT("tx_smbus", stats.mgptc),
100 IGB_STAT("rx_smbus", stats.mgprc),
101 IGB_STAT("dropped_smbus", stats.mgpdc),
102 IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
103 IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
104 IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
105 IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
106 #ifdef HAVE_PTP_1588_CLOCK
107 IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
108 IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
109 #endif /* HAVE_PTP_1588_CLOCK */
112 #define IGB_NETDEV_STAT(_net_stat) { \
113 .stat_string = #_net_stat, \
114 .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
115 .stat_offset = offsetof(struct net_device_stats, _net_stat) \
117 static const struct igb_stats igb_gstrings_net_stats[] = {
118 IGB_NETDEV_STAT(rx_errors),
119 IGB_NETDEV_STAT(tx_errors),
120 IGB_NETDEV_STAT(tx_dropped),
121 IGB_NETDEV_STAT(rx_length_errors),
122 IGB_NETDEV_STAT(rx_over_errors),
123 IGB_NETDEV_STAT(rx_frame_errors),
124 IGB_NETDEV_STAT(rx_fifo_errors),
125 IGB_NETDEV_STAT(tx_fifo_errors),
126 IGB_NETDEV_STAT(tx_heartbeat_errors)
129 #define IGB_GLOBAL_STATS_LEN ARRAY_SIZE(igb_gstrings_stats)
130 #define IGB_NETDEV_STATS_LEN ARRAY_SIZE(igb_gstrings_net_stats)
131 #define IGB_RX_QUEUE_STATS_LEN \
132 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
133 #define IGB_TX_QUEUE_STATS_LEN \
134 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))
135 #define IGB_QUEUE_STATS_LEN \
136 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
137 IGB_RX_QUEUE_STATS_LEN) + \
138 (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
139 IGB_TX_QUEUE_STATS_LEN))
140 #define IGB_STATS_LEN \
141 (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
143 #endif /* ETHTOOL_GSTATS */
145 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
146 "Register test (offline)", "Eeprom test (offline)",
147 "Interrupt test (offline)", "Loopback test (offline)",
148 "Link test (on/offline)"
150 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
151 #endif /* ETHTOOL_TEST */
153 #ifndef ETHTOOL_GLINKSETTINGS
154 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
156 struct igb_adapter *adapter = netdev_priv(netdev);
157 struct e1000_hw *hw = &adapter->hw;
160 if (hw->phy.media_type == e1000_media_type_copper) {
162 ecmd->supported = (SUPPORTED_10baseT_Half |
163 SUPPORTED_10baseT_Full |
164 SUPPORTED_100baseT_Half |
165 SUPPORTED_100baseT_Full |
166 SUPPORTED_1000baseT_Full|
170 ecmd->advertising = ADVERTISED_TP;
172 if (hw->mac.autoneg == 1) {
173 ecmd->advertising |= ADVERTISED_Autoneg;
174 /* the e1000 autoneg seems to match ethtool nicely */
175 ecmd->advertising |= hw->phy.autoneg_advertised;
178 ecmd->port = PORT_TP;
179 ecmd->phy_address = hw->phy.addr;
180 ecmd->transceiver = XCVR_INTERNAL;
183 ecmd->supported = (SUPPORTED_1000baseT_Full |
184 SUPPORTED_100baseT_Full |
188 if (hw->mac.type == e1000_i354)
189 ecmd->supported |= (SUPPORTED_2500baseX_Full);
191 ecmd->advertising = ADVERTISED_FIBRE;
193 switch (adapter->link_speed) {
195 ecmd->advertising = ADVERTISED_2500baseX_Full;
198 ecmd->advertising = ADVERTISED_1000baseT_Full;
201 ecmd->advertising = ADVERTISED_100baseT_Full;
207 if (hw->mac.autoneg == 1)
208 ecmd->advertising |= ADVERTISED_Autoneg;
210 ecmd->port = PORT_FIBRE;
211 ecmd->transceiver = XCVR_EXTERNAL;
214 if (hw->mac.autoneg != 1)
215 ecmd->advertising &= ~(ADVERTISED_Pause |
216 ADVERTISED_Asym_Pause);
218 if (hw->fc.requested_mode == e1000_fc_full)
219 ecmd->advertising |= ADVERTISED_Pause;
220 else if (hw->fc.requested_mode == e1000_fc_rx_pause)
221 ecmd->advertising |= (ADVERTISED_Pause |
222 ADVERTISED_Asym_Pause);
223 else if (hw->fc.requested_mode == e1000_fc_tx_pause)
224 ecmd->advertising |= ADVERTISED_Asym_Pause;
226 ecmd->advertising &= ~(ADVERTISED_Pause |
227 ADVERTISED_Asym_Pause);
229 status = E1000_READ_REG(hw, E1000_STATUS);
231 if (status & E1000_STATUS_LU) {
232 if ((hw->mac.type == e1000_i354) &&
233 (status & E1000_STATUS_2P5_SKU) &&
234 !(status & E1000_STATUS_2P5_SKU_OVER))
235 ecmd->speed = SPEED_2500;
236 else if (status & E1000_STATUS_SPEED_1000)
237 ecmd->speed = SPEED_1000;
238 else if (status & E1000_STATUS_SPEED_100)
239 ecmd->speed = SPEED_100;
241 ecmd->speed = SPEED_10;
243 if ((status & E1000_STATUS_FD) ||
244 hw->phy.media_type != e1000_media_type_copper)
245 ecmd->duplex = DUPLEX_FULL;
247 ecmd->duplex = DUPLEX_HALF;
254 if ((hw->phy.media_type == e1000_media_type_fiber) ||
256 ecmd->autoneg = AUTONEG_ENABLE;
258 ecmd->autoneg = AUTONEG_DISABLE;
261 /* MDI-X => 2; MDI =>1; Invalid =>0 */
262 if (hw->phy.media_type == e1000_media_type_copper)
263 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
266 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
268 #ifdef ETH_TP_MDI_AUTO
269 if (hw->phy.mdix == AUTO_ALL_MODES)
270 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
272 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
275 #endif /* ETH_TP_MDI_X */
280 #ifndef ETHTOOL_SLINKSETTINGS
281 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
283 struct igb_adapter *adapter = netdev_priv(netdev);
284 struct e1000_hw *hw = &adapter->hw;
286 if (ecmd->duplex == DUPLEX_HALF) {
287 if (!hw->dev_spec._82575.eee_disable)
288 dev_info(pci_dev_to_dev(adapter->pdev), "EEE disabled: not supported with half duplex\n");
289 hw->dev_spec._82575.eee_disable = true;
291 if (hw->dev_spec._82575.eee_disable)
292 dev_info(pci_dev_to_dev(adapter->pdev), "EEE enabled\n");
293 hw->dev_spec._82575.eee_disable = false;
296 /* When SoL/IDER sessions are active, autoneg/speed/duplex
297 * cannot be changed */
298 if (e1000_check_reset_block(hw)) {
299 dev_err(pci_dev_to_dev(adapter->pdev), "Cannot change link "
300 "characteristics when SoL/IDER is active.\n");
304 #ifdef ETH_TP_MDI_AUTO
306 * MDI setting is only allowed when autoneg enabled because
307 * some hardware doesn't allow MDI setting when speed or
310 if (ecmd->eth_tp_mdix_ctrl) {
311 if (hw->phy.media_type != e1000_media_type_copper)
314 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
315 (ecmd->autoneg != AUTONEG_ENABLE)) {
316 dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
321 #endif /* ETH_TP_MDI_AUTO */
322 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
323 usleep_range(1000, 2000);
325 if (ecmd->autoneg == AUTONEG_ENABLE) {
327 if (hw->phy.media_type == e1000_media_type_fiber) {
328 hw->phy.autoneg_advertised = ecmd->advertising |
331 switch (adapter->link_speed) {
333 hw->phy.autoneg_advertised =
334 ADVERTISED_2500baseX_Full;
337 hw->phy.autoneg_advertised =
338 ADVERTISED_1000baseT_Full;
341 hw->phy.autoneg_advertised =
342 ADVERTISED_100baseT_Full;
348 hw->phy.autoneg_advertised = ecmd->advertising |
352 ecmd->advertising = hw->phy.autoneg_advertised;
353 if (adapter->fc_autoneg)
354 hw->fc.requested_mode = e1000_fc_default;
356 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
357 clear_bit(__IGB_RESETTING, &adapter->state);
362 #ifdef ETH_TP_MDI_AUTO
363 /* MDI-X => 2; MDI => 1; Auto => 3 */
364 if (ecmd->eth_tp_mdix_ctrl) {
365 /* fix up the value for auto (3 => 0) as zero is mapped
368 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
369 hw->phy.mdix = AUTO_ALL_MODES;
371 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
374 #endif /* ETH_TP_MDI_AUTO */
376 if (netif_running(adapter->netdev)) {
382 clear_bit(__IGB_RESETTING, &adapter->state);
387 static u32 igb_get_link(struct net_device *netdev)
389 struct igb_adapter *adapter = netdev_priv(netdev);
390 struct e1000_mac_info *mac = &adapter->hw.mac;
393 * If the link is not reported up to netdev, interrupts are disabled,
394 * and so the physical link state may have changed since we last
395 * looked. Set get_link_status to make sure that the true link
396 * state is interrogated, rather than pulling a cached and possibly
397 * stale link state from the driver.
399 if (!netif_carrier_ok(netdev))
400 mac->get_link_status = 1;
402 return igb_has_link(adapter);
405 static void igb_get_pauseparam(struct net_device *netdev,
406 struct ethtool_pauseparam *pause)
408 struct igb_adapter *adapter = netdev_priv(netdev);
409 struct e1000_hw *hw = &adapter->hw;
412 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
414 if (hw->fc.current_mode == e1000_fc_rx_pause)
416 else if (hw->fc.current_mode == e1000_fc_tx_pause)
418 else if (hw->fc.current_mode == e1000_fc_full) {
424 static int igb_set_pauseparam(struct net_device *netdev,
425 struct ethtool_pauseparam *pause)
427 struct igb_adapter *adapter = netdev_priv(netdev);
428 struct e1000_hw *hw = &adapter->hw;
431 adapter->fc_autoneg = pause->autoneg;
433 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
434 usleep_range(1000, 2000);
436 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
437 hw->fc.requested_mode = e1000_fc_default;
438 if (netif_running(adapter->netdev)) {
445 if (pause->rx_pause && pause->tx_pause)
446 hw->fc.requested_mode = e1000_fc_full;
447 else if (pause->rx_pause && !pause->tx_pause)
448 hw->fc.requested_mode = e1000_fc_rx_pause;
449 else if (!pause->rx_pause && pause->tx_pause)
450 hw->fc.requested_mode = e1000_fc_tx_pause;
451 else if (!pause->rx_pause && !pause->tx_pause)
452 hw->fc.requested_mode = e1000_fc_none;
454 hw->fc.current_mode = hw->fc.requested_mode;
456 if (hw->phy.media_type == e1000_media_type_fiber) {
457 retval = hw->mac.ops.setup_link(hw);
458 /* implicit goto out */
460 retval = e1000_force_mac_fc(hw);
463 e1000_set_fc_watermarks_generic(hw);
468 clear_bit(__IGB_RESETTING, &adapter->state);
472 static u32 igb_get_msglevel(struct net_device *netdev)
474 struct igb_adapter *adapter = netdev_priv(netdev);
475 return adapter->msg_enable;
478 static void igb_set_msglevel(struct net_device *netdev, u32 data)
480 struct igb_adapter *adapter = netdev_priv(netdev);
481 adapter->msg_enable = data;
484 static int igb_get_regs_len(struct net_device *netdev)
486 #define IGB_REGS_LEN 555
487 return IGB_REGS_LEN * sizeof(u32);
490 static void igb_get_regs(struct net_device *netdev,
491 struct ethtool_regs *regs, void *p)
493 struct igb_adapter *adapter = netdev_priv(netdev);
494 struct e1000_hw *hw = &adapter->hw;
498 memset(p, 0, IGB_REGS_LEN * sizeof(u32));
500 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
502 /* General Registers */
503 regs_buff[0] = E1000_READ_REG(hw, E1000_CTRL);
504 regs_buff[1] = E1000_READ_REG(hw, E1000_STATUS);
505 regs_buff[2] = E1000_READ_REG(hw, E1000_CTRL_EXT);
506 regs_buff[3] = E1000_READ_REG(hw, E1000_MDIC);
507 regs_buff[4] = E1000_READ_REG(hw, E1000_SCTL);
508 regs_buff[5] = E1000_READ_REG(hw, E1000_CONNSW);
509 regs_buff[6] = E1000_READ_REG(hw, E1000_VET);
510 regs_buff[7] = E1000_READ_REG(hw, E1000_LEDCTL);
511 regs_buff[8] = E1000_READ_REG(hw, E1000_PBA);
512 regs_buff[9] = E1000_READ_REG(hw, E1000_PBS);
513 regs_buff[10] = E1000_READ_REG(hw, E1000_FRTIMER);
514 regs_buff[11] = E1000_READ_REG(hw, E1000_TCPTIMER);
517 regs_buff[12] = E1000_READ_REG(hw, E1000_EECD);
520 /* Reading EICS for EICR because they read the
521 * same but EICS does not clear on read */
522 regs_buff[13] = E1000_READ_REG(hw, E1000_EICS);
523 regs_buff[14] = E1000_READ_REG(hw, E1000_EICS);
524 regs_buff[15] = E1000_READ_REG(hw, E1000_EIMS);
525 regs_buff[16] = E1000_READ_REG(hw, E1000_EIMC);
526 regs_buff[17] = E1000_READ_REG(hw, E1000_EIAC);
527 regs_buff[18] = E1000_READ_REG(hw, E1000_EIAM);
528 /* Reading ICS for ICR because they read the
529 * same but ICS does not clear on read */
530 regs_buff[19] = E1000_READ_REG(hw, E1000_ICS);
531 regs_buff[20] = E1000_READ_REG(hw, E1000_ICS);
532 regs_buff[21] = E1000_READ_REG(hw, E1000_IMS);
533 regs_buff[22] = E1000_READ_REG(hw, E1000_IMC);
534 regs_buff[23] = E1000_READ_REG(hw, E1000_IAC);
535 regs_buff[24] = E1000_READ_REG(hw, E1000_IAM);
536 regs_buff[25] = E1000_READ_REG(hw, E1000_IMIRVP);
539 regs_buff[26] = E1000_READ_REG(hw, E1000_FCAL);
540 regs_buff[27] = E1000_READ_REG(hw, E1000_FCAH);
541 regs_buff[28] = E1000_READ_REG(hw, E1000_FCTTV);
542 regs_buff[29] = E1000_READ_REG(hw, E1000_FCRTL);
543 regs_buff[30] = E1000_READ_REG(hw, E1000_FCRTH);
544 regs_buff[31] = E1000_READ_REG(hw, E1000_FCRTV);
547 regs_buff[32] = E1000_READ_REG(hw, E1000_RCTL);
548 regs_buff[33] = E1000_READ_REG(hw, E1000_RXCSUM);
549 regs_buff[34] = E1000_READ_REG(hw, E1000_RLPML);
550 regs_buff[35] = E1000_READ_REG(hw, E1000_RFCTL);
551 regs_buff[36] = E1000_READ_REG(hw, E1000_MRQC);
552 regs_buff[37] = E1000_READ_REG(hw, E1000_VT_CTL);
555 regs_buff[38] = E1000_READ_REG(hw, E1000_TCTL);
556 regs_buff[39] = E1000_READ_REG(hw, E1000_TCTL_EXT);
557 regs_buff[40] = E1000_READ_REG(hw, E1000_TIPG);
558 regs_buff[41] = E1000_READ_REG(hw, E1000_DTXCTL);
561 regs_buff[42] = E1000_READ_REG(hw, E1000_WUC);
562 regs_buff[43] = E1000_READ_REG(hw, E1000_WUFC);
563 regs_buff[44] = E1000_READ_REG(hw, E1000_WUS);
564 regs_buff[45] = E1000_READ_REG(hw, E1000_IPAV);
565 regs_buff[46] = E1000_READ_REG(hw, E1000_WUPL);
568 regs_buff[47] = E1000_READ_REG(hw, E1000_PCS_CFG0);
569 regs_buff[48] = E1000_READ_REG(hw, E1000_PCS_LCTL);
570 regs_buff[49] = E1000_READ_REG(hw, E1000_PCS_LSTAT);
571 regs_buff[50] = E1000_READ_REG(hw, E1000_PCS_ANADV);
572 regs_buff[51] = E1000_READ_REG(hw, E1000_PCS_LPAB);
573 regs_buff[52] = E1000_READ_REG(hw, E1000_PCS_NPTX);
574 regs_buff[53] = E1000_READ_REG(hw, E1000_PCS_LPABNP);
577 regs_buff[54] = adapter->stats.crcerrs;
578 regs_buff[55] = adapter->stats.algnerrc;
579 regs_buff[56] = adapter->stats.symerrs;
580 regs_buff[57] = adapter->stats.rxerrc;
581 regs_buff[58] = adapter->stats.mpc;
582 regs_buff[59] = adapter->stats.scc;
583 regs_buff[60] = adapter->stats.ecol;
584 regs_buff[61] = adapter->stats.mcc;
585 regs_buff[62] = adapter->stats.latecol;
586 regs_buff[63] = adapter->stats.colc;
587 regs_buff[64] = adapter->stats.dc;
588 regs_buff[65] = adapter->stats.tncrs;
589 regs_buff[66] = adapter->stats.sec;
590 regs_buff[67] = adapter->stats.htdpmc;
591 regs_buff[68] = adapter->stats.rlec;
592 regs_buff[69] = adapter->stats.xonrxc;
593 regs_buff[70] = adapter->stats.xontxc;
594 regs_buff[71] = adapter->stats.xoffrxc;
595 regs_buff[72] = adapter->stats.xofftxc;
596 regs_buff[73] = adapter->stats.fcruc;
597 regs_buff[74] = adapter->stats.prc64;
598 regs_buff[75] = adapter->stats.prc127;
599 regs_buff[76] = adapter->stats.prc255;
600 regs_buff[77] = adapter->stats.prc511;
601 regs_buff[78] = adapter->stats.prc1023;
602 regs_buff[79] = adapter->stats.prc1522;
603 regs_buff[80] = adapter->stats.gprc;
604 regs_buff[81] = adapter->stats.bprc;
605 regs_buff[82] = adapter->stats.mprc;
606 regs_buff[83] = adapter->stats.gptc;
607 regs_buff[84] = adapter->stats.gorc;
608 regs_buff[86] = adapter->stats.gotc;
609 regs_buff[88] = adapter->stats.rnbc;
610 regs_buff[89] = adapter->stats.ruc;
611 regs_buff[90] = adapter->stats.rfc;
612 regs_buff[91] = adapter->stats.roc;
613 regs_buff[92] = adapter->stats.rjc;
614 regs_buff[93] = adapter->stats.mgprc;
615 regs_buff[94] = adapter->stats.mgpdc;
616 regs_buff[95] = adapter->stats.mgptc;
617 regs_buff[96] = adapter->stats.tor;
618 regs_buff[98] = adapter->stats.tot;
619 regs_buff[100] = adapter->stats.tpr;
620 regs_buff[101] = adapter->stats.tpt;
621 regs_buff[102] = adapter->stats.ptc64;
622 regs_buff[103] = adapter->stats.ptc127;
623 regs_buff[104] = adapter->stats.ptc255;
624 regs_buff[105] = adapter->stats.ptc511;
625 regs_buff[106] = adapter->stats.ptc1023;
626 regs_buff[107] = adapter->stats.ptc1522;
627 regs_buff[108] = adapter->stats.mptc;
628 regs_buff[109] = adapter->stats.bptc;
629 regs_buff[110] = adapter->stats.tsctc;
630 regs_buff[111] = adapter->stats.iac;
631 regs_buff[112] = adapter->stats.rpthc;
632 regs_buff[113] = adapter->stats.hgptc;
633 regs_buff[114] = adapter->stats.hgorc;
634 regs_buff[116] = adapter->stats.hgotc;
635 regs_buff[118] = adapter->stats.lenerrs;
636 regs_buff[119] = adapter->stats.scvpc;
637 regs_buff[120] = adapter->stats.hrmpc;
639 for (i = 0; i < 4; i++)
640 regs_buff[121 + i] = E1000_READ_REG(hw, E1000_SRRCTL(i));
641 for (i = 0; i < 4; i++)
642 regs_buff[125 + i] = E1000_READ_REG(hw, E1000_PSRTYPE(i));
643 for (i = 0; i < 4; i++)
644 regs_buff[129 + i] = E1000_READ_REG(hw, E1000_RDBAL(i));
645 for (i = 0; i < 4; i++)
646 regs_buff[133 + i] = E1000_READ_REG(hw, E1000_RDBAH(i));
647 for (i = 0; i < 4; i++)
648 regs_buff[137 + i] = E1000_READ_REG(hw, E1000_RDLEN(i));
649 for (i = 0; i < 4; i++)
650 regs_buff[141 + i] = E1000_READ_REG(hw, E1000_RDH(i));
651 for (i = 0; i < 4; i++)
652 regs_buff[145 + i] = E1000_READ_REG(hw, E1000_RDT(i));
653 for (i = 0; i < 4; i++)
654 regs_buff[149 + i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
656 for (i = 0; i < 10; i++)
657 regs_buff[153 + i] = E1000_READ_REG(hw, E1000_EITR(i));
658 for (i = 0; i < 8; i++)
659 regs_buff[163 + i] = E1000_READ_REG(hw, E1000_IMIR(i));
660 for (i = 0; i < 8; i++)
661 regs_buff[171 + i] = E1000_READ_REG(hw, E1000_IMIREXT(i));
662 for (i = 0; i < 16; i++)
663 regs_buff[179 + i] = E1000_READ_REG(hw, E1000_RAL(i));
664 for (i = 0; i < 16; i++)
665 regs_buff[195 + i] = E1000_READ_REG(hw, E1000_RAH(i));
667 for (i = 0; i < 4; i++)
668 regs_buff[211 + i] = E1000_READ_REG(hw, E1000_TDBAL(i));
669 for (i = 0; i < 4; i++)
670 regs_buff[215 + i] = E1000_READ_REG(hw, E1000_TDBAH(i));
671 for (i = 0; i < 4; i++)
672 regs_buff[219 + i] = E1000_READ_REG(hw, E1000_TDLEN(i));
673 for (i = 0; i < 4; i++)
674 regs_buff[223 + i] = E1000_READ_REG(hw, E1000_TDH(i));
675 for (i = 0; i < 4; i++)
676 regs_buff[227 + i] = E1000_READ_REG(hw, E1000_TDT(i));
677 for (i = 0; i < 4; i++)
678 regs_buff[231 + i] = E1000_READ_REG(hw, E1000_TXDCTL(i));
679 for (i = 0; i < 4; i++)
680 regs_buff[235 + i] = E1000_READ_REG(hw, E1000_TDWBAL(i));
681 for (i = 0; i < 4; i++)
682 regs_buff[239 + i] = E1000_READ_REG(hw, E1000_TDWBAH(i));
683 for (i = 0; i < 4; i++)
684 regs_buff[243 + i] = E1000_READ_REG(hw, E1000_DCA_TXCTRL(i));
686 for (i = 0; i < 4; i++)
687 regs_buff[247 + i] = E1000_READ_REG(hw, E1000_IP4AT_REG(i));
688 for (i = 0; i < 4; i++)
689 regs_buff[251 + i] = E1000_READ_REG(hw, E1000_IP6AT_REG(i));
690 for (i = 0; i < 32; i++)
691 regs_buff[255 + i] = E1000_READ_REG(hw, E1000_WUPM_REG(i));
692 for (i = 0; i < 128; i++)
693 regs_buff[287 + i] = E1000_READ_REG(hw, E1000_FFMT_REG(i));
694 for (i = 0; i < 128; i++)
695 regs_buff[415 + i] = E1000_READ_REG(hw, E1000_FFVT_REG(i));
696 for (i = 0; i < 4; i++)
697 regs_buff[543 + i] = E1000_READ_REG(hw, E1000_FFLT_REG(i));
699 regs_buff[547] = E1000_READ_REG(hw, E1000_TDFH);
700 regs_buff[548] = E1000_READ_REG(hw, E1000_TDFT);
701 regs_buff[549] = E1000_READ_REG(hw, E1000_TDFHS);
702 regs_buff[550] = E1000_READ_REG(hw, E1000_TDFPC);
703 if (hw->mac.type > e1000_82580) {
704 regs_buff[551] = adapter->stats.o2bgptc;
705 regs_buff[552] = adapter->stats.b2ospc;
706 regs_buff[553] = adapter->stats.o2bspc;
707 regs_buff[554] = adapter->stats.b2ogprc;
711 static int igb_get_eeprom_len(struct net_device *netdev)
713 struct igb_adapter *adapter = netdev_priv(netdev);
714 return adapter->hw.nvm.word_size * 2;
717 static int igb_get_eeprom(struct net_device *netdev,
718 struct ethtool_eeprom *eeprom, u8 *bytes)
720 struct igb_adapter *adapter = netdev_priv(netdev);
721 struct e1000_hw *hw = &adapter->hw;
723 int first_word, last_word;
727 if (eeprom->len == 0)
730 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
732 first_word = eeprom->offset >> 1;
733 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
735 eeprom_buff = kmalloc(sizeof(u16) *
736 (last_word - first_word + 1), GFP_KERNEL);
740 if (hw->nvm.type == e1000_nvm_eeprom_spi)
741 ret_val = e1000_read_nvm(hw, first_word,
742 last_word - first_word + 1,
745 for (i = 0; i < last_word - first_word + 1; i++) {
746 ret_val = e1000_read_nvm(hw, first_word + i, 1,
753 /* Device's eeprom is always little-endian, word addressable */
754 for (i = 0; i < last_word - first_word + 1; i++)
755 eeprom_buff[i] = le16_to_cpu(eeprom_buff[i]);
757 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
764 static int igb_set_eeprom(struct net_device *netdev,
765 struct ethtool_eeprom *eeprom, u8 *bytes)
767 struct igb_adapter *adapter = netdev_priv(netdev);
768 struct e1000_hw *hw = &adapter->hw;
771 int max_len, first_word, last_word, ret_val = 0;
774 if (eeprom->len == 0)
777 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
780 max_len = hw->nvm.word_size * 2;
782 first_word = eeprom->offset >> 1;
783 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
784 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
788 ptr = (void *)eeprom_buff;
790 if (eeprom->offset & 1) {
791 /* need read/modify/write of first changed EEPROM word */
792 /* only the second byte of the word is being modified */
793 ret_val = e1000_read_nvm(hw, first_word, 1,
797 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
798 /* need read/modify/write of last changed EEPROM word */
799 /* only the first byte of the word is being modified */
800 ret_val = e1000_read_nvm(hw, last_word, 1,
801 &eeprom_buff[last_word - first_word]);
804 /* Device's eeprom is always little-endian, word addressable */
805 for (i = 0; i < last_word - first_word + 1; i++)
806 le16_to_cpus(&eeprom_buff[i]);
808 memcpy(ptr, bytes, eeprom->len);
810 for (i = 0; i < last_word - first_word + 1; i++)
811 cpu_to_le16s(&eeprom_buff[i]);
813 ret_val = e1000_write_nvm(hw, first_word,
814 last_word - first_word + 1, eeprom_buff);
816 /* Update the checksum if write succeeded.
817 * and flush shadow RAM for 82573 controllers */
819 e1000_update_nvm_checksum(hw);
825 static void igb_get_drvinfo(struct net_device *netdev,
826 struct ethtool_drvinfo *drvinfo)
828 struct igb_adapter *adapter = netdev_priv(netdev);
830 strncpy(drvinfo->driver, igb_driver_name, sizeof(drvinfo->driver) - 1);
831 strncpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version) - 1);
833 strlcpy(drvinfo->fw_version, adapter->fw_version,
834 sizeof(drvinfo->fw_version));
835 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
836 sizeof(drvinfo->bus_info));
837 drvinfo->n_stats = IGB_STATS_LEN;
838 drvinfo->testinfo_len = IGB_TEST_LEN;
839 drvinfo->regdump_len = igb_get_regs_len(netdev);
840 drvinfo->eedump_len = igb_get_eeprom_len(netdev);
843 static void igb_get_ringparam(struct net_device *netdev,
844 struct ethtool_ringparam *ring)
846 struct igb_adapter *adapter = netdev_priv(netdev);
848 ring->rx_max_pending = IGB_MAX_RXD;
849 ring->tx_max_pending = IGB_MAX_TXD;
850 ring->rx_mini_max_pending = 0;
851 ring->rx_jumbo_max_pending = 0;
852 ring->rx_pending = adapter->rx_ring_count;
853 ring->tx_pending = adapter->tx_ring_count;
854 ring->rx_mini_pending = 0;
855 ring->rx_jumbo_pending = 0;
858 static int igb_set_ringparam(struct net_device *netdev,
859 struct ethtool_ringparam *ring)
861 struct igb_adapter *adapter = netdev_priv(netdev);
862 struct igb_ring *temp_ring;
864 u16 new_rx_count, new_tx_count;
866 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
869 new_rx_count = min(ring->rx_pending, (u32)IGB_MAX_RXD);
870 new_rx_count = max(new_rx_count, (u16)IGB_MIN_RXD);
871 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
873 new_tx_count = min(ring->tx_pending, (u32)IGB_MAX_TXD);
874 new_tx_count = max(new_tx_count, (u16)IGB_MIN_TXD);
875 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
877 if ((new_tx_count == adapter->tx_ring_count) &&
878 (new_rx_count == adapter->rx_ring_count)) {
883 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
884 usleep_range(1000, 2000);
886 if (!netif_running(adapter->netdev)) {
887 for (i = 0; i < adapter->num_tx_queues; i++)
888 adapter->tx_ring[i]->count = new_tx_count;
889 for (i = 0; i < adapter->num_rx_queues; i++)
890 adapter->rx_ring[i]->count = new_rx_count;
891 adapter->tx_ring_count = new_tx_count;
892 adapter->rx_ring_count = new_rx_count;
896 if (adapter->num_tx_queues > adapter->num_rx_queues)
897 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
899 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
909 * We can't just free everything and then setup again,
910 * because the ISRs in MSI-X mode get passed pointers
911 * to the tx and rx ring structs.
913 if (new_tx_count != adapter->tx_ring_count) {
914 for (i = 0; i < adapter->num_tx_queues; i++) {
915 memcpy(&temp_ring[i], adapter->tx_ring[i],
916 sizeof(struct igb_ring));
918 temp_ring[i].count = new_tx_count;
919 err = igb_setup_tx_resources(&temp_ring[i]);
923 igb_free_tx_resources(&temp_ring[i]);
929 for (i = 0; i < adapter->num_tx_queues; i++) {
930 igb_free_tx_resources(adapter->tx_ring[i]);
932 memcpy(adapter->tx_ring[i], &temp_ring[i],
933 sizeof(struct igb_ring));
936 adapter->tx_ring_count = new_tx_count;
939 if (new_rx_count != adapter->rx_ring_count) {
940 for (i = 0; i < adapter->num_rx_queues; i++) {
941 memcpy(&temp_ring[i], adapter->rx_ring[i],
942 sizeof(struct igb_ring));
944 temp_ring[i].count = new_rx_count;
945 err = igb_setup_rx_resources(&temp_ring[i]);
949 igb_free_rx_resources(&temp_ring[i]);
956 for (i = 0; i < adapter->num_rx_queues; i++) {
957 igb_free_rx_resources(adapter->rx_ring[i]);
959 memcpy(adapter->rx_ring[i], &temp_ring[i],
960 sizeof(struct igb_ring));
963 adapter->rx_ring_count = new_rx_count;
969 clear_bit(__IGB_RESETTING, &adapter->state);
972 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
973 int reg, u32 mask, u32 write)
975 struct e1000_hw *hw = &adapter->hw;
977 static const u32 _test[] =
978 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
979 for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
980 E1000_WRITE_REG(hw, reg, (_test[pat] & write));
981 val = E1000_READ_REG(hw, reg) & mask;
982 if (val != (_test[pat] & write & mask)) {
983 dev_err(pci_dev_to_dev(adapter->pdev), "pattern test reg %04X "
984 "failed: got 0x%08X expected 0x%08X\n",
985 E1000_REGISTER(hw, reg), val, (_test[pat] & write & mask));
986 *data = E1000_REGISTER(hw, reg);
994 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
995 int reg, u32 mask, u32 write)
997 struct e1000_hw *hw = &adapter->hw;
999 E1000_WRITE_REG(hw, reg, write & mask);
1000 val = E1000_READ_REG(hw, reg);
1001 if ((write & mask) != (val & mask)) {
1002 dev_err(pci_dev_to_dev(adapter->pdev), "set/check reg %04X test failed:"
1003 " got 0x%08X expected 0x%08X\n", reg,
1004 (val & mask), (write & mask));
1005 *data = E1000_REGISTER(hw, reg);
1012 #define REG_PATTERN_TEST(reg, mask, write) \
1014 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1018 #define REG_SET_AND_CHECK(reg, mask, write) \
1020 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1024 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1026 struct e1000_hw *hw = &adapter->hw;
1027 struct igb_reg_test *test;
1028 u32 value, before, after;
1031 switch (adapter->hw.mac.type) {
1034 test = reg_test_i350;
1035 toggle = 0x7FEFF3FF;
1039 test = reg_test_i210;
1040 toggle = 0x7FEFF3FF;
1043 test = reg_test_82580;
1044 toggle = 0x7FEFF3FF;
1047 test = reg_test_82576;
1048 toggle = 0x7FFFF3FF;
1051 test = reg_test_82575;
1052 toggle = 0x7FFFF3FF;
1056 /* Because the status register is such a special case,
1057 * we handle it separately from the rest of the register
1058 * tests. Some bits are read-only, some toggle, and some
1059 * are writable on newer MACs.
1061 before = E1000_READ_REG(hw, E1000_STATUS);
1062 value = (E1000_READ_REG(hw, E1000_STATUS) & toggle);
1063 E1000_WRITE_REG(hw, E1000_STATUS, toggle);
1064 after = E1000_READ_REG(hw, E1000_STATUS) & toggle;
1065 if (value != after) {
1066 dev_err(pci_dev_to_dev(adapter->pdev), "failed STATUS register test "
1067 "got: 0x%08X expected: 0x%08X\n", after, value);
1071 /* restore previous status */
1072 E1000_WRITE_REG(hw, E1000_STATUS, before);
1074 /* Perform the remainder of the register test, looping through
1075 * the test table until we either fail or reach the null entry.
1078 for (i = 0; i < test->array_len; i++) {
1079 switch (test->test_type) {
1081 REG_PATTERN_TEST(test->reg +
1082 (i * test->reg_offset),
1087 REG_SET_AND_CHECK(test->reg +
1088 (i * test->reg_offset),
1094 (adapter->hw.hw_addr + test->reg)
1095 + (i * test->reg_offset));
1098 REG_PATTERN_TEST(test->reg + (i * 4),
1102 case TABLE64_TEST_LO:
1103 REG_PATTERN_TEST(test->reg + (i * 8),
1107 case TABLE64_TEST_HI:
1108 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1121 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1125 /* Validate NVM checksum */
1126 if (e1000_validate_nvm_checksum(&adapter->hw) < 0)
1132 static irqreturn_t igb_test_intr(int irq, void *data)
1134 struct igb_adapter *adapter = data;
1135 struct e1000_hw *hw = &adapter->hw;
1137 adapter->test_icr |= E1000_READ_REG(hw, E1000_ICR);
1142 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1144 struct e1000_hw *hw = &adapter->hw;
1145 struct net_device *netdev = adapter->netdev;
1146 u32 mask, ics_mask, i = 0, shared_int = TRUE;
1147 u32 irq = adapter->pdev->irq;
1151 /* Hook up test interrupt handler just for this test */
1152 if (adapter->msix_entries) {
1153 if (request_irq(adapter->msix_entries[0].vector,
1154 &igb_test_intr, 0, netdev->name, adapter)) {
1158 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1160 if (request_irq(irq,
1161 igb_test_intr, 0, netdev->name, adapter)) {
1165 } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1166 netdev->name, adapter)) {
1168 } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1169 netdev->name, adapter)) {
1173 dev_info(pci_dev_to_dev(adapter->pdev), "testing %s interrupt\n",
1174 (shared_int ? "shared" : "unshared"));
1176 /* Disable all the interrupts */
1177 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1178 E1000_WRITE_FLUSH(hw);
1179 usleep_range(10000, 20000);
1181 /* Define all writable bits for ICS */
1182 switch (hw->mac.type) {
1184 ics_mask = 0x37F47EDD;
1187 ics_mask = 0x77D4FBFD;
1190 ics_mask = 0x77DCFED5;
1194 ics_mask = 0x77DCFED5;
1198 ics_mask = 0x774CFED5;
1201 ics_mask = 0x7FFFFFFF;
1205 /* Test each interrupt */
1206 for (; i < 31; i++) {
1207 /* Interrupt to test */
1210 if (!(mask & ics_mask))
1214 /* Disable the interrupt to be reported in
1215 * the cause register and then force the same
1216 * interrupt and see if one gets posted. If
1217 * an interrupt was posted to the bus, the
1220 adapter->test_icr = 0;
1222 /* Flush any pending interrupts */
1223 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1225 E1000_WRITE_REG(hw, E1000_IMC, mask);
1226 E1000_WRITE_REG(hw, E1000_ICS, mask);
1227 E1000_WRITE_FLUSH(hw);
1228 usleep_range(10000, 20000);
1230 if (adapter->test_icr & mask) {
1236 /* Enable the interrupt to be reported in
1237 * the cause register and then force the same
1238 * interrupt and see if one gets posted. If
1239 * an interrupt was not posted to the bus, the
1242 adapter->test_icr = 0;
1244 /* Flush any pending interrupts */
1245 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1247 E1000_WRITE_REG(hw, E1000_IMS, mask);
1248 E1000_WRITE_REG(hw, E1000_ICS, mask);
1249 E1000_WRITE_FLUSH(hw);
1250 usleep_range(10000, 20000);
1252 if (!(adapter->test_icr & mask)) {
1258 /* Disable the other interrupts to be reported in
1259 * the cause register and then force the other
1260 * interrupts and see if any get posted. If
1261 * an interrupt was posted to the bus, the
1264 adapter->test_icr = 0;
1266 /* Flush any pending interrupts */
1267 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1269 E1000_WRITE_REG(hw, E1000_IMC, ~mask);
1270 E1000_WRITE_REG(hw, E1000_ICS, ~mask);
1271 E1000_WRITE_FLUSH(hw);
1272 usleep_range(10000, 20000);
1274 if (adapter->test_icr & mask) {
1281 /* Disable all the interrupts */
1282 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1283 E1000_WRITE_FLUSH(hw);
1284 usleep_range(10000, 20000);
1286 /* Unhook test interrupt handler */
1287 if (adapter->msix_entries)
1288 free_irq(adapter->msix_entries[0].vector, adapter);
1290 free_irq(irq, adapter);
1295 static void igb_free_desc_rings(struct igb_adapter *adapter)
1297 igb_free_tx_resources(&adapter->test_tx_ring);
1298 igb_free_rx_resources(&adapter->test_rx_ring);
1301 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1303 struct igb_ring *tx_ring = &adapter->test_tx_ring;
1304 struct igb_ring *rx_ring = &adapter->test_rx_ring;
1305 struct e1000_hw *hw = &adapter->hw;
1308 /* Setup Tx descriptor ring and Tx buffers */
1309 tx_ring->count = IGB_DEFAULT_TXD;
1310 tx_ring->dev = pci_dev_to_dev(adapter->pdev);
1311 tx_ring->netdev = adapter->netdev;
1312 tx_ring->reg_idx = adapter->vfs_allocated_count;
1314 if (igb_setup_tx_resources(tx_ring)) {
1319 igb_setup_tctl(adapter);
1320 igb_configure_tx_ring(adapter, tx_ring);
1322 /* Setup Rx descriptor ring and Rx buffers */
1323 rx_ring->count = IGB_DEFAULT_RXD;
1324 rx_ring->dev = pci_dev_to_dev(adapter->pdev);
1325 rx_ring->netdev = adapter->netdev;
1326 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1327 rx_ring->rx_buffer_len = IGB_RX_HDR_LEN;
1329 rx_ring->reg_idx = adapter->vfs_allocated_count;
1331 if (igb_setup_rx_resources(rx_ring)) {
1336 /* set the default queue to queue 0 of PF */
1337 E1000_WRITE_REG(hw, E1000_MRQC, adapter->vfs_allocated_count << 3);
1339 /* enable receive ring */
1340 igb_setup_rctl(adapter);
1341 igb_configure_rx_ring(adapter, rx_ring);
1343 igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1348 igb_free_desc_rings(adapter);
1352 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1354 struct e1000_hw *hw = &adapter->hw;
1356 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1357 e1000_write_phy_reg(hw, 29, 0x001F);
1358 e1000_write_phy_reg(hw, 30, 0x8FFC);
1359 e1000_write_phy_reg(hw, 29, 0x001A);
1360 e1000_write_phy_reg(hw, 30, 0x8FF0);
1363 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1365 struct e1000_hw *hw = &adapter->hw;
1368 hw->mac.autoneg = FALSE;
1370 if (hw->phy.type == e1000_phy_m88) {
1371 if (hw->phy.id != I210_I_PHY_ID) {
1372 /* Auto-MDI/MDIX Off */
1373 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1374 /* reset to update Auto-MDI/MDIX */
1375 e1000_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1377 e1000_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1379 /* force 1000, set loopback */
1380 e1000_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1381 e1000_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1384 /* enable MII loopback */
1385 if (hw->phy.type == e1000_phy_82580)
1386 e1000_write_phy_reg(hw, I82577_PHY_LBK_CTRL, 0x8041);
1389 /* force 1000, set loopback */
1390 e1000_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1392 /* Now set up the MAC to the same speed/duplex as the PHY. */
1393 ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);
1394 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1395 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1396 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1397 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1398 E1000_CTRL_FD | /* Force Duplex to FULL */
1399 E1000_CTRL_SLU); /* Set link up enable bit */
1401 if (hw->phy.type == e1000_phy_m88)
1402 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1404 E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);
1406 /* Disable the receiver on the PHY so when a cable is plugged in, the
1407 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1409 if (hw->phy.type == e1000_phy_m88)
1410 igb_phy_disable_receiver(adapter);
1416 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1418 return igb_integrated_phy_loopback(adapter);
1421 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1423 struct e1000_hw *hw = &adapter->hw;
1426 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
1428 /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1429 if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1430 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1431 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1432 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1433 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1435 /* Enable DH89xxCC MPHY for near end loopback */
1436 reg = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTL);
1437 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1438 E1000_MPHY_PCS_CLK_REG_OFFSET;
1439 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTL, reg);
1441 reg = E1000_READ_REG(hw, E1000_MPHY_DATA);
1442 reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1443 E1000_WRITE_REG(hw, E1000_MPHY_DATA, reg);
1446 reg = E1000_READ_REG(hw, E1000_RCTL);
1447 reg |= E1000_RCTL_LBM_TCVR;
1448 E1000_WRITE_REG(hw, E1000_RCTL, reg);
1450 E1000_WRITE_REG(hw, E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1452 reg = E1000_READ_REG(hw, E1000_CTRL);
1453 reg &= ~(E1000_CTRL_RFCE |
1456 reg |= E1000_CTRL_SLU |
1458 E1000_WRITE_REG(hw, E1000_CTRL, reg);
1460 /* Unset switch control to serdes energy detect */
1461 reg = E1000_READ_REG(hw, E1000_CONNSW);
1462 reg &= ~E1000_CONNSW_ENRGSRC;
1463 E1000_WRITE_REG(hw, E1000_CONNSW, reg);
1465 /* Unset sigdetect for SERDES loopback on
1466 * 82580 and newer devices
1468 if (hw->mac.type >= e1000_82580) {
1469 reg = E1000_READ_REG(hw, E1000_PCS_CFG0);
1470 reg |= E1000_PCS_CFG_IGN_SD;
1471 E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg);
1474 /* Set PCS register for forced speed */
1475 reg = E1000_READ_REG(hw, E1000_PCS_LCTL);
1476 reg &= ~E1000_PCS_LCTL_AN_ENABLE; /* Disable Autoneg*/
1477 reg |= E1000_PCS_LCTL_FLV_LINK_UP | /* Force link up */
1478 E1000_PCS_LCTL_FSV_1000 | /* Force 1000 */
1479 E1000_PCS_LCTL_FDV_FULL | /* SerDes Full duplex */
1480 E1000_PCS_LCTL_FSD | /* Force Speed */
1481 E1000_PCS_LCTL_FORCE_LINK; /* Force Link */
1482 E1000_WRITE_REG(hw, E1000_PCS_LCTL, reg);
1487 return igb_set_phy_loopback(adapter);
1490 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1492 struct e1000_hw *hw = &adapter->hw;
1496 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1497 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1498 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1499 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1502 /* Disable near end loopback on DH89xxCC */
1503 reg = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTL);
1504 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK ) |
1505 E1000_MPHY_PCS_CLK_REG_OFFSET;
1506 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTL, reg);
1508 reg = E1000_READ_REG(hw, E1000_MPHY_DATA);
1509 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1510 E1000_WRITE_REG(hw, E1000_MPHY_DATA, reg);
1513 rctl = E1000_READ_REG(hw, E1000_RCTL);
1514 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1515 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
1517 hw->mac.autoneg = TRUE;
1518 e1000_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1519 if (phy_reg & MII_CR_LOOPBACK) {
1520 phy_reg &= ~MII_CR_LOOPBACK;
1521 if (hw->phy.type == I210_I_PHY_ID)
1522 e1000_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1523 e1000_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1524 e1000_phy_commit(hw);
1527 static void igb_create_lbtest_frame(struct sk_buff *skb,
1528 unsigned int frame_size)
1530 memset(skb->data, 0xFF, frame_size);
1532 memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1533 memset(&skb->data[frame_size + 10], 0xBE, 1);
1534 memset(&skb->data[frame_size + 12], 0xAF, 1);
1537 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1538 unsigned int frame_size)
1540 unsigned char *data;
1545 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1546 data = rx_buffer->skb->data;
1548 data = kmap(rx_buffer->page);
1551 if (data[3] != 0xFF ||
1552 data[frame_size + 10] != 0xBE ||
1553 data[frame_size + 12] != 0xAF)
1556 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
1557 kunmap(rx_buffer->page);
1563 static u16 igb_clean_test_rings(struct igb_ring *rx_ring,
1564 struct igb_ring *tx_ring,
1567 union e1000_adv_rx_desc *rx_desc;
1568 struct igb_rx_buffer *rx_buffer_info;
1569 struct igb_tx_buffer *tx_buffer_info;
1570 u16 rx_ntc, tx_ntc, count = 0;
1572 /* initialize next to clean and descriptor values */
1573 rx_ntc = rx_ring->next_to_clean;
1574 tx_ntc = tx_ring->next_to_clean;
1575 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1577 while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1578 /* check rx buffer */
1579 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1581 /* sync Rx buffer for CPU read */
1582 dma_sync_single_for_cpu(rx_ring->dev,
1583 rx_buffer_info->dma,
1584 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1591 /* verify contents of skb */
1592 if (igb_check_lbtest_frame(rx_buffer_info, size))
1595 /* sync Rx buffer for device write */
1596 dma_sync_single_for_device(rx_ring->dev,
1597 rx_buffer_info->dma,
1598 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1605 /* unmap buffer on tx side */
1606 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1607 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1609 /* increment rx/tx next to clean counters */
1611 if (rx_ntc == rx_ring->count)
1614 if (tx_ntc == tx_ring->count)
1617 /* fetch next descriptor */
1618 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1621 /* re-map buffers to ring, store next to clean values */
1622 igb_alloc_rx_buffers(rx_ring, count);
1623 rx_ring->next_to_clean = rx_ntc;
1624 tx_ring->next_to_clean = tx_ntc;
1629 static int igb_run_loopback_test(struct igb_adapter *adapter)
1631 struct igb_ring *tx_ring = &adapter->test_tx_ring;
1632 struct igb_ring *rx_ring = &adapter->test_rx_ring;
1633 u16 i, j, lc, good_cnt;
1635 unsigned int size = IGB_RX_HDR_LEN;
1636 netdev_tx_t tx_ret_val;
1637 struct sk_buff *skb;
1639 /* allocate test skb */
1640 skb = alloc_skb(size, GFP_KERNEL);
1644 /* place data into test skb */
1645 igb_create_lbtest_frame(skb, size);
1649 * Calculate the loop count based on the largest descriptor ring
1650 * The idea is to wrap the largest ring a number of times using 64
1651 * send/receive pairs during each loop
1654 if (rx_ring->count <= tx_ring->count)
1655 lc = ((tx_ring->count / 64) * 2) + 1;
1657 lc = ((rx_ring->count / 64) * 2) + 1;
1659 for (j = 0; j <= lc; j++) { /* loop count loop */
1660 /* reset count of good packets */
1663 /* place 64 packets on the transmit queue*/
1664 for (i = 0; i < 64; i++) {
1666 tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1667 if (tx_ret_val == NETDEV_TX_OK)
1671 if (good_cnt != 64) {
1676 /* allow 200 milliseconds for packets to go from tx to rx */
1679 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1680 if (good_cnt != 64) {
1684 } /* end loop count loop */
1686 /* free the original skb */
1692 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1694 /* PHY loopback cannot be performed if SoL/IDER
1695 * sessions are active */
1696 if (e1000_check_reset_block(&adapter->hw)) {
1697 dev_err(pci_dev_to_dev(adapter->pdev),
1698 "Cannot do PHY loopback test "
1699 "when SoL/IDER is active.\n");
1703 if (adapter->hw.mac.type == e1000_i354) {
1704 dev_info(&adapter->pdev->dev,
1705 "Loopback test not supported on i354.\n");
1709 *data = igb_setup_desc_rings(adapter);
1712 *data = igb_setup_loopback_test(adapter);
1715 *data = igb_run_loopback_test(adapter);
1717 igb_loopback_cleanup(adapter);
1720 igb_free_desc_rings(adapter);
1725 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1732 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1734 adapter->hw.mac.serdes_has_link = FALSE;
1736 /* On some blade server designs, link establishment
1737 * could take as long as 2-3 minutes */
1739 e1000_check_for_link(&adapter->hw);
1740 if (adapter->hw.mac.serdes_has_link)
1743 } while (i++ < 3750);
1747 for (i=0; i < IGB_MAX_LINK_TRIES; i++) {
1748 link = igb_has_link(adapter);
1763 static void igb_diag_test(struct net_device *netdev,
1764 struct ethtool_test *eth_test, u64 *data)
1766 struct igb_adapter *adapter = netdev_priv(netdev);
1767 u16 autoneg_advertised;
1768 u8 forced_speed_duplex, autoneg;
1769 bool if_running = netif_running(netdev);
1771 set_bit(__IGB_TESTING, &adapter->state);
1772 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1775 /* save speed, duplex, autoneg settings */
1776 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1777 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1778 autoneg = adapter->hw.mac.autoneg;
1780 dev_info(pci_dev_to_dev(adapter->pdev), "offline testing starting\n");
1782 /* power up link for link test */
1783 igb_power_up_link(adapter);
1785 /* Link test performed before hardware reset so autoneg doesn't
1786 * interfere with test result */
1787 if (igb_link_test(adapter, &data[4]))
1788 eth_test->flags |= ETH_TEST_FL_FAILED;
1791 /* indicate we're in test mode */
1796 if (igb_reg_test(adapter, &data[0]))
1797 eth_test->flags |= ETH_TEST_FL_FAILED;
1800 if (igb_eeprom_test(adapter, &data[1]))
1801 eth_test->flags |= ETH_TEST_FL_FAILED;
1804 if (igb_intr_test(adapter, &data[2]))
1805 eth_test->flags |= ETH_TEST_FL_FAILED;
1809 /* power up link for loopback test */
1810 igb_power_up_link(adapter);
1812 if (igb_loopback_test(adapter, &data[3]))
1813 eth_test->flags |= ETH_TEST_FL_FAILED;
1815 /* restore speed, duplex, autoneg settings */
1816 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1817 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1818 adapter->hw.mac.autoneg = autoneg;
1820 /* force this routine to wait until autoneg complete/timeout */
1821 adapter->hw.phy.autoneg_wait_to_complete = TRUE;
1823 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
1825 clear_bit(__IGB_TESTING, &adapter->state);
1829 dev_info(pci_dev_to_dev(adapter->pdev), "online testing starting\n");
1831 /* PHY is powered down when interface is down */
1832 if (if_running && igb_link_test(adapter, &data[4]))
1833 eth_test->flags |= ETH_TEST_FL_FAILED;
1837 /* Online tests aren't run; pass by default */
1843 clear_bit(__IGB_TESTING, &adapter->state);
1845 msleep_interruptible(4 * 1000);
1848 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1850 struct igb_adapter *adapter = netdev_priv(netdev);
1852 wol->supported = WAKE_UCAST | WAKE_MCAST |
1853 WAKE_BCAST | WAKE_MAGIC |
1857 if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
1860 /* apply any specific unsupported masks here */
1861 switch (adapter->hw.device_id) {
1866 if (adapter->wol & E1000_WUFC_EX)
1867 wol->wolopts |= WAKE_UCAST;
1868 if (adapter->wol & E1000_WUFC_MC)
1869 wol->wolopts |= WAKE_MCAST;
1870 if (adapter->wol & E1000_WUFC_BC)
1871 wol->wolopts |= WAKE_BCAST;
1872 if (adapter->wol & E1000_WUFC_MAG)
1873 wol->wolopts |= WAKE_MAGIC;
1874 if (adapter->wol & E1000_WUFC_LNKC)
1875 wol->wolopts |= WAKE_PHY;
1878 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1880 struct igb_adapter *adapter = netdev_priv(netdev);
1882 if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
1885 if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
1886 return wol->wolopts ? -EOPNOTSUPP : 0;
1888 /* these settings will always override what we currently have */
1891 if (wol->wolopts & WAKE_UCAST)
1892 adapter->wol |= E1000_WUFC_EX;
1893 if (wol->wolopts & WAKE_MCAST)
1894 adapter->wol |= E1000_WUFC_MC;
1895 if (wol->wolopts & WAKE_BCAST)
1896 adapter->wol |= E1000_WUFC_BC;
1897 if (wol->wolopts & WAKE_MAGIC)
1898 adapter->wol |= E1000_WUFC_MAG;
1899 if (wol->wolopts & WAKE_PHY)
1900 adapter->wol |= E1000_WUFC_LNKC;
1901 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1906 /* bit defines for adapter->led_status */
1907 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
1908 static int igb_set_phys_id(struct net_device *netdev,
1909 enum ethtool_phys_id_state state)
1911 struct igb_adapter *adapter = netdev_priv(netdev);
1912 struct e1000_hw *hw = &adapter->hw;
1915 case ETHTOOL_ID_ACTIVE:
1916 e1000_blink_led(hw);
1921 case ETHTOOL_ID_OFF:
1924 case ETHTOOL_ID_INACTIVE:
1926 e1000_cleanup_led(hw);
1933 static int igb_phys_id(struct net_device *netdev, u32 data)
1935 struct igb_adapter *adapter = netdev_priv(netdev);
1936 struct e1000_hw *hw = &adapter->hw;
1937 unsigned long timeout;
1939 timeout = data * 1000;
1942 * msleep_interruptable only accepts unsigned int so we are limited
1943 * in how long a duration we can wait
1945 if (!timeout || timeout > UINT_MAX)
1948 e1000_blink_led(hw);
1949 msleep_interruptible(timeout);
1952 e1000_cleanup_led(hw);
1956 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
1958 static int igb_set_coalesce(struct net_device *netdev,
1959 struct ethtool_coalesce *ec)
1961 struct igb_adapter *adapter = netdev_priv(netdev);
1964 if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1965 ((ec->rx_coalesce_usecs > 3) &&
1966 (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1967 (ec->rx_coalesce_usecs == 2))
1969 printk("set_coalesce:invalid parameter..");
1973 if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1974 ((ec->tx_coalesce_usecs > 3) &&
1975 (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1976 (ec->tx_coalesce_usecs == 2))
1979 if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
1982 if (ec->tx_max_coalesced_frames_irq)
1983 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
1985 /* If ITR is disabled, disable DMAC */
1986 if (ec->rx_coalesce_usecs == 0) {
1987 adapter->dmac = IGB_DMAC_DISABLE;
1990 /* convert to rate of irq's per second */
1991 if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
1992 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
1994 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
1996 /* convert to rate of irq's per second */
1997 if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
1998 adapter->tx_itr_setting = adapter->rx_itr_setting;
1999 else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2000 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2002 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2004 for (i = 0; i < adapter->num_q_vectors; i++) {
2005 struct igb_q_vector *q_vector = adapter->q_vector[i];
2006 q_vector->tx.work_limit = adapter->tx_work_limit;
2007 if (q_vector->rx.ring)
2008 q_vector->itr_val = adapter->rx_itr_setting;
2010 q_vector->itr_val = adapter->tx_itr_setting;
2011 if (q_vector->itr_val && q_vector->itr_val <= 3)
2012 q_vector->itr_val = IGB_START_ITR;
2013 q_vector->set_itr = 1;
2019 static int igb_get_coalesce(struct net_device *netdev,
2020 struct ethtool_coalesce *ec)
2022 struct igb_adapter *adapter = netdev_priv(netdev);
2024 if (adapter->rx_itr_setting <= 3)
2025 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2027 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2029 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2031 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2032 if (adapter->tx_itr_setting <= 3)
2033 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2035 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2041 static int igb_nway_reset(struct net_device *netdev)
2043 struct igb_adapter *adapter = netdev_priv(netdev);
2044 if (netif_running(netdev))
2045 igb_reinit_locked(adapter);
2049 #ifdef HAVE_ETHTOOL_GET_SSET_COUNT
2050 static int igb_get_sset_count(struct net_device *netdev, int sset)
2054 return IGB_STATS_LEN;
2056 return IGB_TEST_LEN;
2062 static int igb_get_stats_count(struct net_device *netdev)
2064 return IGB_STATS_LEN;
2067 static int igb_diag_test_count(struct net_device *netdev)
2069 return IGB_TEST_LEN;
2073 static void igb_get_ethtool_stats(struct net_device *netdev,
2074 struct ethtool_stats *stats, u64 *data)
2076 struct igb_adapter *adapter = netdev_priv(netdev);
2077 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
2078 struct net_device_stats *net_stats = &netdev->stats;
2080 struct net_device_stats *net_stats = &adapter->net_stats;
2086 igb_update_stats(adapter);
2088 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2089 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2090 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2091 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2093 for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2094 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2095 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2096 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2098 for (j = 0; j < adapter->num_tx_queues; j++) {
2099 queue_stat = (u64 *)&adapter->tx_ring[j]->tx_stats;
2100 for (k = 0; k < IGB_TX_QUEUE_STATS_LEN; k++, i++)
2101 data[i] = queue_stat[k];
2103 for (j = 0; j < adapter->num_rx_queues; j++) {
2104 queue_stat = (u64 *)&adapter->rx_ring[j]->rx_stats;
2105 for (k = 0; k < IGB_RX_QUEUE_STATS_LEN; k++, i++)
2106 data[i] = queue_stat[k];
2110 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2112 struct igb_adapter *adapter = netdev_priv(netdev);
2116 switch (stringset) {
2118 memcpy(data, *igb_gstrings_test,
2119 IGB_TEST_LEN*ETH_GSTRING_LEN);
2122 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2123 memcpy(p, igb_gstrings_stats[i].stat_string,
2125 p += ETH_GSTRING_LEN;
2127 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2128 memcpy(p, igb_gstrings_net_stats[i].stat_string,
2130 p += ETH_GSTRING_LEN;
2132 for (i = 0; i < adapter->num_tx_queues; i++) {
2133 sprintf(p, "tx_queue_%u_packets", i);
2134 p += ETH_GSTRING_LEN;
2135 sprintf(p, "tx_queue_%u_bytes", i);
2136 p += ETH_GSTRING_LEN;
2137 sprintf(p, "tx_queue_%u_restart", i);
2138 p += ETH_GSTRING_LEN;
2140 for (i = 0; i < adapter->num_rx_queues; i++) {
2141 sprintf(p, "rx_queue_%u_packets", i);
2142 p += ETH_GSTRING_LEN;
2143 sprintf(p, "rx_queue_%u_bytes", i);
2144 p += ETH_GSTRING_LEN;
2145 sprintf(p, "rx_queue_%u_drops", i);
2146 p += ETH_GSTRING_LEN;
2147 sprintf(p, "rx_queue_%u_csum_err", i);
2148 p += ETH_GSTRING_LEN;
2149 sprintf(p, "rx_queue_%u_alloc_failed", i);
2150 p += ETH_GSTRING_LEN;
2151 sprintf(p, "rx_queue_%u_ipv4_packets", i);
2152 p += ETH_GSTRING_LEN;
2153 sprintf(p, "rx_queue_%u_ipv4e_packets", i);
2154 p += ETH_GSTRING_LEN;
2155 sprintf(p, "rx_queue_%u_ipv6_packets", i);
2156 p += ETH_GSTRING_LEN;
2157 sprintf(p, "rx_queue_%u_ipv6e_packets", i);
2158 p += ETH_GSTRING_LEN;
2159 sprintf(p, "rx_queue_%u_tcp_packets", i);
2160 p += ETH_GSTRING_LEN;
2161 sprintf(p, "rx_queue_%u_udp_packets", i);
2162 p += ETH_GSTRING_LEN;
2163 sprintf(p, "rx_queue_%u_sctp_packets", i);
2164 p += ETH_GSTRING_LEN;
2165 sprintf(p, "rx_queue_%u_nfs_packets", i);
2166 p += ETH_GSTRING_LEN;
2168 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2173 #ifdef HAVE_ETHTOOL_GET_TS_INFO
2174 static int igb_get_ts_info(struct net_device *dev,
2175 struct ethtool_ts_info *info)
2177 struct igb_adapter *adapter = netdev_priv(dev);
2179 switch (adapter->hw.mac.type) {
2180 #ifdef HAVE_PTP_1588_CLOCK
2182 info->so_timestamping =
2183 SOF_TIMESTAMPING_TX_SOFTWARE |
2184 SOF_TIMESTAMPING_RX_SOFTWARE |
2185 SOF_TIMESTAMPING_SOFTWARE;
2193 info->so_timestamping =
2194 SOF_TIMESTAMPING_TX_SOFTWARE |
2195 SOF_TIMESTAMPING_RX_SOFTWARE |
2196 SOF_TIMESTAMPING_SOFTWARE |
2197 SOF_TIMESTAMPING_TX_HARDWARE |
2198 SOF_TIMESTAMPING_RX_HARDWARE |
2199 SOF_TIMESTAMPING_RAW_HARDWARE;
2201 if (adapter->ptp_clock)
2202 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2204 info->phc_index = -1;
2207 (1 << HWTSTAMP_TX_OFF) |
2208 (1 << HWTSTAMP_TX_ON);
2210 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2212 /* 82576 does not support timestamping all packets. */
2213 if (adapter->hw.mac.type >= e1000_82580)
2214 info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2217 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2218 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2219 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2220 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2221 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2222 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2223 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2226 #endif /* HAVE_PTP_1588_CLOCK */
2231 #endif /* HAVE_ETHTOOL_GET_TS_INFO */
2233 #ifdef CONFIG_PM_RUNTIME
2234 static int igb_ethtool_begin(struct net_device *netdev)
2236 struct igb_adapter *adapter = netdev_priv(netdev);
2238 pm_runtime_get_sync(&adapter->pdev->dev);
2243 static void igb_ethtool_complete(struct net_device *netdev)
2245 struct igb_adapter *adapter = netdev_priv(netdev);
2247 pm_runtime_put(&adapter->pdev->dev);
2249 #endif /* CONFIG_PM_RUNTIME */
2251 #ifndef HAVE_NDO_SET_FEATURES
2252 static u32 igb_get_rx_csum(struct net_device *netdev)
2254 return !!(netdev->features & NETIF_F_RXCSUM);
2257 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
2259 const u32 feature_list = NETIF_F_RXCSUM;
2262 netdev->features |= feature_list;
2264 netdev->features &= ~feature_list;
2269 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
2271 struct igb_adapter *adapter = netdev_priv(netdev);
2272 #ifdef NETIF_F_IPV6_CSUM
2273 u32 feature_list = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2275 u32 feature_list = NETIF_F_IP_CSUM;
2278 if (adapter->hw.mac.type >= e1000_82576)
2279 feature_list |= NETIF_F_SCTP_CSUM;
2282 netdev->features |= feature_list;
2284 netdev->features &= ~feature_list;
2290 static int igb_set_tso(struct net_device *netdev, u32 data)
2293 const u32 feature_list = NETIF_F_TSO | NETIF_F_TSO6;
2295 const u32 feature_list = NETIF_F_TSO;
2299 netdev->features |= feature_list;
2301 netdev->features &= ~feature_list;
2303 #ifndef HAVE_NETDEV_VLAN_FEATURES
2305 struct igb_adapter *adapter = netdev_priv(netdev);
2306 struct net_device *v_netdev;
2309 /* disable TSO on all VLANs if they're present */
2310 if (!adapter->vlgrp)
2313 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
2314 v_netdev = vlan_group_get_device(adapter->vlgrp, i);
2318 v_netdev->features &= ~feature_list;
2319 vlan_group_set_device(adapter->vlgrp, i, v_netdev);
2325 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2329 #endif /* NETIF_F_TSO */
2330 #ifdef ETHTOOL_GFLAGS
2331 static int igb_set_flags(struct net_device *netdev, u32 data)
2333 u32 supported_flags = ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN |
2335 #ifndef HAVE_VLAN_RX_REGISTER
2336 u32 changed = netdev->features ^ data;
2341 supported_flags |= ETH_FLAG_LRO;
2344 * Since there is no support for separate tx vlan accel
2345 * enabled make sure tx flag is cleared if rx is.
2347 if (!(data & ETH_FLAG_RXVLAN))
2348 data &= ~ETH_FLAG_TXVLAN;
2350 rc = ethtool_op_set_flags(netdev, data, supported_flags);
2353 #ifndef HAVE_VLAN_RX_REGISTER
2355 if (changed & ETH_FLAG_RXVLAN)
2356 igb_vlan_mode(netdev, data);
2362 #endif /* ETHTOOL_GFLAGS */
2363 #endif /* HAVE_NDO_SET_FEATURES */
2364 #ifdef ETHTOOL_SADV_COAL
2365 static int igb_set_adv_coal(struct net_device *netdev, struct ethtool_value *edata)
2367 struct igb_adapter *adapter = netdev_priv(netdev);
2369 switch (edata->data) {
2370 case IGB_DMAC_DISABLE:
2371 adapter->dmac = edata->data;
2374 adapter->dmac = edata->data;
2377 adapter->dmac = edata->data;
2379 case IGB_DMAC_EN_DEFAULT:
2380 adapter->dmac = edata->data;
2383 adapter->dmac = edata->data;
2386 adapter->dmac = edata->data;
2389 adapter->dmac = edata->data;
2392 adapter->dmac = edata->data;
2395 adapter->dmac = edata->data;
2398 adapter->dmac = edata->data;
2401 adapter->dmac = edata->data;
2404 adapter->dmac = edata->data;
2407 adapter->dmac = edata->data;
2410 adapter->dmac = IGB_DMAC_DISABLE;
2411 printk("set_dmac: invalid setting, setting DMAC to %d\n",
2414 printk("%s: setting DMAC to %d\n", netdev->name, adapter->dmac);
2417 #endif /* ETHTOOL_SADV_COAL */
2418 #ifdef ETHTOOL_GADV_COAL
2419 static void igb_get_dmac(struct net_device *netdev,
2420 struct ethtool_value *edata)
2422 struct igb_adapter *adapter = netdev_priv(netdev);
2423 edata->data = adapter->dmac;
2430 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2432 struct igb_adapter *adapter = netdev_priv(netdev);
2433 struct e1000_hw *hw = &adapter->hw;
2437 if ((hw->mac.type < e1000_i350) ||
2438 (hw->phy.media_type != e1000_media_type_copper))
2441 edata->supported = (SUPPORTED_1000baseT_Full |
2442 SUPPORTED_100baseT_Full);
2444 if (!hw->dev_spec._82575.eee_disable)
2446 mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
2448 /* The IPCNFG and EEER registers are not supported on I354. */
2449 if (hw->mac.type == e1000_i354) {
2450 e1000_get_eee_status_i354(hw, (bool *)&edata->eee_active);
2454 eeer = E1000_READ_REG(hw, E1000_EEER);
2456 /* EEE status on negotiated link */
2457 if (eeer & E1000_EEER_EEE_NEG)
2458 edata->eee_active = true;
2460 if (eeer & E1000_EEER_TX_LPI_EN)
2461 edata->tx_lpi_enabled = true;
2464 /* EEE Link Partner Advertised */
2465 switch (hw->mac.type) {
2467 ret_val = e1000_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
2472 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2478 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
2479 E1000_EEE_LP_ADV_DEV_I210,
2484 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2491 edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
2493 if ((hw->mac.type == e1000_i354) &&
2494 (edata->eee_enabled))
2495 edata->tx_lpi_enabled = true;
2498 * report correct negotiated EEE status for devices that
2499 * wrongly report EEE at half-duplex
2501 if (adapter->link_duplex == HALF_DUPLEX) {
2502 edata->eee_enabled = false;
2503 edata->eee_active = false;
2504 edata->tx_lpi_enabled = false;
2505 edata->advertised &= ~edata->advertised;
2513 static int igb_set_eee(struct net_device *netdev,
2514 struct ethtool_eee *edata)
2516 struct igb_adapter *adapter = netdev_priv(netdev);
2517 struct e1000_hw *hw = &adapter->hw;
2518 struct ethtool_eee eee_curr;
2521 if ((hw->mac.type < e1000_i350) ||
2522 (hw->phy.media_type != e1000_media_type_copper))
2525 ret_val = igb_get_eee(netdev, &eee_curr);
2529 if (eee_curr.eee_enabled) {
2530 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2531 dev_err(pci_dev_to_dev(adapter->pdev),
2532 "Setting EEE tx-lpi is not supported\n");
2536 /* Tx LPI time is not implemented currently */
2537 if (edata->tx_lpi_timer) {
2538 dev_err(pci_dev_to_dev(adapter->pdev),
2539 "Setting EEE Tx LPI timer is not supported\n");
2543 if (edata->advertised &
2544 ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2545 dev_err(pci_dev_to_dev(adapter->pdev),
2546 "EEE Advertisement supports only 100Tx and or 100T full duplex\n");
2550 } else if (!edata->eee_enabled) {
2551 dev_err(pci_dev_to_dev(adapter->pdev),
2552 "Setting EEE options is not supported with EEE disabled\n");
2556 adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2558 if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
2559 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
2562 if (netif_running(netdev))
2563 igb_reinit_locked(adapter);
2570 #endif /* ETHTOOL_SEEE */
2572 #ifdef ETHTOOL_GRXRINGS
2573 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2574 struct ethtool_rxnfc *cmd)
2578 /* Report default options for RSS on igb */
2579 switch (cmd->flow_type) {
2581 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2583 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2584 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2586 case AH_ESP_V4_FLOW:
2590 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2593 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2595 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2596 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2598 case AH_ESP_V6_FLOW:
2602 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2611 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2612 #ifdef HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS
2618 struct igb_adapter *adapter = netdev_priv(dev);
2619 int ret = -EOPNOTSUPP;
2622 case ETHTOOL_GRXRINGS:
2623 cmd->data = adapter->num_rx_queues;
2627 ret = igb_get_rss_hash_opts(adapter, cmd);
2636 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2637 IGB_FLAG_RSS_FIELD_IPV6_UDP)
2638 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2639 struct ethtool_rxnfc *nfc)
2641 u32 flags = adapter->flags;
2644 * RSS does not support anything other than hashing
2645 * to queues on src and dst IPs and ports
2647 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2648 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2651 switch (nfc->flow_type) {
2654 if (!(nfc->data & RXH_IP_SRC) ||
2655 !(nfc->data & RXH_IP_DST) ||
2656 !(nfc->data & RXH_L4_B_0_1) ||
2657 !(nfc->data & RXH_L4_B_2_3))
2661 if (!(nfc->data & RXH_IP_SRC) ||
2662 !(nfc->data & RXH_IP_DST))
2664 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2666 flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2668 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2669 flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2676 if (!(nfc->data & RXH_IP_SRC) ||
2677 !(nfc->data & RXH_IP_DST))
2679 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2681 flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2683 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2684 flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2690 case AH_ESP_V4_FLOW:
2694 case AH_ESP_V6_FLOW:
2698 if (!(nfc->data & RXH_IP_SRC) ||
2699 !(nfc->data & RXH_IP_DST) ||
2700 (nfc->data & RXH_L4_B_0_1) ||
2701 (nfc->data & RXH_L4_B_2_3))
2708 /* if we changed something we need to update flags */
2709 if (flags != adapter->flags) {
2710 struct e1000_hw *hw = &adapter->hw;
2711 u32 mrqc = E1000_READ_REG(hw, E1000_MRQC);
2713 if ((flags & UDP_RSS_FLAGS) &&
2714 !(adapter->flags & UDP_RSS_FLAGS))
2715 DPRINTK(DRV, WARNING,
2716 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2718 adapter->flags = flags;
2720 /* Perform hash on these packet types */
2721 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2722 E1000_MRQC_RSS_FIELD_IPV4_TCP |
2723 E1000_MRQC_RSS_FIELD_IPV6 |
2724 E1000_MRQC_RSS_FIELD_IPV6_TCP;
2726 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2727 E1000_MRQC_RSS_FIELD_IPV6_UDP);
2729 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2730 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2732 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2733 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2735 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
2741 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2743 struct igb_adapter *adapter = netdev_priv(dev);
2744 int ret = -EOPNOTSUPP;
2748 ret = igb_set_rss_hash_opt(adapter, cmd);
2756 #endif /* ETHTOOL_GRXRINGS */
2758 static const struct ethtool_ops igb_ethtool_ops = {
2759 #ifndef ETHTOOL_GLINKSETTINGS
2760 .get_settings = igb_get_settings,
2762 #ifndef ETHTOOL_SLINKSETTINGS
2763 .set_settings = igb_set_settings,
2765 .get_drvinfo = igb_get_drvinfo,
2766 .get_regs_len = igb_get_regs_len,
2767 .get_regs = igb_get_regs,
2768 .get_wol = igb_get_wol,
2769 .set_wol = igb_set_wol,
2770 .get_msglevel = igb_get_msglevel,
2771 .set_msglevel = igb_set_msglevel,
2772 .nway_reset = igb_nway_reset,
2773 .get_link = igb_get_link,
2774 .get_eeprom_len = igb_get_eeprom_len,
2775 .get_eeprom = igb_get_eeprom,
2776 .set_eeprom = igb_set_eeprom,
2777 .get_ringparam = igb_get_ringparam,
2778 .set_ringparam = igb_set_ringparam,
2779 .get_pauseparam = igb_get_pauseparam,
2780 .set_pauseparam = igb_set_pauseparam,
2781 .self_test = igb_diag_test,
2782 .get_strings = igb_get_strings,
2783 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2784 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
2785 .set_phys_id = igb_set_phys_id,
2787 .phys_id = igb_phys_id,
2788 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
2789 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2790 #ifdef HAVE_ETHTOOL_GET_SSET_COUNT
2791 .get_sset_count = igb_get_sset_count,
2793 .get_stats_count = igb_get_stats_count,
2794 .self_test_count = igb_diag_test_count,
2796 .get_ethtool_stats = igb_get_ethtool_stats,
2797 #ifdef HAVE_ETHTOOL_GET_PERM_ADDR
2798 .get_perm_addr = ethtool_op_get_perm_addr,
2800 .get_coalesce = igb_get_coalesce,
2801 .set_coalesce = igb_set_coalesce,
2802 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2803 #ifdef HAVE_ETHTOOL_GET_TS_INFO
2804 .get_ts_info = igb_get_ts_info,
2805 #endif /* HAVE_ETHTOOL_GET_TS_INFO */
2806 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2807 #ifdef CONFIG_PM_RUNTIME
2808 .begin = igb_ethtool_begin,
2809 .complete = igb_ethtool_complete,
2810 #endif /* CONFIG_PM_RUNTIME */
2811 #ifndef HAVE_NDO_SET_FEATURES
2812 .get_rx_csum = igb_get_rx_csum,
2813 .set_rx_csum = igb_set_rx_csum,
2814 .get_tx_csum = ethtool_op_get_tx_csum,
2815 .set_tx_csum = igb_set_tx_csum,
2816 .get_sg = ethtool_op_get_sg,
2817 .set_sg = ethtool_op_set_sg,
2819 .get_tso = ethtool_op_get_tso,
2820 .set_tso = igb_set_tso,
2822 #ifdef ETHTOOL_GFLAGS
2823 .get_flags = ethtool_op_get_flags,
2824 .set_flags = igb_set_flags,
2825 #endif /* ETHTOOL_GFLAGS */
2826 #endif /* HAVE_NDO_SET_FEATURES */
2827 #ifdef ETHTOOL_GADV_COAL
2828 .get_advcoal = igb_get_adv_coal,
2829 .set_advcoal = igb_set_dmac_coal,
2830 #endif /* ETHTOOL_GADV_COAL */
2831 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2833 .get_eee = igb_get_eee,
2836 .set_eee = igb_set_eee,
2838 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2839 #ifdef ETHTOOL_GRXRINGS
2840 .get_rxnfc = igb_get_rxnfc,
2841 .set_rxnfc = igb_set_rxnfc,
2845 #ifdef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2846 static const struct ethtool_ops_ext igb_ethtool_ops_ext = {
2847 .size = sizeof(struct ethtool_ops_ext),
2848 .get_ts_info = igb_get_ts_info,
2849 .set_phys_id = igb_set_phys_id,
2850 .get_eee = igb_get_eee,
2851 .set_eee = igb_set_eee,
2854 void igb_set_ethtool_ops(struct net_device *netdev)
2856 SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2857 set_ethtool_ops_ext(netdev, &igb_ethtool_ops_ext);
2860 void igb_set_ethtool_ops(struct net_device *netdev)
2862 /* have to "undeclare" const on this struct to remove warnings */
2863 SET_ETHTOOL_OPS(netdev, (struct ethtool_ops *)&igb_ethtool_ops);
2865 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2866 #endif /* SIOCETHTOOL */