1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "LICENSE.GPL".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/tcp.h>
36 #include <net/checksum.h>
38 #include <linux/ipv6.h>
39 #include <net/ip6_checksum.h>
43 #include <linux/mii.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #ifdef CONFIG_PM_RUNTIME
50 #include <linux/pm_runtime.h>
51 #endif /* CONFIG_PM_RUNTIME */
53 #include <linux/if_bridge.h>
57 #include <linux/uio_driver.h>
59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
60 #define DRV_DEBUG "_debug"
65 #define VERSION_SUFFIX
70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
72 char igb_driver_name[] = "igb";
73 char igb_driver_version[] = DRV_VERSION;
74 static const char igb_driver_string[] =
75 "Intel(R) Gigabit Ethernet Network Driver";
76 static const char igb_copyright[] =
77 "Copyright (c) 2007-2013 Intel Corporation.";
79 const struct pci_device_id igb_pci_tbl[] = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
115 /* required last entry */
119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
121 void igb_reset(struct igb_adapter *);
122 static int igb_setup_all_tx_resources(struct igb_adapter *);
123 static int igb_setup_all_rx_resources(struct igb_adapter *);
124 static void igb_free_all_tx_resources(struct igb_adapter *);
125 static void igb_free_all_rx_resources(struct igb_adapter *);
126 static void igb_setup_mrqc(struct igb_adapter *);
127 void igb_update_stats(struct igb_adapter *);
128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
129 static void __devexit igb_remove(struct pci_dev *pdev);
130 static int igb_sw_init(struct igb_adapter *);
131 static int igb_open(struct net_device *);
132 static int igb_close(struct net_device *);
133 static void igb_configure(struct igb_adapter *);
134 static void igb_configure_tx(struct igb_adapter *);
135 static void igb_configure_rx(struct igb_adapter *);
136 static void igb_clean_all_tx_rings(struct igb_adapter *);
137 static void igb_clean_all_rx_rings(struct igb_adapter *);
138 static void igb_clean_tx_ring(struct igb_ring *);
139 static void igb_set_rx_mode(struct net_device *);
140 #ifdef HAVE_TIMER_SETUP
141 static void igb_update_phy_info(struct timer_list *);
142 static void igb_watchdog(struct timer_list *);
144 static void igb_update_phy_info(unsigned long);
145 static void igb_watchdog(unsigned long);
147 static void igb_watchdog_task(struct work_struct *);
148 static void igb_dma_err_task(struct work_struct *);
149 #ifdef HAVE_TIMER_SETUP
150 static void igb_dma_err_timer(struct timer_list *);
152 static void igb_dma_err_timer(unsigned long data);
154 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
155 static struct net_device_stats *igb_get_stats(struct net_device *);
156 static int igb_change_mtu(struct net_device *, int);
157 void igb_full_sync_mac_table(struct igb_adapter *adapter);
158 static int igb_set_mac(struct net_device *, void *);
159 static void igb_set_uta(struct igb_adapter *adapter);
160 static irqreturn_t igb_intr(int irq, void *);
161 static irqreturn_t igb_intr_msi(int irq, void *);
162 static irqreturn_t igb_msix_other(int irq, void *);
163 static irqreturn_t igb_msix_ring(int irq, void *);
165 static void igb_update_dca(struct igb_q_vector *);
166 static void igb_setup_dca(struct igb_adapter *);
168 static int igb_poll(struct napi_struct *, int);
169 static bool igb_clean_tx_irq(struct igb_q_vector *);
170 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
171 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
172 static void igb_tx_timeout(struct net_device *);
173 static void igb_reset_task(struct work_struct *);
174 #ifdef HAVE_VLAN_RX_REGISTER
175 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
177 #ifdef HAVE_VLAN_PROTOCOL
178 static int igb_vlan_rx_add_vid(struct net_device *,
180 static int igb_vlan_rx_kill_vid(struct net_device *,
182 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
183 #ifdef NETIF_F_HW_VLAN_CTAG_RX
184 static int igb_vlan_rx_add_vid(struct net_device *,
185 __always_unused __be16 proto, u16);
186 static int igb_vlan_rx_kill_vid(struct net_device *,
187 __always_unused __be16 proto, u16);
189 static int igb_vlan_rx_add_vid(struct net_device *, u16);
190 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
193 static void igb_vlan_rx_add_vid(struct net_device *, u16);
194 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
196 static void igb_restore_vlan(struct igb_adapter *);
197 void igb_rar_set(struct igb_adapter *adapter, u32 index);
198 static void igb_ping_all_vfs(struct igb_adapter *);
199 static void igb_msg_task(struct igb_adapter *);
200 static void igb_vmm_control(struct igb_adapter *);
201 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
202 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
203 static void igb_process_mdd_event(struct igb_adapter *);
205 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
206 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
207 #ifdef HAVE_VF_VLAN_PROTO
208 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
210 int vf, u16 vlan, u8 qos);
212 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
213 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
216 #ifdef HAVE_VF_MIN_MAX_TXRATE
217 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
218 #else /* HAVE_VF_MIN_MAX_TXRATE */
219 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
220 #endif /* HAVE_VF_MIN_MAX_TXRATE */
221 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
222 struct ifla_vf_info *ivi);
223 static void igb_check_vf_rate_limit(struct igb_adapter *);
225 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
227 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
228 static int igb_suspend(struct device *dev);
229 static int igb_resume(struct device *dev);
230 #ifdef CONFIG_PM_RUNTIME
231 static int igb_runtime_suspend(struct device *dev);
232 static int igb_runtime_resume(struct device *dev);
233 static int igb_runtime_idle(struct device *dev);
234 #endif /* CONFIG_PM_RUNTIME */
235 static const struct dev_pm_ops igb_pm_ops = {
236 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
237 .suspend = igb_suspend,
238 .resume = igb_resume,
239 .freeze = igb_suspend,
241 .poweroff = igb_suspend,
242 .restore = igb_resume,
243 #ifdef CONFIG_PM_RUNTIME
244 .runtime_suspend = igb_runtime_suspend,
245 .runtime_resume = igb_runtime_resume,
246 .runtime_idle = igb_runtime_idle,
248 #else /* Linux >= 2.6.34 */
249 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
250 #ifdef CONFIG_PM_RUNTIME
251 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
253 #endif /* CONFIG_PM_RUNTIME */
254 #endif /* Linux version */
257 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
258 static int igb_resume(struct pci_dev *pdev);
259 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
260 #endif /* CONFIG_PM */
261 #ifndef USE_REBOOT_NOTIFIER
262 static void igb_shutdown(struct pci_dev *);
264 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
265 static struct notifier_block igb_notifier_reboot = {
266 .notifier_call = igb_notify_reboot,
272 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
273 static struct notifier_block dca_notifier = {
274 .notifier_call = igb_notify_dca,
279 #ifdef CONFIG_NET_POLL_CONTROLLER
280 /* for netdump / net console */
281 static void igb_netpoll(struct net_device *);
285 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
286 pci_channel_state_t);
287 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
288 static void igb_io_resume(struct pci_dev *);
290 static struct pci_error_handlers igb_err_handler = {
291 .error_detected = igb_io_error_detected,
292 .slot_reset = igb_io_slot_reset,
293 .resume = igb_io_resume,
297 static void igb_init_fw(struct igb_adapter *adapter);
298 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
300 static struct pci_driver igb_driver = {
301 .name = igb_driver_name,
302 .id_table = igb_pci_tbl,
304 .remove = __devexit_p(igb_remove),
306 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
307 .driver.pm = &igb_pm_ops,
309 .suspend = igb_suspend,
310 .resume = igb_resume,
311 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
312 #endif /* CONFIG_PM */
313 #ifndef USE_REBOOT_NOTIFIER
314 .shutdown = igb_shutdown,
317 .err_handler = &igb_err_handler
321 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
322 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
323 //MODULE_LICENSE("GPL");
324 //MODULE_VERSION(DRV_VERSION);
326 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
328 struct e1000_hw *hw = &adapter->hw;
329 struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
330 u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
331 u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
335 * if this is the management vlan the only option is to add it in so
336 * that the management pass through will continue to work
338 if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
339 (vid == mng_cookie->vlan_id))
342 vfta = adapter->shadow_vfta[index];
349 e1000_write_vfta(hw, index, vfta);
350 adapter->shadow_vfta[index] = vfta;
353 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
354 //module_param(debug, int, 0);
355 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
358 * igb_init_module - Driver Registration Routine
360 * igb_init_module is the first routine called when the driver is
361 * loaded. All it does is register with the PCI subsystem.
363 static int __init igb_init_module(void)
367 printk(KERN_INFO "%s - version %s\n",
368 igb_driver_string, igb_driver_version);
370 printk(KERN_INFO "%s\n", igb_copyright);
372 /* only use IGB_PROCFS if IGB_HWMON is not defined */
375 if (igb_procfs_topdir_init())
376 printk(KERN_INFO "Procfs failed to initialize topdir\n");
377 #endif /* IGB_PROCFS */
378 #endif /* IGB_HWMON */
381 dca_register_notify(&dca_notifier);
383 ret = pci_register_driver(&igb_driver);
384 #ifdef USE_REBOOT_NOTIFIER
386 register_reboot_notifier(&igb_notifier_reboot);
393 #define module_init(x) static int x(void) __attribute__((__unused__));
394 module_init(igb_init_module);
397 * igb_exit_module - Driver Exit Cleanup Routine
399 * igb_exit_module is called just before the driver is removed
402 static void __exit igb_exit_module(void)
405 dca_unregister_notify(&dca_notifier);
407 #ifdef USE_REBOOT_NOTIFIER
408 unregister_reboot_notifier(&igb_notifier_reboot);
410 pci_unregister_driver(&igb_driver);
413 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
416 igb_procfs_topdir_exit();
417 #endif /* IGB_PROCFS */
418 #endif /* IGB_HWMON */
422 #define module_exit(x) static void x(void) __attribute__((__unused__));
423 module_exit(igb_exit_module);
425 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
427 * igb_cache_ring_register - Descriptor ring to register mapping
428 * @adapter: board private structure to initialize
430 * Once we know the feature-set enabled for the device, we'll cache
431 * the register offset the descriptor ring is assigned to.
433 static void igb_cache_ring_register(struct igb_adapter *adapter)
436 u32 rbase_offset = adapter->vfs_allocated_count;
438 switch (adapter->hw.mac.type) {
440 /* The queues are allocated for virtualization such that VF 0
441 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
442 * In order to avoid collision we start at the first free queue
443 * and continue consuming queues in the same sequence
445 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
446 for (; i < adapter->rss_queues; i++)
447 adapter->rx_ring[i]->reg_idx = rbase_offset +
457 for (; i < adapter->num_rx_queues; i++)
458 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
459 for (; j < adapter->num_tx_queues; j++)
460 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
465 static void igb_configure_lli(struct igb_adapter *adapter)
467 struct e1000_hw *hw = &adapter->hw;
470 /* LLI should only be enabled for MSI-X or MSI interrupts */
471 if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
474 if (adapter->lli_port) {
475 /* use filter 0 for port */
476 port = htons((u16)adapter->lli_port);
477 E1000_WRITE_REG(hw, E1000_IMIR(0),
478 (port | E1000_IMIR_PORT_IM_EN));
479 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
480 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
483 if (adapter->flags & IGB_FLAG_LLI_PUSH) {
484 /* use filter 1 for push flag */
485 E1000_WRITE_REG(hw, E1000_IMIR(1),
486 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
487 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
488 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
491 if (adapter->lli_size) {
492 /* use filter 2 for size */
493 E1000_WRITE_REG(hw, E1000_IMIR(2),
494 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
495 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
496 (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
502 * igb_write_ivar - configure ivar for given MSI-X vector
503 * @hw: pointer to the HW structure
504 * @msix_vector: vector number we are allocating to a given ring
505 * @index: row index of IVAR register to write within IVAR table
506 * @offset: column offset of in IVAR, should be multiple of 8
508 * This function is intended to handle the writing of the IVAR register
509 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
510 * each containing an cause allocation for an Rx and Tx ring, and a
511 * variable number of rows depending on the number of queues supported.
513 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
514 int index, int offset)
516 u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
518 /* clear any bits that are currently set */
519 ivar &= ~((u32)0xFF << offset);
521 /* write vector and valid bit */
522 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
524 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
527 #define IGB_N0_QUEUE -1
528 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
530 struct igb_adapter *adapter = q_vector->adapter;
531 struct e1000_hw *hw = &adapter->hw;
532 int rx_queue = IGB_N0_QUEUE;
533 int tx_queue = IGB_N0_QUEUE;
536 if (q_vector->rx.ring)
537 rx_queue = q_vector->rx.ring->reg_idx;
538 if (q_vector->tx.ring)
539 tx_queue = q_vector->tx.ring->reg_idx;
541 switch (hw->mac.type) {
543 /* The 82575 assigns vectors using a bitmask, which matches the
544 bitmask for the EICR/EIMS/EIMC registers. To assign one
545 or more queues to a vector, we write the appropriate bits
546 into the MSIXBM register for that vector. */
547 if (rx_queue > IGB_N0_QUEUE)
548 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
549 if (tx_queue > IGB_N0_QUEUE)
550 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
551 if (!adapter->msix_entries && msix_vector == 0)
552 msixbm |= E1000_EIMS_OTHER;
553 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
554 q_vector->eims_value = msixbm;
558 * 82576 uses a table that essentially consists of 2 columns
559 * with 8 rows. The ordering is column-major so we use the
560 * lower 3 bits as the row index, and the 4th bit as the
563 if (rx_queue > IGB_N0_QUEUE)
564 igb_write_ivar(hw, msix_vector,
566 (rx_queue & 0x8) << 1);
567 if (tx_queue > IGB_N0_QUEUE)
568 igb_write_ivar(hw, msix_vector,
570 ((tx_queue & 0x8) << 1) + 8);
571 q_vector->eims_value = 1 << msix_vector;
579 * On 82580 and newer adapters the scheme is similar to 82576
580 * however instead of ordering column-major we have things
581 * ordered row-major. So we traverse the table by using
582 * bit 0 as the column offset, and the remaining bits as the
585 if (rx_queue > IGB_N0_QUEUE)
586 igb_write_ivar(hw, msix_vector,
588 (rx_queue & 0x1) << 4);
589 if (tx_queue > IGB_N0_QUEUE)
590 igb_write_ivar(hw, msix_vector,
592 ((tx_queue & 0x1) << 4) + 8);
593 q_vector->eims_value = 1 << msix_vector;
600 /* add q_vector eims value to global eims_enable_mask */
601 adapter->eims_enable_mask |= q_vector->eims_value;
603 /* configure q_vector to set itr on first interrupt */
604 q_vector->set_itr = 1;
608 * igb_configure_msix - Configure MSI-X hardware
610 * igb_configure_msix sets up the hardware to properly
611 * generate MSI-X interrupts.
613 static void igb_configure_msix(struct igb_adapter *adapter)
617 struct e1000_hw *hw = &adapter->hw;
619 adapter->eims_enable_mask = 0;
621 /* set vector for other causes, i.e. link changes */
622 switch (hw->mac.type) {
624 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
625 /* enable MSI-X PBA support*/
626 tmp |= E1000_CTRL_EXT_PBA_CLR;
628 /* Auto-Mask interrupts upon ICR read. */
629 tmp |= E1000_CTRL_EXT_EIAME;
630 tmp |= E1000_CTRL_EXT_IRCA;
632 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
634 /* enable msix_other interrupt */
635 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
637 adapter->eims_other = E1000_EIMS_OTHER;
647 /* Turn on MSI-X capability first, or our settings
648 * won't stick. And it will take days to debug. */
649 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
650 E1000_GPIE_PBA | E1000_GPIE_EIAME |
653 /* enable msix_other interrupt */
654 adapter->eims_other = 1 << vector;
655 tmp = (vector++ | E1000_IVAR_VALID) << 8;
657 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
660 /* do nothing, since nothing else supports MSI-X */
662 } /* switch (hw->mac.type) */
664 adapter->eims_enable_mask |= adapter->eims_other;
666 for (i = 0; i < adapter->num_q_vectors; i++)
667 igb_assign_vector(adapter->q_vector[i], vector++);
669 E1000_WRITE_FLUSH(hw);
673 * igb_request_msix - Initialize MSI-X interrupts
675 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
678 static int igb_request_msix(struct igb_adapter *adapter)
680 struct net_device *netdev = adapter->netdev;
681 struct e1000_hw *hw = &adapter->hw;
682 int i, err = 0, vector = 0, free_vector = 0;
684 err = request_irq(adapter->msix_entries[vector].vector,
685 &igb_msix_other, 0, netdev->name, adapter);
689 for (i = 0; i < adapter->num_q_vectors; i++) {
690 struct igb_q_vector *q_vector = adapter->q_vector[i];
694 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
696 if (q_vector->rx.ring && q_vector->tx.ring)
697 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
698 q_vector->rx.ring->queue_index);
699 else if (q_vector->tx.ring)
700 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
701 q_vector->tx.ring->queue_index);
702 else if (q_vector->rx.ring)
703 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
704 q_vector->rx.ring->queue_index);
706 sprintf(q_vector->name, "%s-unused", netdev->name);
708 err = request_irq(adapter->msix_entries[vector].vector,
709 igb_msix_ring, 0, q_vector->name,
715 igb_configure_msix(adapter);
719 /* free already assigned IRQs */
720 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
723 for (i = 0; i < vector; i++) {
724 free_irq(adapter->msix_entries[free_vector++].vector,
725 adapter->q_vector[i]);
731 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
733 if (adapter->msix_entries) {
734 pci_disable_msix(adapter->pdev);
735 kfree(adapter->msix_entries);
736 adapter->msix_entries = NULL;
737 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
738 pci_disable_msi(adapter->pdev);
743 * igb_free_q_vector - Free memory allocated for specific interrupt vector
744 * @adapter: board private structure to initialize
745 * @v_idx: Index of vector to be freed
747 * This function frees the memory allocated to the q_vector. In addition if
748 * NAPI is enabled it will delete any references to the NAPI struct prior
749 * to freeing the q_vector.
751 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
753 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
755 if (q_vector->tx.ring)
756 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
758 if (q_vector->rx.ring)
759 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
761 adapter->q_vector[v_idx] = NULL;
762 netif_napi_del(&q_vector->napi);
764 __skb_queue_purge(&q_vector->lrolist.active);
770 * igb_free_q_vectors - Free memory allocated for interrupt vectors
771 * @adapter: board private structure to initialize
773 * This function frees the memory allocated to the q_vectors. In addition if
774 * NAPI is enabled it will delete any references to the NAPI struct prior
775 * to freeing the q_vector.
777 static void igb_free_q_vectors(struct igb_adapter *adapter)
779 int v_idx = adapter->num_q_vectors;
781 adapter->num_tx_queues = 0;
782 adapter->num_rx_queues = 0;
783 adapter->num_q_vectors = 0;
786 igb_free_q_vector(adapter, v_idx);
790 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
792 * This function resets the device so that it has 0 rx queues, tx queues, and
793 * MSI-X interrupts allocated.
795 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
797 igb_free_q_vectors(adapter);
798 igb_reset_interrupt_capability(adapter);
802 * igb_process_mdd_event
803 * @adapter - board private structure
805 * Identify a malicious VF, disable the VF TX/RX queues and log a message.
807 static void igb_process_mdd_event(struct igb_adapter *adapter)
809 struct e1000_hw *hw = &adapter->hw;
810 u32 lvmmc, vfte, vfre, mdfb;
813 lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
814 vf_queue = lvmmc >> 29;
816 /* VF index cannot be bigger or equal to VFs allocated */
817 if (vf_queue >= adapter->vfs_allocated_count)
820 netdev_info(adapter->netdev,
821 "VF %d misbehaved. VF queues are disabled. "
822 "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
824 /* Disable VFTE and VFRE related bits */
825 vfte = E1000_READ_REG(hw, E1000_VFTE);
826 vfte &= ~(1 << vf_queue);
827 E1000_WRITE_REG(hw, E1000_VFTE, vfte);
829 vfre = E1000_READ_REG(hw, E1000_VFRE);
830 vfre &= ~(1 << vf_queue);
831 E1000_WRITE_REG(hw, E1000_VFRE, vfre);
833 /* Disable MDFB related bit. Clear on write */
834 mdfb = E1000_READ_REG(hw, E1000_MDFB);
835 mdfb |= (1 << vf_queue);
836 E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
838 /* Reset the specific VF */
839 E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
844 * @adapter - board private structure
846 * Disable MDD behavior in the HW
848 static void igb_disable_mdd(struct igb_adapter *adapter)
850 struct e1000_hw *hw = &adapter->hw;
853 if ((hw->mac.type != e1000_i350) ||
854 (hw->mac.type != e1000_i354))
857 reg = E1000_READ_REG(hw, E1000_DTXCTL);
858 reg &= (~E1000_DTXCTL_MDP_EN);
859 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
864 * @adapter - board private structure
866 * Enable the HW to detect malicious driver and sends an interrupt to
869 static void igb_enable_mdd(struct igb_adapter *adapter)
871 struct e1000_hw *hw = &adapter->hw;
874 /* Only available on i350 device */
875 if (hw->mac.type != e1000_i350)
878 reg = E1000_READ_REG(hw, E1000_DTXCTL);
879 reg |= E1000_DTXCTL_MDP_EN;
880 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
884 * igb_reset_sriov_capability - disable SR-IOV if enabled
886 * Attempt to disable single root IO virtualization capabilites present in the
889 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
891 struct pci_dev *pdev = adapter->pdev;
892 struct e1000_hw *hw = &adapter->hw;
894 /* reclaim resources allocated to VFs */
895 if (adapter->vf_data) {
896 if (!pci_vfs_assigned(pdev)) {
898 * disable iov and allow time for transactions to
901 pci_disable_sriov(pdev);
904 dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
906 dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
907 "VF(s) are assigned to guests!\n");
909 /* Disable Malicious Driver Detection */
910 igb_disable_mdd(adapter);
912 /* free vf data storage */
913 kfree(adapter->vf_data);
914 adapter->vf_data = NULL;
916 /* switch rings back to PF ownership */
917 E1000_WRITE_REG(hw, E1000_IOVCTL,
918 E1000_IOVCTL_REUSE_VFQ);
919 E1000_WRITE_FLUSH(hw);
923 adapter->vfs_allocated_count = 0;
927 * igb_set_sriov_capability - setup SR-IOV if supported
929 * Attempt to enable single root IO virtualization capabilites present in the
932 static void igb_set_sriov_capability(struct igb_adapter *adapter)
934 struct pci_dev *pdev = adapter->pdev;
938 old_vfs = pci_num_vf(pdev);
940 dev_info(pci_dev_to_dev(pdev),
941 "%d pre-allocated VFs found - override "
942 "max_vfs setting of %d\n", old_vfs,
943 adapter->vfs_allocated_count);
944 adapter->vfs_allocated_count = old_vfs;
946 /* no VFs requested, do nothing */
947 if (!adapter->vfs_allocated_count)
950 /* allocate vf data storage */
951 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
952 sizeof(struct vf_data_storage),
955 if (adapter->vf_data) {
957 if (pci_enable_sriov(pdev,
958 adapter->vfs_allocated_count))
961 for (i = 0; i < adapter->vfs_allocated_count; i++)
962 igb_vf_configure(adapter, i);
964 switch (adapter->hw.mac.type) {
967 /* Enable VM to VM loopback by default */
968 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
971 /* Currently no other hardware supports loopback */
975 /* DMA Coalescing is not supported in IOV mode. */
976 if (adapter->hw.mac.type >= e1000_i350)
977 adapter->dmac = IGB_DMAC_DISABLE;
978 if (adapter->hw.mac.type < e1000_i350)
979 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
985 kfree(adapter->vf_data);
986 adapter->vf_data = NULL;
987 adapter->vfs_allocated_count = 0;
988 dev_warn(pci_dev_to_dev(pdev),
989 "Failed to initialize SR-IOV virtualization\n");
993 * igb_set_interrupt_capability - set MSI or MSI-X if supported
995 * Attempt to configure interrupts using the best available
996 * capabilities of the hardware and kernel.
998 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1000 struct pci_dev *pdev = adapter->pdev;
1005 adapter->int_mode = IGB_INT_MODE_MSI;
1007 /* Number of supported queues. */
1008 adapter->num_rx_queues = adapter->rss_queues;
1010 if (adapter->vmdq_pools > 1)
1011 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1014 if (adapter->vmdq_pools)
1015 adapter->num_tx_queues = adapter->vmdq_pools;
1017 adapter->num_tx_queues = adapter->num_rx_queues;
1019 adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1022 switch (adapter->int_mode) {
1023 case IGB_INT_MODE_MSIX:
1024 /* start with one vector for every rx queue */
1025 numvecs = adapter->num_rx_queues;
1027 /* if tx handler is separate add 1 for every tx queue */
1028 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1029 numvecs += adapter->num_tx_queues;
1031 /* store the number of vectors reserved for queues */
1032 adapter->num_q_vectors = numvecs;
1034 /* add 1 vector for link status interrupts */
1036 adapter->msix_entries = kcalloc(numvecs,
1037 sizeof(struct msix_entry),
1039 if (adapter->msix_entries) {
1040 for (i = 0; i < numvecs; i++)
1041 adapter->msix_entries[i].entry = i;
1043 #ifdef HAVE_PCI_ENABLE_MSIX
1044 err = pci_enable_msix(pdev,
1045 adapter->msix_entries, numvecs);
1047 err = pci_enable_msix_range(pdev,
1048 adapter->msix_entries,
1055 /* MSI-X failed, so fall through and try MSI */
1056 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1057 "Falling back to MSI interrupts.\n");
1058 igb_reset_interrupt_capability(adapter);
1059 case IGB_INT_MODE_MSI:
1060 if (!pci_enable_msi(pdev))
1061 adapter->flags |= IGB_FLAG_HAS_MSI;
1063 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1064 "interrupts. Falling back to legacy "
1067 case IGB_INT_MODE_LEGACY:
1068 /* disable advanced features and set number of queues to 1 */
1069 igb_reset_sriov_capability(adapter);
1070 adapter->vmdq_pools = 0;
1071 adapter->rss_queues = 1;
1072 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1073 adapter->num_rx_queues = 1;
1074 adapter->num_tx_queues = 1;
1075 adapter->num_q_vectors = 1;
1076 /* Don't do anything; this is system default */
1081 static void igb_add_ring(struct igb_ring *ring,
1082 struct igb_ring_container *head)
1089 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1090 * @adapter: board private structure to initialize
1091 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1092 * @v_idx: index of vector in adapter struct
1093 * @txr_count: total number of Tx rings to allocate
1094 * @txr_idx: index of first Tx ring to allocate
1095 * @rxr_count: total number of Rx rings to allocate
1096 * @rxr_idx: index of first Rx ring to allocate
1098 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1100 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1101 unsigned int v_count, unsigned int v_idx,
1102 unsigned int txr_count, unsigned int txr_idx,
1103 unsigned int rxr_count, unsigned int rxr_idx)
1105 struct igb_q_vector *q_vector;
1106 struct igb_ring *ring;
1107 int ring_count, size;
1109 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1110 if (txr_count > 1 || rxr_count > 1)
1113 ring_count = txr_count + rxr_count;
1114 size = sizeof(struct igb_q_vector) +
1115 (sizeof(struct igb_ring) * ring_count);
1117 /* allocate q_vector and rings */
1118 q_vector = kzalloc(size, GFP_KERNEL);
1123 /* initialize LRO */
1124 __skb_queue_head_init(&q_vector->lrolist.active);
1127 /* initialize NAPI */
1128 netif_napi_add(adapter->netdev, &q_vector->napi,
1131 /* tie q_vector and adapter together */
1132 adapter->q_vector[v_idx] = q_vector;
1133 q_vector->adapter = adapter;
1135 /* initialize work limits */
1136 q_vector->tx.work_limit = adapter->tx_work_limit;
1138 /* initialize ITR configuration */
1139 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1140 q_vector->itr_val = IGB_START_ITR;
1142 /* initialize pointer to rings */
1143 ring = q_vector->ring;
1145 /* initialize ITR */
1147 /* rx or rx/tx vector */
1148 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1149 q_vector->itr_val = adapter->rx_itr_setting;
1151 /* tx only vector */
1152 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1153 q_vector->itr_val = adapter->tx_itr_setting;
1157 /* assign generic ring traits */
1158 ring->dev = &adapter->pdev->dev;
1159 ring->netdev = adapter->netdev;
1161 /* configure backlink on ring */
1162 ring->q_vector = q_vector;
1164 /* update q_vector Tx values */
1165 igb_add_ring(ring, &q_vector->tx);
1167 /* For 82575, context index must be unique per ring. */
1168 if (adapter->hw.mac.type == e1000_82575)
1169 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1171 /* apply Tx specific ring traits */
1172 ring->count = adapter->tx_ring_count;
1173 ring->queue_index = txr_idx;
1175 /* assign ring to adapter */
1176 adapter->tx_ring[txr_idx] = ring;
1178 /* push pointer to next ring */
1183 /* assign generic ring traits */
1184 ring->dev = &adapter->pdev->dev;
1185 ring->netdev = adapter->netdev;
1187 /* configure backlink on ring */
1188 ring->q_vector = q_vector;
1190 /* update q_vector Rx values */
1191 igb_add_ring(ring, &q_vector->rx);
1193 #ifndef HAVE_NDO_SET_FEATURES
1194 /* enable rx checksum */
1195 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1198 /* set flag indicating ring supports SCTP checksum offload */
1199 if (adapter->hw.mac.type >= e1000_82576)
1200 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1202 if ((adapter->hw.mac.type == e1000_i350) ||
1203 (adapter->hw.mac.type == e1000_i354))
1204 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1206 /* apply Rx specific ring traits */
1207 ring->count = adapter->rx_ring_count;
1208 ring->queue_index = rxr_idx;
1210 /* assign ring to adapter */
1211 adapter->rx_ring[rxr_idx] = ring;
1218 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1219 * @adapter: board private structure to initialize
1221 * We allocate one q_vector per queue interrupt. If allocation fails we
1224 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1226 int q_vectors = adapter->num_q_vectors;
1227 int rxr_remaining = adapter->num_rx_queues;
1228 int txr_remaining = adapter->num_tx_queues;
1229 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1232 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1233 for (; rxr_remaining; v_idx++) {
1234 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1240 /* update counts and index */
1246 for (; v_idx < q_vectors; v_idx++) {
1247 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1248 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1249 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1250 tqpv, txr_idx, rqpv, rxr_idx);
1255 /* update counts and index */
1256 rxr_remaining -= rqpv;
1257 txr_remaining -= tqpv;
1265 adapter->num_tx_queues = 0;
1266 adapter->num_rx_queues = 0;
1267 adapter->num_q_vectors = 0;
1270 igb_free_q_vector(adapter, v_idx);
1276 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1278 * This function initializes the interrupts and allocates all of the queues.
1280 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1282 struct pci_dev *pdev = adapter->pdev;
1285 igb_set_interrupt_capability(adapter, msix);
1287 err = igb_alloc_q_vectors(adapter);
1289 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1290 goto err_alloc_q_vectors;
1293 igb_cache_ring_register(adapter);
1297 err_alloc_q_vectors:
1298 igb_reset_interrupt_capability(adapter);
1303 * igb_request_irq - initialize interrupts
1305 * Attempts to configure interrupts using the best available
1306 * capabilities of the hardware and kernel.
1308 static int igb_request_irq(struct igb_adapter *adapter)
1310 struct net_device *netdev = adapter->netdev;
1311 struct pci_dev *pdev = adapter->pdev;
1314 if (adapter->msix_entries) {
1315 err = igb_request_msix(adapter);
1318 /* fall back to MSI */
1319 igb_free_all_tx_resources(adapter);
1320 igb_free_all_rx_resources(adapter);
1322 igb_clear_interrupt_scheme(adapter);
1323 igb_reset_sriov_capability(adapter);
1324 err = igb_init_interrupt_scheme(adapter, false);
1327 igb_setup_all_tx_resources(adapter);
1328 igb_setup_all_rx_resources(adapter);
1329 igb_configure(adapter);
1332 igb_assign_vector(adapter->q_vector[0], 0);
1334 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1335 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1336 netdev->name, adapter);
1340 /* fall back to legacy interrupts */
1341 igb_reset_interrupt_capability(adapter);
1342 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1345 err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1346 netdev->name, adapter);
1349 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1356 static void igb_free_irq(struct igb_adapter *adapter)
1358 if (adapter->msix_entries) {
1361 free_irq(adapter->msix_entries[vector++].vector, adapter);
1363 for (i = 0; i < adapter->num_q_vectors; i++)
1364 free_irq(adapter->msix_entries[vector++].vector,
1365 adapter->q_vector[i]);
1367 free_irq(adapter->pdev->irq, adapter);
1372 * igb_irq_disable - Mask off interrupt generation on the NIC
1373 * @adapter: board private structure
1375 static void igb_irq_disable(struct igb_adapter *adapter)
1377 struct e1000_hw *hw = &adapter->hw;
1380 * we need to be careful when disabling interrupts. The VFs are also
1381 * mapped into these registers and so clearing the bits can cause
1382 * issues on the VF drivers so we only need to clear what we set
1384 if (adapter->msix_entries) {
1385 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1386 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1387 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1388 regval = E1000_READ_REG(hw, E1000_EIAC);
1389 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1392 E1000_WRITE_REG(hw, E1000_IAM, 0);
1393 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1394 E1000_WRITE_FLUSH(hw);
1396 if (adapter->msix_entries) {
1399 synchronize_irq(adapter->msix_entries[vector++].vector);
1401 for (i = 0; i < adapter->num_q_vectors; i++)
1402 synchronize_irq(adapter->msix_entries[vector++].vector);
1404 synchronize_irq(adapter->pdev->irq);
1409 * igb_irq_enable - Enable default interrupt generation settings
1410 * @adapter: board private structure
1412 static void igb_irq_enable(struct igb_adapter *adapter)
1414 struct e1000_hw *hw = &adapter->hw;
1416 if (adapter->msix_entries) {
1417 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1418 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1419 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1420 regval = E1000_READ_REG(hw, E1000_EIAM);
1421 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1422 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1423 if (adapter->vfs_allocated_count) {
1424 E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1425 ims |= E1000_IMS_VMMB;
1427 if ((adapter->hw.mac.type == e1000_i350) ||
1428 (adapter->hw.mac.type == e1000_i354))
1429 ims |= E1000_IMS_MDDET;
1431 E1000_WRITE_REG(hw, E1000_IMS, ims);
1433 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1435 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1440 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1442 struct e1000_hw *hw = &adapter->hw;
1443 u16 vid = adapter->hw.mng_cookie.vlan_id;
1444 u16 old_vid = adapter->mng_vlan_id;
1446 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1447 /* add VID to filter table */
1448 igb_vfta_set(adapter, vid, TRUE);
1449 adapter->mng_vlan_id = vid;
1451 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1454 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1456 #ifdef HAVE_VLAN_RX_REGISTER
1457 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1459 !test_bit(old_vid, adapter->active_vlans)) {
1461 /* remove VID from filter table */
1462 igb_vfta_set(adapter, old_vid, FALSE);
1467 * igb_release_hw_control - release control of the h/w to f/w
1468 * @adapter: address of board private structure
1470 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1471 * For ASF and Pass Through versions of f/w this means that the
1472 * driver is no longer loaded.
1475 static void igb_release_hw_control(struct igb_adapter *adapter)
1477 struct e1000_hw *hw = &adapter->hw;
1480 /* Let firmware take over control of h/w */
1481 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1487 * igb_get_hw_control - get control of the h/w from f/w
1488 * @adapter: address of board private structure
1490 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1491 * For ASF and Pass Through versions of f/w this means that
1492 * the driver is loaded.
1495 static void igb_get_hw_control(struct igb_adapter *adapter)
1497 struct e1000_hw *hw = &adapter->hw;
1500 /* Let firmware know the driver has taken over */
1501 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1502 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1503 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1507 * igb_configure - configure the hardware for RX and TX
1508 * @adapter: private board structure
1510 static void igb_configure(struct igb_adapter *adapter)
1512 struct net_device *netdev = adapter->netdev;
1515 igb_get_hw_control(adapter);
1516 igb_set_rx_mode(netdev);
1518 igb_restore_vlan(adapter);
1520 igb_setup_tctl(adapter);
1521 igb_setup_mrqc(adapter);
1522 igb_setup_rctl(adapter);
1524 igb_configure_tx(adapter);
1525 igb_configure_rx(adapter);
1527 e1000_rx_fifo_flush_82575(&adapter->hw);
1528 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1529 if (adapter->num_tx_queues > 1)
1530 netdev->features |= NETIF_F_MULTI_QUEUE;
1532 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1535 /* call igb_desc_unused which always leaves
1536 * at least 1 descriptor unused to make sure
1537 * next_to_use != next_to_clean */
1538 for (i = 0; i < adapter->num_rx_queues; i++) {
1539 struct igb_ring *ring = adapter->rx_ring[i];
1540 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1545 * igb_power_up_link - Power up the phy/serdes link
1546 * @adapter: address of board private structure
1548 void igb_power_up_link(struct igb_adapter *adapter)
1550 e1000_phy_hw_reset(&adapter->hw);
1552 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1553 e1000_power_up_phy(&adapter->hw);
1555 e1000_power_up_fiber_serdes_link(&adapter->hw);
1559 * igb_power_down_link - Power down the phy/serdes link
1560 * @adapter: address of board private structure
1562 static void igb_power_down_link(struct igb_adapter *adapter)
1564 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1565 e1000_power_down_phy(&adapter->hw);
1567 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1570 /* Detect and switch function for Media Auto Sense */
1571 static void igb_check_swap_media(struct igb_adapter *adapter)
1573 struct e1000_hw *hw = &adapter->hw;
1574 u32 ctrl_ext, connsw;
1575 bool swap_now = false;
1578 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1579 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1580 link = igb_has_link(adapter);
1583 /* need to live swap if current media is copper and we have fiber/serdes
1587 if ((hw->phy.media_type == e1000_media_type_copper) &&
1588 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1590 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1591 /* copper signal takes time to appear */
1592 if (adapter->copper_tries < 2) {
1593 adapter->copper_tries++;
1594 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1595 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1598 adapter->copper_tries = 0;
1599 if ((connsw & E1000_CONNSW_PHYSD) &&
1600 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1602 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1603 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1609 switch (hw->phy.media_type) {
1610 case e1000_media_type_copper:
1611 dev_info(pci_dev_to_dev(adapter->pdev),
1612 "%s:MAS: changing media to fiber/serdes\n",
1613 adapter->netdev->name);
1615 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1616 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1617 adapter->copper_tries = 0;
1619 case e1000_media_type_internal_serdes:
1620 case e1000_media_type_fiber:
1621 dev_info(pci_dev_to_dev(adapter->pdev),
1622 "%s:MAS: changing media to copper\n",
1623 adapter->netdev->name);
1625 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1626 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1629 /* shouldn't get here during regular operation */
1630 dev_err(pci_dev_to_dev(adapter->pdev),
1631 "%s:AMS: Invalid media type found, returning\n",
1632 adapter->netdev->name);
1635 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1639 #ifdef HAVE_I2C_SUPPORT
1640 /* igb_get_i2c_data - Reads the I2C SDA data bit
1641 * @hw: pointer to hardware structure
1642 * @i2cctl: Current value of I2CCTL register
1644 * Returns the I2C data bit value
1646 static int igb_get_i2c_data(void *data)
1648 struct igb_adapter *adapter = data;
1649 struct e1000_hw *hw = &adapter->hw;
1650 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1652 return (i2cctl & E1000_I2C_DATA_IN) != 0;
1655 /* igb_set_i2c_data - Sets the I2C data bit
1656 * @data: pointer to hardware structure
1657 * @state: I2C data value (0 or 1) to set
1659 * Sets the I2C data bit
1661 static void igb_set_i2c_data(void *data, int state)
1663 struct igb_adapter *adapter = data;
1664 struct e1000_hw *hw = &adapter->hw;
1665 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1668 i2cctl |= E1000_I2C_DATA_OUT;
1670 i2cctl &= ~E1000_I2C_DATA_OUT;
1672 i2cctl &= ~E1000_I2C_DATA_OE_N;
1673 i2cctl |= E1000_I2C_CLK_OE_N;
1675 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1676 E1000_WRITE_FLUSH(hw);
1680 /* igb_set_i2c_clk - Sets the I2C SCL clock
1681 * @data: pointer to hardware structure
1682 * @state: state to set clock
1684 * Sets the I2C clock line to state
1686 static void igb_set_i2c_clk(void *data, int state)
1688 struct igb_adapter *adapter = data;
1689 struct e1000_hw *hw = &adapter->hw;
1690 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1693 i2cctl |= E1000_I2C_CLK_OUT;
1694 i2cctl &= ~E1000_I2C_CLK_OE_N;
1696 i2cctl &= ~E1000_I2C_CLK_OUT;
1697 i2cctl &= ~E1000_I2C_CLK_OE_N;
1699 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1700 E1000_WRITE_FLUSH(hw);
1703 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1704 * @data: pointer to hardware structure
1706 * Gets the I2C clock state
1708 static int igb_get_i2c_clk(void *data)
1710 struct igb_adapter *adapter = data;
1711 struct e1000_hw *hw = &adapter->hw;
1712 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1714 return (i2cctl & E1000_I2C_CLK_IN) != 0;
1717 static const struct i2c_algo_bit_data igb_i2c_algo = {
1718 .setsda = igb_set_i2c_data,
1719 .setscl = igb_set_i2c_clk,
1720 .getsda = igb_get_i2c_data,
1721 .getscl = igb_get_i2c_clk,
1726 /* igb_init_i2c - Init I2C interface
1727 * @adapter: pointer to adapter structure
1730 static s32 igb_init_i2c(struct igb_adapter *adapter)
1732 s32 status = E1000_SUCCESS;
1734 /* I2C interface supported on i350 devices */
1735 if (adapter->hw.mac.type != e1000_i350)
1736 return E1000_SUCCESS;
1738 /* Initialize the i2c bus which is controlled by the registers.
1739 * This bus will use the i2c_algo_bit structue that implements
1740 * the protocol through toggling of the 4 bits in the register.
1742 adapter->i2c_adap.owner = THIS_MODULE;
1743 adapter->i2c_algo = igb_i2c_algo;
1744 adapter->i2c_algo.data = adapter;
1745 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1746 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1747 strlcpy(adapter->i2c_adap.name, "igb BB",
1748 sizeof(adapter->i2c_adap.name));
1749 status = i2c_bit_add_bus(&adapter->i2c_adap);
1753 #endif /* HAVE_I2C_SUPPORT */
1755 * igb_up - Open the interface and prepare it to handle traffic
1756 * @adapter: board private structure
1758 int igb_up(struct igb_adapter *adapter)
1760 struct e1000_hw *hw = &adapter->hw;
1763 /* hardware has been reset, we need to reload some things */
1764 igb_configure(adapter);
1766 clear_bit(__IGB_DOWN, &adapter->state);
1768 for (i = 0; i < adapter->num_q_vectors; i++)
1769 napi_enable(&(adapter->q_vector[i]->napi));
1771 if (adapter->msix_entries)
1772 igb_configure_msix(adapter);
1774 igb_assign_vector(adapter->q_vector[0], 0);
1776 igb_configure_lli(adapter);
1778 /* Clear any pending interrupts. */
1779 E1000_READ_REG(hw, E1000_ICR);
1780 igb_irq_enable(adapter);
1782 /* notify VFs that reset has been completed */
1783 if (adapter->vfs_allocated_count) {
1784 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1785 reg_data |= E1000_CTRL_EXT_PFRSTD;
1786 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1789 netif_tx_start_all_queues(adapter->netdev);
1791 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1792 schedule_work(&adapter->dma_err_task);
1793 /* start the watchdog. */
1794 hw->mac.get_link_status = 1;
1795 schedule_work(&adapter->watchdog_task);
1797 if ((adapter->flags & IGB_FLAG_EEE) &&
1798 (!hw->dev_spec._82575.eee_disable))
1799 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1804 void igb_down(struct igb_adapter *adapter)
1806 struct net_device *netdev = adapter->netdev;
1807 struct e1000_hw *hw = &adapter->hw;
1811 /* signal that we're down so the interrupt handler does not
1812 * reschedule our watchdog timer */
1813 set_bit(__IGB_DOWN, &adapter->state);
1815 /* disable receives in the hardware */
1816 rctl = E1000_READ_REG(hw, E1000_RCTL);
1817 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1818 /* flush and sleep below */
1820 netif_tx_stop_all_queues(netdev);
1822 /* disable transmits in the hardware */
1823 tctl = E1000_READ_REG(hw, E1000_TCTL);
1824 tctl &= ~E1000_TCTL_EN;
1825 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1826 /* flush both disables and wait for them to finish */
1827 E1000_WRITE_FLUSH(hw);
1828 usleep_range(10000, 20000);
1830 for (i = 0; i < adapter->num_q_vectors; i++)
1831 napi_disable(&(adapter->q_vector[i]->napi));
1833 igb_irq_disable(adapter);
1835 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1837 del_timer_sync(&adapter->watchdog_timer);
1838 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1839 del_timer_sync(&adapter->dma_err_timer);
1840 del_timer_sync(&adapter->phy_info_timer);
1842 netif_carrier_off(netdev);
1844 /* record the stats before reset*/
1845 igb_update_stats(adapter);
1847 adapter->link_speed = 0;
1848 adapter->link_duplex = 0;
1851 if (!pci_channel_offline(adapter->pdev))
1856 igb_clean_all_tx_rings(adapter);
1857 igb_clean_all_rx_rings(adapter);
1859 /* since we reset the hardware DCA settings were cleared */
1860 igb_setup_dca(adapter);
1864 void igb_reinit_locked(struct igb_adapter *adapter)
1866 WARN_ON(in_interrupt());
1867 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1868 usleep_range(1000, 2000);
1871 clear_bit(__IGB_RESETTING, &adapter->state);
1875 * igb_enable_mas - Media Autosense re-enable after swap
1877 * @adapter: adapter struct
1879 static s32 igb_enable_mas(struct igb_adapter *adapter)
1881 struct e1000_hw *hw = &adapter->hw;
1883 s32 ret_val = E1000_SUCCESS;
1885 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1886 if (hw->phy.media_type == e1000_media_type_copper) {
1887 /* configure for SerDes media detect */
1888 if (!(connsw & E1000_CONNSW_SERDESD)) {
1889 connsw |= E1000_CONNSW_ENRGSRC;
1890 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1891 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1892 E1000_WRITE_FLUSH(hw);
1893 } else if (connsw & E1000_CONNSW_SERDESD) {
1894 /* already SerDes, no need to enable anything */
1897 dev_info(pci_dev_to_dev(adapter->pdev),
1898 "%s:MAS: Unable to configure feature, disabling..\n",
1899 adapter->netdev->name);
1900 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1906 void igb_reset(struct igb_adapter *adapter)
1908 struct pci_dev *pdev = adapter->pdev;
1909 struct e1000_hw *hw = &adapter->hw;
1910 struct e1000_mac_info *mac = &hw->mac;
1911 struct e1000_fc_info *fc = &hw->fc;
1912 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1914 /* Repartition Pba for greater than 9k mtu
1915 * To take effect CTRL.RST is required.
1917 switch (mac->type) {
1921 pba = E1000_READ_REG(hw, E1000_RXPBS);
1922 pba = e1000_rxpbs_adjust_82580(pba);
1925 pba = E1000_READ_REG(hw, E1000_RXPBS);
1926 pba &= E1000_RXPBS_SIZE_MASK_82576;
1932 pba = E1000_PBA_34K;
1936 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1937 (mac->type < e1000_82576)) {
1938 /* adjust PBA for jumbo frames */
1939 E1000_WRITE_REG(hw, E1000_PBA, pba);
1941 /* To maintain wire speed transmits, the Tx FIFO should be
1942 * large enough to accommodate two full transmit packets,
1943 * rounded up to the next 1KB and expressed in KB. Likewise,
1944 * the Rx FIFO should be large enough to accommodate at least
1945 * one full receive packet and is similarly rounded up and
1946 * expressed in KB. */
1947 pba = E1000_READ_REG(hw, E1000_PBA);
1948 /* upper 16 bits has Tx packet buffer allocation size in KB */
1949 tx_space = pba >> 16;
1950 /* lower 16 bits has Rx packet buffer allocation size in KB */
1952 /* the tx fifo also stores 16 bytes of information about the tx
1953 * but don't include ethernet FCS because hardware appends it */
1954 min_tx_space = (adapter->max_frame_size +
1955 sizeof(union e1000_adv_tx_desc) -
1957 min_tx_space = ALIGN(min_tx_space, 1024);
1958 min_tx_space >>= 10;
1959 /* software strips receive CRC, so leave room for it */
1960 min_rx_space = adapter->max_frame_size;
1961 min_rx_space = ALIGN(min_rx_space, 1024);
1962 min_rx_space >>= 10;
1964 /* If current Tx allocation is less than the min Tx FIFO size,
1965 * and the min Tx FIFO size is less than the current Rx FIFO
1966 * allocation, take space away from current Rx allocation */
1967 if (tx_space < min_tx_space &&
1968 ((min_tx_space - tx_space) < pba)) {
1969 pba = pba - (min_tx_space - tx_space);
1971 /* if short on rx space, rx wins and must trump tx
1973 if (pba < min_rx_space)
1976 E1000_WRITE_REG(hw, E1000_PBA, pba);
1979 /* flow control settings */
1980 /* The high water mark must be low enough to fit one full frame
1981 * (or the size used for early receive) above it in the Rx FIFO.
1982 * Set it to the lower of:
1983 * - 90% of the Rx FIFO size, or
1984 * - the full Rx FIFO size minus one full frame */
1985 hwm = min(((pba << 10) * 9 / 10),
1986 ((pba << 10) - 2 * adapter->max_frame_size));
1988 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1989 fc->low_water = fc->high_water - 16;
1990 fc->pause_time = 0xFFFF;
1992 fc->current_mode = fc->requested_mode;
1994 /* disable receive for all VFs and wait one second */
1995 if (adapter->vfs_allocated_count) {
1998 * Clear all flags except indication that the PF has set
1999 * the VF MAC addresses administratively
2001 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2002 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2004 /* ping all the active vfs to let them know we are going down */
2005 igb_ping_all_vfs(adapter);
2007 /* disable transmits and receives */
2008 E1000_WRITE_REG(hw, E1000_VFRE, 0);
2009 E1000_WRITE_REG(hw, E1000_VFTE, 0);
2012 /* Allow time for pending master requests to run */
2014 E1000_WRITE_REG(hw, E1000_WUC, 0);
2016 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2017 e1000_setup_init_funcs(hw, TRUE);
2018 igb_check_options(adapter);
2019 e1000_get_bus_info(hw);
2020 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2022 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2023 if (igb_enable_mas(adapter))
2024 dev_err(pci_dev_to_dev(pdev),
2025 "Error enabling Media Auto Sense\n");
2027 if (e1000_init_hw(hw))
2028 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2031 * Flow control settings reset on hardware reset, so guarantee flow
2032 * control is off when forcing speed.
2034 if (!hw->mac.autoneg)
2035 e1000_force_mac_fc(hw);
2037 igb_init_dmac(adapter, pba);
2038 /* Re-initialize the thermal sensor on i350 devices. */
2039 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2041 * If present, re-initialize the external thermal sensor
2045 e1000_set_i2c_bb(hw);
2046 e1000_init_thermal_sensor_thresh(hw);
2049 /*Re-establish EEE setting */
2050 if (hw->phy.media_type == e1000_media_type_copper) {
2051 switch (mac->type) {
2055 e1000_set_eee_i350(hw);
2058 e1000_set_eee_i354(hw);
2065 if (!netif_running(adapter->netdev))
2066 igb_power_down_link(adapter);
2068 igb_update_mng_vlan(adapter);
2070 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2071 E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2074 #ifdef HAVE_PTP_1588_CLOCK
2075 /* Re-enable PTP, where applicable. */
2076 igb_ptp_reset(adapter);
2077 #endif /* HAVE_PTP_1588_CLOCK */
2079 e1000_get_phy_info(hw);
2084 #ifdef HAVE_NDO_SET_FEATURES
2085 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2086 kni_netdev_features_t features)
2089 * Since there is no support for separate tx vlan accel
2090 * enabled make sure tx flag is cleared if rx is.
2092 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2093 if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2094 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2096 if (!(features & NETIF_F_HW_VLAN_RX))
2097 features &= ~NETIF_F_HW_VLAN_TX;
2100 /* If Rx checksum is disabled, then LRO should also be disabled */
2101 if (!(features & NETIF_F_RXCSUM))
2102 features &= ~NETIF_F_LRO;
2107 static int igb_set_features(struct net_device *netdev,
2108 kni_netdev_features_t features)
2110 u32 changed = netdev->features ^ features;
2112 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2113 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2115 if (changed & NETIF_F_HW_VLAN_RX)
2117 igb_vlan_mode(netdev, features);
2123 #ifdef USE_CONST_DEV_UC_CHAR
2124 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2125 struct net_device *dev,
2126 const unsigned char *addr,
2127 #ifdef HAVE_NDO_FDB_ADD_VID
2132 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2133 struct net_device *dev,
2134 unsigned char *addr,
2138 struct igb_adapter *adapter = netdev_priv(dev);
2139 struct e1000_hw *hw = &adapter->hw;
2142 if (!(adapter->vfs_allocated_count))
2145 /* Hardware does not support aging addresses so if a
2146 * ndm_state is given only allow permanent addresses
2148 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2149 pr_info("%s: FDB only supports static addresses\n",
2154 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2155 u32 rar_uc_entries = hw->mac.rar_entry_count -
2156 (adapter->vfs_allocated_count + 1);
2158 if (netdev_uc_count(dev) < rar_uc_entries)
2159 err = dev_uc_add_excl(dev, addr);
2162 } else if (is_multicast_ether_addr(addr)) {
2163 err = dev_mc_add_excl(dev, addr);
2168 /* Only return duplicate errors if NLM_F_EXCL is set */
2169 if (err == -EEXIST && !(flags & NLM_F_EXCL))
2175 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2176 #ifdef USE_CONST_DEV_UC_CHAR
2177 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2178 struct net_device *dev,
2179 const unsigned char *addr)
2181 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2182 struct net_device *dev,
2183 unsigned char *addr)
2186 struct igb_adapter *adapter = netdev_priv(dev);
2187 int err = -EOPNOTSUPP;
2189 if (ndm->ndm_state & NUD_PERMANENT) {
2190 pr_info("%s: FDB only supports static addresses\n",
2195 if (adapter->vfs_allocated_count) {
2196 if (is_unicast_ether_addr(addr))
2197 err = dev_uc_del(dev, addr);
2198 else if (is_multicast_ether_addr(addr))
2199 err = dev_mc_del(dev, addr);
2207 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2208 struct netlink_callback *cb,
2209 struct net_device *dev,
2212 struct igb_adapter *adapter = netdev_priv(dev);
2214 if (adapter->vfs_allocated_count)
2215 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2219 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2221 #ifdef HAVE_BRIDGE_ATTRIBS
2222 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2223 static int igb_ndo_bridge_setlink(struct net_device *dev,
2224 struct nlmsghdr *nlh,
2227 static int igb_ndo_bridge_setlink(struct net_device *dev,
2228 struct nlmsghdr *nlh)
2229 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2231 struct igb_adapter *adapter = netdev_priv(dev);
2232 struct e1000_hw *hw = &adapter->hw;
2233 struct nlattr *attr, *br_spec;
2236 if (!(adapter->vfs_allocated_count))
2239 switch (adapter->hw.mac.type) {
2248 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2250 nla_for_each_nested(attr, br_spec, rem) {
2253 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2256 mode = nla_get_u16(attr);
2257 if (mode == BRIDGE_MODE_VEPA) {
2258 e1000_vmdq_set_loopback_pf(hw, 0);
2259 adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2260 } else if (mode == BRIDGE_MODE_VEB) {
2261 e1000_vmdq_set_loopback_pf(hw, 1);
2262 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2266 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2267 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2273 #ifdef HAVE_BRIDGE_FILTER
2274 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2275 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2276 struct net_device *dev, u32 filter_mask,
2279 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2280 struct net_device *dev, u32 filter_mask)
2281 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2283 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2284 struct net_device *dev)
2287 struct igb_adapter *adapter = netdev_priv(dev);
2290 if (!(adapter->vfs_allocated_count))
2293 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2294 mode = BRIDGE_MODE_VEB;
2296 mode = BRIDGE_MODE_VEPA;
2298 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2299 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2300 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2301 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2302 nlflags, filter_mask, NULL);
2304 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2305 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2307 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2308 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2310 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2311 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2313 #endif /* HAVE_BRIDGE_ATTRIBS */
2314 #endif /* NTF_SELF */
2316 #endif /* HAVE_NDO_SET_FEATURES */
2317 #ifdef HAVE_NET_DEVICE_OPS
2318 static const struct net_device_ops igb_netdev_ops = {
2319 .ndo_open = igb_open,
2320 .ndo_stop = igb_close,
2321 .ndo_start_xmit = igb_xmit_frame,
2322 .ndo_get_stats = igb_get_stats,
2323 .ndo_set_rx_mode = igb_set_rx_mode,
2324 .ndo_set_mac_address = igb_set_mac,
2325 .ndo_change_mtu = igb_change_mtu,
2326 .ndo_do_ioctl = igb_ioctl,
2327 .ndo_tx_timeout = igb_tx_timeout,
2328 .ndo_validate_addr = eth_validate_addr,
2329 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2330 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2332 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2333 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2334 #ifdef HAVE_VF_MIN_MAX_TXRATE
2335 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
2336 #else /* HAVE_VF_MIN_MAX_TXRATE */
2337 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
2338 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2339 .ndo_get_vf_config = igb_ndo_get_vf_config,
2340 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2341 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2342 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2343 #endif /* IFLA_VF_MAX */
2344 #ifdef CONFIG_NET_POLL_CONTROLLER
2345 .ndo_poll_controller = igb_netpoll,
2347 #ifdef HAVE_NDO_SET_FEATURES
2348 .ndo_fix_features = igb_fix_features,
2349 .ndo_set_features = igb_set_features,
2351 #ifdef HAVE_VLAN_RX_REGISTER
2352 .ndo_vlan_rx_register = igb_vlan_mode,
2354 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2356 .ndo_fdb_add = igb_ndo_fdb_add,
2357 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2358 .ndo_fdb_del = igb_ndo_fdb_del,
2359 .ndo_fdb_dump = igb_ndo_fdb_dump,
2361 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2362 #ifdef HAVE_BRIDGE_ATTRIBS
2363 .ndo_bridge_setlink = igb_ndo_bridge_setlink,
2364 .ndo_bridge_getlink = igb_ndo_bridge_getlink,
2365 #endif /* HAVE_BRIDGE_ATTRIBS */
2369 #ifdef CONFIG_IGB_VMDQ_NETDEV
2370 static const struct net_device_ops igb_vmdq_ops = {
2371 .ndo_open = &igb_vmdq_open,
2372 .ndo_stop = &igb_vmdq_close,
2373 .ndo_start_xmit = &igb_vmdq_xmit_frame,
2374 .ndo_get_stats = &igb_vmdq_get_stats,
2375 .ndo_set_rx_mode = &igb_vmdq_set_rx_mode,
2376 .ndo_validate_addr = eth_validate_addr,
2377 .ndo_set_mac_address = &igb_vmdq_set_mac,
2378 .ndo_change_mtu = &igb_vmdq_change_mtu,
2379 .ndo_tx_timeout = &igb_vmdq_tx_timeout,
2380 .ndo_vlan_rx_register = &igb_vmdq_vlan_rx_register,
2381 .ndo_vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid,
2382 .ndo_vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid,
2385 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2386 #endif /* HAVE_NET_DEVICE_OPS */
2387 #ifdef CONFIG_IGB_VMDQ_NETDEV
2388 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2390 #ifdef HAVE_NET_DEVICE_OPS
2391 vnetdev->netdev_ops = &igb_vmdq_ops;
2393 dev->open = &igb_vmdq_open;
2394 dev->stop = &igb_vmdq_close;
2395 dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2396 dev->get_stats = &igb_vmdq_get_stats;
2397 #ifdef HAVE_SET_RX_MODE
2398 dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2400 dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2401 dev->set_mac_address = &igb_vmdq_set_mac;
2402 dev->change_mtu = &igb_vmdq_change_mtu;
2403 #ifdef HAVE_TX_TIMEOUT
2404 dev->tx_timeout = &igb_vmdq_tx_timeout;
2406 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2407 dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2408 dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2409 dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2412 igb_vmdq_set_ethtool_ops(vnetdev);
2413 vnetdev->watchdog_timeo = 5 * HZ;
2417 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2419 int pool, err = 0, base_queue;
2420 struct net_device *vnetdev;
2421 struct igb_vmdq_adapter *vmdq_adapter;
2423 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2424 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2425 base_queue = pool * qpp;
2426 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2431 vmdq_adapter = netdev_priv(vnetdev);
2432 vmdq_adapter->vnetdev = vnetdev;
2433 vmdq_adapter->real_adapter = adapter;
2434 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2435 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2436 igb_assign_vmdq_netdev_ops(vnetdev);
2437 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2438 adapter->netdev->name, pool);
2439 vnetdev->features = adapter->netdev->features;
2440 #ifdef HAVE_NETDEV_VLAN_FEATURES
2441 vnetdev->vlan_features = adapter->netdev->vlan_features;
2443 adapter->vmdq_netdev[pool-1] = vnetdev;
2444 err = register_netdev(vnetdev);
2451 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2455 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2456 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2457 free_netdev(adapter->vmdq_netdev[pool-1]);
2458 adapter->vmdq_netdev[pool-1] = NULL;
2462 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2465 * igb_set_fw_version - Configure version string for ethtool
2466 * @adapter: adapter struct
2469 static void igb_set_fw_version(struct igb_adapter *adapter)
2471 struct e1000_hw *hw = &adapter->hw;
2472 struct e1000_fw_version fw;
2474 e1000_get_fw_version(hw, &fw);
2476 switch (hw->mac.type) {
2479 if (!(e1000_get_flash_presence_i210(hw))) {
2480 snprintf(adapter->fw_version,
2481 sizeof(adapter->fw_version),
2483 fw.invm_major, fw.invm_minor, fw.invm_img_type);
2488 /* if option rom is valid, display its version too*/
2490 snprintf(adapter->fw_version,
2491 sizeof(adapter->fw_version),
2492 "%d.%d, 0x%08x, %d.%d.%d",
2493 fw.eep_major, fw.eep_minor, fw.etrack_id,
2494 fw.or_major, fw.or_build, fw.or_patch);
2497 if (fw.etrack_id != 0X0000) {
2498 snprintf(adapter->fw_version,
2499 sizeof(adapter->fw_version),
2501 fw.eep_major, fw.eep_minor, fw.etrack_id);
2503 snprintf(adapter->fw_version,
2504 sizeof(adapter->fw_version),
2506 fw.eep_major, fw.eep_minor, fw.eep_build);
2516 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2518 * @adapter: adapter struct
2520 static void igb_init_mas(struct igb_adapter *adapter)
2522 struct e1000_hw *hw = &adapter->hw;
2525 e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2526 switch (hw->bus.func) {
2528 if (eeprom_data & IGB_MAS_ENABLE_0)
2529 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2532 if (eeprom_data & IGB_MAS_ENABLE_1)
2533 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2536 if (eeprom_data & IGB_MAS_ENABLE_2)
2537 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2540 if (eeprom_data & IGB_MAS_ENABLE_3)
2541 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2544 /* Shouldn't get here */
2545 dev_err(pci_dev_to_dev(adapter->pdev),
2546 "%s:AMS: Invalid port configuration, returning\n",
2547 adapter->netdev->name);
2553 * igb_probe - Device Initialization Routine
2554 * @pdev: PCI device information struct
2555 * @ent: entry in igb_pci_tbl
2557 * Returns 0 on success, negative on failure
2559 * igb_probe initializes an adapter identified by a pci_dev structure.
2560 * The OS initialization, configuring of the adapter private structure,
2561 * and a hardware reset occur.
2563 static int __devinit igb_probe(struct pci_dev *pdev,
2564 const struct pci_device_id *ent)
2566 struct net_device *netdev;
2567 struct igb_adapter *adapter;
2568 struct e1000_hw *hw;
2569 u16 eeprom_data = 0;
2570 u8 pba_str[E1000_PBANUM_LENGTH];
2572 static int global_quad_port_a; /* global quad port a indication */
2573 int i, err, pci_using_dac;
2574 static int cards_found;
2576 err = pci_enable_device_mem(pdev);
2581 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2583 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2587 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2589 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2591 IGB_ERR("No usable DMA configuration, "
2598 #ifndef HAVE_ASPM_QUIRKS
2599 /* 82575 requires that the pci-e link partner disable the L0s state */
2600 switch (pdev->device) {
2601 case E1000_DEV_ID_82575EB_COPPER:
2602 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2603 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2604 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2609 #endif /* HAVE_ASPM_QUIRKS */
2610 err = pci_request_selected_regions(pdev,
2611 pci_select_bars(pdev,
2617 pci_enable_pcie_error_reporting(pdev);
2619 pci_set_master(pdev);
2623 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2626 netdev = alloc_etherdev(sizeof(struct igb_adapter));
2627 #endif /* HAVE_TX_MQ */
2629 goto err_alloc_etherdev;
2631 SET_MODULE_OWNER(netdev);
2632 SET_NETDEV_DEV(netdev, &pdev->dev);
2634 pci_set_drvdata(pdev, netdev);
2635 adapter = netdev_priv(netdev);
2636 adapter->netdev = netdev;
2637 adapter->pdev = pdev;
2640 adapter->port_num = hw->bus.func;
2641 adapter->msg_enable = (1 << debug) - 1;
2644 err = pci_save_state(pdev);
2649 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2650 pci_resource_len(pdev, 0));
2654 #ifdef HAVE_NET_DEVICE_OPS
2655 netdev->netdev_ops = &igb_netdev_ops;
2656 #else /* HAVE_NET_DEVICE_OPS */
2657 netdev->open = &igb_open;
2658 netdev->stop = &igb_close;
2659 netdev->get_stats = &igb_get_stats;
2660 #ifdef HAVE_SET_RX_MODE
2661 netdev->set_rx_mode = &igb_set_rx_mode;
2663 netdev->set_multicast_list = &igb_set_rx_mode;
2664 netdev->set_mac_address = &igb_set_mac;
2665 netdev->change_mtu = &igb_change_mtu;
2666 netdev->do_ioctl = &igb_ioctl;
2667 #ifdef HAVE_TX_TIMEOUT
2668 netdev->tx_timeout = &igb_tx_timeout;
2670 netdev->vlan_rx_register = igb_vlan_mode;
2671 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2672 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2673 #ifdef CONFIG_NET_POLL_CONTROLLER
2674 netdev->poll_controller = igb_netpoll;
2676 netdev->hard_start_xmit = &igb_xmit_frame;
2677 #endif /* HAVE_NET_DEVICE_OPS */
2678 igb_set_ethtool_ops(netdev);
2679 #ifdef HAVE_TX_TIMEOUT
2680 netdev->watchdog_timeo = 5 * HZ;
2683 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2685 adapter->bd_number = cards_found;
2687 /* setup the private structure */
2688 err = igb_sw_init(adapter);
2692 e1000_get_bus_info(hw);
2694 hw->phy.autoneg_wait_to_complete = FALSE;
2695 hw->mac.adaptive_ifs = FALSE;
2697 /* Copper options */
2698 if (hw->phy.media_type == e1000_media_type_copper) {
2699 hw->phy.mdix = AUTO_ALL_MODES;
2700 hw->phy.disable_polarity_correction = FALSE;
2701 hw->phy.ms_type = e1000_ms_hw_default;
2704 if (e1000_check_reset_block(hw))
2705 dev_info(pci_dev_to_dev(pdev),
2706 "PHY reset is blocked due to SOL/IDER session.\n");
2709 * features is initialized to 0 in allocation, it might have bits
2710 * set by igb_sw_init so we should use an or instead of an
2713 netdev->features |= NETIF_F_SG |
2715 #ifdef NETIF_F_IPV6_CSUM
2723 #endif /* NETIF_F_TSO */
2724 #ifdef NETIF_F_RXHASH
2728 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2729 NETIF_F_HW_VLAN_CTAG_RX |
2730 NETIF_F_HW_VLAN_CTAG_TX;
2732 NETIF_F_HW_VLAN_RX |
2736 if (hw->mac.type >= e1000_82576)
2737 netdev->features |= NETIF_F_SCTP_CSUM;
2739 #ifdef HAVE_NDO_SET_FEATURES
2740 /* copy netdev features into list of user selectable features */
2741 netdev->hw_features |= netdev->features;
2744 /* give us the option of enabling LRO later */
2745 netdev->hw_features |= NETIF_F_LRO;
2750 /* this is only needed on kernels prior to 2.6.39 */
2751 netdev->features |= NETIF_F_GRO;
2755 /* set this bit last since it cannot be part of hw_features */
2756 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2757 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2759 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2762 #ifdef HAVE_NETDEV_VLAN_FEATURES
2763 netdev->vlan_features |= NETIF_F_TSO |
2771 netdev->features |= NETIF_F_HIGHDMA;
2773 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2775 if (adapter->dmac != IGB_DMAC_DISABLE)
2776 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2779 /* before reading the NVM, reset the controller to put the device in a
2780 * known good starting state */
2783 /* make sure the NVM is good */
2784 if (e1000_validate_nvm_checksum(hw) < 0) {
2785 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2791 /* copy the MAC address out of the NVM */
2792 if (e1000_read_mac_addr(hw))
2793 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2794 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2795 #ifdef ETHTOOL_GPERMADDR
2796 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2798 if (!is_valid_ether_addr(netdev->perm_addr)) {
2800 if (!is_valid_ether_addr(netdev->dev_addr)) {
2802 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2807 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2808 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2809 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2810 igb_rar_set(adapter, 0);
2812 /* get firmware version for ethtool -i */
2813 igb_set_fw_version(adapter);
2815 /* Check if Media Autosense is enabled */
2816 if (hw->mac.type == e1000_82580)
2817 igb_init_mas(adapter);
2818 #ifdef HAVE_TIMER_SETUP
2819 timer_setup(&adapter->watchdog_timer, &igb_watchdog, 0);
2820 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2821 timer_setup(&adapter->dma_err_timer, &igb_dma_err_timer, 0);
2822 timer_setup(&adapter->phy_info_timer, &igb_update_phy_info, 0);
2824 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2825 (unsigned long) adapter);
2826 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2827 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2828 (unsigned long) adapter);
2829 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2830 (unsigned long) adapter);
2833 INIT_WORK(&adapter->reset_task, igb_reset_task);
2834 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2835 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2836 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2838 /* Initialize link properties that are user-changeable */
2839 adapter->fc_autoneg = true;
2840 hw->mac.autoneg = true;
2841 hw->phy.autoneg_advertised = 0x2f;
2843 hw->fc.requested_mode = e1000_fc_default;
2844 hw->fc.current_mode = e1000_fc_default;
2846 e1000_validate_mdi_setting(hw);
2848 /* By default, support wake on port A */
2849 if (hw->bus.func == 0)
2850 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2852 /* Check the NVM for wake support for non-port A ports */
2853 if (hw->mac.type >= e1000_82580)
2854 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2855 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2857 else if (hw->bus.func == 1)
2858 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2860 if (eeprom_data & IGB_EEPROM_APME)
2861 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2863 /* now that we have the eeprom settings, apply the special cases where
2864 * the eeprom may be wrong or the board simply won't support wake on
2865 * lan on a particular port */
2866 switch (pdev->device) {
2867 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2868 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2870 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2871 case E1000_DEV_ID_82576_FIBER:
2872 case E1000_DEV_ID_82576_SERDES:
2873 /* Wake events only supported on port A for dual fiber
2874 * regardless of eeprom setting */
2875 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2876 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2878 case E1000_DEV_ID_82576_QUAD_COPPER:
2879 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2880 /* if quad port adapter, disable WoL on all but port A */
2881 if (global_quad_port_a != 0)
2882 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2884 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2885 /* Reset for multiple quad port adapters */
2886 if (++global_quad_port_a == 4)
2887 global_quad_port_a = 0;
2890 /* If the device can't wake, don't set software support */
2891 if (!device_can_wakeup(&adapter->pdev->dev))
2892 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2896 /* initialize the wol settings based on the eeprom settings */
2897 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2898 adapter->wol |= E1000_WUFC_MAG;
2900 /* Some vendors want WoL disabled by default, but still supported */
2901 if ((hw->mac.type == e1000_i350) &&
2902 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2903 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2907 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2908 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2910 /* reset the hardware with the new settings */
2914 #ifdef HAVE_I2C_SUPPORT
2915 /* Init the I2C interface */
2916 err = igb_init_i2c(adapter);
2918 dev_err(&pdev->dev, "failed to init i2c interface\n");
2921 #endif /* HAVE_I2C_SUPPORT */
2923 /* let the f/w know that the h/w is now under the control of the
2925 igb_get_hw_control(adapter);
2927 strncpy(netdev->name, "eth%d", IFNAMSIZ);
2928 err = register_netdev(netdev);
2932 #ifdef CONFIG_IGB_VMDQ_NETDEV
2933 err = igb_init_vmdq_netdevs(adapter);
2937 /* carrier off reporting is important to ethtool even BEFORE open */
2938 netif_carrier_off(netdev);
2941 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2942 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2943 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2944 igb_setup_dca(adapter);
2948 #ifdef HAVE_PTP_1588_CLOCK
2949 /* do hw tstamp init after resetting */
2950 igb_ptp_init(adapter);
2951 #endif /* HAVE_PTP_1588_CLOCK */
2953 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2954 /* print bus type/speed/width info */
2955 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2957 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2958 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2959 (hw->mac.type == e1000_i354) ? "integrated" :
2961 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2962 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2963 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2964 (hw->mac.type == e1000_i354) ? "integrated" :
2966 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2967 for (i = 0; i < 6; i++)
2968 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2970 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2972 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2973 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2977 /* Initialize the thermal sensor on i350 devices. */
2978 if (hw->mac.type == e1000_i350) {
2979 if (hw->bus.func == 0) {
2983 * Read the NVM to determine if this i350 device
2984 * supports an external thermal sensor.
2986 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2987 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2988 adapter->ets = true;
2990 adapter->ets = false;
2994 igb_sysfs_init(adapter);
2998 igb_procfs_init(adapter);
2999 #endif /* IGB_PROCFS */
3000 #endif /* IGB_HWMON */
3002 adapter->ets = false;
3005 if (hw->phy.media_type == e1000_media_type_copper) {
3006 switch (hw->mac.type) {
3010 /* Enable EEE for internal copper PHY devices */
3011 err = e1000_set_eee_i350(hw);
3013 (adapter->flags & IGB_FLAG_EEE))
3014 adapter->eee_advert =
3015 MDIO_EEE_100TX | MDIO_EEE_1000T;
3018 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
3019 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3020 err = e1000_set_eee_i354(hw);
3022 (adapter->flags & IGB_FLAG_EEE))
3023 adapter->eee_advert =
3024 MDIO_EEE_100TX | MDIO_EEE_1000T;
3032 /* send driver version info to firmware */
3033 if (hw->mac.type >= e1000_i350)
3034 igb_init_fw(adapter);
3037 if (netdev->features & NETIF_F_LRO)
3038 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3040 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3042 dev_info(pci_dev_to_dev(pdev),
3043 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3044 adapter->msix_entries ? "MSI-X" :
3045 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3046 adapter->num_rx_queues, adapter->num_tx_queues);
3050 pm_runtime_put_noidle(&pdev->dev);
3054 igb_release_hw_control(adapter);
3055 #ifdef HAVE_I2C_SUPPORT
3056 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3057 #endif /* HAVE_I2C_SUPPORT */
3059 if (!e1000_check_reset_block(hw))
3060 e1000_phy_hw_reset(hw);
3062 if (hw->flash_address)
3063 iounmap(hw->flash_address);
3065 igb_clear_interrupt_scheme(adapter);
3066 igb_reset_sriov_capability(adapter);
3067 iounmap(hw->hw_addr);
3069 free_netdev(netdev);
3071 pci_release_selected_regions(pdev,
3072 pci_select_bars(pdev, IORESOURCE_MEM));
3075 pci_disable_device(pdev);
3078 #ifdef HAVE_I2C_SUPPORT
3080 * igb_remove_i2c - Cleanup I2C interface
3081 * @adapter: pointer to adapter structure
3084 static void igb_remove_i2c(struct igb_adapter *adapter)
3087 /* free the adapter bus structure */
3088 i2c_del_adapter(&adapter->i2c_adap);
3090 #endif /* HAVE_I2C_SUPPORT */
3093 * igb_remove - Device Removal Routine
3094 * @pdev: PCI device information struct
3096 * igb_remove is called by the PCI subsystem to alert the driver
3097 * that it should release a PCI device. The could be caused by a
3098 * Hot-Plug event, or because the driver is going to be removed from
3101 static void __devexit igb_remove(struct pci_dev *pdev)
3103 struct net_device *netdev = pci_get_drvdata(pdev);
3104 struct igb_adapter *adapter = netdev_priv(netdev);
3105 struct e1000_hw *hw = &adapter->hw;
3107 pm_runtime_get_noresume(&pdev->dev);
3108 #ifdef HAVE_I2C_SUPPORT
3109 igb_remove_i2c(adapter);
3110 #endif /* HAVE_I2C_SUPPORT */
3111 #ifdef HAVE_PTP_1588_CLOCK
3112 igb_ptp_stop(adapter);
3113 #endif /* HAVE_PTP_1588_CLOCK */
3115 /* flush_scheduled work may reschedule our watchdog task, so
3116 * explicitly disable watchdog tasks from being rescheduled */
3117 set_bit(__IGB_DOWN, &adapter->state);
3118 del_timer_sync(&adapter->watchdog_timer);
3119 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3120 del_timer_sync(&adapter->dma_err_timer);
3121 del_timer_sync(&adapter->phy_info_timer);
3123 flush_scheduled_work();
3126 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3127 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3128 dca_remove_requester(&pdev->dev);
3129 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3130 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3134 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3135 * would have already happened in close and is redundant. */
3136 igb_release_hw_control(adapter);
3138 unregister_netdev(netdev);
3139 #ifdef CONFIG_IGB_VMDQ_NETDEV
3140 igb_remove_vmdq_netdevs(adapter);
3143 igb_clear_interrupt_scheme(adapter);
3144 igb_reset_sriov_capability(adapter);
3146 iounmap(hw->hw_addr);
3147 if (hw->flash_address)
3148 iounmap(hw->flash_address);
3149 pci_release_selected_regions(pdev,
3150 pci_select_bars(pdev, IORESOURCE_MEM));
3153 igb_sysfs_exit(adapter);
3156 igb_procfs_exit(adapter);
3157 #endif /* IGB_PROCFS */
3158 #endif /* IGB_HWMON */
3159 kfree(adapter->mac_table);
3160 kfree(adapter->shadow_vfta);
3161 free_netdev(netdev);
3163 pci_disable_pcie_error_reporting(pdev);
3165 pci_disable_device(pdev);
3169 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3170 * @adapter: board private structure to initialize
3172 * igb_sw_init initializes the Adapter private data structure.
3173 * Fields are initialized based on PCI device information and
3174 * OS network device settings (MTU size).
3176 static int igb_sw_init(struct igb_adapter *adapter)
3178 struct e1000_hw *hw = &adapter->hw;
3179 struct net_device *netdev = adapter->netdev;
3180 struct pci_dev *pdev = adapter->pdev;
3182 /* PCI config space info */
3184 hw->vendor_id = pdev->vendor;
3185 hw->device_id = pdev->device;
3186 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3187 hw->subsystem_device_id = pdev->subsystem_device;
3189 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3191 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3193 /* set default ring sizes */
3194 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3195 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3197 /* set default work limits */
3198 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3200 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3203 /* Initialize the hardware-specific values */
3204 if (e1000_setup_init_funcs(hw, TRUE)) {
3205 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3209 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3210 hw->mac.rar_entry_count,
3213 /* Setup and initialize a copy of the hw vlan table array */
3214 adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3217 /* These calls may decrease the number of queues */
3218 if (hw->mac.type < e1000_i210) {
3219 igb_set_sriov_capability(adapter);
3222 if (igb_init_interrupt_scheme(adapter, true)) {
3223 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3227 /* Explicitly disable IRQ since the NIC can be in any state. */
3228 igb_irq_disable(adapter);
3230 set_bit(__IGB_DOWN, &adapter->state);
3236 * igb_open - Called when a network interface is made active
3237 * @netdev: network interface device structure
3239 * Returns 0 on success, negative value on failure
3241 * The open entry point is called when a network interface is made
3242 * active by the system (IFF_UP). At this point all resources needed
3243 * for transmit and receive operations are allocated, the interrupt
3244 * handler is registered with the OS, the watchdog timer is started,
3245 * and the stack is notified that the interface is ready.
3247 static int __igb_open(struct net_device *netdev, bool resuming)
3249 struct igb_adapter *adapter = netdev_priv(netdev);
3250 struct e1000_hw *hw = &adapter->hw;
3251 #ifdef CONFIG_PM_RUNTIME
3252 struct pci_dev *pdev = adapter->pdev;
3253 #endif /* CONFIG_PM_RUNTIME */
3257 /* disallow open during test */
3258 if (test_bit(__IGB_TESTING, &adapter->state)) {
3263 #ifdef CONFIG_PM_RUNTIME
3265 pm_runtime_get_sync(&pdev->dev);
3266 #endif /* CONFIG_PM_RUNTIME */
3268 netif_carrier_off(netdev);
3270 /* allocate transmit descriptors */
3271 err = igb_setup_all_tx_resources(adapter);
3275 /* allocate receive descriptors */
3276 err = igb_setup_all_rx_resources(adapter);
3280 igb_power_up_link(adapter);
3282 /* before we allocate an interrupt, we must be ready to handle it.
3283 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3284 * as soon as we call pci_request_irq, so we have to setup our
3285 * clean_rx handler before we do so. */
3286 igb_configure(adapter);
3288 err = igb_request_irq(adapter);
3292 /* Notify the stack of the actual queue counts. */
3293 netif_set_real_num_tx_queues(netdev,
3294 adapter->vmdq_pools ? 1 :
3295 adapter->num_tx_queues);
3297 err = netif_set_real_num_rx_queues(netdev,
3298 adapter->vmdq_pools ? 1 :
3299 adapter->num_rx_queues);
3301 goto err_set_queues;
3303 /* From here on the code is the same as igb_up() */
3304 clear_bit(__IGB_DOWN, &adapter->state);
3306 for (i = 0; i < adapter->num_q_vectors; i++)
3307 napi_enable(&(adapter->q_vector[i]->napi));
3308 igb_configure_lli(adapter);
3310 /* Clear any pending interrupts. */
3311 E1000_READ_REG(hw, E1000_ICR);
3313 igb_irq_enable(adapter);
3315 /* notify VFs that reset has been completed */
3316 if (adapter->vfs_allocated_count) {
3317 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3318 reg_data |= E1000_CTRL_EXT_PFRSTD;
3319 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3322 netif_tx_start_all_queues(netdev);
3324 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3325 schedule_work(&adapter->dma_err_task);
3327 /* start the watchdog. */
3328 hw->mac.get_link_status = 1;
3329 schedule_work(&adapter->watchdog_task);
3331 return E1000_SUCCESS;
3334 igb_free_irq(adapter);
3336 igb_release_hw_control(adapter);
3337 igb_power_down_link(adapter);
3338 igb_free_all_rx_resources(adapter);
3340 igb_free_all_tx_resources(adapter);
3344 #ifdef CONFIG_PM_RUNTIME
3346 pm_runtime_put(&pdev->dev);
3347 #endif /* CONFIG_PM_RUNTIME */
3352 static int igb_open(struct net_device *netdev)
3354 return __igb_open(netdev, false);
3358 * igb_close - Disables a network interface
3359 * @netdev: network interface device structure
3361 * Returns 0, this is not allowed to fail
3363 * The close entry point is called when an interface is de-activated
3364 * by the OS. The hardware is still under the driver's control, but
3365 * needs to be disabled. A global MAC reset is issued to stop the
3366 * hardware, and all transmit and receive resources are freed.
3368 static int __igb_close(struct net_device *netdev, bool suspending)
3370 struct igb_adapter *adapter = netdev_priv(netdev);
3371 #ifdef CONFIG_PM_RUNTIME
3372 struct pci_dev *pdev = adapter->pdev;
3373 #endif /* CONFIG_PM_RUNTIME */
3375 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3377 #ifdef CONFIG_PM_RUNTIME
3379 pm_runtime_get_sync(&pdev->dev);
3380 #endif /* CONFIG_PM_RUNTIME */
3384 igb_release_hw_control(adapter);
3386 igb_free_irq(adapter);
3388 igb_free_all_tx_resources(adapter);
3389 igb_free_all_rx_resources(adapter);
3391 #ifdef CONFIG_PM_RUNTIME
3393 pm_runtime_put_sync(&pdev->dev);
3394 #endif /* CONFIG_PM_RUNTIME */
3399 static int igb_close(struct net_device *netdev)
3401 return __igb_close(netdev, false);
3405 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3406 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3408 * Return 0 on success, negative on failure
3410 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3412 struct device *dev = tx_ring->dev;
3415 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3416 tx_ring->tx_buffer_info = vzalloc(size);
3417 if (!tx_ring->tx_buffer_info)
3420 /* round up to nearest 4K */
3421 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3422 tx_ring->size = ALIGN(tx_ring->size, 4096);
3424 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3425 &tx_ring->dma, GFP_KERNEL);
3430 tx_ring->next_to_use = 0;
3431 tx_ring->next_to_clean = 0;
3436 vfree(tx_ring->tx_buffer_info);
3438 "Unable to allocate memory for the transmit descriptor ring\n");
3443 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3444 * (Descriptors) for all queues
3445 * @adapter: board private structure
3447 * Return 0 on success, negative on failure
3449 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3451 struct pci_dev *pdev = adapter->pdev;
3454 for (i = 0; i < adapter->num_tx_queues; i++) {
3455 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3457 dev_err(pci_dev_to_dev(pdev),
3458 "Allocation for Tx Queue %u failed\n", i);
3459 for (i--; i >= 0; i--)
3460 igb_free_tx_resources(adapter->tx_ring[i]);
3469 * igb_setup_tctl - configure the transmit control registers
3470 * @adapter: Board private structure
3472 void igb_setup_tctl(struct igb_adapter *adapter)
3474 struct e1000_hw *hw = &adapter->hw;
3477 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3478 E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3480 /* Program the Transmit Control Register */
3481 tctl = E1000_READ_REG(hw, E1000_TCTL);
3482 tctl &= ~E1000_TCTL_CT;
3483 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3484 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3486 e1000_config_collision_dist(hw);
3488 /* Enable transmits */
3489 tctl |= E1000_TCTL_EN;
3491 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3494 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3496 struct e1000_hw *hw = &adapter->hw;
3497 switch (hw->mac.type) {
3501 if (adapter->msix_entries)
3511 * igb_configure_tx_ring - Configure transmit ring after Reset
3512 * @adapter: board private structure
3513 * @ring: tx ring to configure
3515 * Configure a transmit ring after a reset.
3517 void igb_configure_tx_ring(struct igb_adapter *adapter,
3518 struct igb_ring *ring)
3520 struct e1000_hw *hw = &adapter->hw;
3522 u64 tdba = ring->dma;
3523 int reg_idx = ring->reg_idx;
3525 /* disable the queue */
3526 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3527 E1000_WRITE_FLUSH(hw);
3530 E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3531 ring->count * sizeof(union e1000_adv_tx_desc));
3532 E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3533 tdba & 0x00000000ffffffffULL);
3534 E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3536 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3537 E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3538 writel(0, ring->tail);
3540 txdctl |= IGB_TX_PTHRESH;
3541 txdctl |= IGB_TX_HTHRESH << 8;
3542 txdctl |= igb_tx_wthresh(adapter) << 16;
3544 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3545 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3549 * igb_configure_tx - Configure transmit Unit after Reset
3550 * @adapter: board private structure
3552 * Configure the Tx unit of the MAC after a reset.
3554 static void igb_configure_tx(struct igb_adapter *adapter)
3558 for (i = 0; i < adapter->num_tx_queues; i++)
3559 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3563 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3564 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3566 * Returns 0 on success, negative on failure
3568 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3570 struct device *dev = rx_ring->dev;
3573 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3574 rx_ring->rx_buffer_info = vzalloc(size);
3575 if (!rx_ring->rx_buffer_info)
3578 desc_len = sizeof(union e1000_adv_rx_desc);
3580 /* Round up to nearest 4K */
3581 rx_ring->size = rx_ring->count * desc_len;
3582 rx_ring->size = ALIGN(rx_ring->size, 4096);
3584 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3585 &rx_ring->dma, GFP_KERNEL);
3590 rx_ring->next_to_alloc = 0;
3591 rx_ring->next_to_clean = 0;
3592 rx_ring->next_to_use = 0;
3597 vfree(rx_ring->rx_buffer_info);
3598 rx_ring->rx_buffer_info = NULL;
3599 dev_err(dev, "Unable to allocate memory for the receive descriptor"
3605 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3606 * (Descriptors) for all queues
3607 * @adapter: board private structure
3609 * Return 0 on success, negative on failure
3611 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3613 struct pci_dev *pdev = adapter->pdev;
3616 for (i = 0; i < adapter->num_rx_queues; i++) {
3617 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3619 dev_err(pci_dev_to_dev(pdev),
3620 "Allocation for Rx Queue %u failed\n", i);
3621 for (i--; i >= 0; i--)
3622 igb_free_rx_resources(adapter->rx_ring[i]);
3631 * igb_setup_mrqc - configure the multiple receive queue control registers
3632 * @adapter: Board private structure
3634 static void igb_setup_mrqc(struct igb_adapter *adapter)
3636 struct e1000_hw *hw = &adapter->hw;
3638 u32 j, num_rx_queues, shift = 0, shift2 = 0;
3639 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3640 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3641 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3644 /* Fill out hash function seeds */
3645 for (j = 0; j < 10; j++)
3646 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3648 num_rx_queues = adapter->rss_queues;
3650 /* 82575 and 82576 supports 2 RSS queues for VMDq */
3651 switch (hw->mac.type) {
3653 if (adapter->vmdq_pools) {
3661 /* 82576 supports 2 RSS queues for SR-IOV */
3662 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3672 * Populate the redirection table 4 entries at a time. To do this
3673 * we are generating the results for n and n+2 and then interleaving
3674 * those with the results with n+1 and n+3.
3676 for (j = 0; j < 32; j++) {
3677 /* first pass generates n and n+2 */
3678 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3679 u32 reta = (base & 0x07800780) >> (7 - shift);
3681 /* second pass generates n+1 and n+3 */
3682 base += 0x00010001 * num_rx_queues;
3683 reta |= (base & 0x07800780) << (1 + shift);
3685 /* generate 2nd table for 82575 based parts */
3687 reta |= (0x01010101 * num_rx_queues) << shift2;
3689 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3693 * Disable raw packet checksumming so that RSS hash is placed in
3694 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3695 * offloads as they are enabled by default
3697 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3698 rxcsum |= E1000_RXCSUM_PCSD;
3700 if (adapter->hw.mac.type >= e1000_82576)
3701 /* Enable Receive Checksum Offload for SCTP */
3702 rxcsum |= E1000_RXCSUM_CRCOFL;
3704 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3705 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3707 /* Generate RSS hash based on packet types, TCP/UDP
3708 * port numbers and/or IPv4/v6 src and dst addresses
3710 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3711 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3712 E1000_MRQC_RSS_FIELD_IPV6 |
3713 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3714 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3716 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3717 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3718 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3719 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3721 /* If VMDq is enabled then we set the appropriate mode for that, else
3722 * we default to RSS so that an RSS hash is calculated per packet even
3723 * if we are only using one queue */
3724 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3725 if (hw->mac.type > e1000_82575) {
3726 /* Set the default pool for the PF's first queue */
3727 u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3728 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3729 E1000_VT_CTL_DISABLE_DEF_POOL);
3730 vtctl |= adapter->vfs_allocated_count <<
3731 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3732 E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3733 } else if (adapter->rss_queues > 1) {
3734 /* set default queue for pool 1 to queue 2 */
3735 E1000_WRITE_REG(hw, E1000_VT_CTL,
3736 adapter->rss_queues << 7);
3738 if (adapter->rss_queues > 1)
3739 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3741 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3743 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3745 igb_vmm_control(adapter);
3747 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3751 * igb_setup_rctl - configure the receive control registers
3752 * @adapter: Board private structure
3754 void igb_setup_rctl(struct igb_adapter *adapter)
3756 struct e1000_hw *hw = &adapter->hw;
3759 rctl = E1000_READ_REG(hw, E1000_RCTL);
3761 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3762 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3764 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3765 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3768 * enable stripping of CRC. It's unlikely this will break BMC
3769 * redirection as it did with e1000. Newer features require
3770 * that the HW strips the CRC.
3772 rctl |= E1000_RCTL_SECRC;
3774 /* disable store bad packets and clear size bits. */
3775 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3777 /* enable LPE to prevent packets larger than max_frame_size */
3778 rctl |= E1000_RCTL_LPE;
3780 /* disable queue 0 to prevent tail write w/o re-config */
3781 E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3783 /* Attention!!! For SR-IOV PF driver operations you must enable
3784 * queue drop for all VF and PF queues to prevent head of line blocking
3785 * if an un-trusted VF does not provide descriptors to hardware.
3787 if (adapter->vfs_allocated_count) {
3788 /* set all queue drop enable bits */
3789 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3792 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3795 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3798 struct e1000_hw *hw = &adapter->hw;
3801 /* if it isn't the PF check to see if VFs are enabled and
3802 * increase the size to support vlan tags */
3803 if (vfn < adapter->vfs_allocated_count &&
3804 adapter->vf_data[vfn].vlans_enabled)
3807 #ifdef CONFIG_IGB_VMDQ_NETDEV
3808 if (vfn >= adapter->vfs_allocated_count) {
3809 int queue = vfn - adapter->vfs_allocated_count;
3810 struct igb_vmdq_adapter *vadapter;
3812 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3813 if (vadapter->vlgrp)
3817 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3818 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3819 vmolr |= size | E1000_VMOLR_LPE;
3820 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3826 * igb_rlpml_set - set maximum receive packet size
3827 * @adapter: board private structure
3829 * Configure maximum receivable packet size.
3831 static void igb_rlpml_set(struct igb_adapter *adapter)
3833 u32 max_frame_size = adapter->max_frame_size;
3834 struct e1000_hw *hw = &adapter->hw;
3835 u16 pf_id = adapter->vfs_allocated_count;
3837 if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3839 for (i = 0; i < adapter->vmdq_pools; i++)
3840 igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3842 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3843 * to our max jumbo frame size, in case we need to enable
3844 * jumbo frames on one of the rings later.
3845 * This will not pass over-length frames into the default
3846 * queue because it's gated by the VMOLR.RLPML.
3848 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3850 /* Set VF RLPML for the PF device. */
3851 if (adapter->vfs_allocated_count)
3852 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3854 E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3857 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3858 int vfn, bool enable)
3860 struct e1000_hw *hw = &adapter->hw;
3864 if (hw->mac.type < e1000_82576)
3867 if (hw->mac.type == e1000_i350)
3868 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3870 reg = hw->hw_addr + E1000_VMOLR(vfn);
3874 val |= E1000_VMOLR_STRVLAN;
3876 val &= ~(E1000_VMOLR_STRVLAN);
3879 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3882 struct e1000_hw *hw = &adapter->hw;
3886 * This register exists only on 82576 and newer so if we are older then
3887 * we should exit and do nothing
3889 if (hw->mac.type < e1000_82576)
3892 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3895 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3897 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3899 /* clear all bits that might not be set */
3900 vmolr &= ~E1000_VMOLR_RSSE;
3902 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3903 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3905 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3906 vmolr |= E1000_VMOLR_LPE; /* Accept long packets */
3908 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3912 * igb_configure_rx_ring - Configure a receive ring after Reset
3913 * @adapter: board private structure
3914 * @ring: receive ring to be configured
3916 * Configure the Rx unit of the MAC after a reset.
3918 void igb_configure_rx_ring(struct igb_adapter *adapter,
3919 struct igb_ring *ring)
3921 struct e1000_hw *hw = &adapter->hw;
3922 u64 rdba = ring->dma;
3923 int reg_idx = ring->reg_idx;
3924 u32 srrctl = 0, rxdctl = 0;
3926 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3928 * RLPML prevents us from receiving a frame larger than max_frame so
3929 * it is safe to just set the rx_buffer_len to max_frame without the
3930 * risk of an skb over panic.
3932 ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3933 MAXIMUM_ETHERNET_VLAN_SIZE);
3936 /* disable the queue */
3937 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3939 /* Set DMA base address registers */
3940 E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3941 rdba & 0x00000000ffffffffULL);
3942 E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3943 E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3944 ring->count * sizeof(union e1000_adv_rx_desc));
3946 /* initialize head and tail */
3947 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3948 E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3949 writel(0, ring->tail);
3951 /* reset next-to- use/clean to place SW in sync with hardwdare */
3952 ring->next_to_clean = 0;
3953 ring->next_to_use = 0;
3954 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3955 ring->next_to_alloc = 0;
3958 /* set descriptor configuration */
3959 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3960 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3961 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3962 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3963 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3964 E1000_SRRCTL_BSIZEPKT_SHIFT;
3965 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3966 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3967 #ifdef HAVE_PTP_1588_CLOCK
3968 if (hw->mac.type >= e1000_82580)
3969 srrctl |= E1000_SRRCTL_TIMESTAMP;
3970 #endif /* HAVE_PTP_1588_CLOCK */
3972 * We should set the drop enable bit if:
3975 * Flow Control is disabled and number of RX queues > 1
3977 * This allows us to avoid head of line blocking for security
3978 * and performance reasons.
3980 if (adapter->vfs_allocated_count ||
3981 (adapter->num_rx_queues > 1 &&
3982 (hw->fc.requested_mode == e1000_fc_none ||
3983 hw->fc.requested_mode == e1000_fc_rx_pause)))
3984 srrctl |= E1000_SRRCTL_DROP_EN;
3986 E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3988 /* set filtering for VMDQ pools */
3989 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3991 rxdctl |= IGB_RX_PTHRESH;
3992 rxdctl |= IGB_RX_HTHRESH << 8;
3993 rxdctl |= IGB_RX_WTHRESH << 16;
3995 /* enable receive descriptor fetching */
3996 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3997 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
4001 * igb_configure_rx - Configure receive Unit after Reset
4002 * @adapter: board private structure
4004 * Configure the Rx unit of the MAC after a reset.
4006 static void igb_configure_rx(struct igb_adapter *adapter)
4010 /* set UTA to appropriate mode */
4011 igb_set_uta(adapter);
4013 igb_full_sync_mac_table(adapter);
4014 /* Setup the HW Rx Head and Tail Descriptor Pointers and
4015 * the Base and Length of the Rx Descriptor Ring */
4016 for (i = 0; i < adapter->num_rx_queues; i++)
4017 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
4021 * igb_free_tx_resources - Free Tx Resources per Queue
4022 * @tx_ring: Tx descriptor ring for a specific queue
4024 * Free all transmit software resources
4026 void igb_free_tx_resources(struct igb_ring *tx_ring)
4028 igb_clean_tx_ring(tx_ring);
4030 vfree(tx_ring->tx_buffer_info);
4031 tx_ring->tx_buffer_info = NULL;
4033 /* if not set, then don't free */
4037 dma_free_coherent(tx_ring->dev, tx_ring->size,
4038 tx_ring->desc, tx_ring->dma);
4040 tx_ring->desc = NULL;
4044 * igb_free_all_tx_resources - Free Tx Resources for All Queues
4045 * @adapter: board private structure
4047 * Free all transmit software resources
4049 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4053 for (i = 0; i < adapter->num_tx_queues; i++)
4054 igb_free_tx_resources(adapter->tx_ring[i]);
4057 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4058 struct igb_tx_buffer *tx_buffer)
4060 if (tx_buffer->skb) {
4061 dev_kfree_skb_any(tx_buffer->skb);
4062 if (dma_unmap_len(tx_buffer, len))
4063 dma_unmap_single(ring->dev,
4064 dma_unmap_addr(tx_buffer, dma),
4065 dma_unmap_len(tx_buffer, len),
4067 } else if (dma_unmap_len(tx_buffer, len)) {
4068 dma_unmap_page(ring->dev,
4069 dma_unmap_addr(tx_buffer, dma),
4070 dma_unmap_len(tx_buffer, len),
4073 tx_buffer->next_to_watch = NULL;
4074 tx_buffer->skb = NULL;
4075 dma_unmap_len_set(tx_buffer, len, 0);
4076 /* buffer_info must be completely set up in the transmit path */
4080 * igb_clean_tx_ring - Free Tx Buffers
4081 * @tx_ring: ring to be cleaned
4083 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4085 struct igb_tx_buffer *buffer_info;
4089 if (!tx_ring->tx_buffer_info)
4091 /* Free all the Tx ring sk_buffs */
4093 for (i = 0; i < tx_ring->count; i++) {
4094 buffer_info = &tx_ring->tx_buffer_info[i];
4095 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4098 netdev_tx_reset_queue(txring_txq(tx_ring));
4100 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4101 memset(tx_ring->tx_buffer_info, 0, size);
4103 /* Zero out the descriptor ring */
4104 memset(tx_ring->desc, 0, tx_ring->size);
4106 tx_ring->next_to_use = 0;
4107 tx_ring->next_to_clean = 0;
4111 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4112 * @adapter: board private structure
4114 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4118 for (i = 0; i < adapter->num_tx_queues; i++)
4119 igb_clean_tx_ring(adapter->tx_ring[i]);
4123 * igb_free_rx_resources - Free Rx Resources
4124 * @rx_ring: ring to clean the resources from
4126 * Free all receive software resources
4128 void igb_free_rx_resources(struct igb_ring *rx_ring)
4130 igb_clean_rx_ring(rx_ring);
4132 vfree(rx_ring->rx_buffer_info);
4133 rx_ring->rx_buffer_info = NULL;
4135 /* if not set, then don't free */
4139 dma_free_coherent(rx_ring->dev, rx_ring->size,
4140 rx_ring->desc, rx_ring->dma);
4142 rx_ring->desc = NULL;
4146 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4147 * @adapter: board private structure
4149 * Free all receive software resources
4151 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4155 for (i = 0; i < adapter->num_rx_queues; i++)
4156 igb_free_rx_resources(adapter->rx_ring[i]);
4160 * igb_clean_rx_ring - Free Rx Buffers per Queue
4161 * @rx_ring: ring to free buffers from
4163 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4168 if (!rx_ring->rx_buffer_info)
4171 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4173 dev_kfree_skb(rx_ring->skb);
4174 rx_ring->skb = NULL;
4177 /* Free all the Rx ring sk_buffs */
4178 for (i = 0; i < rx_ring->count; i++) {
4179 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4180 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4181 if (buffer_info->dma) {
4182 dma_unmap_single(rx_ring->dev,
4184 rx_ring->rx_buffer_len,
4186 buffer_info->dma = 0;
4189 if (buffer_info->skb) {
4190 dev_kfree_skb(buffer_info->skb);
4191 buffer_info->skb = NULL;
4194 if (!buffer_info->page)
4197 dma_unmap_page(rx_ring->dev,
4201 __free_page(buffer_info->page);
4203 buffer_info->page = NULL;
4207 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4208 memset(rx_ring->rx_buffer_info, 0, size);
4210 /* Zero out the descriptor ring */
4211 memset(rx_ring->desc, 0, rx_ring->size);
4213 rx_ring->next_to_alloc = 0;
4214 rx_ring->next_to_clean = 0;
4215 rx_ring->next_to_use = 0;
4219 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4220 * @adapter: board private structure
4222 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4226 for (i = 0; i < adapter->num_rx_queues; i++)
4227 igb_clean_rx_ring(adapter->rx_ring[i]);
4231 * igb_set_mac - Change the Ethernet Address of the NIC
4232 * @netdev: network interface device structure
4233 * @p: pointer to an address structure
4235 * Returns 0 on success, negative on failure
4237 static int igb_set_mac(struct net_device *netdev, void *p)
4239 struct igb_adapter *adapter = netdev_priv(netdev);
4240 struct e1000_hw *hw = &adapter->hw;
4241 struct sockaddr *addr = p;
4243 if (!is_valid_ether_addr(addr->sa_data))
4244 return -EADDRNOTAVAIL;
4246 igb_del_mac_filter(adapter, hw->mac.addr,
4247 adapter->vfs_allocated_count);
4248 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4249 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4251 /* set the correct pool for the new PF MAC address in entry 0 */
4252 return igb_add_mac_filter(adapter, hw->mac.addr,
4253 adapter->vfs_allocated_count);
4257 * igb_write_mc_addr_list - write multicast addresses to MTA
4258 * @netdev: network interface device structure
4260 * Writes multicast address list to the MTA hash table.
4261 * Returns: -ENOMEM on failure
4262 * 0 on no addresses written
4263 * X on writing X addresses to MTA
4265 int igb_write_mc_addr_list(struct net_device *netdev)
4267 struct igb_adapter *adapter = netdev_priv(netdev);
4268 struct e1000_hw *hw = &adapter->hw;
4269 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4270 struct netdev_hw_addr *ha;
4272 struct dev_mc_list *ha;
4276 #ifdef CONFIG_IGB_VMDQ_NETDEV
4279 count = netdev_mc_count(netdev);
4280 #ifdef CONFIG_IGB_VMDQ_NETDEV
4281 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4282 if (!adapter->vmdq_netdev[vm])
4284 if (!netif_running(adapter->vmdq_netdev[vm]))
4286 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4291 e1000_update_mc_addr_list(hw, NULL, 0);
4294 mta_list = kzalloc(count * 6, GFP_ATOMIC);
4298 /* The shared function expects a packed array of only addresses. */
4300 netdev_for_each_mc_addr(ha, netdev)
4301 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4302 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4304 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4306 #ifdef CONFIG_IGB_VMDQ_NETDEV
4307 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4308 if (!adapter->vmdq_netdev[vm])
4310 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4311 !netdev_mc_count(adapter->vmdq_netdev[vm]))
4313 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4314 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4315 memcpy(mta_list + (i++ * ETH_ALEN),
4316 ha->addr, ETH_ALEN);
4318 memcpy(mta_list + (i++ * ETH_ALEN),
4319 ha->dmi_addr, ETH_ALEN);
4323 e1000_update_mc_addr_list(hw, mta_list, i);
4329 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4331 u32 rar_low, rar_high;
4332 struct e1000_hw *hw = &adapter->hw;
4333 u8 *addr = adapter->mac_table[index].addr;
4334 /* HW expects these in little endian so we reverse the byte order
4335 * from network order (big endian) to little endian
4337 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4338 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4339 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4341 /* Indicate to hardware the Address is Valid. */
4342 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4343 rar_high |= E1000_RAH_AV;
4345 if (hw->mac.type == e1000_82575)
4346 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4348 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4350 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4351 E1000_WRITE_FLUSH(hw);
4352 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4353 E1000_WRITE_FLUSH(hw);
4356 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4358 struct e1000_hw *hw = &adapter->hw;
4360 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4361 igb_rar_set(adapter, i);
4365 void igb_sync_mac_table(struct igb_adapter *adapter)
4367 struct e1000_hw *hw = &adapter->hw;
4369 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4370 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4371 igb_rar_set(adapter, i);
4372 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4376 int igb_available_rars(struct igb_adapter *adapter)
4378 struct e1000_hw *hw = &adapter->hw;
4381 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4382 if (adapter->mac_table[i].state == 0)
4388 #ifdef HAVE_SET_RX_MODE
4390 * igb_write_uc_addr_list - write unicast addresses to RAR table
4391 * @netdev: network interface device structure
4393 * Writes unicast address list to the RAR table.
4394 * Returns: -ENOMEM on failure/insufficient address space
4395 * 0 on no addresses written
4396 * X on writing X addresses to the RAR table
4398 static int igb_write_uc_addr_list(struct net_device *netdev)
4400 struct igb_adapter *adapter = netdev_priv(netdev);
4401 unsigned int vfn = adapter->vfs_allocated_count;
4404 /* return ENOMEM indicating insufficient memory for addresses */
4405 if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4407 if (!netdev_uc_empty(netdev)) {
4408 #ifdef NETDEV_HW_ADDR_T_UNICAST
4409 struct netdev_hw_addr *ha;
4411 struct dev_mc_list *ha;
4413 netdev_for_each_uc_addr(ha, netdev) {
4414 #ifdef NETDEV_HW_ADDR_T_UNICAST
4415 igb_del_mac_filter(adapter, ha->addr, vfn);
4416 igb_add_mac_filter(adapter, ha->addr, vfn);
4418 igb_del_mac_filter(adapter, ha->da_addr, vfn);
4419 igb_add_mac_filter(adapter, ha->da_addr, vfn);
4427 #endif /* HAVE_SET_RX_MODE */
4429 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4430 * @netdev: network interface device structure
4432 * The set_rx_mode entry point is called whenever the unicast or multicast
4433 * address lists or the network interface flags are updated. This routine is
4434 * responsible for configuring the hardware for proper unicast, multicast,
4435 * promiscuous mode, and all-multi behavior.
4437 static void igb_set_rx_mode(struct net_device *netdev)
4439 struct igb_adapter *adapter = netdev_priv(netdev);
4440 struct e1000_hw *hw = &adapter->hw;
4441 unsigned int vfn = adapter->vfs_allocated_count;
4442 u32 rctl, vmolr = 0;
4445 /* Check for Promiscuous and All Multicast modes */
4446 rctl = E1000_READ_REG(hw, E1000_RCTL);
4448 /* clear the effected bits */
4449 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4451 if (netdev->flags & IFF_PROMISC) {
4452 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4453 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4454 /* retain VLAN HW filtering if in VT mode */
4455 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4456 rctl |= E1000_RCTL_VFE;
4458 if (netdev->flags & IFF_ALLMULTI) {
4459 rctl |= E1000_RCTL_MPE;
4460 vmolr |= E1000_VMOLR_MPME;
4463 * Write addresses to the MTA, if the attempt fails
4464 * then we should just turn on promiscuous mode so
4465 * that we can at least receive multicast traffic
4467 count = igb_write_mc_addr_list(netdev);
4469 rctl |= E1000_RCTL_MPE;
4470 vmolr |= E1000_VMOLR_MPME;
4472 vmolr |= E1000_VMOLR_ROMPE;
4475 #ifdef HAVE_SET_RX_MODE
4477 * Write addresses to available RAR registers, if there is not
4478 * sufficient space to store all the addresses then enable
4479 * unicast promiscuous mode
4481 count = igb_write_uc_addr_list(netdev);
4483 rctl |= E1000_RCTL_UPE;
4484 vmolr |= E1000_VMOLR_ROPE;
4486 #endif /* HAVE_SET_RX_MODE */
4487 rctl |= E1000_RCTL_VFE;
4489 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4492 * In order to support SR-IOV and eventually VMDq it is necessary to set
4493 * the VMOLR to enable the appropriate modes. Without this workaround
4494 * we will have issues with VLAN tag stripping not being done for frames
4495 * that are only arriving because we are the default pool
4497 if (hw->mac.type < e1000_82576)
4500 vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4501 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4502 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4503 igb_restore_vf_multicasts(adapter);
4506 static void igb_check_wvbr(struct igb_adapter *adapter)
4508 struct e1000_hw *hw = &adapter->hw;
4511 switch (hw->mac.type) {
4514 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4521 adapter->wvbr |= wvbr;
4524 #define IGB_STAGGERED_QUEUE_OFFSET 8
4526 static void igb_spoof_check(struct igb_adapter *adapter)
4533 switch (adapter->hw.mac.type) {
4535 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4536 if (adapter->wvbr & (1 << j) ||
4537 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4538 DPRINTK(DRV, WARNING,
4539 "Spoof event(s) detected on VF %d\n", j);
4542 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4547 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4548 if (adapter->wvbr & (1 << j)) {
4549 DPRINTK(DRV, WARNING,
4550 "Spoof event(s) detected on VF %d\n", j);
4551 adapter->wvbr &= ~(1 << j);
4560 /* Need to wait a few seconds after link up to get diagnostic information from
4562 #ifdef HAVE_TIMER_SETUP
4563 static void igb_update_phy_info(struct timer_list *t)
4565 struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4567 static void igb_update_phy_info(unsigned long data)
4569 struct igb_adapter *adapter = (struct igb_adapter *) data;
4571 e1000_get_phy_info(&adapter->hw);
4575 * igb_has_link - check shared code for link and determine up/down
4576 * @adapter: pointer to driver private info
4578 bool igb_has_link(struct igb_adapter *adapter)
4580 struct e1000_hw *hw = &adapter->hw;
4581 bool link_active = FALSE;
4583 /* get_link_status is set on LSC (link status) interrupt or
4584 * rx sequence error interrupt. get_link_status will stay
4585 * false until the e1000_check_for_link establishes link
4586 * for copper adapters ONLY
4588 switch (hw->phy.media_type) {
4589 case e1000_media_type_copper:
4590 if (!hw->mac.get_link_status)
4592 case e1000_media_type_internal_serdes:
4593 e1000_check_for_link(hw);
4594 link_active = !hw->mac.get_link_status;
4596 case e1000_media_type_unknown:
4601 if (((hw->mac.type == e1000_i210) ||
4602 (hw->mac.type == e1000_i211)) &&
4603 (hw->phy.id == I210_I_PHY_ID)) {
4604 if (!netif_carrier_ok(adapter->netdev)) {
4605 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4606 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4607 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4608 adapter->link_check_timeout = jiffies;
4616 * igb_watchdog - Timer Call-back
4617 * @data: pointer to adapter cast into an unsigned long
4619 #ifdef HAVE_TIMER_SETUP
4620 static void igb_watchdog(struct timer_list *t)
4622 struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
4624 static void igb_watchdog(unsigned long data)
4626 struct igb_adapter *adapter = (struct igb_adapter *)data;
4628 /* Do the rest outside of interrupt context */
4629 schedule_work(&adapter->watchdog_task);
4632 static void igb_watchdog_task(struct work_struct *work)
4634 struct igb_adapter *adapter = container_of(work,
4637 struct e1000_hw *hw = &adapter->hw;
4638 struct net_device *netdev = adapter->netdev;
4641 u32 thstat, ctrl_ext;
4644 link = igb_has_link(adapter);
4645 /* Force link down if we have fiber to swap to */
4646 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4647 if (hw->phy.media_type == e1000_media_type_copper) {
4648 connsw = E1000_READ_REG(hw, E1000_CONNSW);
4649 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4654 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4655 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4656 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4662 /* Perform a reset if the media type changed. */
4663 if (hw->dev_spec._82575.media_changed) {
4664 hw->dev_spec._82575.media_changed = false;
4665 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4669 /* Cancel scheduled suspend requests. */
4670 pm_runtime_resume(netdev->dev.parent);
4672 if (!netif_carrier_ok(netdev)) {
4674 e1000_get_speed_and_duplex(hw,
4675 &adapter->link_speed,
4676 &adapter->link_duplex);
4678 ctrl = E1000_READ_REG(hw, E1000_CTRL);
4679 /* Links status message must follow this format */
4680 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4681 "Flow Control: %s\n",
4683 adapter->link_speed,
4684 adapter->link_duplex == FULL_DUPLEX ?
4685 "Full Duplex" : "Half Duplex",
4686 ((ctrl & E1000_CTRL_TFCE) &&
4687 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4688 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4689 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
4690 /* adjust timeout factor according to speed/duplex */
4691 adapter->tx_timeout_factor = 1;
4692 switch (adapter->link_speed) {
4694 adapter->tx_timeout_factor = 14;
4697 /* maybe add some timeout factor ? */
4703 netif_carrier_on(netdev);
4704 netif_tx_wake_all_queues(netdev);
4706 igb_ping_all_vfs(adapter);
4708 igb_check_vf_rate_limit(adapter);
4709 #endif /* IFLA_VF_MAX */
4711 /* link state has changed, schedule phy info update */
4712 if (!test_bit(__IGB_DOWN, &adapter->state))
4713 mod_timer(&adapter->phy_info_timer,
4714 round_jiffies(jiffies + 2 * HZ));
4717 if (netif_carrier_ok(netdev)) {
4718 adapter->link_speed = 0;
4719 adapter->link_duplex = 0;
4720 /* check for thermal sensor event on i350 */
4721 if (hw->mac.type == e1000_i350) {
4722 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4723 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4724 if ((hw->phy.media_type ==
4725 e1000_media_type_copper) &&
4727 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4728 if (thstat & E1000_THSTAT_PWR_DOWN) {
4729 printk(KERN_ERR "igb: %s The "
4730 "network adapter was stopped "
4731 "because it overheated.\n",
4734 if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4736 "igb: %s The network "
4737 "adapter supported "
4747 /* Links status message must follow this format */
4748 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4750 netif_carrier_off(netdev);
4751 netif_tx_stop_all_queues(netdev);
4753 igb_ping_all_vfs(adapter);
4755 /* link state has changed, schedule phy info update */
4756 if (!test_bit(__IGB_DOWN, &adapter->state))
4757 mod_timer(&adapter->phy_info_timer,
4758 round_jiffies(jiffies + 2 * HZ));
4759 /* link is down, time to check for alternate media */
4760 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4761 igb_check_swap_media(adapter);
4762 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4763 schedule_work(&adapter->reset_task);
4764 /* return immediately */
4768 pm_schedule_suspend(netdev->dev.parent,
4771 /* also check for alternate media here */
4772 } else if (!netif_carrier_ok(netdev) &&
4773 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4774 hw->mac.ops.power_up_serdes(hw);
4775 igb_check_swap_media(adapter);
4776 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4777 schedule_work(&adapter->reset_task);
4778 /* return immediately */
4784 igb_update_stats(adapter);
4786 for (i = 0; i < adapter->num_tx_queues; i++) {
4787 struct igb_ring *tx_ring = adapter->tx_ring[i];
4788 if (!netif_carrier_ok(netdev)) {
4789 /* We've lost link, so the controller stops DMA,
4790 * but we've got queued Tx work that's never going
4791 * to get done, so reset controller to flush Tx.
4792 * (Do the reset outside of interrupt context). */
4793 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4794 adapter->tx_timeout_count++;
4795 schedule_work(&adapter->reset_task);
4796 /* return immediately since reset is imminent */
4801 /* Force detection of hung controller every watchdog period */
4802 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4805 /* Cause software interrupt to ensure rx ring is cleaned */
4806 if (adapter->msix_entries) {
4808 for (i = 0; i < adapter->num_q_vectors; i++)
4809 eics |= adapter->q_vector[i]->eims_value;
4810 E1000_WRITE_REG(hw, E1000_EICS, eics);
4812 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4815 igb_spoof_check(adapter);
4817 /* Reset the timer */
4818 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4819 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4820 mod_timer(&adapter->watchdog_timer,
4821 round_jiffies(jiffies + HZ));
4823 mod_timer(&adapter->watchdog_timer,
4824 round_jiffies(jiffies + 2 * HZ));
4828 static void igb_dma_err_task(struct work_struct *work)
4830 struct igb_adapter *adapter = container_of(work,
4834 struct e1000_hw *hw = &adapter->hw;
4835 struct net_device *netdev = adapter->netdev;
4839 hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4840 if (hgptc) /* If incrementing then no need for the check below */
4841 goto dma_timer_reset;
4843 * Check to see if a bad DMA write target from an errant or
4844 * malicious VF has caused a PCIe error. If so then we can
4845 * issue a VFLR to the offending VF(s) and then resume without
4846 * requesting a full slot reset.
4849 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4850 ciaa = (vf << 16) | 0x80000000;
4851 /* 32 bit read so align, we really want status at offset 6 */
4852 ciaa |= PCI_COMMAND;
4853 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4854 ciad = E1000_READ_REG(hw, E1000_CIAD);
4856 /* disable debug mode asap after reading data */
4857 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4858 /* Get the upper 16 bits which will be the PCI status reg */
4860 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4861 PCI_STATUS_REC_TARGET_ABORT |
4862 PCI_STATUS_SIG_SYSTEM_ERROR)) {
4863 netdev_err(netdev, "VF %d suffered error\n", vf);
4865 ciaa = (vf << 16) | 0x80000000;
4867 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4868 ciad = 0x00008000; /* VFLR */
4869 E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4871 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4875 /* Reset the timer */
4876 if (!test_bit(__IGB_DOWN, &adapter->state))
4877 mod_timer(&adapter->dma_err_timer,
4878 round_jiffies(jiffies + HZ / 10));
4882 * igb_dma_err_timer - Timer Call-back
4883 * @data: pointer to adapter cast into an unsigned long
4885 #ifdef HAVE_TIMER_SETUP
4886 static void igb_dma_err_timer(struct timer_list *t)
4888 struct igb_adapter *adapter = from_timer(adapter, t, dma_err_timer);
4890 static void igb_dma_err_timer(unsigned long data)
4892 struct igb_adapter *adapter = (struct igb_adapter *)data;
4894 /* Do the rest outside of interrupt context */
4895 schedule_work(&adapter->dma_err_task);
4898 enum latency_range {
4902 latency_invalid = 255
4906 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4908 * Stores a new ITR value based on strictly on packet size. This
4909 * algorithm is less sophisticated than that used in igb_update_itr,
4910 * due to the difficulty of synchronizing statistics across multiple
4911 * receive rings. The divisors and thresholds used by this function
4912 * were determined based on theoretical maximum wire speed and testing
4913 * data, in order to minimize response time while increasing bulk
4915 * This functionality is controlled by the InterruptThrottleRate module
4916 * parameter (see igb_param.c)
4917 * NOTE: This function is called only when operating in a multiqueue
4918 * receive environment.
4919 * @q_vector: pointer to q_vector
4921 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4923 int new_val = q_vector->itr_val;
4924 int avg_wire_size = 0;
4925 struct igb_adapter *adapter = q_vector->adapter;
4926 unsigned int packets;
4928 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4929 * ints/sec - ITR timer value of 120 ticks.
4931 switch (adapter->link_speed) {
4934 new_val = IGB_4K_ITR;
4940 packets = q_vector->rx.total_packets;
4942 avg_wire_size = q_vector->rx.total_bytes / packets;
4944 packets = q_vector->tx.total_packets;
4946 avg_wire_size = max_t(u32, avg_wire_size,
4947 q_vector->tx.total_bytes / packets);
4949 /* if avg_wire_size isn't set no work was done */
4953 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4954 avg_wire_size += 24;
4956 /* Don't starve jumbo frames */
4957 avg_wire_size = min(avg_wire_size, 3000);
4959 /* Give a little boost to mid-size frames */
4960 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4961 new_val = avg_wire_size / 3;
4963 new_val = avg_wire_size / 2;
4965 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4966 if (new_val < IGB_20K_ITR &&
4967 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4968 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4969 new_val = IGB_20K_ITR;
4972 if (new_val != q_vector->itr_val) {
4973 q_vector->itr_val = new_val;
4974 q_vector->set_itr = 1;
4977 q_vector->rx.total_bytes = 0;
4978 q_vector->rx.total_packets = 0;
4979 q_vector->tx.total_bytes = 0;
4980 q_vector->tx.total_packets = 0;
4984 * igb_update_itr - update the dynamic ITR value based on statistics
4985 * Stores a new ITR value based on packets and byte
4986 * counts during the last interrupt. The advantage of per interrupt
4987 * computation is faster updates and more accurate ITR for the current
4988 * traffic pattern. Constants in this function were computed
4989 * based on theoretical maximum wire speed and thresholds were set based
4990 * on testing data as well as attempting to minimize response time
4991 * while increasing bulk throughput.
4992 * this functionality is controlled by the InterruptThrottleRate module
4993 * parameter (see igb_param.c)
4994 * NOTE: These calculations are only valid when operating in a single-
4995 * queue environment.
4996 * @q_vector: pointer to q_vector
4997 * @ring_container: ring info to update the itr for
4999 static void igb_update_itr(struct igb_q_vector *q_vector,
5000 struct igb_ring_container *ring_container)
5002 unsigned int packets = ring_container->total_packets;
5003 unsigned int bytes = ring_container->total_bytes;
5004 u8 itrval = ring_container->itr;
5006 /* no packets, exit with status unchanged */
5011 case lowest_latency:
5012 /* handle TSO and jumbo frames */
5013 if (bytes/packets > 8000)
5014 itrval = bulk_latency;
5015 else if ((packets < 5) && (bytes > 512))
5016 itrval = low_latency;
5018 case low_latency: /* 50 usec aka 20000 ints/s */
5019 if (bytes > 10000) {
5020 /* this if handles the TSO accounting */
5021 if (bytes/packets > 8000) {
5022 itrval = bulk_latency;
5023 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
5024 itrval = bulk_latency;
5025 } else if ((packets > 35)) {
5026 itrval = lowest_latency;
5028 } else if (bytes/packets > 2000) {
5029 itrval = bulk_latency;
5030 } else if (packets <= 2 && bytes < 512) {
5031 itrval = lowest_latency;
5034 case bulk_latency: /* 250 usec aka 4000 ints/s */
5035 if (bytes > 25000) {
5037 itrval = low_latency;
5038 } else if (bytes < 1500) {
5039 itrval = low_latency;
5044 /* clear work counters since we have the values we need */
5045 ring_container->total_bytes = 0;
5046 ring_container->total_packets = 0;
5048 /* write updated itr to ring container */
5049 ring_container->itr = itrval;
5052 static void igb_set_itr(struct igb_q_vector *q_vector)
5054 struct igb_adapter *adapter = q_vector->adapter;
5055 u32 new_itr = q_vector->itr_val;
5058 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5059 switch (adapter->link_speed) {
5063 new_itr = IGB_4K_ITR;
5069 igb_update_itr(q_vector, &q_vector->tx);
5070 igb_update_itr(q_vector, &q_vector->rx);
5072 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5074 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5075 if (current_itr == lowest_latency &&
5076 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5077 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5078 current_itr = low_latency;
5080 switch (current_itr) {
5081 /* counts and packets in update_itr are dependent on these numbers */
5082 case lowest_latency:
5083 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5086 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5089 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5096 if (new_itr != q_vector->itr_val) {
5097 /* this attempts to bias the interrupt rate towards Bulk
5098 * by adding intermediate steps when interrupt rate is
5100 new_itr = new_itr > q_vector->itr_val ?
5101 max((new_itr * q_vector->itr_val) /
5102 (new_itr + (q_vector->itr_val >> 2)),
5105 /* Don't write the value here; it resets the adapter's
5106 * internal timer, and causes us to delay far longer than
5107 * we should between interrupts. Instead, we write the ITR
5108 * value at the beginning of the next interrupt so the timing
5109 * ends up being correct.
5111 q_vector->itr_val = new_itr;
5112 q_vector->set_itr = 1;
5116 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5117 u32 type_tucmd, u32 mss_l4len_idx)
5119 struct e1000_adv_tx_context_desc *context_desc;
5120 u16 i = tx_ring->next_to_use;
5122 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5125 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5127 /* set bits to identify this as an advanced context descriptor */
5128 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5130 /* For 82575, context index must be unique per ring. */
5131 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5132 mss_l4len_idx |= tx_ring->reg_idx << 4;
5134 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5135 context_desc->seqnum_seed = 0;
5136 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5137 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5140 static int igb_tso(struct igb_ring *tx_ring,
5141 struct igb_tx_buffer *first,
5145 struct sk_buff *skb = first->skb;
5146 u32 vlan_macip_lens, type_tucmd;
5147 u32 mss_l4len_idx, l4len;
5149 if (skb->ip_summed != CHECKSUM_PARTIAL)
5152 if (!skb_is_gso(skb))
5153 #endif /* NETIF_F_TSO */
5157 if (skb_header_cloned(skb)) {
5158 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5163 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5164 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5166 if (first->protocol == __constant_htons(ETH_P_IP)) {
5167 struct iphdr *iph = ip_hdr(skb);
5170 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5174 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5175 first->tx_flags |= IGB_TX_FLAGS_TSO |
5179 } else if (skb_is_gso_v6(skb)) {
5180 ipv6_hdr(skb)->payload_len = 0;
5181 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5182 &ipv6_hdr(skb)->daddr,
5184 first->tx_flags |= IGB_TX_FLAGS_TSO |
5189 /* compute header lengths */
5190 l4len = tcp_hdrlen(skb);
5191 *hdr_len = skb_transport_offset(skb) + l4len;
5193 /* update gso size and bytecount with header size */
5194 first->gso_segs = skb_shinfo(skb)->gso_segs;
5195 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5198 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5199 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5201 /* VLAN MACLEN IPLEN */
5202 vlan_macip_lens = skb_network_header_len(skb);
5203 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5204 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5206 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5209 #endif /* NETIF_F_TSO */
5212 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5214 struct sk_buff *skb = first->skb;
5215 u32 vlan_macip_lens = 0;
5216 u32 mss_l4len_idx = 0;
5219 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5220 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5224 switch (first->protocol) {
5225 case __constant_htons(ETH_P_IP):
5226 vlan_macip_lens |= skb_network_header_len(skb);
5227 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5228 nexthdr = ip_hdr(skb)->protocol;
5230 #ifdef NETIF_F_IPV6_CSUM
5231 case __constant_htons(ETH_P_IPV6):
5232 vlan_macip_lens |= skb_network_header_len(skb);
5233 nexthdr = ipv6_hdr(skb)->nexthdr;
5237 if (unlikely(net_ratelimit())) {
5238 dev_warn(tx_ring->dev,
5239 "partial checksum but proto=%x!\n",
5247 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5248 mss_l4len_idx = tcp_hdrlen(skb) <<
5249 E1000_ADVTXD_L4LEN_SHIFT;
5253 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5254 mss_l4len_idx = sizeof(struct sctphdr) <<
5255 E1000_ADVTXD_L4LEN_SHIFT;
5259 mss_l4len_idx = sizeof(struct udphdr) <<
5260 E1000_ADVTXD_L4LEN_SHIFT;
5263 if (unlikely(net_ratelimit())) {
5264 dev_warn(tx_ring->dev,
5265 "partial checksum but l4 proto=%x!\n",
5271 /* update TX checksum flag */
5272 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5275 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5276 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5278 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5281 #define IGB_SET_FLAG(_input, _flag, _result) \
5282 ((_flag <= _result) ? \
5283 ((u32)(_input & _flag) * (_result / _flag)) : \
5284 ((u32)(_input & _flag) / (_flag / _result)))
5286 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5288 /* set type for advanced descriptor with frame checksum insertion */
5289 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5290 E1000_ADVTXD_DCMD_DEXT |
5291 E1000_ADVTXD_DCMD_IFCS;
5293 /* set HW vlan bit if vlan is present */
5294 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5295 (E1000_ADVTXD_DCMD_VLE));
5297 /* set segmentation bits for TSO */
5298 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5299 (E1000_ADVTXD_DCMD_TSE));
5301 /* set timestamp bit if present */
5302 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5303 (E1000_ADVTXD_MAC_TSTAMP));
5308 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5309 union e1000_adv_tx_desc *tx_desc,
5310 u32 tx_flags, unsigned int paylen)
5312 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5314 /* 82575 requires a unique index per ring */
5315 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5316 olinfo_status |= tx_ring->reg_idx << 4;
5318 /* insert L4 checksum */
5319 olinfo_status |= IGB_SET_FLAG(tx_flags,
5321 (E1000_TXD_POPTS_TXSM << 8));
5323 /* insert IPv4 checksum */
5324 olinfo_status |= IGB_SET_FLAG(tx_flags,
5326 (E1000_TXD_POPTS_IXSM << 8));
5328 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5331 static void igb_tx_map(struct igb_ring *tx_ring,
5332 struct igb_tx_buffer *first,
5335 struct sk_buff *skb = first->skb;
5336 struct igb_tx_buffer *tx_buffer;
5337 union e1000_adv_tx_desc *tx_desc;
5338 struct skb_frag_struct *frag;
5340 unsigned int data_len, size;
5341 u32 tx_flags = first->tx_flags;
5342 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5343 u16 i = tx_ring->next_to_use;
5345 tx_desc = IGB_TX_DESC(tx_ring, i);
5347 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5349 size = skb_headlen(skb);
5350 data_len = skb->data_len;
5352 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5356 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5357 if (dma_mapping_error(tx_ring->dev, dma))
5360 /* record length, and DMA address */
5361 dma_unmap_len_set(tx_buffer, len, size);
5362 dma_unmap_addr_set(tx_buffer, dma, dma);
5364 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5366 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5367 tx_desc->read.cmd_type_len =
5368 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5372 if (i == tx_ring->count) {
5373 tx_desc = IGB_TX_DESC(tx_ring, 0);
5376 tx_desc->read.olinfo_status = 0;
5378 dma += IGB_MAX_DATA_PER_TXD;
5379 size -= IGB_MAX_DATA_PER_TXD;
5381 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5384 if (likely(!data_len))
5387 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5391 if (i == tx_ring->count) {
5392 tx_desc = IGB_TX_DESC(tx_ring, 0);
5395 tx_desc->read.olinfo_status = 0;
5397 size = skb_frag_size(frag);
5400 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5401 size, DMA_TO_DEVICE);
5403 tx_buffer = &tx_ring->tx_buffer_info[i];
5406 /* write last descriptor with RS and EOP bits */
5407 cmd_type |= size | IGB_TXD_DCMD;
5408 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5410 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5411 /* set the timestamp */
5412 first->time_stamp = jiffies;
5415 * Force memory writes to complete before letting h/w know there
5416 * are new descriptors to fetch. (Only applicable for weak-ordered
5417 * memory model archs, such as IA-64).
5419 * We also need this memory barrier to make certain all of the
5420 * status bits have been updated before next_to_watch is written.
5424 /* set next_to_watch value indicating a packet is present */
5425 first->next_to_watch = tx_desc;
5428 if (i == tx_ring->count)
5431 tx_ring->next_to_use = i;
5433 writel(i, tx_ring->tail);
5435 /* we need this if more than one processor can write to our tail
5436 * at a time, it syncronizes IO on IA64/Altix systems */
5442 dev_err(tx_ring->dev, "TX DMA map failed\n");
5444 /* clear dma mappings for failed tx_buffer_info map */
5446 tx_buffer = &tx_ring->tx_buffer_info[i];
5447 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5448 if (tx_buffer == first)
5455 tx_ring->next_to_use = i;
5458 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5460 struct net_device *netdev = netdev_ring(tx_ring);
5462 if (netif_is_multiqueue(netdev))
5463 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5465 netif_stop_queue(netdev);
5467 /* Herbert's original patch had:
5468 * smp_mb__after_netif_stop_queue();
5469 * but since that doesn't exist yet, just open code it. */
5472 /* We need to check again in a case another CPU has just
5473 * made room available. */
5474 if (igb_desc_unused(tx_ring) < size)
5478 if (netif_is_multiqueue(netdev))
5479 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5481 netif_wake_queue(netdev);
5483 tx_ring->tx_stats.restart_queue++;
5488 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5490 if (igb_desc_unused(tx_ring) >= size)
5492 return __igb_maybe_stop_tx(tx_ring, size);
5495 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5496 struct igb_ring *tx_ring)
5498 struct igb_tx_buffer *first;
5501 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5504 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5505 __be16 protocol = vlan_get_protocol(skb);
5509 * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5510 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5511 * + 2 desc gap to keep tail from touching head,
5512 * + 1 desc for context descriptor,
5513 * otherwise try next time
5515 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5516 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5517 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5519 count += skb_shinfo(skb)->nr_frags;
5521 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5522 /* this is a hard error */
5523 return NETDEV_TX_BUSY;
5526 /* record the location of the first descriptor for this packet */
5527 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5529 first->bytecount = skb->len;
5530 first->gso_segs = 1;
5532 skb_tx_timestamp(skb);
5534 #ifdef HAVE_PTP_1588_CLOCK
5535 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5536 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5537 if (!adapter->ptp_tx_skb) {
5538 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5539 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5541 adapter->ptp_tx_skb = skb_get(skb);
5542 adapter->ptp_tx_start = jiffies;
5543 if (adapter->hw.mac.type == e1000_82576)
5544 schedule_work(&adapter->ptp_tx_work);
5547 #endif /* HAVE_PTP_1588_CLOCK */
5549 if (vlan_tx_tag_present(skb)) {
5550 tx_flags |= IGB_TX_FLAGS_VLAN;
5551 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5554 /* record initial flags and protocol */
5555 first->tx_flags = tx_flags;
5556 first->protocol = protocol;
5558 tso = igb_tso(tx_ring, first, &hdr_len);
5562 igb_tx_csum(tx_ring, first);
5564 igb_tx_map(tx_ring, first, hdr_len);
5566 #ifndef HAVE_TRANS_START_IN_QUEUE
5567 netdev_ring(tx_ring)->trans_start = jiffies;
5570 /* Make sure there is space in the ring for the next send. */
5571 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5573 return NETDEV_TX_OK;
5576 igb_unmap_and_free_tx_resource(tx_ring, first);
5578 return NETDEV_TX_OK;
5582 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5583 struct sk_buff *skb)
5585 unsigned int r_idx = skb->queue_mapping;
5587 if (r_idx >= adapter->num_tx_queues)
5588 r_idx = r_idx % adapter->num_tx_queues;
5590 return adapter->tx_ring[r_idx];
5593 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5596 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5597 struct net_device *netdev)
5599 struct igb_adapter *adapter = netdev_priv(netdev);
5601 if (test_bit(__IGB_DOWN, &adapter->state)) {
5602 dev_kfree_skb_any(skb);
5603 return NETDEV_TX_OK;
5606 if (skb->len <= 0) {
5607 dev_kfree_skb_any(skb);
5608 return NETDEV_TX_OK;
5612 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5613 * in order to meet this minimum size requirement.
5615 if (skb->len < 17) {
5616 if (skb_padto(skb, 17))
5617 return NETDEV_TX_OK;
5621 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5625 * igb_tx_timeout - Respond to a Tx Hang
5626 * @netdev: network interface device structure
5628 static void igb_tx_timeout(struct net_device *netdev)
5630 struct igb_adapter *adapter = netdev_priv(netdev);
5631 struct e1000_hw *hw = &adapter->hw;
5633 /* Do the reset outside of interrupt context */
5634 adapter->tx_timeout_count++;
5636 if (hw->mac.type >= e1000_82580)
5637 hw->dev_spec._82575.global_device_reset = true;
5639 schedule_work(&adapter->reset_task);
5640 E1000_WRITE_REG(hw, E1000_EICS,
5641 (adapter->eims_enable_mask & ~adapter->eims_other));
5644 static void igb_reset_task(struct work_struct *work)
5646 struct igb_adapter *adapter;
5647 adapter = container_of(work, struct igb_adapter, reset_task);
5649 igb_reinit_locked(adapter);
5653 * igb_get_stats - Get System Network Statistics
5654 * @netdev: network interface device structure
5656 * Returns the address of the device statistics structure.
5657 * The statistics are updated here and also from the timer callback.
5659 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5661 struct igb_adapter *adapter = netdev_priv(netdev);
5663 if (!test_bit(__IGB_RESETTING, &adapter->state))
5664 igb_update_stats(adapter);
5666 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5667 /* only return the current stats */
5668 return &netdev->stats;
5670 /* only return the current stats */
5671 return &adapter->net_stats;
5672 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5676 * igb_change_mtu - Change the Maximum Transfer Unit
5677 * @netdev: network interface device structure
5678 * @new_mtu: new value for maximum frame size
5680 * Returns 0 on success, negative on failure
5682 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5684 struct igb_adapter *adapter = netdev_priv(netdev);
5685 struct e1000_hw *hw = &adapter->hw;
5686 struct pci_dev *pdev = adapter->pdev;
5687 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5689 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5690 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5694 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5695 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5696 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5700 /* adjust max frame to be at least the size of a standard frame */
5701 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5702 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5704 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5705 usleep_range(1000, 2000);
5707 /* igb_down has a dependency on max_frame_size */
5708 adapter->max_frame_size = max_frame;
5710 if (netif_running(netdev))
5713 dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5714 netdev->mtu, new_mtu);
5715 netdev->mtu = new_mtu;
5716 hw->dev_spec._82575.mtu = new_mtu;
5718 if (netif_running(netdev))
5723 clear_bit(__IGB_RESETTING, &adapter->state);
5729 * igb_update_stats - Update the board statistics counters
5730 * @adapter: board private structure
5733 void igb_update_stats(struct igb_adapter *adapter)
5735 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5736 struct net_device_stats *net_stats = &adapter->netdev->stats;
5738 struct net_device_stats *net_stats = &adapter->net_stats;
5739 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5740 struct e1000_hw *hw = &adapter->hw;
5742 struct pci_dev *pdev = adapter->pdev;
5749 u32 flushed = 0, coal = 0;
5750 struct igb_q_vector *q_vector;
5753 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5756 * Prevent stats update while adapter is being reset, or if the pci
5757 * connection is down.
5759 if (adapter->link_speed == 0)
5762 if (pci_channel_offline(pdev))
5767 for (i = 0; i < adapter->num_q_vectors; i++) {
5768 q_vector = adapter->q_vector[i];
5771 flushed += q_vector->lrolist.stats.flushed;
5772 coal += q_vector->lrolist.stats.coal;
5774 adapter->lro_stats.flushed = flushed;
5775 adapter->lro_stats.coal = coal;
5780 for (i = 0; i < adapter->num_rx_queues; i++) {
5781 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5782 struct igb_ring *ring = adapter->rx_ring[i];
5783 ring->rx_stats.drops += rqdpc_tmp;
5784 net_stats->rx_fifo_errors += rqdpc_tmp;
5785 #ifdef CONFIG_IGB_VMDQ_NETDEV
5786 if (!ring->vmdq_netdev) {
5787 bytes += ring->rx_stats.bytes;
5788 packets += ring->rx_stats.packets;
5791 bytes += ring->rx_stats.bytes;
5792 packets += ring->rx_stats.packets;
5796 net_stats->rx_bytes = bytes;
5797 net_stats->rx_packets = packets;
5801 for (i = 0; i < adapter->num_tx_queues; i++) {
5802 struct igb_ring *ring = adapter->tx_ring[i];
5803 #ifdef CONFIG_IGB_VMDQ_NETDEV
5804 if (!ring->vmdq_netdev) {
5805 bytes += ring->tx_stats.bytes;
5806 packets += ring->tx_stats.packets;
5809 bytes += ring->tx_stats.bytes;
5810 packets += ring->tx_stats.packets;
5813 net_stats->tx_bytes = bytes;
5814 net_stats->tx_packets = packets;
5816 /* read stats registers */
5817 adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5818 adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5819 adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5820 E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5821 adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5822 adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5823 adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5825 adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5826 adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5827 adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5828 adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5829 adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5830 adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5831 adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5832 adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5834 mpc = E1000_READ_REG(hw, E1000_MPC);
5835 adapter->stats.mpc += mpc;
5836 net_stats->rx_fifo_errors += mpc;
5837 adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5838 adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5839 adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5840 adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5841 adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5842 adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5843 adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5844 adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5845 adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5846 adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5847 adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5848 adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5849 adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5850 E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5851 adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5852 adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5853 adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5854 adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5855 adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5856 adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5857 adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5859 adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5860 adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5861 adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5862 adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5863 adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5864 adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5866 adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5867 adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5869 adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5870 adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5872 adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5873 /* read internal phy sepecific stats */
5874 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5875 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5876 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5878 /* this stat has invalid values on i210/i211 */
5879 if ((hw->mac.type != e1000_i210) &&
5880 (hw->mac.type != e1000_i211))
5881 adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5883 adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5884 adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5886 adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5887 adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5888 adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5889 adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5890 adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5891 adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5892 adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5893 adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5894 adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5896 /* Fill out the OS statistics structure */
5897 net_stats->multicast = adapter->stats.mprc;
5898 net_stats->collisions = adapter->stats.colc;
5902 /* RLEC on some newer hardware can be incorrect so build
5903 * our own version based on RUC and ROC */
5904 net_stats->rx_errors = adapter->stats.rxerrc +
5905 adapter->stats.crcerrs + adapter->stats.algnerrc +
5906 adapter->stats.ruc + adapter->stats.roc +
5907 adapter->stats.cexterr;
5908 net_stats->rx_length_errors = adapter->stats.ruc +
5910 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5911 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5912 net_stats->rx_missed_errors = adapter->stats.mpc;
5915 net_stats->tx_errors = adapter->stats.ecol +
5916 adapter->stats.latecol;
5917 net_stats->tx_aborted_errors = adapter->stats.ecol;
5918 net_stats->tx_window_errors = adapter->stats.latecol;
5919 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5921 /* Tx Dropped needs to be maintained elsewhere */
5924 if (hw->phy.media_type == e1000_media_type_copper) {
5925 if ((adapter->link_speed == SPEED_1000) &&
5926 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5927 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5928 adapter->phy_stats.idle_errors += phy_tmp;
5932 /* Management Stats */
5933 adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5934 adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5935 if (hw->mac.type > e1000_82580) {
5936 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5937 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5938 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5939 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5943 static irqreturn_t igb_msix_other(int irq, void *data)
5945 struct igb_adapter *adapter = data;
5946 struct e1000_hw *hw = &adapter->hw;
5947 u32 icr = E1000_READ_REG(hw, E1000_ICR);
5948 /* reading ICR causes bit 31 of EICR to be cleared */
5950 if (icr & E1000_ICR_DRSTA)
5951 schedule_work(&adapter->reset_task);
5953 if (icr & E1000_ICR_DOUTSYNC) {
5954 /* HW is reporting DMA is out of sync */
5955 adapter->stats.doosync++;
5956 /* The DMA Out of Sync is also indication of a spoof event
5957 * in IOV mode. Check the Wrong VM Behavior register to
5958 * see if it is really a spoof event. */
5959 igb_check_wvbr(adapter);
5962 /* Check for a mailbox event */
5963 if (icr & E1000_ICR_VMMB)
5964 igb_msg_task(adapter);
5966 if (icr & E1000_ICR_LSC) {
5967 hw->mac.get_link_status = 1;
5968 /* guard against interrupt when we're going down */
5969 if (!test_bit(__IGB_DOWN, &adapter->state))
5970 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5973 #ifdef HAVE_PTP_1588_CLOCK
5974 if (icr & E1000_ICR_TS) {
5975 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5977 if (tsicr & E1000_TSICR_TXTS) {
5978 /* acknowledge the interrupt */
5979 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5980 /* retrieve hardware timestamp */
5981 schedule_work(&adapter->ptp_tx_work);
5984 #endif /* HAVE_PTP_1588_CLOCK */
5986 /* Check for MDD event */
5987 if (icr & E1000_ICR_MDDET)
5988 igb_process_mdd_event(adapter);
5990 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5995 static void igb_write_itr(struct igb_q_vector *q_vector)
5997 struct igb_adapter *adapter = q_vector->adapter;
5998 u32 itr_val = q_vector->itr_val & 0x7FFC;
6000 if (!q_vector->set_itr)
6006 if (adapter->hw.mac.type == e1000_82575)
6007 itr_val |= itr_val << 16;
6009 itr_val |= E1000_EITR_CNT_IGNR;
6011 writel(itr_val, q_vector->itr_register);
6012 q_vector->set_itr = 0;
6015 static irqreturn_t igb_msix_ring(int irq, void *data)
6017 struct igb_q_vector *q_vector = data;
6019 /* Write the ITR value calculated from the previous interrupt. */
6020 igb_write_itr(q_vector);
6022 napi_schedule(&q_vector->napi);
6028 static void igb_update_tx_dca(struct igb_adapter *adapter,
6029 struct igb_ring *tx_ring,
6032 struct e1000_hw *hw = &adapter->hw;
6033 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6035 if (hw->mac.type != e1000_82575)
6036 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
6039 * We can enable relaxed ordering for reads, but not writes when
6040 * DCA is enabled. This is due to a known issue in some chipsets
6041 * which will cause the DCA tag to be cleared.
6043 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6044 E1000_DCA_TXCTRL_DATA_RRO_EN |
6045 E1000_DCA_TXCTRL_DESC_DCA_EN;
6047 E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6050 static void igb_update_rx_dca(struct igb_adapter *adapter,
6051 struct igb_ring *rx_ring,
6054 struct e1000_hw *hw = &adapter->hw;
6055 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6057 if (hw->mac.type != e1000_82575)
6058 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6061 * We can enable relaxed ordering for reads, but not writes when
6062 * DCA is enabled. This is due to a known issue in some chipsets
6063 * which will cause the DCA tag to be cleared.
6065 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6066 E1000_DCA_RXCTRL_DESC_DCA_EN;
6068 E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6071 static void igb_update_dca(struct igb_q_vector *q_vector)
6073 struct igb_adapter *adapter = q_vector->adapter;
6074 int cpu = get_cpu();
6076 if (q_vector->cpu == cpu)
6079 if (q_vector->tx.ring)
6080 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6082 if (q_vector->rx.ring)
6083 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6085 q_vector->cpu = cpu;
6090 static void igb_setup_dca(struct igb_adapter *adapter)
6092 struct e1000_hw *hw = &adapter->hw;
6095 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6098 /* Always use CB2 mode, difference is masked in the CB driver. */
6099 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6101 for (i = 0; i < adapter->num_q_vectors; i++) {
6102 adapter->q_vector[i]->cpu = -1;
6103 igb_update_dca(adapter->q_vector[i]);
6107 static int __igb_notify_dca(struct device *dev, void *data)
6109 struct net_device *netdev = dev_get_drvdata(dev);
6110 struct igb_adapter *adapter = netdev_priv(netdev);
6111 struct pci_dev *pdev = adapter->pdev;
6112 struct e1000_hw *hw = &adapter->hw;
6113 unsigned long event = *(unsigned long *)data;
6116 case DCA_PROVIDER_ADD:
6117 /* if already enabled, don't do it again */
6118 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6120 if (dca_add_requester(dev) == E1000_SUCCESS) {
6121 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6122 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6123 igb_setup_dca(adapter);
6126 /* Fall Through since DCA is disabled. */
6127 case DCA_PROVIDER_REMOVE:
6128 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6129 /* without this a class_device is left
6130 * hanging around in the sysfs model */
6131 dca_remove_requester(dev);
6132 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6133 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6134 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6139 return E1000_SUCCESS;
6142 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6147 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6150 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6152 #endif /* IGB_DCA */
6154 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6156 unsigned char mac_addr[ETH_ALEN];
6158 random_ether_addr(mac_addr);
6159 igb_set_vf_mac(adapter, vf, mac_addr);
6162 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6163 /* By default spoof check is enabled for all VFs */
6164 adapter->vf_data[vf].spoofchk_enabled = true;
6171 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6173 struct e1000_hw *hw = &adapter->hw;
6177 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6178 ping = E1000_PF_CONTROL_MSG;
6179 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6180 ping |= E1000_VT_MSGTYPE_CTS;
6181 e1000_write_mbx(hw, &ping, 1, i);
6186 * igb_mta_set_ - Set multicast filter table address
6187 * @adapter: pointer to the adapter structure
6188 * @hash_value: determines the MTA register and bit to set
6190 * The multicast table address is a register array of 32-bit registers.
6191 * The hash_value is used to determine what register the bit is in, the
6192 * current value is read, the new bit is OR'd in and the new value is
6193 * written back into the register.
6195 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6197 struct e1000_hw *hw = &adapter->hw;
6198 u32 hash_bit, hash_reg, mta;
6201 * The MTA is a register array of 32-bit registers. It is
6202 * treated like an array of (32*mta_reg_count) bits. We want to
6203 * set bit BitArray[hash_value]. So we figure out what register
6204 * the bit is in, read it, OR in the new bit, then write
6205 * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
6206 * mask to bits 31:5 of the hash value which gives us the
6207 * register we're modifying. The hash bit within that register
6208 * is determined by the lower 5 bits of the hash value.
6210 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6211 hash_bit = hash_value & 0x1F;
6213 mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6215 mta |= (1 << hash_bit);
6217 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6218 E1000_WRITE_FLUSH(hw);
6221 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6224 struct e1000_hw *hw = &adapter->hw;
6225 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6226 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6228 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6229 IGB_VF_FLAG_MULTI_PROMISC);
6230 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6232 #ifdef IGB_ENABLE_VF_PROMISC
6233 if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6234 vmolr |= E1000_VMOLR_ROPE;
6235 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6236 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6239 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6240 vmolr |= E1000_VMOLR_MPME;
6241 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6242 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6245 * if we have hashes and we are clearing a multicast promisc
6246 * flag we need to write the hashes to the MTA as this step
6247 * was previously skipped
6249 if (vf_data->num_vf_mc_hashes > 30) {
6250 vmolr |= E1000_VMOLR_MPME;
6251 } else if (vf_data->num_vf_mc_hashes) {
6253 vmolr |= E1000_VMOLR_ROMPE;
6254 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6255 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6259 E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6261 /* there are flags left unprocessed, likely not supported */
6262 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6269 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6270 u32 *msgbuf, u32 vf)
6272 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6273 u16 *hash_list = (u16 *)&msgbuf[1];
6274 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6277 /* salt away the number of multicast addresses assigned
6278 * to this VF for later use to restore when the PF multi cast
6281 vf_data->num_vf_mc_hashes = n;
6283 /* only up to 30 hash values supported */
6287 /* store the hashes for later use */
6288 for (i = 0; i < n; i++)
6289 vf_data->vf_mc_hashes[i] = hash_list[i];
6291 /* Flush and reset the mta with the new values */
6292 igb_set_rx_mode(adapter->netdev);
6297 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6299 struct e1000_hw *hw = &adapter->hw;
6300 struct vf_data_storage *vf_data;
6303 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6304 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6305 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6307 vf_data = &adapter->vf_data[i];
6309 if ((vf_data->num_vf_mc_hashes > 30) ||
6310 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6311 vmolr |= E1000_VMOLR_MPME;
6312 } else if (vf_data->num_vf_mc_hashes) {
6313 vmolr |= E1000_VMOLR_ROMPE;
6314 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6315 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6317 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6321 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6323 struct e1000_hw *hw = &adapter->hw;
6324 u32 pool_mask, reg, vid;
6328 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6330 /* Find the vlan filter for this id */
6331 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6332 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6334 /* remove the vf from the pool */
6337 /* if pool is empty then remove entry from vfta */
6338 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6339 (reg & E1000_VLVF_VLANID_ENABLE)) {
6341 vid = reg & E1000_VLVF_VLANID_MASK;
6342 igb_vfta_set(adapter, vid, FALSE);
6345 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6348 adapter->vf_data[vf].vlans_enabled = 0;
6350 vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6352 igb_vlvf_set(adapter, vlan_default, true, vf);
6355 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6357 struct e1000_hw *hw = &adapter->hw;
6360 /* The vlvf table only exists on 82576 hardware and newer */
6361 if (hw->mac.type < e1000_82576)
6364 /* we only need to do this if VMDq is enabled */
6365 if (!adapter->vmdq_pools)
6368 /* Find the vlan filter for this id */
6369 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6370 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6371 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6372 vid == (reg & E1000_VLVF_VLANID_MASK))
6377 if (i == E1000_VLVF_ARRAY_SIZE) {
6378 /* Did not find a matching VLAN ID entry that was
6379 * enabled. Search for a free filter entry, i.e.
6380 * one without the enable bit set
6382 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6383 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6384 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6388 if (i < E1000_VLVF_ARRAY_SIZE) {
6389 /* Found an enabled/available entry */
6390 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6392 /* if !enabled we need to set this up in vfta */
6393 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6394 /* add VID to filter table */
6395 igb_vfta_set(adapter, vid, TRUE);
6396 reg |= E1000_VLVF_VLANID_ENABLE;
6398 reg &= ~E1000_VLVF_VLANID_MASK;
6400 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6402 /* do not modify RLPML for PF devices */
6403 if (vf >= adapter->vfs_allocated_count)
6404 return E1000_SUCCESS;
6406 if (!adapter->vf_data[vf].vlans_enabled) {
6408 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6409 size = reg & E1000_VMOLR_RLPML_MASK;
6411 reg &= ~E1000_VMOLR_RLPML_MASK;
6413 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6416 adapter->vf_data[vf].vlans_enabled++;
6419 if (i < E1000_VLVF_ARRAY_SIZE) {
6420 /* remove vf from the pool */
6421 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6422 /* if pool is empty then remove entry from vfta */
6423 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6425 igb_vfta_set(adapter, vid, FALSE);
6427 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6429 /* do not modify RLPML for PF devices */
6430 if (vf >= adapter->vfs_allocated_count)
6431 return E1000_SUCCESS;
6433 adapter->vf_data[vf].vlans_enabled--;
6434 if (!adapter->vf_data[vf].vlans_enabled) {
6436 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6437 size = reg & E1000_VMOLR_RLPML_MASK;
6439 reg &= ~E1000_VMOLR_RLPML_MASK;
6441 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6445 return E1000_SUCCESS;
6449 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6451 struct e1000_hw *hw = &adapter->hw;
6454 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6456 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6459 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6460 #ifdef HAVE_VF_VLAN_PROTO
6461 int vf, u16 vlan, u8 qos, __be16 vlan_proto)
6463 int vf, u16 vlan, u8 qos)
6467 struct igb_adapter *adapter = netdev_priv(netdev);
6469 /* VLAN IDs accepted range 0-4094 */
6470 if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6473 #ifdef HAVE_VF_VLAN_PROTO
6474 if (vlan_proto != htons(ETH_P_8021Q))
6475 return -EPROTONOSUPPORT;
6479 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6482 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6483 igb_set_vmolr(adapter, vf, !vlan);
6484 adapter->vf_data[vf].pf_vlan = vlan;
6485 adapter->vf_data[vf].pf_qos = qos;
6486 igb_set_vf_vlan_strip(adapter, vf, true);
6487 dev_info(&adapter->pdev->dev,
6488 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6489 if (test_bit(__IGB_DOWN, &adapter->state)) {
6490 dev_warn(&adapter->pdev->dev,
6491 "The VF VLAN has been set,"
6492 " but the PF device is not up.\n");
6493 dev_warn(&adapter->pdev->dev,
6494 "Bring the PF device up before"
6495 " attempting to use the VF device.\n");
6498 if (adapter->vf_data[vf].pf_vlan)
6499 dev_info(&adapter->pdev->dev,
6500 "Clearing VLAN on VF %d\n", vf);
6501 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6503 igb_set_vmvir(adapter, vlan, vf);
6504 igb_set_vmolr(adapter, vf, true);
6505 igb_set_vf_vlan_strip(adapter, vf, false);
6506 adapter->vf_data[vf].pf_vlan = 0;
6507 adapter->vf_data[vf].pf_qos = 0;
6513 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6514 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6517 struct igb_adapter *adapter = netdev_priv(netdev);
6518 struct e1000_hw *hw = &adapter->hw;
6519 u32 dtxswc, reg_offset;
6521 if (!adapter->vfs_allocated_count)
6524 if (vf >= adapter->vfs_allocated_count)
6527 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6528 dtxswc = E1000_READ_REG(hw, reg_offset);
6530 dtxswc |= ((1 << vf) |
6531 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6533 dtxswc &= ~((1 << vf) |
6534 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6535 E1000_WRITE_REG(hw, reg_offset, dtxswc);
6537 adapter->vf_data[vf].spoofchk_enabled = setting;
6538 return E1000_SUCCESS;
6540 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6541 #endif /* IFLA_VF_MAX */
6543 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6545 struct e1000_hw *hw = &adapter->hw;
6549 /* Find the vlan filter for this id */
6550 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6551 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6552 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6553 vid == (reg & E1000_VLVF_VLANID_MASK))
6557 if (i >= E1000_VLVF_ARRAY_SIZE)
6563 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6565 struct e1000_hw *hw = &adapter->hw;
6566 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6567 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6571 igb_set_vf_vlan_strip(adapter, vf, true);
6573 igb_set_vf_vlan_strip(adapter, vf, false);
6575 /* If in promiscuous mode we need to make sure the PF also has
6576 * the VLAN filter set.
6578 if (add && (adapter->netdev->flags & IFF_PROMISC))
6579 err = igb_vlvf_set(adapter, vid, add,
6580 adapter->vfs_allocated_count);
6584 err = igb_vlvf_set(adapter, vid, add, vf);
6589 /* Go through all the checks to see if the VLAN filter should
6590 * be wiped completely.
6592 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6595 int regndx = igb_find_vlvf_entry(adapter, vid);
6598 /* See if any other pools are set for this VLAN filter
6599 * entry other than the PF.
6601 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6602 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6603 adapter->vfs_allocated_count);
6604 /* If the filter was removed then ensure PF pool bit
6605 * is cleared if the PF only added itself to the pool
6606 * because the PF is in promiscuous mode.
6608 if ((vlvf & VLAN_VID_MASK) == vid &&
6609 #ifndef HAVE_VLAN_RX_REGISTER
6610 !test_bit(vid, adapter->active_vlans) &&
6613 igb_vlvf_set(adapter, vid, add,
6614 adapter->vfs_allocated_count);
6621 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6623 struct e1000_hw *hw = &adapter->hw;
6625 /* clear flags except flag that the PF has set the MAC */
6626 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6627 adapter->vf_data[vf].last_nack = jiffies;
6629 /* reset offloads to defaults */
6630 igb_set_vmolr(adapter, vf, true);
6632 /* reset vlans for device */
6633 igb_clear_vf_vfta(adapter, vf);
6635 if (adapter->vf_data[vf].pf_vlan)
6636 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6637 adapter->vf_data[vf].pf_vlan,
6638 #ifdef HAVE_VF_VLAN_PROTO
6639 adapter->vf_data[vf].pf_qos,
6640 htons(ETH_P_8021Q));
6642 adapter->vf_data[vf].pf_qos);
6645 igb_clear_vf_vfta(adapter, vf);
6648 /* reset multicast table array for vf */
6649 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6651 /* Flush and reset the mta with the new values */
6652 igb_set_rx_mode(adapter->netdev);
6655 * Reset the VFs TDWBAL and TDWBAH registers which are not
6658 E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6659 E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6660 if (hw->mac.type == e1000_82576) {
6661 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6662 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6666 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6668 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6670 /* generate a new mac address as we were hotplug removed/added */
6671 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6672 random_ether_addr(vf_mac);
6674 /* process remaining reset events */
6675 igb_vf_reset(adapter, vf);
6678 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6680 struct e1000_hw *hw = &adapter->hw;
6681 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6683 u8 *addr = (u8 *)(&msgbuf[1]);
6685 /* process all the same items cleared in a function level reset */
6686 igb_vf_reset(adapter, vf);
6688 /* set vf mac address */
6689 igb_del_mac_filter(adapter, vf_mac, vf);
6690 igb_add_mac_filter(adapter, vf_mac, vf);
6692 /* enable transmit and receive for vf */
6693 reg = E1000_READ_REG(hw, E1000_VFTE);
6694 E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6695 reg = E1000_READ_REG(hw, E1000_VFRE);
6696 E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6698 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6700 /* reply to reset with ack and vf mac address */
6701 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6702 memcpy(addr, vf_mac, 6);
6703 e1000_write_mbx(hw, msgbuf, 3, vf);
6706 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6709 * The VF MAC Address is stored in a packed array of bytes
6710 * starting at the second 32 bit word of the msg array
6712 unsigned char *addr = (unsigned char *)&msg[1];
6715 if (is_valid_ether_addr(addr))
6716 err = igb_set_vf_mac(adapter, vf, addr);
6721 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6723 struct e1000_hw *hw = &adapter->hw;
6724 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6725 u32 msg = E1000_VT_MSGTYPE_NACK;
6727 /* if device isn't clear to send it shouldn't be reading either */
6728 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6729 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6730 e1000_write_mbx(hw, &msg, 1, vf);
6731 vf_data->last_nack = jiffies;
6735 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6737 struct pci_dev *pdev = adapter->pdev;
6738 u32 msgbuf[E1000_VFMAILBOX_SIZE];
6739 struct e1000_hw *hw = &adapter->hw;
6740 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6743 retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6746 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6750 /* this is a message we already processed, do nothing */
6751 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6755 * until the vf completes a reset it should not be
6756 * allowed to start any configuration.
6759 if (msgbuf[0] == E1000_VF_RESET) {
6760 igb_vf_reset_msg(adapter, vf);
6764 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6765 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6766 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6767 e1000_write_mbx(hw, msgbuf, 1, vf);
6768 vf_data->last_nack = jiffies;
6773 switch ((msgbuf[0] & 0xFFFF)) {
6774 case E1000_VF_SET_MAC_ADDR:
6776 #ifndef IGB_DISABLE_VF_MAC_SET
6777 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6778 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6781 "VF %d attempted to override administratively "
6782 "set MAC address\nReload the VF driver to "
6783 "resume operations\n", vf);
6786 case E1000_VF_SET_PROMISC:
6787 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6789 case E1000_VF_SET_MULTICAST:
6790 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6792 case E1000_VF_SET_LPE:
6793 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6795 case E1000_VF_SET_VLAN:
6798 if (vf_data->pf_vlan)
6800 "VF %d attempted to override administratively "
6801 "set VLAN tag\nReload the VF driver to "
6802 "resume operations\n", vf);
6805 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6808 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6809 retval = -E1000_ERR_MBX;
6813 /* notify the VF of the results of what it sent us */
6815 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6817 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6819 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6821 e1000_write_mbx(hw, msgbuf, 1, vf);
6824 static void igb_msg_task(struct igb_adapter *adapter)
6826 struct e1000_hw *hw = &adapter->hw;
6829 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6830 /* process any reset requests */
6831 if (!e1000_check_for_rst(hw, vf))
6832 igb_vf_reset_event(adapter, vf);
6834 /* process any messages pending */
6835 if (!e1000_check_for_msg(hw, vf))
6836 igb_rcv_msg_from_vf(adapter, vf);
6838 /* process any acks */
6839 if (!e1000_check_for_ack(hw, vf))
6840 igb_rcv_ack_from_vf(adapter, vf);
6845 * igb_set_uta - Set unicast filter table address
6846 * @adapter: board private structure
6848 * The unicast table address is a register array of 32-bit registers.
6849 * The table is meant to be used in a way similar to how the MTA is used
6850 * however due to certain limitations in the hardware it is necessary to
6851 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6852 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6854 static void igb_set_uta(struct igb_adapter *adapter)
6856 struct e1000_hw *hw = &adapter->hw;
6859 /* The UTA table only exists on 82576 hardware and newer */
6860 if (hw->mac.type < e1000_82576)
6863 /* we only need to do this if VMDq is enabled */
6864 if (!adapter->vmdq_pools)
6867 for (i = 0; i < hw->mac.uta_reg_count; i++)
6868 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6872 * igb_intr_msi - Interrupt Handler
6873 * @irq: interrupt number
6874 * @data: pointer to a network interface device structure
6876 static irqreturn_t igb_intr_msi(int irq, void *data)
6878 struct igb_adapter *adapter = data;
6879 struct igb_q_vector *q_vector = adapter->q_vector[0];
6880 struct e1000_hw *hw = &adapter->hw;
6881 /* read ICR disables interrupts using IAM */
6882 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6884 igb_write_itr(q_vector);
6886 if (icr & E1000_ICR_DRSTA)
6887 schedule_work(&adapter->reset_task);
6889 if (icr & E1000_ICR_DOUTSYNC) {
6890 /* HW is reporting DMA is out of sync */
6891 adapter->stats.doosync++;
6894 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6895 hw->mac.get_link_status = 1;
6896 if (!test_bit(__IGB_DOWN, &adapter->state))
6897 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6900 #ifdef HAVE_PTP_1588_CLOCK
6901 if (icr & E1000_ICR_TS) {
6902 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6904 if (tsicr & E1000_TSICR_TXTS) {
6905 /* acknowledge the interrupt */
6906 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6907 /* retrieve hardware timestamp */
6908 schedule_work(&adapter->ptp_tx_work);
6911 #endif /* HAVE_PTP_1588_CLOCK */
6913 napi_schedule(&q_vector->napi);
6919 * igb_intr - Legacy Interrupt Handler
6920 * @irq: interrupt number
6921 * @data: pointer to a network interface device structure
6923 static irqreturn_t igb_intr(int irq, void *data)
6925 struct igb_adapter *adapter = data;
6926 struct igb_q_vector *q_vector = adapter->q_vector[0];
6927 struct e1000_hw *hw = &adapter->hw;
6928 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6929 * need for the IMC write */
6930 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6932 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6933 * not set, then the adapter didn't send an interrupt */
6934 if (!(icr & E1000_ICR_INT_ASSERTED))
6937 igb_write_itr(q_vector);
6939 if (icr & E1000_ICR_DRSTA)
6940 schedule_work(&adapter->reset_task);
6942 if (icr & E1000_ICR_DOUTSYNC) {
6943 /* HW is reporting DMA is out of sync */
6944 adapter->stats.doosync++;
6947 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6948 hw->mac.get_link_status = 1;
6949 /* guard against interrupt when we're going down */
6950 if (!test_bit(__IGB_DOWN, &adapter->state))
6951 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6954 #ifdef HAVE_PTP_1588_CLOCK
6955 if (icr & E1000_ICR_TS) {
6956 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6958 if (tsicr & E1000_TSICR_TXTS) {
6959 /* acknowledge the interrupt */
6960 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6961 /* retrieve hardware timestamp */
6962 schedule_work(&adapter->ptp_tx_work);
6965 #endif /* HAVE_PTP_1588_CLOCK */
6967 napi_schedule(&q_vector->napi);
6972 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6974 struct igb_adapter *adapter = q_vector->adapter;
6975 struct e1000_hw *hw = &adapter->hw;
6977 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6978 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6979 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6980 igb_set_itr(q_vector);
6982 igb_update_ring_itr(q_vector);
6985 if (!test_bit(__IGB_DOWN, &adapter->state)) {
6986 if (adapter->msix_entries)
6987 E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6989 igb_irq_enable(adapter);
6994 * igb_poll - NAPI Rx polling callback
6995 * @napi: napi polling structure
6996 * @budget: count of how many packets we should handle
6998 static int igb_poll(struct napi_struct *napi, int budget)
7000 struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
7001 bool clean_complete = true;
7004 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
7005 igb_update_dca(q_vector);
7007 if (q_vector->tx.ring)
7008 clean_complete = igb_clean_tx_irq(q_vector);
7010 if (q_vector->rx.ring)
7011 clean_complete &= igb_clean_rx_irq(q_vector, budget);
7013 #ifndef HAVE_NETDEV_NAPI_LIST
7014 /* if netdev is disabled we need to stop polling */
7015 if (!netif_running(q_vector->adapter->netdev))
7016 clean_complete = true;
7019 /* If all work not completed, return budget and keep polling */
7020 if (!clean_complete)
7023 /* If not enough Rx work done, exit the polling mode */
7024 napi_complete(napi);
7025 igb_ring_irq_enable(q_vector);
7031 * igb_clean_tx_irq - Reclaim resources after transmit completes
7032 * @q_vector: pointer to q_vector containing needed info
7033 * returns TRUE if ring is completely cleaned
7035 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
7037 struct igb_adapter *adapter = q_vector->adapter;
7038 struct igb_ring *tx_ring = q_vector->tx.ring;
7039 struct igb_tx_buffer *tx_buffer;
7040 union e1000_adv_tx_desc *tx_desc;
7041 unsigned int total_bytes = 0, total_packets = 0;
7042 unsigned int budget = q_vector->tx.work_limit;
7043 unsigned int i = tx_ring->next_to_clean;
7045 if (test_bit(__IGB_DOWN, &adapter->state))
7048 tx_buffer = &tx_ring->tx_buffer_info[i];
7049 tx_desc = IGB_TX_DESC(tx_ring, i);
7050 i -= tx_ring->count;
7053 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7055 /* if next_to_watch is not set then there is no work pending */
7059 /* prevent any other reads prior to eop_desc */
7060 read_barrier_depends();
7062 /* if DD is not set pending work has not been completed */
7063 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7066 /* clear next_to_watch to prevent false hangs */
7067 tx_buffer->next_to_watch = NULL;
7069 /* update the statistics for this packet */
7070 total_bytes += tx_buffer->bytecount;
7071 total_packets += tx_buffer->gso_segs;
7074 dev_kfree_skb_any(tx_buffer->skb);
7076 /* unmap skb header data */
7077 dma_unmap_single(tx_ring->dev,
7078 dma_unmap_addr(tx_buffer, dma),
7079 dma_unmap_len(tx_buffer, len),
7082 /* clear tx_buffer data */
7083 tx_buffer->skb = NULL;
7084 dma_unmap_len_set(tx_buffer, len, 0);
7086 /* clear last DMA location and unmap remaining buffers */
7087 while (tx_desc != eop_desc) {
7092 i -= tx_ring->count;
7093 tx_buffer = tx_ring->tx_buffer_info;
7094 tx_desc = IGB_TX_DESC(tx_ring, 0);
7097 /* unmap any remaining paged data */
7098 if (dma_unmap_len(tx_buffer, len)) {
7099 dma_unmap_page(tx_ring->dev,
7100 dma_unmap_addr(tx_buffer, dma),
7101 dma_unmap_len(tx_buffer, len),
7103 dma_unmap_len_set(tx_buffer, len, 0);
7107 /* move us one more past the eop_desc for start of next pkt */
7112 i -= tx_ring->count;
7113 tx_buffer = tx_ring->tx_buffer_info;
7114 tx_desc = IGB_TX_DESC(tx_ring, 0);
7117 /* issue prefetch for next Tx descriptor */
7120 /* update budget accounting */
7122 } while (likely(budget));
7124 netdev_tx_completed_queue(txring_txq(tx_ring),
7125 total_packets, total_bytes);
7127 i += tx_ring->count;
7128 tx_ring->next_to_clean = i;
7129 tx_ring->tx_stats.bytes += total_bytes;
7130 tx_ring->tx_stats.packets += total_packets;
7131 q_vector->tx.total_bytes += total_bytes;
7132 q_vector->tx.total_packets += total_packets;
7135 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7136 !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7138 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7140 struct e1000_hw *hw = &adapter->hw;
7142 /* Detect a transmit hang in hardware, this serializes the
7143 * check with the clearing of time_stamp and movement of i */
7144 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7145 if (tx_buffer->next_to_watch &&
7146 time_after(jiffies, tx_buffer->time_stamp +
7147 (adapter->tx_timeout_factor * HZ))
7148 && !(E1000_READ_REG(hw, E1000_STATUS) &
7149 E1000_STATUS_TXOFF)) {
7151 /* detected Tx unit hang */
7153 adapter->tx_hang_detected = TRUE;
7154 if (adapter->disable_hw_reset) {
7155 DPRINTK(DRV, WARNING,
7156 "Deactivating netdev watchdog timer\n");
7157 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7158 dev_put(netdev_ring(tx_ring));
7159 #ifndef HAVE_NET_DEVICE_OPS
7160 netdev_ring(tx_ring)->tx_timeout = NULL;
7164 dev_err(tx_ring->dev,
7165 "Detected Tx Unit Hang\n"
7169 " next_to_use <%x>\n"
7170 " next_to_clean <%x>\n"
7171 "buffer_info[next_to_clean]\n"
7172 " time_stamp <%lx>\n"
7173 " next_to_watch <%p>\n"
7175 " desc.status <%x>\n",
7176 tx_ring->queue_index,
7177 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7178 readl(tx_ring->tail),
7179 tx_ring->next_to_use,
7180 tx_ring->next_to_clean,
7181 tx_buffer->time_stamp,
7182 tx_buffer->next_to_watch,
7184 tx_buffer->next_to_watch->wb.status);
7185 if (netif_is_multiqueue(netdev_ring(tx_ring)))
7186 netif_stop_subqueue(netdev_ring(tx_ring),
7187 ring_queue_index(tx_ring));
7189 netif_stop_queue(netdev_ring(tx_ring));
7191 /* we are about to reset, no point in enabling stuff */
7196 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7197 if (unlikely(total_packets &&
7198 netif_carrier_ok(netdev_ring(tx_ring)) &&
7199 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7200 /* Make sure that anybody stopping the queue after this
7201 * sees the new next_to_clean.
7204 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7205 if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7206 ring_queue_index(tx_ring)) &&
7207 !(test_bit(__IGB_DOWN, &adapter->state))) {
7208 netif_wake_subqueue(netdev_ring(tx_ring),
7209 ring_queue_index(tx_ring));
7210 tx_ring->tx_stats.restart_queue++;
7213 if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7214 !(test_bit(__IGB_DOWN, &adapter->state))) {
7215 netif_wake_queue(netdev_ring(tx_ring));
7216 tx_ring->tx_stats.restart_queue++;
7224 #ifdef HAVE_VLAN_RX_REGISTER
7226 * igb_receive_skb - helper function to handle rx indications
7227 * @q_vector: structure containing interrupt and ring information
7228 * @skb: packet to send up
7230 static void igb_receive_skb(struct igb_q_vector *q_vector,
7231 struct sk_buff *skb)
7233 struct vlan_group **vlgrp = netdev_priv(skb->dev);
7235 if (IGB_CB(skb)->vid) {
7237 vlan_gro_receive(&q_vector->napi, *vlgrp,
7238 IGB_CB(skb)->vid, skb);
7240 dev_kfree_skb_any(skb);
7243 napi_gro_receive(&q_vector->napi, skb);
7247 #endif /* HAVE_VLAN_RX_REGISTER */
7248 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7250 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7251 * @rx_ring: rx descriptor ring to store buffers on
7252 * @old_buff: donor buffer to have page reused
7254 * Synchronizes page for reuse by the adapter
7256 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7257 struct igb_rx_buffer *old_buff)
7259 struct igb_rx_buffer *new_buff;
7260 u16 nta = rx_ring->next_to_alloc;
7262 new_buff = &rx_ring->rx_buffer_info[nta];
7264 /* update, and store next to alloc */
7266 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7268 /* transfer page from old buffer to new buffer */
7269 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7271 /* sync the buffer for use by the device */
7272 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7273 old_buff->page_offset,
7278 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7280 unsigned int truesize)
7282 /* avoid re-using remote pages */
7283 if (unlikely(page_to_nid(page) != numa_node_id()))
7286 #if (PAGE_SIZE < 8192)
7287 /* if we are only owner of page we can reuse it */
7288 if (unlikely(page_count(page) != 1))
7291 /* flip page offset to other buffer */
7292 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7295 /* move offset up to the next cache line */
7296 rx_buffer->page_offset += truesize;
7298 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7302 /* bump ref count on page before it is given to the stack */
7309 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7310 * @rx_ring: rx descriptor ring to transact packets on
7311 * @rx_buffer: buffer containing page to add
7312 * @rx_desc: descriptor containing length of buffer written by hardware
7313 * @skb: sk_buff to place the data into
7315 * This function will add the data contained in rx_buffer->page to the skb.
7316 * This is done either through a direct copy if the data in the buffer is
7317 * less than the skb header size, otherwise it will just attach the page as
7318 * a frag to the skb.
7320 * The function will then update the page offset if necessary and return
7321 * true if the buffer can be reused by the adapter.
7323 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7324 struct igb_rx_buffer *rx_buffer,
7325 union e1000_adv_rx_desc *rx_desc,
7326 struct sk_buff *skb)
7328 struct page *page = rx_buffer->page;
7329 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7330 #if (PAGE_SIZE < 8192)
7331 unsigned int truesize = IGB_RX_BUFSZ;
7333 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7336 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7337 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7339 #ifdef HAVE_PTP_1588_CLOCK
7340 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7341 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7342 va += IGB_TS_HDR_LEN;
7343 size -= IGB_TS_HDR_LEN;
7345 #endif /* HAVE_PTP_1588_CLOCK */
7347 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7349 /* we can reuse buffer as-is, just make sure it is local */
7350 if (likely(page_to_nid(page) == numa_node_id()))
7353 /* this page cannot be reused so discard it */
7358 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7359 rx_buffer->page_offset, size, truesize);
7361 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7364 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7365 union e1000_adv_rx_desc *rx_desc,
7366 struct sk_buff *skb)
7368 struct igb_rx_buffer *rx_buffer;
7371 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7373 page = rx_buffer->page;
7377 void *page_addr = page_address(page) +
7378 rx_buffer->page_offset;
7380 /* prefetch first cache line of first page */
7381 prefetch(page_addr);
7382 #if L1_CACHE_BYTES < 128
7383 prefetch(page_addr + L1_CACHE_BYTES);
7386 /* allocate a skb to store the frags */
7387 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7389 if (unlikely(!skb)) {
7390 rx_ring->rx_stats.alloc_failed++;
7395 * we will be copying header into skb->data in
7396 * pskb_may_pull so it is in our interest to prefetch
7397 * it now to avoid a possible cache miss
7399 prefetchw(skb->data);
7402 /* we are reusing so sync this buffer for CPU use */
7403 dma_sync_single_range_for_cpu(rx_ring->dev,
7405 rx_buffer->page_offset,
7409 /* pull page into skb */
7410 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7411 /* hand second half of page back to the ring */
7412 igb_reuse_rx_page(rx_ring, rx_buffer);
7414 /* we are not reusing the buffer so unmap it */
7415 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7416 PAGE_SIZE, DMA_FROM_DEVICE);
7419 /* clear contents of rx_buffer */
7420 rx_buffer->page = NULL;
7426 static inline void igb_rx_checksum(struct igb_ring *ring,
7427 union e1000_adv_rx_desc *rx_desc,
7428 struct sk_buff *skb)
7430 skb_checksum_none_assert(skb);
7432 /* Ignore Checksum bit is set */
7433 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7436 /* Rx checksum disabled via ethtool */
7437 if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7440 /* TCP/UDP checksum error bit is set */
7441 if (igb_test_staterr(rx_desc,
7442 E1000_RXDEXT_STATERR_TCPE |
7443 E1000_RXDEXT_STATERR_IPE)) {
7445 * work around errata with sctp packets where the TCPE aka
7446 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7447 * packets, (aka let the stack check the crc32c)
7449 if (!((skb->len == 60) &&
7450 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7451 ring->rx_stats.csum_err++;
7453 /* let the stack verify checksum errors */
7456 /* It must be a TCP or UDP packet with a valid checksum */
7457 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7458 E1000_RXD_STAT_UDPCS))
7459 skb->ip_summed = CHECKSUM_UNNECESSARY;
7462 #ifdef NETIF_F_RXHASH
7463 static inline void igb_rx_hash(struct igb_ring *ring,
7464 union e1000_adv_rx_desc *rx_desc,
7465 struct sk_buff *skb)
7467 if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7468 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7474 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7476 * igb_merge_active_tail - merge active tail into lro skb
7477 * @tail: pointer to active tail in frag_list
7479 * This function merges the length and data of an active tail into the
7480 * skb containing the frag_list. It resets the tail's pointer to the head,
7481 * but it leaves the heads pointer to tail intact.
7483 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7485 struct sk_buff *head = IGB_CB(tail)->head;
7490 head->len += tail->len;
7491 head->data_len += tail->len;
7492 head->truesize += tail->len;
7494 IGB_CB(tail)->head = NULL;
7500 * igb_add_active_tail - adds an active tail into the skb frag_list
7501 * @head: pointer to the start of the skb
7502 * @tail: pointer to active tail to add to frag_list
7504 * This function adds an active tail to the end of the frag list. This tail
7505 * will still be receiving data so we cannot yet ad it's stats to the main
7506 * skb. That is done via igb_merge_active_tail.
7508 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7510 struct sk_buff *old_tail = IGB_CB(head)->tail;
7513 igb_merge_active_tail(old_tail);
7514 old_tail->next = tail;
7516 skb_shinfo(head)->frag_list = tail;
7519 IGB_CB(tail)->head = head;
7520 IGB_CB(head)->tail = tail;
7522 IGB_CB(head)->append_cnt++;
7526 * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7527 * @head: pointer to head of an active frag list
7529 * This function will clear the frag_tail_tracker pointer on an active
7530 * frag_list and returns true if the pointer was actually set
7532 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7534 struct sk_buff *tail = IGB_CB(head)->tail;
7539 igb_merge_active_tail(tail);
7541 IGB_CB(head)->tail = NULL;
7546 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7548 * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7549 * @adapter: board private structure
7550 * @rx_desc: pointer to the rx descriptor
7551 * @skb: pointer to the skb to be merged
7554 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7555 union e1000_adv_rx_desc *rx_desc,
7556 struct sk_buff *skb)
7558 struct iphdr *iph = (struct iphdr *)skb->data;
7559 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7561 /* verify hardware indicates this is IPv4/TCP */
7562 if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7563 !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7566 /* .. and LRO is enabled */
7567 if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7570 /* .. and we are not in promiscuous mode */
7571 if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7574 /* .. and the header is large enough for us to read IP/TCP fields */
7575 if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7578 /* .. and there are no VLANs on packet */
7579 if (skb->protocol != __constant_htons(ETH_P_IP))
7582 /* .. and we are version 4 with no options */
7583 if (*(u8 *)iph != 0x45)
7586 /* .. and the packet is not fragmented */
7587 if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7590 /* .. and that next header is TCP */
7591 if (iph->protocol != IPPROTO_TCP)
7597 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7599 return (struct igb_lrohdr *)skb->data;
7603 * igb_lro_flush - Indicate packets to upper layer.
7605 * Update IP and TCP header part of head skb if more than one
7606 * skb's chained and indicate packets to upper layer.
7608 static void igb_lro_flush(struct igb_q_vector *q_vector,
7609 struct sk_buff *skb)
7611 struct igb_lro_list *lrolist = &q_vector->lrolist;
7613 __skb_unlink(skb, &lrolist->active);
7615 if (IGB_CB(skb)->append_cnt) {
7616 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7618 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7619 /* close any active lro contexts */
7620 igb_close_active_frag_list(skb);
7623 /* incorporate ip header and re-calculate checksum */
7624 lroh->iph.tot_len = ntohs(skb->len);
7625 lroh->iph.check = 0;
7627 /* header length is 5 since we know no options exist */
7628 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7630 /* clear TCP checksum to indicate we are an LRO frame */
7633 /* incorporate latest timestamp into the tcp header */
7634 if (IGB_CB(skb)->tsecr) {
7635 lroh->ts[2] = IGB_CB(skb)->tsecr;
7636 lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7640 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7641 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7645 #ifdef HAVE_VLAN_RX_REGISTER
7646 igb_receive_skb(q_vector, skb);
7648 napi_gro_receive(&q_vector->napi, skb);
7650 lrolist->stats.flushed++;
7653 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7655 struct igb_lro_list *lrolist = &q_vector->lrolist;
7656 struct sk_buff *skb, *tmp;
7658 skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7659 igb_lro_flush(q_vector, skb);
7663 * igb_lro_header_ok - Main LRO function.
7665 static void igb_lro_header_ok(struct sk_buff *skb)
7667 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7668 u16 opt_bytes, data_len;
7670 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7671 IGB_CB(skb)->tail = NULL;
7673 IGB_CB(skb)->tsecr = 0;
7674 IGB_CB(skb)->append_cnt = 0;
7675 IGB_CB(skb)->mss = 0;
7677 /* ensure that the checksum is valid */
7678 if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7681 /* If we see CE codepoint in IP header, packet is not mergeable */
7682 if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7685 /* ensure no bits set besides ack or psh */
7686 if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7687 lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7691 /* store the total packet length */
7692 data_len = ntohs(lroh->iph.tot_len);
7694 /* remove any padding from the end of the skb */
7695 __pskb_trim(skb, data_len);
7697 /* remove header length from data length */
7698 data_len -= sizeof(struct igb_lrohdr);
7701 * check for timestamps. Since the only option we handle are timestamps,
7702 * we only have to handle the simple case of aligned timestamps
7704 opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7705 if (opt_bytes != 0) {
7706 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7707 !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7708 TCPOLEN_TSTAMP_ALIGNED) ||
7709 (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7710 (TCPOPT_NOP << 16) |
7711 (TCPOPT_TIMESTAMP << 8) |
7712 TCPOLEN_TIMESTAMP)) ||
7713 (lroh->ts[2] == 0)) {
7717 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7718 IGB_CB(skb)->tsecr = lroh->ts[2];
7720 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7723 /* record data_len as mss for the packet */
7724 IGB_CB(skb)->mss = data_len;
7725 IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7728 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7729 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7731 struct skb_shared_info *sh_info;
7732 struct skb_shared_info *new_skb_info;
7733 unsigned int data_len;
7735 sh_info = skb_shinfo(lro_skb);
7736 new_skb_info = skb_shinfo(new_skb);
7738 /* copy frags into the last skb */
7739 memcpy(sh_info->frags + sh_info->nr_frags,
7740 new_skb_info->frags,
7741 new_skb_info->nr_frags * sizeof(skb_frag_t));
7743 /* copy size data over */
7744 sh_info->nr_frags += new_skb_info->nr_frags;
7745 data_len = IGB_CB(new_skb)->mss;
7746 lro_skb->len += data_len;
7747 lro_skb->data_len += data_len;
7748 lro_skb->truesize += data_len;
7750 /* wipe record of data from new_skb */
7751 new_skb_info->nr_frags = 0;
7752 new_skb->len = new_skb->data_len = 0;
7753 dev_kfree_skb_any(new_skb);
7756 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7758 * igb_lro_receive - if able, queue skb into lro chain
7759 * @q_vector: structure containing interrupt and ring information
7760 * @new_skb: pointer to current skb being checked
7762 * Checks whether the skb given is eligible for LRO and if that's
7763 * fine chains it to the existing lro_skb based on flowid. If an LRO for
7764 * the flow doesn't exist create one.
7766 static void igb_lro_receive(struct igb_q_vector *q_vector,
7767 struct sk_buff *new_skb)
7769 struct sk_buff *lro_skb;
7770 struct igb_lro_list *lrolist = &q_vector->lrolist;
7771 struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7772 __be32 saddr = lroh->iph.saddr;
7773 __be32 daddr = lroh->iph.daddr;
7774 __be32 tcp_ports = *(__be32 *)&lroh->th;
7776 #ifdef HAVE_VLAN_RX_REGISTER
7777 u16 vid = IGB_CB(new_skb)->vid;
7779 u16 vid = new_skb->vlan_tci;
7782 igb_lro_header_ok(new_skb);
7785 * we have a packet that might be eligible for LRO,
7786 * so see if it matches anything we might expect
7788 skb_queue_walk(&lrolist->active, lro_skb) {
7789 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7790 igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7791 igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7794 #ifdef HAVE_VLAN_RX_REGISTER
7795 if (IGB_CB(lro_skb)->vid != vid)
7797 if (lro_skb->vlan_tci != vid)
7801 /* out of order packet */
7802 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7803 igb_lro_flush(q_vector, lro_skb);
7804 IGB_CB(new_skb)->mss = 0;
7808 /* TCP timestamp options have changed */
7809 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7810 igb_lro_flush(q_vector, lro_skb);
7814 /* make sure timestamp values are increasing */
7815 if (IGB_CB(lro_skb)->tsecr &&
7816 IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7817 igb_lro_flush(q_vector, lro_skb);
7818 IGB_CB(new_skb)->mss = 0;
7822 data_len = IGB_CB(new_skb)->mss;
7824 /* Check for all of the above below
7827 * resultant packet would be too large
7828 * new skb is larger than our current mss
7829 * data would remain in header
7830 * we would consume more frags then the sk_buff contains
7831 * ack sequence numbers changed
7832 * window size has changed
7834 if (data_len == 0 ||
7835 data_len > IGB_CB(lro_skb)->mss ||
7836 data_len > IGB_CB(lro_skb)->free ||
7837 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7838 data_len != new_skb->data_len ||
7839 skb_shinfo(new_skb)->nr_frags >=
7840 (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7842 igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7843 igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7844 igb_lro_flush(q_vector, lro_skb);
7848 /* Remove IP and TCP header*/
7849 skb_pull(new_skb, new_skb->len - data_len);
7851 /* update timestamp and timestamp echo response */
7852 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7853 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7855 /* update sequence and free space */
7856 IGB_CB(lro_skb)->next_seq += data_len;
7857 IGB_CB(lro_skb)->free -= data_len;
7859 /* update append_cnt */
7860 IGB_CB(lro_skb)->append_cnt++;
7862 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7863 /* if header is empty pull pages into current skb */
7864 igb_merge_frags(lro_skb, new_skb);
7866 /* chain this new skb in frag_list */
7867 igb_add_active_tail(lro_skb, new_skb);
7870 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7871 skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7872 igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7873 igb_lro_flush(q_vector, lro_skb);
7876 lrolist->stats.coal++;
7880 if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7881 /* if we are at capacity flush the tail */
7882 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7883 lro_skb = skb_peek_tail(&lrolist->active);
7885 igb_lro_flush(q_vector, lro_skb);
7888 /* update sequence and free space */
7889 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7890 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7892 /* .. and insert at the front of the active list */
7893 __skb_queue_head(&lrolist->active, new_skb);
7895 lrolist->stats.coal++;
7899 /* packet not handled by any of the above, pass it to the stack */
7900 #ifdef HAVE_VLAN_RX_REGISTER
7901 igb_receive_skb(q_vector, new_skb);
7903 napi_gro_receive(&q_vector->napi, new_skb);
7907 #endif /* IGB_NO_LRO */
7909 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7910 * @rx_ring: rx descriptor ring packet is being transacted on
7911 * @rx_desc: pointer to the EOP Rx descriptor
7912 * @skb: pointer to current skb being populated
7914 * This function checks the ring, descriptor, and packet information in
7915 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7916 * other fields within the skb.
7918 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7919 union e1000_adv_rx_desc *rx_desc,
7920 struct sk_buff *skb)
7922 struct net_device *dev = rx_ring->netdev;
7923 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7925 #ifdef NETIF_F_RXHASH
7926 igb_rx_hash(rx_ring, rx_desc, skb);
7929 igb_rx_checksum(rx_ring, rx_desc, skb);
7931 /* update packet type stats */
7932 if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7933 rx_ring->rx_stats.ipv4_packets++;
7934 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7935 rx_ring->rx_stats.ipv4e_packets++;
7936 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7937 rx_ring->rx_stats.ipv6_packets++;
7938 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7939 rx_ring->rx_stats.ipv6e_packets++;
7940 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7941 rx_ring->rx_stats.tcp_packets++;
7942 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7943 rx_ring->rx_stats.udp_packets++;
7944 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7945 rx_ring->rx_stats.sctp_packets++;
7946 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7947 rx_ring->rx_stats.nfs_packets++;
7949 #ifdef HAVE_PTP_1588_CLOCK
7950 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7951 #endif /* HAVE_PTP_1588_CLOCK */
7953 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7954 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7956 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7958 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7960 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7961 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7962 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7964 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7965 #ifdef HAVE_VLAN_RX_REGISTER
7966 IGB_CB(skb)->vid = vid;
7968 IGB_CB(skb)->vid = 0;
7971 #ifdef HAVE_VLAN_PROTOCOL
7972 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7974 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7981 skb_record_rx_queue(skb, rx_ring->queue_index);
7983 skb->protocol = eth_type_trans(skb, dev);
7987 * igb_is_non_eop - process handling of non-EOP buffers
7988 * @rx_ring: Rx ring being processed
7989 * @rx_desc: Rx descriptor for current buffer
7991 * This function updates next to clean. If the buffer is an EOP buffer
7992 * this function exits returning false, otherwise it will place the
7993 * sk_buff in the next buffer to be chained and return true indicating
7994 * that this is in fact a non-EOP buffer.
7996 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7997 union e1000_adv_rx_desc *rx_desc)
7999 u32 ntc = rx_ring->next_to_clean + 1;
8001 /* fetch, update, and store next to clean */
8002 ntc = (ntc < rx_ring->count) ? ntc : 0;
8003 rx_ring->next_to_clean = ntc;
8005 prefetch(IGB_RX_DESC(rx_ring, ntc));
8007 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8013 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8014 /* igb_clean_rx_irq -- * legacy */
8015 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8017 struct igb_ring *rx_ring = q_vector->rx.ring;
8018 unsigned int total_bytes = 0, total_packets = 0;
8019 u16 cleaned_count = igb_desc_unused(rx_ring);
8022 struct igb_rx_buffer *rx_buffer;
8023 union e1000_adv_rx_desc *rx_desc;
8024 struct sk_buff *skb;
8027 /* return some buffers to hardware, one at a time is too slow */
8028 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8029 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8033 ntc = rx_ring->next_to_clean;
8034 rx_desc = IGB_RX_DESC(rx_ring, ntc);
8035 rx_buffer = &rx_ring->rx_buffer_info[ntc];
8037 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8041 * This memory barrier is needed to keep us from reading
8042 * any other fields out of the rx_desc until we know the
8043 * RXD_STAT_DD bit is set
8047 skb = rx_buffer->skb;
8049 prefetch(skb->data);
8051 /* pull the header of the skb in */
8052 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
8054 /* clear skb reference in buffer info structure */
8055 rx_buffer->skb = NULL;
8059 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8061 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8062 rx_ring->rx_buffer_len,
8066 if (igb_test_staterr(rx_desc,
8067 E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8068 dev_kfree_skb_any(skb);
8072 total_bytes += skb->len;
8074 /* populate checksum, timestamp, VLAN, and protocol */
8075 igb_process_skb_fields(rx_ring, rx_desc, skb);
8078 if (igb_can_lro(rx_ring, rx_desc, skb))
8079 igb_lro_receive(q_vector, skb);
8082 #ifdef HAVE_VLAN_RX_REGISTER
8083 igb_receive_skb(q_vector, skb);
8085 napi_gro_receive(&q_vector->napi, skb);
8089 netdev_ring(rx_ring)->last_rx = jiffies;
8092 /* update budget accounting */
8094 } while (likely(total_packets < budget));
8096 rx_ring->rx_stats.packets += total_packets;
8097 rx_ring->rx_stats.bytes += total_bytes;
8098 q_vector->rx.total_packets += total_packets;
8099 q_vector->rx.total_bytes += total_bytes;
8102 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8105 igb_lro_flush_all(q_vector);
8107 #endif /* IGB_NO_LRO */
8108 return total_packets < budget;
8110 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8112 * igb_get_headlen - determine size of header for LRO/GRO
8113 * @data: pointer to the start of the headers
8114 * @max_len: total length of section to find headers in
8116 * This function is meant to determine the length of headers that will
8117 * be recognized by hardware for LRO, and GRO offloads. The main
8118 * motivation of doing this is to only perform one pull for IPv4 TCP
8119 * packets so that we can do basic things like calculating the gso_size
8120 * based on the average data per packet.
8122 static unsigned int igb_get_headlen(unsigned char *data,
8123 unsigned int max_len)
8126 unsigned char *network;
8129 struct vlan_hdr *vlan;
8132 struct ipv6hdr *ipv6;
8135 u8 nexthdr = 0; /* default to not TCP */
8138 /* this should never happen, but better safe than sorry */
8139 if (max_len < ETH_HLEN)
8142 /* initialize network frame pointer */
8145 /* set first protocol and move network header forward */
8146 protocol = hdr.eth->h_proto;
8147 hdr.network += ETH_HLEN;
8149 /* handle any vlan tag if present */
8150 if (protocol == __constant_htons(ETH_P_8021Q)) {
8151 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8154 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8155 hdr.network += VLAN_HLEN;
8158 /* handle L3 protocols */
8159 if (protocol == __constant_htons(ETH_P_IP)) {
8160 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8163 /* access ihl as a u8 to avoid unaligned access on ia64 */
8164 hlen = (hdr.network[0] & 0x0F) << 2;
8166 /* verify hlen meets minimum size requirements */
8167 if (hlen < sizeof(struct iphdr))
8168 return hdr.network - data;
8170 /* record next protocol if header is present */
8171 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8172 nexthdr = hdr.ipv4->protocol;
8174 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8175 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8178 /* record next protocol */
8179 nexthdr = hdr.ipv6->nexthdr;
8180 hlen = sizeof(struct ipv6hdr);
8181 #endif /* NETIF_F_TSO6 */
8183 return hdr.network - data;
8186 /* relocate pointer to start of L4 header */
8187 hdr.network += hlen;
8189 /* finally sort out TCP */
8190 if (nexthdr == IPPROTO_TCP) {
8191 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8194 /* access doff as a u8 to avoid unaligned access on ia64 */
8195 hlen = (hdr.network[12] & 0xF0) >> 2;
8197 /* verify hlen meets minimum size requirements */
8198 if (hlen < sizeof(struct tcphdr))
8199 return hdr.network - data;
8201 hdr.network += hlen;
8202 } else if (nexthdr == IPPROTO_UDP) {
8203 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8206 hdr.network += sizeof(struct udphdr);
8210 * If everything has gone correctly hdr.network should be the
8211 * data section of the packet and will be the end of the header.
8212 * If not then it probably represents the end of the last recognized
8215 if ((hdr.network - data) < max_len)
8216 return hdr.network - data;
8222 * igb_pull_tail - igb specific version of skb_pull_tail
8223 * @rx_ring: rx descriptor ring packet is being transacted on
8224 * @rx_desc: pointer to the EOP Rx descriptor
8225 * @skb: pointer to current skb being adjusted
8227 * This function is an igb specific version of __pskb_pull_tail. The
8228 * main difference between this version and the original function is that
8229 * this function can make several assumptions about the state of things
8230 * that allow for significant optimizations versus the standard function.
8231 * As a result we can do things like drop a frag and maintain an accurate
8232 * truesize for the skb.
8234 static void igb_pull_tail(struct igb_ring *rx_ring,
8235 union e1000_adv_rx_desc *rx_desc,
8236 struct sk_buff *skb)
8238 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8240 unsigned int pull_len;
8243 * it is valid to use page_address instead of kmap since we are
8244 * working with pages allocated out of the lomem pool per
8245 * alloc_page(GFP_ATOMIC)
8247 va = skb_frag_address(frag);
8249 #ifdef HAVE_PTP_1588_CLOCK
8250 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8251 /* retrieve timestamp from buffer */
8252 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8254 /* update pointers to remove timestamp header */
8255 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8256 frag->page_offset += IGB_TS_HDR_LEN;
8257 skb->data_len -= IGB_TS_HDR_LEN;
8258 skb->len -= IGB_TS_HDR_LEN;
8260 /* move va to start of packet data */
8261 va += IGB_TS_HDR_LEN;
8263 #endif /* HAVE_PTP_1588_CLOCK */
8266 * we need the header to contain the greater of either ETH_HLEN or
8267 * 60 bytes if the skb->len is less than 60 for skb_pad.
8269 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8271 /* align pull length to size of long to optimize memcpy performance */
8272 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8274 /* update all of the pointers */
8275 skb_frag_size_sub(frag, pull_len);
8276 frag->page_offset += pull_len;
8277 skb->data_len -= pull_len;
8278 skb->tail += pull_len;
8282 * igb_cleanup_headers - Correct corrupted or empty headers
8283 * @rx_ring: rx descriptor ring packet is being transacted on
8284 * @rx_desc: pointer to the EOP Rx descriptor
8285 * @skb: pointer to current skb being fixed
8287 * Address the case where we are pulling data in on pages only
8288 * and as such no data is present in the skb header.
8290 * In addition if skb is not at least 60 bytes we need to pad it so that
8291 * it is large enough to qualify as a valid Ethernet frame.
8293 * Returns true if an error was encountered and skb was freed.
8295 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8296 union e1000_adv_rx_desc *rx_desc,
8297 struct sk_buff *skb)
8300 if (unlikely((igb_test_staterr(rx_desc,
8301 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8302 struct net_device *netdev = rx_ring->netdev;
8303 if (!(netdev->features & NETIF_F_RXALL)) {
8304 dev_kfree_skb_any(skb);
8309 /* place header in linear portion of buffer */
8310 if (skb_is_nonlinear(skb))
8311 igb_pull_tail(rx_ring, rx_desc, skb);
8313 /* if skb_pad returns an error the skb was freed */
8314 if (unlikely(skb->len < 60)) {
8315 int pad_len = 60 - skb->len;
8317 if (skb_pad(skb, pad_len))
8319 __skb_put(skb, pad_len);
8325 /* igb_clean_rx_irq -- * packet split */
8326 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8328 struct igb_ring *rx_ring = q_vector->rx.ring;
8329 struct sk_buff *skb = rx_ring->skb;
8330 unsigned int total_bytes = 0, total_packets = 0;
8331 u16 cleaned_count = igb_desc_unused(rx_ring);
8334 union e1000_adv_rx_desc *rx_desc;
8336 /* return some buffers to hardware, one at a time is too slow */
8337 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8338 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8342 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8344 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8348 * This memory barrier is needed to keep us from reading
8349 * any other fields out of the rx_desc until we know the
8350 * RXD_STAT_DD bit is set
8354 /* retrieve a buffer from the ring */
8355 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8357 /* exit if we failed to retrieve a buffer */
8363 /* fetch next buffer in frame if non-eop */
8364 if (igb_is_non_eop(rx_ring, rx_desc))
8367 /* verify the packet layout is correct */
8368 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8373 /* probably a little skewed due to removing CRC */
8374 total_bytes += skb->len;
8376 /* populate checksum, timestamp, VLAN, and protocol */
8377 igb_process_skb_fields(rx_ring, rx_desc, skb);
8380 if (igb_can_lro(rx_ring, rx_desc, skb))
8381 igb_lro_receive(q_vector, skb);
8384 #ifdef HAVE_VLAN_RX_REGISTER
8385 igb_receive_skb(q_vector, skb);
8387 napi_gro_receive(&q_vector->napi, skb);
8391 netdev_ring(rx_ring)->last_rx = jiffies;
8394 /* reset skb pointer */
8397 /* update budget accounting */
8399 } while (likely(total_packets < budget));
8401 /* place incomplete frames back on ring for completion */
8404 rx_ring->rx_stats.packets += total_packets;
8405 rx_ring->rx_stats.bytes += total_bytes;
8406 q_vector->rx.total_packets += total_packets;
8407 q_vector->rx.total_bytes += total_bytes;
8410 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8413 igb_lro_flush_all(q_vector);
8415 #endif /* IGB_NO_LRO */
8416 return total_packets < budget;
8418 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8420 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8421 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8422 struct igb_rx_buffer *bi)
8424 struct sk_buff *skb = bi->skb;
8425 dma_addr_t dma = bi->dma;
8431 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8432 rx_ring->rx_buffer_len);
8435 rx_ring->rx_stats.alloc_failed++;
8439 /* initialize skb for ring */
8440 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8443 dma = dma_map_single(rx_ring->dev, skb->data,
8444 rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8446 /* if mapping failed free memory back to system since
8447 * there isn't much point in holding memory we can't use
8449 if (dma_mapping_error(rx_ring->dev, dma)) {
8450 dev_kfree_skb_any(skb);
8453 rx_ring->rx_stats.alloc_failed++;
8461 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8462 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8463 struct igb_rx_buffer *bi)
8465 struct page *page = bi->page;
8468 /* since we are recycling buffers we should seldom need to alloc */
8472 /* alloc new page for storage */
8473 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8474 if (unlikely(!page)) {
8475 rx_ring->rx_stats.alloc_failed++;
8479 /* map page for use */
8480 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8483 * if mapping failed free memory back to system since
8484 * there isn't much point in holding memory we can't use
8486 if (dma_mapping_error(rx_ring->dev, dma)) {
8489 rx_ring->rx_stats.alloc_failed++;
8495 bi->page_offset = 0;
8500 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8502 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8503 * @adapter: address of board private structure
8505 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8507 union e1000_adv_rx_desc *rx_desc;
8508 struct igb_rx_buffer *bi;
8509 u16 i = rx_ring->next_to_use;
8515 rx_desc = IGB_RX_DESC(rx_ring, i);
8516 bi = &rx_ring->rx_buffer_info[i];
8517 i -= rx_ring->count;
8520 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8521 if (!igb_alloc_mapped_skb(rx_ring, bi))
8523 if (!igb_alloc_mapped_page(rx_ring, bi))
8524 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8528 * Refresh the desc even if buffer_addrs didn't change
8529 * because each write-back erases this info.
8531 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8532 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8534 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8541 rx_desc = IGB_RX_DESC(rx_ring, 0);
8542 bi = rx_ring->rx_buffer_info;
8543 i -= rx_ring->count;
8546 /* clear the hdr_addr for the next_to_use descriptor */
8547 rx_desc->read.hdr_addr = 0;
8550 } while (cleaned_count);
8552 i += rx_ring->count;
8554 if (rx_ring->next_to_use != i) {
8555 /* record the next descriptor to use */
8556 rx_ring->next_to_use = i;
8558 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8559 /* update next to alloc since we have filled the ring */
8560 rx_ring->next_to_alloc = i;
8564 * Force memory writes to complete before letting h/w
8565 * know there are new descriptors to fetch. (Only
8566 * applicable for weak-ordered memory model archs,
8570 writel(i, rx_ring->tail);
8581 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8583 struct igb_adapter *adapter = netdev_priv(netdev);
8584 struct mii_ioctl_data *data = if_mii(ifr);
8586 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8591 data->phy_id = adapter->hw.phy.addr;
8594 if (!capable(CAP_NET_ADMIN))
8596 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8604 return E1000_SUCCESS;
8614 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8621 return igb_mii_ioctl(netdev, ifr, cmd);
8623 #ifdef HAVE_PTP_1588_CLOCK
8625 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8626 #endif /* HAVE_PTP_1588_CLOCK */
8627 #ifdef ETHTOOL_OPS_COMPAT
8629 return ethtool_ioctl(ifr);
8636 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8638 struct igb_adapter *adapter = hw->back;
8641 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8643 return -E1000_ERR_CONFIG;
8645 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8647 return E1000_SUCCESS;
8650 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8652 struct igb_adapter *adapter = hw->back;
8655 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8657 return -E1000_ERR_CONFIG;
8659 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8661 return E1000_SUCCESS;
8664 #ifdef HAVE_VLAN_RX_REGISTER
8665 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8667 void igb_vlan_mode(struct net_device *netdev, u32 features)
8670 struct igb_adapter *adapter = netdev_priv(netdev);
8671 struct e1000_hw *hw = &adapter->hw;
8674 #ifdef HAVE_VLAN_RX_REGISTER
8675 bool enable = !!vlgrp;
8677 igb_irq_disable(adapter);
8679 adapter->vlgrp = vlgrp;
8681 if (!test_bit(__IGB_DOWN, &adapter->state))
8682 igb_irq_enable(adapter);
8684 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8685 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8687 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8692 /* enable VLAN tag insert/strip */
8693 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8694 ctrl |= E1000_CTRL_VME;
8695 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8697 /* Disable CFI check */
8698 rctl = E1000_READ_REG(hw, E1000_RCTL);
8699 rctl &= ~E1000_RCTL_CFIEN;
8700 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8702 /* disable VLAN tag insert/strip */
8703 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8704 ctrl &= ~E1000_CTRL_VME;
8705 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8708 #ifndef CONFIG_IGB_VMDQ_NETDEV
8709 for (i = 0; i < adapter->vmdq_pools; i++) {
8710 igb_set_vf_vlan_strip(adapter,
8711 adapter->vfs_allocated_count + i,
8716 igb_set_vf_vlan_strip(adapter,
8717 adapter->vfs_allocated_count,
8720 for (i = 1; i < adapter->vmdq_pools; i++) {
8721 #ifdef HAVE_VLAN_RX_REGISTER
8722 struct igb_vmdq_adapter *vadapter;
8723 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8724 enable = !!vadapter->vlgrp;
8726 struct net_device *vnetdev;
8727 vnetdev = adapter->vmdq_netdev[i-1];
8728 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8729 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8731 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8734 igb_set_vf_vlan_strip(adapter,
8735 adapter->vfs_allocated_count + i,
8740 igb_rlpml_set(adapter);
8743 #ifdef HAVE_VLAN_PROTOCOL
8744 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8745 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8746 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8747 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8748 __always_unused __be16 proto, u16 vid)
8750 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8753 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8756 struct igb_adapter *adapter = netdev_priv(netdev);
8757 int pf_id = adapter->vfs_allocated_count;
8759 /* attempt to add filter to vlvf array */
8760 igb_vlvf_set(adapter, vid, TRUE, pf_id);
8762 /* add the filter since PF can receive vlans w/o entry in vlvf */
8763 igb_vfta_set(adapter, vid, TRUE);
8764 #ifndef HAVE_NETDEV_VLAN_FEATURES
8766 /* Copy feature flags from netdev to the vlan netdev for this vid.
8767 * This allows things like TSO to bubble down to our vlan device.
8768 * There is no need to update netdev for vlan 0 (DCB), since it
8769 * wouldn't has v_netdev.
8771 if (adapter->vlgrp) {
8772 struct vlan_group *vlgrp = adapter->vlgrp;
8773 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8775 v_netdev->features |= netdev->features;
8776 vlan_group_set_device(vlgrp, vid, v_netdev);
8780 #ifndef HAVE_VLAN_RX_REGISTER
8782 set_bit(vid, adapter->active_vlans);
8784 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8789 #ifdef HAVE_VLAN_PROTOCOL
8790 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8791 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8792 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8793 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8794 __always_unused __be16 proto, u16 vid)
8796 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8799 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8802 struct igb_adapter *adapter = netdev_priv(netdev);
8803 int pf_id = adapter->vfs_allocated_count;
8806 #ifdef HAVE_VLAN_RX_REGISTER
8807 igb_irq_disable(adapter);
8809 vlan_group_set_device(adapter->vlgrp, vid, NULL);
8811 if (!test_bit(__IGB_DOWN, &adapter->state))
8812 igb_irq_enable(adapter);
8814 #endif /* HAVE_VLAN_RX_REGISTER */
8815 /* remove vlan from VLVF table array */
8816 err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8818 /* if vid was not present in VLVF just remove it from table */
8820 igb_vfta_set(adapter, vid, FALSE);
8821 #ifndef HAVE_VLAN_RX_REGISTER
8823 clear_bit(vid, adapter->active_vlans);
8825 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8830 static void igb_restore_vlan(struct igb_adapter *adapter)
8832 #ifdef HAVE_VLAN_RX_REGISTER
8833 igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8835 if (adapter->vlgrp) {
8837 for (vid = 0; vid < VLAN_N_VID; vid++) {
8838 if (!vlan_group_get_device(adapter->vlgrp, vid))
8840 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8841 igb_vlan_rx_add_vid(adapter->netdev,
8842 htons(ETH_P_8021Q), vid);
8844 igb_vlan_rx_add_vid(adapter->netdev, vid);
8851 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8853 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8854 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8855 igb_vlan_rx_add_vid(adapter->netdev,
8856 htons(ETH_P_8021Q), vid);
8858 igb_vlan_rx_add_vid(adapter->netdev, vid);
8863 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8865 struct pci_dev *pdev = adapter->pdev;
8866 struct e1000_mac_info *mac = &adapter->hw.mac;
8870 /* SerDes device's does not support 10Mbps Full/duplex
8871 * and 100Mbps Half duplex
8873 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8875 case SPEED_10 + DUPLEX_HALF:
8876 case SPEED_10 + DUPLEX_FULL:
8877 case SPEED_100 + DUPLEX_HALF:
8878 dev_err(pci_dev_to_dev(pdev),
8879 "Unsupported Speed/Duplex configuration\n");
8887 case SPEED_10 + DUPLEX_HALF:
8888 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8890 case SPEED_10 + DUPLEX_FULL:
8891 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8893 case SPEED_100 + DUPLEX_HALF:
8894 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8896 case SPEED_100 + DUPLEX_FULL:
8897 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8899 case SPEED_1000 + DUPLEX_FULL:
8901 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8903 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8905 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8909 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8910 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8915 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8918 struct net_device *netdev = pci_get_drvdata(pdev);
8919 struct igb_adapter *adapter = netdev_priv(netdev);
8920 struct e1000_hw *hw = &adapter->hw;
8921 u32 ctrl, rctl, status;
8922 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8927 netif_device_detach(netdev);
8929 status = E1000_READ_REG(hw, E1000_STATUS);
8930 if (status & E1000_STATUS_LU)
8931 wufc &= ~E1000_WUFC_LNKC;
8933 if (netif_running(netdev))
8934 __igb_close(netdev, true);
8936 igb_clear_interrupt_scheme(adapter);
8939 retval = pci_save_state(pdev);
8945 igb_setup_rctl(adapter);
8946 igb_set_rx_mode(netdev);
8948 /* turn on all-multi mode if wake on multicast is enabled */
8949 if (wufc & E1000_WUFC_MC) {
8950 rctl = E1000_READ_REG(hw, E1000_RCTL);
8951 rctl |= E1000_RCTL_MPE;
8952 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8955 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8956 /* phy power management enable */
8957 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8958 ctrl |= E1000_CTRL_ADVD3WUC;
8959 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8961 /* Allow time for pending master requests to run */
8962 e1000_disable_pcie_master(hw);
8964 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8965 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8967 E1000_WRITE_REG(hw, E1000_WUC, 0);
8968 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8971 *enable_wake = wufc || adapter->en_mng_pt;
8973 igb_power_down_link(adapter);
8975 igb_power_up_link(adapter);
8977 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8978 * would have already happened in close and is redundant. */
8979 igb_release_hw_control(adapter);
8981 pci_disable_device(pdev);
8987 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8988 static int igb_suspend(struct device *dev)
8990 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8991 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8993 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8994 struct pci_dev *pdev = to_pci_dev(dev);
8995 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8999 retval = __igb_shutdown(pdev, &wake, 0);
9004 pci_prepare_to_sleep(pdev);
9006 pci_wake_from_d3(pdev, false);
9007 pci_set_power_state(pdev, PCI_D3hot);
9013 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9014 static int igb_resume(struct device *dev)
9016 static int igb_resume(struct pci_dev *pdev)
9017 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9019 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9020 struct pci_dev *pdev = to_pci_dev(dev);
9021 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9022 struct net_device *netdev = pci_get_drvdata(pdev);
9023 struct igb_adapter *adapter = netdev_priv(netdev);
9024 struct e1000_hw *hw = &adapter->hw;
9027 pci_set_power_state(pdev, PCI_D0);
9028 pci_restore_state(pdev);
9029 pci_save_state(pdev);
9031 err = pci_enable_device_mem(pdev);
9033 dev_err(pci_dev_to_dev(pdev),
9034 "igb: Cannot enable PCI device from suspend\n");
9037 pci_set_master(pdev);
9039 pci_enable_wake(pdev, PCI_D3hot, 0);
9040 pci_enable_wake(pdev, PCI_D3cold, 0);
9042 if (igb_init_interrupt_scheme(adapter, true)) {
9043 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
9049 /* let the f/w know that the h/w is now under the control of the
9051 igb_get_hw_control(adapter);
9053 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9055 if (netdev->flags & IFF_UP) {
9057 err = __igb_open(netdev, true);
9063 netif_device_attach(netdev);
9068 #ifdef CONFIG_PM_RUNTIME
9069 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9070 static int igb_runtime_idle(struct device *dev)
9072 struct pci_dev *pdev = to_pci_dev(dev);
9073 struct net_device *netdev = pci_get_drvdata(pdev);
9074 struct igb_adapter *adapter = netdev_priv(netdev);
9076 if (!igb_has_link(adapter))
9077 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9082 static int igb_runtime_suspend(struct device *dev)
9084 struct pci_dev *pdev = to_pci_dev(dev);
9088 retval = __igb_shutdown(pdev, &wake, 1);
9093 pci_prepare_to_sleep(pdev);
9095 pci_wake_from_d3(pdev, false);
9096 pci_set_power_state(pdev, PCI_D3hot);
9102 static int igb_runtime_resume(struct device *dev)
9104 return igb_resume(dev);
9106 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9107 #endif /* CONFIG_PM_RUNTIME */
9108 #endif /* CONFIG_PM */
9110 #ifdef USE_REBOOT_NOTIFIER
9111 /* only want to do this for 2.4 kernels? */
9112 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9115 struct pci_dev *pdev = NULL;
9122 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9123 if (pci_dev_driver(pdev) == &igb_driver) {
9124 __igb_shutdown(pdev, &wake, 0);
9125 if (event == SYS_POWER_OFF) {
9126 pci_wake_from_d3(pdev, wake);
9127 pci_set_power_state(pdev, PCI_D3hot);
9135 static void igb_shutdown(struct pci_dev *pdev)
9139 __igb_shutdown(pdev, &wake, 0);
9141 if (system_state == SYSTEM_POWER_OFF) {
9142 pci_wake_from_d3(pdev, wake);
9143 pci_set_power_state(pdev, PCI_D3hot);
9146 #endif /* USE_REBOOT_NOTIFIER */
9148 #ifdef CONFIG_NET_POLL_CONTROLLER
9150 * Polling 'interrupt' - used by things like netconsole to send skbs
9151 * without having to re-enable interrupts. It's not called while
9152 * the interrupt routine is executing.
9154 static void igb_netpoll(struct net_device *netdev)
9156 struct igb_adapter *adapter = netdev_priv(netdev);
9157 struct e1000_hw *hw = &adapter->hw;
9158 struct igb_q_vector *q_vector;
9161 for (i = 0; i < adapter->num_q_vectors; i++) {
9162 q_vector = adapter->q_vector[i];
9163 if (adapter->msix_entries)
9164 E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9166 igb_irq_disable(adapter);
9167 napi_schedule(&q_vector->napi);
9170 #endif /* CONFIG_NET_POLL_CONTROLLER */
9173 #define E1000_DEV_ID_82576_VF 0x10CA
9175 * igb_io_error_detected - called when PCI error is detected
9176 * @pdev: Pointer to PCI device
9177 * @state: The current pci connection state
9179 * This function is called after a PCI bus error affecting
9180 * this device has been detected.
9182 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9183 pci_channel_state_t state)
9185 struct net_device *netdev = pci_get_drvdata(pdev);
9186 struct igb_adapter *adapter = netdev_priv(netdev);
9188 #ifdef CONFIG_PCI_IOV__UNUSED
9189 struct pci_dev *bdev, *vfdev;
9190 u32 dw0, dw1, dw2, dw3;
9192 u16 req_id, pf_func;
9194 if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9195 goto skip_bad_vf_detection;
9197 bdev = pdev->bus->self;
9198 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9199 bdev = bdev->bus->self;
9202 goto skip_bad_vf_detection;
9204 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9206 goto skip_bad_vf_detection;
9208 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9209 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9210 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9211 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9214 /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9215 if (!(req_id & 0x0080))
9216 goto skip_bad_vf_detection;
9218 pf_func = req_id & 0x01;
9219 if ((pf_func & 1) == (pdev->devfn & 1)) {
9221 vf = (req_id & 0x7F) >> 1;
9222 dev_err(pci_dev_to_dev(pdev),
9223 "VF %d has caused a PCIe error\n", vf);
9224 dev_err(pci_dev_to_dev(pdev),
9225 "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9226 "%8.8x\tdw3: %8.8x\n",
9227 dw0, dw1, dw2, dw3);
9229 /* Find the pci device of the offending VF */
9230 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9231 E1000_DEV_ID_82576_VF, NULL);
9233 if (vfdev->devfn == (req_id & 0xFF))
9235 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9236 E1000_DEV_ID_82576_VF, vfdev);
9239 * There's a slim chance the VF could have been hot plugged,
9240 * so if it is no longer present we don't need to issue the
9241 * VFLR. Just clean up the AER in that case.
9244 dev_err(pci_dev_to_dev(pdev),
9245 "Issuing VFLR to VF %d\n", vf);
9246 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9249 pci_cleanup_aer_uncorrect_error_status(pdev);
9253 * Even though the error may have occurred on the other port
9254 * we still need to increment the vf error reference count for
9255 * both ports because the I/O resume function will be called
9258 adapter->vferr_refcount++;
9260 return PCI_ERS_RESULT_RECOVERED;
9262 skip_bad_vf_detection:
9263 #endif /* CONFIG_PCI_IOV */
9265 netif_device_detach(netdev);
9267 if (state == pci_channel_io_perm_failure)
9268 return PCI_ERS_RESULT_DISCONNECT;
9270 if (netif_running(netdev))
9272 pci_disable_device(pdev);
9274 /* Request a slot slot reset. */
9275 return PCI_ERS_RESULT_NEED_RESET;
9279 * igb_io_slot_reset - called after the pci bus has been reset.
9280 * @pdev: Pointer to PCI device
9282 * Restart the card from scratch, as if from a cold-boot. Implementation
9283 * resembles the first-half of the igb_resume routine.
9285 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9287 struct net_device *netdev = pci_get_drvdata(pdev);
9288 struct igb_adapter *adapter = netdev_priv(netdev);
9289 struct e1000_hw *hw = &adapter->hw;
9290 pci_ers_result_t result;
9292 if (pci_enable_device_mem(pdev)) {
9293 dev_err(pci_dev_to_dev(pdev),
9294 "Cannot re-enable PCI device after reset.\n");
9295 result = PCI_ERS_RESULT_DISCONNECT;
9297 pci_set_master(pdev);
9298 pci_restore_state(pdev);
9299 pci_save_state(pdev);
9301 pci_enable_wake(pdev, PCI_D3hot, 0);
9302 pci_enable_wake(pdev, PCI_D3cold, 0);
9304 schedule_work(&adapter->reset_task);
9305 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9306 result = PCI_ERS_RESULT_RECOVERED;
9309 pci_cleanup_aer_uncorrect_error_status(pdev);
9315 * igb_io_resume - called when traffic can start flowing again.
9316 * @pdev: Pointer to PCI device
9318 * This callback is called when the error recovery driver tells us that
9319 * its OK to resume normal operation. Implementation resembles the
9320 * second-half of the igb_resume routine.
9322 static void igb_io_resume(struct pci_dev *pdev)
9324 struct net_device *netdev = pci_get_drvdata(pdev);
9325 struct igb_adapter *adapter = netdev_priv(netdev);
9327 if (adapter->vferr_refcount) {
9328 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9329 adapter->vferr_refcount--;
9333 if (netif_running(netdev)) {
9334 if (igb_up(adapter)) {
9335 dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9340 netif_device_attach(netdev);
9342 /* let the f/w know that the h/w is now under the control of the
9344 igb_get_hw_control(adapter);
9347 #endif /* HAVE_PCI_ERS */
9349 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9351 struct e1000_hw *hw = &adapter->hw;
9354 if (is_zero_ether_addr(addr))
9357 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9358 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9360 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9361 IGB_MAC_STATE_IN_USE);
9362 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9363 adapter->mac_table[i].queue = queue;
9364 igb_sync_mac_table(adapter);
9369 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9371 /* search table for addr, if found, set to 0 and sync */
9373 struct e1000_hw *hw = &adapter->hw;
9375 if (is_zero_ether_addr(addr))
9377 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9378 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9379 adapter->mac_table[i].queue == queue) {
9380 adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9381 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9382 adapter->mac_table[i].queue = 0;
9383 igb_sync_mac_table(adapter);
9389 static int igb_set_vf_mac(struct igb_adapter *adapter,
9390 int vf, unsigned char *mac_addr)
9392 igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9393 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9395 igb_add_mac_filter(adapter, mac_addr, vf);
9401 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9403 struct igb_adapter *adapter = netdev_priv(netdev);
9404 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9406 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9407 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9408 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9409 " change effective.\n");
9410 if (test_bit(__IGB_DOWN, &adapter->state)) {
9411 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9412 " but the PF device is not up.\n");
9413 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9414 " attempting to use the VF device.\n");
9416 return igb_set_vf_mac(adapter, vf, mac);
9419 static int igb_link_mbps(int internal_link_speed)
9421 switch (internal_link_speed) {
9433 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9440 /* Calculate the rate factor values to set */
9441 rf_int = link_speed / tx_rate;
9442 rf_dec = (link_speed - (rf_int * tx_rate));
9443 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9445 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9446 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9447 E1000_RTTBCNRC_RF_INT_MASK);
9448 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9453 E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9455 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9456 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9458 E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9459 E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9462 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9464 int actual_link_speed, i;
9465 bool reset_rate = false;
9467 /* VF TX rate limit was not set */
9468 if ((adapter->vf_rate_link_speed == 0) ||
9469 (adapter->hw.mac.type != e1000_82576))
9472 actual_link_speed = igb_link_mbps(adapter->link_speed);
9473 if (actual_link_speed != adapter->vf_rate_link_speed) {
9475 adapter->vf_rate_link_speed = 0;
9476 dev_info(&adapter->pdev->dev,
9477 "Link speed has been changed. VF Transmit rate is disabled\n");
9480 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9482 adapter->vf_data[i].tx_rate = 0;
9484 igb_set_vf_rate_limit(&adapter->hw, i,
9485 adapter->vf_data[i].tx_rate, actual_link_speed);
9489 #ifdef HAVE_VF_MIN_MAX_TXRATE
9490 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9492 #else /* HAVE_VF_MIN_MAX_TXRATE */
9493 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9494 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9496 struct igb_adapter *adapter = netdev_priv(netdev);
9497 struct e1000_hw *hw = &adapter->hw;
9498 int actual_link_speed;
9500 if (hw->mac.type != e1000_82576)
9503 #ifdef HAVE_VF_MIN_MAX_TXRATE
9506 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9508 actual_link_speed = igb_link_mbps(adapter->link_speed);
9509 if ((vf >= adapter->vfs_allocated_count) ||
9510 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9511 (tx_rate < 0) || (tx_rate > actual_link_speed))
9514 adapter->vf_rate_link_speed = actual_link_speed;
9515 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9516 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9521 static int igb_ndo_get_vf_config(struct net_device *netdev,
9522 int vf, struct ifla_vf_info *ivi)
9524 struct igb_adapter *adapter = netdev_priv(netdev);
9525 if (vf >= adapter->vfs_allocated_count)
9528 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9529 #ifdef HAVE_VF_MIN_MAX_TXRATE
9530 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9531 ivi->min_tx_rate = 0;
9532 #else /* HAVE_VF_MIN_MAX_TXRATE */
9533 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9534 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9535 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9536 ivi->qos = adapter->vf_data[vf].pf_qos;
9537 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9538 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9543 static void igb_vmm_control(struct igb_adapter *adapter)
9545 struct e1000_hw *hw = &adapter->hw;
9549 switch (hw->mac.type) {
9552 /* replication is not supported for 82575 */
9555 /* notify HW that the MAC is adding vlan tags */
9556 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9557 reg |= (E1000_DTXCTL_VLAN_ADDED |
9558 E1000_DTXCTL_SPOOF_INT);
9559 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9561 /* enable replication vlan tag stripping */
9562 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9563 reg |= E1000_RPLOLR_STRVLAN;
9564 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9567 /* none of the above registers are supported by i350 */
9571 /* Enable Malicious Driver Detection */
9572 if ((adapter->vfs_allocated_count) &&
9574 if (hw->mac.type == e1000_i350)
9575 igb_enable_mdd(adapter);
9578 /* enable replication and loopback support */
9579 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9580 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9581 e1000_vmdq_set_loopback_pf(hw, 1);
9582 e1000_vmdq_set_anti_spoofing_pf(hw,
9583 adapter->vfs_allocated_count || adapter->vmdq_pools,
9584 adapter->vfs_allocated_count);
9585 e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9586 adapter->vmdq_pools);
9589 static void igb_init_fw(struct igb_adapter *adapter)
9591 struct e1000_fw_drv_info fw_cmd;
9592 struct e1000_hw *hw = &adapter->hw;
9596 if (hw->mac.type == e1000_i210)
9597 mask = E1000_SWFW_EEP_SM;
9599 mask = E1000_SWFW_PHY0_SM;
9600 /* i211 parts do not support this feature */
9601 if (hw->mac.type == e1000_i211)
9602 hw->mac.arc_subsystem_valid = false;
9604 if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9605 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9606 E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9607 fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9608 fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9609 fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9610 fw_cmd.port_num = hw->bus.func;
9611 fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9612 fw_cmd.hdr.checksum = 0;
9613 fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9615 fw_cmd.hdr.buf_len));
9616 e1000_host_interface_command(hw, (u8*)&fw_cmd,
9618 if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9622 dev_warn(pci_dev_to_dev(adapter->pdev),
9623 "Unable to get semaphore, firmware init failed.\n");
9624 hw->mac.ops.release_swfw_sync(hw, mask);
9627 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9629 struct e1000_hw *hw = &adapter->hw;
9634 if (hw->mac.type == e1000_i211)
9637 if (hw->mac.type > e1000_82580) {
9638 if (adapter->dmac != IGB_DMAC_DISABLE) {
9641 /* force threshold to 0. */
9642 E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9645 * DMA Coalescing high water mark needs to be greater
9646 * than the Rx threshold. Set hwm to PBA - max frame
9647 * size in 16B units, capping it at PBA - 6KB.
9649 hwm = 64 * pba - adapter->max_frame_size / 16;
9650 if (hwm < 64 * (pba - 6))
9651 hwm = 64 * (pba - 6);
9652 reg = E1000_READ_REG(hw, E1000_FCRTC);
9653 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9654 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9655 & E1000_FCRTC_RTH_COAL_MASK);
9656 E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9659 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9660 * frame size, capping it at PBA - 10KB.
9662 dmac_thr = pba - adapter->max_frame_size / 512;
9663 if (dmac_thr < pba - 10)
9664 dmac_thr = pba - 10;
9665 reg = E1000_READ_REG(hw, E1000_DMACR);
9666 reg &= ~E1000_DMACR_DMACTHR_MASK;
9667 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9668 & E1000_DMACR_DMACTHR_MASK);
9670 /* transition to L0x or L1 if available..*/
9671 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9673 /* Check if status is 2.5Gb backplane connection
9674 * before configuration of watchdog timer, which is
9675 * in msec values in 12.8usec intervals
9676 * watchdog timer= msec values in 32usec intervals
9677 * for non 2.5Gb connection
9679 if (hw->mac.type == e1000_i354) {
9680 status = E1000_READ_REG(hw, E1000_STATUS);
9681 if ((status & E1000_STATUS_2P5_SKU) &&
9682 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9683 reg |= ((adapter->dmac * 5) >> 6);
9685 reg |= ((adapter->dmac) >> 5);
9687 reg |= ((adapter->dmac) >> 5);
9691 * Disable BMC-to-OS Watchdog enable
9692 * on devices that support OS-to-BMC
9694 if (hw->mac.type != e1000_i354)
9695 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9696 E1000_WRITE_REG(hw, E1000_DMACR, reg);
9698 /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9699 E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9701 /* This sets the time to wait before requesting
9702 * transition to low power state to number of usecs
9703 * needed to receive 1 512 byte frame at gigabit
9704 * line rate. On i350 device, time to make transition
9705 * to Lx state is delayed by 4 usec with flush disable
9706 * bit set to avoid losing mailbox interrupts
9708 reg = E1000_READ_REG(hw, E1000_DMCTLX);
9709 if (hw->mac.type == e1000_i350)
9710 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9712 /* in 2.5Gb connection, TTLX unit is 0.4 usec
9713 * which is 0x4*2 = 0xA. But delay is still 4 usec
9715 if (hw->mac.type == e1000_i354) {
9716 status = E1000_READ_REG(hw, E1000_STATUS);
9717 if ((status & E1000_STATUS_2P5_SKU) &&
9718 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9725 E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9727 /* free space in tx packet buffer to wake from DMA coal */
9728 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9729 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9731 /* make low power state decision controlled by DMA coal */
9732 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9733 reg &= ~E1000_PCIEMISC_LX_DECISION;
9734 E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9735 } /* endif adapter->dmac is not disabled */
9736 } else if (hw->mac.type == e1000_82580) {
9737 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9738 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9739 reg & ~E1000_PCIEMISC_LX_DECISION);
9740 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9744 #ifdef HAVE_I2C_SUPPORT
9745 /* igb_read_i2c_byte - Reads 8 bit word over I2C
9746 * @hw: pointer to hardware structure
9747 * @byte_offset: byte offset to read
9748 * @dev_addr: device address
9751 * Performs byte read operation over I2C interface at
9752 * a specified device address.
9754 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9755 u8 dev_addr, u8 *data)
9757 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9758 struct i2c_client *this_client = adapter->i2c_client;
9763 return E1000_ERR_I2C;
9765 swfw_mask = E1000_SWFW_PHY0_SM;
9767 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9769 return E1000_ERR_SWFW_SYNC;
9771 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9772 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9775 return E1000_ERR_I2C;
9778 return E1000_SUCCESS;
9782 /* igb_write_i2c_byte - Writes 8 bit word over I2C
9783 * @hw: pointer to hardware structure
9784 * @byte_offset: byte offset to write
9785 * @dev_addr: device address
9786 * @data: value to write
9788 * Performs byte write operation over I2C interface at
9789 * a specified device address.
9791 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9792 u8 dev_addr, u8 data)
9794 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9795 struct i2c_client *this_client = adapter->i2c_client;
9797 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9800 return E1000_ERR_I2C;
9802 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9803 return E1000_ERR_SWFW_SYNC;
9804 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9805 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9808 return E1000_ERR_I2C;
9810 return E1000_SUCCESS;
9812 #endif /* HAVE_I2C_SUPPORT */
9817 * igb_probe - Device Initialization Routine
9818 * @pdev: PCI device information struct
9819 * @ent: entry in igb_pci_tbl
9821 * Returns 0 on success, negative on failure
9823 * igb_probe initializes an adapter identified by a pci_dev structure.
9824 * The OS initialization, configuring of the adapter private structure,
9825 * and a hardware reset occur.
9827 int igb_kni_probe(struct pci_dev *pdev,
9828 struct net_device **lad_dev)
9830 struct net_device *netdev;
9831 struct igb_adapter *adapter;
9832 struct e1000_hw *hw;
9833 u16 eeprom_data = 0;
9834 u8 pba_str[E1000_PBANUM_LENGTH];
9836 static int global_quad_port_a; /* global quad port a indication */
9837 int i, err, pci_using_dac = 0;
9838 static int cards_found;
9840 err = pci_enable_device_mem(pdev);
9846 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9848 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9852 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9854 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9856 IGB_ERR("No usable DMA configuration, "
9863 #ifndef HAVE_ASPM_QUIRKS
9864 /* 82575 requires that the pci-e link partner disable the L0s state */
9865 switch (pdev->device) {
9866 case E1000_DEV_ID_82575EB_COPPER:
9867 case E1000_DEV_ID_82575EB_FIBER_SERDES:
9868 case E1000_DEV_ID_82575GB_QUAD_COPPER:
9869 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9874 #endif /* HAVE_ASPM_QUIRKS */
9875 err = pci_request_selected_regions(pdev,
9876 pci_select_bars(pdev,
9882 pci_enable_pcie_error_reporting(pdev);
9884 pci_set_master(pdev);
9889 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9892 netdev = alloc_etherdev(sizeof(struct igb_adapter));
9893 #endif /* HAVE_TX_MQ */
9895 goto err_alloc_etherdev;
9897 SET_MODULE_OWNER(netdev);
9898 SET_NETDEV_DEV(netdev, &pdev->dev);
9900 //pci_set_drvdata(pdev, netdev);
9901 adapter = netdev_priv(netdev);
9902 adapter->netdev = netdev;
9903 adapter->pdev = pdev;
9906 adapter->port_num = hw->bus.func;
9907 adapter->msg_enable = (1 << debug) - 1;
9910 err = pci_save_state(pdev);
9915 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9916 pci_resource_len(pdev, 0));
9920 #ifdef HAVE_NET_DEVICE_OPS
9921 netdev->netdev_ops = &igb_netdev_ops;
9922 #else /* HAVE_NET_DEVICE_OPS */
9923 netdev->open = &igb_open;
9924 netdev->stop = &igb_close;
9925 netdev->get_stats = &igb_get_stats;
9926 #ifdef HAVE_SET_RX_MODE
9927 netdev->set_rx_mode = &igb_set_rx_mode;
9929 netdev->set_multicast_list = &igb_set_rx_mode;
9930 netdev->set_mac_address = &igb_set_mac;
9931 netdev->change_mtu = &igb_change_mtu;
9932 netdev->do_ioctl = &igb_ioctl;
9933 #ifdef HAVE_TX_TIMEOUT
9934 netdev->tx_timeout = &igb_tx_timeout;
9936 netdev->vlan_rx_register = igb_vlan_mode;
9937 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9938 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9939 #ifdef CONFIG_NET_POLL_CONTROLLER
9940 netdev->poll_controller = igb_netpoll;
9942 netdev->hard_start_xmit = &igb_xmit_frame;
9943 #endif /* HAVE_NET_DEVICE_OPS */
9944 igb_set_ethtool_ops(netdev);
9945 #ifdef HAVE_TX_TIMEOUT
9946 netdev->watchdog_timeo = 5 * HZ;
9949 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9951 adapter->bd_number = cards_found;
9953 /* setup the private structure */
9954 err = igb_sw_init(adapter);
9958 e1000_get_bus_info(hw);
9960 hw->phy.autoneg_wait_to_complete = FALSE;
9961 hw->mac.adaptive_ifs = FALSE;
9963 /* Copper options */
9964 if (hw->phy.media_type == e1000_media_type_copper) {
9965 hw->phy.mdix = AUTO_ALL_MODES;
9966 hw->phy.disable_polarity_correction = FALSE;
9967 hw->phy.ms_type = e1000_ms_hw_default;
9970 if (e1000_check_reset_block(hw))
9971 dev_info(pci_dev_to_dev(pdev),
9972 "PHY reset is blocked due to SOL/IDER session.\n");
9975 * features is initialized to 0 in allocation, it might have bits
9976 * set by igb_sw_init so we should use an or instead of an
9979 netdev->features |= NETIF_F_SG |
9981 #ifdef NETIF_F_IPV6_CSUM
9989 #endif /* NETIF_F_TSO */
9990 #ifdef NETIF_F_RXHASH
9994 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9995 NETIF_F_HW_VLAN_CTAG_RX |
9996 NETIF_F_HW_VLAN_CTAG_TX;
9998 NETIF_F_HW_VLAN_RX |
10002 if (hw->mac.type >= e1000_82576)
10003 netdev->features |= NETIF_F_SCTP_CSUM;
10005 #ifdef HAVE_NDO_SET_FEATURES
10006 /* copy netdev features into list of user selectable features */
10007 netdev->hw_features |= netdev->features;
10010 /* give us the option of enabling LRO later */
10011 netdev->hw_features |= NETIF_F_LRO;
10016 /* this is only needed on kernels prior to 2.6.39 */
10017 netdev->features |= NETIF_F_GRO;
10021 /* set this bit last since it cannot be part of hw_features */
10022 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
10023 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
10025 netdev->features |= NETIF_F_HW_VLAN_FILTER;
10028 #ifdef HAVE_NETDEV_VLAN_FEATURES
10029 netdev->vlan_features |= NETIF_F_TSO |
10032 NETIF_F_IPV6_CSUM |
10037 netdev->features |= NETIF_F_HIGHDMA;
10040 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
10042 if (adapter->dmac != IGB_DMAC_DISABLE)
10043 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
10046 /* before reading the NVM, reset the controller to put the device in a
10047 * known good starting state */
10048 e1000_reset_hw(hw);
10049 #endif /* NO_KNI */
10051 /* make sure the NVM is good */
10052 if (e1000_validate_nvm_checksum(hw) < 0) {
10053 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
10059 /* copy the MAC address out of the NVM */
10060 if (e1000_read_mac_addr(hw))
10061 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10062 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10063 #ifdef ETHTOOL_GPERMADDR
10064 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10066 if (!is_valid_ether_addr(netdev->perm_addr)) {
10068 if (!is_valid_ether_addr(netdev->dev_addr)) {
10070 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10075 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10076 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10077 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10078 igb_rar_set(adapter, 0);
10080 /* get firmware version for ethtool -i */
10081 igb_set_fw_version(adapter);
10083 /* Check if Media Autosense is enabled */
10084 if (hw->mac.type == e1000_82580)
10085 igb_init_mas(adapter);
10088 #ifdef HAVE_TIMER_SETUP
10089 timer_setup(&adapter->watchdog_timer, &igb_watchdog, 0);
10090 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10091 timer_setup(&adapter->dma_err_timer, &igb_dma_err_timer, 0);
10092 timer_setup(&adapter->phy_info_timer, &igb_update_phy_info, 0);
10094 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10095 (unsigned long) adapter);
10096 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10097 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10098 (unsigned long) adapter);
10099 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10100 (unsigned long) adapter);
10103 INIT_WORK(&adapter->reset_task, igb_reset_task);
10104 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10105 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10106 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10109 /* Initialize link properties that are user-changeable */
10110 adapter->fc_autoneg = true;
10111 hw->mac.autoneg = true;
10112 hw->phy.autoneg_advertised = 0x2f;
10114 hw->fc.requested_mode = e1000_fc_default;
10115 hw->fc.current_mode = e1000_fc_default;
10117 e1000_validate_mdi_setting(hw);
10119 /* By default, support wake on port A */
10120 if (hw->bus.func == 0)
10121 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10123 /* Check the NVM for wake support for non-port A ports */
10124 if (hw->mac.type >= e1000_82580)
10125 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10126 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10128 else if (hw->bus.func == 1)
10129 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10131 if (eeprom_data & IGB_EEPROM_APME)
10132 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10134 /* now that we have the eeprom settings, apply the special cases where
10135 * the eeprom may be wrong or the board simply won't support wake on
10136 * lan on a particular port */
10137 switch (pdev->device) {
10138 case E1000_DEV_ID_82575GB_QUAD_COPPER:
10139 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10141 case E1000_DEV_ID_82575EB_FIBER_SERDES:
10142 case E1000_DEV_ID_82576_FIBER:
10143 case E1000_DEV_ID_82576_SERDES:
10144 /* Wake events only supported on port A for dual fiber
10145 * regardless of eeprom setting */
10146 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10147 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10149 case E1000_DEV_ID_82576_QUAD_COPPER:
10150 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10151 /* if quad port adapter, disable WoL on all but port A */
10152 if (global_quad_port_a != 0)
10153 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10155 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10156 /* Reset for multiple quad port adapters */
10157 if (++global_quad_port_a == 4)
10158 global_quad_port_a = 0;
10161 /* If the device can't wake, don't set software support */
10162 if (!device_can_wakeup(&adapter->pdev->dev))
10163 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10167 /* initialize the wol settings based on the eeprom settings */
10168 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10169 adapter->wol |= E1000_WUFC_MAG;
10171 /* Some vendors want WoL disabled by default, but still supported */
10172 if ((hw->mac.type == e1000_i350) &&
10173 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10174 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10179 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10180 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10182 /* reset the hardware with the new settings */
10183 igb_reset(adapter);
10184 adapter->devrc = 0;
10186 #ifdef HAVE_I2C_SUPPORT
10187 /* Init the I2C interface */
10188 err = igb_init_i2c(adapter);
10190 dev_err(&pdev->dev, "failed to init i2c interface\n");
10193 #endif /* HAVE_I2C_SUPPORT */
10195 /* let the f/w know that the h/w is now under the control of the
10197 igb_get_hw_control(adapter);
10199 strncpy(netdev->name, "eth%d", IFNAMSIZ);
10200 err = register_netdev(netdev);
10204 #ifdef CONFIG_IGB_VMDQ_NETDEV
10205 err = igb_init_vmdq_netdevs(adapter);
10209 /* carrier off reporting is important to ethtool even BEFORE open */
10210 netif_carrier_off(netdev);
10213 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10214 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10215 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10216 igb_setup_dca(adapter);
10220 #ifdef HAVE_PTP_1588_CLOCK
10221 /* do hw tstamp init after resetting */
10222 igb_ptp_init(adapter);
10223 #endif /* HAVE_PTP_1588_CLOCK */
10225 #endif /* NO_KNI */
10226 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10227 /* print bus type/speed/width info */
10228 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10230 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10231 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10232 (hw->mac.type == e1000_i354) ? "integrated" :
10234 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10235 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10236 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10237 (hw->mac.type == e1000_i354) ? "integrated" :
10239 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10240 for (i = 0; i < 6; i++)
10241 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10243 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10245 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10246 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10250 /* Initialize the thermal sensor on i350 devices. */
10251 if (hw->mac.type == e1000_i350) {
10252 if (hw->bus.func == 0) {
10256 * Read the NVM to determine if this i350 device
10257 * supports an external thermal sensor.
10259 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10260 if (ets_word != 0x0000 && ets_word != 0xFFFF)
10261 adapter->ets = true;
10263 adapter->ets = false;
10268 igb_sysfs_init(adapter);
10272 igb_procfs_init(adapter);
10273 #endif /* IGB_PROCFS */
10274 #endif /* IGB_HWMON */
10275 #endif /* NO_KNI */
10277 adapter->ets = false;
10280 if (hw->phy.media_type == e1000_media_type_copper) {
10281 switch (hw->mac.type) {
10285 /* Enable EEE for internal copper PHY devices */
10286 err = e1000_set_eee_i350(hw);
10288 (adapter->flags & IGB_FLAG_EEE))
10289 adapter->eee_advert =
10290 MDIO_EEE_100TX | MDIO_EEE_1000T;
10293 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10294 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10295 err = e1000_set_eee_i354(hw);
10297 (adapter->flags & IGB_FLAG_EEE))
10298 adapter->eee_advert =
10299 MDIO_EEE_100TX | MDIO_EEE_1000T;
10307 /* send driver version info to firmware */
10308 if (hw->mac.type >= e1000_i350)
10309 igb_init_fw(adapter);
10312 if (netdev->features & NETIF_F_LRO)
10313 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10315 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10317 dev_info(pci_dev_to_dev(pdev),
10318 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10319 adapter->msix_entries ? "MSI-X" :
10320 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10321 adapter->num_rx_queues, adapter->num_tx_queues);
10326 pm_runtime_put_noidle(&pdev->dev);
10330 // igb_release_hw_control(adapter);
10331 #ifdef HAVE_I2C_SUPPORT
10332 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10333 #endif /* HAVE_I2C_SUPPORT */
10335 // if (!e1000_check_reset_block(hw))
10336 // e1000_phy_hw_reset(hw);
10338 if (hw->flash_address)
10339 iounmap(hw->flash_address);
10341 // igb_clear_interrupt_scheme(adapter);
10342 // igb_reset_sriov_capability(adapter);
10343 iounmap(hw->hw_addr);
10345 free_netdev(netdev);
10346 err_alloc_etherdev:
10347 // pci_release_selected_regions(pdev,
10348 // pci_select_bars(pdev, IORESOURCE_MEM));
10351 pci_disable_device(pdev);
10356 void igb_kni_remove(struct pci_dev *pdev)
10358 pci_disable_device(pdev);