4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
98 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
99 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
100 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
104 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
106 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
107 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
108 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
109 {"errors", offsetof(struct rte_eth_stats, q_errors)},
112 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
113 sizeof(rte_rxq_stats_strings[0]))
115 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
116 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
117 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
119 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
120 sizeof(rte_txq_stats_strings[0]))
124 * The user application callback description.
126 * It contains callback address to be registered by user application,
127 * the pointer to the parameters for callback, and the event type.
129 struct rte_eth_dev_callback {
130 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
131 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
132 void *cb_arg; /**< Parameter for callback */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
148 rte_eth_dev_data_alloc(void)
150 const unsigned flags = 0;
151 const struct rte_memzone *mz;
153 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
154 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
155 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
156 rte_socket_id(), flags);
158 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
160 rte_panic("Cannot allocate memzone for ethernet port data\n");
162 rte_eth_dev_data = mz->addr;
163 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
164 memset(rte_eth_dev_data, 0,
165 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
169 rte_eth_dev_allocated(const char *name)
173 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
174 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
175 strcmp(rte_eth_devices[i].data->name, name) == 0)
176 return &rte_eth_devices[i];
182 rte_eth_dev_find_free_port(void)
186 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
187 if (rte_eth_devices[i].attached == DEV_DETACHED)
190 return RTE_MAX_ETHPORTS;
193 static struct rte_eth_dev *
194 eth_dev_get(uint8_t port_id)
196 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
198 eth_dev->data = &rte_eth_dev_data[port_id];
199 eth_dev->attached = DEV_ATTACHED;
201 eth_dev_last_created_port = port_id;
208 rte_eth_dev_allocate(const char *name)
211 struct rte_eth_dev *eth_dev;
213 port_id = rte_eth_dev_find_free_port();
214 if (port_id == RTE_MAX_ETHPORTS) {
215 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
219 if (rte_eth_dev_data == NULL)
220 rte_eth_dev_data_alloc();
222 if (rte_eth_dev_allocated(name) != NULL) {
223 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
228 eth_dev = eth_dev_get(port_id);
229 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
230 eth_dev->data->port_id = port_id;
236 * Attach to a port already registered by the primary process, which
237 * makes sure that the same device would have the same port id both
238 * in the primary and secondary process.
240 static struct rte_eth_dev *
241 eth_dev_attach_secondary(const char *name)
244 struct rte_eth_dev *eth_dev;
246 if (rte_eth_dev_data == NULL)
247 rte_eth_dev_data_alloc();
249 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
250 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
253 if (i == RTE_MAX_ETHPORTS) {
255 "device %s is not driven by the primary process\n",
260 eth_dev = eth_dev_get(i);
261 RTE_ASSERT(eth_dev->data->port_id == i);
267 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
272 eth_dev->attached = DEV_DETACHED;
278 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
279 struct rte_pci_device *pci_dev)
281 struct eth_driver *eth_drv;
282 struct rte_eth_dev *eth_dev;
283 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
287 eth_drv = (struct eth_driver *)pci_drv;
289 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
290 sizeof(ethdev_name));
292 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
293 eth_dev = rte_eth_dev_allocate(ethdev_name);
297 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
298 eth_drv->dev_private_size,
299 RTE_CACHE_LINE_SIZE);
300 if (eth_dev->data->dev_private == NULL)
301 rte_panic("Cannot allocate memzone for private port data\n");
303 eth_dev = eth_dev_attach_secondary(ethdev_name);
304 if (eth_dev == NULL) {
306 * if we failed to attach a device, it means the
307 * device is skipped in primary process, due to
308 * some errors. If so, we return a positive value,
309 * to let EAL skip it for the secondary process
315 eth_dev->pci_dev = pci_dev;
316 eth_dev->driver = eth_drv;
317 eth_dev->data->rx_mbuf_alloc_failed = 0;
319 /* init user callbacks */
320 TAILQ_INIT(&(eth_dev->link_intr_cbs));
323 * Set the default MTU.
325 eth_dev->data->mtu = ETHER_MTU;
327 /* Invoke PMD device initialization function */
328 diag = (*eth_drv->eth_dev_init)(eth_dev);
332 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
333 pci_drv->driver.name,
334 (unsigned) pci_dev->id.vendor_id,
335 (unsigned) pci_dev->id.device_id);
336 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
337 rte_free(eth_dev->data->dev_private);
338 rte_eth_dev_release_port(eth_dev);
343 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
345 const struct eth_driver *eth_drv;
346 struct rte_eth_dev *eth_dev;
347 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
353 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
354 sizeof(ethdev_name));
356 eth_dev = rte_eth_dev_allocated(ethdev_name);
360 eth_drv = (const struct eth_driver *)pci_dev->driver;
362 /* Invoke PMD device uninit function */
363 if (*eth_drv->eth_dev_uninit) {
364 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
369 /* free ether device */
370 rte_eth_dev_release_port(eth_dev);
372 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
373 rte_free(eth_dev->data->dev_private);
375 eth_dev->pci_dev = NULL;
376 eth_dev->driver = NULL;
377 eth_dev->data = NULL;
383 rte_eth_dev_is_valid_port(uint8_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 rte_eth_devices[port_id].attached != DEV_ATTACHED)
393 rte_eth_dev_socket_id(uint8_t port_id)
395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
396 return rte_eth_devices[port_id].data->numa_node;
400 rte_eth_dev_count(void)
406 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
413 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
417 /* shouldn't check 'rte_eth_devices[i].data',
418 * because it might be overwritten by VDEV PMD */
419 tmp = rte_eth_dev_data[port_id].name;
425 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
430 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
437 *port_id = RTE_MAX_ETHPORTS;
439 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 rte_eth_dev_data[i].name, strlen(name))) {
453 rte_eth_dev_is_detachable(uint8_t port_id)
457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
459 switch (rte_eth_devices[port_id].data->kdrv) {
460 case RTE_KDRV_IGB_UIO:
461 case RTE_KDRV_UIO_GENERIC:
462 case RTE_KDRV_NIC_UIO:
469 dev_flags = rte_eth_devices[port_id].data->dev_flags;
470 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
471 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
477 /* attach the new device, then store port_id of the device */
479 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
482 int current = rte_eth_dev_count();
486 if ((devargs == NULL) || (port_id == NULL)) {
491 /* parse devargs, then retrieve device name and args */
492 if (rte_eal_parse_devargs_str(devargs, &name, &args))
495 ret = rte_eal_dev_attach(name, args);
499 /* no point looking at the port count if no port exists */
500 if (!rte_eth_dev_count()) {
501 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
506 /* if nothing happened, there is a bug here, since some driver told us
507 * it did attach a device, but did not create a port.
509 if (current == rte_eth_dev_count()) {
514 *port_id = eth_dev_last_created_port;
523 /* detach the device, then store the name of the device */
525 rte_eth_dev_detach(uint8_t port_id, char *name)
534 /* FIXME: move this to eal, once device flags are relocated there */
535 if (rte_eth_dev_is_detachable(port_id))
538 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
539 "%s", rte_eth_devices[port_id].data->name);
540 ret = rte_eal_dev_detach(name);
551 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
553 uint16_t old_nb_queues = dev->data->nb_rx_queues;
557 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
558 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
559 sizeof(dev->data->rx_queues[0]) * nb_queues,
560 RTE_CACHE_LINE_SIZE);
561 if (dev->data->rx_queues == NULL) {
562 dev->data->nb_rx_queues = 0;
565 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
566 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
568 rxq = dev->data->rx_queues;
570 for (i = nb_queues; i < old_nb_queues; i++)
571 (*dev->dev_ops->rx_queue_release)(rxq[i]);
572 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
573 RTE_CACHE_LINE_SIZE);
576 if (nb_queues > old_nb_queues) {
577 uint16_t new_qs = nb_queues - old_nb_queues;
579 memset(rxq + old_nb_queues, 0,
580 sizeof(rxq[0]) * new_qs);
583 dev->data->rx_queues = rxq;
585 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
588 rxq = dev->data->rx_queues;
590 for (i = nb_queues; i < old_nb_queues; i++)
591 (*dev->dev_ops->rx_queue_release)(rxq[i]);
593 dev->data->nb_rx_queues = nb_queues;
598 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
600 struct rte_eth_dev *dev;
602 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
604 dev = &rte_eth_devices[port_id];
605 if (rx_queue_id >= dev->data->nb_rx_queues) {
606 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
612 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
613 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
614 " already started\n",
615 rx_queue_id, port_id);
619 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
624 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
626 struct rte_eth_dev *dev;
628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
630 dev = &rte_eth_devices[port_id];
631 if (rx_queue_id >= dev->data->nb_rx_queues) {
632 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
636 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
638 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
639 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
640 " already stopped\n",
641 rx_queue_id, port_id);
645 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
650 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
652 struct rte_eth_dev *dev;
654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
656 dev = &rte_eth_devices[port_id];
657 if (tx_queue_id >= dev->data->nb_tx_queues) {
658 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
664 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
665 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
666 " already started\n",
667 tx_queue_id, port_id);
671 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
676 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
678 struct rte_eth_dev *dev;
680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
682 dev = &rte_eth_devices[port_id];
683 if (tx_queue_id >= dev->data->nb_tx_queues) {
684 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
690 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
691 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
692 " already stopped\n",
693 tx_queue_id, port_id);
697 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
702 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
704 uint16_t old_nb_queues = dev->data->nb_tx_queues;
708 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
709 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
710 sizeof(dev->data->tx_queues[0]) * nb_queues,
711 RTE_CACHE_LINE_SIZE);
712 if (dev->data->tx_queues == NULL) {
713 dev->data->nb_tx_queues = 0;
716 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
719 txq = dev->data->tx_queues;
721 for (i = nb_queues; i < old_nb_queues; i++)
722 (*dev->dev_ops->tx_queue_release)(txq[i]);
723 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
724 RTE_CACHE_LINE_SIZE);
727 if (nb_queues > old_nb_queues) {
728 uint16_t new_qs = nb_queues - old_nb_queues;
730 memset(txq + old_nb_queues, 0,
731 sizeof(txq[0]) * new_qs);
734 dev->data->tx_queues = txq;
736 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
739 txq = dev->data->tx_queues;
741 for (i = nb_queues; i < old_nb_queues; i++)
742 (*dev->dev_ops->tx_queue_release)(txq[i]);
744 dev->data->nb_tx_queues = nb_queues;
749 rte_eth_speed_bitflag(uint32_t speed, int duplex)
752 case ETH_SPEED_NUM_10M:
753 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
754 case ETH_SPEED_NUM_100M:
755 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
756 case ETH_SPEED_NUM_1G:
757 return ETH_LINK_SPEED_1G;
758 case ETH_SPEED_NUM_2_5G:
759 return ETH_LINK_SPEED_2_5G;
760 case ETH_SPEED_NUM_5G:
761 return ETH_LINK_SPEED_5G;
762 case ETH_SPEED_NUM_10G:
763 return ETH_LINK_SPEED_10G;
764 case ETH_SPEED_NUM_20G:
765 return ETH_LINK_SPEED_20G;
766 case ETH_SPEED_NUM_25G:
767 return ETH_LINK_SPEED_25G;
768 case ETH_SPEED_NUM_40G:
769 return ETH_LINK_SPEED_40G;
770 case ETH_SPEED_NUM_50G:
771 return ETH_LINK_SPEED_50G;
772 case ETH_SPEED_NUM_56G:
773 return ETH_LINK_SPEED_56G;
774 case ETH_SPEED_NUM_100G:
775 return ETH_LINK_SPEED_100G;
782 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
783 const struct rte_eth_conf *dev_conf)
785 struct rte_eth_dev *dev;
786 struct rte_eth_dev_info dev_info;
789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
791 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
793 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
794 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
798 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
800 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
801 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
805 dev = &rte_eth_devices[port_id];
807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
810 if (dev->data->dev_started) {
812 "port %d must be stopped to allow configuration\n", port_id);
816 /* Copy the dev_conf parameter into the dev structure */
817 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
820 * Check that the numbers of RX and TX queues are not greater
821 * than the maximum number of RX and TX queues supported by the
824 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
826 if (nb_rx_q == 0 && nb_tx_q == 0) {
827 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
831 if (nb_rx_q > dev_info.max_rx_queues) {
832 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
833 port_id, nb_rx_q, dev_info.max_rx_queues);
837 if (nb_tx_q > dev_info.max_tx_queues) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
839 port_id, nb_tx_q, dev_info.max_tx_queues);
844 * If link state interrupt is enabled, check that the
845 * device supports it.
847 if ((dev_conf->intr_conf.lsc == 1) &&
848 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
849 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
850 dev->data->drv_name);
855 * If jumbo frames are enabled, check that the maximum RX packet
856 * length is supported by the configured device.
858 if (dev_conf->rxmode.jumbo_frame == 1) {
859 if (dev_conf->rxmode.max_rx_pkt_len >
860 dev_info.max_rx_pktlen) {
861 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
862 " > max valid value %u\n",
864 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
865 (unsigned)dev_info.max_rx_pktlen);
867 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
868 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
869 " < min valid value %u\n",
871 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
872 (unsigned)ETHER_MIN_LEN);
876 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
877 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
878 /* Use default value */
879 dev->data->dev_conf.rxmode.max_rx_pkt_len =
884 * Setup new number of RX/TX queues and reconfigure device.
886 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
888 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
893 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
895 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
897 rte_eth_dev_rx_queue_config(dev, 0);
901 diag = (*dev->dev_ops->dev_configure)(dev);
903 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
905 rte_eth_dev_rx_queue_config(dev, 0);
906 rte_eth_dev_tx_queue_config(dev, 0);
914 rte_eth_dev_config_restore(uint8_t port_id)
916 struct rte_eth_dev *dev;
917 struct rte_eth_dev_info dev_info;
918 struct ether_addr addr;
922 dev = &rte_eth_devices[port_id];
924 rte_eth_dev_info_get(port_id, &dev_info);
926 if (RTE_ETH_DEV_SRIOV(dev).active)
927 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
929 /* replay MAC address configuration */
930 for (i = 0; i < dev_info.max_mac_addrs; i++) {
931 addr = dev->data->mac_addrs[i];
933 /* skip zero address */
934 if (is_zero_ether_addr(&addr))
937 /* add address to the hardware */
938 if (*dev->dev_ops->mac_addr_add &&
939 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
940 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
942 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
944 /* exit the loop but not return an error */
949 /* replay promiscuous configuration */
950 if (rte_eth_promiscuous_get(port_id) == 1)
951 rte_eth_promiscuous_enable(port_id);
952 else if (rte_eth_promiscuous_get(port_id) == 0)
953 rte_eth_promiscuous_disable(port_id);
955 /* replay all multicast configuration */
956 if (rte_eth_allmulticast_get(port_id) == 1)
957 rte_eth_allmulticast_enable(port_id);
958 else if (rte_eth_allmulticast_get(port_id) == 0)
959 rte_eth_allmulticast_disable(port_id);
963 rte_eth_dev_start(uint8_t port_id)
965 struct rte_eth_dev *dev;
968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
970 dev = &rte_eth_devices[port_id];
972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
974 if (dev->data->dev_started != 0) {
975 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
976 " already started\n",
981 diag = (*dev->dev_ops->dev_start)(dev);
983 dev->data->dev_started = 1;
987 rte_eth_dev_config_restore(port_id);
989 if (dev->data->dev_conf.intr_conf.lsc == 0) {
990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
991 (*dev->dev_ops->link_update)(dev, 0);
997 rte_eth_dev_stop(uint8_t port_id)
999 struct rte_eth_dev *dev;
1001 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1002 dev = &rte_eth_devices[port_id];
1004 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1006 if (dev->data->dev_started == 0) {
1007 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1008 " already stopped\n",
1013 dev->data->dev_started = 0;
1014 (*dev->dev_ops->dev_stop)(dev);
1018 rte_eth_dev_set_link_up(uint8_t port_id)
1020 struct rte_eth_dev *dev;
1022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1024 dev = &rte_eth_devices[port_id];
1026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1027 return (*dev->dev_ops->dev_set_link_up)(dev);
1031 rte_eth_dev_set_link_down(uint8_t port_id)
1033 struct rte_eth_dev *dev;
1035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1037 dev = &rte_eth_devices[port_id];
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1040 return (*dev->dev_ops->dev_set_link_down)(dev);
1044 rte_eth_dev_close(uint8_t port_id)
1046 struct rte_eth_dev *dev;
1048 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1049 dev = &rte_eth_devices[port_id];
1051 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1052 dev->data->dev_started = 0;
1053 (*dev->dev_ops->dev_close)(dev);
1055 dev->data->nb_rx_queues = 0;
1056 rte_free(dev->data->rx_queues);
1057 dev->data->rx_queues = NULL;
1058 dev->data->nb_tx_queues = 0;
1059 rte_free(dev->data->tx_queues);
1060 dev->data->tx_queues = NULL;
1064 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1065 uint16_t nb_rx_desc, unsigned int socket_id,
1066 const struct rte_eth_rxconf *rx_conf,
1067 struct rte_mempool *mp)
1070 uint32_t mbp_buf_size;
1071 struct rte_eth_dev *dev;
1072 struct rte_eth_dev_info dev_info;
1074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1076 dev = &rte_eth_devices[port_id];
1077 if (rx_queue_id >= dev->data->nb_rx_queues) {
1078 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1082 if (dev->data->dev_started) {
1083 RTE_PMD_DEBUG_TRACE(
1084 "port %d must be stopped to allow configuration\n", port_id);
1088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1092 * Check the size of the mbuf data buffer.
1093 * This value must be provided in the private data of the memory pool.
1094 * First check that the memory pool has a valid private data.
1096 rte_eth_dev_info_get(port_id, &dev_info);
1097 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1098 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1099 mp->name, (int) mp->private_data_size,
1100 (int) sizeof(struct rte_pktmbuf_pool_private));
1103 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1105 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1106 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1107 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1111 (int)(RTE_PKTMBUF_HEADROOM +
1112 dev_info.min_rx_bufsize),
1113 (int)RTE_PKTMBUF_HEADROOM,
1114 (int)dev_info.min_rx_bufsize);
1118 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1119 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1120 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1122 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1123 "should be: <= %hu, = %hu, and a product of %hu\n",
1125 dev_info.rx_desc_lim.nb_max,
1126 dev_info.rx_desc_lim.nb_min,
1127 dev_info.rx_desc_lim.nb_align);
1131 if (rx_conf == NULL)
1132 rx_conf = &dev_info.default_rxconf;
1134 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1135 socket_id, rx_conf, mp);
1137 if (!dev->data->min_rx_buf_size ||
1138 dev->data->min_rx_buf_size > mbp_buf_size)
1139 dev->data->min_rx_buf_size = mbp_buf_size;
1146 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1147 uint16_t nb_tx_desc, unsigned int socket_id,
1148 const struct rte_eth_txconf *tx_conf)
1150 struct rte_eth_dev *dev;
1151 struct rte_eth_dev_info dev_info;
1153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1155 dev = &rte_eth_devices[port_id];
1156 if (tx_queue_id >= dev->data->nb_tx_queues) {
1157 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1161 if (dev->data->dev_started) {
1162 RTE_PMD_DEBUG_TRACE(
1163 "port %d must be stopped to allow configuration\n", port_id);
1167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1170 rte_eth_dev_info_get(port_id, &dev_info);
1172 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1173 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1174 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1175 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1176 "should be: <= %hu, = %hu, and a product of %hu\n",
1178 dev_info.tx_desc_lim.nb_max,
1179 dev_info.tx_desc_lim.nb_min,
1180 dev_info.tx_desc_lim.nb_align);
1184 if (tx_conf == NULL)
1185 tx_conf = &dev_info.default_txconf;
1187 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1188 socket_id, tx_conf);
1192 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1193 void *userdata __rte_unused)
1197 for (i = 0; i < unsent; i++)
1198 rte_pktmbuf_free(pkts[i]);
1202 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1205 uint64_t *count = userdata;
1208 for (i = 0; i < unsent; i++)
1209 rte_pktmbuf_free(pkts[i]);
1215 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1216 buffer_tx_error_fn cbfn, void *userdata)
1218 buffer->error_callback = cbfn;
1219 buffer->error_userdata = userdata;
1224 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1231 buffer->size = size;
1232 if (buffer->error_callback == NULL) {
1233 ret = rte_eth_tx_buffer_set_err_callback(
1234 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1241 rte_eth_promiscuous_enable(uint8_t port_id)
1243 struct rte_eth_dev *dev;
1245 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1246 dev = &rte_eth_devices[port_id];
1248 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1249 (*dev->dev_ops->promiscuous_enable)(dev);
1250 dev->data->promiscuous = 1;
1254 rte_eth_promiscuous_disable(uint8_t port_id)
1256 struct rte_eth_dev *dev;
1258 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1259 dev = &rte_eth_devices[port_id];
1261 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1262 dev->data->promiscuous = 0;
1263 (*dev->dev_ops->promiscuous_disable)(dev);
1267 rte_eth_promiscuous_get(uint8_t port_id)
1269 struct rte_eth_dev *dev;
1271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1273 dev = &rte_eth_devices[port_id];
1274 return dev->data->promiscuous;
1278 rte_eth_allmulticast_enable(uint8_t port_id)
1280 struct rte_eth_dev *dev;
1282 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1283 dev = &rte_eth_devices[port_id];
1285 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1286 (*dev->dev_ops->allmulticast_enable)(dev);
1287 dev->data->all_multicast = 1;
1291 rte_eth_allmulticast_disable(uint8_t port_id)
1293 struct rte_eth_dev *dev;
1295 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1296 dev = &rte_eth_devices[port_id];
1298 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1299 dev->data->all_multicast = 0;
1300 (*dev->dev_ops->allmulticast_disable)(dev);
1304 rte_eth_allmulticast_get(uint8_t port_id)
1306 struct rte_eth_dev *dev;
1308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1310 dev = &rte_eth_devices[port_id];
1311 return dev->data->all_multicast;
1315 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1316 struct rte_eth_link *link)
1318 struct rte_eth_link *dst = link;
1319 struct rte_eth_link *src = &(dev->data->dev_link);
1321 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1322 *(uint64_t *)src) == 0)
1329 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1331 struct rte_eth_dev *dev;
1333 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1334 dev = &rte_eth_devices[port_id];
1336 if (dev->data->dev_conf.intr_conf.lsc != 0)
1337 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1339 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1340 (*dev->dev_ops->link_update)(dev, 1);
1341 *eth_link = dev->data->dev_link;
1346 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1351 dev = &rte_eth_devices[port_id];
1353 if (dev->data->dev_conf.intr_conf.lsc != 0)
1354 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1356 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1357 (*dev->dev_ops->link_update)(dev, 0);
1358 *eth_link = dev->data->dev_link;
1363 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1365 struct rte_eth_dev *dev;
1367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1369 dev = &rte_eth_devices[port_id];
1370 memset(stats, 0, sizeof(*stats));
1372 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1373 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1374 (*dev->dev_ops->stats_get)(dev, stats);
1379 rte_eth_stats_reset(uint8_t port_id)
1381 struct rte_eth_dev *dev;
1383 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1384 dev = &rte_eth_devices[port_id];
1386 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1387 (*dev->dev_ops->stats_reset)(dev);
1388 dev->data->rx_mbuf_alloc_failed = 0;
1392 get_xstats_count(uint8_t port_id)
1394 struct rte_eth_dev *dev;
1397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1398 dev = &rte_eth_devices[port_id];
1399 if (dev->dev_ops->xstats_get_names != NULL) {
1400 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1405 count += RTE_NB_STATS;
1406 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1408 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1414 rte_eth_xstats_get_names(uint8_t port_id,
1415 struct rte_eth_xstat_name *xstats_names,
1418 struct rte_eth_dev *dev;
1419 int cnt_used_entries;
1420 int cnt_expected_entries;
1421 int cnt_driver_entries;
1422 uint32_t idx, id_queue;
1425 cnt_expected_entries = get_xstats_count(port_id);
1426 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1427 (int)size < cnt_expected_entries)
1428 return cnt_expected_entries;
1430 /* port_id checked in get_xstats_count() */
1431 dev = &rte_eth_devices[port_id];
1432 cnt_used_entries = 0;
1434 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1435 snprintf(xstats_names[cnt_used_entries].name,
1436 sizeof(xstats_names[0].name),
1437 "%s", rte_stats_strings[idx].name);
1440 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1441 for (id_queue = 0; id_queue < num_q; id_queue++) {
1442 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1443 snprintf(xstats_names[cnt_used_entries].name,
1444 sizeof(xstats_names[0].name),
1446 id_queue, rte_rxq_stats_strings[idx].name);
1451 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1452 for (id_queue = 0; id_queue < num_q; id_queue++) {
1453 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1454 snprintf(xstats_names[cnt_used_entries].name,
1455 sizeof(xstats_names[0].name),
1457 id_queue, rte_txq_stats_strings[idx].name);
1462 if (dev->dev_ops->xstats_get_names != NULL) {
1463 /* If there are any driver-specific xstats, append them
1466 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1468 xstats_names + cnt_used_entries,
1469 size - cnt_used_entries);
1470 if (cnt_driver_entries < 0)
1471 return cnt_driver_entries;
1472 cnt_used_entries += cnt_driver_entries;
1475 return cnt_used_entries;
1478 /* retrieve ethdev extended statistics */
1480 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1483 struct rte_eth_stats eth_stats;
1484 struct rte_eth_dev *dev;
1485 unsigned count = 0, i, q;
1487 uint64_t val, *stats_ptr;
1488 uint16_t nb_rxqs, nb_txqs;
1490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1492 dev = &rte_eth_devices[port_id];
1494 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1495 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1497 /* Return generic statistics */
1498 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1499 (nb_txqs * RTE_NB_TXQ_STATS);
1501 /* implemented by the driver */
1502 if (dev->dev_ops->xstats_get != NULL) {
1503 /* Retrieve the xstats from the driver at the end of the
1506 xcount = (*dev->dev_ops->xstats_get)(dev,
1507 xstats ? xstats + count : NULL,
1508 (n > count) ? n - count : 0);
1514 if (n < count + xcount || xstats == NULL)
1515 return count + xcount;
1517 /* now fill the xstats structure */
1519 rte_eth_stats_get(port_id, ð_stats);
1522 for (i = 0; i < RTE_NB_STATS; i++) {
1523 stats_ptr = RTE_PTR_ADD(ð_stats,
1524 rte_stats_strings[i].offset);
1526 xstats[count++].value = val;
1530 for (q = 0; q < nb_rxqs; q++) {
1531 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1532 stats_ptr = RTE_PTR_ADD(ð_stats,
1533 rte_rxq_stats_strings[i].offset +
1534 q * sizeof(uint64_t));
1536 xstats[count++].value = val;
1541 for (q = 0; q < nb_txqs; q++) {
1542 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1543 stats_ptr = RTE_PTR_ADD(ð_stats,
1544 rte_txq_stats_strings[i].offset +
1545 q * sizeof(uint64_t));
1547 xstats[count++].value = val;
1551 for (i = 0; i < count; i++)
1553 /* add an offset to driver-specific stats */
1554 for ( ; i < count + xcount; i++)
1555 xstats[i].id += count;
1557 return count + xcount;
1560 /* reset ethdev extended statistics */
1562 rte_eth_xstats_reset(uint8_t port_id)
1564 struct rte_eth_dev *dev;
1566 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1567 dev = &rte_eth_devices[port_id];
1569 /* implemented by the driver */
1570 if (dev->dev_ops->xstats_reset != NULL) {
1571 (*dev->dev_ops->xstats_reset)(dev);
1575 /* fallback to default */
1576 rte_eth_stats_reset(port_id);
1580 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1583 struct rte_eth_dev *dev;
1585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1587 dev = &rte_eth_devices[port_id];
1589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1590 return (*dev->dev_ops->queue_stats_mapping_set)
1591 (dev, queue_id, stat_idx, is_rx);
1596 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1599 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1605 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1608 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1613 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1615 struct rte_eth_dev *dev;
1616 const struct rte_eth_desc_lim lim = {
1617 .nb_max = UINT16_MAX,
1622 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1623 dev = &rte_eth_devices[port_id];
1625 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1626 dev_info->rx_desc_lim = lim;
1627 dev_info->tx_desc_lim = lim;
1629 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1630 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1631 dev_info->pci_dev = dev->pci_dev;
1632 dev_info->driver_name = dev->data->drv_name;
1633 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1634 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1638 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1639 uint32_t *ptypes, int num)
1642 struct rte_eth_dev *dev;
1643 const uint32_t *all_ptypes;
1645 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1646 dev = &rte_eth_devices[port_id];
1647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1648 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1653 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1654 if (all_ptypes[i] & ptype_mask) {
1656 ptypes[j] = all_ptypes[i];
1664 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1666 struct rte_eth_dev *dev;
1668 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1669 dev = &rte_eth_devices[port_id];
1670 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1675 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1677 struct rte_eth_dev *dev;
1679 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1681 dev = &rte_eth_devices[port_id];
1682 *mtu = dev->data->mtu;
1687 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1690 struct rte_eth_dev *dev;
1692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1693 dev = &rte_eth_devices[port_id];
1694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1696 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1698 dev->data->mtu = mtu;
1704 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1706 struct rte_eth_dev *dev;
1708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1709 dev = &rte_eth_devices[port_id];
1710 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1711 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1715 if (vlan_id > 4095) {
1716 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1717 port_id, (unsigned) vlan_id);
1720 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1722 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1726 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1728 struct rte_eth_dev *dev;
1730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1731 dev = &rte_eth_devices[port_id];
1732 if (rx_queue_id >= dev->data->nb_rx_queues) {
1733 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1738 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1744 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1745 enum rte_vlan_type vlan_type,
1748 struct rte_eth_dev *dev;
1750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1751 dev = &rte_eth_devices[port_id];
1752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1754 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1758 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1760 struct rte_eth_dev *dev;
1765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1766 dev = &rte_eth_devices[port_id];
1768 /*check which option changed by application*/
1769 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1770 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1772 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1773 mask |= ETH_VLAN_STRIP_MASK;
1776 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1777 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1779 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1780 mask |= ETH_VLAN_FILTER_MASK;
1783 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1784 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1786 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1787 mask |= ETH_VLAN_EXTEND_MASK;
1794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1795 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1801 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1803 struct rte_eth_dev *dev;
1806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1807 dev = &rte_eth_devices[port_id];
1809 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1810 ret |= ETH_VLAN_STRIP_OFFLOAD;
1812 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1813 ret |= ETH_VLAN_FILTER_OFFLOAD;
1815 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1816 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1822 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1824 struct rte_eth_dev *dev;
1826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1827 dev = &rte_eth_devices[port_id];
1828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1829 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1835 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1837 struct rte_eth_dev *dev;
1839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1840 dev = &rte_eth_devices[port_id];
1841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1842 memset(fc_conf, 0, sizeof(*fc_conf));
1843 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1847 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1852 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1853 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1857 dev = &rte_eth_devices[port_id];
1858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1859 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1863 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1865 struct rte_eth_dev *dev;
1867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1868 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1869 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1873 dev = &rte_eth_devices[port_id];
1874 /* High water, low water validation are device specific */
1875 if (*dev->dev_ops->priority_flow_ctrl_set)
1876 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1881 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1889 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1890 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1891 RTE_RETA_GROUP_SIZE);
1895 num = reta_size / RTE_RETA_GROUP_SIZE;
1896 for (i = 0; i < num; i++) {
1897 if (reta_conf[i].mask)
1905 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1909 uint16_t i, idx, shift;
1915 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1919 for (i = 0; i < reta_size; i++) {
1920 idx = i / RTE_RETA_GROUP_SIZE;
1921 shift = i % RTE_RETA_GROUP_SIZE;
1922 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1923 (reta_conf[idx].reta[shift] >= max_rxq)) {
1924 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1925 "the maximum rxq index: %u\n", idx, shift,
1926 reta_conf[idx].reta[shift], max_rxq);
1935 rte_eth_dev_rss_reta_update(uint8_t port_id,
1936 struct rte_eth_rss_reta_entry64 *reta_conf,
1939 struct rte_eth_dev *dev;
1942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1943 /* Check mask bits */
1944 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1948 dev = &rte_eth_devices[port_id];
1950 /* Check entry value */
1951 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1952 dev->data->nb_rx_queues);
1956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1957 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1961 rte_eth_dev_rss_reta_query(uint8_t port_id,
1962 struct rte_eth_rss_reta_entry64 *reta_conf,
1965 struct rte_eth_dev *dev;
1968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1970 /* Check mask bits */
1971 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1975 dev = &rte_eth_devices[port_id];
1976 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1977 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1981 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1983 struct rte_eth_dev *dev;
1984 uint16_t rss_hash_protos;
1986 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1987 rss_hash_protos = rss_conf->rss_hf;
1988 if ((rss_hash_protos != 0) &&
1989 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1990 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1994 dev = &rte_eth_devices[port_id];
1995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1996 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2000 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2001 struct rte_eth_rss_conf *rss_conf)
2003 struct rte_eth_dev *dev;
2005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2006 dev = &rte_eth_devices[port_id];
2007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2008 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2012 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2013 struct rte_eth_udp_tunnel *udp_tunnel)
2015 struct rte_eth_dev *dev;
2017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2018 if (udp_tunnel == NULL) {
2019 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2023 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2024 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2028 dev = &rte_eth_devices[port_id];
2029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2030 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2034 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2035 struct rte_eth_udp_tunnel *udp_tunnel)
2037 struct rte_eth_dev *dev;
2039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2040 dev = &rte_eth_devices[port_id];
2042 if (udp_tunnel == NULL) {
2043 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2047 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2048 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2053 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2057 rte_eth_led_on(uint8_t port_id)
2059 struct rte_eth_dev *dev;
2061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2062 dev = &rte_eth_devices[port_id];
2063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2064 return (*dev->dev_ops->dev_led_on)(dev);
2068 rte_eth_led_off(uint8_t port_id)
2070 struct rte_eth_dev *dev;
2072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2073 dev = &rte_eth_devices[port_id];
2074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2075 return (*dev->dev_ops->dev_led_off)(dev);
2079 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2083 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2085 struct rte_eth_dev_info dev_info;
2086 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2089 rte_eth_dev_info_get(port_id, &dev_info);
2091 for (i = 0; i < dev_info.max_mac_addrs; i++)
2092 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2098 static const struct ether_addr null_mac_addr;
2101 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2104 struct rte_eth_dev *dev;
2108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2109 dev = &rte_eth_devices[port_id];
2110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2112 if (is_zero_ether_addr(addr)) {
2113 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2117 if (pool >= ETH_64_POOLS) {
2118 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2122 index = get_mac_addr_index(port_id, addr);
2124 index = get_mac_addr_index(port_id, &null_mac_addr);
2126 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2131 pool_mask = dev->data->mac_pool_sel[index];
2133 /* Check if both MAC address and pool is already there, and do nothing */
2134 if (pool_mask & (1ULL << pool))
2139 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2141 /* Update address in NIC data structure */
2142 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2144 /* Update pool bitmap in NIC data structure */
2145 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2151 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2153 struct rte_eth_dev *dev;
2156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2157 dev = &rte_eth_devices[port_id];
2158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2160 index = get_mac_addr_index(port_id, addr);
2162 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2164 } else if (index < 0)
2165 return 0; /* Do nothing if address wasn't found */
2168 (*dev->dev_ops->mac_addr_remove)(dev, index);
2170 /* Update address in NIC data structure */
2171 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2173 /* reset pool bitmap */
2174 dev->data->mac_pool_sel[index] = 0;
2180 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2182 struct rte_eth_dev *dev;
2184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2186 if (!is_valid_assigned_ether_addr(addr))
2189 dev = &rte_eth_devices[port_id];
2190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2192 /* Update default address in NIC data structure */
2193 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2195 (*dev->dev_ops->mac_addr_set)(dev, addr);
2201 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2202 uint16_t rx_mode, uint8_t on)
2205 struct rte_eth_dev *dev;
2206 struct rte_eth_dev_info dev_info;
2208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2210 dev = &rte_eth_devices[port_id];
2211 rte_eth_dev_info_get(port_id, &dev_info);
2213 num_vfs = dev_info.max_vfs;
2215 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2220 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2224 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2228 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2232 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2234 struct rte_eth_dev_info dev_info;
2235 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2238 rte_eth_dev_info_get(port_id, &dev_info);
2239 if (!dev->data->hash_mac_addrs)
2242 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2243 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2244 ETHER_ADDR_LEN) == 0)
2251 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2256 struct rte_eth_dev *dev;
2258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2260 dev = &rte_eth_devices[port_id];
2261 if (is_zero_ether_addr(addr)) {
2262 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2267 index = get_hash_mac_addr_index(port_id, addr);
2268 /* Check if it's already there, and do nothing */
2269 if ((index >= 0) && (on))
2274 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2275 "set in UTA\n", port_id);
2279 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2281 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2288 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2290 /* Update address in NIC data structure */
2292 ether_addr_copy(addr,
2293 &dev->data->hash_mac_addrs[index]);
2295 ether_addr_copy(&null_mac_addr,
2296 &dev->data->hash_mac_addrs[index]);
2303 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2305 struct rte_eth_dev *dev;
2307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2309 dev = &rte_eth_devices[port_id];
2311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2312 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2316 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2319 struct rte_eth_dev *dev;
2320 struct rte_eth_dev_info dev_info;
2322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2324 dev = &rte_eth_devices[port_id];
2325 rte_eth_dev_info_get(port_id, &dev_info);
2327 num_vfs = dev_info.max_vfs;
2329 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2334 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2338 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2341 struct rte_eth_dev *dev;
2342 struct rte_eth_dev_info dev_info;
2344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2346 dev = &rte_eth_devices[port_id];
2347 rte_eth_dev_info_get(port_id, &dev_info);
2349 num_vfs = dev_info.max_vfs;
2351 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2355 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2356 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2360 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2361 uint64_t vf_mask, uint8_t vlan_on)
2363 struct rte_eth_dev *dev;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2367 dev = &rte_eth_devices[port_id];
2369 if (vlan_id > ETHER_MAX_VLAN_ID) {
2370 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2376 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2380 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2381 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2385 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2388 struct rte_eth_dev *dev;
2389 struct rte_eth_dev_info dev_info;
2390 struct rte_eth_link link;
2392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2394 dev = &rte_eth_devices[port_id];
2395 rte_eth_dev_info_get(port_id, &dev_info);
2396 link = dev->data->dev_link;
2398 if (queue_idx > dev_info.max_tx_queues) {
2399 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2400 "invalid queue id=%d\n", port_id, queue_idx);
2404 if (tx_rate > link.link_speed) {
2405 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2406 "bigger than link speed= %d\n",
2407 tx_rate, link.link_speed);
2411 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2412 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2415 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2418 struct rte_eth_dev *dev;
2419 struct rte_eth_dev_info dev_info;
2420 struct rte_eth_link link;
2425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2427 dev = &rte_eth_devices[port_id];
2428 rte_eth_dev_info_get(port_id, &dev_info);
2429 link = dev->data->dev_link;
2431 if (vf > dev_info.max_vfs) {
2432 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2433 "invalid vf id=%d\n", port_id, vf);
2437 if (tx_rate > link.link_speed) {
2438 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2439 "bigger than link speed= %d\n",
2440 tx_rate, link.link_speed);
2444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2445 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2449 rte_eth_mirror_rule_set(uint8_t port_id,
2450 struct rte_eth_mirror_conf *mirror_conf,
2451 uint8_t rule_id, uint8_t on)
2453 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2456 if (mirror_conf->rule_type == 0) {
2457 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2461 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2462 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2467 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2468 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2469 (mirror_conf->pool_mask == 0)) {
2470 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2474 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2475 mirror_conf->vlan.vlan_mask == 0) {
2476 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2480 dev = &rte_eth_devices[port_id];
2481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2483 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2487 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2489 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2493 dev = &rte_eth_devices[port_id];
2494 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2496 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2500 rte_eth_dev_callback_register(uint8_t port_id,
2501 enum rte_eth_event_type event,
2502 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2504 struct rte_eth_dev *dev;
2505 struct rte_eth_dev_callback *user_cb;
2510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2512 dev = &rte_eth_devices[port_id];
2513 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2515 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2516 if (user_cb->cb_fn == cb_fn &&
2517 user_cb->cb_arg == cb_arg &&
2518 user_cb->event == event) {
2523 /* create a new callback. */
2524 if (user_cb == NULL) {
2525 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2526 sizeof(struct rte_eth_dev_callback), 0);
2527 if (user_cb != NULL) {
2528 user_cb->cb_fn = cb_fn;
2529 user_cb->cb_arg = cb_arg;
2530 user_cb->event = event;
2531 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2535 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2536 return (user_cb == NULL) ? -ENOMEM : 0;
2540 rte_eth_dev_callback_unregister(uint8_t port_id,
2541 enum rte_eth_event_type event,
2542 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2545 struct rte_eth_dev *dev;
2546 struct rte_eth_dev_callback *cb, *next;
2551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2553 dev = &rte_eth_devices[port_id];
2554 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2557 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2559 next = TAILQ_NEXT(cb, next);
2561 if (cb->cb_fn != cb_fn || cb->event != event ||
2562 (cb->cb_arg != (void *)-1 &&
2563 cb->cb_arg != cb_arg))
2567 * if this callback is not executing right now,
2570 if (cb->active == 0) {
2571 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2578 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2583 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2584 enum rte_eth_event_type event, void *cb_arg)
2586 struct rte_eth_dev_callback *cb_lst;
2587 struct rte_eth_dev_callback dev_cb;
2589 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2590 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2591 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2596 dev_cb.cb_arg = (void *) cb_arg;
2598 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2599 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2601 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2604 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2608 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2611 struct rte_eth_dev *dev;
2612 struct rte_intr_handle *intr_handle;
2616 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2618 dev = &rte_eth_devices[port_id];
2619 intr_handle = &dev->pci_dev->intr_handle;
2620 if (!intr_handle->intr_vec) {
2621 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2625 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2626 vec = intr_handle->intr_vec[qid];
2627 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2628 if (rc && rc != -EEXIST) {
2629 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2630 " op %d epfd %d vec %u\n",
2631 port_id, qid, op, epfd, vec);
2638 const struct rte_memzone *
2639 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2640 uint16_t queue_id, size_t size, unsigned align,
2643 char z_name[RTE_MEMZONE_NAMESIZE];
2644 const struct rte_memzone *mz;
2646 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2647 dev->driver->pci_drv.driver.name, ring_name,
2648 dev->data->port_id, queue_id);
2650 mz = rte_memzone_lookup(z_name);
2654 if (rte_xen_dom0_supported())
2655 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2656 0, align, RTE_PGSIZE_2M);
2658 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2663 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2664 int epfd, int op, void *data)
2667 struct rte_eth_dev *dev;
2668 struct rte_intr_handle *intr_handle;
2671 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2673 dev = &rte_eth_devices[port_id];
2674 if (queue_id >= dev->data->nb_rx_queues) {
2675 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2679 intr_handle = &dev->pci_dev->intr_handle;
2680 if (!intr_handle->intr_vec) {
2681 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2685 vec = intr_handle->intr_vec[queue_id];
2686 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2687 if (rc && rc != -EEXIST) {
2688 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2689 " op %d epfd %d vec %u\n",
2690 port_id, queue_id, op, epfd, vec);
2698 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2701 struct rte_eth_dev *dev;
2703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2705 dev = &rte_eth_devices[port_id];
2707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2708 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2712 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2715 struct rte_eth_dev *dev;
2717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2719 dev = &rte_eth_devices[port_id];
2721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2722 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2725 #ifdef RTE_NIC_BYPASS
2726 int rte_eth_dev_bypass_init(uint8_t port_id)
2728 struct rte_eth_dev *dev;
2730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2732 dev = &rte_eth_devices[port_id];
2733 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2734 (*dev->dev_ops->bypass_init)(dev);
2739 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2741 struct rte_eth_dev *dev;
2743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2745 dev = &rte_eth_devices[port_id];
2746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2747 (*dev->dev_ops->bypass_state_show)(dev, state);
2752 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2754 struct rte_eth_dev *dev;
2756 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2758 dev = &rte_eth_devices[port_id];
2759 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2760 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2765 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2767 struct rte_eth_dev *dev;
2769 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2771 dev = &rte_eth_devices[port_id];
2772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2773 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2778 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2780 struct rte_eth_dev *dev;
2782 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2784 dev = &rte_eth_devices[port_id];
2786 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2787 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2792 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2794 struct rte_eth_dev *dev;
2796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2798 dev = &rte_eth_devices[port_id];
2800 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2801 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2806 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2808 struct rte_eth_dev *dev;
2810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2812 dev = &rte_eth_devices[port_id];
2814 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2815 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2820 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2822 struct rte_eth_dev *dev;
2824 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2826 dev = &rte_eth_devices[port_id];
2828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2829 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2834 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2836 struct rte_eth_dev *dev;
2838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2840 dev = &rte_eth_devices[port_id];
2842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2843 (*dev->dev_ops->bypass_wd_reset)(dev);
2849 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2851 struct rte_eth_dev *dev;
2853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2855 dev = &rte_eth_devices[port_id];
2856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2857 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2858 RTE_ETH_FILTER_NOP, NULL);
2862 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2863 enum rte_filter_op filter_op, void *arg)
2865 struct rte_eth_dev *dev;
2867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2869 dev = &rte_eth_devices[port_id];
2870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2871 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2875 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2876 rte_rx_callback_fn fn, void *user_param)
2878 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2879 rte_errno = ENOTSUP;
2882 /* check input parameters */
2883 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2884 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2888 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2896 cb->param = user_param;
2898 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2899 /* Add the callbacks in fifo order. */
2900 struct rte_eth_rxtx_callback *tail =
2901 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2904 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2911 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2917 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2918 rte_rx_callback_fn fn, void *user_param)
2920 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2921 rte_errno = ENOTSUP;
2924 /* check input parameters */
2925 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2926 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2931 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2939 cb->param = user_param;
2941 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2942 /* Add the callbacks at fisrt position*/
2943 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2945 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2946 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2952 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2953 rte_tx_callback_fn fn, void *user_param)
2955 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2956 rte_errno = ENOTSUP;
2959 /* check input parameters */
2960 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2961 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2966 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2974 cb->param = user_param;
2976 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2977 /* Add the callbacks in fifo order. */
2978 struct rte_eth_rxtx_callback *tail =
2979 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2982 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2989 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2995 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2996 struct rte_eth_rxtx_callback *user_cb)
2998 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3001 /* Check input parameters. */
3002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3003 if (user_cb == NULL ||
3004 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3007 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3008 struct rte_eth_rxtx_callback *cb;
3009 struct rte_eth_rxtx_callback **prev_cb;
3012 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3013 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3014 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3016 if (cb == user_cb) {
3017 /* Remove the user cb from the callback list. */
3018 *prev_cb = cb->next;
3023 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3029 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3030 struct rte_eth_rxtx_callback *user_cb)
3032 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3035 /* Check input parameters. */
3036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3037 if (user_cb == NULL ||
3038 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3041 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3043 struct rte_eth_rxtx_callback *cb;
3044 struct rte_eth_rxtx_callback **prev_cb;
3046 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3047 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3048 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3050 if (cb == user_cb) {
3051 /* Remove the user cb from the callback list. */
3052 *prev_cb = cb->next;
3057 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3063 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3064 struct rte_eth_rxq_info *qinfo)
3066 struct rte_eth_dev *dev;
3068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3073 dev = &rte_eth_devices[port_id];
3074 if (queue_id >= dev->data->nb_rx_queues) {
3075 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3079 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3081 memset(qinfo, 0, sizeof(*qinfo));
3082 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3087 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3088 struct rte_eth_txq_info *qinfo)
3090 struct rte_eth_dev *dev;
3092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3097 dev = &rte_eth_devices[port_id];
3098 if (queue_id >= dev->data->nb_tx_queues) {
3099 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3105 memset(qinfo, 0, sizeof(*qinfo));
3106 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3111 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3112 struct ether_addr *mc_addr_set,
3113 uint32_t nb_mc_addr)
3115 struct rte_eth_dev *dev;
3117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 dev = &rte_eth_devices[port_id];
3120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3121 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3125 rte_eth_timesync_enable(uint8_t port_id)
3127 struct rte_eth_dev *dev;
3129 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3130 dev = &rte_eth_devices[port_id];
3132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3133 return (*dev->dev_ops->timesync_enable)(dev);
3137 rte_eth_timesync_disable(uint8_t port_id)
3139 struct rte_eth_dev *dev;
3141 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3142 dev = &rte_eth_devices[port_id];
3144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3145 return (*dev->dev_ops->timesync_disable)(dev);
3149 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3152 struct rte_eth_dev *dev;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3155 dev = &rte_eth_devices[port_id];
3157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3158 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3162 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3164 struct rte_eth_dev *dev;
3166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3167 dev = &rte_eth_devices[port_id];
3169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3170 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3174 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3176 struct rte_eth_dev *dev;
3178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3179 dev = &rte_eth_devices[port_id];
3181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3182 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3186 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3188 struct rte_eth_dev *dev;
3190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3191 dev = &rte_eth_devices[port_id];
3193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3194 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3198 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3200 struct rte_eth_dev *dev;
3202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3203 dev = &rte_eth_devices[port_id];
3205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3206 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3210 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3212 struct rte_eth_dev *dev;
3214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3216 dev = &rte_eth_devices[port_id];
3217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3218 return (*dev->dev_ops->get_reg)(dev, info);
3222 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3224 struct rte_eth_dev *dev;
3226 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3228 dev = &rte_eth_devices[port_id];
3229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3230 return (*dev->dev_ops->get_eeprom_length)(dev);
3234 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3236 struct rte_eth_dev *dev;
3238 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3240 dev = &rte_eth_devices[port_id];
3241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3242 return (*dev->dev_ops->get_eeprom)(dev, info);
3246 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3248 struct rte_eth_dev *dev;
3250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3252 dev = &rte_eth_devices[port_id];
3253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3254 return (*dev->dev_ops->set_eeprom)(dev, info);
3258 rte_eth_dev_get_dcb_info(uint8_t port_id,
3259 struct rte_eth_dcb_info *dcb_info)
3261 struct rte_eth_dev *dev;
3263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3265 dev = &rte_eth_devices[port_id];
3266 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3269 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3273 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3275 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3276 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3281 eth_dev->data->dev_flags = 0;
3282 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3283 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3284 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3285 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3287 eth_dev->data->kdrv = pci_dev->kdrv;
3288 eth_dev->data->numa_node = pci_dev->device.numa_node;
3289 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3293 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3294 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3296 struct rte_eth_dev *dev;
3298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3299 if (l2_tunnel == NULL) {
3300 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3304 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3305 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3309 dev = &rte_eth_devices[port_id];
3310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3312 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3316 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3317 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3321 struct rte_eth_dev *dev;
3323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3325 if (l2_tunnel == NULL) {
3326 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3330 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3331 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3336 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3340 dev = &rte_eth_devices[port_id];
3341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3343 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);