4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
147 rte_eth_dev_data_alloc(void)
149 const unsigned flags = 0;
150 const struct rte_memzone *mz;
152 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155 rte_socket_id(), flags);
157 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
159 rte_panic("Cannot allocate memzone for ethernet port data\n");
161 rte_eth_dev_data = mz->addr;
162 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163 memset(rte_eth_dev_data, 0,
164 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
168 rte_eth_dev_allocated(const char *name)
172 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174 strcmp(rte_eth_devices[i].data->name, name) == 0)
175 return &rte_eth_devices[i];
181 rte_eth_dev_find_free_port(void)
185 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186 if (rte_eth_devices[i].attached == DEV_DETACHED)
189 return RTE_MAX_ETHPORTS;
192 static struct rte_eth_dev *
193 eth_dev_get(uint8_t port_id)
195 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
197 eth_dev->data = &rte_eth_dev_data[port_id];
198 eth_dev->attached = DEV_ATTACHED;
200 eth_dev_last_created_port = port_id;
207 rte_eth_dev_allocate(const char *name)
210 struct rte_eth_dev *eth_dev;
212 port_id = rte_eth_dev_find_free_port();
213 if (port_id == RTE_MAX_ETHPORTS) {
214 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
218 if (rte_eth_dev_data == NULL)
219 rte_eth_dev_data_alloc();
221 if (rte_eth_dev_allocated(name) != NULL) {
222 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
227 eth_dev = eth_dev_get(port_id);
228 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
229 eth_dev->data->port_id = port_id;
235 * Attach to a port already registered by the primary process, which
236 * makes sure that the same device would have the same port id both
237 * in the primary and secondary process.
239 static struct rte_eth_dev *
240 eth_dev_attach_secondary(const char *name)
243 struct rte_eth_dev *eth_dev;
245 if (rte_eth_dev_data == NULL)
246 rte_eth_dev_data_alloc();
248 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
249 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
252 if (i == RTE_MAX_ETHPORTS) {
254 "device %s is not driven by the primary process\n",
259 eth_dev = eth_dev_get(i);
260 RTE_ASSERT(eth_dev->data->port_id == i);
266 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
271 eth_dev->attached = DEV_DETACHED;
277 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
278 struct rte_pci_device *pci_dev)
280 struct eth_driver *eth_drv;
281 struct rte_eth_dev *eth_dev;
282 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
286 eth_drv = (struct eth_driver *)pci_drv;
288 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
289 sizeof(ethdev_name));
291 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
292 eth_dev = rte_eth_dev_allocate(ethdev_name);
296 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
297 eth_drv->dev_private_size,
298 RTE_CACHE_LINE_SIZE);
299 if (eth_dev->data->dev_private == NULL)
300 rte_panic("Cannot allocate memzone for private port data\n");
302 eth_dev = eth_dev_attach_secondary(ethdev_name);
303 if (eth_dev == NULL) {
305 * if we failed to attach a device, it means the
306 * device is skipped in primary process, due to
307 * some errors. If so, we return a positive value,
308 * to let EAL skip it for the secondary process
314 eth_dev->pci_dev = pci_dev;
315 eth_dev->driver = eth_drv;
316 eth_dev->data->rx_mbuf_alloc_failed = 0;
318 /* init user callbacks */
319 TAILQ_INIT(&(eth_dev->link_intr_cbs));
322 * Set the default MTU.
324 eth_dev->data->mtu = ETHER_MTU;
326 /* Invoke PMD device initialization function */
327 diag = (*eth_drv->eth_dev_init)(eth_dev);
331 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
332 pci_drv->driver.name,
333 (unsigned) pci_dev->id.vendor_id,
334 (unsigned) pci_dev->id.device_id);
335 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
336 rte_free(eth_dev->data->dev_private);
337 rte_eth_dev_release_port(eth_dev);
342 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
344 const struct eth_driver *eth_drv;
345 struct rte_eth_dev *eth_dev;
346 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
352 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
353 sizeof(ethdev_name));
355 eth_dev = rte_eth_dev_allocated(ethdev_name);
359 eth_drv = (const struct eth_driver *)pci_dev->driver;
361 /* Invoke PMD device uninit function */
362 if (*eth_drv->eth_dev_uninit) {
363 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
368 /* free ether device */
369 rte_eth_dev_release_port(eth_dev);
371 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
372 rte_free(eth_dev->data->dev_private);
374 eth_dev->pci_dev = NULL;
375 eth_dev->driver = NULL;
376 eth_dev->data = NULL;
382 rte_eth_dev_is_valid_port(uint8_t port_id)
384 if (port_id >= RTE_MAX_ETHPORTS ||
385 rte_eth_devices[port_id].attached != DEV_ATTACHED)
392 rte_eth_dev_socket_id(uint8_t port_id)
394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
395 return rte_eth_devices[port_id].data->numa_node;
399 rte_eth_dev_count(void)
405 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
412 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
416 /* shouldn't check 'rte_eth_devices[i].data',
417 * because it might be overwritten by VDEV PMD */
418 tmp = rte_eth_dev_data[port_id].name;
424 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
429 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
436 *port_id = RTE_MAX_ETHPORTS;
438 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 rte_eth_dev_data[i].name, strlen(name))) {
452 rte_eth_dev_is_detachable(uint8_t port_id)
456 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
458 switch (rte_eth_devices[port_id].data->kdrv) {
459 case RTE_KDRV_IGB_UIO:
460 case RTE_KDRV_UIO_GENERIC:
461 case RTE_KDRV_NIC_UIO:
468 dev_flags = rte_eth_devices[port_id].data->dev_flags;
469 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
470 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
476 /* attach the new device, then store port_id of the device */
478 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
481 int current = rte_eth_dev_count();
485 if ((devargs == NULL) || (port_id == NULL)) {
490 /* parse devargs, then retrieve device name and args */
491 if (rte_eal_parse_devargs_str(devargs, &name, &args))
494 ret = rte_eal_dev_attach(name, args);
498 /* no point looking at the port count if no port exists */
499 if (!rte_eth_dev_count()) {
500 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
505 /* if nothing happened, there is a bug here, since some driver told us
506 * it did attach a device, but did not create a port.
508 if (current == rte_eth_dev_count()) {
513 *port_id = eth_dev_last_created_port;
522 /* detach the device, then store the name of the device */
524 rte_eth_dev_detach(uint8_t port_id, char *name)
533 /* FIXME: move this to eal, once device flags are relocated there */
534 if (rte_eth_dev_is_detachable(port_id))
537 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
538 "%s", rte_eth_devices[port_id].data->name);
539 ret = rte_eal_dev_detach(name);
550 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
552 uint16_t old_nb_queues = dev->data->nb_rx_queues;
556 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
557 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
558 sizeof(dev->data->rx_queues[0]) * nb_queues,
559 RTE_CACHE_LINE_SIZE);
560 if (dev->data->rx_queues == NULL) {
561 dev->data->nb_rx_queues = 0;
564 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
567 rxq = dev->data->rx_queues;
569 for (i = nb_queues; i < old_nb_queues; i++)
570 (*dev->dev_ops->rx_queue_release)(rxq[i]);
571 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
572 RTE_CACHE_LINE_SIZE);
575 if (nb_queues > old_nb_queues) {
576 uint16_t new_qs = nb_queues - old_nb_queues;
578 memset(rxq + old_nb_queues, 0,
579 sizeof(rxq[0]) * new_qs);
582 dev->data->rx_queues = rxq;
584 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
587 rxq = dev->data->rx_queues;
589 for (i = nb_queues; i < old_nb_queues; i++)
590 (*dev->dev_ops->rx_queue_release)(rxq[i]);
592 dev->data->nb_rx_queues = nb_queues;
597 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
599 struct rte_eth_dev *dev;
601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
603 dev = &rte_eth_devices[port_id];
604 if (rx_queue_id >= dev->data->nb_rx_queues) {
605 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
611 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
612 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
613 " already started\n",
614 rx_queue_id, port_id);
618 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
623 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
625 struct rte_eth_dev *dev;
627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
629 dev = &rte_eth_devices[port_id];
630 if (rx_queue_id >= dev->data->nb_rx_queues) {
631 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
637 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
638 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
639 " already stopped\n",
640 rx_queue_id, port_id);
644 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
649 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
651 struct rte_eth_dev *dev;
653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
655 dev = &rte_eth_devices[port_id];
656 if (tx_queue_id >= dev->data->nb_tx_queues) {
657 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
663 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
664 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
665 " already started\n",
666 tx_queue_id, port_id);
670 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
675 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
677 struct rte_eth_dev *dev;
679 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
681 dev = &rte_eth_devices[port_id];
682 if (tx_queue_id >= dev->data->nb_tx_queues) {
683 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
689 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
690 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
691 " already stopped\n",
692 tx_queue_id, port_id);
696 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
701 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
703 uint16_t old_nb_queues = dev->data->nb_tx_queues;
707 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
708 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
709 sizeof(dev->data->tx_queues[0]) * nb_queues,
710 RTE_CACHE_LINE_SIZE);
711 if (dev->data->tx_queues == NULL) {
712 dev->data->nb_tx_queues = 0;
715 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
718 txq = dev->data->tx_queues;
720 for (i = nb_queues; i < old_nb_queues; i++)
721 (*dev->dev_ops->tx_queue_release)(txq[i]);
722 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
723 RTE_CACHE_LINE_SIZE);
726 if (nb_queues > old_nb_queues) {
727 uint16_t new_qs = nb_queues - old_nb_queues;
729 memset(txq + old_nb_queues, 0,
730 sizeof(txq[0]) * new_qs);
733 dev->data->tx_queues = txq;
735 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
736 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
738 txq = dev->data->tx_queues;
740 for (i = nb_queues; i < old_nb_queues; i++)
741 (*dev->dev_ops->tx_queue_release)(txq[i]);
743 dev->data->nb_tx_queues = nb_queues;
748 rte_eth_speed_bitflag(uint32_t speed, int duplex)
751 case ETH_SPEED_NUM_10M:
752 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
753 case ETH_SPEED_NUM_100M:
754 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
755 case ETH_SPEED_NUM_1G:
756 return ETH_LINK_SPEED_1G;
757 case ETH_SPEED_NUM_2_5G:
758 return ETH_LINK_SPEED_2_5G;
759 case ETH_SPEED_NUM_5G:
760 return ETH_LINK_SPEED_5G;
761 case ETH_SPEED_NUM_10G:
762 return ETH_LINK_SPEED_10G;
763 case ETH_SPEED_NUM_20G:
764 return ETH_LINK_SPEED_20G;
765 case ETH_SPEED_NUM_25G:
766 return ETH_LINK_SPEED_25G;
767 case ETH_SPEED_NUM_40G:
768 return ETH_LINK_SPEED_40G;
769 case ETH_SPEED_NUM_50G:
770 return ETH_LINK_SPEED_50G;
771 case ETH_SPEED_NUM_56G:
772 return ETH_LINK_SPEED_56G;
773 case ETH_SPEED_NUM_100G:
774 return ETH_LINK_SPEED_100G;
781 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
782 const struct rte_eth_conf *dev_conf)
784 struct rte_eth_dev *dev;
785 struct rte_eth_dev_info dev_info;
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
790 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
792 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
793 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
797 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
799 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
800 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
804 dev = &rte_eth_devices[port_id];
806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
809 if (dev->data->dev_started) {
811 "port %d must be stopped to allow configuration\n", port_id);
815 /* Copy the dev_conf parameter into the dev structure */
816 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
819 * Check that the numbers of RX and TX queues are not greater
820 * than the maximum number of RX and TX queues supported by the
823 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
825 if (nb_rx_q == 0 && nb_tx_q == 0) {
826 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
830 if (nb_rx_q > dev_info.max_rx_queues) {
831 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
832 port_id, nb_rx_q, dev_info.max_rx_queues);
836 if (nb_tx_q > dev_info.max_tx_queues) {
837 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
838 port_id, nb_tx_q, dev_info.max_tx_queues);
843 * If link state interrupt is enabled, check that the
844 * device supports it.
846 if ((dev_conf->intr_conf.lsc == 1) &&
847 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
848 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
849 dev->data->drv_name);
854 * If jumbo frames are enabled, check that the maximum RX packet
855 * length is supported by the configured device.
857 if (dev_conf->rxmode.jumbo_frame == 1) {
858 if (dev_conf->rxmode.max_rx_pkt_len >
859 dev_info.max_rx_pktlen) {
860 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
861 " > max valid value %u\n",
863 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
864 (unsigned)dev_info.max_rx_pktlen);
866 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
867 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
868 " < min valid value %u\n",
870 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
871 (unsigned)ETHER_MIN_LEN);
875 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
876 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
877 /* Use default value */
878 dev->data->dev_conf.rxmode.max_rx_pkt_len =
883 * Setup new number of RX/TX queues and reconfigure device.
885 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
887 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
892 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
894 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
896 rte_eth_dev_rx_queue_config(dev, 0);
900 diag = (*dev->dev_ops->dev_configure)(dev);
902 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
904 rte_eth_dev_rx_queue_config(dev, 0);
905 rte_eth_dev_tx_queue_config(dev, 0);
913 rte_eth_dev_config_restore(uint8_t port_id)
915 struct rte_eth_dev *dev;
916 struct rte_eth_dev_info dev_info;
917 struct ether_addr addr;
921 dev = &rte_eth_devices[port_id];
923 rte_eth_dev_info_get(port_id, &dev_info);
925 if (RTE_ETH_DEV_SRIOV(dev).active)
926 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
928 /* replay MAC address configuration */
929 for (i = 0; i < dev_info.max_mac_addrs; i++) {
930 addr = dev->data->mac_addrs[i];
932 /* skip zero address */
933 if (is_zero_ether_addr(&addr))
936 /* add address to the hardware */
937 if (*dev->dev_ops->mac_addr_add &&
938 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
939 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
941 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
943 /* exit the loop but not return an error */
948 /* replay promiscuous configuration */
949 if (rte_eth_promiscuous_get(port_id) == 1)
950 rte_eth_promiscuous_enable(port_id);
951 else if (rte_eth_promiscuous_get(port_id) == 0)
952 rte_eth_promiscuous_disable(port_id);
954 /* replay all multicast configuration */
955 if (rte_eth_allmulticast_get(port_id) == 1)
956 rte_eth_allmulticast_enable(port_id);
957 else if (rte_eth_allmulticast_get(port_id) == 0)
958 rte_eth_allmulticast_disable(port_id);
962 rte_eth_dev_start(uint8_t port_id)
964 struct rte_eth_dev *dev;
967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
969 dev = &rte_eth_devices[port_id];
971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
973 if (dev->data->dev_started != 0) {
974 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
975 " already started\n",
980 diag = (*dev->dev_ops->dev_start)(dev);
982 dev->data->dev_started = 1;
986 rte_eth_dev_config_restore(port_id);
988 if (dev->data->dev_conf.intr_conf.lsc == 0) {
989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
990 (*dev->dev_ops->link_update)(dev, 0);
996 rte_eth_dev_stop(uint8_t port_id)
998 struct rte_eth_dev *dev;
1000 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1001 dev = &rte_eth_devices[port_id];
1003 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1005 if (dev->data->dev_started == 0) {
1006 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1007 " already stopped\n",
1012 dev->data->dev_started = 0;
1013 (*dev->dev_ops->dev_stop)(dev);
1017 rte_eth_dev_set_link_up(uint8_t port_id)
1019 struct rte_eth_dev *dev;
1021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1023 dev = &rte_eth_devices[port_id];
1025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1026 return (*dev->dev_ops->dev_set_link_up)(dev);
1030 rte_eth_dev_set_link_down(uint8_t port_id)
1032 struct rte_eth_dev *dev;
1034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1036 dev = &rte_eth_devices[port_id];
1038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1039 return (*dev->dev_ops->dev_set_link_down)(dev);
1043 rte_eth_dev_close(uint8_t port_id)
1045 struct rte_eth_dev *dev;
1047 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1048 dev = &rte_eth_devices[port_id];
1050 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1051 dev->data->dev_started = 0;
1052 (*dev->dev_ops->dev_close)(dev);
1054 rte_free(dev->data->rx_queues);
1055 dev->data->rx_queues = NULL;
1056 rte_free(dev->data->tx_queues);
1057 dev->data->tx_queues = NULL;
1061 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1062 uint16_t nb_rx_desc, unsigned int socket_id,
1063 const struct rte_eth_rxconf *rx_conf,
1064 struct rte_mempool *mp)
1067 uint32_t mbp_buf_size;
1068 struct rte_eth_dev *dev;
1069 struct rte_eth_dev_info dev_info;
1071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1073 dev = &rte_eth_devices[port_id];
1074 if (rx_queue_id >= dev->data->nb_rx_queues) {
1075 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1079 if (dev->data->dev_started) {
1080 RTE_PMD_DEBUG_TRACE(
1081 "port %d must be stopped to allow configuration\n", port_id);
1085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1089 * Check the size of the mbuf data buffer.
1090 * This value must be provided in the private data of the memory pool.
1091 * First check that the memory pool has a valid private data.
1093 rte_eth_dev_info_get(port_id, &dev_info);
1094 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1095 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1096 mp->name, (int) mp->private_data_size,
1097 (int) sizeof(struct rte_pktmbuf_pool_private));
1100 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1102 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1103 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1104 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1108 (int)(RTE_PKTMBUF_HEADROOM +
1109 dev_info.min_rx_bufsize),
1110 (int)RTE_PKTMBUF_HEADROOM,
1111 (int)dev_info.min_rx_bufsize);
1115 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1116 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1117 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1119 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1120 "should be: <= %hu, = %hu, and a product of %hu\n",
1122 dev_info.rx_desc_lim.nb_max,
1123 dev_info.rx_desc_lim.nb_min,
1124 dev_info.rx_desc_lim.nb_align);
1128 if (rx_conf == NULL)
1129 rx_conf = &dev_info.default_rxconf;
1131 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1132 socket_id, rx_conf, mp);
1134 if (!dev->data->min_rx_buf_size ||
1135 dev->data->min_rx_buf_size > mbp_buf_size)
1136 dev->data->min_rx_buf_size = mbp_buf_size;
1143 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1144 uint16_t nb_tx_desc, unsigned int socket_id,
1145 const struct rte_eth_txconf *tx_conf)
1147 struct rte_eth_dev *dev;
1148 struct rte_eth_dev_info dev_info;
1150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1152 dev = &rte_eth_devices[port_id];
1153 if (tx_queue_id >= dev->data->nb_tx_queues) {
1154 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1158 if (dev->data->dev_started) {
1159 RTE_PMD_DEBUG_TRACE(
1160 "port %d must be stopped to allow configuration\n", port_id);
1164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1167 rte_eth_dev_info_get(port_id, &dev_info);
1169 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1170 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1171 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1172 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1173 "should be: <= %hu, = %hu, and a product of %hu\n",
1175 dev_info.tx_desc_lim.nb_max,
1176 dev_info.tx_desc_lim.nb_min,
1177 dev_info.tx_desc_lim.nb_align);
1181 if (tx_conf == NULL)
1182 tx_conf = &dev_info.default_txconf;
1184 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1185 socket_id, tx_conf);
1189 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1190 void *userdata __rte_unused)
1194 for (i = 0; i < unsent; i++)
1195 rte_pktmbuf_free(pkts[i]);
1199 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1202 uint64_t *count = userdata;
1205 for (i = 0; i < unsent; i++)
1206 rte_pktmbuf_free(pkts[i]);
1212 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1213 buffer_tx_error_fn cbfn, void *userdata)
1215 buffer->error_callback = cbfn;
1216 buffer->error_userdata = userdata;
1221 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1228 buffer->size = size;
1229 if (buffer->error_callback == NULL) {
1230 ret = rte_eth_tx_buffer_set_err_callback(
1231 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1238 rte_eth_promiscuous_enable(uint8_t port_id)
1240 struct rte_eth_dev *dev;
1242 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1243 dev = &rte_eth_devices[port_id];
1245 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1246 (*dev->dev_ops->promiscuous_enable)(dev);
1247 dev->data->promiscuous = 1;
1251 rte_eth_promiscuous_disable(uint8_t port_id)
1253 struct rte_eth_dev *dev;
1255 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1256 dev = &rte_eth_devices[port_id];
1258 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1259 dev->data->promiscuous = 0;
1260 (*dev->dev_ops->promiscuous_disable)(dev);
1264 rte_eth_promiscuous_get(uint8_t port_id)
1266 struct rte_eth_dev *dev;
1268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1270 dev = &rte_eth_devices[port_id];
1271 return dev->data->promiscuous;
1275 rte_eth_allmulticast_enable(uint8_t port_id)
1277 struct rte_eth_dev *dev;
1279 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1280 dev = &rte_eth_devices[port_id];
1282 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1283 (*dev->dev_ops->allmulticast_enable)(dev);
1284 dev->data->all_multicast = 1;
1288 rte_eth_allmulticast_disable(uint8_t port_id)
1290 struct rte_eth_dev *dev;
1292 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1293 dev = &rte_eth_devices[port_id];
1295 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1296 dev->data->all_multicast = 0;
1297 (*dev->dev_ops->allmulticast_disable)(dev);
1301 rte_eth_allmulticast_get(uint8_t port_id)
1303 struct rte_eth_dev *dev;
1305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1307 dev = &rte_eth_devices[port_id];
1308 return dev->data->all_multicast;
1312 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1313 struct rte_eth_link *link)
1315 struct rte_eth_link *dst = link;
1316 struct rte_eth_link *src = &(dev->data->dev_link);
1318 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1319 *(uint64_t *)src) == 0)
1326 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1328 struct rte_eth_dev *dev;
1330 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1331 dev = &rte_eth_devices[port_id];
1333 if (dev->data->dev_conf.intr_conf.lsc != 0)
1334 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1336 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1337 (*dev->dev_ops->link_update)(dev, 1);
1338 *eth_link = dev->data->dev_link;
1343 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1345 struct rte_eth_dev *dev;
1347 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1348 dev = &rte_eth_devices[port_id];
1350 if (dev->data->dev_conf.intr_conf.lsc != 0)
1351 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1353 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1354 (*dev->dev_ops->link_update)(dev, 0);
1355 *eth_link = dev->data->dev_link;
1360 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1362 struct rte_eth_dev *dev;
1364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1366 dev = &rte_eth_devices[port_id];
1367 memset(stats, 0, sizeof(*stats));
1369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1370 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1371 (*dev->dev_ops->stats_get)(dev, stats);
1376 rte_eth_stats_reset(uint8_t port_id)
1378 struct rte_eth_dev *dev;
1380 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1381 dev = &rte_eth_devices[port_id];
1383 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1384 (*dev->dev_ops->stats_reset)(dev);
1385 dev->data->rx_mbuf_alloc_failed = 0;
1389 get_xstats_count(uint8_t port_id)
1391 struct rte_eth_dev *dev;
1394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1395 dev = &rte_eth_devices[port_id];
1396 if (dev->dev_ops->xstats_get_names != NULL) {
1397 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1402 count += RTE_NB_STATS;
1403 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1405 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1411 rte_eth_xstats_get_names(uint8_t port_id,
1412 struct rte_eth_xstat_name *xstats_names,
1415 struct rte_eth_dev *dev;
1416 int cnt_used_entries;
1417 int cnt_expected_entries;
1418 int cnt_driver_entries;
1419 uint32_t idx, id_queue;
1422 cnt_expected_entries = get_xstats_count(port_id);
1423 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1424 (int)size < cnt_expected_entries)
1425 return cnt_expected_entries;
1427 /* port_id checked in get_xstats_count() */
1428 dev = &rte_eth_devices[port_id];
1429 cnt_used_entries = 0;
1431 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1432 snprintf(xstats_names[cnt_used_entries].name,
1433 sizeof(xstats_names[0].name),
1434 "%s", rte_stats_strings[idx].name);
1437 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1438 for (id_queue = 0; id_queue < num_q; id_queue++) {
1439 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1440 snprintf(xstats_names[cnt_used_entries].name,
1441 sizeof(xstats_names[0].name),
1443 id_queue, rte_rxq_stats_strings[idx].name);
1448 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1449 for (id_queue = 0; id_queue < num_q; id_queue++) {
1450 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1451 snprintf(xstats_names[cnt_used_entries].name,
1452 sizeof(xstats_names[0].name),
1454 id_queue, rte_txq_stats_strings[idx].name);
1459 if (dev->dev_ops->xstats_get_names != NULL) {
1460 /* If there are any driver-specific xstats, append them
1463 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1465 xstats_names + cnt_used_entries,
1466 size - cnt_used_entries);
1467 if (cnt_driver_entries < 0)
1468 return cnt_driver_entries;
1469 cnt_used_entries += cnt_driver_entries;
1472 return cnt_used_entries;
1475 /* retrieve ethdev extended statistics */
1477 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1480 struct rte_eth_stats eth_stats;
1481 struct rte_eth_dev *dev;
1482 unsigned count = 0, i, q;
1484 uint64_t val, *stats_ptr;
1485 uint16_t nb_rxqs, nb_txqs;
1487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1489 dev = &rte_eth_devices[port_id];
1491 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1492 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1494 /* Return generic statistics */
1495 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1496 (nb_txqs * RTE_NB_TXQ_STATS);
1498 /* implemented by the driver */
1499 if (dev->dev_ops->xstats_get != NULL) {
1500 /* Retrieve the xstats from the driver at the end of the
1503 xcount = (*dev->dev_ops->xstats_get)(dev,
1504 xstats ? xstats + count : NULL,
1505 (n > count) ? n - count : 0);
1511 if (n < count + xcount || xstats == NULL)
1512 return count + xcount;
1514 /* now fill the xstats structure */
1516 rte_eth_stats_get(port_id, ð_stats);
1519 for (i = 0; i < RTE_NB_STATS; i++) {
1520 stats_ptr = RTE_PTR_ADD(ð_stats,
1521 rte_stats_strings[i].offset);
1523 xstats[count++].value = val;
1527 for (q = 0; q < nb_rxqs; q++) {
1528 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1529 stats_ptr = RTE_PTR_ADD(ð_stats,
1530 rte_rxq_stats_strings[i].offset +
1531 q * sizeof(uint64_t));
1533 xstats[count++].value = val;
1538 for (q = 0; q < nb_txqs; q++) {
1539 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1540 stats_ptr = RTE_PTR_ADD(ð_stats,
1541 rte_txq_stats_strings[i].offset +
1542 q * sizeof(uint64_t));
1544 xstats[count++].value = val;
1548 for (i = 0; i < count; i++)
1550 /* add an offset to driver-specific stats */
1551 for ( ; i < count + xcount; i++)
1552 xstats[i].id += count;
1554 return count + xcount;
1557 /* reset ethdev extended statistics */
1559 rte_eth_xstats_reset(uint8_t port_id)
1561 struct rte_eth_dev *dev;
1563 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1564 dev = &rte_eth_devices[port_id];
1566 /* implemented by the driver */
1567 if (dev->dev_ops->xstats_reset != NULL) {
1568 (*dev->dev_ops->xstats_reset)(dev);
1572 /* fallback to default */
1573 rte_eth_stats_reset(port_id);
1577 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1580 struct rte_eth_dev *dev;
1582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1584 dev = &rte_eth_devices[port_id];
1586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1587 return (*dev->dev_ops->queue_stats_mapping_set)
1588 (dev, queue_id, stat_idx, is_rx);
1593 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1596 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1602 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1605 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1610 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1612 struct rte_eth_dev *dev;
1613 const struct rte_eth_desc_lim lim = {
1614 .nb_max = UINT16_MAX,
1619 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1620 dev = &rte_eth_devices[port_id];
1622 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1623 dev_info->rx_desc_lim = lim;
1624 dev_info->tx_desc_lim = lim;
1626 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1627 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1628 dev_info->pci_dev = dev->pci_dev;
1629 dev_info->driver_name = dev->data->drv_name;
1630 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1631 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1635 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1636 uint32_t *ptypes, int num)
1639 struct rte_eth_dev *dev;
1640 const uint32_t *all_ptypes;
1642 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1643 dev = &rte_eth_devices[port_id];
1644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1645 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1650 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1651 if (all_ptypes[i] & ptype_mask) {
1653 ptypes[j] = all_ptypes[i];
1661 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1663 struct rte_eth_dev *dev;
1665 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1666 dev = &rte_eth_devices[port_id];
1667 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1672 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1674 struct rte_eth_dev *dev;
1676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1678 dev = &rte_eth_devices[port_id];
1679 *mtu = dev->data->mtu;
1684 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1687 struct rte_eth_dev *dev;
1689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1690 dev = &rte_eth_devices[port_id];
1691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1693 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1695 dev->data->mtu = mtu;
1701 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1703 struct rte_eth_dev *dev;
1705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1706 dev = &rte_eth_devices[port_id];
1707 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1708 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1712 if (vlan_id > 4095) {
1713 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1714 port_id, (unsigned) vlan_id);
1717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1719 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1723 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1725 struct rte_eth_dev *dev;
1727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1728 dev = &rte_eth_devices[port_id];
1729 if (rx_queue_id >= dev->data->nb_rx_queues) {
1730 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1735 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1741 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1742 enum rte_vlan_type vlan_type,
1745 struct rte_eth_dev *dev;
1747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1748 dev = &rte_eth_devices[port_id];
1749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1751 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1755 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1757 struct rte_eth_dev *dev;
1762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1763 dev = &rte_eth_devices[port_id];
1765 /*check which option changed by application*/
1766 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1767 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1769 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1770 mask |= ETH_VLAN_STRIP_MASK;
1773 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1774 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1776 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1777 mask |= ETH_VLAN_FILTER_MASK;
1780 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1781 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1783 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1784 mask |= ETH_VLAN_EXTEND_MASK;
1791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1792 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1798 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1800 struct rte_eth_dev *dev;
1803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1804 dev = &rte_eth_devices[port_id];
1806 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1807 ret |= ETH_VLAN_STRIP_OFFLOAD;
1809 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1810 ret |= ETH_VLAN_FILTER_OFFLOAD;
1812 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1813 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1819 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1821 struct rte_eth_dev *dev;
1823 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1824 dev = &rte_eth_devices[port_id];
1825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1826 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1832 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1834 struct rte_eth_dev *dev;
1836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1837 dev = &rte_eth_devices[port_id];
1838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1839 memset(fc_conf, 0, sizeof(*fc_conf));
1840 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1844 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1846 struct rte_eth_dev *dev;
1848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1849 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1850 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1854 dev = &rte_eth_devices[port_id];
1855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1856 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1860 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1862 struct rte_eth_dev *dev;
1864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1865 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1866 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1870 dev = &rte_eth_devices[port_id];
1871 /* High water, low water validation are device specific */
1872 if (*dev->dev_ops->priority_flow_ctrl_set)
1873 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1878 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1886 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1887 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1888 RTE_RETA_GROUP_SIZE);
1892 num = reta_size / RTE_RETA_GROUP_SIZE;
1893 for (i = 0; i < num; i++) {
1894 if (reta_conf[i].mask)
1902 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1906 uint16_t i, idx, shift;
1912 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1916 for (i = 0; i < reta_size; i++) {
1917 idx = i / RTE_RETA_GROUP_SIZE;
1918 shift = i % RTE_RETA_GROUP_SIZE;
1919 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1920 (reta_conf[idx].reta[shift] >= max_rxq)) {
1921 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1922 "the maximum rxq index: %u\n", idx, shift,
1923 reta_conf[idx].reta[shift], max_rxq);
1932 rte_eth_dev_rss_reta_update(uint8_t port_id,
1933 struct rte_eth_rss_reta_entry64 *reta_conf,
1936 struct rte_eth_dev *dev;
1939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1940 /* Check mask bits */
1941 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1945 dev = &rte_eth_devices[port_id];
1947 /* Check entry value */
1948 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1949 dev->data->nb_rx_queues);
1953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1954 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1958 rte_eth_dev_rss_reta_query(uint8_t port_id,
1959 struct rte_eth_rss_reta_entry64 *reta_conf,
1962 struct rte_eth_dev *dev;
1965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1967 /* Check mask bits */
1968 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1972 dev = &rte_eth_devices[port_id];
1973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1974 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1978 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1980 struct rte_eth_dev *dev;
1981 uint16_t rss_hash_protos;
1983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1984 rss_hash_protos = rss_conf->rss_hf;
1985 if ((rss_hash_protos != 0) &&
1986 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1987 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1991 dev = &rte_eth_devices[port_id];
1992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1993 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1997 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1998 struct rte_eth_rss_conf *rss_conf)
2000 struct rte_eth_dev *dev;
2002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2003 dev = &rte_eth_devices[port_id];
2004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2005 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2009 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2010 struct rte_eth_udp_tunnel *udp_tunnel)
2012 struct rte_eth_dev *dev;
2014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2015 if (udp_tunnel == NULL) {
2016 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2020 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2021 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2025 dev = &rte_eth_devices[port_id];
2026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2027 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2031 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2032 struct rte_eth_udp_tunnel *udp_tunnel)
2034 struct rte_eth_dev *dev;
2036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2037 dev = &rte_eth_devices[port_id];
2039 if (udp_tunnel == NULL) {
2040 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2044 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2045 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2050 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2054 rte_eth_led_on(uint8_t port_id)
2056 struct rte_eth_dev *dev;
2058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2059 dev = &rte_eth_devices[port_id];
2060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2061 return (*dev->dev_ops->dev_led_on)(dev);
2065 rte_eth_led_off(uint8_t port_id)
2067 struct rte_eth_dev *dev;
2069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2070 dev = &rte_eth_devices[port_id];
2071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2072 return (*dev->dev_ops->dev_led_off)(dev);
2076 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2080 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2082 struct rte_eth_dev_info dev_info;
2083 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2086 rte_eth_dev_info_get(port_id, &dev_info);
2088 for (i = 0; i < dev_info.max_mac_addrs; i++)
2089 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2095 static const struct ether_addr null_mac_addr;
2098 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2101 struct rte_eth_dev *dev;
2105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2106 dev = &rte_eth_devices[port_id];
2107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2109 if (is_zero_ether_addr(addr)) {
2110 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2114 if (pool >= ETH_64_POOLS) {
2115 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2119 index = get_mac_addr_index(port_id, addr);
2121 index = get_mac_addr_index(port_id, &null_mac_addr);
2123 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2128 pool_mask = dev->data->mac_pool_sel[index];
2130 /* Check if both MAC address and pool is already there, and do nothing */
2131 if (pool_mask & (1ULL << pool))
2136 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2138 /* Update address in NIC data structure */
2139 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2141 /* Update pool bitmap in NIC data structure */
2142 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2148 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2150 struct rte_eth_dev *dev;
2153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2154 dev = &rte_eth_devices[port_id];
2155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2157 index = get_mac_addr_index(port_id, addr);
2159 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2161 } else if (index < 0)
2162 return 0; /* Do nothing if address wasn't found */
2165 (*dev->dev_ops->mac_addr_remove)(dev, index);
2167 /* Update address in NIC data structure */
2168 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2170 /* reset pool bitmap */
2171 dev->data->mac_pool_sel[index] = 0;
2177 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2179 struct rte_eth_dev *dev;
2181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2183 if (!is_valid_assigned_ether_addr(addr))
2186 dev = &rte_eth_devices[port_id];
2187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2189 /* Update default address in NIC data structure */
2190 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2192 (*dev->dev_ops->mac_addr_set)(dev, addr);
2198 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2199 uint16_t rx_mode, uint8_t on)
2202 struct rte_eth_dev *dev;
2203 struct rte_eth_dev_info dev_info;
2205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 dev = &rte_eth_devices[port_id];
2208 rte_eth_dev_info_get(port_id, &dev_info);
2210 num_vfs = dev_info.max_vfs;
2212 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2217 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2221 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2225 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2229 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2231 struct rte_eth_dev_info dev_info;
2232 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2235 rte_eth_dev_info_get(port_id, &dev_info);
2236 if (!dev->data->hash_mac_addrs)
2239 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2240 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2241 ETHER_ADDR_LEN) == 0)
2248 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2253 struct rte_eth_dev *dev;
2255 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2257 dev = &rte_eth_devices[port_id];
2258 if (is_zero_ether_addr(addr)) {
2259 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2264 index = get_hash_mac_addr_index(port_id, addr);
2265 /* Check if it's already there, and do nothing */
2266 if ((index >= 0) && (on))
2271 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2272 "set in UTA\n", port_id);
2276 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2278 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2284 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2285 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2287 /* Update address in NIC data structure */
2289 ether_addr_copy(addr,
2290 &dev->data->hash_mac_addrs[index]);
2292 ether_addr_copy(&null_mac_addr,
2293 &dev->data->hash_mac_addrs[index]);
2300 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2302 struct rte_eth_dev *dev;
2304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2306 dev = &rte_eth_devices[port_id];
2308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2309 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2313 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2316 struct rte_eth_dev *dev;
2317 struct rte_eth_dev_info dev_info;
2319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2321 dev = &rte_eth_devices[port_id];
2322 rte_eth_dev_info_get(port_id, &dev_info);
2324 num_vfs = dev_info.max_vfs;
2326 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2331 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2335 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2338 struct rte_eth_dev *dev;
2339 struct rte_eth_dev_info dev_info;
2341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2343 dev = &rte_eth_devices[port_id];
2344 rte_eth_dev_info_get(port_id, &dev_info);
2346 num_vfs = dev_info.max_vfs;
2348 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2352 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2353 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2357 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2358 uint64_t vf_mask, uint8_t vlan_on)
2360 struct rte_eth_dev *dev;
2362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2364 dev = &rte_eth_devices[port_id];
2366 if (vlan_id > ETHER_MAX_VLAN_ID) {
2367 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2373 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2378 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2382 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2385 struct rte_eth_dev *dev;
2386 struct rte_eth_dev_info dev_info;
2387 struct rte_eth_link link;
2389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2391 dev = &rte_eth_devices[port_id];
2392 rte_eth_dev_info_get(port_id, &dev_info);
2393 link = dev->data->dev_link;
2395 if (queue_idx > dev_info.max_tx_queues) {
2396 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2397 "invalid queue id=%d\n", port_id, queue_idx);
2401 if (tx_rate > link.link_speed) {
2402 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2403 "bigger than link speed= %d\n",
2404 tx_rate, link.link_speed);
2408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2409 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2412 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2415 struct rte_eth_dev *dev;
2416 struct rte_eth_dev_info dev_info;
2417 struct rte_eth_link link;
2422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2424 dev = &rte_eth_devices[port_id];
2425 rte_eth_dev_info_get(port_id, &dev_info);
2426 link = dev->data->dev_link;
2428 if (vf > dev_info.max_vfs) {
2429 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2430 "invalid vf id=%d\n", port_id, vf);
2434 if (tx_rate > link.link_speed) {
2435 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2436 "bigger than link speed= %d\n",
2437 tx_rate, link.link_speed);
2441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2442 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2446 rte_eth_mirror_rule_set(uint8_t port_id,
2447 struct rte_eth_mirror_conf *mirror_conf,
2448 uint8_t rule_id, uint8_t on)
2450 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2453 if (mirror_conf->rule_type == 0) {
2454 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2458 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2459 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2464 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2465 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2466 (mirror_conf->pool_mask == 0)) {
2467 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2471 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2472 mirror_conf->vlan.vlan_mask == 0) {
2473 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2477 dev = &rte_eth_devices[port_id];
2478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2480 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2484 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2486 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2488 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2490 dev = &rte_eth_devices[port_id];
2491 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2493 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2497 rte_eth_dev_callback_register(uint8_t port_id,
2498 enum rte_eth_event_type event,
2499 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2501 struct rte_eth_dev *dev;
2502 struct rte_eth_dev_callback *user_cb;
2507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2509 dev = &rte_eth_devices[port_id];
2510 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2512 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2513 if (user_cb->cb_fn == cb_fn &&
2514 user_cb->cb_arg == cb_arg &&
2515 user_cb->event == event) {
2520 /* create a new callback. */
2521 if (user_cb == NULL) {
2522 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2523 sizeof(struct rte_eth_dev_callback), 0);
2524 if (user_cb != NULL) {
2525 user_cb->cb_fn = cb_fn;
2526 user_cb->cb_arg = cb_arg;
2527 user_cb->event = event;
2528 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2532 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2533 return (user_cb == NULL) ? -ENOMEM : 0;
2537 rte_eth_dev_callback_unregister(uint8_t port_id,
2538 enum rte_eth_event_type event,
2539 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2542 struct rte_eth_dev *dev;
2543 struct rte_eth_dev_callback *cb, *next;
2548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2550 dev = &rte_eth_devices[port_id];
2551 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2554 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2556 next = TAILQ_NEXT(cb, next);
2558 if (cb->cb_fn != cb_fn || cb->event != event ||
2559 (cb->cb_arg != (void *)-1 &&
2560 cb->cb_arg != cb_arg))
2564 * if this callback is not executing right now,
2567 if (cb->active == 0) {
2568 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2575 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2580 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2581 enum rte_eth_event_type event, void *cb_arg)
2583 struct rte_eth_dev_callback *cb_lst;
2584 struct rte_eth_dev_callback dev_cb;
2586 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2587 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2588 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2593 dev_cb.cb_arg = (void *) cb_arg;
2595 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2596 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2598 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2601 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2605 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2608 struct rte_eth_dev *dev;
2609 struct rte_intr_handle *intr_handle;
2613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2615 dev = &rte_eth_devices[port_id];
2616 intr_handle = &dev->pci_dev->intr_handle;
2617 if (!intr_handle->intr_vec) {
2618 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2622 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2623 vec = intr_handle->intr_vec[qid];
2624 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2625 if (rc && rc != -EEXIST) {
2626 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2627 " op %d epfd %d vec %u\n",
2628 port_id, qid, op, epfd, vec);
2635 const struct rte_memzone *
2636 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2637 uint16_t queue_id, size_t size, unsigned align,
2640 char z_name[RTE_MEMZONE_NAMESIZE];
2641 const struct rte_memzone *mz;
2643 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2644 dev->driver->pci_drv.driver.name, ring_name,
2645 dev->data->port_id, queue_id);
2647 mz = rte_memzone_lookup(z_name);
2651 if (rte_xen_dom0_supported())
2652 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2653 0, align, RTE_PGSIZE_2M);
2655 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2660 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2661 int epfd, int op, void *data)
2664 struct rte_eth_dev *dev;
2665 struct rte_intr_handle *intr_handle;
2668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2670 dev = &rte_eth_devices[port_id];
2671 if (queue_id >= dev->data->nb_rx_queues) {
2672 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2676 intr_handle = &dev->pci_dev->intr_handle;
2677 if (!intr_handle->intr_vec) {
2678 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2682 vec = intr_handle->intr_vec[queue_id];
2683 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2684 if (rc && rc != -EEXIST) {
2685 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2686 " op %d epfd %d vec %u\n",
2687 port_id, queue_id, op, epfd, vec);
2695 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2698 struct rte_eth_dev *dev;
2700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2702 dev = &rte_eth_devices[port_id];
2704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2705 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2709 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2712 struct rte_eth_dev *dev;
2714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2716 dev = &rte_eth_devices[port_id];
2718 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2719 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2722 #ifdef RTE_NIC_BYPASS
2723 int rte_eth_dev_bypass_init(uint8_t port_id)
2725 struct rte_eth_dev *dev;
2727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2729 dev = &rte_eth_devices[port_id];
2730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2731 (*dev->dev_ops->bypass_init)(dev);
2736 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2738 struct rte_eth_dev *dev;
2740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2742 dev = &rte_eth_devices[port_id];
2743 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2744 (*dev->dev_ops->bypass_state_show)(dev, state);
2749 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2751 struct rte_eth_dev *dev;
2753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2755 dev = &rte_eth_devices[port_id];
2756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2757 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2762 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2764 struct rte_eth_dev *dev;
2766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2768 dev = &rte_eth_devices[port_id];
2769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2770 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2775 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2777 struct rte_eth_dev *dev;
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2781 dev = &rte_eth_devices[port_id];
2783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2784 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2789 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2791 struct rte_eth_dev *dev;
2793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2795 dev = &rte_eth_devices[port_id];
2797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2798 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2803 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2805 struct rte_eth_dev *dev;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2811 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2812 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2817 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2819 struct rte_eth_dev *dev;
2821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2823 dev = &rte_eth_devices[port_id];
2825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2826 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2831 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2833 struct rte_eth_dev *dev;
2835 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2837 dev = &rte_eth_devices[port_id];
2839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2840 (*dev->dev_ops->bypass_wd_reset)(dev);
2846 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2848 struct rte_eth_dev *dev;
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2852 dev = &rte_eth_devices[port_id];
2853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2854 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2855 RTE_ETH_FILTER_NOP, NULL);
2859 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2860 enum rte_filter_op filter_op, void *arg)
2862 struct rte_eth_dev *dev;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2866 dev = &rte_eth_devices[port_id];
2867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2868 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2872 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2873 rte_rx_callback_fn fn, void *user_param)
2875 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2876 rte_errno = ENOTSUP;
2879 /* check input parameters */
2880 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2881 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2885 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2893 cb->param = user_param;
2895 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2896 /* Add the callbacks in fifo order. */
2897 struct rte_eth_rxtx_callback *tail =
2898 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2901 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2908 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2914 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2915 rte_rx_callback_fn fn, void *user_param)
2917 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2918 rte_errno = ENOTSUP;
2921 /* check input parameters */
2922 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2923 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2928 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2936 cb->param = user_param;
2938 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2939 /* Add the callbacks at fisrt position*/
2940 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2942 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2943 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2949 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2950 rte_tx_callback_fn fn, void *user_param)
2952 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2953 rte_errno = ENOTSUP;
2956 /* check input parameters */
2957 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2958 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2963 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2971 cb->param = user_param;
2973 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2974 /* Add the callbacks in fifo order. */
2975 struct rte_eth_rxtx_callback *tail =
2976 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2979 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2986 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2992 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2993 struct rte_eth_rxtx_callback *user_cb)
2995 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2998 /* Check input parameters. */
2999 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3000 if (user_cb == NULL ||
3001 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3004 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3005 struct rte_eth_rxtx_callback *cb;
3006 struct rte_eth_rxtx_callback **prev_cb;
3009 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3010 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3011 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3013 if (cb == user_cb) {
3014 /* Remove the user cb from the callback list. */
3015 *prev_cb = cb->next;
3020 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3026 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3027 struct rte_eth_rxtx_callback *user_cb)
3029 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3032 /* Check input parameters. */
3033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3034 if (user_cb == NULL ||
3035 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3038 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3040 struct rte_eth_rxtx_callback *cb;
3041 struct rte_eth_rxtx_callback **prev_cb;
3043 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3044 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3045 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3047 if (cb == user_cb) {
3048 /* Remove the user cb from the callback list. */
3049 *prev_cb = cb->next;
3054 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3060 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3061 struct rte_eth_rxq_info *qinfo)
3063 struct rte_eth_dev *dev;
3065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3070 dev = &rte_eth_devices[port_id];
3071 if (queue_id >= dev->data->nb_rx_queues) {
3072 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3078 memset(qinfo, 0, sizeof(*qinfo));
3079 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3084 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3085 struct rte_eth_txq_info *qinfo)
3087 struct rte_eth_dev *dev;
3089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3094 dev = &rte_eth_devices[port_id];
3095 if (queue_id >= dev->data->nb_tx_queues) {
3096 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3102 memset(qinfo, 0, sizeof(*qinfo));
3103 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3108 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3109 struct ether_addr *mc_addr_set,
3110 uint32_t nb_mc_addr)
3112 struct rte_eth_dev *dev;
3114 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3116 dev = &rte_eth_devices[port_id];
3117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3118 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3122 rte_eth_timesync_enable(uint8_t port_id)
3124 struct rte_eth_dev *dev;
3126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3127 dev = &rte_eth_devices[port_id];
3129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3130 return (*dev->dev_ops->timesync_enable)(dev);
3134 rte_eth_timesync_disable(uint8_t port_id)
3136 struct rte_eth_dev *dev;
3138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3139 dev = &rte_eth_devices[port_id];
3141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3142 return (*dev->dev_ops->timesync_disable)(dev);
3146 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3149 struct rte_eth_dev *dev;
3151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3152 dev = &rte_eth_devices[port_id];
3154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3155 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3159 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3161 struct rte_eth_dev *dev;
3163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3164 dev = &rte_eth_devices[port_id];
3166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3167 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3171 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3173 struct rte_eth_dev *dev;
3175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3176 dev = &rte_eth_devices[port_id];
3178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3179 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3183 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3185 struct rte_eth_dev *dev;
3187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3188 dev = &rte_eth_devices[port_id];
3190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3191 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3195 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3197 struct rte_eth_dev *dev;
3199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3200 dev = &rte_eth_devices[port_id];
3202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3203 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3207 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3209 struct rte_eth_dev *dev;
3211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3213 dev = &rte_eth_devices[port_id];
3214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3215 return (*dev->dev_ops->get_reg)(dev, info);
3219 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3221 struct rte_eth_dev *dev;
3223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3225 dev = &rte_eth_devices[port_id];
3226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3227 return (*dev->dev_ops->get_eeprom_length)(dev);
3231 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3233 struct rte_eth_dev *dev;
3235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3237 dev = &rte_eth_devices[port_id];
3238 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3239 return (*dev->dev_ops->get_eeprom)(dev, info);
3243 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3245 struct rte_eth_dev *dev;
3247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3249 dev = &rte_eth_devices[port_id];
3250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3251 return (*dev->dev_ops->set_eeprom)(dev, info);
3255 rte_eth_dev_get_dcb_info(uint8_t port_id,
3256 struct rte_eth_dcb_info *dcb_info)
3258 struct rte_eth_dev *dev;
3260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3262 dev = &rte_eth_devices[port_id];
3263 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3266 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3270 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3272 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3273 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3278 eth_dev->data->dev_flags = 0;
3279 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3280 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3281 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3282 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3284 eth_dev->data->kdrv = pci_dev->kdrv;
3285 eth_dev->data->numa_node = pci_dev->device.numa_node;
3286 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3290 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3291 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3293 struct rte_eth_dev *dev;
3295 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3296 if (l2_tunnel == NULL) {
3297 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3301 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3302 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3306 dev = &rte_eth_devices[port_id];
3307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3309 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3313 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3314 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3318 struct rte_eth_dev *dev;
3320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3322 if (l2_tunnel == NULL) {
3323 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3327 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3328 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3333 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3337 dev = &rte_eth_devices[port_id];
3338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3340 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);