1 # Copyright (c) 2018 Cisco and/or its affiliates.
2 # Licensed under the Apache License, Version 2.0 (the "License");
3 # you may not use this file except in compliance with the License.
4 # You may obtain a copy of the License at:
6 # http://www.apache.org/licenses/LICENSE-2.0
8 # Unless required by applicable law or agreed to in writing, software
9 # distributed under the License is distributed on an "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
11 # See the License for the specific language governing permissions and
12 # limitations under the License.
14 ##############################################################################
15 # Cache line size detection
16 ##############################################################################
17 if(CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64.*|AARCH64.*)")
18 file(READ "/proc/cpuinfo" cpuinfo)
19 string(REPLACE "\n" ";" cpuinfo ${cpuinfo})
21 string(REPLACE ":" ";" l ${l})
24 string(STRIP ${name} name)
25 string(STRIP ${value} value)
26 if(${name} STREQUAL "CPU implementer")
27 set(CPU_IMPLEMENTER ${value})
29 if(${name} STREQUAL "CPU part")
30 set(CPU_PART ${value})
33 # Implementer 0x43 - Cavium
34 # Part 0x0af - ThunderX2 is 64B, rest all are 128B
35 if (${CPU_IMPLEMENTER} STREQUAL "0x43")
36 if (${CPU_PART} STREQUAL "0x0af")
37 set(VPP_LOG2_CACHE_LINE_SIZE 6)
39 set(VPP_LOG2_CACHE_LINE_SIZE 7)
42 set(VPP_LOG2_CACHE_LINE_SIZE 6)
44 math(EXPR VPP_CACHE_LINE_SIZE "1 << ${VPP_LOG2_CACHE_LINE_SIZE}")
45 message(STATUS "ARM AArch64 CPU implementer ${CPU_IMPLEMENTER} part ${CPU_PART} cacheline size ${VPP_CACHE_LINE_SIZE}")
47 set(VPP_LOG2_CACHE_LINE_SIZE 6)
50 set(VPP_LOG2_CACHE_LINE_SIZE ${VPP_LOG2_CACHE_LINE_SIZE}
51 CACHE STRING "Target CPU cache line size (power of 2)")
53 ##############################################################################
54 # CPU optimizations and multiarch support
55 ##############################################################################
56 if(CMAKE_SYSTEM_PROCESSOR MATCHES "amd64.*|x86_64.*|AMD64.*")
57 set(CMAKE_C_FLAGS "-march=corei7 -mtune=corei7-avx ${CMAKE_C_FLAGS}")
58 check_c_compiler_flag("-march=core-avx2" compiler_flag_march_core_avx2)
59 if(compiler_flag_march_core_avx2)
60 list(APPEND MARCH_VARIANTS "avx2\;-march=core-avx2 -mtune=core-avx2")
62 check_c_compiler_flag("-march=skylake-avx512" compiler_flag_march_skylake_avx512)
63 if(compiler_flag_march_skylake_avx512)
64 list(APPEND MARCH_VARIANTS "avx512\;-march=skylake-avx512 -mtune=skylake-avx512")
66 elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64.*|AARCH64.*)")
67 set(CMAKE_C_FLAGS "-march=armv8-a+crc ${CMAKE_C_FLAGS}")
68 check_c_compiler_flag("-march=armv8-a+crc+crypto -mtune=qdf24xx" compiler_flag_march_core_qdf24xx)
69 if(compiler_flag_march_core_qdf24xx)
70 list(APPEND MARCH_VARIANTS "qdf24xx\;-march=armv8-a+crc+crypto -DCLIB_N_PREFETCHES=8")
72 check_c_compiler_flag("-march=armv8.1-a+crc+crypto -mtune=thunderx2t99" compiler_flag_march_thunderx2t99)
73 if(compiler_flag_march_thunderx2t99)
74 if (CMAKE_C_COMPILER_VERSION VERSION_GREATER 7.3)
75 list(APPEND MARCH_VARIANTS "thunderx2t99\;-march=armv8.1-a+crc+crypto -mtune=thunderx2t99 -DCLIB_N_PREFETCHES=8")
77 list(APPEND MARCH_VARIANTS "thunderx2t99\;-march=armv8.1-a+crc+crypto -DCLIB_N_PREFETCHES=8")
80 check_c_compiler_flag("-march=armv8-a+crc+crypto -mtune=cortex-a72" compiler_flag_march_cortexa72)
81 if(compiler_flag_march_cortexa72)
82 list(APPEND MARCH_VARIANTS "cortexa72\;-march=armv8-a+crc+crypto -mtune=cortex-a72 -DCLIB_N_PREFETCHES=6")
86 macro(vpp_library_set_multiarch_sources lib)
87 foreach(V ${MARCH_VARIANTS})
89 list(GET V 1 VARIANT_FLAGS)
90 set(l ${lib}_${VARIANT})
91 add_library(${l} OBJECT ${ARGN})
92 set_target_properties(${l} PROPERTIES POSITION_INDEPENDENT_CODE ON)
93 target_compile_options(${l} PUBLIC "-DCLIB_MARCH_VARIANT=${VARIANT}")
94 separate_arguments(VARIANT_FLAGS)
95 target_compile_options(${l} PUBLIC ${VARIANT_FLAGS})
96 target_sources(${lib} PRIVATE $<TARGET_OBJECTS:${l}>)