2 *------------------------------------------------------------------
3 * Copyright (c) 2018 Cisco and/or its affiliates.
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at:
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *------------------------------------------------------------------
21 #include <avf/virtchnl.h>
25 #define AVF_QUEUE_SZ_MAX 4096
26 #define AVF_QUEUE_SZ_MIN 64
28 #define AVF_AQ_ENQ_SUSPEND_TIME 50e-6
29 #define AVF_AQ_ENQ_MAX_WAIT_TIME 250e-3
31 #define AVF_RESET_SUSPEND_TIME 20e-3
32 #define AVF_RESET_MAX_WAIT_TIME 1
34 #define AVF_SEND_TO_PF_SUSPEND_TIME 10e-3
35 #define AVF_SEND_TO_PF_MAX_WAIT_TIME 1
37 #define AVF_RXD_STATUS(x) (1ULL << x)
38 #define AVF_RXD_STATUS_DD AVF_RXD_STATUS(0)
39 #define AVF_RXD_STATUS_EOP AVF_RXD_STATUS(1)
40 #define AVF_RXD_ERROR_SHIFT 19
41 #define AVF_RXD_PTYPE_SHIFT 30
42 #define AVF_RXD_LEN_SHIFT 38
43 #define AVF_RX_MAX_DESC_IN_CHAIN 5
45 #define AVF_RXD_ERROR_IPE (1ULL << (AVF_RXD_ERROR_SHIFT + 3))
46 #define AVF_RXD_ERROR_L4E (1ULL << (AVF_RXD_ERROR_SHIFT + 4))
48 #define AVF_TXD_CMD(x) (1 << (x + 4))
49 #define AVF_TXD_CMD_EXT(x, val) ((u64)val << (x + 4))
50 #define AVF_TXD_CMD_EOP AVF_TXD_CMD(0)
51 #define AVF_TXD_CMD_RS AVF_TXD_CMD(1)
52 #define AVF_TXD_CMD_RSV AVF_TXD_CMD(2)
54 #define AVF_TXD_CMD_IIPT_NONE AVF_TXD_CMD_EXT(5, 0)
55 #define AVF_TXD_CMD_IIPT_IPV6 AVF_TXD_CMD_EXT(5, 1)
56 #define AVF_TXD_CMD_IIPT_IPV4_NO_CSUM AVF_TXD_CMD_EXT(5, 2)
57 #define AVF_TXD_CMD_IIPT_IPV4 AVF_TXD_CMD_EXT(5, 3)
59 #define AVF_TXD_CMD_L4T_UNKNOWN AVF_TXD_CMD_EXT(8, 0)
60 #define AVF_TXD_CMD_L4T_TCP AVF_TXD_CMD_EXT(8, 1)
61 #define AVF_TXD_CMD_L4T_SCTP AVF_TXD_CMD_EXT(8, 2)
62 #define AVF_TXD_CMD_L4T_UDP AVF_TXD_CMD_EXT(8, 3)
64 #define AVF_TXD_OFFSET(x,factor,val) (((u64)val/(u64)factor) << (16 + x))
65 #define AVF_TXD_OFFSET_MACLEN(val) AVF_TXD_OFFSET( 0, 2, val)
66 #define AVF_TXD_OFFSET_IPLEN(val) AVF_TXD_OFFSET( 7, 4, val)
67 #define AVF_TXD_OFFSET_L4LEN(val) AVF_TXD_OFFSET(14, 4, val)
69 extern vlib_log_class_registration_t avf_log;
71 #define avf_log_err(dev, f, ...) \
72 vlib_log (VLIB_LOG_LEVEL_ERR, avf_log.class, "%U: " f, \
73 format_vlib_pci_addr, &dev->pci_addr, \
76 #define avf_log_warn(dev, f, ...) \
77 vlib_log (VLIB_LOG_LEVEL_WARNING, avf_log.class, "%U: " f, \
78 format_vlib_pci_addr, &dev->pci_addr, \
81 #define avf_log_debug(dev, f, ...) \
82 vlib_log (VLIB_LOG_LEVEL_DEBUG, avf_log.class, "%U: " f, \
83 format_vlib_pci_addr, &dev->pci_addr, \
86 #define foreach_avf_device_flags \
87 _(0, INITIALIZED, "initialized") \
88 _(1, ERROR, "error") \
89 _(2, ADMIN_UP, "admin-up") \
90 _(3, VA_DMA, "vaddr-dma") \
91 _(4, LINK_UP, "link-up") \
92 _(5, SHARED_TXQ_LOCK, "shared-txq-lock") \
94 _(7, PROMISC, "promisc") \
95 _(8, RX_INT, "rx-interrupts")
99 #define _(a, b, c) AVF_DEVICE_F_##b = (1 << a),
100 foreach_avf_device_flags
104 typedef volatile struct
113 u64 filter_status:32;
121 #ifdef CLIB_HAVE_VEC256
127 STATIC_ASSERT_SIZEOF (avf_rx_desc_t, 32);
129 typedef volatile struct
134 #ifdef CLIB_HAVE_VEC128
140 STATIC_ASSERT_SIZEOF (avf_tx_desc_t, 16);
144 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
145 volatile u32 *qrx_tail;
148 avf_rx_desc_t *descs;
152 u8 buffer_pool_index;
157 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
158 volatile u32 *qtx_tail;
161 clib_spinlock_t lock;
162 avf_tx_desc_t *descs;
170 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
172 u32 per_interface_next_index;
177 vlib_pci_dev_handle_t pci_dev_handle;
197 virtchnl_pf_event_t *events;
208 virtchnl_link_speed_t link_speed;
209 vlib_pci_addr_t pci_addr;
212 virtchnl_eth_stats_t eth_stats;
213 virtchnl_eth_stats_t last_cleared_eth_stats;
219 #define AVF_RX_VECTOR_SZ VLIB_FRAME_SIZE
223 AVF_PROCESS_EVENT_START = 1,
224 AVF_PROCESS_EVENT_DELETE_IF = 2,
225 AVF_PROCESS_EVENT_AQ_INT = 3,
226 AVF_PROCESS_EVENT_REQ = 4,
227 } avf_process_event_t;
231 AVF_PROCESS_REQ_ADD_DEL_ETH_ADDR = 1,
232 AVF_PROCESS_REQ_CONFIG_PROMISC_MDDE = 2,
233 } avf_process_req_type_t;
237 avf_process_req_type_t type;
239 u32 calling_process_index;
241 int is_add, is_enable;
247 u64 qw1s[AVF_RX_MAX_DESC_IN_CHAIN - 1];
248 u32 buffers[AVF_RX_MAX_DESC_IN_CHAIN - 1];
253 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
254 vlib_buffer_t *bufs[AVF_RX_VECTOR_SZ];
255 u64 qw1s[AVF_RX_VECTOR_SZ];
256 avf_rx_tail_t tails[AVF_RX_VECTOR_SZ];
257 vlib_buffer_t buffer_template;
258 } avf_per_thread_data_t;
264 avf_device_t **devices;
265 avf_per_thread_data_t *per_thread_data;
268 extern avf_main_t avf_main;
272 vlib_pci_addr_t addr;
282 } avf_create_if_args_t;
284 void avf_create_if (vlib_main_t * vm, avf_create_if_args_t * args);
286 extern vlib_node_registration_t avf_input_node;
287 extern vlib_node_registration_t avf_process_node;
288 extern vnet_device_class_t avf_device_class;
291 format_function_t format_avf_device;
292 format_function_t format_avf_device_name;
293 format_function_t format_avf_input_trace;
295 static_always_inline avf_device_t *
296 avf_get_device (u32 dev_instance)
298 return pool_elt_at_index (avf_main.devices, dev_instance)[0];
302 avf_get_u32 (void *start, int offset)
304 return *(u32 *) (((u8 *) start) + offset);
308 avf_get_u64 (void *start, int offset)
310 return *(u64 *) (((u8 *) start) + offset);
314 avf_get_u32_bits (void *start, int offset, int first, int last)
316 u32 value = avf_get_u32 (start, offset);
317 if ((last == 0) && (first == 31))
320 value &= (1 << (first - last + 1)) - 1;
325 avf_get_u64_bits (void *start, int offset, int first, int last)
327 u64 value = avf_get_u64 (start, offset);
328 if ((last == 0) && (first == 63))
331 value &= (1 << (first - last + 1)) - 1;
336 avf_set_u32 (void *start, int offset, u32 value)
338 (*(u32 *) (((u8 *) start) + offset)) = value;
342 avf_reg_write (avf_device_t * ad, u32 addr, u32 val)
344 *(volatile u32 *) ((u8 *) ad->bar0 + addr) = val;
348 avf_reg_read (avf_device_t * ad, u32 addr)
350 return *(volatile u32 *) (ad->bar0 + addr);
354 avf_reg_flush (avf_device_t * ad)
356 avf_reg_read (ad, AVFGEN_RSTAT);
357 asm volatile ("":::"memory");
360 static_always_inline int
361 avf_rxd_is_not_eop (avf_rx_desc_t * d)
363 return (d->qword[1] & AVF_RXD_STATUS_EOP) == 0;
366 static_always_inline int
367 avf_rxd_is_not_dd (avf_rx_desc_t * d)
369 return (d->qword[1] & AVF_RXD_STATUS_DD) == 0;
377 u64 qw1s[AVF_RX_MAX_DESC_IN_CHAIN];
380 #define foreach_avf_tx_func_error \
381 _(SEGMENT_SIZE_EXCEEDED, "segment size exceeded") \
382 _(NO_FREE_SLOTS, "no free tx slots")
386 #define _(f,s) AVF_TX_ERROR_##f,
387 foreach_avf_tx_func_error
390 } avf_tx_func_error_t;
395 * fd.io coding-style-patch-verification: ON
398 * eval: (c-set-style "gnu")