2 *------------------------------------------------------------------
3 * Copyright (c) 2018 Cisco and/or its affiliates.
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at:
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *------------------------------------------------------------------
21 #include <avf/virtchnl.h>
23 #include <vppinfra/types.h>
24 #include <vppinfra/error_bootstrap.h>
25 #include <vppinfra/lock.h>
28 #include <vlib/pci/pci.h>
30 #include <vnet/interface.h>
32 #include <vnet/devices/devices.h>
33 #include <vnet/flow/flow.h>
35 #define AVF_QUEUE_SZ_MAX 4096
36 #define AVF_QUEUE_SZ_MIN 64
38 #define AVF_AQ_ENQ_SUSPEND_TIME 50e-6
39 #define AVF_AQ_ENQ_MAX_WAIT_TIME 250e-3
41 #define AVF_RESET_SUSPEND_TIME 20e-3
42 #define AVF_RESET_MAX_WAIT_TIME 1
44 #define AVF_SEND_TO_PF_SUSPEND_TIME 10e-3
45 #define AVF_SEND_TO_PF_MAX_WAIT_TIME 1
47 #define AVF_RXD_STATUS(x) (1ULL << x)
48 #define AVF_RXD_STATUS_DD AVF_RXD_STATUS(0)
49 #define AVF_RXD_STATUS_EOP AVF_RXD_STATUS(1)
50 #define AVF_RXD_STATUS_FLM AVF_RXD_STATUS (11)
51 #define AVF_RXD_ERROR_SHIFT 19
52 #define AVF_RXD_PTYPE_SHIFT 30
53 #define AVF_RXD_LEN_SHIFT 38
54 #define AVF_RX_MAX_DESC_IN_CHAIN 5
56 #define AVF_RXD_ERROR_IPE (1ULL << (AVF_RXD_ERROR_SHIFT + 3))
57 #define AVF_RXD_ERROR_L4E (1ULL << (AVF_RXD_ERROR_SHIFT + 4))
59 #define AVF_TXD_CMD(x) (1 << (x + 4))
60 #define AVF_TXD_CMD_EXT(x, val) ((u64)val << (x + 4))
61 #define AVF_TXD_CMD_EOP AVF_TXD_CMD(0)
62 #define AVF_TXD_CMD_RS AVF_TXD_CMD(1)
63 #define AVF_TXD_CMD_RSV AVF_TXD_CMD(2)
65 #define AVF_TXD_CMD_IIPT_NONE AVF_TXD_CMD_EXT(5, 0)
66 #define AVF_TXD_CMD_IIPT_IPV6 AVF_TXD_CMD_EXT(5, 1)
67 #define AVF_TXD_CMD_IIPT_IPV4_NO_CSUM AVF_TXD_CMD_EXT(5, 2)
68 #define AVF_TXD_CMD_IIPT_IPV4 AVF_TXD_CMD_EXT(5, 3)
70 #define AVF_TXD_CMD_L4T_UNKNOWN AVF_TXD_CMD_EXT(8, 0)
71 #define AVF_TXD_CMD_L4T_TCP AVF_TXD_CMD_EXT(8, 1)
72 #define AVF_TXD_CMD_L4T_SCTP AVF_TXD_CMD_EXT(8, 2)
73 #define AVF_TXD_CMD_L4T_UDP AVF_TXD_CMD_EXT(8, 3)
75 #define AVF_TXD_OFFSET(x,factor,val) (((u64)val/(u64)factor) << (16 + x))
76 #define AVF_TXD_OFFSET_MACLEN(val) AVF_TXD_OFFSET( 0, 2, val)
77 #define AVF_TXD_OFFSET_IPLEN(val) AVF_TXD_OFFSET( 7, 4, val)
78 #define AVF_TXD_OFFSET_L4LEN(val) AVF_TXD_OFFSET(14, 4, val)
80 #define AVF_TXD_DTYP_CTX 0x1ULL
81 #define AVF_TXD_CTX_CMD_TSO AVF_TXD_CMD(0)
82 #define AVF_TXD_CTX_SEG(val,x) (((u64)val) << (30 + x))
83 #define AVF_TXD_CTX_SEG_TLEN(val) AVF_TXD_CTX_SEG(val,0)
84 #define AVF_TXD_CTX_SEG_MSS(val) AVF_TXD_CTX_SEG(val,20)
87 extern vlib_log_class_registration_t avf_log;
88 extern vlib_log_class_registration_t avf_stats_log;
90 #define avf_log_err(dev, f, ...) \
91 vlib_log (VLIB_LOG_LEVEL_ERR, avf_log.class, "%U: " f, \
92 format_vlib_pci_addr, &dev->pci_addr, \
95 #define avf_log_warn(dev, f, ...) \
96 vlib_log (VLIB_LOG_LEVEL_WARNING, avf_log.class, "%U: " f, \
97 format_vlib_pci_addr, &dev->pci_addr, \
100 #define avf_log_debug(dev, f, ...) \
101 vlib_log (VLIB_LOG_LEVEL_DEBUG, avf_log.class, "%U: " f, \
102 format_vlib_pci_addr, &dev->pci_addr, \
105 #define avf_stats_log_debug(dev, f, ...) \
106 vlib_log (VLIB_LOG_LEVEL_DEBUG, avf_stats_log.class, "%U: " f, \
107 format_vlib_pci_addr, &dev->pci_addr, ##__VA_ARGS__)
109 #define foreach_avf_device_flags \
110 _ (0, INITIALIZED, "initialized") \
111 _ (1, ERROR, "error") \
112 _ (2, ADMIN_UP, "admin-up") \
113 _ (3, VA_DMA, "vaddr-dma") \
114 _ (4, LINK_UP, "link-up") \
115 _ (6, ELOG, "elog") \
116 _ (7, PROMISC, "promisc") \
117 _ (8, RX_INT, "rx-interrupts") \
118 _ (9, RX_FLOW_OFFLOAD, "rx-flow-offload")
122 #define _(a, b, c) AVF_DEVICE_F_##b = (1 << a),
123 foreach_avf_device_flags
127 typedef volatile struct
136 u64 filter_status:32;
148 #ifdef CLIB_HAVE_VEC256
154 STATIC_ASSERT_SIZEOF (avf_rx_desc_t, 32);
161 #ifdef CLIB_HAVE_VEC128
167 STATIC_ASSERT_SIZEOF (avf_tx_desc_t, 16);
171 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
172 volatile u32 *qrx_tail;
175 avf_rx_desc_t *descs;
179 u8 buffer_pool_index;
185 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
186 volatile u32 *qtx_tail;
190 clib_spinlock_t lock;
191 avf_tx_desc_t *descs;
196 avf_tx_desc_t *tmp_descs;
205 struct avf_fdir_conf *rcfg;
213 } avf_flow_lookup_entry_t;
217 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
219 u32 per_interface_next_index;
224 vlib_pci_dev_handle_t pci_dev_handle;
244 virtchnl_pf_event_t *events;
255 virtchnl_link_speed_t link_speed;
256 vlib_pci_addr_t pci_addr;
259 avf_flow_entry_t *flow_entries; /* pool */
260 avf_flow_lookup_entry_t *flow_lookup_entries; /* pool */
263 virtchnl_eth_stats_t eth_stats;
264 virtchnl_eth_stats_t last_cleared_eth_stats;
270 #define AVF_RX_VECTOR_SZ VLIB_FRAME_SIZE
274 AVF_PROCESS_EVENT_START = 1,
275 AVF_PROCESS_EVENT_DELETE_IF = 2,
276 AVF_PROCESS_EVENT_AQ_INT = 3,
277 AVF_PROCESS_EVENT_REQ = 4,
278 } avf_process_event_t;
282 AVF_PROCESS_REQ_ADD_DEL_ETH_ADDR = 1,
283 AVF_PROCESS_REQ_CONFIG_PROMISC_MDDE = 2,
284 AVF_PROCESS_REQ_PROGRAM_FLOW = 3,
285 } avf_process_req_type_t;
289 avf_process_req_type_t type;
291 u32 calling_process_index;
293 int is_add, is_enable;
295 /* below parameters are used for 'program flow' event */
306 u64 qw1s[AVF_RX_MAX_DESC_IN_CHAIN - 1];
307 u32 buffers[AVF_RX_MAX_DESC_IN_CHAIN - 1];
312 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
313 vlib_buffer_t *bufs[AVF_RX_VECTOR_SZ];
314 u16 next[AVF_RX_VECTOR_SZ];
315 u64 qw1s[AVF_RX_VECTOR_SZ];
316 u32 flow_ids[AVF_RX_VECTOR_SZ];
317 avf_rx_tail_t tails[AVF_RX_VECTOR_SZ];
318 vlib_buffer_t buffer_template;
319 } avf_per_thread_data_t;
325 avf_device_t **devices;
326 avf_per_thread_data_t *per_thread_data;
329 extern avf_main_t avf_main;
333 vlib_pci_addr_t addr;
344 } avf_create_if_args_t;
346 void avf_create_if (vlib_main_t * vm, avf_create_if_args_t * args);
348 extern vlib_node_registration_t avf_input_node;
349 extern vlib_node_registration_t avf_process_node;
350 extern vnet_device_class_t avf_device_class;
352 clib_error_t *avf_program_flow (u32 dev_instance, int is_add, u8 *rule,
353 u32 rule_len, u8 *program_status,
357 format_function_t format_avf_device;
358 format_function_t format_avf_device_name;
359 format_function_t format_avf_input_trace;
360 format_function_t format_avf_vf_cap_flags;
361 format_function_t format_avf_vlan_supported_caps;
362 format_function_t format_avf_vlan_caps;
363 format_function_t format_avf_vlan_support;
364 format_function_t format_avf_eth_stats;
365 vnet_flow_dev_ops_function_t avf_flow_ops_fn;
367 static_always_inline avf_device_t *
368 avf_get_device (u32 dev_instance)
370 return pool_elt_at_index (avf_main.devices, dev_instance)[0];
374 void avf_elog_init ();
375 void avf_elog_reg (avf_device_t *ad, u32 addr, u32 val, int is_read);
376 void avf_elog_aq_enq_req (avf_device_t *ad, avf_aq_desc_t *d);
377 void avf_elog_aq_enq_resp (avf_device_t *ad, avf_aq_desc_t *d);
378 void avf_elog_arq_desc (avf_device_t *ad, avf_aq_desc_t *d);
381 avf_get_u32 (void *start, int offset)
383 return *(u32 *) (((u8 *) start) + offset);
387 avf_get_u64 (void *start, int offset)
389 return *(u64 *) (((u8 *) start) + offset);
393 avf_get_u32_bits (void *start, int offset, int first, int last)
395 u32 value = avf_get_u32 (start, offset);
396 if ((last == 0) && (first == 31))
399 value &= (1 << (first - last + 1)) - 1;
404 avf_get_u64_bits (void *start, int offset, int first, int last)
406 u64 value = avf_get_u64 (start, offset);
407 if ((last == 0) && (first == 63))
410 value &= (1 << (first - last + 1)) - 1;
415 avf_set_u32 (void *start, int offset, u32 value)
417 (*(u32 *) (((u8 *) start) + offset)) = value;
421 avf_reg_write (avf_device_t * ad, u32 addr, u32 val)
423 if (ad->flags & AVF_DEVICE_F_ELOG)
424 avf_elog_reg (ad, addr, val, 0);
425 *(volatile u32 *) ((u8 *) ad->bar0 + addr) = val;
429 avf_reg_read (avf_device_t * ad, u32 addr)
431 u32 val = *(volatile u32 *) (ad->bar0 + addr);
433 if (ad->flags & AVF_DEVICE_F_ELOG)
434 avf_elog_reg (ad, addr, val, 1);
440 avf_reg_flush (avf_device_t * ad)
442 avf_reg_read (ad, AVFGEN_RSTAT);
443 asm volatile ("":::"memory");
447 avf_tail_write (volatile u32 *addr, u32 val)
451 _directstoreu_u32 ((void *) addr, val);
453 clib_atomic_store_rel_n (addr, val);
457 static_always_inline int
458 avf_rxd_is_not_eop (avf_rx_desc_t * d)
460 return (d->qword[1] & AVF_RXD_STATUS_EOP) == 0;
463 static_always_inline int
464 avf_rxd_is_not_dd (avf_rx_desc_t * d)
466 return (d->qword[1] & AVF_RXD_STATUS_DD) == 0;
475 u64 qw1s[AVF_RX_MAX_DESC_IN_CHAIN];
478 #define foreach_avf_tx_func_error \
479 _(SEGMENT_SIZE_EXCEEDED, "segment size exceeded") \
480 _(NO_FREE_SLOTS, "no free tx slots")
484 #define _(f,s) AVF_TX_ERROR_##f,
485 foreach_avf_tx_func_error
488 } avf_tx_func_error_t;
493 * fd.io coding-style-patch-verification: ON
496 * eval: (c-set-style "gnu")