1 /* SPDX-License-Identifier: Apache-2.0
2 * Copyright (c) 2023 Cisco Systems, Inc.
6 #include <vnet/dev/dev.h>
7 #include <vnet/dev/pci.h>
8 #include <vnet/dev/counters.h>
9 #include <vnet/ethernet/ethernet.h>
10 #include <vnet/plugin/plugin.h>
11 #include <vpp/app/version.h>
12 #include <dev_octeon/octeon.h>
14 #include <base/roc_api.h>
17 struct roc_model oct_model;
19 VLIB_REGISTER_LOG_CLASS (oct_log, static) = {
20 .class_name = "octeon",
21 .subclass_name = "init",
24 #define _(f, n, s, d) \
25 { .name = #n, .desc = d, .severity = VL_COUNTER_SEVERITY_##s },
27 vlib_error_desc_t oct_tx_node_counters[] = { foreach_oct_tx_node_counter };
30 vnet_dev_node_t oct_rx_node = {
31 .format_trace = format_oct_rx_trace,
34 vnet_dev_node_t oct_tx_node = {
35 .format_trace = format_oct_tx_trace,
36 .error_counters = oct_tx_node_counters,
37 .n_error_counters = ARRAY_LEN (oct_tx_node_counters),
43 oct_device_type_t type;
47 #define _(id, device_type, desc) \
49 .device_id = (id), .type = OCT_DEVICE_TYPE_##device_type, \
50 .description = (desc) \
53 _ (0xa063, RVU_PF, "Marvell Octeon Resource Virtualization Unit PF"),
54 _ (0xa0f8, RVU_VF, "Marvell Octeon Resource Virtualization Unit VF"),
55 _ (0xa0f3, CPT_VF, "Marvell Octeon Cryptographic Accelerator Unit VF"),
60 oct_probe (vlib_main_t *vm, vnet_dev_bus_index_t bus_index, void *dev_info)
62 vnet_dev_bus_pci_device_info_t *di = dev_info;
64 if (di->vendor_id != 0x177d) /* Cavium */
67 FOREACH_ARRAY_ELT (dt, oct_dev_types)
69 if (dt->device_id == di->device_id)
70 return format (0, "%s", dt->description);
77 cnx_return_roc_err (vnet_dev_t *dev, int rrv, char *fmt, ...)
81 u8 *s = va_format (0, fmt, &va);
84 log_err (dev, "%v: %s [%d]", s, roc_error_msg_get (rrv), rrv);
87 return VNET_DEV_ERR_UNSUPPORTED_DEVICE;
91 oct_alloc (vlib_main_t *vm, vnet_dev_t *dev)
93 oct_device_t *cd = vnet_dev_get_data (dev);
95 clib_mem_alloc_aligned (sizeof (struct roc_nix), CLIB_CACHE_LINE_BYTES);
100 oct_init_nix (vlib_main_t *vm, vnet_dev_t *dev)
102 oct_device_t *cd = vnet_dev_get_data (dev);
105 oct_port_t oct_port = {};
107 *cd->nix = (struct roc_nix){
108 .reta_sz = ROC_NIX_RSS_RETA_SZ_256,
109 .max_sqb_count = 512,
110 .pci_dev = &cd->plt_pci_dev,
113 if ((rrv = roc_nix_dev_init (cd->nix)))
114 return cnx_return_roc_err (dev, rrv, "roc_nix_dev_init");
116 if (roc_nix_npc_mac_addr_get (cd->nix, mac_addr))
117 return cnx_return_roc_err (dev, rrv, "roc_nix_npc_mac_addr_get");
119 vnet_dev_port_add_args_t port_add_args = {
122 .type = VNET_DEV_PORT_TYPE_ETHERNET,
125 .max_supported_rx_frame_size = roc_nix_max_pkt_len (cd->nix),
134 .init = oct_port_init,
135 .deinit = oct_port_deinit,
136 .start = oct_port_start,
137 .stop = oct_port_stop,
138 .config_change = oct_port_cfg_change,
139 .config_change_validate = oct_port_cfg_change_validate,
140 .format_status = format_oct_port_status,
141 .format_flow = format_oct_port_flow,
143 .data_size = sizeof (oct_port_t),
144 .initial_data = &oct_port,
146 .rx_node = &oct_rx_node,
147 .tx_node = &oct_tx_node,
150 .data_size = sizeof (oct_rxq_t),
151 .default_size = 1024,
157 .alloc = oct_rx_queue_alloc,
158 .free = oct_rx_queue_free,
159 .format_info = format_oct_rxq_info,
164 .data_size = sizeof (oct_txq_t),
165 .default_size = 1024,
171 .alloc = oct_tx_queue_alloc,
172 .free = oct_tx_queue_free,
173 .format_info = format_oct_txq_info,
178 vnet_dev_set_hw_addr_eth_mac (&port_add_args.port.attr.hw_addr, mac_addr);
180 log_info (dev, "MAC address is %U", format_ethernet_address, mac_addr);
182 return vnet_dev_port_add (vm, dev, 0, &port_add_args);
186 oct_init_cpt (vlib_main_t *vm, vnet_dev_t *dev)
188 oct_device_t *cd = vnet_dev_get_data (dev);
190 struct roc_cpt cpt = {
191 .pci_dev = &cd->plt_pci_dev,
194 if ((rrv = roc_cpt_dev_init (&cpt)))
195 return cnx_return_roc_err (dev, rrv, "roc_cpt_dev_init");
200 oct_init (vlib_main_t *vm, vnet_dev_t *dev)
202 oct_device_t *cd = vnet_dev_get_data (dev);
203 vlib_pci_config_hdr_t pci_hdr;
206 rv = vnet_dev_pci_read_config_header (vm, dev, &pci_hdr);
207 if (rv != VNET_DEV_OK)
210 if (pci_hdr.vendor_id != 0x177d)
211 return VNET_DEV_ERR_UNSUPPORTED_DEVICE;
213 FOREACH_ARRAY_ELT (dt, oct_dev_types)
215 if (dt->device_id == pci_hdr.device_id)
219 if (cd->type == OCT_DEVICE_TYPE_UNKNOWN)
222 rv = VNET_DEV_ERR_UNSUPPORTED_DEVICE;
224 cd->plt_pci_dev = (struct plt_pci_device){
225 .id.vendor_id = pci_hdr.vendor_id,
226 .id.device_id = pci_hdr.device_id,
227 .id.class_id = pci_hdr.class << 16 | pci_hdr.subclass,
228 .pci_handle = vnet_dev_get_pci_handle (dev),
231 foreach_int (i, 2, 4)
233 rv = vnet_dev_pci_map_region (vm, dev, i,
234 &cd->plt_pci_dev.mem_resource[i].addr);
235 if (rv != VNET_DEV_OK)
239 strncpy ((char *) cd->plt_pci_dev.name, dev->device_id,
240 sizeof (cd->plt_pci_dev.name) - 1);
242 if (cd->type == OCT_DEVICE_TYPE_RVU_PF || cd->type == OCT_DEVICE_TYPE_RVU_VF)
243 return oct_init_nix (vm, dev);
244 else if (cd->type == OCT_DEVICE_TYPE_CPT_VF)
245 return oct_init_cpt (vm, dev);
247 return VNET_DEV_ERR_UNSUPPORTED_DEVICE;
253 oct_deinit (vlib_main_t *vm, vnet_dev_t *dev)
255 oct_device_t *cd = vnet_dev_get_data (dev);
257 if (cd->nix_initialized)
258 roc_nix_dev_fini (cd->nix);
262 oct_free (vlib_main_t *vm, vnet_dev_t *dev)
264 oct_device_t *cd = vnet_dev_get_data (dev);
266 if (cd->nix_initialized)
267 roc_nix_dev_fini (cd->nix);
270 VNET_DEV_REGISTER_DRIVER (octeon) = {
273 .device_data_sz = sizeof (oct_device_t),
277 .deinit = oct_deinit,
283 static clib_error_t *
284 oct_plugin_init (vlib_main_t *vm)
287 extern oct_plt_init_param_t oct_plt_init_param;
289 rv = oct_plt_init (&oct_plt_init_param);
291 return clib_error_return (0, "oct_plt_init failed");
293 rv = roc_model_init (&oct_model);
295 return clib_error_return (0, "roc_model_init failed");
299 VLIB_INIT_FUNCTION (oct_plugin_init);
301 VLIB_PLUGIN_REGISTER () = {
302 .version = VPP_BUILD_VER,
303 .description = "dev_octeon",