2 * Copyright (c) 2022 Arm and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
16 #include <vnet/vnet.h>
17 #include <vppinfra/linux/sysfs.h>
18 #include <perfmon/perfmon.h>
19 #include <perfmon/arm/events.h>
21 /* as per .events[n] in PERFMON_REGISTER_BUNDLE */
29 format_arm_inst_clock (u8 *s, va_list *args)
31 perfmon_node_stats_t *ns = va_arg (*args, perfmon_node_stats_t *);
32 int row = va_arg (*args, int);
37 s = format (s, "%llu", ns->n_packets);
41 s = format (s, "%llu", ns->n_calls);
45 s = format (s, "%llu", ns->value[0]); /* Cycles */
49 s = format (s, "%llu", ns->value[1]); /* Inst */
53 s = format (s, "%.2f",
54 (f64) ns->n_packets / ns->n_calls); /* Packets/Call */
58 s = format (s, "%.2f",
59 (f64) ns->value[0] / ns->n_packets); /* Clocks/Packet */
65 (f64) ns->value[1] / ns->n_packets); /* Instructions/Packet */
69 s = format (s, "%.2f", (f64) ns->value[1] / ns->value[0]); /* IPC */
75 PERFMON_REGISTER_BUNDLE (arm_inst_clock) = {
76 .name = "inst-and-clock",
78 "CPU cycles, instructions, instructions/packet, cycles/packet and IPC",
80 .type = PERFMON_BUNDLE_TYPE_NODE,
81 .events[0] = ARMV8_PMUV3_CPU_CYCLES,
82 .events[1] = ARMV8_PMUV3_INST_RETIRED,
85 .format_fn = format_arm_inst_clock,
86 .column_headers = PERFMON_STRINGS ("Packets", "Calls", "CPU Cycles", "Inst*",
87 "Pkts/Call", "Cycles/Pkt", "Inst/Pkt",
90 * set a bit for every event used in each column
91 * this allows us to disable columns at bundle registration if an
92 * event is not supported
95 PERFMON_COLUMN_EVENTS (0, 0, SET_BIT (CPU_CYCLES), SET_BIT (INST_RETIRED),
96 0, SET_BIT (CPU_CYCLES), SET_BIT (INST_RETIRED),
97 SET_BIT (CPU_CYCLES) | SET_BIT (INST_RETIRED)),
98 .footer = "* Instructions retired: the counter increments for every "
99 "architecturally executed instruction\n"
100 "- See Armv8-A Architecture Reference Manual, D7.10 PMU events and"
101 " event numbers for full description.\n"