2 * Copyright (c) 2020 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
16 #include <vnet/vnet.h>
17 #include <perfmon/perfmon.h>
18 #include <perfmon/intel/core.h>
19 #include <linux/perf_event.h>
21 static perfmon_event_t events[] = {
22 #define _(event, umask, edge, any, inv, cmask, n, suffix, desc) \
23 [INTEL_CORE_E_##n##_##suffix] = { .type = PERF_TYPE_RAW, \
24 .config = PERF_INTEL_CODE ( \
25 event, umask, edge, any, inv, cmask), \
26 .name = #n "." #suffix, \
27 .description = desc, \
28 .exclude_kernel = 1 },
30 foreach_perf_intel_core_event foreach_perf_intel_peusdo_event
31 foreach_perf_intel_tremont_event
37 format_intel_core_config (u8 *s, va_list *args)
39 u64 config = va_arg (*args, u64);
42 s = format (s, "event=0x%02x, umask=0x%02x", config & 0xff,
43 (config >> 8) & 0xff);
45 if ((v = (config >> 18) & 1))
46 s = format (s, ", edge=%u", v);
48 if ((v = (config >> 19) & 1))
49 s = format (s, ", pc=%u", v);
51 if ((v = (config >> 21) & 1))
52 s = format (s, ", any=%u", v);
54 if ((v = (config >> 23) & 1))
55 s = format (s, ", inv=%u", v);
57 if ((v = (config >> 24) & 0xff))
58 s = format (s, ", cmask=0x%02x", v);
60 /* show the raw config, for convenience sake */
61 if (!((config >> 16) & 0xffff))
62 s = format (s, ", raw=r%x", config & 0xffff);
68 intel_core_init (vlib_main_t *vm, perfmon_source_t *src)
70 u32 eax, ebx, ecx, edx;
71 if (__get_cpuid (0, &eax, &ebx, &ecx, &edx) == 0)
72 return clib_error_return (0, "unknown CPU (missing cpuid)");
75 if (ebx != 0x756e6547 || ecx != 0x6c65746e || edx != 0x49656e69)
76 return clib_error_return (0, "not a IA-32 CPU");
81 intel_core_is_fixed (u32 event)
83 u64 config = events[event].config;
84 u8 eventcode = (config & 0xFF);
86 return !eventcode ? 1 : 0;
89 PERFMON_REGISTER_SOURCE (intel_core) = {
91 .description = "intel arch core events",
93 .n_events = ARRAY_LEN (events),
94 .init_fn = intel_core_init,
95 .is_fixed = intel_core_is_fixed,
96 .format_config = format_intel_core_config,