2 * Copyright (c) 2015 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
15 #ifndef included_asm_x86_h
16 #define included_asm_x86_h
18 #include <vppinfra/format.h>
32 /* Instruction name. */
35 /* X86 instructions may have up to 3 operands. */
36 x86_insn_operand_t operands[3];
39 #define X86_INSN_FLAG_DEFAULT_64_BIT (1 << 0)
40 #define X86_INSN_FLAG_SET_SSE_GROUP(n) ((n) << 5)
41 #define X86_INSN_FLAG_GET_SSE_GROUP(f) (((f) >> 5) & 0x1f)
42 #define X86_INSN_FLAG_SET_MODRM_REG_GROUP(n) (((n) & 0x3f) << 10)
43 #define X86_INSN_FLAG_GET_MODRM_REG_GROUP(f) (((f) >> 10) & 0x3f)
47 x86_insn_operand_is_valid (x86_insn_t * i, uword o)
49 ASSERT (o < ARRAY_LEN (i->operands));
50 return i->operands[o].code != '_';
53 #define foreach_x86_legacy_prefix \
54 _ (OPERAND_SIZE, 0x66) \
55 _ (ADDRESS_SIZE, 0x67) \
56 _ (SEGMENT_CS, 0x2e) \
57 _ (SEGMENT_DS, 0x3e) \
58 _ (SEGMENT_ES, 0x26) \
59 _ (SEGMENT_FS, 0x64) \
60 _ (SEGMENT_GS, 0x65) \
61 _ (SEGMENT_SS, 0x36) \
66 #define foreach_x86_insn_parse_flag \
67 /* Parse in 32/64-bit mode. */ \
71 /* regs[1/2] is a valid base/index register */ \
75 _ (OPERAND_SIZE_64, 0)
79 #define _(f,o) X86_INSN_FLAG_BIT_##f,
80 foreach_x86_insn_parse_flag foreach_x86_legacy_prefix
82 } x86_insn_parse_flag_bit_t;
86 #define _(f,o) X86_INSN_##f = 1 << X86_INSN_FLAG_BIT_##f,
87 foreach_x86_insn_parse_flag foreach_x86_legacy_prefix
89 } x86_insn_parse_flag_t;
93 /* Registers in instruction.
94 [0] is modrm reg field
99 /* Scale for index register. */
100 u8 log2_index_scale:2;
101 u8 log2_effective_operand_bytes:3;
102 u8 log2_effective_address_bytes:3;
106 /* Parser flags: set of x86_insn_parse_flag_t enums. */
114 u8 *x86_insn_parse (x86_insn_parse_t * p, u8 * code_start);
115 format_function_t format_x86_insn_parse;
117 #endif /* included_asm_x86_h */
120 * fd.io coding-style-patch-verification: ON
123 * eval: (c-set-style "gnu")