2 * Copyright (c) 2016 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
16 #include <vppinfra/clib.h>
17 #include <vppinfra/format.h>
18 #include <vppinfra/cpu.h>
20 #define foreach_x86_cpu_uarch \
21 _(0x06, 0x9e, "Kaby Lake", "Kaby Lake DT/H/S/X") \
22 _(0x06, 0x8e, "Kaby Lake", "Kaby Lake Y/U") \
23 _(0x06, 0x85, "Knights Mill", "Knights Mill") \
24 _(0x06, 0x5f, "Goldmont", "Denverton") \
25 _(0x06, 0x5e, "Skylake", "Skylake DT/H/S") \
26 _(0x06, 0x5c, "Goldmont", "Apollo Lake") \
27 _(0x06, 0x5a, "Silvermont", "Moorefield") \
28 _(0x06, 0x57, "Knights Landing", "Knights Landing") \
29 _(0x06, 0x56, "Broadwell", "Broadwell DE") \
30 _(0x06, 0x55, "Skylake", "Skylake X/SP") \
31 _(0x06, 0x4f, "Broadwell", "Broadwell EP/EX") \
32 _(0x06, 0x4e, "Skylake", "Skylake Y/U") \
33 _(0x06, 0x4d, "Silvermont", "Rangeley") \
34 _(0x06, 0x4c, "Airmont", "Braswell") \
35 _(0x06, 0x47, "Broadwell", "Broadwell H") \
36 _(0x06, 0x46, "Haswell", "Crystalwell") \
37 _(0x06, 0x45, "Haswell", "Haswell ULT") \
38 _(0x06, 0x3f, "Haswell", "Haswell E") \
39 _(0x06, 0x3e, "Ivy Bridge", "Ivy Bridge E/EN/EP") \
40 _(0x06, 0x3d, "Broadwell", "Broadwell U") \
41 _(0x06, 0x3c, "Haswell", "Haswell") \
42 _(0x06, 0x3a, "Ivy Bridge", "IvyBridge") \
43 _(0x06, 0x37, "Silvermont", "BayTrail") \
44 _(0x06, 0x36, "Saltwell", "Cedarview,Centerton") \
45 _(0x06, 0x35, "Saltwell", "Cloverview") \
46 _(0x06, 0x2f, "Westmere", "Westmere EX") \
47 _(0x06, 0x2e, "Nehalem", "Nehalem EX") \
48 _(0x06, 0x2d, "Sandy Bridge", "SandyBridge E/EN/EP") \
49 _(0x06, 0x2c, "Westmere", "Westmere EP/EX,Gulftown") \
50 _(0x06, 0x2a, "Sandy Bridge", "Sandy Bridge") \
51 _(0x06, 0x27, "Saltwell", "Medfield") \
52 _(0x06, 0x26, "Bonnell", "Tunnel Creek") \
53 _(0x06, 0x25, "Westmere", "Arrandale,Clarksdale") \
54 _(0x06, 0x1e, "Nehalem", "Clarksfield,Lynnfield,Jasper Forest") \
55 _(0x06, 0x1d, "Penryn", "Dunnington") \
56 _(0x06, 0x1c, "Bonnell", "Pineview,Silverthorne") \
57 _(0x06, 0x1a, "Nehalem", "Nehalem EP,Bloomfield)") \
58 _(0x06, 0x17, "Penryn", "Yorkfield,Wolfdale,Penryn,Harpertown")
60 #define foreach_aarch64_cpu_uarch \
61 _(0x41, 0xd03, "ARM", "Cortex-A53") \
62 _(0x41, 0xd07, "ARM", "Cortex-A57") \
63 _(0x41, 0xd08, "ARM", "Cortex-A72") \
64 _(0x41, 0xd09, "ARM", "Cortex-A73") \
65 _(0x43, 0x0a1, "Cavium", "ThunderX CN88XX") \
66 _(0x43, 0x0a2, "Cavium", "Octeon TX CN81XX") \
67 _(0x43, 0x0a3, "Cavium", "Octeon TX CN83XX") \
68 _(0x43, 0x0af, "Cavium", "ThunderX2 CN99XX") \
69 _(0x43, 0x0b1, "Cavium", "Octeon TX2 CN98XX") \
70 _(0x43, 0x0b2, "Cavium", "Octeon TX2 CN93XX") \
73 format_cpu_uarch (u8 * s, va_list * args)
76 u32 __attribute__ ((unused)) eax, ebx, ecx, edx;
77 u8 model, family, stepping;
79 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0)
80 return format (s, "unknown (missing cpuid)");
82 model = ((eax >> 4) & 0x0f) | ((eax >> 12) & 0xf0);
83 family = (eax >> 8) & 0x0f;
84 stepping = eax & 0x0f;
86 #define _(f,m,a,c) if ((model == m) && (family == f)) return \
87 format(s, "[0x%x] %s ([0x%02x] %s) stepping 0x%x", f, a, m, c, stepping);
90 return format (s, "unknown (family 0x%02x model 0x%02x)", family, model);
94 unformat_input_t input;
95 u32 implementer, primary_part_number, variant, revision;
97 fd = open ("/proc/cpuinfo", 0);
99 return format (s, "unknown");
101 unformat_init_clib_file (&input, fd);
102 while (unformat_check_input (&input) != UNFORMAT_END_OF_INPUT)
104 if (unformat (&input, "CPU implementer%_: 0x%x", &implementer))
106 else if (unformat (&input, "CPU part%_: 0x%x", &primary_part_number))
108 else if (unformat (&input, "CPU variant%_: 0x%x", &variant))
110 else if (unformat (&input, "CPU revision%_: %u", &revision))
113 unformat_skip_line (&input);
115 unformat_free (&input);
118 /* Note: Cavium starts counting variants from 1 instead of 0 */
119 if (implementer == 0x43)
122 #define _(i,p,a,c) if ((implementer == i) && (primary_part_number == p)) \
123 return format(s, "%s (%s PASS %u.%u)", a, c, variant, revision);
124 foreach_aarch64_cpu_uarch
126 return format (s, "unknown (implementer 0x%02x part 0x%03x PASS %u.%u)",
127 implementer, primary_part_number, variant, revision);
129 #else /* ! __x86_64__ */
130 return format (s, "unknown");
135 format_cpu_model_name (u8 * s, va_list * args)
138 u32 __attribute__ ((unused)) eax, ebx, ecx, edx;
142 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0)
143 return format (s, "unknown (missing cpuid)");
145 __get_cpuid (0x80000000, &eax, &ebx, &ecx, &edx);
146 if (eax < 0x80000004)
147 return format (s, "unknown (missing ext feature)");
149 vec_validate (name, 48);
150 name_u32 = (u32 *) name;
152 __get_cpuid (0x80000002, &eax, &ebx, &ecx, &edx);
158 __get_cpuid (0x80000003, &eax, &ebx, &ecx, &edx);
164 __get_cpuid (0x80000004, &eax, &ebx, &ecx, &edx);
170 s = format (s, "%s", name);
174 #elif defined(__aarch64__)
175 return format (s, "armv8");
176 #else /* ! __x86_64__ */
177 return format (s, "unknown");
182 static inline char const *
183 flag_skip_prefix (char const *flag)
185 if (memcmp (flag, "x86_", sizeof ("x86_") - 1) == 0)
186 return flag + sizeof ("x86_") - 1;
187 if (memcmp (flag, "aarch64_", sizeof ("aarch64_") - 1) == 0)
188 return flag + sizeof ("aarch64_") - 1;
193 format_cpu_flags (u8 * s, va_list * args)
195 #if defined(__x86_64__)
196 #define _(flag, func, reg, bit) \
197 if (clib_cpu_supports_ ## flag()) \
198 s = format (s, "%s ", flag_skip_prefix(#flag));
199 foreach_x86_64_flags return s;
201 #elif defined(__aarch64__)
202 #define _(flag, bit) \
203 if (clib_cpu_supports_ ## flag()) \
204 s = format (s, "%s ", flag_skip_prefix(#flag));
205 foreach_aarch64_flags return s;
207 #else /* ! ! __x86_64__ && ! __aarch64__ */
208 return format (s, "unknown");
215 * fd.io coding-style-patch-verification: ON
218 * eval: (c-set-style "gnu")