2 * Copyright (c) 2015 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
15 #ifndef included_asm_x86_h
16 #define included_asm_x86_h
18 #include <vppinfra/format.h>
29 /* Instruction name. */
32 /* X86 instructions may have up to 3 operands. */
33 x86_insn_operand_t operands[3];
36 #define X86_INSN_FLAG_DEFAULT_64_BIT (1 << 0)
37 #define X86_INSN_FLAG_SET_SSE_GROUP(n) ((n) << 5)
38 #define X86_INSN_FLAG_GET_SSE_GROUP(f) (((f) >> 5) & 0x1f)
39 #define X86_INSN_FLAG_SET_MODRM_REG_GROUP(n) (((n) & 0x3f) << 10)
40 #define X86_INSN_FLAG_GET_MODRM_REG_GROUP(f) (((f) >> 10) & 0x3f)
44 x86_insn_operand_is_valid (x86_insn_t * i, uword o)
46 ASSERT (o < ARRAY_LEN (i->operands));
47 return i->operands[o].code != '_';
50 #define foreach_x86_legacy_prefix \
51 _ (OPERAND_SIZE, 0x66) \
52 _ (ADDRESS_SIZE, 0x67) \
53 _ (SEGMENT_CS, 0x2e) \
54 _ (SEGMENT_DS, 0x3e) \
55 _ (SEGMENT_ES, 0x26) \
56 _ (SEGMENT_FS, 0x64) \
57 _ (SEGMENT_GS, 0x65) \
58 _ (SEGMENT_SS, 0x36) \
63 #define foreach_x86_insn_parse_flag \
64 /* Parse in 32/64-bit mode. */ \
68 /* regs[1/2] is a valid base/index register */ \
72 _ (OPERAND_SIZE_64, 0)
75 #define _(f,o) X86_INSN_FLAG_BIT_##f,
76 foreach_x86_insn_parse_flag
77 foreach_x86_legacy_prefix
79 } x86_insn_parse_flag_bit_t;
82 #define _(f,o) X86_INSN_##f = 1 << X86_INSN_FLAG_BIT_##f,
83 foreach_x86_insn_parse_flag
84 foreach_x86_legacy_prefix
86 } x86_insn_parse_flag_t;
89 /* Registers in instruction.
90 [0] is modrm reg field
95 /* Scale for index register. */
96 u8 log2_index_scale : 2;
97 u8 log2_effective_operand_bytes : 3;
98 u8 log2_effective_address_bytes : 3;
102 /* Parser flags: set of x86_insn_parse_flag_t enums. */
110 u8 * x86_insn_parse (x86_insn_parse_t * p, u8 * code_start);
111 format_function_t format_x86_insn_parse;
113 #endif /* included_asm_x86_h */