Current FD.io production testbeds are built with SUT servers based on
the following processor architectures:
-- Intel Xeon: Skylake Platinum 8180, Cascadelake 6252N, Icelake 8358.
-- Intel Atom: Denverton C3858.
-- Arm: TaiShan 2280, hip07-d05.
+- Intel Xeon: Cascadelake 6252N, Icelake 8358.
+- Intel Atom: Denverton C3858, Snowridge P5362.
+- Arm: TaiShan 2280, hip07-d05, Neoverse N1.
- AMD EPYC: Zen2 7532.
Server SUT performance depends on server and processor type, hence
- DPDK PMD.
- AVF in PMD mode.
- AF_XDP in PMD mode.
+#. 4p25GE: xxv710-DA4 Intel (codename Fortville, FVL)
+ - DPDK PMD.
+ - AVF in PMD mode.
+ - AF_XDP in PMD mode.
+#. 4p25GE: E822-CQDA4 Intel (codename Columbiaville, CVL)
+ - DPDK PMD.
+ - AVF in PMD mode.
#. 2p100GE: cx556a-edat Mellanox ConnectX5
- RDMA_core in PMD mode.
#. 2p100GE: E810-2CQDA2 Intel (codename Columbiaville, CVL)
For more information see :ref:`vpp_test_environment`
and :ref:`dpdk_test_environment`.
+.. _physical_testbeds_2n_zn2:
+
2-Node AMD EPYC Zen2 (2n-zn2)
-----------------------------
All AMD EPYC Zen2 7532 servers run with AMD SMT enabled, doubling the
number of logical cores exposed to Linux.
+.. _physical_testbeds_2n_clx:
+
2-Node Xeon Cascadelake (2n-clx)
--------------------------------
All Intel Xeon Cascadelake servers run with Intel Hyper-Threading enabled,
doubling the number of logical cores exposed to Linux.
+.. _physical_testbeds_2n_icx:
+
2-Node Xeon Icelake (2n-icx)
----------------------------
All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled,
doubling the number of logical cores exposed to Linux.
+.. _physical_testbeds_3n_icx:
+
3-Node Xeon Icelake (3n-icx)
----------------------------
All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled,
doubling the number of logical cores exposed to Linux.
-2-Node Xeon Skylake (2n-skx)
-----------------------------
-
-Four 2n-skx testbeds are in operation in FD.io labs. Each 2n-skx testbed
-is built with two SuperMicro SYS-7049GP-TRT servers, each in turn
-equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 MB
-Cache, 2.50 GHz, 28 cores). 2n-skx physical topology is shown below.
-
-.. only:: latex
-
- .. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_tmp/src/introduction/}}
- \includegraphics[width=0.90\textwidth]{testbed-2n-skx}
- \label{fig:testbed-2n-skx}
- \end{figure}
-
-.. only:: html
-
- .. figure:: testbed-2n-skx.svg
- :alt: testbed-2n-skx
- :align: center
-
-SUT NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: empty, future expansion.
-
-TG NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.)
-
-All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled,
-doubling the number of logical cores exposed to Linux, with 56 logical
-cores and 28 physical cores per processor socket.
-
-3-Node Xeon Skylake (3n-skx)
-----------------------------
-
-Two 3n-skx testbeds are in operation in FD.io labs. Each 3n-skx testbed
-is built with three SuperMicro SYS-7049GP-TRT servers, each in turn
-equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 MB
-Cache, 2.50 GHz, 28 cores). 3n-skx physical topology is shown below.
-
-.. only:: latex
-
- .. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_tmp/src/introduction/}}
- \includegraphics[width=0.90\textwidth]{testbed-3n-skx}
- \label{fig:testbed-3n-skx}
- \end{figure}
-
-.. only:: html
-
- .. figure:: testbed-3n-skx.svg
- :alt: testbed-3n-skx
- :align: center
-
-SUT1 and SUT2 NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: empty, future expansion.
-
-TG NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.)
-
-All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled,
-doubling the number of logical cores exposed to Linux, with 56 logical
-cores and 28 physical cores per processor socket.
+.. _physical_testbeds_2n_dnv:
2-Node Atom Denverton (2n-dnv)
------------------------------
The 2n-dnv testbed is in operation in Intel SH labs.
+.. _physical_testbeds_3n_dnv:
+
3-Node Atom Denverton (3n-dnv)
------------------------------
#. NIC-1: x710-DA4 4p10GE Intel.
+.. _physical_testbeds_3n_alt:
+
+3-Node ARM Altra (3n-alt)
+---------------------------
+
+One 3n-tsh testbed is built with: i) one SuperMicro SYS-740GP-TNRT
+server acting as TG and equipped with two Intel Xeon Icelake Platinum
+8358 processors (80 MB Cache, 2.60 GHz, 32 cores), and ii) one Ampere
+Altra server acting as SUT and equipped with two Q80-30 processors
+(80* ARM Neoverse N1). 3n-alt physical topology is shown below.
+
+.. only:: latex
+
+ .. raw:: latex
+
+ \begin{figure}[H]
+ \centering
+ \graphicspath{{../_tmp/src/introduction/}}
+ \includegraphics[width=0.90\textwidth]{testbed-3n-alt}
+ \label{fig:testbed-3n-alt}
+ \end{figure}
+
+.. only:: html
+
+ .. figure:: testbed-3n-alt.svg
+ :alt: testbed-3n-alt
+ :align: center
+
+SUT1 and SUT2 NICs:
+
+#. NIC-1: xl710-QDA2-2p40GE Intel.
+
+TG NICs:
+
+#. NIC-1: xxv710-DA2-2p25GE Intel.
+#. NIC-2: xl710-QDA2-2p40GE Intel.
+#. NIC-3: e810-XXVDA4-4p25GE Intel.
+#. NIC-4: e810-2CQDA2-2p100GE Intel.
+
+.. _physical_testbeds_3n_tsh:
+
3-Node ARM TaiShan (3n-tsh)
---------------------------
#. NIC-2: xxv710-DA2 2p25GE Intel.
#. NIC-3: xl710-QDA2 2p40GE Intel.
+.. _physical_testbeds_2n_tx2:
+
2-Node ARM ThunderX2 (2n-tx2)
-----------------------------
TG NICs:
#. NIC-1: xl710-QDA2 2p40GE Intel.
+
+.. _physical_testbeds_3n_snr:
+
+3-Node Atom Snowridge (3n-snr)
+------------------------------
+
+One 3n-snr testbed is built with: i) one SuperMicro SYS-740GP-TNRT
+server acting as TG and equipped with two Intel Xeon Icelake Platinum
+8358 processors (48 MB Cache, 2.60 GHz, 32 cores), and ii) SUT equipped with
+one Intel Atom P5362 processor (27 MB Cache, 2.20 GHz, 24 cores). 3n-snr
+physical topology is shown below.
+
+.. only:: latex
+
+ .. raw:: latex
+
+ \begin{figure}[H]
+ \centering
+ \graphicspath{{../_tmp/src/introduction/}}
+ \includegraphics[width=0.90\textwidth]{testbed-3n-snr}
+ \label{fig:testbed-3n-snr}
+ \end{figure}
+
+.. only:: html
+
+ .. figure:: testbed-3n-snr.svg
+ :alt: testbed-3n-snr
+ :align: center
+
+SUT1 and SUT2 NICs:
+
+#. NIC-1: e822cq-DA4 4p25GE fiber Intel.
+
+TG NICs:
+
+#. NIC-1: e810xxv-DA4 4p25GE Intel.