physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls1810>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls1901>`_.
.. toctree::
+ ip4_tunnels-3n-skx-x710
+
+..
ip4_tunnels-3n-hsw-x520
ip4_tunnels-3n-hsw-x710
- ip4_tunnels-3n-skx-x710