TREX_LIMIT_MEMORY = get_int_from_env(u"TREX_LIMIT_MEMORY", 8192)
# TRex number of cores
- TREX_CORE_COUNT = get_int_from_env(u"TREX_CORE_COUNT", 8)
+ TREX_CORE_COUNT = get_int_from_env(u"TREX_CORE_COUNT", 16)
# TRex set number of RX/TX descriptors
# Set to 0 to use default values
u"Intel-X710": 10000000000,
u"Intel-XL710": 24500000000,
u"Intel-XXV710": 24500000000,
+ u"Intel-E810XXV": 24500000000,
u"Intel-E810CQ": 100000000000,
u"Mellanox-CX556A": 100000000000,
u"Amazon-Nitro-50G": 10000000000,
u"Intel-X710": 14880952,
u"Intel-XL710": 18750000,
u"Intel-XXV710": 18750000,
+ u"Intel-E810XXV": 29000000,
u"Intel-E810CQ": 58500000,
u"Mellanox-CX556A": 148809523,
u"Amazon-Nitro-50G": 1200000,
u"Intel-X710": u"10ge2p1x710",
u"Intel-XL710": u"40ge2p1xl710",
u"Intel-XXV710": u"25ge2p1xxv710",
+ u"Intel-E810XXV": u"25ge2p1e810xxv",
u"Intel-E810CQ": u"100ge2p1e810cq",
u"Amazon-Nitro-50G": u"50ge1p1ena",
u"Mellanox-CX556A": u"100ge2p1cx556a",
u"10ge2p1x710": u"x710",
u"40ge2p1xl710": u"xl710",
u"25ge2p1xxv710": u"xxv710",
+ u"25ge2p1e810xxv": u"e810xxv",
u"100ge2p1e810cq": u"e810cq",
u"50ge1p1ena": u"ena",
u"100ge2p1cx556a": u"cx556a",
u"Intel-X710": [u"vfio-pci", u"avf", u"af_xdp"],
u"Intel-XL710": [u"vfio-pci", u"avf", u"af_xdp"],
u"Intel-XXV710": [u"vfio-pci", u"avf", u"af_xdp"],
+ u"Intel-E810XXV": [u"vfio-pci", u"avf", u"af_xdp"],
u"Intel-E810CQ": [u"vfio-pci", u"avf", u"af_xdp"],
u"Amazon-Nitro-50G": [u"vfio-pci"],
u"Mellanox-CX556A": [u"rdma-core", u"af_xdp"],
u"Intel-X710": [u"vfio-pci"],
u"Intel-XL710": [u"vfio-pci"],
u"Intel-XXV710": [u"vfio-pci"],
+ u"Intel-E810XXV": [u"vfio-pci"],
u"Intel-E810CQ": [u"vfio-pci"],
u"Amazon-Nitro-50G": [u"vfio-pci"],
u"Mellanox-CX556A": [u"mlx5_core"],