+ | Package C State Control |Limit the lowest package |
+ | |level C-State to |
+ | Package C State [C0/C1 state] |processors. Lower package |
+ | |C-State lower processor |
+ | |power consumption upon idle. |
+```
+
+##### CPU T State Control
+
+```
+ | CPU T State Control |Enable/Disable CPU |
+ | |throttling by OS. |
+ | Software Controlled T-States [Disable] |Throttling reduces power |
+ | |consumption |
+```
+
+#### Chipset Configuration
+
+```
+ | WARNING: Setting wrong values in below sections may cause |North Bridge Parameters |
+ | system to malfunction. | |
+ |> North Bridge | |
+ |> South Bridge | |
+```
+
+##### North Bridge
+
+```
+ |> UPI Configuration |Displays and provides |
+ |> Memory Configuration |option to change the UPI |
+ |> IIO Configuration |Settings |
+```
+
+##### UPI Configuration
+
+```
+ | UPI Configuration |Use this feature to select |
+ | -------------------------------------------------- |the degrading precedence |
+ | Number of CPU 2 |option for Ultra Path |
+ | Number of Active UPI Link 3 |Interconnect connections. |
+ | Current UPI Link Speed Fast |Select Topology Precedent |
+ | Current UPI Link Frequency 10.4 GT/s |to degrade UPI features if |
+ | UPI Global MMIO Low Base / Limit 90000000 / FBFFFFFF |system options are in |
+ | UPI Global MMIO High Base / Limit 0000000000000000 / |conflict. Select Feature |
+ | 00000000FFFFFFFF |Precedent to degrade UPI |
+ | UPI Pci-e Configuration Base / Size 80000000 / 10000000 |topology if system options |
+ | Degrade Precedence [Topology Precedence] |are in conflict. |
+ | Link L0p Enable [Disable] | |
+ | Link L1 Enable [Disable] | |
+ | IO Directory Cache (IODC) [Auto] | |
+ | SNC [Disable] | |
+ | XPT Prefetch [Disable] | |
+ | KTI Prefetch [Enable] |-----------------------------|
+ | Local/Remote Threshold [Auto] |><: Select Screen |
+ | Stale AtoS [Auto] |^v: Select Item |
+ | LLC Dead Line Alloc [Enable] |Enter: Select |
+ | Isoc Mode [Auto] |+/-: Change Opt. |
+```
+
+##### Memory Configuration
+
+```
+ | |Select POR to enforce POR |
+ | -------------------------------------------------- |restrictions for DDR4 |
+ | Integrated Memory Controller (iMC) |frequency and voltage |
+ | -------------------------------------------------- |programming |
+ | | |
+ | Enforce POR [POR] | |
+ | PPR Type [Hard PPR] | |
+ | Enhanced PPR [Disable] | |
+ | Operation Mode [Test and Repair] | |
+ | Memory Frequency [2933] | |
+ | Data Scrambling for DDR4 [Auto] | |
+ | tCCD_L Relaxation [Auto] | |
+ | tRWSR Relaxation [Disable] | |
+ | tRFC Optimization for 16Gb Based DIMM [Force 550ns] | |
+ | 2x Refresh [Auto] | |
+ | Page Policy [Auto] | |
+ | IMC Interleaving [2-way Interleave] |-----------------------------|
+ |> Memory Topology |><: Select Screen |
+ |> Memory RAS Configuration |^v: Select Item |
+```
+
+##### IIO Configuration
+
+```
+ | IIO Configuration |Expose IIO DFX devices and |
+ | -------------------------------------------------- |other CPU devices like PMON |
+ | | |
+ | EV DFX Features [Disable] | |
+ |> CPU1 Configuration | |
+ |> CPU2 Configuration | |
+ |> IOAT Configuration | |
+ |> Intel. VT for Directed I/O (VT-d) | |
+ |> Intel. VMD technology | |
+ | | |
+ | IIO-PCIE Express Global Options | |
+ | ======================================== | |
+ | PCI-E Completion Timeout Disable [No] | |
+```
+
+##### CPU1 Configuration
+
+```
+ | IOU0 (IIO PCIe Br1) [Auto] |Selects PCIe port |
+ | IOU1 (IIO PCIe Br2) [Auto] |Bifurcation for selected |
+ | IOU2 (IIO PCIe Br3) [Auto] |slot(s) |
+ |> CPU1 SLOT2 PCI-E 3.0 X16 | |
+ |> CPU1 SLOT4 PCI-E 3.0 X16 | |
+ |> CPU1 SLOT9 PCI-E 3.0 X16 | |
+```
+
+##### CPU2 Configuration
+
+```
+ | IOU0 (IIO PCIe Br1) [Auto] |Selects PCIe port |
+ | IOU1 (IIO PCIe Br2) [Auto] |Bifurcation for selected |
+ | IOU2 (IIO PCIe Br3) [Auto] |slot(s) |
+ |> CPU2 SLOT6 PCI-E 3.0 X16 | |
+ |> CPU2 SLOT8 PCI-E 3.0 X16 | |
+ |> CPU2 SLOT10 PCI-E 3.0 X16 | |
+```
+
+#### South Bridge
+
+```
+ | |Enables Legacy USB support. |
+ | USB Module Version 21 |AUTO option disables legacy |
+ | |support if no USB devices |
+ | USB Devices: |are connected. DISABLE |
+ | 1 Keyboard, 1 Mouse, 1 Hub |option will keep USB |
+ | |devices available only for |
+ | Legacy USB Support [Enabled] |EFI applications. |
+ | XHCI Hand-off [Enabled] | |
+ | Port 60/64 Emulation [Enabled] | |
+ | PCIe PLL SSC [Disable] | |
+ | Real USB Wake Up [Enabled] | |
+ | Front USB Wake Up [Enabled] | |
+ | | |
+ | Azalia [Auto] | |
+ | Azalia PME Enable [Disabled] | |
+```
+
+### PCIe/PCI/PnP Configuration
+
+```
+ | PCI Bus Driver Version A5.01.18 ^|Enables or Disables 64bit |
+ | *|capable Devices to be |
+ | PCI Devices Common Settings: *|Decoded in Above 4G Address |
+ | Above 4G Decoding [Enabled] *|Space (Only if System |
+ | SR-IOV Support [Enabled] *|Supports 64 bit PCI |
+ | ARI Support [Enabled] *|Decoding). |
+ | MMIO High Base [56T] *| |
+ | MMIO High Granularity Size [256G] *| |
+ | Maximum Read Request [Auto] *| |
+ | MMCFG Base [2G] *| |
+ | NVMe Firmware Source [Vendor Defined *| |
+ | Firmware] *| |
+ | VGA Priority [Onboard] *| |
+ | CPU1 SLOT2 PCI-E 3.0 X16 OPROM [Legacy] *| |
+ | CPU1 SLOT4 PCI-E 3.0 X16 OPROM [Legacy] *| |
+ | CPU2 SLOT6 PCI-E 3.0 X16 OPROM [Legacy] *| |
+ | CPU2 SLOT8 PCI-E 3.0 X16 OPROM [Legacy] *|-----------------------------|
+ | CPU1 SLOT9 PCI-E 3.0 X16 OPROM [Legacy] *|><: Select Screen |
+ | CPU2 SLOT10 PCI-E 3.0 X16 OPROM [Legacy] *|^v: Select Item |
+ | CPU2 SLOT11 PCI-E 3.0 X4(IN X8) OPROM [Legacy] *|Enter: Select |
+ | M.2 CONNECTOR OPROM [Legacy] *|+/-: Change Opt. |
+ | Bus Master Enable [Enabled] +|F1: General Help |
+ | Onboard LAN1 Option ROM [Legacy] +|F2: Previous Values |
+ | Onboard LAN2 Option ROM [Disabled] +|F3: Optimized Defaults |
+ | Onboard Video Option ROM [Legacy] v|F4: Save & Exit |
+ |> Network Stack Configuration | |
+```
+
+### ACPI Settings
+
+```
+ | ACPI Settings |Enable or Disable Non |
+ | |uniform Memory Access |
+ | NUMA [Enabled] |(NUMA). |
+ | WHEA Support [Enabled] | |
+ | High Precision Event Timer [Enabled] | |
+```
+
+## Xeon CLX Server BIOS Configuration - DUT
+
+### Boot Feature
+
+```
+ | Quiet Boot [Enabled] |Boot option |