CSIT-1183: Process the new and the old TC names

[csit.git] / docs / report / dpdk_performance_tests / overview.rst

diff --git a/docs/report/dpdk_performance_tests/overview.rst b/docs/report/dpdk_performance_tests/overview.rst
index a61d853..56d0e1e 100644 (file)
--- a/docs/report/dpdk_performance_tests/overview.rst
+++ b/docs/report/dpdk_performance_tests/overview.rst
@@ -8,23 +8,23 @@ CSIT DPDK performance tests are executed on physical baremetal servers hosted
 by :abbr:`LF (Linux Foundation)` FD.io project. Testbed physical topology is
 shown in the figure below.::
 
 by :abbr:`LF (Linux Foundation)` FD.io project. Testbed physical topology is
 shown in the figure below.::
 

-    +------------------------+           +------------------------+
-    |                        |           |                        |
-    |  +------------------+  |           |  +------------------+  |
-    |  |                  |  |           |  |                  |  |
-    |  |                  <----------------->                  |  |
-    |  |       DUT1       |  |           |  |       DUT2       |  |
-    |  +--^---------------+  |           |  +---------------^--+  |
-    |     |                  |           |                  |     |
-    |     |            SUT1  |           |  SUT2            |     |
-    +------------------------+           +------------------^-----+
-          |                                                 |
-          |                                                 |
-          |                  +-----------+                  |
-          |                  |           |                  |
-          +------------------>    TG     <------------------+
-                             |           |
-                             +-----------+
+        +------------------------+           +------------------------+
+        |                        |           |                        |
+        |  +------------------+  |           |  +------------------+  |
+        |  |                  |  |           |  |                  |  |
+        |  |                  <----------------->                  |  |
+        |  |       DUT1       |  |           |  |       DUT2       |  |
+        |  +--^---------------+  |           |  +---------------^--+  |
+        |     |                  |           |                  |     |
+        |     |            SUT1  |           |  SUT2            |     |
+        +------------------------+           +------------------^-----+
+              |                                                 |
+              |                                                 |
+              |                  +-----------+                  |
+              |                  |           |                  |
+              +------------------>    TG     <------------------+
+                                 |           |
+                                 +-----------+

 
 SUT1 and SUT2 are two System Under Test servers (Cisco UCS C240, each with two
 Intel XEON CPUs), TG is a Traffic Generator (TG, another Cisco UCS C240, with
 
 SUT1 and SUT2 are two System Under Test servers (Cisco UCS C240, each with two
 Intel XEON CPUs), TG is a Traffic Generator (TG, another Cisco UCS C240, with


@@ -116,11 +116,10 @@ Performance Tests Naming
 ------------------------
 
 CSIT |release| follows a common structured naming convention for all performance
 ------------------------
 
 CSIT |release| follows a common structured naming convention for all performance

-and system functional tests, introduced in CSIT |release-1|.
+and system functional tests, introduced in CSIT rls1701.

 
 The naming should be intuitive for majority of the tests. Complete description
 
 The naming should be intuitive for majority of the tests. Complete description

-of CSIT test naming convention is provided on `CSIT test naming wiki
-<https://wiki.fd.io/view/CSIT/csit-test-naming>`_.
+of CSIT test naming convention is provided on :ref:`csit_test_naming`.

 
 Methodology: Multi-Core and Multi-Threading
 -------------------------------------------
 
 Methodology: Multi-Core and Multi-Threading
 -------------------------------------------