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Report: Hide DMM
[csit.git]
/
docs
/
report
/
introduction
/
test_environment_sut_calib_hsw.rst
diff --git
a/docs/report/introduction/test_environment_sut_calib_hsw.rst
b/docs/report/introduction/test_environment_sut_calib_hsw.rst
index
dc2a53c
..
1dedcd8
100644
(file)
--- a/
docs/report/introduction/test_environment_sut_calib_hsw.rst
+++ b/
docs/report/introduction/test_environment_sut_calib_hsw.rst
@@
-3,13
+3,11
@@
Calibration Data - Haswell
Following sections include sample calibration data measured on t1-sut1
server running in one of the Intel Xeon Haswell testbeds as specified in
Following sections include sample calibration data measured on t1-sut1
server running in one of the Intel Xeon Haswell testbeds as specified in
-`CSIT/Testbeds: Xeon Hsw, VIRL
-<https://wiki.fd.io/view/CSIT/Testbeds:_Xeon_Hsw,_VIRL.#FD.io_CSIT_testbeds_-_Xeon_Haswell.2C_VIRL>`_.
+`FD.io CSIT Testbeds - Xeon Haswell`_.
Calibration data obtained from all other servers in Haswell testbeds
shows the same or similar values.
Calibration data obtained from all other servers in Haswell testbeds
shows the same or similar values.
-
Linux cmdline
~~~~~~~~~~~~~
Linux cmdline
~~~~~~~~~~~~~
@@
-28,7
+26,7
@@
Linux uname
Linux t1-tg1 4.15.0-36-generic #39-Ubuntu SMP Mon Sep 24 16:19:09 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux
Linux t1-tg1 4.15.0-36-generic #39-Ubuntu SMP Mon Sep 24 16:19:09 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux
-System-level
core j
itter
+System-level
Core J
itter
~~~~~~~~~~~~~~~~~~~~~~~~
::
~~~~~~~~~~~~~~~~~~~~~~~~
::
@@
-82,7
+80,7
@@
System-level core jitter
160024 172452 12428 160028 160024 188236 933429248 3205440636 30
160024 172452 12428 160028 160024 188236 933429248 3205440636 30
-Memory
b
andwidth
+Memory
B
andwidth
~~~~~~~~~~~~~~~~
::
~~~~~~~~~~~~~~~~
::
@@
-139,7
+137,7
@@
Memory bandwidth
Stream-triad like: 105608.10
Stream-triad like: 105608.10
-Memory
l
atency
+Memory
L
atency
~~~~~~~~~~~~~~
::
~~~~~~~~~~~~~~
::
@@
-199,7
+197,7
@@
Memory latency
20000 100.77 1542.5
20000 100.77 1542.5
-L1/L2/LLC
l
atency
+L1/L2/LLC
L
atency
~~~~~~~~~~~~~~~~~
::
~~~~~~~~~~~~~~~~~
::
@@
-221,3
+219,5
@@
L1/L2/LLC latency
Writer Numa Node 0 1
0 - 107.7
1 106.6 -
Writer Numa Node 0 1
0 - 107.7
1 106.6 -
+
+.. include:: ../introduction/test_environment_sut_meltspec_hsw.rst