Report: Disable pdf vervion

[csit.git] / docs / report / vpp_performance_tests / csit_release_notes.rst

diff --git a/docs/report/vpp_performance_tests/csit_release_notes.rst b/docs/report/vpp_performance_tests/csit_release_notes.rst
index f79e331..e018680 100644 (file)
--- a/docs/report/vpp_performance_tests/csit_release_notes.rst
+++ b/docs/report/vpp_performance_tests/csit_release_notes.rst
@@ -23,10 +23,14 @@ Changes in |csit-release|
      core layer (driver/interface awareness) and generated by suite
      generator (Intel Fortville NICs only).
 
      core layer (driver/interface awareness) and generated by suite
      generator (Intel Fortville NICs only).
 

-   - **Hoststack TCP/IP tests**: Major refactor of VPP Hoststack TCP/IP
+   - **Hoststack tests**: Major refactor of VPP Hoststack TCP/IP

      performance tests using WRK generator talking to the VPP HTTP
      static server plugin measuring connections per second and
      performance tests using WRK generator talking to the VPP HTTP
      static server plugin measuring connections per second and

-     requests per second. Added iperf3 tests with LDPreload.
+     requests per second. Added new iperf3 with LDPreload tests,
+     iperf3/LDPreload tests with packet loss induced via the VPP NSIM
+     (Network Simulator) plugin, and QUIC/UDP/IP transport tests.
+     All of the new tests measure goodput through the VPP Hoststack
+     from client to server.

 
    - **Latency HDRHistogram**: Added High Dynamic Range Histogram
      latency measurements based on the new capability in TRex traffic
 
    - **Latency HDRHistogram**: Added High Dynamic Range Histogram
      latency measurements based on the new capability in TRex traffic


@@ -43,18 +47,6 @@ Changes in |csit-release|
    - **Load Balancer tests**: Added VPP performance tests for Maglev,
      L3DSR (Direct Server Return), Layer 4 Load Balancing NAT Mode.
 
    - **Load Balancer tests**: Added VPP performance tests for Maglev,
      L3DSR (Direct Server Return), Layer 4 Load Balancing NAT Mode.
 

-..
-    // Alternative Note for 1st Bullet when bad microcode Skx, Clx results are published
-    - **Intel Xeon 2n-skx, 3n-skx and 2n-clx testbeds**: VPP performance
-      test data is included in this report version, but it shows lower
-      performance and behaviour inconsistency of these systems
-      following the upgrade of processor microcode packages (skx ucode
-      0x2000064, clx ucode 0x500002c) as part of updating Ubuntu 18.04
-      LTS kernel version. Tested VPP and DPDK applications (L3fwd) are
-      affected. Skx and Clx test data will be corrected in subsequent
-      maintenance report version(s) once the issue is resolved. See
-      :ref:`vpp_known_issues`.
-

 #. TEST FRAMEWORK
 
    - **CSIT Python3 support**: Full migration of CSIT from Python2.7 to
 #. TEST FRAMEWORK
 
    - **CSIT Python3 support**: Full migration of CSIT from Python2.7 to


@@ -76,6 +68,17 @@ Changes in |csit-release|
      removal of redundant RF keywords and aligning of suite/test
      setup/teardowns.
 
      removal of redundant RF keywords and aligning of suite/test
      setup/teardowns.
 

+#. TEST ENVIRONMENT
+
+   - **TRex Fortville NIC Performance**: Received FVL fix from Intel
+     resolving TRex low throughput issue. TRex per FVL NIC throughput
+     increased from ~27 Mpps to the nominal ~37 Mpps. For detail see
+     `CSIT-1503 <https://jira.fd.io/browse/CSIT-1503>`_ and `TRex-519
+     <https://trex-tgn.cisco.com/youtrack/issue/trex-519>`_].
+
+   - **New Intel Xeon Cascadelake Testbeds**: Added performance tests
+     for 2-Node-Cascadelake (2n-clx) testbeds with x710, xxv710 and
+     mcx556a-edat NIC cards.

 
 #. PRESENTATION AND ANALYTICS LAYER
 
 
 #. PRESENTATION AND ANALYTICS LAYER
 


@@ -88,6 +91,18 @@ Changes in |csit-release|
      background packet loads based on TRex latency hdrhistogram
      measurements.
 
      background packet loads based on TRex latency hdrhistogram
      measurements.
 

+..
+    // Alternative Note for 1st Bullet when bad microcode Skx, Clx results are published
+    - **Intel Xeon 2n-skx, 3n-skx and 2n-clx testbeds**: VPP performance
+      test data is included in this report version, but it shows lower
+      performance and behaviour inconsistency of these systems
+      following the upgrade of processor microcode packages (skx ucode
+      0x2000064, clx ucode 0x500002c) as part of updating Ubuntu 18.04
+      LTS kernel version. Tested VPP and DPDK applications (L3fwd) are
+      affected. Skx and Clx test data will be corrected in subsequent
+      maintenance report version(s) once the issue is resolved. See
+      :ref:`vpp_known_issues`.
+

 .. raw:: latex
 
     \clearpage
 .. raw:: latex
 
     \clearpage


@@ -130,4 +145,3 @@ List of known issues in |csit-release| for VPP performance tests:
 |    | <https://jira.fd.io/browse/CSIT-1675>`_ | the upgrade to the latest Ubuntu 18.04 LTS kernel version (4.15.0-72-generic) and associated microcode    |
 |    |                                         | packages (skx ucode 0x2000064, clx ucode 0x500002c). VPP as well as DPDK L3fwd tests are affected.        |
 +----+-----------------------------------------+-----------------------------------------------------------------------------------------------------------+
 |    | <https://jira.fd.io/browse/CSIT-1675>`_ | the upgrade to the latest Ubuntu 18.04 LTS kernel version (4.15.0-72-generic) and associated microcode    |
 |    |                                         | packages (skx ucode 0x2000064, clx ucode 0x500002c). VPP as well as DPDK L3fwd tests are affected.        |
 +----+-----------------------------------------+-----------------------------------------------------------------------------------------------------------+

-