Report 1904.2: Configuration

[csit.git] / docs / report / vpp_performance_tests / packet_latency_graphs / ipsec.rst

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst
index 994f0fc..75f1291 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst
@@ -16,8 +16,8 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s)
 placement.
 
 CSIT source code for the test cases used for plots can be found in
 placement.
 
 CSIT source code for the test cases used for plots can be found in

-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1810>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1901>`_.

 
 .. toctree::
 
 
 .. toctree::
 

-    ipsec-3n-hsw-xl710
+    ipsec-3n-skx-x710