-
-.. raw:: latex
-
- \clearpage
-
-L2 Ethernet Switching
-=====================
-
-This section includes summary graphs of VPP Phy-to-Phy packet latency
-with L2 Ethernet switching measured at 100% of discovered NDR throughput
-rate. Latency is reported for VPP running in multiple configurations of
-VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
-physical CPU core(s) placement.
-
-CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls2001>`_.
-
-.. toctree::
-
- l2-2n-skx-xxv710
- l2-2n-skx-x710
- l2-3n-skx-xxv710
- l2-3n-skx-x710
- l2-2n-clx-xxv710
- l2-2n-clx-x710
- l2-2n-clx-cx556a
- l2-3n-hsw-xl710
- l2-3n-tsh-x520