-
-.. raw:: latex
-
- \clearpage
-
-L2 Ethernet Switching
-=====================
-
-Following sections include Throughput Speedup Analysis for VPP multi-
-core multi-thread configurations with no Hyper-Threading, specifically
-for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput
-results are used as a reference for reported speedup ratio. Input data
-used for the graphs comes from Phy-to-Phy 64B performance tests with VPP
-L2 Ethernet switching, including NDR throughput (zero packet loss) and
-PDR throughput (<0.5% packet loss).
-
-CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls2110>`_.
-
-.. toctree::
-
- l2-2n-skx-xxv710
- l2-2n-skx-x710
- l2-3n-skx-xxv710
- l2-3n-skx-x710
- l2-2n-clx-xxv710
- l2-2n-clx-x710
- l2-2n-clx-cx556a
- l2-2n-icx-e810cq
- l2-3n-icx-e810cq
- l2-2n-zn2-xxv710
- l2-2n-zn2-x710
- l2-2n-zn2-cx556a
- l2-3n-tsh-x520
- l2-2n-tx2-xl710
- l2-2n-dnv-x553
- l2-3n-dnv-x553