Report: Add mlx5 latency

[csit.git] / docs / report / vpp_performance_tests / packet_throughput_graphs / ip6.rst

diff --git a/docs/report/vpp_performance_tests/packet_throughput_graphs/ip6.rst b/docs/report/vpp_performance_tests/packet_throughput_graphs/ip6.rst
index e009724..fb8bdc7 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_throughput_graphs/ip6.rst
+++ b/docs/report/vpp_performance_tests/packet_throughput_graphs/ip6.rst
@@ -13,7 +13,7 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP
 data plane thread(s), and their physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip6?h=rls2206>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip6?h=rls2210>`_.
 
 .. toctree::
 
@@ -29,7 +29,5 @@ CSIT source code for the test cases used for plots can be found in
     ip6-3n-alt-xl710
     ip6-3n-tsh-x520
     ip6-2n-tx2-xl710
-    ip6-2n-dnv-x553
-    ip6-3n-dnv-x553
     ip6-3n-snr-e822cq
     ip6-2n-aws-nitro50g