data plane thread(s), and their physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls2009>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls2302>`_.
.. toctree::
- nat44-2n-clx-xxv710
- nat44-2n-skx-xxv710
+ nat44-det-bidir
+ nat44-ed-unidir
+ nat44-ed-udp-cps
+ nat44-ed-tcp-cps
+ nat44-ed-udp-tput
+ nat44-ed-tcp-tput