-Container memif Connections
-===========================
+
+.. raw:: latex
+
+ \clearpage
+
+LXC/DRC Container Memif
+=======================
Following sections include Throughput Speedup Analysis for VPP multi-
core multi-thread configurations with no Hyper-Threading, specifically
running in multiple configurations of VPP worker thread(s), a.k.a. VPP
data plane thread(s), and their physical CPU core(s) placement.
-NDR Throughput
---------------
-
-VPP NDR 64B packet throughput speedup ratio is presented in the graphs
-below for 10ge2p1x520 network interface card.
-
-NIC 10ge2p1x520
-~~~~~~~~~~~~~~~
-
-.. raw:: html
-
- <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/10ge2p1x520-64B-container-memif-tsa-ndrdisc.html"></iframe>
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-container-memif-tsa-ndrdisc}
- \label{fig:10ge2p1x520-64B-container-memif-tsa-ndrdisc}
- \end{figure}
-
-*Figure 1. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching (base).*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1804>`_.
-
-PDR Throughput
---------------
-
-VPP PDR 64B packet throughput speedup ratio is presented in the graphs
-below for 10ge2p1x520 network interface card.
-
-NIC 10ge2p1x520
-~~~~~~~~~~~~~~~
-
-.. raw:: html
-
- <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/10ge2p1x520-64B-container-memif-tsa-pdrdisc.html"></iframe>
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-container-memif-tsa-pdrdisc}
- \label{fig:10ge2p1x520-64B-container-memif-tsa-pdrdisc}
- \end{figure}
+CSIT source code for the test cases used for plots can be found in
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1908>`_.
-*Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-PDR Throughput for Phy-to-Phy L2 Ethernet Switching (base).*
+.. toctree::
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1804>`_.
+ container_memif-2n-skx-xxv710
+ container_memif-3n-skx-xxv710
+ container_memif-3n-tsh-x520