Report: Add mlx5 tests

[csit.git] / docs / report / vpp_performance_tests / throughput_speedup_multi_core / ip4_tunnels.rst

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst
index 33b77e6..71c42a6 100644 (file)
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst
@@ -15,7 +15,7 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP
 data plane thread(s), and their physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls2206>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls2210>`_.
 
 .. toctree::
 
@@ -26,5 +26,4 @@ CSIT source code for the test cases used for plots can be found in
     ip4_tunnels-2n-zn2-xxv710
     ip4_tunnels-3n-alt-xl710
     ip4_tunnels-3n-tsh-x520
-    ip4_tunnels-3n-dnv-x553
     ip4_tunnels-3n-snr-e822cq