feat(core): Adjust T-Rex for external topologies

[csit.git] / docs / report / vpp_performance_tests / throughput_speedup_multi_core / vts.rst

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst
deleted file mode 100644 (file)
index 7b99ac9..0000000
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst
+++ /dev/null
@@ -1,22 +0,0 @@
-
-.. raw:: latex
-
-    \clearpage
-
-VTS
-===
-
-Following sections include Throughput Speedup Analysis for VPP multi-
-core multi-thread configurations with no Hyper-Threading, specifically
-for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput
-results are used as a reference for reported speedup ratio. Input data
-used for the graphs comes from Phy-to-Phy 64B performance tests with
-VM vhost-user, including NDR throughput (zero packet loss) and
-PDR throughput (<0.5% packet loss).
-
-CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls1901>`_.
-
-.. toctree::
-
-    vts-3n-hsw-x520