New upstream version 18.11.2

[deb_dpdk.git] / drivers / net / mlx5 / mlx5.c

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index ed1fcfc..d91d55b 100644 (file)
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -54,6 +54,9 @@
 /* Device parameter to enable RX completion entry padding to 128B. */
 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
 
+/* Device parameter to enable padding Rx packet to cacheline size. */
+#define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
+
 /* Device parameter to enable Multi-Packet Rx queue. */
 #define MLX5_RX_MPRQ_EN "mprq_en"
 
@@ -154,9 +157,10 @@ mlx5_prepare_shared_data(void)
                if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
                        LIST_INIT(&mlx5_shared_data->mem_event_cb_list);
                        rte_rwlock_init(&mlx5_shared_data->mem_event_rwlock);
+                       rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
+                                                       mlx5_mr_mem_event_cb,
+                                                       NULL);
                }
-               rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
-                                               mlx5_mr_mem_event_cb, NULL);
        }
        rte_spinlock_unlock(&mlx5_shared_data_lock);
 }
@@ -197,7 +201,7 @@ mlx5_getenv_int(const char *name)
 static void *
 mlx5_alloc_verbs_buf(size_t size, void *data)
 {
-       struct priv *priv = data;
+       struct mlx5_priv *priv = data;
        void *ret;
        size_t alignment = sysconf(_SC_PAGESIZE);
        unsigned int socket = SOCKET_ID_ANY;
@@ -245,7 +249,7 @@ mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 static void
 mlx5_dev_close(struct rte_eth_dev *dev)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        unsigned int i;
        int ret;
 
@@ -332,7 +336,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
 
                i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
                while (i--) {
-                       struct priv *opriv =
+                       struct mlx5_priv *opriv =
                                rte_eth_devices[port_id[i]].data->dev_private;
 
                        if (!opriv ||
@@ -346,11 +350,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
        }
        memset(priv, 0, sizeof(*priv));
        priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
-       /*
-        * flag to rte_eth_dev_close() that it should release the port resources
-        * (calling rte_eth_dev_release_port()) in addition to closing it.
-        */
-       dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
        /*
         * Reset mac_addrs to NULL such that it is not freed as part of
         * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
@@ -491,6 +490,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
                config->cqe_comp = !!tmp;
        } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
                config->cqe_pad = !!tmp;
+       } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
+               config->hw_padding = !!tmp;
        } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
                config->mprq.enabled = !!tmp;
        } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
@@ -546,6 +547,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
        const char **params = (const char *[]){
                MLX5_RXQ_CQE_COMP_EN,
                MLX5_RXQ_CQE_PAD_EN,
+               MLX5_RXQ_PKT_PAD_EN,
                MLX5_RX_MPRQ_EN,
                MLX5_RX_MPRQ_LOG_STRIDE_NUM,
                MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
@@ -629,7 +631,7 @@ find_lower_va_bound(const struct rte_memseg_list *msl,
 static int
 mlx5_uar_init_primary(struct rte_eth_dev *dev)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        void *addr = (void *)0;
 
        if (uar_base) { /* UAR address space mapped. */
@@ -675,7 +677,7 @@ mlx5_uar_init_primary(struct rte_eth_dev *dev)
 static int
 mlx5_uar_init_secondary(struct rte_eth_dev *dev)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        void *addr;
 
        assert(priv->uar_base);
@@ -738,8 +740,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
        struct ibv_pd *pd = NULL;
        struct mlx5dv_context dv_attr = { .comp_mask = 0 };
        struct rte_eth_dev *eth_dev = NULL;
-       struct priv *priv = NULL;
+       struct mlx5_priv *priv = NULL;
        int err = 0;
+       unsigned int hw_padding = 0;
        unsigned int mps;
        unsigned int cqe_comp;
        unsigned int cqe_pad = 0;
@@ -999,7 +1002,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 
                i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
                while (i--) {
-                       const struct priv *opriv =
+                       const struct mlx5_priv *opriv =
                                rte_eth_devices[port_id[i]].data->dev_private;
 
                        if (!opriv ||
@@ -1058,11 +1061,18 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
                                 IBV_RAW_PACKET_CAP_SCATTER_FCS);
        DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
                (config.hw_fcs_strip ? "" : "not "));
-#ifdef HAVE_IBV_WQ_FLAG_RX_END_PADDING
-       config.hw_padding = !!attr.rx_pad_end_addr_align;
+#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
+       hw_padding = !!attr.rx_pad_end_addr_align;
+#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
+       hw_padding = !!(attr.device_cap_flags_ex &
+                       IBV_DEVICE_PCI_WRITE_END_PADDING);
 #endif
-       DRV_LOG(DEBUG, "hardware Rx end alignment padding is %ssupported",
-               (config.hw_padding ? "" : "not "));
+       if (config.hw_padding && !hw_padding) {
+               DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
+               config.hw_padding = 0;
+       } else if (config.hw_padding) {
+               DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
+       }
        config.tso = (attr.tso_caps.max_tso > 0 &&
                      (attr.tso_caps.supported_qpts &
                       (1 << IBV_QPT_RAW_PACKET)));
@@ -1114,6 +1124,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
                err = ENOMEM;
                goto error;
        }
+       /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
+       eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
        if (priv->representor) {
                eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
                eth_dev->data->representor_id = priv->representor_id;
@@ -1222,8 +1234,10 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
        priv->config = config;
        /* Supported Verbs flow priority number detection. */
        err = mlx5_flow_discover_priorities(eth_dev);
-       if (err < 0)
+       if (err < 0) {
+               err = -err;
                goto error;
+       }
        priv->config.flow_prio = err;
        /*
         * Once the device is added to the list of memory event
@@ -1437,6 +1451,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                qsort(list, n, sizeof(*list), mlx5_dev_spawn_data_cmp);
        /* Default configuration. */
        dev_config = (struct mlx5_dev_config){
+               .hw_padding = 0,
                .mps = MLX5_ARG_UNSET,
                .tx_vec_en = 1,
                .rx_vec_en = 1,