feat(infra): SPR backend

[csit.git] / fdio.infra.ansible / inventories / lf_inventory / host_vars / 10.30.51.80.yaml

diff --git a/fdio.infra.ansible/inventories/lf_inventory/host_vars/10.30.51.80.yaml b/fdio.infra.ansible/inventories/lf_inventory/host_vars/10.30.51.80.yaml
index d89998b..dcb87d1 100644 (file)
--- a/fdio.infra.ansible/inventories/lf_inventory/host_vars/10.30.51.80.yaml
+++ b/fdio.infra.ansible/inventories/lf_inventory/host_vars/10.30.51.80.yaml
@@ -31,3 +31,4 @@ cpu_microarchitecture: "icelake"
 
 intel_700_matrix: "dpdk22.07"
 intel_800_matrix: "dpdk22.07"
+mellanox_matrix: "dpdk23.07"