New upstream version 18.05

[deb_dpdk.git] / lib / librte_hash / rte_hash_crc.h

diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index 63e74aa..cf28031 100644 (file)
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -1,34 +1,5 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Intel Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2014 Intel Corporation
  */
 
 #ifndef _RTE_HASH_CRC_H_
@@ -45,6 +16,7 @@ extern "C" {
 #endif
 
 #include <stdint.h>
+#include <rte_config.h>
 #include <rte_cpuflags.h>
 #include <rte_branch_prediction.h>
 #include <rte_common.h>
@@ -366,14 +338,13 @@ crc32c_1word(uint32_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_2words(uint64_t data, uint32_t init_val)
 {
+       uint32_t crc, term1, term2;
        union {
                uint64_t u64;
                uint32_t u32[2];
        } d;
        d.u64 = data;
 
-       uint32_t crc, term1, term2;
-
        crc = init_val;
        crc ^= d.u32[0];
 
@@ -387,7 +358,7 @@ crc32c_2words(uint64_t data, uint32_t init_val)
        return crc;
 }
 
-#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
+#if defined(RTE_ARCH_X86)
 static inline uint32_t
 crc32c_sse42_u8(uint8_t data, uint32_t init_val)
 {
@@ -427,9 +398,9 @@ crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
        } d;
 
        d.u64 = data;
-       init_val = crc32c_sse42_u32(d.u32[0], init_val);
-       init_val = crc32c_sse42_u32(d.u32[1], init_val);
-       return init_val;
+       init_val = crc32c_sse42_u32(d.u32[0], (uint32_t)init_val);
+       init_val = crc32c_sse42_u32(d.u32[1], (uint32_t)init_val);
+       return (uint32_t)init_val;
 }
 #endif
 
@@ -441,7 +412,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
                        "crc32q %[data], %[init_val];"
                        : [init_val] "+r" (init_val)
                        : [data] "rm" (data));
-       return init_val;
+       return (uint32_t)init_val;
 }
 #endif
 
@@ -453,7 +424,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 
 static uint8_t crc32_alg = CRC32_SW;
 
-#if defined(RTE_ARCH_ARM64)
+#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
 #include "rte_crc_arm64.h"
 #else
 
@@ -471,25 +442,16 @@ static uint8_t crc32_alg = CRC32_SW;
 static inline void
 rte_hash_crc_set_alg(uint8_t alg)
 {
-       switch (alg) {
-#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
-       case CRC32_SSE42_x64:
-               if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
-                       alg = CRC32_SSE42;
-       case CRC32_SSE42:
-               if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2))
-                       alg = CRC32_SW;
+#if defined(RTE_ARCH_X86)
+       if (alg == CRC32_SSE42_x64 &&
+                       !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
+               alg = CRC32_SSE42;
 #endif
-       case CRC32_SW:
-               crc32_alg = alg;
-       default:
-               break;
-       }
+       crc32_alg = alg;
 }
 
 /* Setting the best available algorithm */
-static inline void __attribute__((constructor))
-rte_hash_crc_init_alg(void)
+RTE_INIT(rte_hash_crc_init_alg)
 {
        rte_hash_crc_set_alg(CRC32_SSE42_x64);
 }
@@ -509,7 +471,7 @@ rte_hash_crc_init_alg(void)
 static inline uint32_t
 rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
 {
-#if defined RTE_ARCH_I686 || defined RTE_ARCH_X86_64
+#if defined RTE_ARCH_X86
        if (likely(crc32_alg & CRC32_SSE42))
                return crc32c_sse42_u8(data, init_val);
 #endif
@@ -532,7 +494,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
 {
-#if defined RTE_ARCH_I686 || defined RTE_ARCH_X86_64
+#if defined RTE_ARCH_X86
        if (likely(crc32_alg & CRC32_SSE42))
                return crc32c_sse42_u16(data, init_val);
 #endif
@@ -555,7 +517,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
 {
-#if defined RTE_ARCH_I686 || defined RTE_ARCH_X86_64
+#if defined RTE_ARCH_X86
        if (likely(crc32_alg & CRC32_SSE42))
                return crc32c_sse42_u32(data, init_val);
 #endif
@@ -583,7 +545,7 @@ rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
                return crc32c_sse42_u64(data, init_val);
 #endif
 
-#if defined RTE_ARCH_I686 || defined RTE_ARCH_X86_64
+#if defined RTE_ARCH_X86
        if (likely(crc32_alg & CRC32_SSE42))
                return crc32c_sse42_u64_mimic(data, init_val);
 #endif