SRv6: Make show command output visible
[csit.git] / resources / libraries / python / Constants.py
index 4e60009..42a8b41 100644 (file)
@@ -152,7 +152,7 @@ class Constants:
     RESOURCES_TP_WRK_WWW = u"resources/traffic_profiles/wrk/www"
 
     # VPP Communications Library LD_PRELOAD library
-    VCL_LDPRELOAD_LIBRARY=u"/usr/lib/x86_64-linux-gnu/libvcl_ldpreload.so"
+    VCL_LDPRELOAD_LIBRARY = u"/usr/lib/x86_64-linux-gnu/libvcl_ldpreload.so"
 
     # OpenVPP VAT binary name
     VAT_BIN_NAME = u"vpp_api_test"
@@ -179,7 +179,7 @@ class Constants:
     QEMU_VM_IMAGE = u"/var/lib/vm/vhost-nested.img"
 
     # QEMU VM DPDK path
-    QEMU_VM_DPDK = u"/opt/dpdk-19.02"
+    QEMU_VM_DPDK = u"/opt/dpdk-20.02"
 
     # Docker container SUT image
     DOCKER_SUT_IMAGE_UBUNTU = u"snergster/csit-sut:latest"
@@ -196,6 +196,9 @@ class Constants:
     # TRex number of cores
     TREX_CORE_COUNT = get_int_from_env(u"TREX_CORE_COUNT", 7)
 
+    # Trex force start regardles ports state
+    TREX_SEND_FORCE = get_pessimistic_bool_from_env(u"TREX_SEND_FORCE")
+
     # TRex extra commandline arguments
     TREX_EXTRA_CMDLINE = get_str_from_env(u"TREX_EXTRA_CMDLINE", u"")
 
@@ -277,6 +280,7 @@ class Constants:
         u"Intel-X710": u"10ge2p1x710",
         u"Intel-XL710": u"40ge2p1xl710",
         u"Intel-XXV710": u"25ge2p1xxv710",
+        u"Amazon-Nitro-50G": u"50ge1p1ENA",
         u"Mellanox-CX556A": u"100ge2p1cx556a",
     }
 
@@ -289,6 +293,7 @@ class Constants:
         u"Intel-X710": [u"vfio-pci", u"avf"],
         u"Intel-XL710": [u"vfio-pci", u"avf"],
         u"Intel-XXV710": [u"vfio-pci", u"avf"],
+        u"Amazon-Nitro-50G": [u"vfio-pci"],
         u"Mellanox-CX556A": [u"rdma-core"],
     }