pci_addr.as_u32);
}
- if (p)
- devconf = pool_elt_at_index (dm->conf->dev_confs, p[0]);
- else
- devconf = &dm->conf->default_devconf;
/* Create vnet interface */
vec_add2_aligned (dm->devices, xd, 1, CLIB_CACHE_LINE_BYTES);
xd->nb_tx_desc = DPDK_NB_TX_DESC_DEFAULT;
xd->cpu_socket = (i8) rte_eth_dev_socket_id (i);
+ if (p)
+ {
+ devconf = pool_elt_at_index (dm->conf->dev_confs, p[0]);
+ xd->name = devconf->name;
+ }
+ else
+ devconf = &dm->conf->default_devconf;
+
/* Handle interface naming for devices with multiple ports sharing same PCI ID */
if (pci_dev)
{
clib_memcpy (&xd->tx_conf, &dev_info.default_txconf,
sizeof (struct rte_eth_txconf));
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_IPV4_CKSUM)
+ {
+ xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_IPV4_CKSUM;
+ xd->flags |= DPDK_DEVICE_FLAG_RX_IP4_CKSUM;
+ }
+
if (dm->conf->no_multi_seg)
{
#if RTE_VERSION < RTE_VERSION_NUM(18, 8, 0, 0)
#elif RTE_VERSION < RTE_VERSION_NUM(18, 11, 0, 0)
xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
#endif
+
+ if (dm->conf->no_tx_checksum_offload == 0)
+ {
+#if RTE_VERSION < RTE_VERSION_NUM(18, 8, 0, 0)
+ xd->tx_conf.txq_flags &= ~(ETH_TXQ_FLAGS_NOXSUMUDP |
+ ETH_TXQ_FLAGS_NOXSUMTCP);
+#else
+ xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
+ xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
+#endif
+ xd->flags |=
+ DPDK_DEVICE_FLAG_TX_OFFLOAD;
+ }
break;
case VNET_DPDK_PMD_ENA:
;
else if (unformat (input, "num-tx-desc %u", &devconf->num_tx_desc))
;
+ else if (unformat (input, "name %s", &devconf->name))
+ ;
else if (unformat (input, "workers %U", unformat_bitmap_list,
&devconf->workers))
;
vec_add1 (dm->conf->eal_init_args, (u8 *) "vnet");
/* Default vlib_buffer_t flags, DISABLES tcp/udp checksumming... */
- dm->buffer_flags_template =
- (VLIB_BUFFER_TOTAL_LENGTH_VALID | VLIB_BUFFER_EXT_HDR_VALID
- | VNET_BUFFER_F_L4_CHECKSUM_COMPUTED |
- VNET_BUFFER_F_L4_CHECKSUM_CORRECT | VNET_BUFFER_F_L2_HDR_OFFSET_VALID);
+ dm->buffer_flags_template = (VLIB_BUFFER_TOTAL_LENGTH_VALID |
+ VLIB_BUFFER_EXT_HDR_VALID |
+ VNET_BUFFER_F_L4_CHECKSUM_COMPUTED |
+ VNET_BUFFER_F_L4_CHECKSUM_CORRECT);
dm->stat_poll_interval = DPDK_STATS_POLL_INTERVAL;
dm->link_state_poll_interval = DPDK_LINK_POLL_INTERVAL;