/*
*------------------------------------------------------------------
- * Copyright (c) 2016 Intel and/or its affiliates.
+ * Copyright (c) 2017 Intel and/or its affiliates.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
{
u8 ver_flags;
u8 type;
- u16 length; /* length in octets of the payload */
+ u16 length; /* length in octets of the data following the fixed part of the header */
u32 teid;
u16 sequence;
u8 pdu_number;
u8 next_ext_type;
} gtpu_header_t;
+#define GTPU_V1_HDR_LEN 8
+
#define GTPU_VER_MASK (7<<5)
#define GTPU_PT_BIT (1<<4)
#define GTPU_E_BIT (1<<2)
{
ip4_header_t ip4; /* 20 bytes */
udp_header_t udp; /* 8 bytes */
- gtpu_header_t gtpu; /* 8 bytes */
+ gtpu_header_t gtpu; /* 12 bytes */
}) ip4_gtpu_header_t;
/* *INDENT-ON* */
typedef struct
{
+ /* Required for pool_get_aligned */
+ CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
+
/* Rewrite string */
u8 *rewrite;
* The tunnels sibling index on the FIB entry's dependency list.
*/
u32 sibling_index;
+
+ u32 flow_index; /* infra flow index */
} gtpu_tunnel_t;
#define foreach_gtpu_input_next \
_(DROP, "error-drop") \
-_(L2_INPUT, "l2-input")
+_(L2_INPUT, "l2-input") \
+_(IP4_INPUT, "ip4-input") \
+_(IP6_INPUT, "ip6-input" )
typedef enum
{
/* convenience */
vlib_main_t *vlib_main;
vnet_main_t *vnet_main;
+ u32 flow_id_start;
} gtpu_main_t;
-gtpu_main_t gtpu_main;
+extern gtpu_main_t gtpu_main;
extern vlib_node_registration_t gtpu4_input_node;
extern vlib_node_registration_t gtpu6_input_node;
extern vlib_node_registration_t gtpu4_encap_node;
extern vlib_node_registration_t gtpu6_encap_node;
+extern vlib_node_registration_t gtpu4_flow_input_node;
u8 *format_gtpu_encap_trace (u8 * s, va_list * args);
typedef struct
{
u8 is_add;
- u8 is_ip6;
ip46_address_t src, dst;
u32 mcast_sw_if_index;
u32 encap_fib_index;
int vnet_gtpu_add_del_tunnel
(vnet_gtpu_add_del_tunnel_args_t * a, u32 * sw_if_indexp);
+typedef struct
+{
+ u32 tunnel_index;
+ u32 teid;
+} gtpu_encap_trace_t;
+
void vnet_int_gtpu_bypass_mode (u32 sw_if_index, u8 is_ip6, u8 is_enable);
+u32 vnet_gtpu_get_tunnel_index (u32 sw_if_index);
+int vnet_gtpu_add_del_rx_flow (u32 hw_if_index, u32 t_imdex, int is_add);
+
#endif /* included_vnet_gtpu_h */