}
}
+static_always_inline u32
+sat_sub (u32 x, u32 y)
+{
+ u32 res = x - y;
+ res &= -(res <= x);
+ return res;
+}
+
+/* branchless validation of the descriptor - uses saturated subtraction */
+static_always_inline u32
+memif_desc_is_invalid (memif_if_t * mif, memif_desc_t * d, u32 buffer_length)
+{
+ u32 rv;
+ u16 valid_flags = MEMIF_DESC_FLAG_NEXT;
+
+ rv = d->flags & (~valid_flags);
+ rv |= sat_sub (d->region + 1, vec_len (mif->regions));
+ rv |= sat_sub (d->length, buffer_length);
+ rv |= sat_sub (d->offset + d->length, mif->regions[d->region].region_size);
+
+ if (PREDICT_FALSE (rv))
+ {
+ mif->flags |= MEMIF_IF_FLAG_ERROR;
+ return 1;
+ }
+
+ return 0;
+}
+
static_always_inline uword
memif_device_input_inline (vlib_main_t * vm, vlib_node_runtime_t * node,
vlib_frame_t * frame, memif_if_t * mif,
u32 n_left, *to_next = 0;
u32 bi0, bi1, bi2, bi3;
vlib_buffer_t *b0, *b1, *b2, *b3;
- u32 thread_index = vlib_get_thread_index ();
+ u32 thread_index = vm->thread_index;
memif_per_thread_data_t *ptd = vec_elt_at_index (mm->per_thread_data,
thread_index);
vlib_buffer_t *bt = &ptd->buffer_template;
so start with IP header at offset 14 */
start_offset = (mode == MEMIF_INTERFACE_MODE_IP) ? 14 : 0;
-
/* for S2M rings, we are consumers of packet buffers, and for M2S rings we
are producers of empty buffers */
cur_slot = (type == MEMIF_RING_S2M) ? mq->last_head : mq->last_tail;
clib_memcpy64_x4 (b0, b1, b2, b3, bt);
b0->current_length = po[0].packet_len;
+ n_rx_bytes += b0->current_length;
b1->current_length = po[1].packet_len;
+ n_rx_bytes += b1->current_length;
b2->current_length = po[2].packet_len;
+ n_rx_bytes += b2->current_length;
b3->current_length = po[3].packet_len;
+ n_rx_bytes += b3->current_length;
memif_add_to_chain (vm, b0, ptd->buffers + fbvi0 + 1, buffer_size);
memif_add_to_chain (vm, b1, ptd->buffers + fbvi1 + 1, buffer_size);
b0 = vlib_get_buffer (vm, bi0);
clib_memcpy (b0, bt, 64);
b0->current_length = po->packet_len;
+ n_rx_bytes += b0->current_length;
memif_add_to_chain (vm, b0, ptd->buffers + fbvi0 + 1, buffer_size);
return n_rx_packets;
}
-uword
-CLIB_MULTIARCH_FN (memif_input_fn) (vlib_main_t * vm,
- vlib_node_runtime_t * node,
- vlib_frame_t * frame)
+static_always_inline uword
+memif_device_input_zc_inline (vlib_main_t * vm, vlib_node_runtime_t * node,
+ vlib_frame_t * frame, memif_if_t * mif,
+ u16 qid, memif_interface_mode_t mode)
+{
+ vnet_main_t *vnm = vnet_get_main ();
+ memif_main_t *mm = &memif_main;
+ memif_ring_t *ring;
+ memif_queue_t *mq;
+ u32 next_index;
+ uword n_trace = vlib_get_trace_count (vm, node);
+ u32 n_rx_packets = 0, n_rx_bytes = 0;
+ u32 *to_next = 0, *buffers;
+ u32 bi0, bi1, bi2, bi3;
+ u16 s0, s1, s2, s3;
+ memif_desc_t *d0, *d1, *d2, *d3;
+ vlib_buffer_t *b0, *b1, *b2, *b3;
+ u32 thread_index = vm->thread_index;
+ memif_per_thread_data_t *ptd = vec_elt_at_index (mm->per_thread_data,
+ thread_index);
+ u16 cur_slot, last_slot, ring_size, n_slots, mask, head;
+ i16 start_offset;
+ u32 buffer_length;
+ u16 n_alloc, n_from;
+
+ mq = vec_elt_at_index (mif->rx_queues, qid);
+ ring = mq->ring;
+ ring_size = 1 << mq->log2_ring_size;
+ mask = ring_size - 1;
+
+ next_index = (mode == MEMIF_INTERFACE_MODE_IP) ?
+ VNET_DEVICE_INPUT_NEXT_IP6_INPUT : VNET_DEVICE_INPUT_NEXT_ETHERNET_INPUT;
+
+ /* asume that somebody will want to add ethernet header on the packet
+ so start with IP header at offset 14 */
+ start_offset = (mode == MEMIF_INTERFACE_MODE_IP) ? 14 : 0;
+ buffer_length = VLIB_BUFFER_DEFAULT_FREE_LIST_BYTES - start_offset;
+
+ cur_slot = mq->last_tail;
+ last_slot = ring->tail;
+ if (cur_slot == last_slot)
+ goto refill;
+ n_slots = last_slot - cur_slot;
+
+ /* process ring slots */
+ vec_validate_aligned (ptd->buffers, MEMIF_RX_VECTOR_SZ,
+ CLIB_CACHE_LINE_BYTES);
+ while (n_slots && n_rx_packets < MEMIF_RX_VECTOR_SZ)
+ {
+ vlib_buffer_t *hb;
+
+ s0 = cur_slot & mask;
+ bi0 = mq->buffers[s0];
+ ptd->buffers[n_rx_packets++] = bi0;
+
+ CLIB_PREFETCH (&ring->desc[(cur_slot + 8) & mask],
+ CLIB_CACHE_LINE_BYTES, LOAD);
+ d0 = &ring->desc[s0];
+ hb = b0 = vlib_get_buffer (vm, bi0);
+ b0->current_data = start_offset;
+ b0->current_length = start_offset + d0->length;
+ n_rx_bytes += d0->length;
+
+ if (0 && memif_desc_is_invalid (mif, d0, buffer_length))
+ return 0;
+
+ cur_slot++;
+ n_slots--;
+ if (PREDICT_FALSE ((d0->flags & MEMIF_DESC_FLAG_NEXT) && n_slots))
+ {
+ hb->flags |= VLIB_BUFFER_TOTAL_LENGTH_VALID;
+ next_slot:
+ s0 = cur_slot & mask;
+ d0 = &ring->desc[s0];
+ bi0 = mq->buffers[s0];
+
+ /* previous buffer */
+ b0->next_buffer = bi0;
+ b0->flags |= VLIB_BUFFER_NEXT_PRESENT;
+
+ /* current buffer */
+ b0 = vlib_get_buffer (vm, bi0);
+ b0->current_data = start_offset;
+ b0->current_length = start_offset + d0->length;
+ hb->total_length_not_including_first_buffer += d0->length;
+ n_rx_bytes += d0->length;
+
+ cur_slot++;
+ n_slots--;
+ if ((d0->flags & MEMIF_DESC_FLAG_NEXT) && n_slots)
+ goto next_slot;
+ }
+ }
+
+ /* release slots from the ring */
+ mq->last_tail = cur_slot;
+
+ n_from = n_rx_packets;
+ buffers = ptd->buffers;
+
+ while (n_from)
+ {
+ u32 n_left_to_next;
+ u32 next0, next1, next2, next3;
+
+ vlib_get_next_frame (vm, node, next_index, to_next, n_left_to_next);
+ while (n_from >= 8 && n_left_to_next >= 4)
+ {
+ b0 = vlib_get_buffer (vm, buffers[4]);
+ b1 = vlib_get_buffer (vm, buffers[5]);
+ b2 = vlib_get_buffer (vm, buffers[6]);
+ b3 = vlib_get_buffer (vm, buffers[7]);
+ vlib_prefetch_buffer_header (b0, STORE);
+ vlib_prefetch_buffer_header (b1, STORE);
+ vlib_prefetch_buffer_header (b2, STORE);
+ vlib_prefetch_buffer_header (b3, STORE);
+
+ /* enqueue buffer */
+ to_next[0] = bi0 = buffers[0];
+ to_next[1] = bi1 = buffers[1];
+ to_next[2] = bi2 = buffers[2];
+ to_next[3] = bi3 = buffers[3];
+ to_next += 4;
+ n_left_to_next -= 4;
+ buffers += 4;
+
+ b0 = vlib_get_buffer (vm, bi0);
+ b1 = vlib_get_buffer (vm, bi1);
+ b2 = vlib_get_buffer (vm, bi2);
+ b3 = vlib_get_buffer (vm, bi3);
+
+ vnet_buffer (b0)->sw_if_index[VLIB_RX] = mif->sw_if_index;
+ vnet_buffer (b0)->sw_if_index[VLIB_TX] = ~0;
+ vnet_buffer (b1)->sw_if_index[VLIB_RX] = mif->sw_if_index;
+ vnet_buffer (b1)->sw_if_index[VLIB_TX] = ~0;
+ vnet_buffer (b2)->sw_if_index[VLIB_RX] = mif->sw_if_index;
+ vnet_buffer (b2)->sw_if_index[VLIB_TX] = ~0;
+ vnet_buffer (b3)->sw_if_index[VLIB_RX] = mif->sw_if_index;
+ vnet_buffer (b3)->sw_if_index[VLIB_TX] = ~0;
+
+ if (mode == MEMIF_INTERFACE_MODE_IP)
+ {
+ next0 = memif_next_from_ip_hdr (node, b0);
+ next1 = memif_next_from_ip_hdr (node, b1);
+ next2 = memif_next_from_ip_hdr (node, b2);
+ next3 = memif_next_from_ip_hdr (node, b3);
+ }
+ else if (mode == MEMIF_INTERFACE_MODE_ETHERNET)
+ {
+ if (PREDICT_FALSE (mif->per_interface_next_index != ~0))
+ {
+ next0 = mif->per_interface_next_index;
+ next1 = mif->per_interface_next_index;
+ next2 = mif->per_interface_next_index;
+ next3 = mif->per_interface_next_index;
+ }
+ else
+ {
+ next0 = next1 = next2 = next3 = next_index;
+ /* redirect if feature path enabled */
+ vnet_feature_start_device_input_x1 (mif->sw_if_index,
+ &next0, b0);
+ vnet_feature_start_device_input_x1 (mif->sw_if_index,
+ &next1, b1);
+ vnet_feature_start_device_input_x1 (mif->sw_if_index,
+ &next2, b2);
+ vnet_feature_start_device_input_x1 (mif->sw_if_index,
+ &next3, b3);
+ }
+ }
+
+ /* trace */
+ if (PREDICT_FALSE (n_trace > 0))
+ {
+ memif_trace_buffer (vm, node, mif, b0, next0, qid, &n_trace);
+ if (PREDICT_FALSE (n_trace > 0))
+ memif_trace_buffer (vm, node, mif, b1, next1, qid, &n_trace);
+ if (PREDICT_FALSE (n_trace > 0))
+ memif_trace_buffer (vm, node, mif, b2, next2, qid, &n_trace);
+ if (PREDICT_FALSE (n_trace > 0))
+ memif_trace_buffer (vm, node, mif, b3, next3, qid, &n_trace);
+ }
+
+ /* enqueue */
+ vlib_validate_buffer_enqueue_x4 (vm, node, next_index, to_next,
+ n_left_to_next, bi0, bi1, bi2, bi3,
+ next0, next1, next2, next3);
+
+ /* next */
+ n_from -= 4;
+ }
+ while (n_from && n_left_to_next)
+ {
+ /* enqueue buffer */
+ to_next[0] = bi0 = buffers[0];
+ to_next += 1;
+ n_left_to_next--;
+ buffers += 1;
+
+ b0 = vlib_get_buffer (vm, bi0);
+ vnet_buffer (b0)->sw_if_index[VLIB_RX] = mif->sw_if_index;
+ vnet_buffer (b0)->sw_if_index[VLIB_TX] = ~0;
+
+ if (mode == MEMIF_INTERFACE_MODE_IP)
+ {
+ next0 = memif_next_from_ip_hdr (node, b0);
+ }
+ else if (mode == MEMIF_INTERFACE_MODE_ETHERNET)
+ {
+ if (PREDICT_FALSE (mif->per_interface_next_index != ~0))
+ next0 = mif->per_interface_next_index;
+ else
+ {
+ next0 = next_index;
+ /* redirect if feature path enabled */
+ vnet_feature_start_device_input_x1 (mif->sw_if_index,
+ &next0, b0);
+ }
+ }
+
+ /* trace */
+ if (PREDICT_FALSE (n_trace > 0))
+ memif_trace_buffer (vm, node, mif, b0, next0, qid, &n_trace);
+
+ /* enqueue */
+ vlib_validate_buffer_enqueue_x1 (vm, node, next_index, to_next,
+ n_left_to_next, bi0, next0);
+
+ /* next */
+ n_from--;
+ }
+ vlib_put_next_frame (vm, node, next_index, n_left_to_next);
+ }
+
+ vlib_increment_combined_counter (vnm->interface_main.combined_sw_if_counters
+ + VNET_INTERFACE_COUNTER_RX, thread_index,
+ mif->hw_if_index, n_rx_packets,
+ n_rx_bytes);
+
+ /* refill ring with empty buffers */
+refill:
+ vec_reset_length (ptd->buffers);
+
+ head = ring->head;
+ n_slots = ring_size - head + mq->last_tail;
+
+ if (n_slots < 32)
+ goto done;
+
+ memif_desc_t *dt = &ptd->desc_template;
+ memset (dt, 0, sizeof (memif_desc_t));
+ dt->length = buffer_length;
+
+ n_alloc = vlib_buffer_alloc_to_ring (vm, mq->buffers, head & mask,
+ ring_size, n_slots);
+
+ if (PREDICT_FALSE (n_alloc != n_slots))
+ {
+ vlib_error_count (vm, node->node_index,
+ MEMIF_INPUT_ERROR_BUFFER_ALLOC_FAIL, 1);
+ }
+
+ while (n_alloc >= 32)
+ {
+ bi0 = mq->buffers[(head + 4) & mask];
+ vlib_prefetch_buffer_with_index (vm, bi0, LOAD);
+ bi1 = mq->buffers[(head + 5) & mask];
+ vlib_prefetch_buffer_with_index (vm, bi1, LOAD);
+ bi2 = mq->buffers[(head + 6) & mask];
+ vlib_prefetch_buffer_with_index (vm, bi2, LOAD);
+ bi3 = mq->buffers[(head + 7) & mask];
+ vlib_prefetch_buffer_with_index (vm, bi3, LOAD);
+
+ s0 = head++ & mask;
+ s1 = head++ & mask;
+ s2 = head++ & mask;
+ s3 = head++ & mask;
+
+ d0 = &ring->desc[s0];
+ d1 = &ring->desc[s1];
+ d2 = &ring->desc[s2];
+ d3 = &ring->desc[s3];
+
+ clib_memcpy (d0, dt, sizeof (memif_desc_t));
+ clib_memcpy (d1, dt, sizeof (memif_desc_t));
+ clib_memcpy (d2, dt, sizeof (memif_desc_t));
+ clib_memcpy (d3, dt, sizeof (memif_desc_t));
+
+ b0 = vlib_get_buffer (vm, mq->buffers[s0]);
+ b1 = vlib_get_buffer (vm, mq->buffers[s1]);
+ b2 = vlib_get_buffer (vm, mq->buffers[s2]);
+ b3 = vlib_get_buffer (vm, mq->buffers[s3]);
+
+ d0->region = b0->buffer_pool_index + 1;
+ d1->region = b1->buffer_pool_index + 1;
+ d2->region = b2->buffer_pool_index + 1;
+ d3->region = b3->buffer_pool_index + 1;
+
+ d0->offset =
+ (void *) b0->data - mif->regions[d0->region].shm + start_offset;
+ d1->offset =
+ (void *) b1->data - mif->regions[d1->region].shm + start_offset;
+ d2->offset =
+ (void *) b2->data - mif->regions[d2->region].shm + start_offset;
+ d3->offset =
+ (void *) b3->data - mif->regions[d3->region].shm + start_offset;
+
+ n_alloc -= 4;
+ }
+ while (n_alloc)
+ {
+ s0 = head++ & mask;
+ d0 = &ring->desc[s0];
+ clib_memcpy (d0, dt, sizeof (memif_desc_t));
+ b0 = vlib_get_buffer (vm, mq->buffers[s0]);
+ d0->region = b0->buffer_pool_index + 1;
+ d0->offset =
+ (void *) b0->data - mif->regions[d0->region].shm + start_offset;
+
+ n_alloc -= 1;
+ }
+
+ CLIB_MEMORY_STORE_BARRIER ();
+ ring->head = head;
+
+done:
+ return n_rx_packets;
+}
+
+
+VLIB_NODE_FN (memif_input_node) (vlib_main_t * vm,
+ vlib_node_runtime_t * node,
+ vlib_frame_t * frame)
{
u32 n_rx = 0;
memif_main_t *mm = &memif_main;
vnet_device_input_runtime_t *rt = (void *) node->runtime_data;
vnet_device_and_queue_t *dq;
+ memif_interface_mode_t mode_ip = MEMIF_INTERFACE_MODE_IP;
+ memif_interface_mode_t mode_eth = MEMIF_INTERFACE_MODE_ETHERNET;
foreach_device_and_queue (dq, rt->devices_and_queues)
{
if ((mif->flags & MEMIF_IF_FLAG_ADMIN_UP) &&
(mif->flags & MEMIF_IF_FLAG_CONNECTED))
{
- if (mif->flags & MEMIF_IF_FLAG_IS_SLAVE)
+ if (mif->flags & MEMIF_IF_FLAG_ZERO_COPY)
+ {
+ if (mif->mode == MEMIF_INTERFACE_MODE_IP)
+ n_rx += memif_device_input_zc_inline (vm, node, frame, mif,
+ dq->queue_id, mode_ip);
+ else
+ n_rx += memif_device_input_zc_inline (vm, node, frame, mif,
+ dq->queue_id, mode_eth);
+ }
+ else if (mif->flags & MEMIF_IF_FLAG_IS_SLAVE)
{
if (mif->mode == MEMIF_INTERFACE_MODE_IP)
n_rx += memif_device_input_inline (vm, node, frame, mif,
MEMIF_RING_M2S, dq->queue_id,
- MEMIF_INTERFACE_MODE_IP);
+ mode_ip);
else
n_rx += memif_device_input_inline (vm, node, frame, mif,
MEMIF_RING_M2S, dq->queue_id,
- MEMIF_INTERFACE_MODE_ETHERNET);
+ mode_eth);
}
else
{
if (mif->mode == MEMIF_INTERFACE_MODE_IP)
n_rx += memif_device_input_inline (vm, node, frame, mif,
MEMIF_RING_S2M, dq->queue_id,
- MEMIF_INTERFACE_MODE_IP);
+ mode_ip);
else
n_rx += memif_device_input_inline (vm, node, frame, mif,
MEMIF_RING_S2M, dq->queue_id,
- MEMIF_INTERFACE_MODE_ETHERNET);
+ mode_eth);
}
}
}
return n_rx;
}
-#ifndef CLIB_MULTIARCH_VARIANT
+#ifndef CLIB_MARCH_VARIANT
/* *INDENT-OFF* */
VLIB_REGISTER_NODE (memif_input_node) = {
- .function = memif_input_fn,
.name = "memif-input",
.sibling_of = "device-input",
.format_trace = format_memif_input_trace,
.n_errors = MEMIF_INPUT_N_ERROR,
.error_strings = memif_input_error_strings,
};
-
-vlib_node_function_t __clib_weak memif_input_fn_avx512;
-vlib_node_function_t __clib_weak memif_input_fn_avx2;
-
-#if __x86_64__
-static void __clib_constructor
-memif_input_multiarch_select (void)
-{
- if (memif_input_fn_avx512 && clib_cpu_supports_avx512f ())
- memif_input_node.function = memif_input_fn_avx512;
- else if (memif_input_fn_avx2 && clib_cpu_supports_avx2 ())
- memif_input_node.function = memif_input_fn_avx2;
-}
-#endif
#endif
/* *INDENT-ON* */
Code Review / vpp.git / blobdiff