.name = "topdown-level1",
.description = "Top-down Microarchitecture Analysis Level 1",
.source = "intel-core",
- .offset_type = PERFMON_OFFSET_TYPE_METRICS,
.events[0] = INTEL_CORE_E_TOPDOWN_SLOTS,
.events[1] = INTEL_CORE_E_TOPDOWN_L1_RETIRING_METRIC,
.events[2] = INTEL_CORE_E_TOPDOWN_L1_BAD_SPEC_METRIC,
.events[3] = INTEL_CORE_E_TOPDOWN_L1_FE_BOUND_METRIC,
.events[4] = INTEL_CORE_E_TOPDOWN_L1_BE_BOUND_METRIC,
.n_events = 5,
- .metrics[0] = RDPMC_SLOTS | FIXED_COUNTER_SLOTS,
- .metrics[1] = RDPMC_METRICS | METRIC_COUNTER_TOPDOWN_L1_L2,
- .n_metrics = 2,
+ .preserve_samples = 0x1F,
.cpu_supports = topdown_lvl1_cpu_supports,
.n_cpu_supports = ARRAY_LEN (topdown_lvl1_cpu_supports),
.format_fn = format_topdown_lvl1,
.name = "topdown-level2",
.description = "Top-down Microarchitecture Analysis Level 2",
.source = "intel-core",
- .offset_type = PERFMON_OFFSET_TYPE_METRICS,
.events[0] = INTEL_CORE_E_TOPDOWN_SLOTS,
.events[1] = INTEL_CORE_E_TOPDOWN_L1_RETIRING_METRIC,
.events[2] = INTEL_CORE_E_TOPDOWN_L1_BAD_SPEC_METRIC,
.events[7] = INTEL_CORE_E_TOPDOWN_L2_FETCHLAT_METRIC,
.events[8] = INTEL_CORE_E_TOPDOWN_L2_MEMBOUND_METRIC,
.n_events = 9,
- .metrics[0] = RDPMC_SLOTS | FIXED_COUNTER_SLOTS,
- .metrics[1] = RDPMC_METRICS | METRIC_COUNTER_TOPDOWN_L1_L2,
- .n_metrics = 2,
+ .preserve_samples = 0x1FF,
.cpu_supports = topdown_lvl2_cpu_supports,
.n_cpu_supports = ARRAY_LEN (topdown_lvl2_cpu_supports),
.format_fn = format_topdown_lvl2,