static clib_error_t *
vmxnet3_interface_rx_mode_change (vnet_main_t * vnm, u32 hw_if_index, u32 qid,
- vnet_hw_interface_rx_mode mode)
+ vnet_hw_if_rx_mode mode)
{
vmxnet3_main_t *vmxm = &vmxnet3_main;
vnet_hw_interface_t *hw = vnet_get_hw_interface (vnm, hw_if_index);
vmxnet3_device_t *vd = pool_elt_at_index (vmxm->devices, hw->dev_instance);
vmxnet3_rxq_t *rxq = vec_elt_at_index (vd->rxqs, qid);
- if (mode == VNET_HW_INTERFACE_RX_MODE_POLLING)
+ if (mode == VNET_HW_IF_RX_MODE_POLLING)
rxq->int_mode = 0;
else
rxq->int_mode = 1;
}
/* GSO is only supported for version >= 3 */
- if (args->enable_gso && (vd->version >= 3))
+ if (args->enable_gso)
{
- vd->gso_enable = 1;
+ if (vd->version >= 3)
+ vd->gso_enable = 1;
+ else
+ {
+ error =
+ clib_error_return (0,
+ "GSO is not supported because hardware version"
+ " is %u. It must be >= 3", vd->version);
+ return error;
+ }
}
vmxnet3_reg_write (vd, 1, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
}
/* *INDENT-OFF* */
- pool_foreach (vd, vmxm->devices, ({
+ pool_foreach (vd, vmxm->devices) {
if (vd->pci_addr.as_u32 == args->addr.as_u32)
{
args->rv = VNET_API_ERROR_ADDRESS_IN_USE;
format_vlib_pci_addr, &args->addr, "pci address in use");
return;
}
- }));
+ }
/* *INDENT-ON* */
if (args->bind)
vmxnet3_log_error (vd,
"No sufficient interrupt lines (%u) for rx queues",
num_intr);
+ error =
+ clib_error_return (0,
+ "No sufficient interrupt lines (%u) for rx queues",
+ num_intr);
goto error;
}
if ((error = vlib_pci_register_msix_handler (vm, h, 0, vd->num_rx_queues,
vnet_hw_interface_t *hw = vnet_get_hw_interface (vnm, vd->hw_if_index);
hw->flags |= VNET_HW_INTERFACE_FLAG_SUPPORTS_INT_MODE;
if (vd->gso_enable)
- hw->flags |= VNET_HW_INTERFACE_FLAG_SUPPORTS_GSO;
+ hw->flags |= (VNET_HW_INTERFACE_FLAG_SUPPORTS_GSO |
+ VNET_HW_INTERFACE_FLAG_SUPPORTS_TX_L4_CKSUM_OFFLOAD);
vnet_hw_interface_set_input_node (vnm, vd->hw_if_index,
vmxnet3_input_node.index);