#include <vnet/ethernet/ethernet.h>
#include <vnet/plugin/plugin.h>
#include <vpp/app/version.h>
-
+#include <vnet/interface/rx_queue_funcs.h>
+#include <vnet/interface/tx_queue_funcs.h>
#include <vmxnet3/vmxnet3.h>
#define PCI_VENDOR_ID_VMWARE 0x15ad
static clib_error_t *
vmxnet3_interface_rx_mode_change (vnet_main_t * vnm, u32 hw_if_index, u32 qid,
- vnet_hw_interface_rx_mode mode)
+ vnet_hw_if_rx_mode mode)
{
vmxnet3_main_t *vmxm = &vmxnet3_main;
vnet_hw_interface_t *hw = vnet_get_hw_interface (vnm, hw_if_index);
vmxnet3_device_t *vd = pool_elt_at_index (vmxm->devices, hw->dev_instance);
vmxnet3_rxq_t *rxq = vec_elt_at_index (vd->rxqs, qid);
- if (mode == VNET_HW_INTERFACE_RX_MODE_POLLING)
+ if (mode == VNET_HW_IF_RX_MODE_POLLING)
rxq->int_mode = 0;
else
rxq->int_mode = 1;
vmxnet3_tx_stats *txs;
u32 size;
- if (qid >= vd->num_tx_queues)
- {
- qid = qid % vd->num_tx_queues;
- txq = vec_elt_at_index (vd->txqs, qid);
- if (txq->lock == 0)
- clib_spinlock_init (&txq->lock);
- vd->flags |= VMXNET3_DEVICE_F_SHARED_TXQ_LOCK;
- return 0;
- }
+ vec_validate_aligned (vd->txqs, qid, CLIB_CACHE_LINE_BYTES);
+ txq = vec_elt_at_index (vd->txqs, qid);
+ clib_memset (txq, 0, sizeof (*txq));
+ clib_spinlock_init (&txq->lock);
vec_validate (vd->tx_stats, qid);
txs = vec_elt_at_index (vd->tx_stats, qid);
clib_memset (txs, 0, sizeof (*txs));
- vec_validate_aligned (vd->txqs, qid, CLIB_CACHE_LINE_BYTES);
- txq = vec_elt_at_index (vd->txqs, qid);
- clib_memset (txq, 0, sizeof (*txq));
txq->size = qsz;
txq->reg_txprod = qid * 8 + VMXNET3_REG_TXPROD;
if (txq->tx_desc == 0)
return vlib_physmem_last_error (vm);
- memset (txq->tx_desc, 0, size);
+ clib_memset (txq->tx_desc, 0, size);
size = qsz * sizeof (*txq->tx_comp);
txq->tx_comp =
{
clib_error_t *error = 0;
u32 ret, i, size;
- vlib_thread_main_t *tm = vlib_get_thread_main ();
/* Quiesce the device */
vmxnet3_reg_write (vd, 1, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
}
/* GSO is only supported for version >= 3 */
- if (args->enable_gso && (vd->version >= 3))
+ if (args->enable_gso)
{
- vd->gso_enable = 1;
+ if (vd->version >= 3)
+ vd->gso_enable = 1;
+ else
+ {
+ error =
+ clib_error_return (0,
+ "GSO is not supported because hardware version"
+ " is %u. It must be >= 3", vd->version);
+ return error;
+ }
}
vmxnet3_reg_write (vd, 1, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
return error;
}
- for (i = 0; i < tm->n_vlib_mains; i++)
+ for (i = 0; i < vd->num_tx_queues; i++)
{
error = vmxnet3_txq_init (vm, vd, i, args->txq_size);
if (error)
uword pd = vlib_pci_get_private_data (vm, h);
vmxnet3_device_t *vd = pool_elt_at_index (vmxm->devices, pd);
u16 qid = line;
+ vmxnet3_rxq_t *rxq = vec_elt_at_index (vd->rxqs, qid);
if (vec_len (vd->rxqs) > qid && vd->rxqs[qid].int_mode != 0)
- vnet_device_input_set_interrupt_pending (vnm, vd->hw_if_index, qid);
+ vnet_hw_if_rx_queue_set_int_pending (vnm, rxq->queue_index);
}
static void
}
/* *INDENT-OFF* */
- pool_foreach (vd, vmxm->devices, ({
+ pool_foreach (vd, vmxm->devices) {
if (vd->pci_addr.as_u32 == args->addr.as_u32)
{
args->rv = VNET_API_ERROR_ADDRESS_IN_USE;
format_vlib_pci_addr, &args->addr, "pci address in use");
return;
}
- }));
+ }
/* *INDENT-ON* */
if (args->bind)
vmxnet3_log_error (vd,
"No sufficient interrupt lines (%u) for rx queues",
num_intr);
+ error =
+ clib_error_return (0,
+ "No sufficient interrupt lines (%u) for rx queues",
+ num_intr);
goto error;
}
if ((error = vlib_pci_register_msix_handler (vm, h, 0, vd->num_rx_queues,
args->sw_if_index = sw->sw_if_index;
vnet_hw_interface_t *hw = vnet_get_hw_interface (vnm, vd->hw_if_index);
- hw->flags |= VNET_HW_INTERFACE_FLAG_SUPPORTS_INT_MODE;
+ hw->caps |= VNET_HW_INTERFACE_CAP_SUPPORTS_INT_MODE;
if (vd->gso_enable)
- hw->flags |= VNET_HW_INTERFACE_FLAG_SUPPORTS_GSO;
+ {
+ hw->caps |= (VNET_HW_INTERFACE_CAP_SUPPORTS_TCP_GSO |
+ VNET_HW_INTERFACE_CAP_SUPPORTS_TX_TCP_CKSUM |
+ VNET_HW_INTERFACE_CAP_SUPPORTS_TX_UDP_CKSUM);
+ }
- vnet_hw_interface_set_input_node (vnm, vd->hw_if_index,
- vmxnet3_input_node.index);
+ vnet_hw_if_set_input_node (vnm, vd->hw_if_index, vmxnet3_input_node.index);
/* Disable interrupts */
vmxnet3_disable_interrupt (vd);
vec_foreach_index (qid, vd->rxqs)
{
vmxnet3_rxq_t *rxq = vec_elt_at_index (vd->rxqs, qid);
- u32 thread_index;
- u32 numa_node;
+ u32 qi, fi;
- vnet_hw_interface_assign_rx_thread (vnm, vd->hw_if_index, qid, ~0);
- thread_index = vnet_get_device_input_thread_index (vnm, vd->hw_if_index,
- qid);
- numa_node = vlib_mains[thread_index]->numa_node;
+ qi = vnet_hw_if_register_rx_queue (vnm, vd->hw_if_index, qid,
+ VNET_HW_IF_RXQ_THREAD_ANY);
+ fi = vlib_pci_get_msix_file_index (vm, vd->pci_dev_handle, qid);
+ vnet_hw_if_set_rx_queue_file_index (vnm, qi, fi);
+ rxq->queue_index = qi;
rxq->buffer_pool_index =
- vlib_buffer_pool_get_default_for_numa (vm, numa_node);
+ vnet_hw_if_get_rx_queue_numa_node (vnm, rxq->queue_index);
vmxnet3_rxq_refill_ring0 (vm, vd, rxq);
vmxnet3_rxq_refill_ring1 (vm, vd, rxq);
}
+
+ vec_foreach_index (qid, vd->txqs)
+ {
+ vmxnet3_txq_t *txq = vec_elt_at_index (vd->txqs, qid);
+ txq->queue_index =
+ vnet_hw_if_register_tx_queue (vnm, vd->hw_if_index, qid);
+ }
+ for (u32 i = 0; i < vlib_get_n_threads (); i++)
+ {
+ u32 qi = vd->txqs[i % vd->num_tx_queues].queue_index;
+ vnet_hw_if_tx_queue_assign_thread (vnm, qi, i);
+ }
+ vnet_hw_if_update_runtime_data (vnm, vd->hw_if_index);
+
vd->flags |= VMXNET3_DEVICE_F_INITIALIZED;
vmxnet3_enable_interrupt (vd);
vnet_main_t *vnm = vnet_get_main ();
vmxnet3_main_t *vmxm = &vmxnet3_main;
u32 i, bi;
- u16 desc_idx, qid;
+ u16 desc_idx;
/* Quiesce the device */
vmxnet3_reg_write (vd, 1, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
if (vd->hw_if_index)
{
vnet_hw_interface_set_flags (vnm, vd->hw_if_index, 0);
- vec_foreach_index (qid, vd->rxqs)
- vnet_hw_interface_unassign_rx_thread (vnm, vd->hw_if_index, qid);
ethernet_delete_interface (vnm, vd->hw_if_index);
}
Code Review / vpp.git / blobdiff