vppinfra: SHA2-256 ARM ISA support

[vpp.git] / src / vppinfra / bihash_40_8.h

diff --git a/src/vppinfra/bihash_40_8.h b/src/vppinfra/bihash_40_8.h
index 9ceecfc..27207a3 100644 (file)
--- a/src/vppinfra/bihash_40_8.h
+++ b/src/vppinfra/bihash_40_8.h
@@ -14,12 +14,20 @@
  */
 
 #undef BIHASH_TYPE
-#undef BIHASH_KVP_CACHE_SIZE
 #undef BIHASH_KVP_PER_PAGE
+#undef BIHASH_32_64_SVM
+#undef BIHASH_ENABLE_STATS
+#undef BIHASH_KVP_AT_BUCKET_LEVEL
+#undef BIHASH_LAZY_INSTANTIATE
+#undef BIHASH_BUCKET_PREFETCH_CACHE_LINES
+#undef BIHASH_USE_HEAP
 
 #define BIHASH_TYPE _40_8
 #define BIHASH_KVP_PER_PAGE 4
-#define BIHASH_KVP_CACHE_SIZE 0
+#define BIHASH_KVP_AT_BUCKET_LEVEL 0
+#define BIHASH_LAZY_INSTANTIATE 1
+#define BIHASH_BUCKET_PREFETCH_CACHE_LINES 1
+#define BIHASH_USE_HEAP 1
 
 #ifndef __included_bihash_40_8_h__
 #define __included_bihash_40_8_h__
@@ -36,11 +44,16 @@ typedef struct
   u64 value;
 } clib_bihash_kv_40_8_t;
 
+static inline void
+clib_bihash_mark_free_40_8 (clib_bihash_kv_40_8_t *v)
+{
+  v->value = 0xFEEDFACE8BADF00DULL;
+}
+
 static inline int
 clib_bihash_is_free_40_8 (const clib_bihash_kv_40_8_t * v)
 {
-  /* Free values are memset to 0xff, check a bit... */
-  if (v->key[0] == ~0ULL && v->value == ~0ULL)
+  if (v->value == 0xFEEDFACE8BADF00DULL)
     return 1;
   return 0;
 }
@@ -70,19 +83,16 @@ static inline int
 clib_bihash_key_compare_40_8 (u64 * a, u64 * b)
 {
 #if defined (CLIB_HAVE_VEC512)
-  u64x8 v;
-  v = u64x8_load_unaligned (a) ^ u64x8_load_unaligned (b);
-  return (u64x8_is_zero_mask (v) & 0x1f) == 0;
+  return u64x8_is_equal (u64x8_mask_load_zero (a, 0x1f),
+                        u64x8_mask_load_zero (b, 0x1f));
 #elif defined (CLIB_HAVE_VEC256)
-  u64x4 v;
-  v = u64x4_load_unaligned (a) ^ u64x4_load_unaligned (b);
-  v |= u64x4_load_unaligned (a + 1) ^ u64x4_load_unaligned (b + 1);
+  u64x4 v = { a[4] ^ b[4], 0, 0, 0 };
+  v |= u64x4_load_unaligned (a) ^ u64x4_load_unaligned (b);
   return u64x4_is_all_zero (v);
 #elif defined(CLIB_HAVE_VEC128) && defined(CLIB_HAVE_VEC128_UNALIGNED_LOAD_STORE)
-  u64x2 v;
-  v = u64x2_load_unaligned (a) ^ u64x2_load_unaligned (b);
+  u64x2 v = { a[4] ^ b[4], 0 };
+  v |= u64x2_load_unaligned (a) ^ u64x2_load_unaligned (b);
   v |= u64x2_load_unaligned (a + 2) ^ u64x2_load_unaligned (b + 2);
-  v |= u64x2_load_unaligned (a + 3) ^ u64x2_load_unaligned (b + 3);
   return u64x2_is_all_zero (v);
 #else
   return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2]) | (a[3] ^ b[3])