vppinfra: initial RISC-V support

[vpp.git] / src / vppinfra / clib.h

diff --git a/src/vppinfra/clib.h b/src/vppinfra/clib.h
index 7cdf4a4..52e7217 100644 (file)
--- a/src/vppinfra/clib.h
+++ b/src/vppinfra/clib.h
@@ -39,7 +39,10 @@
 #define included_clib_h
 
 #include <stddef.h>
+
+#if __has_include(<vppinfra/config.h>)
 #include <vppinfra/config.h>
+#endif
 
 #ifdef  __x86_64__
 #include <x86intrin.h>
@@ -121,10 +124,17 @@
 #define PREDICT_FALSE(x) __builtin_expect((x),0)
 #define PREDICT_TRUE(x) __builtin_expect((x),1)
 #define COMPILE_TIME_CONST(x) __builtin_constant_p (x)
+#define CLIB_ASSUME(x)                                                        \
+  do                                                                          \
+    {                                                                         \
+      if (!(x))                                                               \
+       __builtin_unreachable ();                                             \
+    }                                                                         \
+  while (0)
 
 /*
  * Compiler barrier
- *   prevent compiler to reorder memory access accross this boundary
+ *   prevent compiler to reorder memory access across this boundary
  *   prevent compiler to cache values in register (force reload)
  * Not to be confused with CPU memory barrier below
  */
@@ -248,6 +258,9 @@ min_log2_u64 (u64 x)
 always_inline uword
 pow2_mask (uword x)
 {
+#ifdef __BMI2__
+  return _bzhi_u64 (-1ULL, x);
+#endif
   return ((uword) 1 << x) - (uword) 1;
 }